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authorobrien <obrien@FreeBSD.org>2005-05-16 09:47:53 +0000
committerobrien <obrien@FreeBSD.org>2005-05-16 09:47:53 +0000
commitc0de585b6b6e5dcb8df1e814b54bbe8e0d7b2db4 (patch)
treecd4232f0eaa0a48382b21a82e67bd45a144d32a3
parent86758e889524090094ccc686150005965fa2117e (diff)
downloadFreeBSD-src-c0de585b6b6e5dcb8df1e814b54bbe8e0d7b2db4.zip
FreeBSD-src-c0de585b6b6e5dcb8df1e814b54bbe8e0d7b2db4.tar.gz
Add the 2nd word of IA32 feature flags. This includes things such as SSE3.
Obtained from: sys/amd64/amd64/identcpu.
-rw-r--r--sys/i386/i386/identcpu.c37
-rw-r--r--sys/i386/i386/initcpu.c1
-rw-r--r--sys/i386/i386/locore.s1
-rw-r--r--sys/i386/include/md_var.h2
4 files changed, 40 insertions, 1 deletions
diff --git a/sys/i386/i386/identcpu.c b/sys/i386/i386/identcpu.c
index 8c8e121..31171d2 100644
--- a/sys/i386/i386/identcpu.c
+++ b/sys/i386/i386/identcpu.c
@@ -688,6 +688,43 @@ printcpuinfo(void)
"\040PBE" /* Pending Break Enable */
);
+ if (cpu_feature2 != 0)
+ printf("\n Features2=0x%b", cpu_feature2,
+ "\020"
+ "\001SSE3" /* SSE3 */
+ "\002<b1>"
+ "\003RSVD2>" /* "Reserved" bit 2 */
+ "\004MON" /* MONITOR/MWAIT Instructions */
+ "\005DS_CPL" /* CPL Qualified Debug Store */
+ "\006<b5>" /* Machine specific registers */
+ "\007<b6>" /* Physical address extension */
+ "\010EST" /* Enhanced SpeedStep */
+ "\011TM2" /* Thermal Monitor 2 */
+ "\012<b9>"
+ "\013CNTX-ID" /* L1 context ID available */
+ "\014<b11>"
+ "\015<b12>"
+ "\016CX16" /* CMPXCHG16B Instruction */
+ "\017<b14>"
+ "\020<b15>"
+ "\021<b16>"
+ "\022<b17>"
+ "\023<b18>"
+ "\024<b19>"
+ "\025<b20>"
+ "\026<b21>"
+ "\027<b22>"
+ "\030<b23>"
+ "\031<b24>"
+ "\032<b25>"
+ "\033<b26>"
+ "\034<b27>"
+ "\035<b28>"
+ "\036<b29>"
+ "\037<b30>"
+ "\040<b31>"
+ );
+
/*
* If this CPU supports hyperthreading then mention
* the number of logical CPU's it contains.
diff --git a/sys/i386/i386/initcpu.c b/sys/i386/i386/initcpu.c
index 91c4370..1304a84 100644
--- a/sys/i386/i386/initcpu.c
+++ b/sys/i386/i386/initcpu.c
@@ -79,6 +79,7 @@ SYSCTL_INT(_hw, OID_AUTO, instruction_sse, CTLFLAG_RD,
/* Must *NOT* be BSS or locore will bzero these after setting them */
int cpu = 0; /* Are we 386, 386sx, 486, etc? */
u_int cpu_feature = 0; /* Feature flags */
+u_int cpu_feature2 = 0; /* Feature flags */
u_int cpu_high = 0; /* Highest arg to CPUID */
u_int cpu_id = 0; /* Stepping ID */
u_int cpu_procinfo = 0; /* HyperThreading Info / Brand Index / CLFUSH */
diff --git a/sys/i386/i386/locore.s b/sys/i386/i386/locore.s
index 5b1583c..7ca289c 100644
--- a/sys/i386/i386/locore.s
+++ b/sys/i386/i386/locore.s
@@ -681,6 +681,7 @@ trycpuid: /* Use the `cpuid' instruction. */
movl %eax,R(cpu_id) # store cpu_id
movl %ebx,R(cpu_procinfo) # store cpu_procinfo
movl %edx,R(cpu_feature) # store cpu_feature
+ movl %ecx,R(cpu_feature2) # store cpu_feature2
rorl $8,%eax # extract family type
andl $15,%eax
cmpl $5,%eax
diff --git a/sys/i386/include/md_var.h b/sys/i386/include/md_var.h
index 9510854..0c30ccd 100644
--- a/sys/i386/include/md_var.h
+++ b/sys/i386/include/md_var.h
@@ -45,7 +45,7 @@ extern long Maxmem;
extern u_int basemem; /* PA of original top of base memory */
extern int busdma_swi_pending;
extern u_int cpu_exthigh;
-extern u_int cpu_feature;
+extern u_int cpu_feature, cpu_feature2;
extern u_int cpu_fxsr;
extern u_int cpu_high;
extern u_int cpu_id;
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