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authoradrian <adrian@FreeBSD.org>2014-04-27 23:31:42 +0000
committeradrian <adrian@FreeBSD.org>2014-04-27 23:31:42 +0000
commit811bc0ce531a4bb7790e5915ad0e89b20c4a22e2 (patch)
tree27bdd0a02a57e6a744ae89f55b7dbfd343be5d36
parent6bf6fde1a79feab2566ac4b12e63f752ecd064b4 (diff)
downloadFreeBSD-src-811bc0ce531a4bb7790e5915ad0e89b20c4a22e2.zip
FreeBSD-src-811bc0ce531a4bb7790e5915ad0e89b20c4a22e2.tar.gz
Do a read-after-write to ensure the interrupt register update is flushed
to the hardware. The QCA HAL has a comment noting that if this isn't done, modifications to AR_IMR_S2 before AR_IMR is flushed may produce spurious interrupts. Obtained from: QCA
-rw-r--r--sys/dev/ath/ath_hal/ar5416/ar5416_interrupts.c3
1 files changed, 3 insertions, 0 deletions
diff --git a/sys/dev/ath/ath_hal/ar5416/ar5416_interrupts.c b/sys/dev/ath/ath_hal/ar5416/ar5416_interrupts.c
index 631ca2f..32ce2ed 100644
--- a/sys/dev/ath/ath_hal/ar5416/ar5416_interrupts.c
+++ b/sys/dev/ath/ath_hal/ar5416/ar5416_interrupts.c
@@ -337,6 +337,9 @@ ar5416SetInterrupts(struct ath_hal *ah, HAL_INT ints)
/* Write the new IMR and store off our SW copy. */
HALDEBUG(ah, HAL_DEBUG_INTERRUPT, "%s: new IMR 0x%x\n", __func__, mask);
OS_REG_WRITE(ah, AR_IMR, mask);
+ /* Flush write */
+ (void) OS_REG_READ(ah, AR_IMR);
+
mask = OS_REG_READ(ah, AR_IMR_S2) & ~(AR_IMR_S2_TIM |
AR_IMR_S2_DTIM |
AR_IMR_S2_DTIMSYNC |
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