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| author | ian <ian@FreeBSD.org> | 2014-04-28 02:35:28 +0000 |
|---|---|---|
| committer | ian <ian@FreeBSD.org> | 2014-04-28 02:35:28 +0000 |
| commit | 59b8a68f3d000a8e04836dbac1d091a0f3a61866 (patch) | |
| tree | f0d4f90de8b77f254eea58358e913cea959de4d0 | |
| parent | b63fa641d6804cef00b89b2c4a84081ede2c61f5 (diff) | |
| download | FreeBSD-src-59b8a68f3d000a8e04836dbac1d091a0f3a61866.zip FreeBSD-src-59b8a68f3d000a8e04836dbac1d091a0f3a61866.tar.gz | |
Don't use multiprocessing-extensions instruction on processors that don't
support SMP.
Submitted by: loos@
Pointy hat to: me
| -rw-r--r-- | sys/arm/arm/cpufunc_asm_armv7.S | 4 |
1 files changed, 4 insertions, 0 deletions
diff --git a/sys/arm/arm/cpufunc_asm_armv7.S b/sys/arm/arm/cpufunc_asm_armv7.S index 507c532..45f4593 100644 --- a/sys/arm/arm/cpufunc_asm_armv7.S +++ b/sys/arm/arm/cpufunc_asm_armv7.S @@ -251,7 +251,11 @@ ENTRY(armv7_idcache_wbinv_range) END(armv7_idcache_wbinv_range) ENTRY_NP(armv7_icache_sync_all) +#ifdef SMP mcr p15, 0, r0, c7, c1, 0 /* Invalidate all I cache to PoU Inner Shareable */ +#else + mcr p15, 0, r0, c7, c5, 0 /* Invalidate all I cache to PoU (ICIALLU) */ +#endif isb /* instruction synchronization barrier */ dsb /* data synchronization barrier */ RET |
