diff options
author | ian <ian@FreeBSD.org> | 2014-04-27 20:16:51 +0000 |
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committer | ian <ian@FreeBSD.org> | 2014-04-27 20:16:51 +0000 |
commit | 51847f783b9fa00093efadac8a94e83272aad650 (patch) | |
tree | 399eff5fb954f5989d4ea00019ab828dcd86f4bf | |
parent | 1108de8c6be9c507e416ee3c8c6f69cf5e0fb268 (diff) | |
download | FreeBSD-src-51847f783b9fa00093efadac8a94e83272aad650.zip FreeBSD-src-51847f783b9fa00093efadac8a94e83272aad650.tar.gz |
Flush and invalidate caches on each CPU as part of handling IPI_STOP.
Flushing the caches is required before doing a panic dump, but ARM
doesn't provide a flavor of flush that gets broadcast to other cores.
However, all cores except one are stopped before doing a dump, so this
works around the lack of a global flush/invalidate by doing it locally
on each CPU as part of stopping.
Discussed with: cognet@
-rw-r--r-- | sys/arm/arm/minidump_machdep.c | 10 | ||||
-rw-r--r-- | sys/arm/arm/mp_machdep.c | 14 |
2 files changed, 23 insertions, 1 deletions
diff --git a/sys/arm/arm/minidump_machdep.c b/sys/arm/arm/minidump_machdep.c index 69c82f8..85ea282 100644 --- a/sys/arm/arm/minidump_machdep.c +++ b/sys/arm/arm/minidump_machdep.c @@ -210,7 +210,15 @@ minidumpsys(struct dumperinfo *di) int i, k, bit, error; char *addr; - /* Flush cache */ + /* + * Flush caches. Note that in the SMP case this operates only on the + * current CPU's L1 cache. Before we reach this point, code in either + * the system shutdown or kernel debugger has called stop_cpus() to stop + * all cores other than this one. Part of the ARM handling of + * stop_cpus() is to call wbinv_all() on that core's local L1 cache. So + * by time we get to here, all that remains is to flush the L1 for the + * current CPU, then the L2. + */ cpu_idcache_wbinv_all(); cpu_l2cache_wbinv_all(); diff --git a/sys/arm/arm/mp_machdep.c b/sys/arm/arm/mp_machdep.c index 141f2db..6b16ad3 100644 --- a/sys/arm/arm/mp_machdep.c +++ b/sys/arm/arm/mp_machdep.c @@ -44,6 +44,7 @@ __FBSDID("$FreeBSD$"); #include <vm/pmap.h> #include <machine/cpu.h> +#include <machine/cpufunc.h> #include <machine/smp.h> #include <machine/pcb.h> #include <machine/pte.h> @@ -286,6 +287,19 @@ ipi_handler(void *arg) savectx(&stoppcbs[cpu]); + /* + * CPUs are stopped when entering the debugger and at + * system shutdown, both events which can precede a + * panic dump. For the dump to be correct, all caches + * must be flushed and invalidated, but on ARM there's + * no way to broadcast a wbinv_all to other cores. + * Instead, we have each core do the local wbinv_all as + * part of stopping the core. The core requesting the + * stop will do the l2 cache flush after all other cores + * have done their l1 flushes and stopped. + */ + cpu_idcache_wbinv_all(); + /* Indicate we are stopped */ CPU_SET_ATOMIC(cpu, &stopped_cpus); |