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author | jhb <jhb@FreeBSD.org> | 2016-12-16 01:06:35 +0000 |
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committer | jhb <jhb@FreeBSD.org> | 2016-12-16 01:06:35 +0000 |
commit | f7b0e665026f84b3348186f5c033a1b9db26cf74 (patch) | |
tree | 119221faed100d08385536bcf40452a4ab3831b5 | |
parent | 9190d308c6ce5975cdce04e779bcded024a3ecde (diff) | |
download | FreeBSD-src-f7b0e665026f84b3348186f5c033a1b9db26cf74.zip FreeBSD-src-f7b0e665026f84b3348186f5c033a1b9db26cf74.tar.gz |
MFC 308690: Sync instruction cache's after writing user breakpoints on MIPS.
Add an implementation for pmaps_sync_icache() on MIPS that sync's the
instruction cache on all CPUs via smp_rendezvous() after a debugger
inserts a breakpoint via ptrace(PT_IO).
-rw-r--r-- | sys/mips/mips/pmap.c | 14 |
1 files changed, 10 insertions, 4 deletions
diff --git a/sys/mips/mips/pmap.c b/sys/mips/mips/pmap.c index caee47c..7745588 100644 --- a/sys/mips/mips/pmap.c +++ b/sys/mips/mips/pmap.c @@ -74,11 +74,7 @@ __FBSDID("$FreeBSD$"); #include <sys/proc.h> #include <sys/rwlock.h> #include <sys/sched.h> -#ifdef SMP #include <sys/smp.h> -#else -#include <sys/cpuset.h> -#endif #include <sys/sysctl.h> #include <sys/vmmeter.h> @@ -3203,9 +3199,19 @@ pmap_activate(struct thread *td) critical_exit(); } +static void +pmap_sync_icache_one(void *arg __unused) +{ + + mips_icache_sync_all(); + mips_dcache_wbinv_all(); +} + void pmap_sync_icache(pmap_t pm, vm_offset_t va, vm_size_t sz) { + + smp_rendezvous(NULL, pmap_sync_icache_one, NULL, NULL); } /* |