summaryrefslogtreecommitdiffstats
diff options
context:
space:
mode:
authorraj <raj@FreeBSD.org>2012-05-26 13:36:18 +0000
committerraj <raj@FreeBSD.org>2012-05-26 13:36:18 +0000
commit8c2ef762a7721f74d75545435d90e9302cd27153 (patch)
tree69cd15ec6995d58485b3c3ecb2b7eab41b73ae6d
parent0557f549f63d60498a0871800e75eac0fab41108 (diff)
downloadFreeBSD-src-8c2ef762a7721f74d75545435d90e9302cd27153.zip
FreeBSD-src-8c2ef762a7721f74d75545435d90e9302cd27153.tar.gz
Rename e500 prefix to match other Book-E CPU variations. CPU id tidbits for
the new cores. Obtained from: Freescale, Semihalf.
-rw-r--r--sys/powerpc/booke/machdep.c9
-rw-r--r--sys/powerpc/booke/platform_bare.c9
-rw-r--r--sys/powerpc/powerpc/cpu.c22
3 files changed, 25 insertions, 15 deletions
diff --git a/sys/powerpc/booke/machdep.c b/sys/powerpc/booke/machdep.c
index 82a37e1..436cf06 100644
--- a/sys/powerpc/booke/machdep.c
+++ b/sys/powerpc/booke/machdep.c
@@ -185,8 +185,8 @@ SYSCTL_INT(_machdep, CPU_CACHELINE, cacheline_size,
int hw_direct_map = 0;
-static void cpu_e500_startup(void *);
-SYSINIT(cpu, SI_SUB_CPU, SI_ORDER_FIRST, cpu_e500_startup, NULL);
+static void cpu_booke_startup(void *);
+SYSINIT(cpu, SI_SUB_CPU, SI_ORDER_FIRST, cpu_booke_startup, NULL);
void print_kernel_section_addr(void);
void print_kenv(void);
@@ -195,7 +195,7 @@ u_int booke_init(uint32_t, uint32_t);
extern int elf32_nxstack;
static void
-cpu_e500_startup(void *dummy)
+cpu_booke_startup(void *dummy)
{
int indx, size;
@@ -538,7 +538,8 @@ cpu_halt(void)
{
mtmsr(mfmsr() & ~(PSL_CE | PSL_EE | PSL_ME | PSL_DE));
- while (1);
+ while (1)
+ ;
}
int
diff --git a/sys/powerpc/booke/platform_bare.c b/sys/powerpc/booke/platform_bare.c
index 58fbb7f..02d0f87 100644
--- a/sys/powerpc/booke/platform_bare.c
+++ b/sys/powerpc/booke/platform_bare.c
@@ -73,7 +73,7 @@ static int bare_smp_next_cpu(platform_t, struct cpuref *cpuref);
static int bare_smp_get_bsp(platform_t, struct cpuref *cpuref);
static int bare_smp_start_cpu(platform_t, struct pcpu *cpu);
-static void e500_reset(platform_t);
+static void booke_reset(platform_t);
static platform_method_t bare_methods[] = {
PLATFORMMETHOD(platform_probe, bare_probe),
@@ -85,7 +85,7 @@ static platform_method_t bare_methods[] = {
PLATFORMMETHOD(platform_smp_get_bsp, bare_smp_get_bsp),
PLATFORMMETHOD(platform_smp_start_cpu, bare_smp_start_cpu),
- PLATFORMMETHOD(platform_reset, e500_reset),
+ PLATFORMMETHOD(platform_reset, booke_reset),
{ 0, 0 }
};
@@ -307,7 +307,7 @@ bare_smp_start_cpu(platform_t plat, struct pcpu *pc)
}
static void
-e500_reset(platform_t plat)
+booke_reset(platform_t plat)
{
/*
@@ -328,6 +328,7 @@ e500_reset(platform_t plat)
mtspr(SPR_DBCR0, mfspr(SPR_DBCR0) | DBCR0_IDM | DBCR0_RST_SYSTEM);
printf("Reset failed...\n");
- while (1);
+ while (1)
+ ;
}
diff --git a/sys/powerpc/powerpc/cpu.c b/sys/powerpc/powerpc/cpu.c
index 9701156..cd09cf4 100644
--- a/sys/powerpc/powerpc/cpu.c
+++ b/sys/powerpc/powerpc/cpu.c
@@ -75,13 +75,13 @@
#include <machine/spr.h>
static void cpu_6xx_setup(int cpuid, uint16_t vers);
-static void cpu_e500_setup(int cpuid, uint16_t vers);
static void cpu_970_setup(int cpuid, uint16_t vers);
+static void cpu_booke_setup(int cpuid, uint16_t vers);
int powerpc_pow_enabled;
void (*cpu_idle_hook)(void) = NULL;
static void cpu_idle_60x(void);
-static void cpu_idle_e500(void);
+static void cpu_idle_booke(void);
struct cputab {
const char *name;
@@ -146,9 +146,13 @@ static const struct cputab models[] = {
{ "Motorola PowerPC 8245", MPC8245, REVFMT_MAJMIN,
PPC_FEATURE_HAS_FPU, cpu_6xx_setup },
{ "Freescale e500v1 core", FSL_E500v1, REVFMT_MAJMIN,
- 0, cpu_e500_setup },
+ 0, cpu_booke_setup },
{ "Freescale e500v2 core", FSL_E500v2, REVFMT_MAJMIN,
- 0, cpu_e500_setup },
+ 0, cpu_booke_setup },
+ { "Freescale e500mc core", FSL_E500mc, REVFMT_MAJMIN,
+ 0, cpu_booke_setup },
+ { "Freescale e5500 core", FSL_E5500, REVFMT_MAJMIN,
+ 0, cpu_booke_setup },
{ "IBM Cell Broadband Engine", IBMCELLBE, REVFMT_MAJMIN,
PPC_FEATURE_64 | PPC_FEATURE_HAS_ALTIVEC | PPC_FEATURE_HAS_FPU,
NULL},
@@ -191,6 +195,8 @@ cpu_setup(u_int cpuid)
break;
case FSL_E500v1:
case FSL_E500v2:
+ case FSL_E500mc:
+ case FSL_E5500:
maj = (pvr >> 4) & 0xf;
min = (pvr >> 0) & 0xf;
break;
@@ -438,7 +444,7 @@ cpu_6xx_print_cacheinfo(u_int cpuid, uint16_t vers)
}
static void
-cpu_e500_setup(int cpuid, uint16_t vers)
+cpu_booke_setup(int cpuid, uint16_t vers)
{
register_t hid0;
@@ -453,7 +459,7 @@ cpu_e500_setup(int cpuid, uint16_t vers)
printf("cpu%d: HID0 %b\n", cpuid, (int)hid0, HID0_E500_BITMASK);
if (cpu_idle_hook == NULL)
- cpu_idle_hook = cpu_idle_e500;
+ cpu_idle_hook = cpu_idle_booke;
}
static void
@@ -519,6 +525,7 @@ cpu_idle(int busy)
CTR2(KTR_SPARE2, "cpu_idle(%d) at %d",
busy, curcpu);
+
if (cpu_idle_hook != NULL) {
if (!busy) {
critical_enter();
@@ -530,6 +537,7 @@ cpu_idle(int busy)
critical_exit();
}
}
+
CTR2(KTR_SPARE2, "cpu_idle(%d) at %d done",
busy, curcpu);
}
@@ -576,7 +584,7 @@ cpu_idle_60x(void)
}
static void
-cpu_idle_e500(void)
+cpu_idle_booke(void)
{
register_t msr;
OpenPOWER on IntegriCloud