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| author | adrian <adrian@FreeBSD.org> | 2012-05-25 16:45:56 +0000 |
|---|---|---|
| committer | adrian <adrian@FreeBSD.org> | 2012-05-25 16:45:56 +0000 |
| commit | 6361d7f3de162ee6e2e96de08eee9dcb7133f84c (patch) | |
| tree | 1cd92cb2d309827497a4bef25c4c9365b7c4bbf9 | |
| parent | a7255af2709911e7f975abeab9151f5890aeb008 (diff) | |
| download | FreeBSD-src-6361d7f3de162ee6e2e96de08eee9dcb7133f84c.zip FreeBSD-src-6361d7f3de162ee6e2e96de08eee9dcb7133f84c.tar.gz | |
* According to the reference code, AR_WA_D3_L1_DISBABLE is bit 14.
* Add some other WAR bits (very usefully described too) in preparation for
porting over some suspend/resume fixes from ath9k/Atheros.
Obtained from: Qualcomm Atheros
| -rw-r--r-- | sys/dev/ath/ath_hal/ar5416/ar5416reg.h | 6 |
1 files changed, 5 insertions, 1 deletions
diff --git a/sys/dev/ath/ath_hal/ar5416/ar5416reg.h b/sys/dev/ath/ath_hal/ar5416/ar5416reg.h index f8e897d..ea1a9cd 100644 --- a/sys/dev/ath/ath_hal/ar5416/ar5416reg.h +++ b/sys/dev/ath/ath_hal/ar5416/ar5416reg.h @@ -253,11 +253,15 @@ #define AR_MAC_LED_ASSOC_PEND 0x2 /* STA is trying to associate */ #define AR_MAC_LED_ASSOC_S 10 +#define AR_WA_BIT6 0x00000040 +#define AR_WA_BIT7 0x00000080 +#define AR_WA_D3_L1_DISABLE 0x00004000 /* */ #define AR_WA_UNTIE_RESET_EN 0x00008000 /* ena PCI reset to POR */ #define AR_WA_RESET_EN 0x00040000 /* ena AR_WA_UNTIE_RESET_EN */ #define AR_WA_ANALOG_SHIFT 0x00100000 #define AR_WA_POR_SHORT 0x00200000 /* PCIE phy reset control */ -#define AR_WA_D3_L1_DISABLE 0x00800000 /* bit 23 */ +#define AR_WA_BIT22 0x00400000 +#define AR_WA_BIT23 0x00800000 #define AR_WA_DEFAULT 0x0000073f #define AR9280_WA_DEFAULT 0x0040073b /* disable bit 2, see commit */ |
