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author | andrew <andrew@FreeBSD.org> | 2016-09-16 12:42:36 +0000 |
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committer | andrew <andrew@FreeBSD.org> | 2016-09-16 12:42:36 +0000 |
commit | a16a62fe1aa0882ceec8473ff1ba8fa51bcb3259 (patch) | |
tree | 1767fccf75899a503600cd56c59afdaaa701af2e | |
parent | d7bd0f0c8e5a12e8d04d7be4febc8f3d863fcb8d (diff) | |
download | FreeBSD-src-a16a62fe1aa0882ceec8473ff1ba8fa51bcb3259.zip FreeBSD-src-a16a62fe1aa0882ceec8473ff1ba8fa51bcb3259.tar.gz |
MFC 305546:
When synchronising the instruction and data caches we only need to clean
the data cache to the point of unification. This is the point where the
two caches are unified to a single unified cache so cleaning past here
is just extra unneeded work.
Obtained from: ABT Systems Ltd
Sponsored by: The FreeBSD Foundation
-rw-r--r-- | sys/arm64/arm64/cpufunc_asm.S | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/sys/arm64/arm64/cpufunc_asm.S b/sys/arm64/arm64/cpufunc_asm.S index 49cd6f1..06fc512 100644 --- a/sys/arm64/arm64/cpufunc_asm.S +++ b/sys/arm64/arm64/cpufunc_asm.S @@ -151,5 +151,5 @@ END(arm64_idcache_wbinv_range) * void arm64_icache_sync_range(vm_offset_t, vm_size_t) */ ENTRY(arm64_icache_sync_range) - cache_handle_range dcop = cvac, ic = 1, icop = ivau + cache_handle_range dcop = cvau, ic = 1, icop = ivau END(arm64_icache_sync_range) |