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| author | andrew <andrew@FreeBSD.org> | 2014-03-24 08:24:32 +0000 |
|---|---|---|
| committer | andrew <andrew@FreeBSD.org> | 2014-03-24 08:24:32 +0000 |
| commit | 8e6fa5422863947c95744f1b405aeff5594d158d (patch) | |
| tree | b0bd563106f407d31d35c1a0097ff29dad2dc782 | |
| parent | f1587c22969808e3e17cd276b6cd964f5fa47683 (diff) | |
| download | FreeBSD-src-8e6fa5422863947c95744f1b405aeff5594d158d.zip FreeBSD-src-8e6fa5422863947c95744f1b405aeff5594d158d.tar.gz | |
Move an else case that was missed in r263676
| -rw-r--r-- | sys/arm/include/pmap.h | 50 |
1 files changed, 25 insertions, 25 deletions
diff --git a/sys/arm/include/pmap.h b/sys/arm/include/pmap.h index 4c8f506..70c337a 100644 --- a/sys/arm/include/pmap.h +++ b/sys/arm/include/pmap.h @@ -421,6 +421,31 @@ extern int pmap_needs_pte_sync; #define ARM_L2S_NRML_IWT_OWT (L2_C) #define ARM_L2S_NRML_IWB_OWB (L2_C|L2_B) #define ARM_L2S_NRML_IWBA_OWBA (L2_S_TEX(1)|L2_C|L2_B) +#else +#define ARM_L1S_STRONG_ORD (0) +#define ARM_L1S_DEVICE_NOSHARE (L1_S_TEX(2)) +#define ARM_L1S_DEVICE_SHARE (L1_S_B) +#define ARM_L1S_NRML_NOCACHE (L1_S_TEX(1)|L1_SHARED) +#define ARM_L1S_NRML_IWT_OWT (L1_S_C|L1_SHARED) +#define ARM_L1S_NRML_IWB_OWB (L1_S_C|L1_S_B|L1_SHARED) +#define ARM_L1S_NRML_IWBA_OWBA (L1_S_TEX(1)|L1_S_C|L1_S_B|L1_SHARED) + +#define ARM_L2L_STRONG_ORD (0) +#define ARM_L2L_DEVICE_NOSHARE (L2_L_TEX(2)) +#define ARM_L2L_DEVICE_SHARE (L2_B) +#define ARM_L2L_NRML_NOCACHE (L2_L_TEX(1)|L2_SHARED) +#define ARM_L2L_NRML_IWT_OWT (L2_C|L2_SHARED) +#define ARM_L2L_NRML_IWB_OWB (L2_C|L2_B|L2_SHARED) +#define ARM_L2L_NRML_IWBA_OWBA (L2_L_TEX(1)|L2_C|L2_B|L2_SHARED) + +#define ARM_L2S_STRONG_ORD (0) +#define ARM_L2S_DEVICE_NOSHARE (L2_S_TEX(2)) +#define ARM_L2S_DEVICE_SHARE (L2_B) +#define ARM_L2S_NRML_NOCACHE (L2_S_TEX(1)|L2_SHARED) +#define ARM_L2S_NRML_IWT_OWT (L2_C|L2_SHARED) +#define ARM_L2S_NRML_IWB_OWB (L2_C|L2_B|L2_SHARED) +#define ARM_L2S_NRML_IWBA_OWBA (L2_S_TEX(1)|L2_C|L2_B|L2_SHARED) +#endif /* SMP */ #elif ARM_NMMUS > 1 /* More than one MMU class configured; use variables. */ @@ -462,31 +487,6 @@ extern int pmap_needs_pte_sync; #define L1_C_PROTO L1_C_PROTO_xscale #define L2_S_PROTO L2_S_PROTO_xscale -#else -#define ARM_L1S_STRONG_ORD (0) -#define ARM_L1S_DEVICE_NOSHARE (L1_S_TEX(2)) -#define ARM_L1S_DEVICE_SHARE (L1_S_B) -#define ARM_L1S_NRML_NOCACHE (L1_S_TEX(1)|L1_SHARED) -#define ARM_L1S_NRML_IWT_OWT (L1_S_C|L1_SHARED) -#define ARM_L1S_NRML_IWB_OWB (L1_S_C|L1_S_B|L1_SHARED) -#define ARM_L1S_NRML_IWBA_OWBA (L1_S_TEX(1)|L1_S_C|L1_S_B|L1_SHARED) - -#define ARM_L2L_STRONG_ORD (0) -#define ARM_L2L_DEVICE_NOSHARE (L2_L_TEX(2)) -#define ARM_L2L_DEVICE_SHARE (L2_B) -#define ARM_L2L_NRML_NOCACHE (L2_L_TEX(1)|L2_SHARED) -#define ARM_L2L_NRML_IWT_OWT (L2_C|L2_SHARED) -#define ARM_L2L_NRML_IWB_OWB (L2_C|L2_B|L2_SHARED) -#define ARM_L2L_NRML_IWBA_OWBA (L2_L_TEX(1)|L2_C|L2_B|L2_SHARED) - -#define ARM_L2S_STRONG_ORD (0) -#define ARM_L2S_DEVICE_NOSHARE (L2_S_TEX(2)) -#define ARM_L2S_DEVICE_SHARE (L2_B) -#define ARM_L2S_NRML_NOCACHE (L2_S_TEX(1)|L2_SHARED) -#define ARM_L2S_NRML_IWT_OWT (L2_C|L2_SHARED) -#define ARM_L2S_NRML_IWB_OWB (L2_C|L2_B|L2_SHARED) -#define ARM_L2S_NRML_IWBA_OWBA (L2_S_TEX(1)|L2_C|L2_B|L2_SHARED) -#endif /* SMP */ #endif /* ARM_NMMUS > 1 */ #if defined(CPU_XSCALE_81342) || ARM_ARCH_6 || ARM_ARCH_7A |
