diff options
author | dim <dim@FreeBSD.org> | 2014-12-09 20:41:51 +0000 |
---|---|---|
committer | dim <dim@FreeBSD.org> | 2014-12-09 20:41:51 +0000 |
commit | 645e043040af84c39010eb40c4050ba0174159c7 (patch) | |
tree | 4d2e9e9cc8d5593a9402d78c7e8343d1e2748105 | |
parent | 55681de4131f04d341a7652664a1adca3710fda2 (diff) | |
download | FreeBSD-src-645e043040af84c39010eb40c4050ba0174159c7.zip FreeBSD-src-645e043040af84c39010eb40c4050ba0174159c7.tar.gz |
Pull in r223147, r223255 and r223390 from upstream llvm trunk (by Roman
Divacky):
Introduce CPUStringIsValid() into MCSubtargetInfo and use it for ARM
.cpu parsing.
Previously .cpu directive in ARM assembler didnt switch to the new
CPU and therefore acted as a nop. This implemented real action for
.cpu and eg. allows to assembler FreeBSD kernel with -integrated-as.
Change the name to be in style.
Add a FIXME as requested by Renato Golin.
-rw-r--r-- | contrib/llvm/include/llvm/MC/MCSubtargetInfo.h | 9 | ||||
-rw-r--r-- | contrib/llvm/lib/Target/ARM/AsmParser/ARMAsmParser.cpp | 14 |
2 files changed, 23 insertions, 0 deletions
diff --git a/contrib/llvm/include/llvm/MC/MCSubtargetInfo.h b/contrib/llvm/include/llvm/MC/MCSubtargetInfo.h index 088c5e7..ebcfee9 100644 --- a/contrib/llvm/include/llvm/MC/MCSubtargetInfo.h +++ b/contrib/llvm/include/llvm/MC/MCSubtargetInfo.h @@ -132,6 +132,15 @@ public: /// Initialize an InstrItineraryData instance. void initInstrItins(InstrItineraryData &InstrItins) const; + + /// Check whether the CPU string is valid. + bool isCPUStringValid(StringRef CPU) { + auto Found = std::find_if(ProcDesc.begin(), ProcDesc.end(), + [=](const SubtargetFeatureKV &KV) { + return CPU == KV.Key; + }); + return Found != ProcDesc.end(); + } }; } // End llvm namespace diff --git a/contrib/llvm/lib/Target/ARM/AsmParser/ARMAsmParser.cpp b/contrib/llvm/lib/Target/ARM/AsmParser/ARMAsmParser.cpp index a8abf23..be3b9d4 100644 --- a/contrib/llvm/lib/Target/ARM/AsmParser/ARMAsmParser.cpp +++ b/contrib/llvm/lib/Target/ARM/AsmParser/ARMAsmParser.cpp @@ -8618,6 +8618,20 @@ bool ARMAsmParser::parseDirectiveEabiAttr(SMLoc L) { bool ARMAsmParser::parseDirectiveCPU(SMLoc L) { StringRef CPU = getParser().parseStringToEndOfStatement().trim(); getTargetStreamer().emitTextAttribute(ARMBuildAttrs::CPU_name, CPU); + + if (!STI.isCPUStringValid(CPU)) { + Error(L, "Unknown CPU name"); + return false; + } + + // FIXME: This switches the CPU features globally, therefore it might + // happen that code you would not expect to assemble will. For details + // see: http://llvm.org/bugs/show_bug.cgi?id=20757 + STI.InitMCProcessorInfo(CPU, ""); + STI.InitCPUSchedModel(CPU); + unsigned FB = ComputeAvailableFeatures(STI.getFeatureBits()); + setAvailableFeatures(FB); + return false; } |