diff options
| author | netchild <netchild@FreeBSD.org> | 2006-09-30 17:52:28 +0000 |
|---|---|---|
| committer | netchild <netchild@FreeBSD.org> | 2006-09-30 17:52:28 +0000 |
| commit | a52ecbfb916c6ac4496bfb1f72aacb9dc4a873fb (patch) | |
| tree | 04039141db4f71ca4db0332d18d68b3e99b2dd40 | |
| parent | c48eb35aeee6708c74f541082432978b8df279a0 (diff) | |
| download | FreeBSD-src-a52ecbfb916c6ac4496bfb1f72aacb9dc4a873fb.zip FreeBSD-src-a52ecbfb916c6ac4496bfb1f72aacb9dc4a873fb.tar.gz | |
Driver for Envy24HT (ICE1724 or VT1724)-based cards like
Terratec Aureon 7.1 Space: tested
Terratec Aureon 5.1 Sky: tested
Terratec PHASE 28: tested
Terratec Aureon 7.1 Universe: tested
Audiotrak Prodigy 7.1: tested
Audiotrak Prodigy 7.1 LT: not tested
Terratec PHASE 22: not tested
M-Audio Revolution 7.1: not tested
M-Audio Revolution 5.1: not tested
M-Audio Audiophile 192: tested
Submitted by: "Konstantin Dimitrov" <kosio.dimitrov@gmail.com>
| -rw-r--r-- | sys/dev/sound/pci/envy24ht.c | 1514 | ||||
| -rw-r--r-- | sys/dev/sound/pci/envy24ht.h | 561 |
2 files changed, 889 insertions, 1186 deletions
diff --git a/sys/dev/sound/pci/envy24ht.c b/sys/dev/sound/pci/envy24ht.c index 227c178..49c5dbe 100644 --- a/sys/dev/sound/pci/envy24ht.c +++ b/sys/dev/sound/pci/envy24ht.c @@ -1,4 +1,5 @@ /* + * Copyright (c) 2006 Konstantin Dimitrov <kosio.dimitrov@gmail.com> * Copyright (c) 2001 Katsurajima Naoto <raven@katsurajima.seya.yokohama.jp> * All rights reserved. * @@ -20,7 +21,7 @@ * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHERIN CONTRACT, STRICT * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY - * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THEPOSSIBILITY OF + * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF * SUCH DAMAGE. * * $FreeBSD$ @@ -28,37 +29,37 @@ #include <dev/sound/pcm/sound.h> #include <dev/sound/pcm/ac97.h> -#include <dev/sound/pci/ak452x.h> -#include <dev/sound/pci/envy24.h> +#include <dev/sound/pci/spicds.h> +#include <dev/sound/pci/envy24ht.h> #include <dev/pci/pcireg.h> #include <dev/pci/pcivar.h> #include "mixer_if.h" -MALLOC_DEFINE(M_ENVY24, "envy24", "envy24 audio"); +MALLOC_DEFINE(M_ENVY24HT, "envy24ht", "envy24ht audio"); /* -------------------------------------------------------------------- */ struct sc_info; -#define ENVY24_PLAY_CHNUM 10 -#define ENVY24_REC_CHNUM 12 -#define ENVY24_PLAY_BUFUNIT (4 /* byte/sample */ * 10 /* channel */) -#define ENVY24_REC_BUFUNIT (4 /* byte/sample */ * 12 /* channel */) -#define ENVY24_SAMPLE_NUM 4096 +#define ENVY24HT_PLAY_CHNUM 8 +#define ENVY24HT_REC_CHNUM 2 +#define ENVY24HT_PLAY_BUFUNIT (4 /* byte/sample */ * 8 /* channel */) +#define ENVY24HT_REC_BUFUNIT (4 /* byte/sample */ * 2 /* channel */) +#define ENVY24HT_SAMPLE_NUM 4096 -#define ENVY24_TIMEOUT 1000 +#define ENVY24HT_TIMEOUT 1000 -#define ENVY24_DEFAULT_FORMAT (AFMT_STEREO | AFMT_S16_LE) +#define ENVY24HT_DEFAULT_FORMAT (AFMT_STEREO | AFMT_S16_LE) -#define ENVY24_NAMELEN 32 +#define ENVY24HT_NAMELEN 32 -struct envy24_sample { +struct envy24ht_sample { volatile u_int32_t buffer; }; -typedef struct envy24_sample sample32_t; +typedef struct envy24ht_sample sample32_t; /* channel registers */ struct sc_chinfo { @@ -99,9 +100,9 @@ struct cfg_info { char *name; u_int16_t subvendor, subdevice; u_int8_t scfg, acl, i2s, spdif; - u_int8_t gpiomask, gpiostate, gpiodir; - u_int8_t cdti, cclk, cs, cif, type; - u_int8_t free; + u_int32_t gpiomask, gpiostate, gpiodir; + u_int32_t cdti, cclk, cs; + u_int8_t cif, type, free; struct codec_entry *codec; }; @@ -115,16 +116,6 @@ struct sc_info { int csid; bus_space_tag_t cst; bus_space_handle_t csh; - /* DDMA registor */ - struct resource *ddma; - int ddmaid; - bus_space_tag_t ddmat; - bus_space_handle_t ddmah; - /* Consumer Section DMA Channel Registers */ - struct resource *ds; - int dsid; - bus_space_tag_t dst; - bus_space_handle_t dsh; /* MultiTrack registor */ struct resource *mt; int mtid; @@ -146,8 +137,8 @@ struct sc_info { /* mixer control data */ u_int32_t src; - u_int8_t left[ENVY24_CHAN_NUM]; - u_int8_t right[ENVY24_CHAN_NUM]; + u_int8_t left[ENVY24HT_CHAN_NUM]; + u_int8_t right[ENVY24HT_CHAN_NUM]; /* Play/Record DMA fifo */ sample32_t *pbuf; @@ -174,34 +165,34 @@ struct sc_info { */ /* DMA emulator */ -static void envy24_p8u(struct sc_chinfo *); -static void envy24_p16sl(struct sc_chinfo *); -static void envy24_p32sl(struct sc_chinfo *); -static void envy24_r16sl(struct sc_chinfo *); -static void envy24_r32sl(struct sc_chinfo *); +static void envy24ht_p8u(struct sc_chinfo *); +static void envy24ht_p16sl(struct sc_chinfo *); +static void envy24ht_p32sl(struct sc_chinfo *); +static void envy24ht_r16sl(struct sc_chinfo *); +static void envy24ht_r32sl(struct sc_chinfo *); /* channel interface */ -static void *envy24chan_init(kobj_t, void *, struct snd_dbuf *, struct pcm_channel *, int); -static int envy24chan_setformat(kobj_t, void *, u_int32_t); -static int envy24chan_setspeed(kobj_t, void *, u_int32_t); -static int envy24chan_setblocksize(kobj_t, void *, u_int32_t); -static int envy24chan_trigger(kobj_t, void *, int); -static int envy24chan_getptr(kobj_t, void *); -static struct pcmchan_caps *envy24chan_getcaps(kobj_t, void *); +static void *envy24htchan_init(kobj_t, void *, struct snd_dbuf *, struct pcm_channel *, int); +static int envy24htchan_setformat(kobj_t, void *, u_int32_t); +static int envy24htchan_setspeed(kobj_t, void *, u_int32_t); +static int envy24htchan_setblocksize(kobj_t, void *, u_int32_t); +static int envy24htchan_trigger(kobj_t, void *, int); +static int envy24htchan_getptr(kobj_t, void *); +static struct pcmchan_caps *envy24htchan_getcaps(kobj_t, void *); /* mixer interface */ -static int envy24mixer_init(struct snd_mixer *); -static int envy24mixer_reinit(struct snd_mixer *); -static int envy24mixer_uninit(struct snd_mixer *); -static int envy24mixer_set(struct snd_mixer *, unsigned, unsigned, unsigned); -static u_int32_t envy24mixer_setrecsrc(struct snd_mixer *, u_int32_t); - -/* M-Audio Delta series AK4524 access interface */ -static void *envy24_delta_ak4524_create(device_t, void *, int, int); -static void envy24_delta_ak4524_destroy(void *); -static void envy24_delta_ak4524_init(void *); -static void envy24_delta_ak4524_reinit(void *); -static void envy24_delta_ak4524_setvolume(void *, int, unsigned int, unsigned int); +static int envy24htmixer_init(struct snd_mixer *); +static int envy24htmixer_reinit(struct snd_mixer *); +static int envy24htmixer_uninit(struct snd_mixer *); +static int envy24htmixer_set(struct snd_mixer *, unsigned, unsigned, unsigned); +static u_int32_t envy24htmixer_setrecsrc(struct snd_mixer *, u_int32_t); + +/* SPI codec access interface */ +static void *envy24ht_spi_create(device_t, void *, int, int); +static void envy24ht_spi_destroy(void *); +static void envy24ht_spi_init(void *); +static void envy24ht_spi_reinit(void *); +static void envy24ht_spi_setvolume(void *, int, unsigned int, unsigned int); /* -------------------------------------------------------------------- */ @@ -210,22 +201,22 @@ static void envy24_delta_ak4524_setvolume(void *, int, unsigned int, unsigned in */ /* API -> hardware channel map */ -static unsigned envy24_chanmap[ENVY24_CHAN_NUM] = { - ENVY24_CHAN_PLAY_SPDIF, /* 0 */ - ENVY24_CHAN_PLAY_DAC1, /* 1 */ - ENVY24_CHAN_PLAY_DAC2, /* 2 */ - ENVY24_CHAN_PLAY_DAC3, /* 3 */ - ENVY24_CHAN_PLAY_DAC4, /* 4 */ - ENVY24_CHAN_REC_MIX, /* 5 */ - ENVY24_CHAN_REC_SPDIF, /* 6 */ - ENVY24_CHAN_REC_ADC1, /* 7 */ - ENVY24_CHAN_REC_ADC2, /* 8 */ - ENVY24_CHAN_REC_ADC3, /* 9 */ - ENVY24_CHAN_REC_ADC4, /* 10 */ +static unsigned envy24ht_chanmap[ENVY24HT_CHAN_NUM] = { + ENVY24HT_CHAN_PLAY_DAC1, /* 1 */ + ENVY24HT_CHAN_PLAY_DAC2, /* 2 */ + ENVY24HT_CHAN_PLAY_DAC3, /* 3 */ + ENVY24HT_CHAN_PLAY_DAC4, /* 4 */ + ENVY24HT_CHAN_PLAY_SPDIF, /* 0 */ + ENVY24HT_CHAN_REC_MIX, /* 5 */ + ENVY24HT_CHAN_REC_SPDIF, /* 6 */ + ENVY24HT_CHAN_REC_ADC1, /* 7 */ + ENVY24HT_CHAN_REC_ADC2, /* 8 */ + ENVY24HT_CHAN_REC_ADC3, /* 9 */ + ENVY24HT_CHAN_REC_ADC4, /* 10 */ }; /* mixer -> API channel map. see above */ -static int envy24_mixmap[] = { +static int envy24ht_mixmap[] = { -1, /* Master output level. It is depend on codec support */ -1, /* Treble level of all output channels */ -1, /* Bass level of all output channels */ @@ -254,92 +245,155 @@ static int envy24_mixmap[] = { }; /* variable rate audio */ -static u_int32_t envy24_speed[] = { +static u_int32_t envy24ht_speed[] = { 96000, 88200, 64000, 48000, 44100, 32000, 24000, 22050, 16000, 12000, 11025, 9600, 8000, 0 }; /* known boards configuration */ -static struct codec_entry delta_codec = { - envy24_delta_ak4524_create, - envy24_delta_ak4524_destroy, - envy24_delta_ak4524_init, - envy24_delta_ak4524_reinit, - envy24_delta_ak4524_setvolume, +static struct codec_entry spi_codec = { + envy24ht_spi_create, + envy24ht_spi_destroy, + envy24ht_spi_init, + envy24ht_spi_reinit, + envy24ht_spi_setvolume, NULL, /* setrate */ }; static struct cfg_info cfg_table[] = { { - "Envy24 audio (M Audio Delta Dio 2496)", - 0x1412, 0xd631, - 0x10, 0x80, 0xf0, 0x03, - 0xff, 0x00, 0x00, - 0x10, 0x20, 0x40, 0x00, 0x00, - 0x00, - &delta_codec, + "Envy24HT audio (Terratec Aureon 7.1 Space)", + 0x153b, 0x1145, + 0x0b, 0x80, 0xfc, 0xc3, + 0x21efff, 0x7fffff, 0x5e1000, + 0x40000, 0x80000, 0x1000, 0x00, 0x02, + 0, + &spi_codec, }, + { + "Envy24HT audio (Terratec Aureon 5.1 Sky)", + 0x153b, 0x1147, + 0x0a, 0x80, 0xfc, 0xc3, + 0x21efff, 0x7fffff, 0x5e1000, + 0x40000, 0x80000, 0x1000, 0x00, 0x02, + 0, + &spi_codec, + }, + { + "Envy24HT audio (Terratec Aureon 7.1 Universe)", + 0x153b, 0x1153, + 0x0b, 0x80, 0xfc, 0xc3, + 0x21efff, 0x7fffff, 0x5e1000, + 0x40000, 0x80000, 0x1000, 0x00, 0x02, + 0, + &spi_codec, + }, + { + "Envy24HT audio (AudioTrak Prodigy 7.1)", + 0x4933, 0x4553, + 0x0b, 0x80, 0xfc, 0xc3, + 0x21efff, 0x7fffff, 0x5e1000, + 0x40000, 0x80000, 0x1000, 0x00, 0x02, + 0, + &spi_codec, + }, + { + "Envy24HT audio (Terratec PHASE 28)", + 0x153b, 0x1149, + 0x0b, 0x80, 0xfc, 0xc3, + 0x21efff, 0x7fffff, 0x5e1000, + 0x40000, 0x80000, 0x1000, 0x00, 0x02, + 0, + &spi_codec, + }, + { + "Envy24HT audio (Terratec PHASE 22)", + 0x153b, 0x1150, + 0x10, 0x80, 0xf0, 0xc3, + 0x7ffbc7, 0x7fffff, 0x438, + 0x20, 0x10, 0x400, 0x00, 0x00, + 0, + &spi_codec, + }, + { + "Envy24HT audio (AudioTrak Prodigy 7.1 LT)", + 0x3132, 0x4154, + 0x0b, 0x80, 0xfc, 0xc3, + 0x7ff8ff, 0x7fffff, 0x700, + 0x400, 0x200, 0x100, 0x00, 0x02, + 0, + &spi_codec, + }, + { + "Envy24HT audio (M-Audio Revolution 7.1)", + 0x1412, 0x3630, + 0x43, 0x80, 0xf8, 0xc1, + 0x3fff85, 0x72, 0x4000fa, + 0x08, 0x02, 0x20, 0x00, 0x04, + 0, + &spi_codec, + }, + { + "Envy24HT audio (M-Audio Revolution 5.1)", + 0x1412, 0x3631, + 0x42, 0x80, 0xf8, 0xc1, + 0x3fff85, 0x72, 0x4000fa, + 0x08, 0x02, 0x20, 0x00, 0x03, + 0, + &spi_codec, + }, + { + "Envy24HT audio (M-Audio Audiophile 192)", + 0x1412, 0x3632, + 0x68, 0x80, 0xf8, 0xc3, + 0x45, 0x4000b5, 0x7fffba, + 0x08, 0x02, 0x10, 0x00, 0x03, + 0, + &spi_codec, + }, { - "Envy24 audio (Terratec DMX 6fire)", - 0x153b, 0x1138, - 0x2f, 0x80, 0xf0, 0x03, - 0xc0, 0xff, 0x7f, - 0x10, 0x20, 0x01, 0x01, 0x00, - 0x00, - &delta_codec, - }, - { - "Envy24 audio (M Audio Audiophile 2496)", - 0x1412, 0xd634, - 0x10, 0x80, 0x72, 0x03, - 0x04, 0xfe, 0xfb, - 0x08, 0x02, 0x20, 0x00, 0x01, - 0x00, - &delta_codec, - }, - { - "Envy24 audio (Generic)", + "Envy24HT audio (Generic)", 0, 0, - 0x0f, 0x00, 0x01, 0x03, - 0xff, 0x00, 0x00, - 0x10, 0x20, 0x40, 0x00, 0x00, - 0x00, - &delta_codec, /* default codec routines */ + 0x0b, 0x80, 0xfc, 0xc3, + 0x21efff, 0x7fffff, 0x5e1000, + 0x40000, 0x80000, 0x1000, 0x00, 0x02, + 0, + &spi_codec, /* default codec routines */ } }; -static u_int32_t envy24_recfmt[] = { +static u_int32_t envy24ht_recfmt[] = { AFMT_STEREO | AFMT_S16_LE, AFMT_STEREO | AFMT_S32_LE, 0 }; -static struct pcmchan_caps envy24_reccaps = {8000, 96000, envy24_recfmt, 0}; +static struct pcmchan_caps envy24ht_reccaps = {8000, 96000, envy24ht_recfmt, 0}; -static u_int32_t envy24_playfmt[] = { +static u_int32_t envy24ht_playfmt[] = { AFMT_STEREO | AFMT_U8, AFMT_STEREO | AFMT_S16_LE, AFMT_STEREO | AFMT_S32_LE, 0 }; -static struct pcmchan_caps envy24_playcaps = {8000, 96000, envy24_playfmt, 0}; +static struct pcmchan_caps envy24ht_playcaps = {8000, 96000, envy24ht_playfmt, 0}; -struct envy24_emldma { +struct envy24ht_emldma { u_int32_t format; void (*emldma)(struct sc_chinfo *); int unit; }; -static struct envy24_emldma envy24_pemltab[] = { - {AFMT_STEREO | AFMT_U8, envy24_p8u, 2}, - {AFMT_STEREO | AFMT_S16_LE, envy24_p16sl, 4}, - {AFMT_STEREO | AFMT_S32_LE, envy24_p32sl, 8}, +static struct envy24ht_emldma envy24ht_pemltab[] = { + {AFMT_STEREO | AFMT_U8, envy24ht_p8u, 2}, + {AFMT_STEREO | AFMT_S16_LE, envy24ht_p16sl, 4}, + {AFMT_STEREO | AFMT_S32_LE, envy24ht_p32sl, 8}, {0, NULL, 0} }; -static struct envy24_emldma envy24_remltab[] = { - {AFMT_STEREO | AFMT_S16_LE, envy24_r16sl, 4}, - {AFMT_STEREO | AFMT_S32_LE, envy24_r32sl, 8}, +static struct envy24ht_emldma envy24ht_remltab[] = { + {AFMT_STEREO | AFMT_S16_LE, envy24ht_r16sl, 4}, + {AFMT_STEREO | AFMT_S32_LE, envy24ht_r32sl, 8}, {0, NULL, 0} }; @@ -347,7 +401,7 @@ static struct envy24_emldma envy24_remltab[] = { /* common routines */ static u_int32_t -envy24_rdcs(struct sc_info *sc, int regno, int size) +envy24ht_rdcs(struct sc_info *sc, int regno, int size) { switch (size) { case 1: @@ -362,7 +416,7 @@ envy24_rdcs(struct sc_info *sc, int regno, int size) } static void -envy24_wrcs(struct sc_info *sc, int regno, u_int32_t data, int size) +envy24ht_wrcs(struct sc_info *sc, int regno, u_int32_t data, int size) { switch (size) { case 1: @@ -378,7 +432,7 @@ envy24_wrcs(struct sc_info *sc, int regno, u_int32_t data, int size) } static u_int32_t -envy24_rdmt(struct sc_info *sc, int regno, int size) +envy24ht_rdmt(struct sc_info *sc, int regno, int size) { switch (size) { case 1: @@ -393,7 +447,7 @@ envy24_rdmt(struct sc_info *sc, int regno, int size) } static void -envy24_wrmt(struct sc_info *sc, int regno, u_int32_t data, int size) +envy24ht_wrmt(struct sc_info *sc, int regno, u_int32_t data, int size) { switch (size) { case 1: @@ -408,92 +462,78 @@ envy24_wrmt(struct sc_info *sc, int regno, u_int32_t data, int size) } } -static u_int32_t -envy24_rdci(struct sc_info *sc, int regno) -{ - envy24_wrcs(sc, ENVY24_CCS_INDEX, regno, 1); - return envy24_rdcs(sc, ENVY24_CCS_DATA, 1); -} - -static void -envy24_wrci(struct sc_info *sc, int regno, u_int32_t data) -{ - envy24_wrcs(sc, ENVY24_CCS_INDEX, regno, 1); - envy24_wrcs(sc, ENVY24_CCS_DATA, data, 1); -} - /* -------------------------------------------------------------------- */ /* I2C port/E2PROM access routines */ static int -envy24_rdi2c(struct sc_info *sc, u_int32_t dev, u_int32_t addr) +envy24ht_rdi2c(struct sc_info *sc, u_int32_t dev, u_int32_t addr) { u_int32_t data; int i; #if(0) - device_printf(sc->dev, "envy24_rdi2c(sc, 0x%02x, 0x%02x)\n", dev, addr); + device_printf(sc->dev, "envy24ht_rdi2c(sc, 0x%02x, 0x%02x)\n", dev, addr); #endif - for (i = 0; i < ENVY24_TIMEOUT; i++) { - data = envy24_rdcs(sc, ENVY24_CCS_I2CSTAT, 1); - if ((data & ENVY24_CCS_I2CSTAT_BSY) == 0) + for (i = 0; i < ENVY24HT_TIMEOUT; i++) { + data = envy24ht_rdcs(sc, ENVY24HT_CCS_I2CSTAT, 1); + if ((data & ENVY24HT_CCS_I2CSTAT_BSY) == 0) break; DELAY(32); /* 31.25kHz */ } - if (i == ENVY24_TIMEOUT) { + if (i == ENVY24HT_TIMEOUT) { return -1; } - envy24_wrcs(sc, ENVY24_CCS_I2CADDR, addr, 1); - envy24_wrcs(sc, ENVY24_CCS_I2CDEV, - (dev & ENVY24_CCS_I2CDEV_ADDR) | ENVY24_CCS_I2CDEV_RD, 1); - for (i = 0; i < ENVY24_TIMEOUT; i++) { - data = envy24_rdcs(sc, ENVY24_CCS_I2CSTAT, 1); - if ((data & ENVY24_CCS_I2CSTAT_BSY) == 0) + envy24ht_wrcs(sc, ENVY24HT_CCS_I2CADDR, addr, 1); + envy24ht_wrcs(sc, ENVY24HT_CCS_I2CDEV, + (dev & ENVY24HT_CCS_I2CDEV_ADDR) | ENVY24HT_CCS_I2CDEV_RD, 1); + for (i = 0; i < ENVY24HT_TIMEOUT; i++) { + data = envy24ht_rdcs(sc, ENVY24HT_CCS_I2CSTAT, 1); + if ((data & ENVY24HT_CCS_I2CSTAT_BSY) == 0) break; DELAY(32); /* 31.25kHz */ } - if (i == ENVY24_TIMEOUT) { + if (i == ENVY24HT_TIMEOUT) { return -1; } - data = envy24_rdcs(sc, ENVY24_CCS_I2CDATA, 1); + data = envy24ht_rdcs(sc, ENVY24HT_CCS_I2CDATA, 1); #if(0) - device_printf(sc->dev, "envy24_rdi2c(): return 0x%x\n", data); + device_printf(sc->dev, "envy24ht_rdi2c(): return 0x%x\n", data); #endif return (int)data; } #if 0 static int -envy24_wri2c(struct sc_info *sc, u_int32_t dev, u_int32_t addr, u_int32_t data) +envy24ht_wri2c(struct sc_info *sc, u_int32_t dev, u_int32_t addr, u_int32_t data) { u_int32_t tmp; int i; #if(0) - device_printf(sc->dev, "envy24_rdi2c(sc, 0x%02x, 0x%02x)\n", dev, addr); + device_printf(sc->dev, "envy24ht_rdi2c(sc, 0x%02x, 0x%02x)\n", dev, addr); #endif - for (i = 0; i < ENVY24_TIMEOUT; i++) { - tmp = envy24_rdcs(sc, ENVY24_CCS_I2CSTAT, 1); - if ((tmp & ENVY24_CCS_I2CSTAT_BSY) == 0) + for (i = 0; i < ENVY24HT_TIMEOUT; i++) { + tmp = envy24ht_rdcs(sc, ENVY24HT_CCS_I2CSTAT, 1); + if ((tmp & ENVY24HT_CCS_I2CSTAT_BSY) == 0) break; DELAY(32); /* 31.25kHz */ } - if (i == ENVY24_TIMEOUT) { + if (i == ENVY24HT_TIMEOUT) { return -1; } - envy24_wrcs(sc, ENVY24_CCS_I2CADDR, addr, 1); - envy24_wrcs(sc, ENVY24_CCS_I2CDATA, data, 1); - envy24_wrcs(sc, ENVY24_CCS_I2CDEV, - (dev & ENVY24_CCS_I2CDEV_ADDR) | ENVY24_CCS_I2CDEV_WR, 1); - for (i = 0; i < ENVY24_TIMEOUT; i++) { - data = envy24_rdcs(sc, ENVY24_CCS_I2CSTAT, 1); - if ((data & ENVY24_CCS_I2CSTAT_BSY) == 0) + envy24ht_wrcs(sc, ENVY24HT_CCS_I2CADDR, addr, 1); + envy24ht_wrcs(sc, ENVY24HT_CCS_I2CDATA, data, 1); + envy24ht_wrcs(sc, ENVY24HT_CCS_I2CDEV, + (dev & ENVY24HT_CCS_I2CDEV_ADDR) | ENVY24HT_CCS_I2CDEV_WR, 1); + for (i = 0; i < ENVY24HT_TIMEOUT; i++) { + data = envy24ht_rdcs(sc, ENVY24HT_CCS_I2CSTAT, 1); + if ((data & ENVY24HT_CCS_I2CSTAT_BSY) == 0) break; DELAY(32); /* 31.25kHz */ } - if (i == ENVY24_TIMEOUT) { + if (i == ENVY24HT_TIMEOUT) { return -1; } @@ -502,61 +542,105 @@ envy24_wri2c(struct sc_info *sc, u_int32_t dev, u_int32_t addr, u_int32_t data) #endif static int -envy24_rdrom(struct sc_info *sc, u_int32_t addr) +envy24ht_rdrom(struct sc_info *sc, u_int32_t addr) { u_int32_t data; #if(0) - device_printf(sc->dev, "envy24_rdrom(sc, 0x%02x)\n", addr); + device_printf(sc->dev, "envy24ht_rdrom(sc, 0x%02x)\n", addr); #endif - data = envy24_rdcs(sc, ENVY24_CCS_I2CSTAT, 1); - if ((data & ENVY24_CCS_I2CSTAT_ROM) == 0) { + data = envy24ht_rdcs(sc, ENVY24HT_CCS_I2CSTAT, 1); + if ((data & ENVY24HT_CCS_I2CSTAT_ROM) == 0) { #if(0) - device_printf(sc->dev, "envy24_rdrom(): E2PROM not presented\n"); + device_printf(sc->dev, "envy24ht_rdrom(): E2PROM not presented\n"); #endif return -1; } - return envy24_rdi2c(sc, ENVY24_CCS_I2CDEV_ROM, addr); + return envy24ht_rdi2c(sc, ENVY24HT_CCS_I2CDEV_ROM, addr); } static struct cfg_info * -envy24_rom2cfg(struct sc_info *sc) +envy24ht_rom2cfg(struct sc_info *sc) { struct cfg_info *buff; int size; int i; #if(0) - device_printf(sc->dev, "envy24_rom2cfg(sc)\n"); + device_printf(sc->dev, "envy24ht_rom2cfg(sc)\n"); +#endif + size = envy24ht_rdrom(sc, ENVY24HT_E2PROM_SIZE); + if (size < ENVY24HT_E2PROM_GPIOSTATE + 3) { +#if(0) + device_printf(sc->dev, "envy24ht_rom2cfg(): ENVY24HT_E2PROM_SIZE-->%d\n", size); #endif - size = envy24_rdrom(sc, ENVY24_E2PROM_SIZE); - if (size < ENVY24_E2PROM_GPIODIR + 1) { + buff = malloc(sizeof(*buff), M_ENVY24HT, M_NOWAIT); + if (buff == NULL) { #if(0) - device_printf(sc->dev, "envy24_rom2cfg(): ENVY24_E2PROM_SIZE-->%d\n", size); + device_printf(sc->dev, "envy24ht_rom2cfg(): malloc()\n"); #endif + return NULL; + } + buff->free = 1; + + /* no valid e2prom, using default values */ + buff->subvendor = envy24ht_rdrom(sc, ENVY24HT_E2PROM_SUBVENDOR) << 8; + buff->subvendor += envy24ht_rdrom(sc, ENVY24HT_E2PROM_SUBVENDOR + 1); + buff->subdevice = envy24ht_rdrom(sc, ENVY24HT_E2PROM_SUBDEVICE) << 8; + buff->subdevice += envy24ht_rdrom(sc, ENVY24HT_E2PROM_SUBDEVICE + 1); + buff->scfg = 0x0b; + buff->acl = 0x80; + buff->i2s = 0xfc; + buff->spdif = 0xc3; + buff->gpiomask = 0x21efff; + buff->gpiostate = 0x7fffff; + buff->gpiodir = 0x5e1000; + buff->cdti = 0x40000; + buff->cclk = 0x80000; + buff->cs = 0x1000; + buff->cif = 0x00; + buff->type = 0x02; + + for (i = 0; cfg_table[i].subvendor != 0 || cfg_table[i].subdevice != 0; +i++) + if (cfg_table[i].subvendor == buff->subvendor && + cfg_table[i].subdevice == buff->subdevice) + break; + buff->name = cfg_table[i].name; + buff->codec = cfg_table[i].codec; + + return buff; +#if 0 return NULL; +#endif } - buff = malloc(sizeof(*buff), M_ENVY24, M_NOWAIT); + buff = malloc(sizeof(*buff), M_ENVY24HT, M_NOWAIT); if (buff == NULL) { #if(0) - device_printf(sc->dev, "envy24_rom2cfg(): malloc()\n"); + device_printf(sc->dev, "envy24ht_rom2cfg(): malloc()\n"); #endif return NULL; } buff->free = 1; - buff->subvendor = envy24_rdrom(sc, ENVY24_E2PROM_SUBVENDOR) << 8; - buff->subvendor += envy24_rdrom(sc, ENVY24_E2PROM_SUBVENDOR + 1); - buff->subdevice = envy24_rdrom(sc, ENVY24_E2PROM_SUBDEVICE) << 8; - buff->subdevice += envy24_rdrom(sc, ENVY24_E2PROM_SUBDEVICE + 1); - buff->scfg = envy24_rdrom(sc, ENVY24_E2PROM_SCFG); - buff->acl = envy24_rdrom(sc, ENVY24_E2PROM_ACL); - buff->i2s = envy24_rdrom(sc, ENVY24_E2PROM_I2S); - buff->spdif = envy24_rdrom(sc, ENVY24_E2PROM_SPDIF); - buff->gpiomask = envy24_rdrom(sc, ENVY24_E2PROM_GPIOMASK); - buff->gpiostate = envy24_rdrom(sc, ENVY24_E2PROM_GPIOSTATE); - buff->gpiodir = envy24_rdrom(sc, ENVY24_E2PROM_GPIODIR); + buff->subvendor = envy24ht_rdrom(sc, ENVY24HT_E2PROM_SUBVENDOR) << 8; + buff->subvendor += envy24ht_rdrom(sc, ENVY24HT_E2PROM_SUBVENDOR + 1); + buff->subdevice = envy24ht_rdrom(sc, ENVY24HT_E2PROM_SUBDEVICE) << 8; + buff->subdevice += envy24ht_rdrom(sc, ENVY24HT_E2PROM_SUBDEVICE + 1); + buff->scfg = envy24ht_rdrom(sc, ENVY24HT_E2PROM_SCFG); + buff->acl = envy24ht_rdrom(sc, ENVY24HT_E2PROM_ACL); + buff->i2s = envy24ht_rdrom(sc, ENVY24HT_E2PROM_I2S); + buff->spdif = envy24ht_rdrom(sc, ENVY24HT_E2PROM_SPDIF); + buff->gpiomask = envy24ht_rdrom(sc, ENVY24HT_E2PROM_GPIOMASK) | \ + envy24ht_rdrom(sc, ENVY24HT_E2PROM_GPIOMASK + 1) << 8 | \ + envy24ht_rdrom(sc, ENVY24HT_E2PROM_GPIOMASK + 2) << 16; + buff->gpiostate = envy24ht_rdrom(sc, ENVY24HT_E2PROM_GPIOSTATE) | \ + envy24ht_rdrom(sc, ENVY24HT_E2PROM_GPIOSTATE + 1) << 8 | \ + envy24ht_rdrom(sc, ENVY24HT_E2PROM_GPIOSTATE + 2) << 16; + buff->gpiodir = envy24ht_rdrom(sc, ENVY24HT_E2PROM_GPIODIR) | \ + envy24ht_rdrom(sc, ENVY24HT_E2PROM_GPIODIR + 1) << 8 | \ + envy24ht_rdrom(sc, ENVY24HT_E2PROM_GPIODIR + 2) << 16; for (i = 0; cfg_table[i].subvendor != 0 || cfg_table[i].subdevice != 0; i++) if (cfg_table[i].subvendor == buff->subvendor && @@ -569,11 +653,11 @@ envy24_rom2cfg(struct sc_info *sc) } static void -envy24_cfgfree(struct cfg_info *cfg) { +envy24ht_cfgfree(struct cfg_info *cfg) { if (cfg == NULL) return; if (cfg->free) - free(cfg, M_ENVY24); + free(cfg, M_ENVY24HT); return; } @@ -583,46 +667,45 @@ envy24_cfgfree(struct cfg_info *cfg) { #if 0 static int -envy24_coldcd(struct sc_info *sc) +envy24ht_coldcd(struct sc_info *sc) { u_int32_t data; int i; #if(0) - device_printf(sc->dev, "envy24_coldcd()\n"); + device_printf(sc->dev, "envy24ht_coldcd()\n"); #endif - envy24_wrmt(sc, ENVY24_MT_AC97CMD, ENVY24_MT_AC97CMD_CLD, 1); + envy24ht_wrmt(sc, ENVY24HT_MT_AC97CMD, ENVY24HT_MT_AC97CMD_CLD, 1); DELAY(10); - envy24_wrmt(sc, ENVY24_MT_AC97CMD, 0, 1); + envy24ht_wrmt(sc, ENVY24HT_MT_AC97CMD, 0, 1); DELAY(1000); - for (i = 0; i < ENVY24_TIMEOUT; i++) { - data = envy24_rdmt(sc, ENVY24_MT_AC97CMD, 1); - if (data & ENVY24_MT_AC97CMD_RDY) { + for (i = 0; i < ENVY24HT_TIMEOUT; i++) { + data = envy24ht_rdmt(sc, ENVY24HT_MT_AC97CMD, 1); + if (data & ENVY24HT_MT_AC97CMD_RDY) { return 0; } } return -1; } -#endif static int -envy24_slavecd(struct sc_info *sc) +envy24ht_slavecd(struct sc_info *sc) { u_int32_t data; int i; #if(0) - device_printf(sc->dev, "envy24_slavecd()\n"); + device_printf(sc->dev, "envy24ht_slavecd()\n"); #endif - envy24_wrmt(sc, ENVY24_MT_AC97CMD, - ENVY24_MT_AC97CMD_CLD | ENVY24_MT_AC97CMD_WRM, 1); + envy24ht_wrmt(sc, ENVY24HT_MT_AC97CMD, + ENVY24HT_MT_AC97CMD_CLD | ENVY24HT_MT_AC97CMD_WRM, 1); DELAY(10); - envy24_wrmt(sc, ENVY24_MT_AC97CMD, 0, 1); + envy24ht_wrmt(sc, ENVY24HT_MT_AC97CMD, 0, 1); DELAY(1000); - for (i = 0; i < ENVY24_TIMEOUT; i++) { - data = envy24_rdmt(sc, ENVY24_MT_AC97CMD, 1); - if (data & ENVY24_MT_AC97CMD_RDY) { + for (i = 0; i < ENVY24HT_TIMEOUT; i++) { + data = envy24ht_rdmt(sc, ENVY24HT_MT_AC97CMD, 1); + if (data & ENVY24HT_MT_AC97CMD_RDY) { return 0; } } @@ -630,60 +713,59 @@ envy24_slavecd(struct sc_info *sc) return -1; } -#if 0 static int -envy24_rdcd(kobj_t obj, void *devinfo, int regno) +envy24ht_rdcd(kobj_t obj, void *devinfo, int regno) { struct sc_info *sc = (struct sc_info *)devinfo; u_int32_t data; int i; #if(0) - device_printf(sc->dev, "envy24_rdcd(obj, sc, 0x%02x)\n", regno); + device_printf(sc->dev, "envy24ht_rdcd(obj, sc, 0x%02x)\n", regno); #endif - envy24_wrmt(sc, ENVY24_MT_AC97IDX, (u_int32_t)regno, 1); - envy24_wrmt(sc, ENVY24_MT_AC97CMD, ENVY24_MT_AC97CMD_RD, 1); - for (i = 0; i < ENVY24_TIMEOUT; i++) { - data = envy24_rdmt(sc, ENVY24_MT_AC97CMD, 1); - if ((data & ENVY24_MT_AC97CMD_RD) == 0) + envy24ht_wrmt(sc, ENVY24HT_MT_AC97IDX, (u_int32_t)regno, 1); + envy24ht_wrmt(sc, ENVY24HT_MT_AC97CMD, ENVY24HT_MT_AC97CMD_RD, 1); + for (i = 0; i < ENVY24HT_TIMEOUT; i++) { + data = envy24ht_rdmt(sc, ENVY24HT_MT_AC97CMD, 1); + if ((data & ENVY24HT_MT_AC97CMD_RD) == 0) break; } - data = envy24_rdmt(sc, ENVY24_MT_AC97DLO, 2); + data = envy24ht_rdmt(sc, ENVY24HT_MT_AC97DLO, 2); #if(0) - device_printf(sc->dev, "envy24_rdcd(): return 0x%x\n", data); + device_printf(sc->dev, "envy24ht_rdcd(): return 0x%x\n", data); #endif return (int)data; } static int -envy24_wrcd(kobj_t obj, void *devinfo, int regno, u_int16_t data) +envy24ht_wrcd(kobj_t obj, void *devinfo, int regno, u_int16_t data) { struct sc_info *sc = (struct sc_info *)devinfo; u_int32_t cmd; int i; #if(0) - device_printf(sc->dev, "envy24_wrcd(obj, sc, 0x%02x, 0x%04x)\n", regno, data); + device_printf(sc->dev, "envy24ht_wrcd(obj, sc, 0x%02x, 0x%04x)\n", regno, data); #endif - envy24_wrmt(sc, ENVY24_MT_AC97IDX, (u_int32_t)regno, 1); - envy24_wrmt(sc, ENVY24_MT_AC97DLO, (u_int32_t)data, 2); - envy24_wrmt(sc, ENVY24_MT_AC97CMD, ENVY24_MT_AC97CMD_WR, 1); - for (i = 0; i < ENVY24_TIMEOUT; i++) { - cmd = envy24_rdmt(sc, ENVY24_MT_AC97CMD, 1); - if ((cmd & ENVY24_MT_AC97CMD_WR) == 0) + envy24ht_wrmt(sc, ENVY24HT_MT_AC97IDX, (u_int32_t)regno, 1); + envy24ht_wrmt(sc, ENVY24HT_MT_AC97DLO, (u_int32_t)data, 2); + envy24ht_wrmt(sc, ENVY24HT_MT_AC97CMD, ENVY24HT_MT_AC97CMD_WR, 1); + for (i = 0; i < ENVY24HT_TIMEOUT; i++) { + cmd = envy24ht_rdmt(sc, ENVY24HT_MT_AC97CMD, 1); + if ((cmd & ENVY24HT_MT_AC97CMD_WR) == 0) break; } return 0; } -static kobj_method_t envy24_ac97_methods[] = { - KOBJMETHOD(ac97_read, envy24_rdcd), - KOBJMETHOD(ac97_write, envy24_wrcd), +static kobj_method_t envy24ht_ac97_methods[] = { + KOBJMETHOD(ac97_read, envy24ht_rdcd), + KOBJMETHOD(ac97_write, envy24ht_wrcd), {0, 0} }; -AC97_DECLARE(envy24_ac97); +AC97_DECLARE(envy24ht_ac97); #endif /* -------------------------------------------------------------------- */ @@ -691,58 +773,68 @@ AC97_DECLARE(envy24_ac97); /* GPIO access routines */ static u_int32_t -envy24_gpiord(struct sc_info *sc) +envy24ht_gpiord(struct sc_info *sc) { - return envy24_rdci(sc, ENVY24_CCI_GPIODAT); + if (sc->cfg->subvendor == 0x153b && sc->cfg->subdevice == 0x1150) + return envy24ht_rdcs(sc, ENVY24HT_CCS_GPIO_LDATA, 2); + else + return (envy24ht_rdcs(sc, ENVY24HT_CCS_GPIO_HDATA, 1) << 16 | envy24ht_rdcs(sc, ENVY24HT_CCS_GPIO_LDATA, 2)); } static void -envy24_gpiowr(struct sc_info *sc, u_int32_t data) +envy24ht_gpiowr(struct sc_info *sc, u_int32_t data) { #if(0) - device_printf(sc->dev, "envy24_gpiowr(sc, 0x%02x)\n", data & 0xff); + device_printf(sc->dev, "envy24ht_gpiowr(sc, 0x%02x)\n", data & 0x7FFFFF); return; #endif - envy24_wrci(sc, ENVY24_CCI_GPIODAT, data); + envy24ht_wrcs(sc, ENVY24HT_CCS_GPIO_LDATA, data, 2); + if (sc->cfg->subdevice != 0x1150) + envy24ht_wrcs(sc, ENVY24HT_CCS_GPIO_HDATA, data >> 16, 1); return; } #if 0 static u_int32_t -envy24_gpiogetmask(struct sc_info *sc) +envy24ht_gpiogetmask(struct sc_info *sc) { - return envy24_rdci(sc, ENVY24_CCI_GPIOMASK); + return (envy24ht_rdcs(sc, ENVY24HT_CCS_GPIO_HMASK, 1) << 16 | envy24ht_rdcs(sc, ENVY24HT_CCS_GPIO_LMASK, 2)); } #endif static void -envy24_gpiosetmask(struct sc_info *sc, u_int32_t mask) +envy24ht_gpiosetmask(struct sc_info *sc, u_int32_t mask) { - envy24_wrci(sc, ENVY24_CCI_GPIOMASK, mask); + envy24ht_wrcs(sc, ENVY24HT_CCS_GPIO_LMASK, mask, 2); + if (sc->cfg->subdevice != 0x1150) + envy24ht_wrcs(sc, ENVY24HT_CCS_GPIO_HMASK, mask >> 16, 1); return; } #if 0 static u_int32_t -envy24_gpiogetdir(struct sc_info *sc) +envy24ht_gpiogetdir(struct sc_info *sc) { - return envy24_rdci(sc, ENVY24_CCI_GPIOCTL); + return envy24ht_rdcs(sc, ENVY24HT_CCS_GPIO_CTLDIR, 4; } #endif static void -envy24_gpiosetdir(struct sc_info *sc, u_int32_t dir) +envy24ht_gpiosetdir(struct sc_info *sc, u_int32_t dir) { - envy24_wrci(sc, ENVY24_CCI_GPIOCTL, dir); + if (sc->cfg->subvendor == 0x153b && sc->cfg->subdevice == 0x1150) + envy24ht_wrcs(sc, ENVY24HT_CCS_GPIO_CTLDIR, dir, 2); + else + envy24ht_wrcs(sc, ENVY24HT_CCS_GPIO_CTLDIR, dir, 4); return; } /* -------------------------------------------------------------------- */ -/* M-Audio Delta series AK4524 access interface routine */ +/* SPI codec access interface routine */ -struct envy24_delta_ak4524_codec { - struct ak452x_info *info; +struct envy24ht_spi_codec { + struct spicds_info *info; struct sc_info *parent; int dir; int num; @@ -750,45 +842,45 @@ struct envy24_delta_ak4524_codec { }; static void -envy24_delta_ak4524_ctl(void *codec, unsigned int cs, unsigned int cclk, unsigned int cdti) +envy24ht_spi_ctl(void *codec, unsigned int cs, unsigned int cclk, unsigned int cdti) { u_int32_t data = 0; - struct envy24_delta_ak4524_codec *ptr = codec; + struct envy24ht_spi_codec *ptr = codec; #if(0) device_printf(ptr->parent->dev, "--> %d, %d, %d\n", cs, cclk, cdti); #endif - data = envy24_gpiord(ptr->parent); + data = envy24ht_gpiord(ptr->parent); data &= ~(ptr->cs | ptr->cclk | ptr->cdti); if (cs) data += ptr->cs; if (cclk) data += ptr->cclk; if (cdti) data += ptr->cdti; - envy24_gpiowr(ptr->parent, data); + envy24ht_gpiowr(ptr->parent, data); return; } static void * -envy24_delta_ak4524_create(device_t dev, void *info, int dir, int num) +envy24ht_spi_create(device_t dev, void *info, int dir, int num) { struct sc_info *sc = info; - struct envy24_delta_ak4524_codec *buff = NULL; + struct envy24ht_spi_codec *buff = NULL; #if(0) - device_printf(sc->dev, "envy24_delta_ak4524_create(dev, sc, %d, %d)\n", dir, num); + device_printf(sc->dev, "envy24ht_spi_create(dev, sc, %d, %d)\n", dir, num); #endif - buff = malloc(sizeof(*buff), M_ENVY24, M_NOWAIT); + buff = malloc(sizeof(*buff), M_ENVY24HT, M_NOWAIT); if (buff == NULL) return NULL; if (dir == PCMDIR_REC && sc->adc[num] != NULL) - buff->info = ((struct envy24_delta_ak4524_codec *)sc->adc[num])->info; + buff->info = ((struct envy24ht_spi_codec *)sc->adc[num])->info; else if (dir == PCMDIR_PLAY && sc->dac[num] != NULL) - buff->info = ((struct envy24_delta_ak4524_codec *)sc->dac[num])->info; + buff->info = ((struct envy24ht_spi_codec *)sc->dac[num])->info; else - buff->info = ak452x_create(dev, buff, num, envy24_delta_ak4524_ctl); + buff->info = spicds_create(dev, buff, num, envy24ht_spi_ctl); if (buff->info == NULL) { - free(buff, M_ENVY24); + free(buff, M_ENVY24HT); return NULL; } @@ -800,111 +892,79 @@ envy24_delta_ak4524_create(device_t dev, void *info, int dir, int num) } static void -envy24_delta_ak4524_destroy(void *codec) +envy24ht_spi_destroy(void *codec) { - struct envy24_delta_ak4524_codec *ptr = codec; + struct envy24ht_spi_codec *ptr = codec; if (ptr == NULL) return; #if(0) - device_printf(ptr->parent->dev, "envy24_delta_ak4524_destroy()\n"); + device_printf(ptr->parent->dev, "envy24ht_spi_destroy()\n"); #endif if (ptr->dir == PCMDIR_PLAY) { - if (ptr->parent->adc[ptr->num] != NULL) - ak452x_destroy(ptr->info); + if (ptr->parent->dac[ptr->num] != NULL) + spicds_destroy(ptr->info); } else { - if (ptr->parent->dac[ptr->num] != NULL) - ak452x_destroy(ptr->info); + if (ptr->parent->adc[ptr->num] != NULL) + spicds_destroy(ptr->info); } - free(codec, M_ENVY24); + free(codec, M_ENVY24HT); } static void -envy24_delta_ak4524_init(void *codec) +envy24ht_spi_init(void *codec) { -#if 0 - u_int32_t gpiomask, gpiodir; -#endif - struct envy24_delta_ak4524_codec *ptr = codec; + struct envy24ht_spi_codec *ptr = codec; if (ptr == NULL) return; #if(0) - device_printf(ptr->parent->dev, "envy24_delta_ak4524_init()\n"); -#endif - - /* - gpiomask = envy24_gpiogetmask(ptr->parent); - gpiomask &= ~(ENVY24_GPIO_AK4524_CDTI | ENVY24_GPIO_AK4524_CCLK | ENVY24_GPIO_AK4524_CS0 | ENVY24_GPIO_AK4524_CS1); - envy24_gpiosetmask(ptr->parent, gpiomask); - gpiodir = envy24_gpiogetdir(ptr->parent); - gpiodir |= ENVY24_GPIO_AK4524_CDTI | ENVY24_GPIO_AK4524_CCLK | ENVY24_GPIO_AK4524_CS0 | ENVY24_GPIO_AK4524_CS1; - envy24_gpiosetdir(ptr->parent, gpiodir); - */ - ptr->cs = ptr->parent->cfg->cs; -#if 0 - envy24_gpiosetmask(ptr->parent, ENVY24_GPIO_CS8414_STATUS); - envy24_gpiosetdir(ptr->parent, ~ENVY24_GPIO_CS8414_STATUS); - if (ptr->num == 0) - ptr->cs = ENVY24_GPIO_AK4524_CS0; - else - ptr->cs = ENVY24_GPIO_AK4524_CS1; - ptr->cclk = ENVY24_GPIO_AK4524_CCLK; + device_printf(ptr->parent->dev, "envy24ht_spicds_init()\n"); #endif + ptr->cs = ptr->parent->cfg->cs; ptr->cclk = ptr->parent->cfg->cclk; -#if 0 - ptr->cdti = ENVY24_GPIO_AK4524_CDTI; -#endif - ptr->cdti = ptr->parent->cfg->cdti; -#if 0 - ak452x_settype(ptr->info, AK452X_TYPE_4524); -#endif - ak452x_settype(ptr->info, ptr->parent->cfg->type); -#if 0 - ak452x_setcif(ptr->info, ENVY24_DELTA_AK4524_CIF); -#endif - ak452x_setcif(ptr->info, ptr->parent->cfg->cif); - ak452x_setformat(ptr->info, + ptr->cdti = ptr->parent->cfg->cdti; + spicds_settype(ptr->info, ptr->parent->cfg->type); + spicds_setcif(ptr->info, ptr->parent->cfg->cif); + if (ptr->parent->cfg->type == SPICDS_TYPE_AK4524 || \ + ptr->parent->cfg->type == SPICDS_TYPE_AK4528) { + spicds_setformat(ptr->info, AK452X_FORMAT_I2S | AK452X_FORMAT_256FSN | AK452X_FORMAT_1X); - ak452x_setdvc(ptr->info, 0); - ak452x_init(ptr->info); + spicds_setdvc(ptr->info, 0); + } + + /* for the time being, init only first codec */ + if (ptr->num == 0) + spicds_init(ptr->info); } static void -envy24_delta_ak4524_reinit(void *codec) +envy24ht_spi_reinit(void *codec) { - struct envy24_delta_ak4524_codec *ptr = codec; + struct envy24ht_spi_codec *ptr = codec; if (ptr == NULL) return; #if(0) - device_printf(ptr->parent->dev, "envy24_delta_ak4524_reinit()\n"); + device_printf(ptr->parent->dev, "envy24ht_spi_reinit()\n"); #endif - ak452x_reinit(ptr->info); + spicds_reinit(ptr->info); } static void -envy24_delta_ak4524_setvolume(void *codec, int dir, unsigned int left, unsigned int right) +envy24ht_spi_setvolume(void *codec, int dir, unsigned int left, unsigned int right) { - struct envy24_delta_ak4524_codec *ptr = codec; + struct envy24ht_spi_codec *ptr = codec; if (ptr == NULL) return; #if(0) - device_printf(ptr->parent->dev, "envy24_delta_ak4524_set()\n"); + device_printf(ptr->parent->dev, "envy24ht_spi_set()\n"); #endif - ak452x_set(ptr->info, dir, left, right); + spicds_set(ptr->info, dir, left, right); } -/* - There is no need for AK452[48] codec to set sample rate - static void - envy24_delta_ak4524_setrate(struct envy24_delta_ak4524_codec *codec, int which, int rate) - { - } -*/ - /* -------------------------------------------------------------------- */ /* hardware access routeines */ @@ -912,130 +972,123 @@ envy24_delta_ak4524_setvolume(void *codec, int dir, unsigned int left, unsigned static struct { u_int32_t speed; u_int32_t code; -} envy24_speedtab[] = { - {48000, ENVY24_MT_RATE_48000}, - {24000, ENVY24_MT_RATE_24000}, - {12000, ENVY24_MT_RATE_12000}, - {9600, ENVY24_MT_RATE_9600}, - {32000, ENVY24_MT_RATE_32000}, - {16000, ENVY24_MT_RATE_16000}, - {8000, ENVY24_MT_RATE_8000}, - {96000, ENVY24_MT_RATE_96000}, - {64000, ENVY24_MT_RATE_64000}, - {44100, ENVY24_MT_RATE_44100}, - {22050, ENVY24_MT_RATE_22050}, - {11025, ENVY24_MT_RATE_11025}, - {88200, ENVY24_MT_RATE_88200}, +} envy24ht_speedtab[] = { + {48000, ENVY24HT_MT_RATE_48000}, + {24000, ENVY24HT_MT_RATE_24000}, + {12000, ENVY24HT_MT_RATE_12000}, + {9600, ENVY24HT_MT_RATE_9600}, + {32000, ENVY24HT_MT_RATE_32000}, + {16000, ENVY24HT_MT_RATE_16000}, + {8000, ENVY24HT_MT_RATE_8000}, + {96000, ENVY24HT_MT_RATE_96000}, + {64000, ENVY24HT_MT_RATE_64000}, + {44100, ENVY24HT_MT_RATE_44100}, + {22050, ENVY24HT_MT_RATE_22050}, + {11025, ENVY24HT_MT_RATE_11025}, + {88200, ENVY24HT_MT_RATE_88200}, {0, 0x10} }; static int -envy24_setspeed(struct sc_info *sc, u_int32_t speed) { +envy24ht_setspeed(struct sc_info *sc, u_int32_t speed) { u_int32_t code; int i = 0; #if(0) - device_printf(sc->dev, "envy24_setspeed(sc, %d)\n", speed); -#endif + device_printf(sc->dev, "envy24ht_setspeed(sc, %d)\n", speed); if (speed == 0) { - code = ENVY24_MT_RATE_SPDIF; /* external master clock */ - envy24_slavecd(sc); + code = ENVY24HT_MT_RATE_SPDIF; /* external master clock */ + envy24ht_slavecd(sc); } else { - for (i = 0; envy24_speedtab[i].speed != 0; i++) { - if (envy24_speedtab[i].speed == speed) +#endif + for (i = 0; envy24ht_speedtab[i].speed != 0; i++) { + if (envy24ht_speedtab[i].speed == speed) break; } - code = envy24_speedtab[i].code; + code = envy24ht_speedtab[i].code; +#if 0 } -#if(0) - device_printf(sc->dev, "envy24_setspeed(): speed %d/code 0x%04x\n", envy24_speedtab[i].speed, code); + device_printf(sc->dev, "envy24ht_setspeed(): speed %d/code 0x%04x\n", envy24ht_speedtab[i].speed, code); #endif if (code < 0x10) { - envy24_wrmt(sc, ENVY24_MT_RATE, code, 1); - code = envy24_rdmt(sc, ENVY24_MT_RATE, 1); - code &= ENVY24_MT_RATE_MASK; - for (i = 0; envy24_speedtab[i].code < 0x10; i++) { - if (envy24_speedtab[i].code == code) + envy24ht_wrmt(sc, ENVY24HT_MT_RATE, code, 1); + code = envy24ht_rdmt(sc, ENVY24HT_MT_RATE, 1); + code &= ENVY24HT_MT_RATE_MASK; + for (i = 0; envy24ht_speedtab[i].code < 0x10; i++) { + if (envy24ht_speedtab[i].code == code) break; } - speed = envy24_speedtab[i].speed; + speed = envy24ht_speedtab[i].speed; } else speed = 0; #if(0) - device_printf(sc->dev, "envy24_setspeed(): return %d\n", speed); + device_printf(sc->dev, "envy24ht_setspeed(): return %d\n", speed); #endif return speed; } static void -envy24_setvolume(struct sc_info *sc, unsigned ch) +envy24ht_setvolume(struct sc_info *sc, unsigned ch) { #if(0) - device_printf(sc->dev, "envy24_setvolume(sc, %d)\n", ch); + device_printf(sc->dev, "envy24ht_setvolume(sc, %d)\n", ch); + envy24ht_wrmt(sc, ENVY24HT_MT_VOLIDX, ch * 2, 1); + envy24ht_wrmt(sc, ENVY24HT_MT_VOLUME, 0x7f00 | sc->left[ch], 2); + envy24ht_wrmt(sc, ENVY24HT_MT_VOLIDX, ch * 2 + 1, 1); + envy24ht_wrmt(sc, ENVY24HT_MT_VOLUME, (sc->right[ch] << 8) | 0x7f, 2); #endif -if (sc->cfg->subvendor==0x153b && sc->cfg->subdevice==0x1138 ) { - envy24_wrmt(sc, ENVY24_MT_VOLIDX, 16, 1); - envy24_wrmt(sc, ENVY24_MT_VOLUME, 0x7f7f, 2); - envy24_wrmt(sc, ENVY24_MT_VOLIDX, 17, 1); - envy24_wrmt(sc, ENVY24_MT_VOLUME, 0x7f7f, 2); - } - - envy24_wrmt(sc, ENVY24_MT_VOLIDX, ch * 2, 1); - envy24_wrmt(sc, ENVY24_MT_VOLUME, 0x7f00 | sc->left[ch], 2); - envy24_wrmt(sc, ENVY24_MT_VOLIDX, ch * 2 + 1, 1); - envy24_wrmt(sc, ENVY24_MT_VOLUME, (sc->right[ch] << 8) | 0x7f, 2); } static void -envy24_mutevolume(struct sc_info *sc, unsigned ch) +envy24ht_mutevolume(struct sc_info *sc, unsigned ch) { +#if 0 u_int32_t vol; -#if(0) - device_printf(sc->dev, "envy24_mutevolume(sc, %d)\n", ch); + device_printf(sc->dev, "envy24ht_mutevolume(sc, %d)\n", ch); + vol = ENVY24HT_VOL_MUTE << 8 | ENVY24HT_VOL_MUTE; + envy24ht_wrmt(sc, ENVY24HT_MT_VOLIDX, ch * 2, 1); + envy24ht_wrmt(sc, ENVY24HT_MT_VOLUME, vol, 2); + envy24ht_wrmt(sc, ENVY24HT_MT_VOLIDX, ch * 2 + 1, 1); + envy24ht_wrmt(sc, ENVY24HT_MT_VOLUME, vol, 2); #endif - vol = ENVY24_VOL_MUTE << 8 | ENVY24_VOL_MUTE; - envy24_wrmt(sc, ENVY24_MT_VOLIDX, ch * 2, 1); - envy24_wrmt(sc, ENVY24_MT_VOLUME, vol, 2); - envy24_wrmt(sc, ENVY24_MT_VOLIDX, ch * 2 + 1, 1); - envy24_wrmt(sc, ENVY24_MT_VOLUME, vol, 2); } static u_int32_t -envy24_gethwptr(struct sc_info *sc, int dir) +envy24ht_gethwptr(struct sc_info *sc, int dir) { int unit, regno; u_int32_t ptr, rtn; #if(0) - device_printf(sc->dev, "envy24_gethwptr(sc, %d)\n", dir); + device_printf(sc->dev, "envy24ht_gethwptr(sc, %d)\n", dir); #endif if (dir == PCMDIR_PLAY) { rtn = sc->psize / 4; - unit = ENVY24_PLAY_BUFUNIT / 4; - regno = ENVY24_MT_PCNT; + unit = ENVY24HT_PLAY_BUFUNIT / 4; + regno = ENVY24HT_MT_PCNT; } else { rtn = sc->rsize / 4; - unit = ENVY24_REC_BUFUNIT / 4; - regno = ENVY24_MT_RCNT; + unit = ENVY24HT_REC_BUFUNIT / 4; + regno = ENVY24HT_MT_RCNT; } - ptr = envy24_rdmt(sc, regno, 2); + ptr = envy24ht_rdmt(sc, regno, 2); rtn -= (ptr + 1); rtn /= unit; #if(0) - device_printf(sc->dev, "envy24_gethwptr(): return %d\n", rtn); + device_printf(sc->dev, "envy24ht_gethwptr(): return %d\n", rtn); #endif return rtn; } static void -envy24_updintr(struct sc_info *sc, int dir) +envy24ht_updintr(struct sc_info *sc, int dir) { int regptr, regintr; u_int32_t mask, intr; @@ -1043,24 +1096,24 @@ envy24_updintr(struct sc_info *sc, int dir) u_int16_t blk; #if(0) - device_printf(sc->dev, "envy24_updintr(sc, %d)\n", dir); + device_printf(sc->dev, "envy24ht_updintr(sc, %d)\n", dir); #endif if (dir == PCMDIR_PLAY) { blk = sc->blk[0]; size = sc->psize / 4; - regptr = ENVY24_MT_PCNT; - regintr = ENVY24_MT_PTERM; - mask = ~ENVY24_MT_INT_PMASK; + regptr = ENVY24HT_MT_PCNT; + regintr = ENVY24HT_MT_PTERM; + mask = ~ENVY24HT_MT_INT_PMASK; } else { blk = sc->blk[1]; size = sc->rsize / 4; - regptr = ENVY24_MT_RCNT; - regintr = ENVY24_MT_RTERM; - mask = ~ENVY24_MT_INT_RMASK; + regptr = ENVY24HT_MT_RCNT; + regintr = ENVY24HT_MT_RTERM; + mask = ~ENVY24HT_MT_INT_RMASK; } - ptr = size - envy24_rdmt(sc, regptr, 2) - 1; + ptr = size - envy24ht_rdmt(sc, regptr, 2) - 1; /* cnt = blk - ptr % blk - 1; if (cnt == 0) @@ -1068,17 +1121,17 @@ envy24_updintr(struct sc_info *sc, int dir) */ cnt = blk - 1; #if(0) - device_printf(sc->dev, "envy24_updintr():ptr = %d, blk = %d, cnt = %d\n", ptr, blk, cnt); + device_printf(sc->dev, "envy24ht_updintr():ptr = %d, blk = %d, cnt = %d\n", ptr, blk, cnt); #endif - envy24_wrmt(sc, regintr, cnt, 2); - intr = envy24_rdmt(sc, ENVY24_MT_INT, 1); + envy24ht_wrmt(sc, regintr, cnt, 2); + intr = envy24ht_rdmt(sc, ENVY24HT_MT_INT_MASK, 1); #if(0) - device_printf(sc->dev, "envy24_updintr():intr = 0x%02x, mask = 0x%02x\n", intr, mask); + device_printf(sc->dev, "envy24ht_updintr():intr = 0x%02x, mask = 0x%02x\n", intr, mask); #endif - envy24_wrmt(sc, ENVY24_MT_INT, intr & mask, 1); + envy24ht_wrmt(sc, ENVY24HT_MT_INT_MASK, intr & mask, 1); #if(0) - device_printf(sc->dev, "envy24_updintr():INT-->0x%02x\n", - envy24_rdmt(sc, ENVY24_MT_INT, 1)); + device_printf(sc->dev, "envy24ht_updintr():INT-->0x%02x\n", + envy24ht_rdmt(sc, ENVY24HT_MT_INT_MASK, 1)); #endif return; @@ -1086,45 +1139,51 @@ envy24_updintr(struct sc_info *sc, int dir) #if 0 static void -envy24_maskintr(struct sc_info *sc, int dir) +envy24ht_maskintr(struct sc_info *sc, int dir) { u_int32_t mask, intr; #if(0) - device_printf(sc->dev, "envy24_maskintr(sc, %d)\n", dir); + device_printf(sc->dev, "envy24ht_maskintr(sc, %d)\n", dir); #endif if (dir == PCMDIR_PLAY) - mask = ENVY24_MT_INT_PMASK; + mask = ENVY24HT_MT_INT_PMASK; else - mask = ENVY24_MT_INT_RMASK; - intr = envy24_rdmt(sc, ENVY24_MT_INT, 1); - envy24_wrmt(sc, ENVY24_MT_INT, intr | mask, 1); + mask = ENVY24HT_MT_INT_RMASK; + intr = envy24ht_rdmt(sc, ENVY24HT_MT_INT, 1); + envy24ht_wrmt(sc, ENVY24HT_MT_INT, intr | mask, 1); return; } #endif static int -envy24_checkintr(struct sc_info *sc, int dir) +envy24ht_checkintr(struct sc_info *sc, int dir) { u_int32_t mask, stat, intr, rtn; #if(0) - device_printf(sc->dev, "envy24_checkintr(sc, %d)\n", dir); + device_printf(sc->dev, "envy24ht_checkintr(sc, %d)\n", dir); #endif - intr = envy24_rdmt(sc, ENVY24_MT_INT, 1); + intr = envy24ht_rdmt(sc, ENVY24HT_MT_INT_STAT, 1); if (dir == PCMDIR_PLAY) { - if ((rtn = intr & ENVY24_MT_INT_PSTAT) != 0) { - mask = ~ENVY24_MT_INT_RSTAT; - stat = ENVY24_MT_INT_PSTAT | ENVY24_MT_INT_PMASK; - envy24_wrmt(sc, ENVY24_MT_INT, (intr & mask) | stat, 1); + if ((rtn = intr & ENVY24HT_MT_INT_PSTAT) != 0) { + mask = ~ENVY24HT_MT_INT_RSTAT; + envy24ht_wrmt(sc, 0x1a, 0x01, 1); + envy24ht_wrmt(sc, ENVY24HT_MT_INT_STAT, (intr & mask) | ENVY24HT_MT_INT_PSTAT | 0x08, 1); + stat = envy24ht_rdmt(sc, ENVY24HT_MT_INT_MASK, 1); + envy24ht_wrmt(sc, ENVY24HT_MT_INT_MASK, stat | ENVY24HT_MT_INT_PMASK, 1); } } else { - if ((rtn = intr & ENVY24_MT_INT_RSTAT) != 0) { - mask = ~ENVY24_MT_INT_PSTAT; - stat = ENVY24_MT_INT_RSTAT | ENVY24_MT_INT_RMASK; - envy24_wrmt(sc, ENVY24_MT_INT, (intr & mask) | stat, 1); + if ((rtn = intr & ENVY24HT_MT_INT_RSTAT) != 0) { + mask = ~ENVY24HT_MT_INT_PSTAT; +#if 0 + stat = ENVY24HT_MT_INT_RSTAT | ENVY24HT_MT_INT_RMASK; +#endif + envy24ht_wrmt(sc, ENVY24HT_MT_INT_STAT, (intr & mask) | ENVY24HT_MT_INT_RSTAT, 1); + stat = envy24ht_rdmt(sc, ENVY24HT_MT_INT_MASK, 1); + envy24ht_wrmt(sc, ENVY24HT_MT_INT_MASK, stat | ENVY24HT_MT_INT_RMASK, 1); } } @@ -1132,109 +1191,61 @@ envy24_checkintr(struct sc_info *sc, int dir) } static void -envy24_start(struct sc_info *sc, int dir) +envy24ht_start(struct sc_info *sc, int dir) { u_int32_t stat, sw; #if(0) - device_printf(sc->dev, "envy24_start(sc, %d)\n", dir); + device_printf(sc->dev, "envy24ht_start(sc, %d)\n", dir); #endif if (dir == PCMDIR_PLAY) - sw = ENVY24_MT_PCTL_PSTART; + sw = ENVY24HT_MT_PCTL_PSTART; else - sw = ENVY24_MT_PCTL_RSTART; + sw = ENVY24HT_MT_PCTL_RSTART; - stat = envy24_rdmt(sc, ENVY24_MT_PCTL, 1); - envy24_wrmt(sc, ENVY24_MT_PCTL, stat | sw, 1); + stat = envy24ht_rdmt(sc, ENVY24HT_MT_PCTL, 1); + envy24ht_wrmt(sc, ENVY24HT_MT_PCTL, stat | sw, 1); #if(0) DELAY(100); - device_printf(sc->dev, "PADDR:0x%08x\n", envy24_rdmt(sc, ENVY24_MT_PADDR, 4)); - device_printf(sc->dev, "PCNT:%ld\n", envy24_rdmt(sc, ENVY24_MT_PCNT, 2)); + device_printf(sc->dev, "PADDR:0x%08x\n", envy24ht_rdmt(sc, ENVY24HT_MT_PADDR, 4)); + device_printf(sc->dev, "PCNT:%ld\n", envy24ht_rdmt(sc, ENVY24HT_MT_PCNT, 2)); #endif return; } static void -envy24_stop(struct sc_info *sc, int dir) +envy24ht_stop(struct sc_info *sc, int dir) { u_int32_t stat, sw; #if(0) - device_printf(sc->dev, "envy24_stop(sc, %d)\n", dir); + device_printf(sc->dev, "envy24ht_stop(sc, %d)\n", dir); #endif if (dir == PCMDIR_PLAY) - sw = ~ENVY24_MT_PCTL_PSTART; + sw = ~ENVY24HT_MT_PCTL_PSTART; else - sw = ~ENVY24_MT_PCTL_RSTART; + sw = ~ENVY24HT_MT_PCTL_RSTART; - stat = envy24_rdmt(sc, ENVY24_MT_PCTL, 1); - envy24_wrmt(sc, ENVY24_MT_PCTL, stat & sw, 1); + stat = envy24ht_rdmt(sc, ENVY24HT_MT_PCTL, 1); + envy24ht_wrmt(sc, ENVY24HT_MT_PCTL, stat & sw, 1); return; } +#if 0 static int -envy24_route(struct sc_info *sc, int dac, int class, int adc, int rev) +envy24ht_route(struct sc_info *sc, int dac, int class, int adc, int rev) { - u_int32_t reg, mask; - u_int32_t left, right; - -#if(0) - device_printf(sc->dev, "envy24_route(sc, %d, %d, %d, %d)\n", - dac, class, adc, rev); -#endif - /* parameter pattern check */ - if (dac < 0 || ENVY24_ROUTE_DAC_SPDIF < dac) - return -1; - if (class == ENVY24_ROUTE_CLASS_MIX && - (dac != ENVY24_ROUTE_DAC_1 && dac != ENVY24_ROUTE_DAC_SPDIF)) - return -1; - if (rev) { - left = ENVY24_ROUTE_RIGHT; - right = ENVY24_ROUTE_LEFT; - } - else { - left = ENVY24_ROUTE_LEFT; - right = ENVY24_ROUTE_RIGHT; - } - - if (dac == ENVY24_ROUTE_DAC_SPDIF) { - reg = class | class << 2 | - ((adc << 1 | left) | left << 3) << 8 | - ((adc << 1 | right) | right << 3) << 12; -#if(0) - device_printf(sc->dev, "envy24_route(): MT_SPDOUT-->0x%04x\n", reg); -#endif - envy24_wrmt(sc, ENVY24_MT_SPDOUT, reg, 2); - } - else { - mask = ~(0x0303 << dac * 2); - reg = envy24_rdmt(sc, ENVY24_MT_PSDOUT, 2); - reg = (reg & mask) | ((class | class << 8) << dac * 2); -#if(0) - device_printf(sc->dev, "envy24_route(): MT_PSDOUT-->0x%04x\n", reg); -#endif - envy24_wrmt(sc, ENVY24_MT_PSDOUT, reg, 2); - mask = ~(0xff << dac * 8); - reg = envy24_rdmt(sc, ENVY24_MT_RECORD, 4); - reg = (reg & mask) | - (((adc << 1 | left) | left << 3) | - ((adc << 1 | right) | right << 3) << 4) << dac * 8; -#if(0) - device_printf(sc->dev, "envy24_route(): MT_RECORD-->0x%08x\n", reg); -#endif - envy24_wrmt(sc, ENVY24_MT_RECORD, reg, 4); - } - return 0; } +#endif /* -------------------------------------------------------------------- */ /* buffer copy routines */ static void -envy24_p32sl(struct sc_chinfo *ch) +envy24ht_p32sl(struct sc_chinfo *ch) { int length; sample32_t *dmabuf; @@ -1252,8 +1263,8 @@ envy24_p32sl(struct sc_chinfo *ch) slot = ch->num * 2; for (i = 0; i < length; i++) { - dmabuf[dst * ENVY24_PLAY_CHNUM + slot].buffer = data[src]; - dmabuf[dst * ENVY24_PLAY_CHNUM + slot + 1].buffer = data[src + 1]; + dmabuf[dst * ENVY24HT_PLAY_CHNUM + slot].buffer = data[src]; + dmabuf[dst * ENVY24HT_PLAY_CHNUM + slot + 1].buffer = data[src + 1]; dst++; dst %= dsize; src += 2; @@ -1264,7 +1275,7 @@ envy24_p32sl(struct sc_chinfo *ch) } static void -envy24_p16sl(struct sc_chinfo *ch) +envy24ht_p16sl(struct sc_chinfo *ch) { int length; sample32_t *dmabuf; @@ -1273,7 +1284,7 @@ envy24_p16sl(struct sc_chinfo *ch) int i; #if(0) - device_printf(ch->parent->dev, "envy24_p16sl()\n"); + device_printf(ch->parent->dev, "envy24ht_p16sl()\n"); #endif length = sndbuf_getready(ch->buffer) / 4; dmabuf = ch->parent->pbuf; @@ -1284,16 +1295,16 @@ envy24_p16sl(struct sc_chinfo *ch) dsize = ch->size / 4; slot = ch->num * 2; #if(0) - device_printf(ch->parent->dev, "envy24_p16sl():%lu-->%lu(%lu)\n", src, dst, length); + device_printf(ch->parent->dev, "envy24ht_p16sl():%lu-->%lu(%lu)\n", src, dst, length); #endif for (i = 0; i < length; i++) { - dmabuf[dst * ENVY24_PLAY_CHNUM + slot].buffer = (u_int32_t)data[src] << 16; - dmabuf[dst * ENVY24_PLAY_CHNUM + slot + 1].buffer = (u_int32_t)data[src + 1] << 16; + dmabuf[dst * ENVY24HT_PLAY_CHNUM + slot].buffer = (u_int32_t)data[src] << 16; + dmabuf[dst * ENVY24HT_PLAY_CHNUM + slot + 1].buffer = (u_int32_t)data[src + 1] << 16; #if(0) if (i < 16) { - printf("%08x", dmabuf[dst * ENVY24_PLAY_CHNUM + slot]); - printf("%08x", dmabuf[dst * ENVY24_PLAY_CHNUM + slot + 1]); + printf("%08x", dmabuf[dst * ENVY24HT_PLAY_CHNUM + slot]); + printf("%08x", dmabuf[dst * ENVY24HT_PLAY_CHNUM + slot + 1]); } #endif dst++; @@ -1309,7 +1320,7 @@ envy24_p16sl(struct sc_chinfo *ch) } static void -envy24_p8u(struct sc_chinfo *ch) +envy24ht_p8u(struct sc_chinfo *ch) { int length; sample32_t *dmabuf; @@ -1327,8 +1338,8 @@ envy24_p8u(struct sc_chinfo *ch) slot = ch->num * 2; for (i = 0; i < length; i++) { - dmabuf[dst * ENVY24_PLAY_CHNUM + slot].buffer = ((u_int32_t)data[src] ^ 0x80) << 24; - dmabuf[dst * ENVY24_PLAY_CHNUM + slot + 1].buffer = ((u_int32_t)data[src + 1] ^ 0x80) << 24; + dmabuf[dst * ENVY24HT_PLAY_CHNUM + slot].buffer = ((u_int32_t)data[src] ^ 0x80) << 24; + dmabuf[dst * ENVY24HT_PLAY_CHNUM + slot + 1].buffer = ((u_int32_t)data[src + 1] ^ 0x80) << 24; dst++; dst %= dsize; src += 2; @@ -1339,7 +1350,7 @@ envy24_p8u(struct sc_chinfo *ch) } static void -envy24_r32sl(struct sc_chinfo *ch) +envy24ht_r32sl(struct sc_chinfo *ch) { int length; sample32_t *dmabuf; @@ -1354,11 +1365,11 @@ envy24_r32sl(struct sc_chinfo *ch) src = dst / 2 + ch->offset; dsize = ch->size / 4; ssize = ch->size / 8; - slot = (ch->num - ENVY24_CHAN_REC_ADC1) * 2; + slot = (ch->num - ENVY24HT_CHAN_REC_ADC1) * 2; for (i = 0; i < length; i++) { - data[dst] = dmabuf[src * ENVY24_REC_CHNUM + slot].buffer; - data[dst + 1] = dmabuf[src * ENVY24_REC_CHNUM + slot + 1].buffer; + data[dst] = dmabuf[src * ENVY24HT_REC_CHNUM + slot].buffer; + data[dst + 1] = dmabuf[src * ENVY24HT_REC_CHNUM + slot + 1].buffer; dst += 2; dst %= dsize; src++; @@ -1369,7 +1380,7 @@ envy24_r32sl(struct sc_chinfo *ch) } static void -envy24_r16sl(struct sc_chinfo *ch) +envy24ht_r16sl(struct sc_chinfo *ch) { int length; sample32_t *dmabuf; @@ -1384,11 +1395,11 @@ envy24_r16sl(struct sc_chinfo *ch) src = dst / 2 + ch->offset; dsize = ch->size / 2; ssize = ch->size / 8; - slot = (ch->num - ENVY24_CHAN_REC_ADC1) * 2; + slot = (ch->num - ENVY24HT_CHAN_REC_ADC1) * 2; for (i = 0; i < length; i++) { - data[dst] = dmabuf[src * ENVY24_REC_CHNUM + slot].buffer; - data[dst + 1] = dmabuf[src * ENVY24_REC_CHNUM + slot + 1].buffer; + data[dst] = dmabuf[src * ENVY24HT_REC_CHNUM + slot].buffer; + data[dst + 1] = dmabuf[src * ENVY24HT_REC_CHNUM + slot + 1].buffer; dst += 2; dst %= dsize; src++; @@ -1402,26 +1413,28 @@ envy24_r16sl(struct sc_chinfo *ch) /* channel interface */ static void * -envy24chan_init(kobj_t obj, void *devinfo, struct snd_dbuf *b, struct pcm_channel *c, int dir) +envy24htchan_init(kobj_t obj, void *devinfo, struct snd_dbuf *b, struct pcm_channel *c, int dir) { struct sc_info *sc = (struct sc_info *)devinfo; struct sc_chinfo *ch; unsigned num; #if(0) - device_printf(sc->dev, "envy24chan_init(obj, devinfo, b, c, %d)\n", dir); + device_printf(sc->dev, "envy24htchan_init(obj, devinfo, b, c, %d)\n", dir); #endif snd_mtxlock(sc->lock); - if ((sc->chnum > ENVY24_CHAN_PLAY_SPDIF && dir != PCMDIR_REC) || - (sc->chnum < ENVY24_CHAN_REC_ADC1 && dir != PCMDIR_PLAY)) { +#if 0 + if ((sc->chnum > ENVY24HT_CHAN_PLAY_SPDIF && dir != PCMDIR_REC) || + (sc->chnum < ENVY24HT_CHAN_REC_ADC1 && dir != PCMDIR_PLAY)) { snd_mtxunlock(sc->lock); return NULL; } +#endif num = sc->chnum; ch = &sc->chan[num]; - ch->size = 8 * ENVY24_SAMPLE_NUM; - ch->data = malloc(ch->size, M_ENVY24, M_NOWAIT); + ch->size = 8 * ENVY24HT_SAMPLE_NUM; + ch->data = malloc(ch->size, M_ENVY24HT, M_NOWAIT); if (ch->data == NULL) { ch->size = 0; ch = NULL; @@ -1432,7 +1445,7 @@ envy24chan_init(kobj_t obj, void *devinfo, struct snd_dbuf *b, struct pcm_channe ch->parent = sc; ch->dir = dir; /* set channel map */ - ch->num = envy24_chanmap[num]; + ch->num = envy24ht_chanmap[num]; sndbuf_setup(ch->buffer, ch->data, ch->size); /* these 2 values are dummy */ ch->unit = 4; @@ -1444,17 +1457,17 @@ envy24chan_init(kobj_t obj, void *devinfo, struct snd_dbuf *b, struct pcm_channe } static int -envy24chan_free(kobj_t obj, void *data) +envy24htchan_free(kobj_t obj, void *data) { struct sc_chinfo *ch = data; struct sc_info *sc = ch->parent; #if(0) - device_printf(sc->dev, "envy24chan_free()\n"); + device_printf(sc->dev, "envy24htchan_free()\n"); #endif snd_mtxlock(sc->lock); if (ch->data != NULL) { - free(ch->data, M_ENVY24); + free(ch->data, M_ENVY24HT); ch->data = NULL; } snd_mtxunlock(sc->lock); @@ -1463,23 +1476,23 @@ envy24chan_free(kobj_t obj, void *data) } static int -envy24chan_setformat(kobj_t obj, void *data, u_int32_t format) +envy24htchan_setformat(kobj_t obj, void *data, u_int32_t format) { struct sc_chinfo *ch = data; struct sc_info *sc = ch->parent; - struct envy24_emldma *emltab; + struct envy24ht_emldma *emltab; unsigned int bcnt, bsize; int i; #if(0) - device_printf(sc->dev, "envy24chan_setformat(obj, data, 0x%08x)\n", format); + device_printf(sc->dev, "envy24htchan_setformat(obj, data, 0x%08x)\n", format); #endif snd_mtxlock(sc->lock); /* check and get format related information */ if (ch->dir == PCMDIR_PLAY) - emltab = envy24_pemltab; + emltab = envy24ht_pemltab; else - emltab = envy24_remltab; + emltab = envy24ht_remltab; if (emltab == NULL) { snd_mtxunlock(sc->lock); return -1; @@ -1502,18 +1515,18 @@ envy24chan_setformat(kobj_t obj, void *data, u_int32_t format) ch->unit = emltab[i].unit; /* set channel buffer information */ - ch->size = ch->unit * ENVY24_SAMPLE_NUM; + ch->size = ch->unit * ENVY24HT_SAMPLE_NUM; if (ch->dir == PCMDIR_PLAY) - bsize = ch->blk * 4 / ENVY24_PLAY_BUFUNIT; + bsize = ch->blk * 4 / ENVY24HT_PLAY_BUFUNIT; else - bsize = ch->blk * 4 / ENVY24_REC_BUFUNIT; + bsize = ch->blk * 4 / ENVY24HT_REC_BUFUNIT; bsize *= ch->unit; bcnt = ch->size / bsize; sndbuf_resize(ch->buffer, bcnt, bsize); snd_mtxunlock(sc->lock); #if(0) - device_printf(sc->dev, "envy24chan_setformat(): return 0x%08x\n", 0); + device_printf(sc->dev, "envy24htchan_setformat(): return 0x%08x\n", 0); #endif return 0; } @@ -1521,23 +1534,23 @@ envy24chan_setformat(kobj_t obj, void *data, u_int32_t format) /* IMPLEMENT NOTICE: In this driver, setspeed function only do setting of speed information value. And real hardware speed setting is done - at start triggered(see envy24chan_trigger()). So, at this function + at start triggered(see envy24htchan_trigger()). So, at this function is called, any value that ENVY24 can use is able to set. But, at start triggerd, some other channel is running, and that channel's speed isn't same with, then trigger function will fail. */ static int -envy24chan_setspeed(kobj_t obj, void *data, u_int32_t speed) +envy24htchan_setspeed(kobj_t obj, void *data, u_int32_t speed) { struct sc_chinfo *ch = data; u_int32_t val, prev; int i; #if(0) - device_printf(ch->parent->dev, "envy24chan_setspeed(obj, data, %d)\n", speed); + device_printf(ch->parent->dev, "envy24htchan_setspeed(obj, data, %d)\n", speed); #endif prev = 0x7fffffff; - for (i = 0; (val = envy24_speed[i]) != 0; i++) { + for (i = 0; (val = envy24ht_speed[i]) != 0; i++) { if (abs(val - speed) < abs(prev - speed)) prev = val; else @@ -1546,20 +1559,20 @@ envy24chan_setspeed(kobj_t obj, void *data, u_int32_t speed) ch->speed = prev; #if(0) - device_printf(ch->parent->dev, "envy24chan_setspeed(): return %d\n", ch->speed); + device_printf(ch->parent->dev, "envy24htchan_setspeed(): return %d\n", ch->speed); #endif return ch->speed; } static int -envy24chan_setblocksize(kobj_t obj, void *data, u_int32_t blocksize) +envy24htchan_setblocksize(kobj_t obj, void *data, u_int32_t blocksize) { struct sc_chinfo *ch = data; struct sc_info *sc = ch->parent; u_int32_t size, prev; #if(0) - device_printf(sc->dev, "envy24chan_setblocksize(obj, data, %d)\n", blocksize); + device_printf(sc->dev, "envy24htchan_setblocksize(obj, data, %d)\n", blocksize); #endif prev = 0x7fffffff; snd_mtxlock(sc->lock); @@ -1572,20 +1585,20 @@ envy24chan_setblocksize(kobj_t obj, void *data, u_int32_t blocksize) ch->blk = prev / ch->unit; if (ch->dir == PCMDIR_PLAY) - ch->blk *= ENVY24_PLAY_BUFUNIT / 4; + ch->blk *= ENVY24HT_PLAY_BUFUNIT / 4; else - ch->blk *= ENVY24_REC_BUFUNIT / 4; + ch->blk *= ENVY24HT_REC_BUFUNIT / 4; snd_mtxunlock(sc->lock); #if(0) - device_printf(sc->dev, "envy24chan_setblocksize(): return %d\n", prev); + device_printf(sc->dev, "envy24htchan_setblocksize(): return %d\n", prev); #endif return prev; } /* semantic note: must start at beginning of buffer */ static int -envy24chan_trigger(kobj_t obj, void *data, int go) +envy24htchan_trigger(kobj_t obj, void *data, int go) { struct sc_chinfo *ch = data; struct sc_info *sc = ch->parent; @@ -1594,7 +1607,7 @@ envy24chan_trigger(kobj_t obj, void *data, int go) #if 0 int i; - device_printf(sc->dev, "envy24chan_trigger(obj, data, %d)\n", go); + device_printf(sc->dev, "envy24htchan_trigger(obj, data, %d)\n", go); #endif snd_mtxlock(sc->lock); if (ch->dir == PCMDIR_PLAY) @@ -1604,11 +1617,11 @@ envy24chan_trigger(kobj_t obj, void *data, int go) switch (go) { case PCMTRIG_START: #if(0) - device_printf(sc->dev, "envy24chan_trigger(): start\n"); + device_printf(sc->dev, "envy24htchan_trigger(): start\n"); #endif /* check or set channel speed */ if (sc->run[0] == 0 && sc->run[1] == 0) { - sc->speed = envy24_setspeed(sc, ch->speed); + sc->speed = envy24ht_setspeed(sc, ch->speed); sc->caps[0].minspeed = sc->caps[0].maxspeed = sc->speed; sc->caps[1].minspeed = sc->caps[1].maxspeed = sc->speed; } @@ -1624,7 +1637,7 @@ envy24chan_trigger(kobj_t obj, void *data, int go) sc->blk[slot] = ch->blk; } else { - ptr = envy24_gethwptr(sc, ch->dir); + ptr = envy24ht_gethwptr(sc, ch->dir); ch->offset = ((ptr / ch->blk + 1) * ch->blk % (ch->size / 4)) * 4 / ch->unit; if (ch->blk < sc->blk[slot]) @@ -1632,16 +1645,16 @@ envy24chan_trigger(kobj_t obj, void *data, int go) } if (ch->dir == PCMDIR_PLAY) { ch->emldma(ch); - envy24_setvolume(sc, ch->num); + envy24ht_setvolume(sc, ch->num); } - envy24_updintr(sc, ch->dir); + envy24ht_updintr(sc, ch->dir); if (sc->run[slot] == 1) - envy24_start(sc, ch->dir); + envy24ht_start(sc, ch->dir); ch->run = 1; break; case PCMTRIG_EMLDMAWR: #if(0) - device_printf(sc->dev, "envy24chan_trigger(): emldmawr\n"); + device_printf(sc->dev, "envy24htchan_trigger(): emldmawr\n"); #endif if (ch->run != 1) return -1; @@ -1649,7 +1662,7 @@ envy24chan_trigger(kobj_t obj, void *data, int go) break; case PCMTRIG_EMLDMARD: #if(0) - device_printf(sc->dev, "envy24chan_trigger(): emldmard\n"); + device_printf(sc->dev, "envy24htchan_trigger(): emldmard\n"); #endif if (ch->run != 1) return -1; @@ -1657,29 +1670,27 @@ envy24chan_trigger(kobj_t obj, void *data, int go) break; case PCMTRIG_ABORT: #if(0) - device_printf(sc->dev, "envy24chan_trigger(): abort\n"); + device_printf(sc->dev, "envy24htchan_trigger(): abort\n"); #endif ch->run = 0; sc->run[slot]--; if (ch->dir == PCMDIR_PLAY) - envy24_mutevolume(sc, ch->num); + envy24ht_mutevolume(sc, ch->num); if (sc->run[slot] == 0) { - envy24_stop(sc, ch->dir); + envy24ht_stop(sc, ch->dir); sc->intr[slot] = 0; } -#if 0 - else if (ch->blk == sc->blk[slot]) { - sc->blk[slot] = ENVY24_SAMPLE_NUM / 2; - for (i = 0; i < ENVY24_CHAN_NUM; i++) { +/* else if (ch->blk == sc->blk[slot]) { + sc->blk[slot] = ENVY24HT_SAMPLE_NUM / 2; + for (i = 0; i < ENVY24HT_CHAN_NUM; i++) { if (sc->chan[i].dir == ch->dir && sc->chan[i].run == 1 && sc->chan[i].blk < sc->blk[slot]) sc->blk[slot] = sc->chan[i].blk; } if (ch->blk != sc->blk[slot]) - envy24_updintr(sc, ch->dir); - } -#endif + envy24ht_updintr(sc, ch->dir); + }*/ break; } snd_mtxunlock(sc->lock); @@ -1688,7 +1699,7 @@ envy24chan_trigger(kobj_t obj, void *data, int go) } static int -envy24chan_getptr(kobj_t obj, void *data) +envy24htchan_getptr(kobj_t obj, void *data) { struct sc_chinfo *ch = data; struct sc_info *sc = ch->parent; @@ -1696,40 +1707,40 @@ envy24chan_getptr(kobj_t obj, void *data) int rtn; #if(0) - device_printf(sc->dev, "envy24chan_getptr()\n"); + device_printf(sc->dev, "envy24htchan_getptr()\n"); #endif snd_mtxlock(sc->lock); - ptr = envy24_gethwptr(sc, ch->dir); + ptr = envy24ht_gethwptr(sc, ch->dir); rtn = ptr * ch->unit; snd_mtxunlock(sc->lock); #if(0) - device_printf(sc->dev, "envy24chan_getptr(): return %d\n", + device_printf(sc->dev, "envy24htchan_getptr(): return %d\n", rtn); #endif return rtn; } static struct pcmchan_caps * -envy24chan_getcaps(kobj_t obj, void *data) +envy24htchan_getcaps(kobj_t obj, void *data) { struct sc_chinfo *ch = data; struct sc_info *sc = ch->parent; struct pcmchan_caps *rtn; #if(0) - device_printf(sc->dev, "envy24chan_getcaps()\n"); + device_printf(sc->dev, "envy24htchan_getcaps()\n"); #endif snd_mtxlock(sc->lock); if (ch->dir == PCMDIR_PLAY) { if (sc->run[0] == 0) - rtn = &envy24_playcaps; + rtn = &envy24ht_playcaps; else rtn = &sc->caps[0]; } else { if (sc->run[1] == 0) - rtn = &envy24_reccaps; + rtn = &envy24ht_reccaps; else rtn = &sc->caps[1]; } @@ -1738,78 +1749,80 @@ envy24chan_getcaps(kobj_t obj, void *data) return rtn; } -static kobj_method_t envy24chan_methods[] = { - KOBJMETHOD(channel_init, envy24chan_init), - KOBJMETHOD(channel_free, envy24chan_free), - KOBJMETHOD(channel_setformat, envy24chan_setformat), - KOBJMETHOD(channel_setspeed, envy24chan_setspeed), - KOBJMETHOD(channel_setblocksize, envy24chan_setblocksize), - KOBJMETHOD(channel_trigger, envy24chan_trigger), - KOBJMETHOD(channel_getptr, envy24chan_getptr), - KOBJMETHOD(channel_getcaps, envy24chan_getcaps), +static kobj_method_t envy24htchan_methods[] = { + KOBJMETHOD(channel_init, envy24htchan_init), + KOBJMETHOD(channel_free, envy24htchan_free), + KOBJMETHOD(channel_setformat, envy24htchan_setformat), + KOBJMETHOD(channel_setspeed, envy24htchan_setspeed), + KOBJMETHOD(channel_setblocksize, envy24htchan_setblocksize), + KOBJMETHOD(channel_trigger, envy24htchan_trigger), + KOBJMETHOD(channel_getptr, envy24htchan_getptr), + KOBJMETHOD(channel_getcaps, envy24htchan_getcaps), { 0, 0 } }; -CHANNEL_DECLARE(envy24chan); +CHANNEL_DECLARE(envy24htchan); /* -------------------------------------------------------------------- */ /* mixer interface */ static int -envy24mixer_init(struct snd_mixer *m) +envy24htmixer_init(struct snd_mixer *m) { struct sc_info *sc = mix_getdevinfo(m); #if(0) - device_printf(sc->dev, "envy24mixer_init()\n"); + device_printf(sc->dev, "envy24htmixer_init()\n"); #endif if (sc == NULL) return -1; /* set volume control rate */ snd_mtxlock(sc->lock); - envy24_wrmt(sc, ENVY24_MT_VOLRATE, 0x30, 1); /* 0x30 is default value */ +#if 0 + envy24ht_wrmt(sc, ENVY24HT_MT_VOLRATE, 0x30, 1); /* 0x30 is default value */ +#endif - mix_setdevs(m, ENVY24_MIX_MASK); - mix_setrecdevs(m, ENVY24_MIX_REC_MASK); + mix_setdevs(m, ENVY24HT_MIX_MASK); + mix_setrecdevs(m, ENVY24HT_MIX_REC_MASK); snd_mtxunlock(sc->lock); return 0; } static int -envy24mixer_reinit(struct snd_mixer *m) +envy24htmixer_reinit(struct snd_mixer *m) { struct sc_info *sc = mix_getdevinfo(m); if (sc == NULL) return -1; #if(0) - device_printf(sc->dev, "envy24mixer_reinit()\n"); + device_printf(sc->dev, "envy24htmixer_reinit()\n"); #endif return 0; } static int -envy24mixer_uninit(struct snd_mixer *m) +envy24htmixer_uninit(struct snd_mixer *m) { struct sc_info *sc = mix_getdevinfo(m); if (sc == NULL) return -1; #if(0) - device_printf(sc->dev, "envy24mixer_uninit()\n"); + device_printf(sc->dev, "envy24htmixer_uninit()\n"); #endif return 0; } static int -envy24mixer_set(struct snd_mixer *m, unsigned dev, unsigned left, unsigned right) +envy24htmixer_set(struct snd_mixer *m, unsigned dev, unsigned left, unsigned right) { struct sc_info *sc = mix_getdevinfo(m); - int ch = envy24_mixmap[dev]; + int ch = envy24ht_mixmap[dev]; int hwch; int i; @@ -1819,9 +1832,9 @@ envy24mixer_set(struct snd_mixer *m, unsigned dev, unsigned left, unsigned right return -1; if (dev != 0 && ch == -1) return -1; - hwch = envy24_chanmap[ch]; + hwch = envy24ht_chanmap[ch]; #if(0) - device_printf(sc->dev, "envy24mixer_set(m, %d, %d, %d)\n", + device_printf(sc->dev, "envy24htmixer_set(m, %d, %d, %d)\n", dev, left, right); #endif @@ -1833,14 +1846,14 @@ envy24mixer_set(struct snd_mixer *m, unsigned dev, unsigned left, unsigned right } else { /* set volume value for hardware */ - if ((sc->left[hwch] = 100 - left) > ENVY24_VOL_MIN) - sc->left[hwch] = ENVY24_VOL_MUTE; - if ((sc->right[hwch] = 100 - right) > ENVY24_VOL_MIN) - sc->right[hwch] = ENVY24_VOL_MUTE; + if ((sc->left[hwch] = 100 - left) > ENVY24HT_VOL_MIN) + sc->left[hwch] = ENVY24HT_VOL_MUTE; + if ((sc->right[hwch] = 100 - right) > ENVY24HT_VOL_MIN) + sc->right[hwch] = ENVY24HT_VOL_MUTE; /* set volume for record channel and running play channel */ - if (hwch > ENVY24_CHAN_PLAY_SPDIF || sc->chan[ch].run) - envy24_setvolume(sc, hwch); + if (hwch > ENVY24HT_CHAN_PLAY_SPDIF || sc->chan[ch].run) + envy24ht_setvolume(sc, hwch); } snd_mtxunlock(sc->lock); @@ -1848,34 +1861,34 @@ envy24mixer_set(struct snd_mixer *m, unsigned dev, unsigned left, unsigned right } static u_int32_t -envy24mixer_setrecsrc(struct snd_mixer *m, u_int32_t src) +envy24htmixer_setrecsrc(struct snd_mixer *m, u_int32_t src) { struct sc_info *sc = mix_getdevinfo(m); - int ch = envy24_mixmap[src]; + int ch = envy24ht_mixmap[src]; #if(0) - device_printf(sc->dev, "envy24mixer_setrecsrc(m, %d)\n", src); + device_printf(sc->dev, "envy24htmixer_setrecsrc(m, %d)\n", src); #endif - if (ch > ENVY24_CHAN_PLAY_SPDIF) + if (ch > ENVY24HT_CHAN_PLAY_SPDIF) sc->src = ch; return src; } -static kobj_method_t envy24mixer_methods[] = { - KOBJMETHOD(mixer_init, envy24mixer_init), - KOBJMETHOD(mixer_reinit, envy24mixer_reinit), - KOBJMETHOD(mixer_uninit, envy24mixer_uninit), - KOBJMETHOD(mixer_set, envy24mixer_set), - KOBJMETHOD(mixer_setrecsrc, envy24mixer_setrecsrc), +static kobj_method_t envy24htmixer_methods[] = { + KOBJMETHOD(mixer_init, envy24htmixer_init), + KOBJMETHOD(mixer_reinit, envy24htmixer_reinit), + KOBJMETHOD(mixer_uninit, envy24htmixer_uninit), + KOBJMETHOD(mixer_set, envy24htmixer_set), + KOBJMETHOD(mixer_setrecsrc, envy24htmixer_setrecsrc), { 0, 0 } }; -MIXER_DECLARE(envy24mixer); +MIXER_DECLARE(envy24htmixer); /* -------------------------------------------------------------------- */ /* The interrupt handler */ static void -envy24_intr(void *p) +envy24ht_intr(void *p) { struct sc_info *sc = (struct sc_info *)p; struct sc_chinfo *ch; @@ -1883,50 +1896,50 @@ envy24_intr(void *p) int i; #if(0) - device_printf(sc->dev, "envy24_intr()\n"); + device_printf(sc->dev, "envy24ht_intr()\n"); #endif snd_mtxlock(sc->lock); - if (envy24_checkintr(sc, PCMDIR_PLAY)) { + if (envy24ht_checkintr(sc, PCMDIR_PLAY)) { #if(0) - device_printf(sc->dev, "envy24_intr(): play\n"); + device_printf(sc->dev, "envy24ht_intr(): play\n"); #endif dsize = sc->psize / 4; - ptr = dsize - envy24_rdmt(sc, ENVY24_MT_PCNT, 2) - 1; + ptr = dsize - envy24ht_rdmt(sc, ENVY24HT_MT_PCNT, 2) - 1; #if(0) - device_printf(sc->dev, "envy24_intr(): ptr = %d-->", ptr); + device_printf(sc->dev, "envy24ht_intr(): ptr = %d-->", ptr); #endif ptr -= ptr % sc->blk[0]; feed = (ptr + dsize - sc->intr[0]) % dsize; #if(0) printf("%d intr = %d feed = %d\n", ptr, sc->intr[0], feed); #endif - for (i = ENVY24_CHAN_PLAY_DAC1; i <= ENVY24_CHAN_PLAY_SPDIF; i++) { + for (i = ENVY24HT_CHAN_PLAY_DAC1; i <= ENVY24HT_CHAN_PLAY_SPDIF; i++) { ch = &sc->chan[i]; #if(0) if (ch->run) - device_printf(sc->dev, "envy24_intr(): chan[%d].blk = %d\n", i, ch->blk); + device_printf(sc->dev, "envy24ht_intr(): chan[%d].blk = %d\n", i, ch->blk); #endif if (ch->run && ch->blk <= feed) chn_intr(ch->channel); } sc->intr[0] = ptr; - envy24_updintr(sc, PCMDIR_PLAY); + envy24ht_updintr(sc, PCMDIR_PLAY); } - if (envy24_checkintr(sc, PCMDIR_REC)) { + if (envy24ht_checkintr(sc, PCMDIR_REC)) { #if(0) - device_printf(sc->dev, "envy24_intr(): rec\n"); + device_printf(sc->dev, "envy24ht_intr(): rec\n"); #endif dsize = sc->rsize / 4; - ptr = dsize - envy24_rdmt(sc, ENVY24_MT_RCNT, 2) - 1; + ptr = dsize - envy24ht_rdmt(sc, ENVY24HT_MT_RCNT, 2) - 1; ptr -= ptr % sc->blk[1]; feed = (ptr + dsize - sc->intr[1]) % dsize; - for (i = ENVY24_CHAN_REC_ADC1; i <= ENVY24_CHAN_REC_SPDIF; i++) { + for (i = ENVY24HT_CHAN_REC_ADC1; i <= ENVY24HT_CHAN_REC_SPDIF; i++) { ch = &sc->chan[i]; if (ch->run && ch->blk <= feed) chn_intr(ch->channel); } sc->intr[1] = ptr; - envy24_updintr(sc, PCMDIR_REC); + envy24ht_updintr(sc, PCMDIR_REC); } snd_mtxunlock(sc->lock); @@ -1938,15 +1951,15 @@ envy24_intr(void *p) */ static int -envy24_pci_probe(device_t dev) +envy24ht_pci_probe(device_t dev) { u_int16_t sv, sd; int i; #if(0) - printf("envy24_pci_probe()\n"); + printf("envy24ht_pci_probe()\n"); #endif - if (pci_get_device(dev) == PCID_ENVY24 && + if (pci_get_device(dev) == PCID_ENVY24HT && pci_get_vendor(dev) == PCIV_ENVY24) { sv = pci_get_subvendor(dev); sd = pci_get_subdevice(dev); @@ -1958,28 +1971,28 @@ envy24_pci_probe(device_t dev) } device_set_desc(dev, cfg_table[i].name); #if(0) - printf("envy24_pci_probe(): return 0\n"); + printf("envy24ht_pci_probe(): return 0\n"); #endif return 0; } else { #if(0) - printf("envy24_pci_probe(): return ENXIO\n"); + printf("envy24ht_pci_probe(): return ENXIO\n"); #endif return ENXIO; } } static void -envy24_dmapsetmap(void *arg, bus_dma_segment_t *segs, int nseg, int error) +envy24ht_dmapsetmap(void *arg, bus_dma_segment_t *segs, int nseg, int error) { struct sc_info *sc = (struct sc_info *)arg; #if(0) - device_printf(sc->dev, "envy24_dmapsetmap()\n"); + device_printf(sc->dev, "envy24ht_dmapsetmap()\n"); #endif if (bootverbose) { - printf("envy24(play): setmap %lx, %lx; ", + printf("envy24ht(play): setmap %lx, %lx; ", (unsigned long)segs->ds_addr, (unsigned long)segs->ds_len); printf("%p -> %lx\n", sc->pmap, (unsigned long)vtophys(sc->pmap)); @@ -1987,15 +2000,15 @@ envy24_dmapsetmap(void *arg, bus_dma_segment_t *segs, int nseg, int error) } static void -envy24_dmarsetmap(void *arg, bus_dma_segment_t *segs, int nseg, int error) +envy24ht_dmarsetmap(void *arg, bus_dma_segment_t *segs, int nseg, int error) { struct sc_info *sc = (struct sc_info *)arg; #if(0) - device_printf(sc->dev, "envy24_dmarsetmap()\n"); + device_printf(sc->dev, "envy24ht_dmarsetmap()\n"); #endif if (bootverbose) { - printf("envy24(record): setmap %lx, %lx; ", + printf("envy24ht(record): setmap %lx, %lx; ", (unsigned long)segs->ds_addr, (unsigned long)segs->ds_len); printf("%p -> %lx\n", sc->rmap, (unsigned long)vtophys(sc->pmap)); @@ -2003,10 +2016,10 @@ envy24_dmarsetmap(void *arg, bus_dma_segment_t *segs, int nseg, int error) } static void -envy24_dmafree(struct sc_info *sc) +envy24ht_dmafree(struct sc_info *sc) { #if(0) - device_printf(sc->dev, "envy24_dmafree():"); + device_printf(sc->dev, "envy24ht_dmafree():"); if (sc->rmap) printf(" sc->rmap(0x%08x)", (u_int32_t)sc->rmap); else printf(" sc->rmap(null)"); if (sc->pmap) printf(" sc->pmap(0x%08x)", (u_int32_t)sc->pmap); @@ -2040,16 +2053,16 @@ envy24_dmafree(struct sc_info *sc) } static int -envy24_dmainit(struct sc_info *sc) +envy24ht_dmainit(struct sc_info *sc) { u_int32_t addr; #if(0) - device_printf(sc->dev, "envy24_dmainit()\n"); + device_printf(sc->dev, "envy24ht_dmainit()\n"); #endif /* init values */ - sc->psize = ENVY24_PLAY_BUFUNIT * ENVY24_SAMPLE_NUM; - sc->rsize = ENVY24_REC_BUFUNIT * ENVY24_SAMPLE_NUM; + sc->psize = ENVY24HT_PLAY_BUFUNIT * ENVY24HT_SAMPLE_NUM; + sc->rsize = ENVY24HT_REC_BUFUNIT * ENVY24HT_SAMPLE_NUM; sc->pbuf = NULL; sc->rbuf = NULL; sc->pmap = sc->rmap = NULL; @@ -2057,24 +2070,24 @@ envy24_dmainit(struct sc_info *sc) /* allocate DMA buffer */ #if(0) - device_printf(sc->dev, "envy24_dmainit(): bus_dmamem_alloc(): sc->pbuf\n"); + device_printf(sc->dev, "envy24ht_dmainit(): bus_dmamem_alloc(): sc->pbuf\n"); #endif if (bus_dmamem_alloc(sc->dmat, (void **)&sc->pbuf, BUS_DMA_NOWAIT, &sc->pmap)) goto bad; #if(0) - device_printf(sc->dev, "envy24_dmainit(): bus_dmamem_alloc(): sc->rbuf\n"); + device_printf(sc->dev, "envy24ht_dmainit(): bus_dmamem_alloc(): sc->rbuf\n"); #endif if (bus_dmamem_alloc(sc->dmat, (void **)&sc->rbuf, BUS_DMA_NOWAIT, &sc->rmap)) goto bad; #if(0) - device_printf(sc->dev, "envy24_dmainit(): bus_dmamem_load(): sc->pmap\n"); + device_printf(sc->dev, "envy24ht_dmainit(): bus_dmamem_load(): sc->pmap\n"); #endif - if (bus_dmamap_load(sc->dmat, sc->pmap, sc->pbuf, sc->psize, envy24_dmapsetmap, sc, 0)) + if (bus_dmamap_load(sc->dmat, sc->pmap, sc->pbuf, sc->psize, envy24ht_dmapsetmap, sc, 0)) goto bad; #if(0) - device_printf(sc->dev, "envy24_dmainit(): bus_dmamem_load(): sc->rmap\n"); + device_printf(sc->dev, "envy24ht_dmainit(): bus_dmamem_load(): sc->rmap\n"); #endif - if (bus_dmamap_load(sc->dmat, sc->rmap, sc->rbuf, sc->rsize, envy24_dmarsetmap, sc, 0)) + if (bus_dmamap_load(sc->dmat, sc->rmap, sc->rbuf, sc->rsize, envy24ht_dmarsetmap, sc, 0)) goto bad; bzero(sc->pbuf, sc->psize); bzero(sc->rbuf, sc->rsize); @@ -2084,68 +2097,69 @@ envy24_dmainit(struct sc_info *sc) #if(0) device_printf(sc->dev, "pbuf(0x%08x)\n", addr); #endif - envy24_wrmt(sc, ENVY24_MT_PADDR, addr, 4); + envy24ht_wrmt(sc, ENVY24HT_MT_PADDR, addr, 4); #if(0) - device_printf(sc->dev, "PADDR-->(0x%08x)\n", envy24_rdmt(sc, ENVY24_MT_PADDR, 4)); + device_printf(sc->dev, "PADDR-->(0x%08x)\n", envy24ht_rdmt(sc, ENVY24HT_MT_PADDR, 4)); device_printf(sc->dev, "psize(%ld)\n", sc->psize / 4 - 1); #endif - envy24_wrmt(sc, ENVY24_MT_PCNT, sc->psize / 4 - 1, 2); + envy24ht_wrmt(sc, ENVY24HT_MT_PCNT, sc->psize / 4 - 1, 2); #if(0) - device_printf(sc->dev, "PCNT-->(%ld)\n", envy24_rdmt(sc, ENVY24_MT_PCNT, 2)); + device_printf(sc->dev, "PCNT-->(%ld)\n", envy24ht_rdmt(sc, ENVY24HT_MT_PCNT, 2)); #endif addr = vtophys(sc->rbuf); - envy24_wrmt(sc, ENVY24_MT_RADDR, addr, 4); - envy24_wrmt(sc, ENVY24_MT_RCNT, sc->rsize / 4 - 1, 2); + envy24ht_wrmt(sc, ENVY24HT_MT_RADDR, addr, 4); + envy24ht_wrmt(sc, ENVY24HT_MT_RCNT, sc->rsize / 4 - 1, 2); return 0; bad: - envy24_dmafree(sc); + envy24ht_dmafree(sc); return ENOSPC; } static void -envy24_putcfg(struct sc_info *sc) +envy24ht_putcfg(struct sc_info *sc) { device_printf(sc->dev, "system configuration\n"); printf(" SubVendorID: 0x%04x, SubDeviceID: 0x%04x\n", sc->cfg->subvendor, sc->cfg->subdevice); printf(" XIN2 Clock Source: "); - switch (sc->cfg->scfg & PCIM_SCFG_XIN2) { + switch (sc->cfg->scfg & ENVY24HT_CCSM_SCFG_XIN2) { case 0x00: - printf("22.5792MHz(44.1kHz*512)\n"); + printf("24.576MHz(96kHz*256)\n"); break; case 0x40: - printf("16.9344MHz(44.1kHz*384)\n"); + printf("49.152MHz(192kHz*256)\n"); break; case 0x80: - printf("from external clock synthesizer chip\n"); + printf("reserved\n"); break; default: printf("illeagal system setting\n"); } printf(" MPU-401 UART(s) #: "); - if (sc->cfg->scfg & PCIM_SCFG_MPU) - printf("2\n"); - else + if (sc->cfg->scfg & ENVY24HT_CCSM_SCFG_MPU) printf("1\n"); - printf(" AC'97 codec: "); - if (sc->cfg->scfg & PCIM_SCFG_AC97) - printf("not exist\n"); else - printf("exist\n"); - printf(" ADC #: "); - printf("%d\n", sc->adcn); + printf("not implemented\n"); + switch (sc->adcn) { + case 0x01 || 0x02: + printf(" ADC #: "); + printf("%d\n", sc->adcn); + break; + case 0x03: + printf(" ADC #: "); + printf("%d", 1); + printf(" and SPDIF receiver connected\n"); + break; + default: + printf(" no physical inputs\n"); + } printf(" DAC #: "); printf("%d\n", sc->dacn); printf(" Multi-track converter type: "); - if ((sc->cfg->acl & PCIM_ACL_MTC) == 0) { + if ((sc->cfg->acl & ENVY24HT_CCSM_ACL_MTC) == 0) { printf("AC'97(SDATA_OUT:"); - if (sc->cfg->acl & PCIM_ACL_OMODE) - printf("packed"); - else - printf("split"); - printf("|SDATA_IN:"); - if (sc->cfg->acl & PCIM_ACL_IMODE) + if (sc->cfg->acl & ENVY24HT_CCSM_ACL_OMODE) printf("packed"); else printf("split"); @@ -2153,43 +2167,48 @@ envy24_putcfg(struct sc_info *sc) } else { printf("I2S("); - if (sc->cfg->i2s & PCIM_I2S_VOL) + if (sc->cfg->i2s & ENVY24HT_CCSM_I2S_VOL) printf("with volume, "); - if (sc->cfg->i2s & PCIM_I2S_96KHZ) - printf("96KHz support, "); - switch (sc->cfg->i2s & PCIM_I2S_RES) { - case PCIM_I2S_16BIT: + if (sc->cfg->i2s & ENVY24HT_CCSM_I2S_192KHZ) + printf("192KHz support, "); + else + if (sc->cfg->i2s & ENVY24HT_CCSM_I2S_96KHZ) + printf("192KHz support, "); + else + printf("48KHz support, "); + switch (sc->cfg->i2s & ENVY24HT_CCSM_I2S_RES) { + case ENVY24HT_CCSM_I2S_16BIT: printf("16bit resolution, "); break; - case PCIM_I2S_18BIT: + case ENVY24HT_CCSM_I2S_18BIT: printf("18bit resolution, "); break; - case PCIM_I2S_20BIT: + case ENVY24HT_CCSM_I2S_20BIT: printf("20bit resolution, "); break; - case PCIM_I2S_24BIT: + case ENVY24HT_CCSM_I2S_24BIT: printf("24bit resolution, "); break; } - printf("ID#0x%x)\n", sc->cfg->i2s & PCIM_I2S_ID); + printf("ID#0x%x)\n", sc->cfg->i2s & ENVY24HT_CCSM_I2S_ID); } printf(" S/PDIF(IN/OUT): "); - if (sc->cfg->spdif & PCIM_SPDIF_IN) + if (sc->cfg->spdif & ENVY24HT_CCSM_SPDIF_IN) printf("1/"); else printf("0/"); - if (sc->cfg->spdif & PCIM_SPDIF_OUT) + if (sc->cfg->spdif & ENVY24HT_CCSM_SPDIF_OUT) printf("1 "); else printf("0 "); - if (sc->cfg->spdif & (PCIM_SPDIF_IN | PCIM_SPDIF_OUT)) - printf("ID# 0x%02x\n", (sc->cfg->spdif & PCIM_SPDIF_ID) >> 2); + if (sc->cfg->spdif & (ENVY24HT_CCSM_SPDIF_IN | ENVY24HT_CCSM_SPDIF_OUT)) + printf("ID# 0x%02x\n", (sc->cfg->spdif & ENVY24HT_CCSM_SPDIF_ID) >> 2); printf(" GPIO(mask/dir/state): 0x%02x/0x%02x/0x%02x\n", sc->cfg->gpiomask, sc->cfg->gpiodir, sc->cfg->gpiostate); } static int -envy24_init(struct sc_info *sc) +envy24ht_init(struct sc_info *sc) { u_int32_t data; #if(0) @@ -2200,19 +2219,21 @@ envy24_init(struct sc_info *sc) #if(0) - device_printf(sc->dev, "envy24_init()\n"); + device_printf(sc->dev, "envy24ht_init()\n"); #endif /* reset chip */ - envy24_wrcs(sc, ENVY24_CCS_CTL, ENVY24_CCS_CTL_RESET | ENVY24_CCS_CTL_NATIVE, 1); +#if 0 + envy24ht_wrcs(sc, ENVY24HT_CCS_CTL, ENVY24HT_CCS_CTL_RESET, 1); DELAY(200); - envy24_wrcs(sc, ENVY24_CCS_CTL, ENVY24_CCS_CTL_NATIVE, 1); + envy24ht_wrcs(sc, ENVY24HT_CCS_CTL, ENVY24HT_CCS_CTL_NATIVE, 1); DELAY(200); /* legacy hardware disable */ data = pci_read_config(sc->dev, PCIR_LAC, 2); data |= PCIM_LAC_DISABLE; pci_write_config(sc->dev, PCIR_LAC, data, 2); +#endif /* check system configuration */ sc->cfg = NULL; @@ -2230,23 +2251,24 @@ envy24_init(struct sc_info *sc) } if (sc->cfg == NULL) { /* 2nd: read configuration from table */ - sc->cfg = envy24_rom2cfg(sc); + sc->cfg = envy24ht_rom2cfg(sc); } - sc->adcn = ((sc->cfg->scfg & PCIM_SCFG_ADC) >> 2) + 1; - sc->dacn = (sc->cfg->scfg & PCIM_SCFG_DAC) + 1; + sc->adcn = ((sc->cfg->scfg & ENVY24HT_CCSM_SCFG_ADC) >> 2) + 1; //need to be fixed + sc->dacn = (sc->cfg->scfg & ENVY24HT_CCSM_SCFG_DAC) + 1; if (1 /* bootverbose */) { - envy24_putcfg(sc); + envy24ht_putcfg(sc); } /* set system configuration */ - pci_write_config(sc->dev, PCIR_SCFG, sc->cfg->scfg, 1); - pci_write_config(sc->dev, PCIR_ACL, sc->cfg->acl, 1); - pci_write_config(sc->dev, PCIR_I2S, sc->cfg->i2s, 1); - pci_write_config(sc->dev, PCIR_SPDIF, sc->cfg->spdif, 1); - envy24_gpiosetmask(sc, sc->cfg->gpiomask); - envy24_gpiosetdir(sc, sc->cfg->gpiodir); - envy24_gpiowr(sc, sc->cfg->gpiostate); + envy24ht_wrcs(sc, ENVY24HT_CCS_SCFG, sc->cfg->scfg, 1); + envy24ht_wrcs(sc, ENVY24HT_CCS_ACL, sc->cfg->acl, 1); + envy24ht_wrcs(sc, ENVY24HT_CCS_I2S, sc->cfg->i2s, 1); + envy24ht_wrcs(sc, ENVY24HT_CCS_SPDIF, sc->cfg->spdif, 1); + envy24ht_gpiosetmask(sc, sc->cfg->gpiomask); + envy24ht_gpiosetdir(sc, sc->cfg->gpiodir); + envy24ht_gpiowr(sc, sc->cfg->gpiostate); + for (i = 0; i < sc->adcn; i++) { sc->adc[i] = sc->cfg->codec->create(sc->dev, sc, PCMDIR_REC, i); sc->cfg->codec->init(sc->adc[i]); @@ -2258,68 +2280,58 @@ envy24_init(struct sc_info *sc) /* initialize DMA buffer */ #if(0) - device_printf(sc->dev, "envy24_init(): initialize DMA buffer\n"); + device_printf(sc->dev, "envy24ht_init(): initialize DMA buffer\n"); #endif - if (envy24_dmainit(sc)) + if (envy24ht_dmainit(sc)) return ENOSPC; /* initialize status */ sc->run[0] = sc->run[1] = 0; sc->intr[0] = sc->intr[1] = 0; sc->speed = 0; - sc->caps[0].fmtlist = envy24_playfmt; - sc->caps[1].fmtlist = envy24_recfmt; + sc->caps[0].fmtlist = envy24ht_playfmt; + sc->caps[1].fmtlist = envy24ht_recfmt; /* set channel router */ - envy24_route(sc, ENVY24_ROUTE_DAC_1, ENVY24_ROUTE_CLASS_MIX, 0, 0); - envy24_route(sc, ENVY24_ROUTE_DAC_SPDIF, ENVY24_ROUTE_CLASS_DMA, 0, 0); - /* envy24_route(sc, ENVY24_ROUTE_DAC_SPDIF, ENVY24_ROUTE_CLASS_MIX, 0, 0); */ +#if 0 + envy24ht_route(sc, ENVY24HT_ROUTE_DAC_1, ENVY24HT_ROUTE_CLASS_MIX, 0, 0); + envy24ht_route(sc, ENVY24HT_ROUTE_DAC_SPDIF, ENVY24HT_ROUTE_CLASS_DMA, 0, 0); + envy24ht_route(sc, ENVY24HT_ROUTE_DAC_SPDIF, ENVY24HT_ROUTE_CLASS_MIX, 0, 0); +#endif /* set macro interrupt mask */ - data = envy24_rdcs(sc, ENVY24_CCS_IMASK, 1); - envy24_wrcs(sc, ENVY24_CCS_IMASK, data & ~ENVY24_CCS_IMASK_PMT, 1); - data = envy24_rdcs(sc, ENVY24_CCS_IMASK, 1); + data = envy24ht_rdcs(sc, ENVY24HT_CCS_IMASK, 1); + envy24ht_wrcs(sc, ENVY24HT_CCS_IMASK, data & ~ENVY24HT_CCS_IMASK_PMT, 1); + data = envy24ht_rdcs(sc, ENVY24HT_CCS_IMASK, 1); #if(0) - device_printf(sc->dev, "envy24_init(): CCS_IMASK-->0x%02x\n", data); + device_printf(sc->dev, "envy24ht_init(): CCS_IMASK-->0x%02x\n", data); #endif return 0; } static int -envy24_alloc_resource(struct sc_info *sc) +envy24ht_alloc_resource(struct sc_info *sc) { /* allocate I/O port resource */ sc->csid = PCIR_CCS; sc->cs = bus_alloc_resource(sc->dev, SYS_RES_IOPORT, &sc->csid, 0, ~0, 1, RF_ACTIVE); - sc->ddmaid = PCIR_DDMA; - sc->ddma = bus_alloc_resource(sc->dev, SYS_RES_IOPORT, - &sc->ddmaid, 0, ~0, 1, RF_ACTIVE); - sc->dsid = PCIR_DS; - sc->ds = bus_alloc_resource(sc->dev, SYS_RES_IOPORT, - &sc->dsid, 0, ~0, 1, RF_ACTIVE); - sc->mtid = PCIR_MT; + sc->mtid = ENVY24HT_PCIR_MT; sc->mt = bus_alloc_resource(sc->dev, SYS_RES_IOPORT, &sc->mtid, 0, ~0, 1, RF_ACTIVE); - if (!sc->cs || !sc->ddma || !sc->ds || !sc->mt) { + if (!sc->cs || !sc->mt) { device_printf(sc->dev, "unable to map IO port space\n"); return ENXIO; } sc->cst = rman_get_bustag(sc->cs); sc->csh = rman_get_bushandle(sc->cs); - sc->ddmat = rman_get_bustag(sc->ddma); - sc->ddmah = rman_get_bushandle(sc->ddma); - sc->dst = rman_get_bustag(sc->ds); - sc->dsh = rman_get_bushandle(sc->ds); sc->mtt = rman_get_bustag(sc->mt); sc->mth = rman_get_bushandle(sc->mt); #if(0) device_printf(sc->dev, - "IO port register values\nCCS: 0x%lx\nDDMA: 0x%lx\nDS: 0x%lx\nMT: 0x%lx\n", + "IO port register values\nCCS: 0x%lx\nMT: 0x%lx\n", pci_read_config(sc->dev, PCIR_CCS, 4), - pci_read_config(sc->dev, PCIR_DDMA, 4), - pci_read_config(sc->dev, PCIR_DS, 4), pci_read_config(sc->dev, PCIR_MT, 4)); #endif @@ -2328,7 +2340,7 @@ envy24_alloc_resource(struct sc_info *sc) sc->irq = bus_alloc_resource(sc->dev, SYS_RES_IRQ, &sc->irqid, 0, ~0, 1, RF_ACTIVE | RF_SHAREABLE); if (!sc->irq || - snd_setup_intr(sc->dev, sc->irq, INTR_MPSAFE, envy24_intr, sc, &sc->ih)) { + snd_setup_intr(sc->dev, sc->irq, 0, envy24ht_intr, sc, &sc->ih)) { device_printf(sc->dev, "unable to map interrupt\n"); return ENXIO; } @@ -2350,26 +2362,26 @@ envy24_alloc_resource(struct sc_info *sc) } static int -envy24_pci_attach(device_t dev) +envy24ht_pci_attach(device_t dev) { u_int32_t data; struct sc_info *sc; char status[SND_STATUSLEN]; - char name[ENVY24_NAMELEN]; + char name[ENVY24HT_NAMELEN]; int err = 0; int i; #if(0) - device_printf(dev, "envy24_pci_attach()\n"); + device_printf(dev, "envy24ht_pci_attach()\n"); #endif /* get sc_info data area */ - if ((sc = malloc(sizeof(*sc), M_ENVY24, M_NOWAIT)) == NULL) { + if ((sc = malloc(sizeof(*sc), M_ENVY24HT, M_NOWAIT)) == NULL) { device_printf(dev, "cannot allocate softc\n"); return ENXIO; } bzero(sc, sizeof(*sc)); - snprintf(name, ENVY24_NAMELEN, "%s:envy24", device_get_nameunit(dev)); + snprintf(name, ENVY24HT_NAMELEN, "%s:envy24ht", device_get_nameunit(dev)); sc->lock = snd_mtxcreate(name, name); sc->dev = dev; @@ -2380,21 +2392,21 @@ envy24_pci_attach(device_t dev) data = pci_read_config(dev, PCIR_COMMAND, 2); /* allocate resources */ - err = envy24_alloc_resource(sc); + err = envy24ht_alloc_resource(sc); if (err) { device_printf(dev, "unable to allocate system resources\n"); goto bad; } /* initialize card */ - err = envy24_init(sc); + err = envy24ht_init(sc); if (err) { device_printf(dev, "unable to initialize the card\n"); goto bad; } /* set multi track mixer */ - mixer_init(dev, &envy24mixer_class, sc); + mixer_init(dev, &envy24htmixer_class, sc); /* set channel information */ err = pcm_register(dev, sc, 5, 2 + sc->adcn); @@ -2402,23 +2414,19 @@ envy24_pci_attach(device_t dev) goto bad; sc->chnum = 0; for (i = 0; i < 5; i++) { - pcm_addchan(dev, PCMDIR_PLAY, &envy24chan_class, sc); + pcm_addchan(dev, PCMDIR_PLAY, &envy24htchan_class, sc); sc->chnum++; } for (i = 0; i < 2 + sc->adcn; i++) { - pcm_addchan(dev, PCMDIR_REC, &envy24chan_class, sc); + pcm_addchan(dev, PCMDIR_REC, &envy24htchan_class, sc); sc->chnum++; } /* set status iformation */ snprintf(status, SND_STATUSLEN, - "at io 0x%lx:%ld,0x%lx:%ld,0x%lx:%ld,0x%lx:%ld irq %ld", + "at io 0x%lx:%ld,0x%lx:%ld irq %ld", rman_get_start(sc->cs), rman_get_end(sc->cs) - rman_get_start(sc->cs) + 1, - rman_get_start(sc->ddma), - rman_get_end(sc->ddma) - rman_get_start(sc->ddma) + 1, - rman_get_start(sc->ds), - rman_get_end(sc->ds) - rman_get_start(sc->ds) + 1, rman_get_start(sc->mt), rman_get_end(sc->mt) - rman_get_start(sc->mt) + 1, rman_get_start(sc->irq)); @@ -2431,39 +2439,35 @@ bad: bus_teardown_intr(dev, sc->irq, sc->ih); if (sc->irq) bus_release_resource(dev, SYS_RES_IRQ, sc->irqid, sc->irq); - envy24_dmafree(sc); + envy24ht_dmafree(sc); if (sc->dmat) bus_dma_tag_destroy(sc->dmat); - if (sc->cfg->codec->destroy != NULL) { + if (sc->cfg->codec->destroy != NULL) { for (i = 0; i < sc->adcn; i++) sc->cfg->codec->destroy(sc->adc[i]); for (i = 0; i < sc->dacn; i++) sc->cfg->codec->destroy(sc->dac[i]); } - envy24_cfgfree(sc->cfg); + envy24ht_cfgfree(sc->cfg); if (sc->cs) bus_release_resource(dev, SYS_RES_IOPORT, sc->csid, sc->cs); - if (sc->ddma) - bus_release_resource(dev, SYS_RES_IOPORT, sc->ddmaid, sc->ddma); - if (sc->ds) - bus_release_resource(dev, SYS_RES_IOPORT, sc->dsid, sc->ds); if (sc->mt) bus_release_resource(dev, SYS_RES_IOPORT, sc->mtid, sc->mt); if (sc->lock) snd_mtxfree(sc->lock); - free(sc, M_ENVY24); + free(sc, M_ENVY24HT); return err; } static int -envy24_pci_detach(device_t dev) +envy24ht_pci_detach(device_t dev) { struct sc_info *sc; int r; int i; #if(0) - device_printf(dev, "envy24_pci_detach()\n"); + device_printf(dev, "envy24ht_pci_detach()\n"); #endif sc = pcm_getdevinfo(dev); if (sc == NULL) @@ -2472,37 +2476,35 @@ envy24_pci_detach(device_t dev) if (r) return r; - envy24_dmafree(sc); + envy24ht_dmafree(sc); if (sc->cfg->codec->destroy != NULL) { for (i = 0; i < sc->adcn; i++) sc->cfg->codec->destroy(sc->adc[i]); for (i = 0; i < sc->dacn; i++) sc->cfg->codec->destroy(sc->dac[i]); } - envy24_cfgfree(sc->cfg); + envy24ht_cfgfree(sc->cfg); bus_dma_tag_destroy(sc->dmat); bus_teardown_intr(dev, sc->irq, sc->ih); bus_release_resource(dev, SYS_RES_IRQ, sc->irqid, sc->irq); bus_release_resource(dev, SYS_RES_IOPORT, sc->csid, sc->cs); - bus_release_resource(dev, SYS_RES_IOPORT, sc->ddmaid, sc->ddma); - bus_release_resource(dev, SYS_RES_IOPORT, sc->dsid, sc->ds); bus_release_resource(dev, SYS_RES_IOPORT, sc->mtid, sc->mt); snd_mtxfree(sc->lock); - free(sc, M_ENVY24); + free(sc, M_ENVY24HT); return 0; } -static device_method_t envy24_methods[] = { +static device_method_t envy24ht_methods[] = { /* Device interface */ - DEVMETHOD(device_probe, envy24_pci_probe), - DEVMETHOD(device_attach, envy24_pci_attach), - DEVMETHOD(device_detach, envy24_pci_detach), + DEVMETHOD(device_probe, envy24ht_pci_probe), + DEVMETHOD(device_attach, envy24ht_pci_attach), + DEVMETHOD(device_detach, envy24ht_pci_detach), { 0, 0 } }; -static driver_t envy24_driver = { +static driver_t envy24ht_driver = { "pcm", - envy24_methods, + envy24ht_methods, #if __FreeBSD_version > 500000 PCM_SOFTC_SIZE, #else @@ -2510,7 +2512,7 @@ static driver_t envy24_driver = { #endif }; -DRIVER_MODULE(snd_envy24, pci, envy24_driver, pcm_devclass, 0, 0); -MODULE_DEPEND(snd_envy24, sound, SOUND_MINVER, SOUND_PREFVER, SOUND_MAXVER); -MODULE_DEPEND(snd_envy24, snd_ak452x, SOUND_MINVER, SOUND_PREFVER, SOUND_MAXVER); -MODULE_VERSION(snd_envy24, 1); +DRIVER_MODULE(snd_envy24ht, pci, envy24ht_driver, pcm_devclass, 0, 0); +MODULE_DEPEND(snd_envy24ht, sound, SOUND_MINVER, SOUND_PREFVER, SOUND_MAXVER); +MODULE_DEPEND(snd_envy24ht, snd_spicds, SOUND_MINVER, SOUND_PREFVER, SOUND_MAXVER); +MODULE_VERSION(snd_envy24ht, 1); diff --git a/sys/dev/sound/pci/envy24ht.h b/sys/dev/sound/pci/envy24ht.h index 8830145..ea9c335 100644 --- a/sys/dev/sound/pci/envy24ht.h +++ b/sys/dev/sound/pci/envy24ht.h @@ -1,4 +1,5 @@ /* + * Copyright (c) 2006 Konstantin Dimitrov <kosio.dimitrov@gmail.com> * Copyright (c) 2001 Katsurajima Naoto <raven@katsurajima.seya.yokohama.jp> * All rights reserved. * @@ -31,338 +32,116 @@ /* PCI device ID */ #define PCIV_ENVY24 0x1412 -#define PCID_ENVY24 0x1712 +#define PCID_ENVY24HT 0x1724 -/* PCI Registers */ - -#define PCIR_CCS 0x10 /* Controller I/O Base Address */ -#define PCIR_DDMA 0x14 /* DDMA I/O Base Address */ -#define PCIR_DS 0x18 /* DMA Path Registers I/O Base Address */ -#define PCIR_MT 0x1c /* Professional Multi-Track I/O Base Address */ - -#define PCIR_LAC 0x40 /* Legacy Audio Control */ -#define PCIM_LAC_DISABLE 0x8000 /* Legacy Audio Hardware disabled */ -#define PCIM_LAC_SBDMA0 0x0000 /* SB DMA Channel Select: 0 */ -#define PCIM_LAC_SBDMA1 0x0040 /* SB DMA Channel Select: 1 */ -#define PCIM_LAC_SBDMA3 0x00c0 /* SB DMA Channel Select: 3 */ -#define PCIM_LAC_IOADDR10 0x0020 /* I/O Address Alias Control */ -#define PCIM_LAC_MPU401 0x0008 /* MPU-401 I/O enable */ -#define PCIM_LAC_GAME 0x0004 /* Game Port enable (200h) */ -#define PCIM_LAC_FM 0x0002 /* FM I/O enable (AdLib 388h base) */ -#define PCIM_LAC_SB 0x0001 /* SB I/O enable */ - -#define PCIR_LCC 0x42 /* Legacy Configuration Control */ -#define PCIM_LCC_VINT 0xff00 /* Interrupt vector to be snooped */ -#define PCIM_LCC_SVIDRW 0x0080 /* SVID read/write enable */ -#define PCIM_LCC_SNPSB 0x0040 /* snoop SB 22C/24Ch I/O write cycle */ -#define PCIM_LCC_SNPPIC 0x0020 /* snoop PIC I/O R/W cycle */ -#define PCIM_LCC_SNPPCI 0x0010 /* snoop PCI bus interrupt acknowledge cycle */ -#define PCIM_LCC_SBBASE 0x0008 /* SB base 240h(1)/220h(0) */ -#define PCIM_LCC_MPUBASE 0x0006 /* MPU-401 base 300h-330h */ -#define PCIM_LCC_LDMA 0x0001 /* Legacy DMA enable */ - -#define PCIR_SCFG 0x60 /* System Configuration Register */ -#define PCIM_SCFG_XIN2 0xc0 /* XIN2 Clock Source Configuration */ - /* 00: 22.5792MHz(44.1kHz*512) */ - /* 01: 16.9344MHz(44.1kHz*384) */ - /* 10: from external clock synthesizer chip */ -#define PCIM_SCFG_MPU 0x20 /* 1(0)/2(1) MPU-401 UART(s) */ -#define PCIM_SCFG_AC97 0x10 /* 0: AC'97 codec exist */ - /* 1: AC'97 codec not exist */ -#define PCIM_SCFG_ADC 0x0c /* 1-4 stereo ADC connected */ -#define PCIM_SCFG_DAC 0x03 /* 1-4 stereo DAC connected */ - -#define PCIR_ACL 0x61 /* AC-Link Configuration Register */ -#define PCIM_ACL_MTC 0x80 /* Multi-track converter type: 0:AC'97 1:I2S */ -#define PCIM_ACL_OMODE 0x02 /* AC 97 codec SDATA_OUT 0:split 1:packed */ -#define PCIM_ACL_IMODE 0x01 /* AC 97 codec SDATA_IN 0:split 1:packed */ - -#define PCIR_I2S 0x62 /* I2S Converters Features Register */ -#define PCIM_I2S_VOL 0x80 /* I2S codec Volume and mute */ -#define PCIM_I2S_96KHZ 0x40 /* I2S converter 96kHz sampling rate support */ -#define PCIM_I2S_RES 0x30 /* Converter resolution */ -#define PCIM_I2S_16BIT 0x00 /* 16bit */ -#define PCIM_I2S_18BIT 0x10 /* 18bit */ -#define PCIM_I2S_20BIT 0x20 /* 20bit */ -#define PCIM_I2S_24BIT 0x30 /* 24bit */ -#define PCIM_I2S_ID 0x0f /* Other I2S IDs */ - -#define PCIR_SPDIF 0x63 /* S/PDIF Configuration Register */ -#define PCIM_SPDIF_ID 0xfc /* S/PDIF chip ID */ -#define PCIM_SPDIF_IN 0x02 /* S/PDIF Stereo In is present */ -#define PCIM_SPDIF_OUT 0x01 /* S/PDIF Stereo Out is present */ - -#define PCIR_POWER_STAT 0x84 /* Power Management Control and Status */ +#define PCIR_CCS 0x10 /* Controller I/O Base Address */ +#define ENVY24HT_PCIR_MT 0x14 /* Multi-Track I/O Base Address */ /* Controller Registers */ -#define ENVY24_CCS_CTL 0x00 /* Control/Status Register */ -#define ENVY24_CCS_CTL_RESET 0x80 /* Entire Chip soft reset */ -#define ENVY24_CCS_CTL_DMAINT 0x40 /* DS DMA Channel-C interrupt */ -#define ENVY24_CCS_CTL_DOSVOL 0x10 /* set the DOS WT volume control */ -#define ENVY24_CCS_CTL_EDGE 0x08 /* SERR# edge (only one PCI clock width) */ -#define ENVY24_CCS_CTL_SBINT 0x02 /* SERR# assertion for SB interrupt */ -#define ENVY24_CCS_CTL_NATIVE 0x01 /* Mode select: 0:SB mode 1:native mode */ - -#define ENVY24_CCS_IMASK 0x01 /* Interrupt Mask Register */ -#define ENVY24_CCS_IMASK_PMIDI 0x80 /* Primary MIDI */ -#define ENVY24_CCS_IMASK_TIMER 0x40 /* Timer */ -#define ENVY24_CCS_IMASK_SMIDI 0x20 /* Secondary MIDI */ -#define ENVY24_CCS_IMASK_PMT 0x10 /* Professional Multi-track */ -#define ENVY24_CCS_IMASK_FM 0x08 /* FM/MIDI trapping */ -#define ENVY24_CCS_IMASK_PDMA 0x04 /* Playback DS DMA */ -#define ENVY24_CCS_IMASK_RDMA 0x02 /* Consumer record DMA */ -#define ENVY24_CCS_IMASK_SB 0x01 /* Consumer/SB mode playback */ - -#define ENVY24_CCS_ISTAT 0x02 /* Interrupt Status Register */ -#define ENVY24_CCS_ISTAT_PMIDI 0x80 /* Primary MIDI */ -#define ENVY24_CCS_ISTAT_TIMER 0x40 /* Timer */ -#define ENVY24_CCS_ISTAT_SMIDI 0x20 /* Secondary MIDI */ -#define ENVY24_CCS_ISTAT_PMT 0x10 /* Professional Multi-track */ -#define ENVY24_CCS_ISTAT_FM 0x08 /* FM/MIDI trapping */ -#define ENVY24_CCS_ISTAT_PDMA 0x04 /* Playback DS DMA */ -#define ENVY24_CCS_ISTAT_RDMA 0x02 /* Consumer record DMA */ -#define ENVY24_CCS_ISTAT_SB 0x01 /* Consumer/SB mode playback */ - -#define ENVY24_CCS_INDEX 0x03 /* Envy24 Index Register */ -#define ENVY24_CCS_DATA 0x04 /* Envy24 Data Register */ - -#define ENVY24_CCS_NMI1 0x05 /* NMI Status Register 1 */ -#define ENVY24_CCS_NMI1_PCI 0x80 /* PCI I/O read/write cycle */ -#define ENVY24_CCS_NMI1_SB 0x40 /* SB 22C/24C write */ -#define ENVY24_CCS_NMI1_SBDMA 0x10 /* SB interrupt (SB DMA/SB F2 command) */ -#define ENVY24_CCS_NMI1_DSDMA 0x08 /* DS channel C DMA interrupt */ -#define ENVY24_CCS_NMI1_MIDI 0x04 /* MIDI 330h or [PCI_10]h+Ch write */ -#define ENVY24_CCS_NMI1_FM 0x01 /* FM data register write */ - -#define ENVY24_CCS_NMIDAT 0x06 /* NMI Data Register */ -#define ENVY24_CCS_NMIIDX 0x07 /* NMI Index Register */ -#define ENVY24_CCS_AC97IDX 0x08 /* Consumer AC'97 Index Register */ - -#define ENVY24_CCS_AC97CMD 0x09 /* Consumer AC'97 Command/Status Register */ -#define ENVY24_CCS_AC97CMD_COLD 0x80 /* Cold reset */ -#define ENVY24_CCS_AC97CMD_WARM 0x40 /* Warm reset */ -#define ENVY24_CCS_AC97CMD_WRCODEC 0x20 /* Write to AC'97 codec registers */ -#define ENVY24_CCS_AC97CMD_RDCODEC 0x10 /* Read from AC'97 codec registers */ -#define ENVY24_CCS_AC97CMD_READY 0x08 /* AC'97 codec ready status bit */ -#define ENVY24_CCS_AC97CMD_PVSR 0x02 /* VSR for Playback */ -#define ENVY24_CCS_AC97CMD_RVSR 0x01 /* VSR for Record */ - -#define ENVY24_CCS_AC97DAT 0x0a /* Consumer AC'97 Data Port Register */ -#define ENVY24_CCS_PMIDIDAT 0x0c /* Primary MIDI UART Data Register */ -#define ENVY24_CCS_PMIDICMD 0x0d /* Primary MIDI UART Command/Status Register */ - -#define ENVY24_CCS_NMI2 0x0e /* NMI Status Register 2 */ -#define ENVY24_CCS_NMI2_FMBANK 0x30 /* FM bank indicator */ -#define ENVY24_CCS_NMI2_FM0 0x10 /* FM bank 0 (388h/220h/228h) */ -#define ENVY24_CCS_NMI2_FM1 0x20 /* FM bank 1 (38ah/222h) */ -#define ENVY24_CCS_NMI2_PICIO 0x0f /* PIC I/O cycle */ -#define ENVY24_CCS_NMI2_PIC20W 0x01 /* 20h write */ -#define ENVY24_CCS_NMI2_PICA0W 0x02 /* a0h write */ -#define ENVY24_CCS_NMI2_PIC21W 0x05 /* 21h write */ -#define ENVY24_CCS_NMI2_PICA1W 0x06 /* a1h write */ -#define ENVY24_CCS_NMI2_PIC20R 0x09 /* 20h read */ -#define ENVY24_CCS_NMI2_PICA0R 0x0a /* a0h read */ -#define ENVY24_CCS_NMI2_PIC21R 0x0d /* 21h read */ -#define ENVY24_CCS_NMI2_PICA1R 0x0e /* a1h read */ - -#define ENVY24_CCS_JOY 0x0f /* Game port register */ - -#define ENVY24_CCS_I2CDEV 0x10 /* I2C Port Device Address Register */ -#define ENVY24_CCS_I2CDEV_ADDR 0xfe /* I2C device address */ -#define ENVY24_CCS_I2CDEV_ROM 0xa0 /* reserved for the external I2C E2PROM */ -#define ENVY24_CCS_I2CDEV_WR 0x01 /* write */ -#define ENVY24_CCS_I2CDEV_RD 0x00 /* read */ - -#define ENVY24_CCS_I2CADDR 0x11 /* I2C Port Byte Address Register */ -#define ENVY24_CCS_I2CDATA 0x12 /* I2C Port Read/Write Data Register */ - -#define ENVY24_CCS_I2CSTAT 0x13 /* I2C Port Control and Status Register */ -#define ENVY24_CCS_I2CSTAT_ROM 0x80 /* external E2PROM exists */ -#define ENVY24_CCS_I2CSTAT_BSY 0x01 /* I2C port read/write status busy */ - -#define ENVY24_CCS_CDMABASE 0x14 /* Consumer Record DMA Current/Base Address Register */ -#define ENVY24_CCS_CDMACNT 0x18 /* Consumer Record DMA Current/Base Count Register */ -#define ENVY24_CCS_SERR 0x1b /* PCI Configuration SERR# Shadow Register */ -#define ENVY24_CCS_SMIDIDAT 0x1c /* Secondary MIDI UART Data Register */ -#define ENVY24_CCS_SMIDICMD 0x1d /* Secondary MIDI UART Command/Status Register */ - -#define ENVY24_CCS_TIMER 0x1e /* Timer Register */ -#define ENVY24_CCS_TIMER_EN 0x8000 /* Timer count enable */ -#define ENVY24_CCS_TIMER_MASK 0x7fff /* Timer counter mask */ - -/* Controller Indexed Registers */ - -#define ENVY24_CCI_PTCHIGH 0x00 /* Playback Terminal Count Register (High Byte) */ -#define ENVY24_CCI_PTCLOW 0x01 /* Playback Terminal Count Register (Low Byte) */ - -#define ENVY24_CCI_PCTL 0x02 /* Playback Control Register */ -#define ENVY24_CCI_PCTL_TURBO 0x80 /* 4x up sampling in the host by software */ -#define ENVY24_CCI_PCTL_U8 0x10 /* 8 bits unsigned */ -#define ENVY24_CCI_PCTL_S16 0x00 /* 16 bits signed */ -#define ENVY24_CCI_PCTL_STEREO 0x08 /* stereo */ -#define ENVY24_CCI_PCTL_MONO 0x00 /* mono */ -#define ENVY24_CCI_PCTL_FLUSH 0x04 /* FIFO flush (sticky bit. Requires toggling) */ -#define ENVY24_CCI_PCTL_PAUSE 0x02 /* Pause */ -#define ENVY24_CCI_PCTL_ENABLE 0x01 /* Playback enable */ - -#define ENVY24_CCI_PLVOL 0x03 /* Playback Left Volume/Pan Register */ -#define ENVY24_CCI_PRVOL 0x04 /* Playback Right Volume/Pan Register */ -#define ENVY24_CCI_VOL_MASK 0x3f /* Volume value mask */ - -#define ENVY24_CCI_SOFTVOL 0x05 /* Soft Volume/Mute Control Register */ -#define ENVY24_CCI_PSRLOW 0x06 /* Playback Sampling Rate Register (Low Byte) */ -#define ENVY24_CCI_PSRMID 0x07 /* Playback Sampling Rate Register (Middle Byte) */ -#define ENVY24_CCI_PSRHIGH 0x08 /* Playback Sampling Rate Register (High Byte) */ -#define ENVY24_CCI_RTCHIGH 0x10 /* Record Terminal Count Register (High Byte) */ -#define ENVY24_CCI_RTCLOW 0x11 /* Record Terminal Count Register (Low Byte) */ - -#define ENVY24_CCI_RCTL 0x12 /* Record Control Register */ -#define ENVY24_CCI_RCTL_DRTN 0x80 /* Digital return enable */ -#define ENVY24_CCI_RCTL_U8 0x04 /* 8 bits unsigned */ -#define ENVY24_CCI_RCTL_S16 0x00 /* 16 bits signed */ -#define ENVY24_CCI_RCTL_STEREO 0x00 /* stereo */ -#define ENVY24_CCI_RCTL_MONO 0x02 /* mono */ -#define ENVY24_CCI_RCTL_ENABLE 0x01 /* Record enable */ - -#define ENVY24_CCI_GPIODAT 0x20 /* GPIO Data Register */ -#define ENVY24_CCI_GPIOMASK 0x21 /* GPIO Write Mask Register */ - -#define ENVY24_CCI_GPIOCTL 0x22 /* GPIO Direction Control Register */ -#define ENVY24_CCI_GPIO_OUT 1 /* output */ -#define ENVY24_CCI_GPIO_IN 0 /* input */ - -#define ENVY24_CCI_CPDWN 0x30 /* Consumer Section Power Down Register */ -#define ENVY24_CCI_CPDWN_XTAL 0x80 /* Crystal clock generation power down for XTAL_1 */ -#define ENVY24_CCI_CPDWN_GAME 0x40 /* Game port analog power down */ -#define ENVY24_CCI_CPDWN_I2C 0x10 /* I2C port clock */ -#define ENVY24_CCI_CPDWN_MIDI 0x08 /* MIDI clock */ -#define ENVY24_CCI_CPDWN_AC97 0x04 /* AC'97 clock */ -#define ENVY24_CCI_CPDWN_DS 0x02 /* DS Block clock */ -#define ENVY24_CCI_CPDWN_PCI 0x01 /* PCI clock for SB, DMA controller */ - -#define ENVY24_CCI_MTPDWN 0x31 /* Multi-Track Section Power Down Register */ -#define ENVY24_CCI_MTPDWN_XTAL 0x80 /* Crystal clock generation power down for XTAL_2 */ -#define ENVY24_CCI_MTPDWN_SPDIF 0x04 /* S/PDIF clock */ -#define ENVY24_CCI_MTPDWN_MIX 0x02 /* Professional digital mixer clock */ -#define ENVY24_CCI_MTPDWN_I2S 0x01 /* Multi-track I2S serial interface clock */ - -/* DDMA Registers */ - -#define ENVY24_DDMA_ADDR0 0x00 /* DMA Base and Current Address bit 0-7 */ -#define ENVY24_DDMA_ADDR8 0x01 /* DMA Base and Current Address bit 8-15 */ -#define ENVY24_DDMA_ADDR16 0x02 /* DMA Base and Current Address bit 16-23 */ -#define ENVY24_DDMA_ADDR24 0x03 /* DMA Base and Current Address bit 24-31 */ -#define ENVY24_DDMA_CNT0 0x04 /* DMA Base and Current Count 0-7 */ -#define ENVY24_DDMA_CNT8 0x05 /* DMA Base and Current Count 8-15 */ -#define ENVY24_DDMA_CNT16 0x06 /* (not supported) */ -#define ENVY24_DDMA_CMD 0x08 /* Status and Command */ -#define ENVY24_DDMA_MODE 0x0b /* Mode */ -#define ENVY24_DDMA_RESET 0x0c /* Master reset */ -#define ENVY24_DDMA_CHAN 0x0f /* Channel Mask */ - -/* Consumer Section DMA Channel Registers */ - -#define ENVY24_CS_INTMASK 0x00 /* DirectSound DMA Interrupt Mask Register */ -#define ENVY24_CS_INTSTAT 0x02 /* DirectSound DMA Interrupt Status Register */ -#define ENVY24_CS_CHDAT 0x04 /* Channel Data register */ - -#define ENVY24_CS_CHIDX 0x08 /* Channel Index Register */ -#define ENVY24_CS_CHIDX_NUM 0xf0 /* Channel number */ -#define ENVY24_CS_CHIDX_ADDR0 0x00 /* Buffer_0 DMA base address */ -#define ENVY24_CS_CHIDX_CNT0 0x01 /* Buffer_0 DMA base count */ -#define ENVY24_CS_CHIDX_ADDR1 0x02 /* Buffer_1 DMA base address */ -#define ENVY24_CS_CHIDX_CNT1 0x03 /* Buffer_1 DMA base count */ -#define ENVY24_CS_CHIDX_CTL 0x04 /* Channel Control and Status register */ -#define ENVY24_CS_CHIDX_RATE 0x05 /* Channel Sampling Rate */ -#define ENVY24_CS_CHIDX_VOL 0x06 /* Channel left and right volume/pan control */ -/* Channel Control and Status Register at Index 4h */ -#define ENVY24_CS_CTL_BUF 0x80 /* indicating that the current active buffer */ -#define ENVY24_CS_CTL_AUTO1 0x40 /* Buffer_1 auto init. enable */ -#define ENVY24_CS_CTL_AUTO0 0x20 /* Buffer_0 auto init. enable */ -#define ENVY24_CS_CTL_FLUSH 0x10 /* Flush FIFO */ -#define ENVY24_CS_CTL_STEREO 0x08 /* stereo(or mono) */ -#define ENVY24_CS_CTL_U8 0x04 /* 8-bit unsigned(or 16-bit signed) */ -#define ENVY24_CS_CTL_PAUSE 0x02 /* DMA request 1:pause */ -#define ENVY24_CS_CTL_START 0x01 /* DMA request 1: start, 0:stop */ -/* Consumer mode Left/Right Volume Register at Index 06h */ -#define ENVY24_CS_VOL_RIGHT 0x3f00 -#define ENVY24_CS_VOL_LEFT 0x003f +#define ENVY24HT_CCS_CTL 0x00 /* Control/Status Register */ +#define ENVY24HT_CCS_CTL_RESET 0x80 /* Entire Chip soft reset */ + +#define ENVY24HT_CCS_IMASK 0x01 /* Interrupt Mask Register */ +#define ENVY24HT_CCS_IMASK_PMT 0x10 /* Professional Multi-track */ + +#define ENVY24HT_CCS_I2CDEV 0x10 /* I2C Port Device Address Register */ +#define ENVY24HT_CCS_I2CDEV_ADDR 0xfe /* I2C device address */ +#define ENVY24HT_CCS_I2CDEV_ROM 0xa0 /* reserved for the external I2C E2PROM */ +#define ENVY24HT_CCS_I2CDEV_WR 0x01 /* write */ +#define ENVY24HT_CCS_I2CDEV_RD 0x00 /* read */ + +#define ENVY24HT_CCS_I2CADDR 0x11 /* I2C Port Byte Address Register */ +#define ENVY24HT_CCS_I2CDATA 0x12 /* I2C Port Read/Write Data Register */ + +#define ENVY24HT_CCS_I2CSTAT 0x13 /* I2C Port Control and Status Register */ +#define ENVY24HT_CCS_I2CSTAT_ROM 0x80 /* external E2PROM exists */ +#define ENVY24HT_CCS_I2CSTAT_BSY 0x01 /* I2C port read/write status busy */ + +#define ENVY24HT_CCS_SCFG 0x04 /* System Configuration Register */ +#define ENVY24HT_CCSM_SCFG_XIN2 0xc0 /* XIN2 Clock Source Configuration */ + /* 00: 24.576MHz(96kHz*256) */ + /* 01: 49.152MHz(192kHz*256) */ + /* 1x: Reserved */ +#define ENVY24HT_CCSM_SCFG_MPU 0x20 /* 0(not implemented)/1(1) MPU-401 UART */ +#define ENVY24HT_CCSM_SCFG_ADC 0x0c /* 1-2 stereo ADC connected, S/PDIF receiver connected */ +#define ENVY24HT_CCSM_SCFG_DAC 0x03 /* 1-4 stereo DAC connected */ + +#define ENVY24HT_CCS_ACL 0x05 /* AC-Link Configuration Register */ +#define ENVY24HT_CCSM_ACL_MTC 0x80 /* Multi-track converter type: 0:AC'97 1:I2S */ +#define ENVY24HT_CCSM_ACL_OMODE 0x02 /* AC 97 codec SDATA_OUT 0:split 1:packed */ + +#define ENVY24HT_CCS_I2S 0x06 /* I2S Converters Features Register */ +#define ENVY24HT_CCSM_I2S_VOL 0x80 /* I2S codec Volume and mute */ +#define ENVY24HT_CCSM_I2S_96KHZ 0x40 /* I2S converter 96kHz sampling rate support */ +#define ENVY24HT_CCSM_I2S_192KHZ 0x08 /* I2S converter 192kHz sampling rate support */ +#define ENVY24HT_CCSM_I2S_RES 0x30 /* Converter resolution */ +#define ENVY24HT_CCSM_I2S_16BIT 0x00 /* 16bit */ +#define ENVY24HT_CCSM_I2S_18BIT 0x10 /* 18bit */ +#define ENVY24HT_CCSM_I2S_20BIT 0x20 /* 20bit */ +#define ENVY24HT_CCSM_I2S_24BIT 0x30 /* 24bit */ +#define ENVY24HT_CCSM_I2S_ID 0x07 /* Other I2S IDs */ + +#define ENVY24HT_CCS_SPDIF 0x07 /* S/PDIF Configuration Register */ +#define ENVY24HT_CCSM_SPDIF_INT_EN 0x80 /* Enable integrated S/PDIF transmitter */ +#define ENVY24HT_CCSM_SPDIF_INT_OUT 0x40 /* Internal S/PDIF Out implemented */ +#define ENVY24HT_CCSM_SPDIF_ID 0x3c /* S/PDIF chip ID */ +#define ENVY24HT_CCSM_SPDIF_IN 0x02 /* S/PDIF Stereo In is present */ +#define ENVY24HT_CCSM_SPDIF_OUT 0x01 /* External S/PDIF Out implemented */ /* Professional Multi-Track Control Registers */ + +#define ENVY24HT_MT_INT_STAT 0x00 /* DMA Interrupt Mask and Status Register */ +#define ENVY24HT_MT_INT_RSTAT 0x02 /* Multi-track record interrupt status */ +#define ENVY24HT_MT_INT_PSTAT 0x01 /* Multi-track playback interrupt status */ +#define ENVY24HT_MT_INT_MASK 0x03 +#define ENVY24HT_MT_INT_RMASK 0x02 /* Multi-track record interrupt mask */ +#define ENVY24HT_MT_INT_PMASK 0x01 /* Multi-track playback interrupt mask */ + +#define ENVY24HT_MT_RATE 0x01 /* Sampling Rate Select Register */ +#define ENVY24HT_MT_RATE_SPDIF 0x10 /* S/PDIF input clock as the master */ +#define ENVY24HT_MT_RATE_48000 0x00 +#define ENVY24HT_MT_RATE_24000 0x01 +#define ENVY24HT_MT_RATE_12000 0x02 +#define ENVY24HT_MT_RATE_9600 0x03 +#define ENVY24HT_MT_RATE_32000 0x04 +#define ENVY24HT_MT_RATE_16000 0x05 +#define ENVY24HT_MT_RATE_8000 0x06 +#define ENVY24HT_MT_RATE_96000 0x07 +#define ENVY24HT_MT_RATE_64000 0x0f +#define ENVY24HT_MT_RATE_44100 0x08 +#define ENVY24HT_MT_RATE_22050 0x09 +#define ENVY24HT_MT_RATE_11025 0x0a +#define ENVY24HT_MT_RATE_88200 0x0b +#define ENVY24HT_MT_RATE_MASK 0x0f + +#define ENVY24HT_MT_PADDR 0x10 /* Playback DMA Current/Base Address Register */ +#define ENVY24HT_MT_PCNT 0x14 /* Playback DMA Current/Base Count Register */ +#define ENVY24HT_MT_PTERM 0x1C /* Playback Current/Base Terminal Count Register */ + +#define ENVY24HT_MT_PCTL 0x18 /* Global Playback and Record DMA Start/Stop Register */ +#define ENVY24HT_MT_PCTL_RSTART 0x02 /* 1: Record start; 0: Record stop */ +#define ENVY24HT_MT_PCTL_PSTART 0x01 /* 1: Playback start; 0: Playback stop */ + +#define ENVY24HT_MT_RADDR 0x20 /* Record DMA Current/Base Address Register */ +#define ENVY24HT_MT_RCNT 0x24 /* Record DMA Current/Base Count Register */ +#define ENVY24HT_MT_RTERM 0x26 /* Record Current/Base Terminal Count Register */ -#define ENVY24_MT_INT 0x00 /* DMA Interrupt Mask and Status Register */ -#define ENVY24_MT_INT_RMASK 0x80 /* Multi-track record interrupt mask */ -#define ENVY24_MT_INT_PMASK 0x40 /* Multi-track playback interrupt mask */ -#define ENVY24_MT_INT_RSTAT 0x02 /* Multi-track record interrupt status */ -#define ENVY24_MT_INT_PSTAT 0x01 /* Multi-track playback interrupt status */ - -#define ENVY24_MT_RATE 0x01 /* Sampling Rate Select Register */ -#define ENVY24_MT_RATE_SPDIF 0x10 /* S/PDIF input clock as the master */ -#define ENVY24_MT_RATE_48000 0x00 -#define ENVY24_MT_RATE_24000 0x01 -#define ENVY24_MT_RATE_12000 0x02 -#define ENVY24_MT_RATE_9600 0x03 -#define ENVY24_MT_RATE_32000 0x04 -#define ENVY24_MT_RATE_16000 0x05 -#define ENVY24_MT_RATE_8000 0x06 -#define ENVY24_MT_RATE_96000 0x07 -#define ENVY24_MT_RATE_64000 0x0f -#define ENVY24_MT_RATE_44100 0x08 -#define ENVY24_MT_RATE_22050 0x09 -#define ENVY24_MT_RATE_11025 0x0a -#define ENVY24_MT_RATE_88200 0x0b -#define ENVY24_MT_RATE_MASK 0x0f - -#define ENVY24_MT_I2S 0x02 /* I2S Data Format Register */ -#define ENVY24_MT_I2S_MLR128 0x08 /* MCLK/LRCLK ratio 128x(or 256x) */ -#define ENVY24_MT_I2S_SLR48 0x04 /* SCLK/LRCLK ratio 48bpf(or 64bpf) */ -#define ENVY24_MT_I2S_FORM 0x00 /* I2S data format */ - -#define ENVY24_MT_AC97IDX 0x04 /* Index Register for AC'97 Codecs */ - -#define ENVY24_MT_AC97CMD 0x05 /* Command and Status Register for AC'97 Codecs */ -#define ENVY24_MT_AC97CMD_CLD 0x80 /* Cold reset */ -#define ENVY24_MT_AC97CMD_WRM 0x40 /* Warm reset */ -#define ENVY24_MT_AC97CMD_WR 0x20 /* write to AC'97 codec register */ -#define ENVY24_MT_AC97CMD_RD 0x10 /* read AC'97 CODEC register */ -#define ENVY24_MT_AC97CMD_RDY 0x08 /* AC'97 codec ready status bit */ -#define ENVY24_MT_AC97CMD_ID 0x03 /* ID(0-3) for external AC 97 registers */ - -#define ENVY24_MT_AC97DLO 0x06 /* AC'97 codec register data low byte */ -#define ENVY24_MT_AC97DHI 0x07 /* AC'97 codec register data high byte */ -#define ENVY24_MT_PADDR 0x10 /* Playback DMA Current/Base Address Register */ -#define ENVY24_MT_PCNT 0x14 /* Playback DMA Current/Base Count Register */ -#define ENVY24_MT_PTERM 0x16 /* Playback Current/Base Terminal Count Register */ -#define ENVY24_MT_PCTL 0x18 /* Playback and Record Control Register */ -#define ENVY24_MT_PCTL_RSTART 0x04 /* 1: Record start; 0: Record stop */ -#define ENVY24_MT_PCTL_PAUSE 0x02 /* 1: Pause; 0: Resume */ -#define ENVY24_MT_PCTL_PSTART 0x01 /* 1: Playback start; 0: Playback stop */ - -#define ENVY24_MT_RADDR 0x20 /* Record DMA Current/Base Address Register */ -#define ENVY24_MT_RCNT 0x24 /* Record DMA Current/Base Count Register */ -#define ENVY24_MT_RTERM 0x26 /* Record Current/Base Terminal Count Register */ -#define ENVY24_MT_RCTL 0x28 /* Record Control Register */ -#define ENVY24_MT_RCTL_RSTART 0x01 /* 1: Record start; 0: Record stop */ - -#define ENVY24_MT_PSDOUT 0x30 /* Routing Control Register for Data to PSDOUT[0:3] */ -#define ENVY24_MT_SPDOUT 0x32 /* Routing Control Register for SPDOUT */ -#define ENVY24_MT_RECORD 0x34 /* Captured (Recorded) data Routing Selection Register */ - -#define BUS_SPACE_MAXADDR_ENVY24 0x0fffffff /* Address space beyond 256MB is not supported */ -#define BUS_SPACE_MAXSIZE_ENVY24 0x3fffc /* 64k x 4byte(1dword) */ - -#define ENVY24_MT_VOLUME 0x38 /* Left/Right Volume Control Data Register */ -#define ENVY24_MT_VOLUME_L 0x007f /* Left Volume Mask */ -#define ENVY24_MT_VOLUME_R 0x7f00 /* Right Volume Mask */ - -#define ENVY24_MT_VOLIDX 0x3a /* Volume Control Stream Index Register */ -#define ENVY24_MT_VOLRATE 0x3b /* Volume Control Rate Register */ -#define ENVY24_MT_MONAC97 0x3c /* Digital Mixer Monitor Routing Control Register */ -#define ENVY24_MT_PEAKIDX 0x3e /* Peak Meter Index Register */ -#define ENVY24_MT_PEAKDAT 0x3f /* Peak Meter Data Register */ - -/* -------------------------------------------------------------------- */ +/* + These map values are refferd from ALSA sound driver. +*/ +/* ENVY24 configuration E2PROM map */ +#define ENVY24HT_E2PROM_SUBVENDOR 0x02 +#define ENVY24HT_E2PROM_SUBDEVICE 0x00 +#define ENVY24HT_E2PROM_SIZE 0x04 +#define ENVY24HT_E2PROM_VERSION 0x05 +#define ENVY24HT_E2PROM_SCFG 0x06 +#define ENVY24HT_E2PROM_ACL 0x07 +#define ENVY24HT_E2PROM_I2S 0x08 +#define ENVY24HT_E2PROM_SPDIF 0x09 +#define ENVY24HT_E2PROM_GPIOMASK 0x0d +#define ENVY24HT_E2PROM_GPIOSTATE 0x10 +#define ENVY24HT_E2PROM_GPIODIR 0x0a /* ENVY24 mixer channel defines */ /* @@ -370,113 +149,35 @@ able to use for this. If system has consumer AC'97 output, AC'97 line is used as master mixer, and it is able to control. */ -#define ENVY24_CHAN_NUM 11 /* Play * 5 + Record * 5 + Mix * 1 */ - -#define ENVY24_CHAN_PLAY_DAC1 0 -#define ENVY24_CHAN_PLAY_DAC2 1 -#define ENVY24_CHAN_PLAY_DAC3 2 -#define ENVY24_CHAN_PLAY_DAC4 3 -#define ENVY24_CHAN_PLAY_SPDIF 4 -#define ENVY24_CHAN_REC_ADC1 5 -#define ENVY24_CHAN_REC_ADC2 6 -#define ENVY24_CHAN_REC_ADC3 7 -#define ENVY24_CHAN_REC_ADC4 8 -#define ENVY24_CHAN_REC_SPDIF 9 -#define ENVY24_CHAN_REC_MIX 10 - -#define ENVY24_MIX_MASK 0x3ff -#define ENVY24_MIX_REC_MASK 0x3e0 +#define ENVY24HT_CHAN_NUM 11 /* Play * 5 + Record * 5 + Mix * 1 */ + +#define ENVY24HT_CHAN_PLAY_DAC1 0 +#define ENVY24HT_CHAN_PLAY_DAC2 1 +#define ENVY24HT_CHAN_PLAY_DAC3 2 +#define ENVY24HT_CHAN_PLAY_DAC4 3 +#define ENVY24HT_CHAN_PLAY_SPDIF 4 +#define ENVY24HT_CHAN_REC_ADC1 5 +#define ENVY24HT_CHAN_REC_ADC2 6 +#define ENVY24HT_CHAN_REC_ADC3 7 +#define ENVY24HT_CHAN_REC_ADC4 8 +#define ENVY24HT_CHAN_REC_SPDIF 9 +#define ENVY24HT_CHAN_REC_MIX 10 + +#define ENVY24HT_MIX_MASK 0x3ff +#define ENVY24HT_MIX_REC_MASK 0x3e0 /* volume value constants */ -#define ENVY24_VOL_MAX 0 /* 0db(negate) */ -#define ENVY24_VOL_MIN 96 /* -144db(negate) */ -#define ENVY24_VOL_MUTE 127 /* mute */ +#define ENVY24HT_VOL_MAX 0 /* 0db(negate) */ +#define ENVY24HT_VOL_MIN 96 /* -144db(negate) */ +#define ENVY24HT_VOL_MUTE 127 /* mute */ -/* -------------------------------------------------------------------- */ - -/* ENVY24 routing control defines */ -/* - ENVY24 has input->output data routing matrix switch. But original ENVY24 - matrix control is so complex. So, in this driver, matrix control is - defined 4 parameters. - - 1: output DAC channels (include S/PDIF output) - 2: output data classes - a. direct output from DMA - b. MIXER output which mixed the DMA outputs and input channels - (NOTICE: this class is able to set only DAC-1 and S/PDIF output) - c. direct input from ADC - d. direct input from S/PDIF - 3: input ADC channel selection(when 2:c. is selected) - 4: left/right reverse - - These parameters matrix is bit reduced from original ENVY24 matrix - pattern(ex. route different ADC input to one DAC). But almost case - this is enough to use. -*/ -#define ENVY24_ROUTE_DAC_1 0 -#define ENVY24_ROUTE_DAC_2 1 -#define ENVY24_ROUTE_DAC_3 2 -#define ENVY24_ROUTE_DAC_4 3 -#define ENVY24_ROUTE_DAC_SPDIF 4 - -#define ENVY24_ROUTE_CLASS_DMA 0 -#define ENVY24_ROUTE_CLASS_MIX 1 -#define ENVY24_ROUTE_CLASS_ADC 2 -#define ENVY24_ROUTE_CLASS_SPDIF 3 - -#define ENVY24_ROUTE_ADC_1 0 -#define ENVY24_ROUTE_ADC_2 1 -#define ENVY24_ROUTE_ADC_3 2 -#define ENVY24_ROUTE_ADC_4 3 - -#define ENVY24_ROUTE_NORMAL 0 -#define ENVY24_ROUTE_REVERSE 1 -#define ENVY24_ROUTE_LEFT 0 -#define ENVY24_ROUTE_RIGHT 1 - -/* -------------------------------------------------------------------- */ - -/* - These map values are refferd from ALSA sound driver. -*/ -/* ENVY24 configuration E2PROM map */ -#define ENVY24_E2PROM_SUBVENDOR 0x00 -#define ENVY24_E2PROM_SUBDEVICE 0x02 -#define ENVY24_E2PROM_SIZE 0x04 -#define ENVY24_E2PROM_VERSION 0x05 -#define ENVY24_E2PROM_SCFG 0x06 -#define ENVY24_E2PROM_ACL 0x07 -#define ENVY24_E2PROM_I2S 0x08 -#define ENVY24_E2PROM_SPDIF 0x09 -#define ENVY24_E2PROM_GPIOMASK 0x0a -#define ENVY24_E2PROM_GPIOSTATE 0x0b -#define ENVY24_E2PROM_GPIODIR 0x0c -#define ENVY24_E2PROM_AC97MAIN 0x0d -#define ENVY24_E2PROM_AC97PCM 0x0f -#define ENVY24_E2PROM_AC97REC 0x11 -#define ENVY24_E2PROM_AC97RECSRC 0x13 -#define ENVY24_E2PROM_DACID 0x14 -#define ENVY24_E2PROM_ADCID 0x18 -#define ENVY24_E2PROM_EXTRA 0x1c - -/* GPIO connect map of M-Audio Delta series */ -#define ENVY24_GPIO_CS84X4_PRO 0x01 -#define ENVY24_GPIO_CS8414_STATUS 0x02 -#define ENVY24_GPIO_CS84X4_CLK 0x04 -#define ENVY24_GPIO_CS84X4_DATA 0x08 -#define ENVY24_GPIO_AK4524_CDTI 0x10 /* this value is duplicated to input select */ -#define ENVY24_GPIO_AK4524_CCLK 0x20 -#define ENVY24_GPIO_AK4524_CS0 0x40 -#define ENVY24_GPIO_AK4524_CS1 0x80 - -/* M-Audio Delta series S/PDIF(CS84[01]4) control pin values */ -#define ENVY24_CS8404_PRO_RATE 0x18 -#define ENVY24_CS8404_PRO_RATE32 0x00 -#define ENVY24_CS8404_PRO_RATE441 0x10 -#define ENVY24_CS8404_PRO_RATE48 0x08 +#define BUS_SPACE_MAXADDR_ENVY24 0x0fffffff /* Address space beyond 256MB is not + supported */ +#define BUS_SPACE_MAXSIZE_ENVY24 0x3fffc /* 64k x 4byte(1dword) */ -/* M-Audio Delta series parameter */ -#define ENVY24_DELTA_AK4524_CIF 0 +#define ENVY24HT_CCS_GPIO_HDATA 0x1E +#define ENVY24HT_CCS_GPIO_LDATA 0x14 +#define ENVY24HT_CCS_GPIO_LMASK 0x16 +#define ENVY24HT_CCS_GPIO_HMASK 0x1F +#define ENVY24HT_CCS_GPIO_CTLDIR 0x18 -/* end of file */ |
