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| author | jhibbits <jhibbits@FreeBSD.org> | 2017-07-14 01:22:27 +0000 |
|---|---|---|
| committer | jhibbits <jhibbits@FreeBSD.org> | 2017-07-14 01:22:27 +0000 |
| commit | 3ee4f70beb2a4abd85aa0baa83fc0cf3261628f8 (patch) | |
| tree | b87cfec77770483ed1c0f01050c98ae24c64f4a5 | |
| parent | beb6e601f955227a6fabfe966b7518a8c9cd0a96 (diff) | |
| download | FreeBSD-src-3ee4f70beb2a4abd85aa0baa83fc0cf3261628f8.zip FreeBSD-src-3ee4f70beb2a4abd85aa0baa83fc0cf3261628f8.tar.gz | |
MFC r320392:
Disable interrupts when updating the TLB
| -rw-r--r-- | sys/powerpc/booke/pmap.c | 10 |
1 files changed, 10 insertions, 0 deletions
diff --git a/sys/powerpc/booke/pmap.c b/sys/powerpc/booke/pmap.c index 616601b..ffa17f4 100644 --- a/sys/powerpc/booke/pmap.c +++ b/sys/powerpc/booke/pmap.c @@ -3150,10 +3150,14 @@ tlb0_print_tlbentries(void) void tlb1_read_entry(tlb_entry_t *entry, unsigned int slot) { + register_t msr; uint32_t mas0; KASSERT((entry != NULL), ("%s(): Entry is NULL!", __func__)); + msr = mfmsr(); + mtmsr(msr & ~PSL_EE); + mas0 = MAS0_TLBSEL(1) | MAS0_ESEL(slot); mtspr(SPR_MAS0, mas0); __asm __volatile("isync; tlbre"); @@ -3172,6 +3176,7 @@ tlb1_read_entry(tlb_entry_t *entry, unsigned int slot) entry->mas7 = 0; break; } + mtmsr(msr); entry->virt = entry->mas2 & MAS2_EPN_MASK; entry->phys = ((vm_paddr_t)(entry->mas7 & MAS7_RPN) << 32) | @@ -3187,6 +3192,7 @@ tlb1_read_entry(tlb_entry_t *entry, unsigned int slot) static void tlb1_write_entry(tlb_entry_t *e, unsigned int idx) { + register_t msr; uint32_t mas0; //debugf("tlb1_write_entry: s\n"); @@ -3195,6 +3201,9 @@ tlb1_write_entry(tlb_entry_t *e, unsigned int idx) mas0 = MAS0_TLBSEL(1) | MAS0_ESEL(idx); //debugf("tlb1_write_entry: mas0 = 0x%08x\n", mas0); + msr = mfmsr(); + mtmsr(msr & ~PSL_EE); + mtspr(SPR_MAS0, mas0); __asm __volatile("isync"); mtspr(SPR_MAS1, e->mas1); @@ -3218,6 +3227,7 @@ tlb1_write_entry(tlb_entry_t *e, unsigned int idx) } __asm __volatile("tlbwe; isync; msync"); + mtmsr(msr); //debugf("tlb1_write_entry: e\n"); } |
