Rewrite the pc98 bus_space stuff.

The type of bus_space_tag_t is now a pointer to bus_space_tag structure,
and the bus_space_tag structure saves pointers to functions for direct
access and relocate access.

Added bsh_bam member to the bus_space_handle structure, it saves access
method either direct access or relocate access which is called by
bus_space_* functions.

Added the mecia device support. If the bs_da and bs_ra in bus tag are set
NEPC_io_space_tag and NEPC_mem_space_tag respectively, new bus_space stuff
changes the register of mecia automatically for 16bit access.

Obtained from:	NetBSD/pc98

16 files changed, 4060 insertions, 1386 deletions

diff --git a/sys/amd64/amd64/genassym.c b/sys/amd64/amd64/genassym.c
index ab8a32d..5e0d93a 100644
--- a/sys/amd64/amd64/genassym.c
+++ b/sys/amd64/amd64/genassym.c
@@ -215,3 +215,10 @@ ASSYM(VM86_FRAMESIZE, sizeof(struct vm86frame));
 ASSYM(MTX_LOCK, offsetof(struct mtx, mtx_lock));
 ASSYM(MTX_RECURSECNT, offsetof(struct mtx, mtx_recurse));
 ASSYM(MTX_SAVECRIT, offsetof(struct mtx, mtx_savecrit));
+
+#ifdef PC98
+#include <machine/bus.h>
+
+ASSYM(BUS_SPACE_HANDLE_BASE, offsetof(struct bus_space_handle, bsh_base));
+ASSYM(BUS_SPACE_HANDLE_IAT, offsetof(struct bus_space_handle, bsh_iat));
+#endif
diff --git a/sys/amd64/amd64/legacy.c b/sys/amd64/amd64/legacy.c
index ce2c9cd..2d7e8ca 100644
--- a/sys/amd64/amd64/legacy.c
+++ b/sys/amd64/amd64/legacy.c
@@ -451,10 +451,13 @@ nexus_alloc_resource(device_t bus, device_t child, int type, int *rid,
 #ifdef PC98
 		/* PC-98: the type of bus_space_handle_t is the structure. */
 		rv->r_bushandle->bsh_base = rv->r_start;
-		rv->r_bushandle->bsh_iat = NULL;
+		rv->r_bushandle->bsh_maxiatsz = BUS_SPACE_IAT_MAXSIZE;
 		rv->r_bushandle->bsh_iatsz = 0;
 		rv->r_bushandle->bsh_res = NULL;
 		rv->r_bushandle->bsh_ressz = 0;
+
+		/* default: direct access */
+		rv->r_bushandle->bsh_bam = rv->r_bustag->bs_da;
 #else
 		/* IBM-PC: the type of bus_space_handle_t is u_int */
 		rman_set_bushandle(rv, rv->r_start);
@@ -504,10 +507,13 @@ nexus_activate_resource(device_t bus, device_t child, int type, int rid,
 #ifdef PC98
 		/* PC-98: the type of bus_space_handle_t is the structure. */
 		r->r_bushandle->bsh_base = (bus_addr_t) vaddr;
-		r->r_bushandle->bsh_iat = NULL;
+		r->r_bushandle->bsh_maxiatsz = BUS_SPACE_IAT_MAXSIZE;
 		r->r_bushandle->bsh_iatsz = 0;
 		r->r_bushandle->bsh_res = NULL;
 		r->r_bushandle->bsh_ressz = 0;
+
+		/* default: direct access */
+		r->r_bushandle->bsh_bam = r->r_bustag->bs_da;
 #else
 		/* IBM-PC: the type of bus_space_handle_t is u_int */
 		rman_set_bushandle(r, (bus_space_handle_t) vaddr);
diff --git a/sys/amd64/amd64/nexus.c b/sys/amd64/amd64/nexus.c
index ce2c9cd..2d7e8ca 100644
--- a/sys/amd64/amd64/nexus.c
+++ b/sys/amd64/amd64/nexus.c
@@ -451,10 +451,13 @@ nexus_alloc_resource(device_t bus, device_t child, int type, int *rid,
 #ifdef PC98
 		/* PC-98: the type of bus_space_handle_t is the structure. */
 		rv->r_bushandle->bsh_base = rv->r_start;
-		rv->r_bushandle->bsh_iat = NULL;
+		rv->r_bushandle->bsh_maxiatsz = BUS_SPACE_IAT_MAXSIZE;
 		rv->r_bushandle->bsh_iatsz = 0;
 		rv->r_bushandle->bsh_res = NULL;
 		rv->r_bushandle->bsh_ressz = 0;
+
+		/* default: direct access */
+		rv->r_bushandle->bsh_bam = rv->r_bustag->bs_da;
 #else
 		/* IBM-PC: the type of bus_space_handle_t is u_int */
 		rman_set_bushandle(rv, rv->r_start);
@@ -504,10 +507,13 @@ nexus_activate_resource(device_t bus, device_t child, int type, int rid,
 #ifdef PC98
 		/* PC-98: the type of bus_space_handle_t is the structure. */
 		r->r_bushandle->bsh_base = (bus_addr_t) vaddr;
-		r->r_bushandle->bsh_iat = NULL;
+		r->r_bushandle->bsh_maxiatsz = BUS_SPACE_IAT_MAXSIZE;
 		r->r_bushandle->bsh_iatsz = 0;
 		r->r_bushandle->bsh_res = NULL;
 		r->r_bushandle->bsh_ressz = 0;
+
+		/* default: direct access */
+		r->r_bushandle->bsh_bam = r->r_bustag->bs_da;
 #else
 		/* IBM-PC: the type of bus_space_handle_t is u_int */
 		rman_set_bushandle(r, (bus_space_handle_t) vaddr);
diff --git a/sys/amd64/isa/isa.c b/sys/amd64/isa/isa.c
index 1fd0c3c..4888029 100644
--- a/sys/amd64/isa/isa.c
+++ b/sys/amd64/isa/isa.c
@@ -197,19 +197,24 @@ isa_alloc_resourcev(device_t child, int type, int *rid,
 int
 isa_load_resourcev(struct resource *re, bus_addr_t *res, bus_size_t count)
 {
-	bus_addr_t	*addr;
+	bus_addr_t	start;
 	int		i;
 
-	addr = malloc(sizeof (bus_addr_t) * count, M_DEVBUF, M_NOWAIT);
-	if (addr == NULL)
-		return 1;
+	if (count > re->r_bushandle->bsh_maxiatsz) {
+		printf("isa_load_resourcev: map size too large\n");
+		return EINVAL;
+	}
 
-	for (i = 0; i < count; i++)
-		addr[i] = rman_get_start(re) + res[i];
+	start = rman_get_start(re);
+	for (i = 0; i < re->r_bushandle->bsh_maxiatsz; i++) {
+		if (i < count)
+			re->r_bushandle->bsh_iat[i] = start + res[i];
+		else
+			re->r_bushandle->bsh_iat[i] = start;
+	}
 
-	rman_set_bustag(re, I386_BUS_SPACE_IO_IND);
-	re->r_bushandle->bsh_iat = addr;
 	re->r_bushandle->bsh_iatsz = count;
+	re->r_bushandle->bsh_bam = re->r_bustag->bs_ra;	/* relocate access */
 
 	return 0;
 }
@@ -233,8 +238,6 @@ isa_release_resource(device_t bus, device_t child, int type, int rid,
 				      r->r_bushandle->bsh_res[i]);
 	if (r->r_bushandle->bsh_res != NULL)
 		free(r->r_bushandle->bsh_res, M_DEVBUF);
-	if (r->r_bushandle->bsh_iat != NULL)
-		free(r->r_bushandle->bsh_iat, M_DEVBUF);
 #endif
 	return resource_list_release(rl, bus, child, type, rid, r);
 }
diff --git a/sys/conf/files.pc98 b/sys/conf/files.pc98
index ddf06a9..ff3548f 100644
--- a/sys/conf/files.pc98
+++ b/sys/conf/files.pc98
@@ -380,6 +380,8 @@ netsmb/smb_trantcp.c		optional	netsmb
 netsmb/smb_usr.c		optional	netsmb
 pc98/apm/apm.c			optional	apm
 pc98/apm/apm_bioscall.s		optional	apm
+pc98/i386/busio.s		standard
+pc98/i386/busiosubr.c		standard
 pc98/i386/machdep.c		standard
 #pc98/i386/userconfig.c		optional	userconfig
 pc98/pc98/atapi.c		optional	wdc
diff --git a/sys/conf/options.pc98 b/sys/conf/options.pc98
index 2716795..ef5d718 100644
--- a/sys/conf/options.pc98
+++ b/sys/conf/options.pc98
@@ -208,6 +208,7 @@ LINE30			opt_syscons.h
 DEV_NPX			opt_npx.h
 DEV_APM			opt_apm.h
 DEV_SPLASH		opt_splash.h
+DEV_MECIA		opt_mecia.h
 
 # SMB/CIFS requester
 NETSMB			opt_netsmb.h
diff --git a/sys/i386/i386/genassym.c b/sys/i386/i386/genassym.c
index ab8a32d..5e0d93a 100644
--- a/sys/i386/i386/genassym.c
+++ b/sys/i386/i386/genassym.c
@@ -215,3 +215,10 @@ ASSYM(VM86_FRAMESIZE, sizeof(struct vm86frame));
 ASSYM(MTX_LOCK, offsetof(struct mtx, mtx_lock));
 ASSYM(MTX_RECURSECNT, offsetof(struct mtx, mtx_recurse));
 ASSYM(MTX_SAVECRIT, offsetof(struct mtx, mtx_savecrit));
+
+#ifdef PC98
+#include <machine/bus.h>
+
+ASSYM(BUS_SPACE_HANDLE_BASE, offsetof(struct bus_space_handle, bsh_base));
+ASSYM(BUS_SPACE_HANDLE_IAT, offsetof(struct bus_space_handle, bsh_iat));
+#endif
diff --git a/sys/i386/i386/legacy.c b/sys/i386/i386/legacy.c
index ce2c9cd..2d7e8ca 100644
--- a/sys/i386/i386/legacy.c
+++ b/sys/i386/i386/legacy.c
@@ -451,10 +451,13 @@ nexus_alloc_resource(device_t bus, device_t child, int type, int *rid,
 #ifdef PC98
 		/* PC-98: the type of bus_space_handle_t is the structure. */
 		rv->r_bushandle->bsh_base = rv->r_start;
-		rv->r_bushandle->bsh_iat = NULL;
+		rv->r_bushandle->bsh_maxiatsz = BUS_SPACE_IAT_MAXSIZE;
 		rv->r_bushandle->bsh_iatsz = 0;
 		rv->r_bushandle->bsh_res = NULL;
 		rv->r_bushandle->bsh_ressz = 0;
+
+		/* default: direct access */
+		rv->r_bushandle->bsh_bam = rv->r_bustag->bs_da;
 #else
 		/* IBM-PC: the type of bus_space_handle_t is u_int */
 		rman_set_bushandle(rv, rv->r_start);
@@ -504,10 +507,13 @@ nexus_activate_resource(device_t bus, device_t child, int type, int rid,
 #ifdef PC98
 		/* PC-98: the type of bus_space_handle_t is the structure. */
 		r->r_bushandle->bsh_base = (bus_addr_t) vaddr;
-		r->r_bushandle->bsh_iat = NULL;
+		r->r_bushandle->bsh_maxiatsz = BUS_SPACE_IAT_MAXSIZE;
 		r->r_bushandle->bsh_iatsz = 0;
 		r->r_bushandle->bsh_res = NULL;
 		r->r_bushandle->bsh_ressz = 0;
+
+		/* default: direct access */
+		r->r_bushandle->bsh_bam = r->r_bustag->bs_da;
 #else
 		/* IBM-PC: the type of bus_space_handle_t is u_int */
 		rman_set_bushandle(r, (bus_space_handle_t) vaddr);
diff --git a/sys/i386/i386/nexus.c b/sys/i386/i386/nexus.c
index ce2c9cd..2d7e8ca 100644
--- a/sys/i386/i386/nexus.c
+++ b/sys/i386/i386/nexus.c
@@ -451,10 +451,13 @@ nexus_alloc_resource(device_t bus, device_t child, int type, int *rid,
 #ifdef PC98
 		/* PC-98: the type of bus_space_handle_t is the structure. */
 		rv->r_bushandle->bsh_base = rv->r_start;
-		rv->r_bushandle->bsh_iat = NULL;
+		rv->r_bushandle->bsh_maxiatsz = BUS_SPACE_IAT_MAXSIZE;
 		rv->r_bushandle->bsh_iatsz = 0;
 		rv->r_bushandle->bsh_res = NULL;
 		rv->r_bushandle->bsh_ressz = 0;
+
+		/* default: direct access */
+		rv->r_bushandle->bsh_bam = rv->r_bustag->bs_da;
 #else
 		/* IBM-PC: the type of bus_space_handle_t is u_int */
 		rman_set_bushandle(rv, rv->r_start);
@@ -504,10 +507,13 @@ nexus_activate_resource(device_t bus, device_t child, int type, int rid,
 #ifdef PC98
 		/* PC-98: the type of bus_space_handle_t is the structure. */
 		r->r_bushandle->bsh_base = (bus_addr_t) vaddr;
-		r->r_bushandle->bsh_iat = NULL;
+		r->r_bushandle->bsh_maxiatsz = BUS_SPACE_IAT_MAXSIZE;
 		r->r_bushandle->bsh_iatsz = 0;
 		r->r_bushandle->bsh_res = NULL;
 		r->r_bushandle->bsh_ressz = 0;
+
+		/* default: direct access */
+		r->r_bushandle->bsh_bam = r->r_bustag->bs_da;
 #else
 		/* IBM-PC: the type of bus_space_handle_t is u_int */
 		rman_set_bushandle(r, (bus_space_handle_t) vaddr);
diff --git a/sys/i386/include/bus_pc98.h b/sys/i386/include/bus_pc98.h
index a9a2465..a370bf6 100644
--- a/sys/i386/include/bus_pc98.h
+++ b/sys/i386/include/bus_pc98.h
@@ -1,73 +1,47 @@
+/* $FreeBSD$ */
+/*	$NecBSD: busio.h,v 3.25.4.2.2.1 2000/06/12 03:53:08 honda Exp $	*/
 /*	$NetBSD: bus.h,v 1.12 1997/10/01 08:25:15 fvdl Exp $	*/
 
-/*-
- * Copyright (c) 1996, 1997 The NetBSD Foundation, Inc.
- * All rights reserved.
- *
- * This code is derived from software contributed to The NetBSD Foundation
- * by Jason R. Thorpe of the Numerical Aerospace Simulation Facility,
- * NASA Ames Research Center.
+/*
+ * [NetBSD for NEC PC-98 series]
+ *  Copyright (c) 1997, 1998
+ *	NetBSD/pc98 porting staff. All rights reserved.
  *
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions
- * are met:
- * 1. Redistributions of source code must retain the above copyright
- *    notice, this list of conditions and the following disclaimer.
- * 2. Redistributions in binary form must reproduce the above copyright
- *    notice, this list of conditions and the following disclaimer in the
- *    documentation and/or other materials provided with the distribution.
- * 3. All advertising materials mentioning features or use of this software
- *    must display the following acknowledgement:
- *	This product includes software developed by the NetBSD
- *	Foundation, Inc. and its contributors.
- * 4. Neither the name of The NetBSD Foundation nor the names of its
- *    contributors may be used to endorse or promote products derived
- *    from this software without specific prior written permission.
+ * [Ported for FreeBSD]
+ *  Copyright (c) 2001
+ *	TAKAHASHI Yoshihiro. All rights reserved.
  *
- * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS
- * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
- * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
- * PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS
- * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
- * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
- * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
- * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
- * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
- * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+ *  Redistribution and use in source and binary forms, with or without
+ *  modification, are permitted provided that the following conditions
+ *  are met:
+ *  1. Redistributions of source code must retain the above copyright
+ *     notice, this list of conditions and the following disclaimer.
+ *  2. Redistributions in binary form must reproduce the above copyright
+ *     notice, this list of conditions and the following disclaimer in the
+ *     documentation and/or other materials provided with the distribution.
+ *  3. The name of the author may not be used to endorse or promote products
+ *     derived from this software without specific prior written permission.
+ * 
+ * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
+ * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
+ * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
+ * DISCLAIMED.  IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT,
+ * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
+ * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
  * POSSIBILITY OF SUCH DAMAGE.
  */
 
 /*
- * Copyright (c) 1996 Charles M. Hannum.  All rights reserved.
- * Copyright (c) 1996 Christopher G. Demetriou.  All rights reserved.
- *
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions
- * are met:
- * 1. Redistributions of source code must retain the above copyright
- *    notice, this list of conditions and the following disclaimer.
- * 2. Redistributions in binary form must reproduce the above copyright
- *    notice, this list of conditions and the following disclaimer in the
- *    documentation and/or other materials provided with the distribution.
- * 3. All advertising materials mentioning features or use of this software
- *    must display the following acknowledgement:
- *      This product includes software developed by Christopher G. Demetriou
- *	for the NetBSD Project.
- * 4. The name of the author may not be used to endorse or promote products
- *    derived from this software without specific prior written permission
+ * Copyright (c) 1997, 1998
+ *	Naofumi HONDA.  All rights reserved.
  *
- * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
- * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
- * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
- * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
- * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
- * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
- * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
- * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
- * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
- * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ * This module support generic bus address relocation mechanism.
+ * To reduce a function call overhead, we employ pascal call methods.
  */
-/* $FreeBSD$ */
 
 #ifndef _I386_BUS_PC98_H_
 #define _I386_BUS_PC98_H_
@@ -75,23 +49,6 @@
 #include <machine/cpufunc.h>
 
 /*
- * To remain compatible with NetBSD's interface, default to both memio and
- * pio when neither of them is defined.
- */ 
-#if !defined(_I386_BUS_PIO_H_) && !defined(_I386_BUS_PIO_IND_H_) && !defined(_I386_BUS_MEMIO_H_)
-#define _I386_BUS_PIO_H_
-#define _I386_BUS_PIO_IND_H_
-#define _I386_BUS_MEMIO_H_
-#endif
-
-/*
- * Values for the i386 bus space tag, not to be used directly by MI code.
- */
-#define	I386_BUS_SPACE_IO	0	/* space is i/o space */
-#define I386_BUS_SPACE_MEM	1	/* space is mem space */
-#define	I386_BUS_SPACE_IO_IND	2	/* space is i/o space */
-
-/*
  * Bus address and size types
  */
 typedef u_int bus_addr_t;
@@ -106,1318 +63,389 @@ typedef u_int bus_size_t;
 
 #define BUS_SPACE_UNRESTRICTED	(~0)
 
+#define BUS_SPACE_IAT_MAXSIZE	32
+
 /*
  * Access methods for bus resources and address space.
  */
 struct resource;
 
-typedef	int bus_space_tag_t;
-typedef	struct {
-    bus_addr_t		bsh_base;
-    bus_addr_t		*bsh_iat;
-    size_t		bsh_iatsz;
-    struct resource	**bsh_res;
-    size_t		bsh_ressz;
-}* bus_space_handle_t;
-
 /*
- * Map a region of device bus space into CPU virtual address space.
+ * bus space tag
  */
-
-#define	BUS_SPACE_MAP_CACHEABLE		0x01
-#define	BUS_SPACE_MAP_LINEAR		0x02
-
-int	bus_space_map(bus_space_tag_t t, bus_addr_t addr, bus_size_t size,
-		      int flags, bus_space_handle_t *bshp);
+#define	_PASCAL_CALL	__P((void))
+
+#define	_BUS_SPACE_CALL_FUNCS_TAB(NAME,TYPE,BWN) \
+	NAME##_space_read_##BWN##, 				\
+	NAME##_space_read_multi_##BWN##, 			\
+	NAME##_space_read_region_##BWN##,			\
+	NAME##_space_write_##BWN##, 				\
+	NAME##_space_write_multi_##BWN##, 			\
+	NAME##_space_write_region_##BWN##,			\
+	NAME##_space_set_multi_##BWN##,				\
+	NAME##_space_set_region_##BWN##,			\
+	NAME##_space_copy_region_##BWN
+
+#define	_BUS_SPACE_CALL_FUNCS_PROTO(NAME,TYPE,BWN) \
+	TYPE NAME##_space_read_##BWN _PASCAL_CALL;		\
+	void NAME##_space_read_multi_##BWN _PASCAL_CALL;	\
+	void NAME##_space_read_region_##BWN _PASCAL_CALL;	\
+	void NAME##_space_write_##BWN _PASCAL_CALL;		\
+	void NAME##_space_write_multi_##BWN _PASCAL_CALL;	\
+	void NAME##_space_write_region_##BWN _PASCAL_CALL;	\
+	void NAME##_space_set_multi_##BWN _PASCAL_CALL;		\
+	void NAME##_space_set_region_##BWN _PASCAL_CALL;	\
+	void NAME##_space_copy_region_##BWN _PASCAL_CALL;
+
+#define	_BUS_SPACE_CALL_FUNCS(NAME,TYPE,BWN) \
+	TYPE (*##NAME##_read_##BWN) _PASCAL_CALL;		\
+	void (*##NAME##_read_multi_##BWN) _PASCAL_CALL;		\
+	void (*##NAME##_read_region_##BWN) _PASCAL_CALL;	\
+	void (*##NAME##_write_##BWN) _PASCAL_CALL;		\
+	void (*##NAME##_write_multi_##BWN) _PASCAL_CALL;	\
+	void (*##NAME##_write_region_##BWN) _PASCAL_CALL;	\
+	void (*##NAME##_set_multi_##BWN) _PASCAL_CALL;		\
+	void (*##NAME##_set_region_##BWN) _PASCAL_CALL;		\
+	void (*##NAME##_copy_region_##BWN) _PASCAL_CALL;	
+
+struct bus_space_access_methods {
+	/* 8 bits access methods */
+	_BUS_SPACE_CALL_FUNCS(bs,u_int8_t,1)
+
+	/* 16 bits access methods */
+	_BUS_SPACE_CALL_FUNCS(bs,u_int16_t,2)
+
+	/* 32 bits access methods */
+	_BUS_SPACE_CALL_FUNCS(bs,u_int32_t,4)
+};
+
+struct bus_space_tag {
+#define	BUS_SPACE_IO	0
+#define	BUS_SPACE_MEM	1
+	u_int	bs_tag;			/* bus space flags */
+
+	struct bus_space_access_methods bs_da;	/* direct access */
+	struct bus_space_access_methods bs_ra;	/* relocate access */
+#if	0
+	struct bus_space_access_methods bs_ida;	/* indexed direct access */
+#endif
+};
+typedef struct bus_space_tag *bus_space_tag_t;
 
 /*
- * Unmap a region of device bus space.
+ * Values for the i386 bus space tag, not to be used directly by MI code.
  */
+extern struct bus_space_tag SBUS_io_space_tag;
+extern struct bus_space_tag SBUS_mem_space_tag;
 
-void	bus_space_unmap(bus_space_tag_t t, bus_space_handle_t bsh,
-			bus_size_t size);
+#define I386_BUS_SPACE_IO	(&SBUS_io_space_tag)
+#define I386_BUS_SPACE_MEM	(&SBUS_mem_space_tag)
 
 /*
- * Get a new handle for a subregion of an already-mapped area of bus space.
+ * bus space handle
  */
+struct bus_space_handle {
+	bus_addr_t	bsh_base;
+	bus_addr_t	bsh_iat[BUS_SPACE_IAT_MAXSIZE];
+	size_t		bsh_maxiatsz;
+	size_t		bsh_iatsz;
 
-int	bus_space_subregion(bus_space_tag_t t, bus_space_handle_t bsh,
-			    bus_size_t offset, bus_size_t size,
-			    bus_space_handle_t *nbshp);
-
-/*
- * Allocate a region of memory that is accessible to devices in bus space.
- */
+	struct resource	**bsh_res;
+	size_t		bsh_ressz;
 
-int	bus_space_alloc(bus_space_tag_t t, bus_addr_t rstart,
-			bus_addr_t rend, bus_size_t size, bus_size_t align,
-			bus_size_t boundary, int flags, bus_addr_t *addrp,
-			bus_space_handle_t *bshp);
+	struct bus_space_access_methods bsh_bam;
+};
+typedef struct bus_space_handle *bus_space_handle_t;
 
 /*
- * Free a region of bus space accessible memory.
+ * Access methods for bus resources and address space.
  */
-
-void	bus_space_free(bus_space_tag_t t, bus_space_handle_t bsh,
-		       bus_size_t size);
-
-#if defined(_I386_BUS_PIO_H_) || defined(_I386_BUS_PIO_IND_H_) || defined(_I386_BUS_MEMIO_H_)
+#define	_BUS_ACCESS_METHODS_PROTO(TYPE,BWN) \
+	static __inline TYPE bus_space_read_##BWN 			\
+	__P((bus_space_tag_t, bus_space_handle_t, bus_size_t offset));	\
+	static __inline void bus_space_read_multi_##BWN			\
+	__P((bus_space_tag_t, bus_space_handle_t,			\
+	     bus_size_t, TYPE *, size_t));				\
+	static __inline void bus_space_read_region_##BWN		\
+	__P((bus_space_tag_t, bus_space_handle_t,			\
+	     bus_size_t, TYPE *, size_t));				\
+	static __inline void bus_space_write_##BWN			\
+	__P((bus_space_tag_t, bus_space_handle_t, bus_size_t, TYPE));	\
+	static __inline void bus_space_write_multi_##BWN		\
+	__P((bus_space_tag_t, bus_space_handle_t,			\
+	     bus_size_t, const TYPE *, size_t));			\
+	static __inline void bus_space_write_region_##BWN		\
+	__P((bus_space_tag_t, bus_space_handle_t,			\
+	     bus_size_t, const TYPE *, size_t));			\
+	static __inline void bus_space_set_multi_##BWN			\
+	__P((bus_space_tag_t, bus_space_handle_t, bus_size_t, TYPE, size_t));\
+	static __inline void bus_space_set_region_##BWN			\
+	__P((bus_space_tag_t, bus_space_handle_t, bus_size_t, TYPE, size_t));\
+	static __inline void bus_space_copy_region_##BWN		\
+	__P((bus_space_tag_t, bus_space_handle_t, bus_size_t,		\
+	     bus_space_handle_t, bus_size_t, size_t));
+
+_BUS_ACCESS_METHODS_PROTO(u_int8_t,1)
+_BUS_ACCESS_METHODS_PROTO(u_int16_t,2)
+_BUS_ACCESS_METHODS_PROTO(u_int32_t,4)
 
 /*
- * Read a 1, 2, 4, or 8 byte quantity from bus space
- * described by tag/handle/offset.
+ * read methods
  */
-static __inline u_int8_t bus_space_read_1(bus_space_tag_t tag,
-					  bus_space_handle_t handle,
-					  bus_size_t offset);
-
-static __inline u_int16_t bus_space_read_2(bus_space_tag_t tag,
-					   bus_space_handle_t handle,
-					   bus_size_t offset);
-
-static __inline u_int32_t bus_space_read_4(bus_space_tag_t tag,
-					   bus_space_handle_t handle,
-					   bus_size_t offset);
-
-static __inline u_int8_t
-bus_space_read_1(bus_space_tag_t tag, bus_space_handle_t bsh,
-		 bus_size_t offset)
-{
-#if defined(_I386_BUS_PIO_H_)
-#if defined(_I386_BUS_PIO_IND_H_) || defined(_I386_BUS_MEMIO_H_)
-	if (tag == I386_BUS_SPACE_IO)
-#endif
-		return (inb(bsh->bsh_base + offset));
-#endif
-#if defined(_I386_BUS_PIO_IND_H_)
-#if defined(_I386_BUS_PIO_H_) || defined(_I386_BUS_MEMIO_H_)
-	if (tag == I386_BUS_SPACE_IO_IND)
-#endif
-		return (inb(bsh->bsh_iat[offset]));
-#endif
-#if defined(_I386_BUS_MEMIO_H_)
-#if defined(_I386_BUS_PIO_H_) || defined(_I386_BUS_PIO_IND_H_)
-	else
-#endif
-		return (*(volatile u_int8_t *)(bsh->bsh_base + offset));
-#endif
+#define	_BUS_SPACE_READ(TYPE,BWN)				\
+static __inline TYPE						\
+bus_space_read_##BWN##(tag, bsh, offset)			\
+	bus_space_tag_t tag;					\
+	bus_space_handle_t bsh;					\
+	bus_size_t offset;					\
+{								\
+	register TYPE result;					\
+								\
+	__asm __volatile("call *%2"  				\
+			:"=a" (result),				\
+			 "=d" (offset)				\
+			:"o" (bsh->bsh_bam.bs_read_##BWN),	\
+			 "b" (bsh),				\
+			 "1" (offset)				\
+			);					\
+								\
+	return result;						\
 }
 
-static __inline u_int16_t
-bus_space_read_2(bus_space_tag_t tag, bus_space_handle_t bsh,
-		 bus_size_t offset)
-{
-#if defined(_I386_BUS_PIO_H_)
-#if defined(_I386_BUS_PIO_IND_H_) || defined(_I386_BUS_MEMIO_H_)
-	if (tag == I386_BUS_SPACE_IO)
-#endif
-		return (inw(bsh->bsh_base + offset));
-#endif
-#if defined(_I386_BUS_PIO_IND_H_)
-#if defined(_I386_BUS_PIO_H_) || defined(_I386_BUS_MEMIO_H_)
-	if (tag == I386_BUS_SPACE_IO_IND)
-#endif
-		return (inw(bsh->bsh_iat[offset]));
-#endif
-#if defined(_I386_BUS_MEMIO_H_)
-#if defined(_I386_BUS_PIO_H_) || defined(_I386_BUS_PIO_IND_H_)
-	else
-#endif
-		return (*(volatile u_int16_t *)(bsh->bsh_base + offset));
-#endif
-}
-
-static __inline u_int32_t
-bus_space_read_4(bus_space_tag_t tag, bus_space_handle_t bsh,
-		 bus_size_t offset)
-{
-#if defined(_I386_BUS_PIO_H_)
-#if defined(_I386_BUS_PIO_IND_H_) || defined(_I386_BUS_MEMIO_H_)
-	if (tag == I386_BUS_SPACE_IO)
-#endif
-		return (inl(bsh->bsh_base + offset));
-#endif
-#if defined(_I386_BUS_PIO_IND_H_)
-#if defined(_I386_BUS_PIO_H_) || defined(_I386_BUS_MEMIO_H_)
-	if (tag == I386_BUS_SPACE_IO_IND)
-#endif
-		return (inl(bsh->bsh_iat[offset]));
-#endif
-#if defined(_I386_BUS_MEMIO_H_)
-#if defined(_I386_BUS_PIO_H_) || defined(_I386_BUS_PIO_IND_H_)
-	else
-#endif
-		return (*(volatile u_int32_t *)(bsh->bsh_base + offset));
-#endif
-}
-
-#if 0	/* Cause a link error for bus_space_read_8 */
-#define	bus_space_read_8(t, h, o)	!!! bus_space_read_8 unimplemented !!!
-#endif
+_BUS_SPACE_READ(u_int8_t,1)
+_BUS_SPACE_READ(u_int16_t,2)
+_BUS_SPACE_READ(u_int32_t,4)
 
 /*
- * Read `count' 1, 2, 4, or 8 byte quantities from bus space
- * described by tag/handle/offset and copy into buffer provided.
+ * write methods
  */
-static __inline void bus_space_read_multi_1(bus_space_tag_t tag,
-					    bus_space_handle_t bsh,
-					    bus_size_t offset, u_int8_t *addr,
-					    size_t count);
-
-static __inline void bus_space_read_multi_2(bus_space_tag_t tag,
-					    bus_space_handle_t bsh,
-					    bus_size_t offset, u_int16_t *addr,
-					    size_t count);
-
-static __inline void bus_space_read_multi_4(bus_space_tag_t tag,
-					    bus_space_handle_t bsh,
-					    bus_size_t offset, u_int32_t *addr,
-					    size_t count);
-
-static __inline void
-bus_space_read_multi_1(bus_space_tag_t tag, bus_space_handle_t bsh,
-		       bus_size_t offset, u_int8_t *addr, size_t count)
-{
-#if defined(_I386_BUS_PIO_H_)
-#if defined(_I386_BUS_PIO_IND_H_) || defined(_I386_BUS_MEMIO_H_)
-	if (tag == I386_BUS_SPACE_IO)
-#endif
-		insb(bsh->bsh_base + offset, addr, count);
-#endif
-#if defined(_I386_BUS_PIO_IND_H_)
-#if defined(_I386_BUS_PIO_H_) || defined(_I386_BUS_MEMIO_H_)
-	if (tag == I386_BUS_SPACE_IO_IND)
-#endif
-		insb(bsh->bsh_iat[offset], addr, count);
-#endif
-#if defined(_I386_BUS_MEMIO_H_)
-#if defined(_I386_BUS_PIO_H_) || defined(_I386_BUS_PIO_IND_H_)
-	if (tag == I386_BUS_SPACE_MEM)
-#endif
-	{
-		__asm __volatile("				\n\
-			cld					\n\
-		1:	movb (%2),%%al				\n\
-			stosb					\n\
-			loop 1b"				:
-		    "=D" (addr), "=c" (count)			:
-		    "r" (bsh->bsh_base + offset), "0" (addr), "1" (count) :
-		    "%eax", "memory");
-	}
-#endif
-}
-
-static __inline void
-bus_space_read_multi_2(bus_space_tag_t tag, bus_space_handle_t bsh,
-		       bus_size_t offset, u_int16_t *addr, size_t count)
-{
-#if defined(_I386_BUS_PIO_H_)
-#if defined(_I386_BUS_PIO_IND_H_) || defined(_I386_BUS_MEMIO_H_)
-	if (tag == I386_BUS_SPACE_IO)
-#endif
-		insw(bsh->bsh_base + offset, addr, count);
-#endif
-#if defined(_I386_BUS_PIO_IND_H_)
-#if defined(_I386_BUS_PIO_H_) || defined(_I386_BUS_MEMIO_H_)
-	if (tag == I386_BUS_SPACE_IO_IND)
-#endif
-		insw(bsh->bsh_iat[offset], addr, count);
-#endif
-#if defined(_I386_BUS_MEMIO_H_)
-#if defined(_I386_BUS_PIO_H_) || defined(_I386_BUS_PIO_IND_H_)
-	if (tag == I386_BUS_SPACE_MEM)
-#endif
-	{
-		__asm __volatile("				\n\
-			cld					\n\
-		1:	movw (%2),%%ax				\n\
-			stosw					\n\
-			loop 1b"				:
-		    "=D" (addr), "=c" (count)			:
-		    "r" (bsh->bsh_base + offset), "0" (addr), "1" (count) :
-		    "%eax", "memory");
-	}
-#endif
-}
-
-static __inline void
-bus_space_read_multi_4(bus_space_tag_t tag, bus_space_handle_t bsh,
-		       bus_size_t offset, u_int32_t *addr, size_t count)
-{
-#if defined(_I386_BUS_PIO_H_)
-#if defined(_I386_BUS_PIO_IND_H_) || defined(_I386_BUS_MEMIO_H_)
-	if (tag == I386_BUS_SPACE_IO)
-#endif
-		insl(bsh->bsh_base + offset, addr, count);
-#endif
-#if defined(_I386_BUS_PIO_IND_H_)
-#if defined(_I386_BUS_PIO_H_) || defined(_I386_BUS_MEMIO_H_)
-	if (tag == I386_BUS_SPACE_IO_IND)
-#endif
-		insl(bsh->bsh_iat[offset], addr, count);
-#endif
-#if defined(_I386_BUS_MEMIO_H_)
-#if defined(_I386_BUS_PIO_H_) || defined(_I386_BUS_PIO_IND_H_)
-	if (tag == I386_BUS_SPACE_MEM)
-#endif
-	{
-		__asm __volatile("				\n\
-			cld					\n\
-		1:	movl (%2),%%eax				\n\
-			stosl					\n\
-			loop 1b"				:
-		    "=D" (addr), "=c" (count)			:
-		    "r" (bsh->bsh_base + offset), "0" (addr), "1" (count) :
-		    "%eax", "memory");
-	}
-#endif
-}
-
-#if 0	/* Cause a link error for bus_space_read_multi_8 */
-#define	bus_space_read_multi_8	!!! bus_space_read_multi_8 unimplemented !!!
-#endif
+#define	_BUS_SPACE_WRITE(TYPE,BWN)				\
+static __inline void						\
+bus_space_write_##BWN##(tag, bsh, offset, val)			\
+	bus_space_tag_t tag;					\
+	bus_space_handle_t bsh;					\
+	bus_size_t offset;					\
+	TYPE val;						\
+{								\
+								\
+	__asm __volatile("call *%1"				\
+			:"=d" (offset)				\
+			:"o" (bsh->bsh_bam.bs_write_##BWN),	\
+			 "a" (val),				\
+			 "b" (bsh),				\
+			 "0" (offset)				\
+			);					\
+}								
+
+_BUS_SPACE_WRITE(u_int8_t,1)
+_BUS_SPACE_WRITE(u_int16_t,2)
+_BUS_SPACE_WRITE(u_int32_t,4)
 
 /*
- * Read `count' 1, 2, 4, or 8 byte quantities from bus space
- * described by tag/handle and starting at `offset' and copy into
- * buffer provided.
+ * multi read
  */
-static __inline void bus_space_read_region_1(bus_space_tag_t tag,
-					     bus_space_handle_t bsh,
-					     bus_size_t offset, u_int8_t *addr,
-					     size_t count);
-
-static __inline void bus_space_read_region_2(bus_space_tag_t tag,
-					     bus_space_handle_t bsh,
-					     bus_size_t offset, u_int16_t *addr,
-					     size_t count);
-
-static __inline void bus_space_read_region_4(bus_space_tag_t tag,
-					     bus_space_handle_t bsh,
-					     bus_size_t offset, u_int32_t *addr,
-					     size_t count);
-
-
-static __inline void
-bus_space_read_region_1(bus_space_tag_t tag, bus_space_handle_t bsh,
-			bus_size_t offset, u_int8_t *addr, size_t count)
-{
-#if defined(_I386_BUS_PIO_H_)
-#if defined(_I386_BUS_PIO_IND_H_) || defined(_I386_BUS_MEMIO_H_)
-	if (tag == I386_BUS_SPACE_IO)
-#endif
-	{
-		int _port_ = bsh->bsh_base + offset;		\
-		__asm __volatile("				\n\
-			cld					\n\
-		1:	inb %w2,%%al				\n\
-			stosb					\n\
-			incl %2					\n\
-			loop 1b"				:
-		    "=D" (addr), "=c" (count), "=d" (_port_)	:
-		    "0" (addr), "1" (count), "2" (_port_)	:
-		    "%eax", "memory", "cc");
-	}
-#endif
-#if defined(_I386_BUS_PIO_IND_H_)
-#if defined(_I386_BUS_PIO_H_) || defined(_I386_BUS_MEMIO_H_)
-	if (tag == I386_BUS_SPACE_IO_IND)
-#endif
-	{
-		int	i;
-		for (i = 0; i < count; i++)
-			addr[i] = inb(bsh->bsh_iat[offset + i]);
-	}
-#endif
-#if defined(_I386_BUS_MEMIO_H_)
-#if defined(_I386_BUS_PIO_H_) || defined(_I386_BUS_PIO_IND_H_)
-	if (tag == I386_BUS_SPACE_MEM)
-#endif
-	{
-		int _port_ = bsh->bsh_base + offset;		\
-		__asm __volatile("				\n\
-			cld					\n\
-			repne					\n\
-			movsb"					:
-		    "=D" (addr), "=c" (count), "=S" (_port_)	:
-		    "0" (addr), "1" (count), "2" (_port_)	:
-		    "memory", "cc");
-	}
-#endif
+#define	_BUS_SPACE_READ_MULTI(TYPE,BWN)					\
+static __inline void							\
+bus_space_read_multi_##BWN##(tag, bsh, offset, buf, cnt) 		\
+	bus_space_tag_t tag;						\
+	bus_space_handle_t bsh;						\
+	bus_size_t offset;						\
+	TYPE *buf;							\
+	size_t cnt;							\
+{									\
+									\
+	__asm __volatile("call *%3"					\
+			:"=c" (cnt),					\
+			 "=d" (offset),					\
+			 "=D" (buf)					\
+			:"o" (bsh->bsh_bam.bs_read_multi_##BWN),	\
+			 "b" (bsh),					\
+			 "0" (cnt),					\
+			 "1" (offset),					\
+			 "2" (buf)					\
+			:"memory");					\
 }
 
-static __inline void
-bus_space_read_region_2(bus_space_tag_t tag, bus_space_handle_t bsh,
-			bus_size_t offset, u_int16_t *addr, size_t count)
-{
-#if defined(_I386_BUS_PIO_H_)
-#if defined(_I386_BUS_PIO_IND_H_) || defined(_I386_BUS_MEMIO_H_)
-	if (tag == I386_BUS_SPACE_IO)
-#endif
-	{
-		int _port_ = bsh->bsh_base + offset;		\
-		__asm __volatile("				\n\
-			cld					\n\
-		1:	inw %w2,%%ax				\n\
-			stosw					\n\
-			addl $2,%2				\n\
-			loop 1b"				:
-		    "=D" (addr), "=c" (count), "=d" (_port_)	:
-		    "0" (addr), "1" (count), "2" (_port_)	:
-		    "%eax", "memory", "cc");
-	}
-#endif
-#if defined(_I386_BUS_PIO_IND_H_)
-#if defined(_I386_BUS_PIO_H_) || defined(_I386_BUS_MEMIO_H_)
-	if (tag == I386_BUS_SPACE_IO_IND)
-#endif
-	{
-		int	i;
-		for (i = 0; i < count; i += 2)
-			addr[i] = inw(bsh->bsh_iat[offset + i]);
-	}
-#endif
-#if defined(_I386_BUS_MEMIO_H_)
-#if defined(_I386_BUS_PIO_H_) || defined(_I386_BUS_PIO_IND_H_)
-	if (tag == I386_BUS_SPACE_MEM)
-#endif
-	{
-		int _port_ = bsh->bsh_base + offset;		\
-		__asm __volatile("				\n\
-			cld					\n\
-			repne					\n\
-			movsw"					:
-		    "=D" (addr), "=c" (count), "=S" (_port_)	:
-		    "0" (addr), "1" (count), "2" (_port_)	:
-		    "memory", "cc");
-	}
-#endif
-}
-
-static __inline void
-bus_space_read_region_4(bus_space_tag_t tag, bus_space_handle_t bsh,
-			bus_size_t offset, u_int32_t *addr, size_t count)
-{
-#if defined(_I386_BUS_PIO_H_)
-#if defined(_I386_BUS_PIO_IND_H_) || defined(_I386_BUS_MEMIO_H_)
-	if (tag == I386_BUS_SPACE_IO)
-#endif
-	{
-		int _port_ = bsh->bsh_base + offset;		\
-		__asm __volatile("				\n\
-			cld					\n\
-		1:	inl %w2,%%eax				\n\
-			stosl					\n\
-			addl $4,%2				\n\
-			loop 1b"				:
-		    "=D" (addr), "=c" (count), "=d" (_port_)	:
-		    "0" (addr), "1" (count), "2" (_port_)	:
-		    "%eax", "memory", "cc");
-	}
-#endif
-#if defined(_I386_BUS_PIO_IND_H_)
-#if defined(_I386_BUS_PIO_H_) || defined(_I386_BUS_MEMIO_H_)
-	if (tag == I386_BUS_SPACE_IO_IND)
-#endif
-	{
-		int	i;
-		for (i = 0; i < count; i += 4)
-			addr[i] = inl(bsh->bsh_iat[offset + i]);
-	}
-#endif
-#if defined(_I386_BUS_MEMIO_H_)
-#if defined(_I386_BUS_PIO_H_) || defined(_I386_BUS_PIO_IND_H_)
-	if (tag == I386_BUS_SPACE_MEM)
-#endif
-	{
-		int _port_ = bsh->bsh_base + offset;		\
-		__asm __volatile("				\n\
-			cld					\n\
-			repne					\n\
-			movsl"					:
-		    "=D" (addr), "=c" (count), "=S" (_port_)	:
-		    "0" (addr), "1" (count), "2" (_port_)	:
-		    "memory", "cc");
-	}
-#endif
-}
-
-#if 0	/* Cause a link error for bus_space_read_region_8 */
-#define	bus_space_read_region_8	!!! bus_space_read_region_8 unimplemented !!!
-#endif
+_BUS_SPACE_READ_MULTI(u_int8_t,1)
+_BUS_SPACE_READ_MULTI(u_int16_t,2)
+_BUS_SPACE_READ_MULTI(u_int32_t,4)
 
 /*
- * Write the 1, 2, 4, or 8 byte value `value' to bus space
- * described by tag/handle/offset.
+ * multi write
  */
-
-static __inline void bus_space_write_1(bus_space_tag_t tag,
-				       bus_space_handle_t bsh,
-				       bus_size_t offset, u_int8_t value);
-
-static __inline void bus_space_write_2(bus_space_tag_t tag,
-				       bus_space_handle_t bsh,
-				       bus_size_t offset, u_int16_t value);
-
-static __inline void bus_space_write_4(bus_space_tag_t tag,
-				       bus_space_handle_t bsh,
-				       bus_size_t offset, u_int32_t value);
-
-static __inline void
-bus_space_write_1(bus_space_tag_t tag, bus_space_handle_t bsh,
-		       bus_size_t offset, u_int8_t value)
-{
-#if defined(_I386_BUS_PIO_H_)
-#if defined(_I386_BUS_PIO_IND_H_) || defined(_I386_BUS_MEMIO_H_)
-	if (tag == I386_BUS_SPACE_IO)
-#endif
-		outb(bsh->bsh_base + offset, value);
-#endif
-#if defined(_I386_BUS_PIO_IND_H_)
-#if defined(_I386_BUS_PIO_H_) || defined(_I386_BUS_MEMIO_H_)
-	if (tag == I386_BUS_SPACE_IO_IND)
-#endif
-		outb(bsh->bsh_iat[offset], value);
-#endif
-#if defined(_I386_BUS_MEMIO_H_)
-#if defined(_I386_BUS_PIO_H_) || defined(_I386_BUS_PIO_IND_H_)
-	if (tag == I386_BUS_SPACE_MEM)
-#endif
-		*(volatile u_int8_t *)(bsh->bsh_base + offset) = value;
-#endif
+#define	_BUS_SPACE_WRITE_MULTI(TYPE,BWN)				\
+static __inline void							\
+bus_space_write_multi_##BWN##(tag, bsh, offset, buf, cnt) 		\
+	bus_space_tag_t tag;						\
+	bus_space_handle_t bsh;						\
+	bus_size_t offset;						\
+	const TYPE *buf;						\
+	size_t cnt;							\
+{									\
+									\
+	__asm __volatile("call *%3"					\
+			:"=c" (cnt),					\
+			 "=d" (offset),					\
+			 "=S" (buf)					\
+			:"o" (bsh->bsh_bam.bs_write_multi_##BWN),	\
+			 "b" (bsh),					\
+			 "0" (cnt),					\
+			 "1" (offset),					\
+			 "2" (buf)					\
+			);						\
 }
 
-static __inline void
-bus_space_write_2(bus_space_tag_t tag, bus_space_handle_t bsh,
-		       bus_size_t offset, u_int16_t value)
-{
-#if defined(_I386_BUS_PIO_H_)
-#if defined(_I386_BUS_PIO_IND_H_) || defined(_I386_BUS_MEMIO_H_)
-	if (tag == I386_BUS_SPACE_IO)
-#endif
-		outw(bsh->bsh_base + offset, value);
-#endif
-#if defined(_I386_BUS_PIO_IND_H_)
-#if defined(_I386_BUS_PIO_H_) || defined(_I386_BUS_MEMIO_H_)
-	if (tag == I386_BUS_SPACE_IO_IND)
-#endif
-		outw(bsh->bsh_iat[offset], value);
-#endif
-#if defined(_I386_BUS_MEMIO_H_)
-#if defined(_I386_BUS_PIO_H_) || defined(_I386_BUS_PIO_IND_H_)
-	if (tag == I386_BUS_SPACE_MEM)
-#endif
-		*(volatile u_int16_t *)(bsh->bsh_base + offset) = value;
-#endif
-}
-
-static __inline void
-bus_space_write_4(bus_space_tag_t tag, bus_space_handle_t bsh,
-		       bus_size_t offset, u_int32_t value)
-{
-#if defined(_I386_BUS_PIO_H_)
-#if defined(_I386_BUS_PIO_IND_H_) || defined(_I386_BUS_MEMIO_H_)
-	if (tag == I386_BUS_SPACE_IO)
-#endif
-		outl(bsh->bsh_base + offset, value);
-#endif
-#if defined(_I386_BUS_PIO_IND_H_)
-#if defined(_I386_BUS_PIO_H_) || defined(_I386_BUS_MEMIO_H_)
-	if (tag == I386_BUS_SPACE_IO_IND)
-#endif
-		outl(bsh->bsh_iat[offset], value);
-#endif
-#if defined(_I386_BUS_MEMIO_H_)
-#if defined(_I386_BUS_PIO_H_) || defined(_I386_BUS_PIO_IND_H_)
-	if (tag == I386_BUS_SPACE_MEM)
-#endif
-		*(volatile u_int32_t *)(bsh->bsh_base + offset) = value;
-#endif
-}
-
-#if 0	/* Cause a link error for bus_space_write_8 */
-#define	bus_space_write_8	!!! bus_space_write_8 not implemented !!!
-#endif
+_BUS_SPACE_WRITE_MULTI(u_int8_t,1)
+_BUS_SPACE_WRITE_MULTI(u_int16_t,2)
+_BUS_SPACE_WRITE_MULTI(u_int32_t,4)
 
 /*
- * Write `count' 1, 2, 4, or 8 byte quantities from the buffer
- * provided to bus space described by tag/handle/offset.
+ * region read
  */
-
-static __inline void bus_space_write_multi_1(bus_space_tag_t tag,
-					     bus_space_handle_t bsh,
-					     bus_size_t offset,
-					     const u_int8_t *addr,
-					     size_t count);
-static __inline void bus_space_write_multi_2(bus_space_tag_t tag,
-					     bus_space_handle_t bsh,
-					     bus_size_t offset,
-					     const u_int16_t *addr,
-					     size_t count);
-
-static __inline void bus_space_write_multi_4(bus_space_tag_t tag,
-					     bus_space_handle_t bsh,
-					     bus_size_t offset,
-					     const u_int32_t *addr,
-					     size_t count);
-
-static __inline void
-bus_space_write_multi_1(bus_space_tag_t tag, bus_space_handle_t bsh,
-			bus_size_t offset, const u_int8_t *addr, size_t count)
-{
-#if defined(_I386_BUS_PIO_H_)
-#if defined(_I386_BUS_PIO_IND_H_) || defined(_I386_BUS_MEMIO_H_)
-	if (tag == I386_BUS_SPACE_IO)
-#endif
-		outsb(bsh->bsh_base + offset, addr, count);
-#endif
-#if defined(_I386_BUS_PIO_IND_H_)
-#if defined(_I386_BUS_PIO_H_) || defined(_I386_BUS_MEMIO_H_)
-	if (tag == I386_BUS_SPACE_IO_IND)
-#endif
-		outsb(bsh->bsh_iat[offset], addr, count);
-#endif
-#if defined(_I386_BUS_MEMIO_H_)
-#if defined(_I386_BUS_PIO_H_) || defined(_I386_BUS_PIO_IND_H_)
-	if (tag == I386_BUS_SPACE_MEM)
-#endif
-	{
-		__asm __volatile("				\n\
-			cld					\n\
-		1:	lodsb					\n\
-			movb %%al,(%2)				\n\
-			loop 1b"				:
-		    "=S" (addr), "=c" (count)			:
-		    "r" (bsh->bsh_base + offset), "0" (addr), "1" (count) :
-		    "%eax", "memory", "cc");
-	}
-#endif
-}
-
-static __inline void
-bus_space_write_multi_2(bus_space_tag_t tag, bus_space_handle_t bsh,
-			bus_size_t offset, const u_int16_t *addr, size_t count)
-{
-#if defined(_I386_BUS_PIO_H_)
-#if defined(_I386_BUS_PIO_IND_H_) || defined(_I386_BUS_MEMIO_H_)
-	if (tag == I386_BUS_SPACE_IO)
-#endif
-		outsw(bsh->bsh_base + offset, addr, count);
-#endif
-#if defined(_I386_BUS_PIO_IND_H_)
-#if defined(_I386_BUS_PIO_H_) || defined(_I386_BUS_MEMIO_H_)
-	if (tag == I386_BUS_SPACE_IO_IND)
-#endif
-		outsw(bsh->bsh_iat[offset], addr, count);
-#endif
-#if defined(_I386_BUS_MEMIO_H_)
-#if defined(_I386_BUS_PIO_H_) || defined(_I386_BUS_PIO_IND_H_)
-	if (tag == I386_BUS_SPACE_MEM)
-#endif
-	{
-		__asm __volatile("				\n\
-			cld					\n\
-		1:	lodsw					\n\
-			movw %%ax,(%2)				\n\
-			loop 1b"				:
-		    "=S" (addr), "=c" (count)			:
-		    "r" (bsh->bsh_base + offset), "0" (addr), "1" (count) :
-		    "%eax", "memory", "cc");
-	}
-#endif
+#define	_BUS_SPACE_READ_REGION(TYPE,BWN)				\
+static __inline void							\
+bus_space_read_region_##BWN##(tag, bsh, offset, buf, cnt) 		\
+	bus_space_tag_t tag;						\
+	bus_space_handle_t bsh;						\
+	bus_size_t offset;						\
+	TYPE *buf;						\
+	size_t cnt;							\
+{									\
+									\
+	__asm __volatile("call *%3"					\
+			:"=c" (cnt),					\
+			 "=d" (offset),					\
+			 "=D" (buf)					\
+			:"o" (bsh->bsh_bam.bs_read_region_##BWN),	\
+			 "b" (bsh),					\
+			 "0" (cnt),					\
+			 "1" (offset),					\
+			 "2" (buf)					\
+			:"memory");					\
 }
 
-static __inline void
-bus_space_write_multi_4(bus_space_tag_t tag, bus_space_handle_t bsh,
-			bus_size_t offset, const u_int32_t *addr, size_t count)
-{
-#if defined(_I386_BUS_PIO_H_)
-#if defined(_I386_BUS_PIO_IND_H_) || defined(_I386_BUS_MEMIO_H_)
-	if (tag == I386_BUS_SPACE_IO)
-#endif
-		outsl(bsh->bsh_base + offset, addr, count);
-#endif
-#if defined(_I386_BUS_PIO_IND_H_)
-#if defined(_I386_BUS_PIO_H_) || defined(_I386_BUS_MEMIO_H_)
-	if (tag == I386_BUS_SPACE_IO_IND)
-#endif
-		outsl(bsh->bsh_iat[offset], addr, count);
-#endif
-#if defined(_I386_BUS_MEMIO_H_)
-#if defined(_I386_BUS_PIO_H_) || defined(_I386_BUS_PIO_IND_H_)
-	if (tag == I386_BUS_SPACE_MEM)
-#endif
-	{
-		__asm __volatile("				\n\
-			cld					\n\
-		1:	lodsl					\n\
-			movl %%eax,(%2)				\n\
-			loop 1b"				:
-		    "=S" (addr), "=c" (count)			:
-		    "r" (bsh->bsh_base + offset), "0" (addr), "1" (count) :
-		    "%eax", "memory", "cc");
-	}
-#endif
-}
-
-#if 0	/* Cause a link error for bus_space_write_multi_8 */
-#define	bus_space_write_multi_8(t, h, o, a, c)				\
-			!!! bus_space_write_multi_8 unimplemented !!!
-#endif
+_BUS_SPACE_READ_REGION(u_int8_t,1)
+_BUS_SPACE_READ_REGION(u_int16_t,2)
+_BUS_SPACE_READ_REGION(u_int32_t,4)
 
 /*
- * Write `count' 1, 2, 4, or 8 byte quantities from the buffer provided
- * to bus space described by tag/handle starting at `offset'.
+ * region write
  */
-
-static __inline void bus_space_write_region_1(bus_space_tag_t tag,
-					      bus_space_handle_t bsh,
-					      bus_size_t offset,
-					      const u_int8_t *addr,
-					      size_t count);
-static __inline void bus_space_write_region_2(bus_space_tag_t tag,
-					      bus_space_handle_t bsh,
-					      bus_size_t offset,
-					      const u_int16_t *addr,
-					      size_t count);
-static __inline void bus_space_write_region_4(bus_space_tag_t tag,
-					      bus_space_handle_t bsh,
-					      bus_size_t offset,
-					      const u_int32_t *addr,
-					      size_t count);
-
-static __inline void
-bus_space_write_region_1(bus_space_tag_t tag, bus_space_handle_t bsh,
-			 bus_size_t offset, const u_int8_t *addr, size_t count)
-{
-#if defined(_I386_BUS_PIO_H_)
-#if defined(_I386_BUS_PIO_IND_H_) || defined(_I386_BUS_MEMIO_H_)
-	if (tag == I386_BUS_SPACE_IO)
-#endif
-	{
-		int _port_ = bsh->bsh_base + offset;		\
-		__asm __volatile("				\n\
-			cld					\n\
-		1:	lodsb					\n\
-			outb %%al,%w0				\n\
-			incl %0					\n\
-			loop 1b"				:
-		    "=d" (_port_), "=S" (addr), "=c" (count)	:
-		    "0" (_port_), "1" (addr), "2" (count)	:
-		    "%eax", "memory", "cc");
-	}
-#endif
-#if defined(_I386_BUS_PIO_IND_H_)
-#if defined(_I386_BUS_PIO_H_) || defined(_I386_BUS_MEMIO_H_)
-	if (tag == I386_BUS_SPACE_IO_IND)
-#endif
-	{
-		int	i;
-		for (i = 0; i < count; i++)
-			outb(bsh->bsh_iat[offset + i], addr[i]);
-	}
-#endif
-#if defined(_I386_BUS_MEMIO_H_)
-#if defined(_I386_BUS_PIO_H_) || defined(_I386_BUS_PIO_IND_H_)
-	if (tag == I386_BUS_SPACE_MEM)
-#endif
-	{
-		int _port_ = bsh->bsh_base + offset;		\
-		__asm __volatile("				\n\
-			cld					\n\
-			repne					\n\
-			movsb"					:
-		    "=D" (_port_), "=S" (addr), "=c" (count)	:
-		    "0" (_port_), "1" (addr), "2" (count)	:
-		    "memory", "cc");
-	}
-#endif
-}
-
-static __inline void
-bus_space_write_region_2(bus_space_tag_t tag, bus_space_handle_t bsh,
-			 bus_size_t offset, const u_int16_t *addr, size_t count)
-{
-#if defined(_I386_BUS_PIO_H_)
-#if defined(_I386_BUS_PIO_IND_H_) || defined(_I386_BUS_MEMIO_H_)
-	if (tag == I386_BUS_SPACE_IO)
-#endif
-	{
-		int _port_ = bsh->bsh_base + offset;		\
-		__asm __volatile("				\n\
-			cld					\n\
-		1:	lodsw					\n\
-			outw %%ax,%w0				\n\
-			addl $2,%0				\n\
-			loop 1b"				:
-		    "=d" (_port_), "=S" (addr), "=c" (count)	:
-		    "0" (_port_), "1" (addr), "2" (count)	:
-		    "%eax", "memory", "cc");
-	}
-#endif
-#if defined(_I386_BUS_PIO_IND_H_)
-#if defined(_I386_BUS_PIO_H_) || defined(_I386_BUS_MEMIO_H_)
-	if (tag == I386_BUS_SPACE_IO_IND)
-#endif
-	{
-		int	i;
-		for (i = 0; i < count; i += 2)
-			outw(bsh->bsh_iat[offset + i], addr[i]);
-	}
-#endif
-#if defined(_I386_BUS_MEMIO_H_)
-#if defined(_I386_BUS_PIO_H_)
-	if (tag == I386_BUS_SPACE_MEM)
-#endif
-	{
-		int _port_ = bsh->bsh_base + offset;		\
-		__asm __volatile("				\n\
-			cld					\n\
-			repne					\n\
-			movsw"					:
-		    "=D" (_port_), "=S" (addr), "=c" (count)	:
-		    "0" (_port_), "1" (addr), "2" (count)	:
-		    "memory", "cc");
-	}
-#endif
+#define	_BUS_SPACE_WRITE_REGION(TYPE,BWN)				\
+static __inline void							\
+bus_space_write_region_##BWN##(tag, bsh, offset, buf, cnt) 		\
+	bus_space_tag_t tag;						\
+	bus_space_handle_t bsh;						\
+	bus_size_t offset;						\
+	const TYPE *buf;						\
+	size_t cnt;							\
+{									\
+									\
+	__asm __volatile("call *%3"					\
+			:"=c" (cnt),					\
+			 "=d" (offset),					\
+			 "=S" (buf)					\
+			:"o" (bsh->bsh_bam.bs_write_region_##BWN),	\
+			 "b" (bsh),					\
+			 "0" (cnt),					\
+			 "1" (offset),					\
+			 "2" (buf)					\
+			);						\
 }
 
-static __inline void
-bus_space_write_region_4(bus_space_tag_t tag, bus_space_handle_t bsh,
-			 bus_size_t offset, const u_int32_t *addr, size_t count)
-{
-#if defined(_I386_BUS_PIO_H_)
-#if defined(_I386_BUS_PIO_IND_H_) || defined(_I386_BUS_MEMIO_H_)
-	if (tag == I386_BUS_SPACE_IO)
-#endif
-	{
-		int _port_ = bsh->bsh_base + offset;		\
-		__asm __volatile("				\n\
-			cld					\n\
-		1:	lodsl					\n\
-			outl %%eax,%w0				\n\
-			addl $4,%0				\n\
-			loop 1b"				:
-		    "=d" (_port_), "=S" (addr), "=c" (count)	:
-		    "0" (_port_), "1" (addr), "2" (count)	:
-		    "%eax", "memory", "cc");
-	}
-#endif
-#if defined(_I386_BUS_PIO_IND_H_)
-#if defined(_I386_BUS_PIO_H_) || defined(_I386_BUS_MEMIO_H_)
-	if (tag == I386_BUS_SPACE_IO_IND)
-#endif
-	{
-		int	i;
-		for (i = 0; i < count; i += 4)
-			outl(bsh->bsh_iat[offset + i], addr[i]);
-	}
-#endif
-#if defined(_I386_BUS_MEMIO_H_)
-#if defined(_I386_BUS_PIO_H_) || defined(_I386_BUS_PIO_IND_H_)
-	if (tag == I386_BUS_SPACE_MEM)
-#endif
-	{
-		int _port_ = bsh->bsh_base + offset;		\
-		__asm __volatile("				\n\
-			cld					\n\
-			repne					\n\
-			movsl"					:
-		    "=D" (_port_), "=S" (addr), "=c" (count)	:
-		    "0" (_port_), "1" (addr), "2" (count)	:
-		    "memory", "cc");
-	}
-#endif
-}
-
-#if 0	/* Cause a link error for bus_space_write_region_8 */
-#define	bus_space_write_region_8					\
-			!!! bus_space_write_region_8 unimplemented !!!
-#endif
+_BUS_SPACE_WRITE_REGION(u_int8_t,1)
+_BUS_SPACE_WRITE_REGION(u_int16_t,2)
+_BUS_SPACE_WRITE_REGION(u_int32_t,4)
 
 /*
- * Write the 1, 2, 4, or 8 byte value `val' to bus space described
- * by tag/handle/offset `count' times.
+ * multi set
  */
-
-static __inline void bus_space_set_multi_1(bus_space_tag_t tag,
-					   bus_space_handle_t bsh,
-					   bus_size_t offset,
-					   u_int8_t value, size_t count);
-static __inline void bus_space_set_multi_2(bus_space_tag_t tag,
-					   bus_space_handle_t bsh,
-					   bus_size_t offset,
-					   u_int16_t value, size_t count);
-static __inline void bus_space_set_multi_4(bus_space_tag_t tag,
-					   bus_space_handle_t bsh,
-					   bus_size_t offset,
-					   u_int32_t value, size_t count);
-
-static __inline void
-bus_space_set_multi_1(bus_space_tag_t tag, bus_space_handle_t bsh,
-		      bus_size_t offset, u_int8_t value, size_t count)
-{
-#if defined(_I386_BUS_PIO_H_)
-#if defined(_I386_BUS_PIO_IND_H_) || defined(_I386_BUS_MEMIO_H_)
-	if (tag == I386_BUS_SPACE_IO)
-#endif
-	{
-		bus_addr_t addr = bsh->bsh_base + offset;
-		while (count--)
-			outb(addr, value);
-	}
-#endif
-#if defined(_I386_BUS_PIO_IND_H_)
-#if defined(_I386_BUS_PIO_H_) || defined(_I386_BUS_MEMIO_H_)
-	if (tag == I386_BUS_SPACE_IO_IND)
-#endif
-	{
-		bus_addr_t addr = bsh->bsh_iat[offset];
-		while (count--)
-			outb(addr, value);
-	}
-#endif
-#if defined(_I386_BUS_MEMIO_H_)
-#if defined(_I386_BUS_PIO_H_) || defined(_I386_BUS_PIO_IND_H_)
-	if (tag == I386_BUS_SPACE_MEM)
-#endif
-	{
-		bus_addr_t addr = bsh->bsh_base + offset;
-		while (count--)
-			*(volatile u_int8_t *)(addr) = value;
-	}
-#endif
-}
-
-static __inline void
-bus_space_set_multi_2(bus_space_tag_t tag, bus_space_handle_t bsh,
-		     bus_size_t offset, u_int16_t value, size_t count)
-{
-#if defined(_I386_BUS_PIO_H_)
-#if defined(_I386_BUS_PIO_IND_H_) || defined(_I386_BUS_MEMIO_H_)
-	if (tag == I386_BUS_SPACE_IO)
-#endif
-	{
-		bus_addr_t addr = bsh->bsh_base + offset;
-		while (count--)
-			outw(addr, value);
-	}
-#endif
-#if defined(_I386_BUS_PIO_IND_H_)
-#if defined(_I386_BUS_PIO_H_) || defined(_I386_BUS_MEMIO_H_)
-	if (tag == I386_BUS_SPACE_IO_IND)
-#endif
-	{
-		bus_addr_t addr = bsh->bsh_iat[offset];
-		while (count--)
-			outw(addr, value);
-	}
-#endif
-#if defined(_I386_BUS_MEMIO_H_)
-#if defined(_I386_BUS_PIO_H_) || defined(_I386_BUS_PIO_IND_H_)
-	if (tag == I386_BUS_SPACE_MEM)
-#endif
-	{
-		bus_addr_t addr = bsh->bsh_base + offset;
-		while (count--)
-			*(volatile u_int16_t *)(addr) = value;
-	}
-#endif
-}
-
-static __inline void
-bus_space_set_multi_4(bus_space_tag_t tag, bus_space_handle_t bsh,
-		      bus_size_t offset, u_int32_t value, size_t count)
-{
-#if defined(_I386_BUS_PIO_H_)
-#if defined(_I386_BUS_PIO_IND_H_) || defined(_I386_BUS_MEMIO_H_)
-	if (tag == I386_BUS_SPACE_IO)
-#endif
-	{
-		bus_addr_t addr = bsh->bsh_base + offset;
-		while (count--)
-			outl(addr, value);
-	}
-#endif
-#if defined(_I386_BUS_PIO_IND_H_)
-#if defined(_I386_BUS_PIO_H_) || defined(_I386_BUS_MEMIO_H_)
-	if (tag == I386_BUS_SPACE_IO_IND)
-#endif
-	{
-		bus_addr_t addr = bsh->bsh_iat[offset];
-		while (count--)
-			outl(addr, value);
-	}
-#endif
-#if defined(_I386_BUS_MEMIO_H_)
-#if defined(_I386_BUS_PIO_H_) || defined(_I386_BUS_PIO_IND_H_)
-	if (tag == I386_BUS_SPACE_MEM)
-#endif
-	{
-		bus_addr_t addr = bsh->bsh_base + offset;
-		while (count--)
-			*(volatile u_int32_t *)(addr) = value;
-	}
-#endif
+#define	_BUS_SPACE_SET_MULTI(TYPE,BWN)					\
+static __inline void							\
+bus_space_set_multi_##BWN##(tag, bsh, offset, val, cnt) 		\
+	bus_space_tag_t tag;						\
+	bus_space_handle_t bsh;						\
+	bus_size_t offset;						\
+	TYPE val;							\
+	size_t cnt;							\
+{									\
+									\
+	__asm __volatile("call *%2"					\
+			:"=c" (cnt),					\
+			 "=d" (offset)					\
+			:"o" (bsh->bsh_bam.bs_set_multi_##BWN),		\
+			 "a" (val),					\
+			 "b" (bsh),					\
+			 "0" (cnt),					\
+			 "1" (offset)					\
+			);						\
 }
 
-#if 0	/* Cause a link error for bus_space_set_multi_8 */
-#define	bus_space_set_multi_8 !!! bus_space_set_multi_8 unimplemented !!!
-#endif
+_BUS_SPACE_SET_MULTI(u_int8_t,1)
+_BUS_SPACE_SET_MULTI(u_int16_t,2)
+_BUS_SPACE_SET_MULTI(u_int32_t,4)
 
 /*
- * Write `count' 1, 2, 4, or 8 byte value `val' to bus space described
- * by tag/handle starting at `offset'.
+ * region set
  */
-
-static __inline void bus_space_set_region_1(bus_space_tag_t tag,
-					    bus_space_handle_t bsh,
-					    bus_size_t offset, u_int8_t value,
-					    size_t count);
-static __inline void bus_space_set_region_2(bus_space_tag_t tag,
-					    bus_space_handle_t bsh,
-					    bus_size_t offset, u_int16_t value,
-					    size_t count);
-static __inline void bus_space_set_region_4(bus_space_tag_t tag,
-					    bus_space_handle_t bsh,
-					    bus_size_t offset, u_int32_t value,
-					    size_t count);
-
-static __inline void
-bus_space_set_region_1(bus_space_tag_t tag, bus_space_handle_t bsh,
-		       bus_size_t offset, u_int8_t value, size_t count)
-{
-#if defined(_I386_BUS_PIO_H_)
-#if defined(_I386_BUS_PIO_IND_H_) || defined(_I386_BUS_MEMIO_H_)
-	if (tag == I386_BUS_SPACE_IO)
-#endif
-	{
-		bus_addr_t addr = bsh->bsh_base + offset;
-		for (; count != 0; count--, addr++)
-			outb(addr, value);
-	}
-#endif
-#if defined(_I386_BUS_PIO_IND_H_)
-#if defined(_I386_BUS_PIO_H_) || defined(_I386_BUS_MEMIO_H_)
-	if (tag == I386_BUS_SPACE_IO_IND)
-#endif
-	{
-		for (; count != 0; count--, offset++)
-			outb(bsh->bsh_iat[offset], value);
-	}
-#endif
-#if defined(_I386_BUS_MEMIO_H_)
-#if defined(_I386_BUS_PIO_H_) || defined(_I386_BUS_PIO_IND_H_)
-	if (tag == I386_BUS_SPACE_MEM)
-#endif
-	{
-		bus_addr_t addr = bsh->bsh_base + offset;
-		for (; count != 0; count--, addr++)
-			*(volatile u_int8_t *)(addr) = value;
-	}
-#endif
+#define	_BUS_SPACE_SET_REGION(TYPE,BWN)					\
+static __inline void							\
+bus_space_set_region_##BWN##(tag, bsh, offset, val, cnt) 		\
+	bus_space_tag_t tag;						\
+	bus_space_handle_t bsh;						\
+	bus_size_t offset;						\
+	TYPE val;							\
+	size_t cnt;							\
+{									\
+									\
+	__asm __volatile("call *%2"					\
+			:"=c" (cnt),					\
+			 "=d" (offset)					\
+			:"o" (bsh->bsh_bam.bs_set_region_##BWN),	\
+			 "a" (val),					\
+			 "b" (bsh),					\
+			 "0" (cnt),					\
+			 "1" (offset)					\
+			);						\
 }
 
-static __inline void
-bus_space_set_region_2(bus_space_tag_t tag, bus_space_handle_t bsh,
-		       bus_size_t offset, u_int16_t value, size_t count)
-{
-#if defined(_I386_BUS_PIO_H_)
-#if defined(_I386_BUS_PIO_IND_H_) || defined(_I386_BUS_MEMIO_H_)
-	if (tag == I386_BUS_SPACE_IO)
-#endif
-	{
-		bus_addr_t addr = bsh->bsh_base + offset;
-		for (; count != 0; count--, addr += 2)
-			outw(addr, value);
-	}
-#endif
-#if defined(_I386_BUS_PIO_IND_H_)
-#if defined(_I386_BUS_PIO_H_) || defined(_I386_BUS_MEMIO_H_)
-	if (tag == I386_BUS_SPACE_IO_IND)
-#endif
-	{
-		for (; count != 0; count--, offset += 2)
-			outw(bsh->bsh_iat[offset], value);
-	}
-#endif
-#if defined(_I386_BUS_MEMIO_H_)
-#if defined(_I386_BUS_PIO_H_) || defined(_I386_BUS_PIO_IND_H_)
-	if (tag == I386_BUS_SPACE_MEM)
-#endif
-	{
-		bus_addr_t addr = bsh->bsh_base + offset;
-		for (; count != 0; count--, addr += 2)
-			*(volatile u_int16_t *)(addr) = value;
-	}
-#endif
-}
-
-static __inline void
-bus_space_set_region_4(bus_space_tag_t tag, bus_space_handle_t bsh,
-		       bus_size_t offset, u_int32_t value, size_t count)
-{
-#if defined(_I386_BUS_PIO_H_)
-#if defined(_I386_BUS_PIO_IND_H_) || defined(_I386_BUS_MEMIO_H_)
-	if (tag == I386_BUS_SPACE_IO)
-#endif
-	{
-		bus_addr_t addr = bsh->bsh_base + offset;
-		for (; count != 0; count--, addr += 4)
-			outl(addr, value);
-	}
-#endif
-#if defined(_I386_BUS_PIO_IND_H_)
-#if defined(_I386_BUS_PIO_H_) || defined(_I386_BUS_MEMIO_H_)
-	if (tag == I386_BUS_SPACE_IO_IND)
-#endif
-	{
-		for (; count != 0; count--, offset += 4)
-			outl(bsh->bsh_iat[offset], value);
-	}
-#endif
-#if defined(_I386_BUS_MEMIO_H_)
-#if defined(_I386_BUS_PIO_H_) || defined(_I386_BUS_PIO_IND_H_)
-	if (tag == I386_BUS_SPACE_MEM)
-#endif
-	{
-		bus_addr_t addr = bsh->bsh_base + offset;
-		for (; count != 0; count--, addr += 4)
-			*(volatile u_int32_t *)(addr) = value;
-	}
-#endif
-}
-
-#if 0	/* Cause a link error for bus_space_set_region_8 */
-#define	bus_space_set_region_8	!!! bus_space_set_region_8 unimplemented !!!
-#endif
+_BUS_SPACE_SET_REGION(u_int8_t,1)
+_BUS_SPACE_SET_REGION(u_int16_t,2)
+_BUS_SPACE_SET_REGION(u_int32_t,4)
 
 /*
- * Copy `count' 1, 2, 4, or 8 byte values from bus space starting
- * at tag/bsh1/off1 to bus space starting at tag/bsh2/off2.
+ * copy
  */
-
-static __inline void bus_space_copy_region_1(bus_space_tag_t tag,
-					     bus_space_handle_t bsh1,
-					     bus_size_t off1,
-					     bus_space_handle_t bsh2,
-					     bus_size_t off2, size_t count);
-
-static __inline void bus_space_copy_region_2(bus_space_tag_t tag,
-					     bus_space_handle_t bsh1,
-					     bus_size_t off1,
-					     bus_space_handle_t bsh2,
-					     bus_size_t off2, size_t count);
-
-static __inline void bus_space_copy_region_4(bus_space_tag_t tag,
-					     bus_space_handle_t bsh1,
-					     bus_size_t off1,
-					     bus_space_handle_t bsh2,
-					     bus_size_t off2, size_t count);
-
-static __inline void
-bus_space_copy_region_1(bus_space_tag_t tag, bus_space_handle_t bsh1,
-			bus_size_t off1, bus_space_handle_t bsh2,
-			bus_size_t off2, size_t count)
-{
-#if defined(_I386_BUS_PIO_H_)
-#if defined(_I386_BUS_PIO_IND_H_) || defined(_I386_BUS_MEMIO_H_)
-	if (tag == I386_BUS_SPACE_IO)
-#endif
-	{
-		bus_addr_t addr1 = bsh1->bsh_base + off1;
-		bus_addr_t addr2 = bsh2->bsh_base + off2;
-		if (addr1 >= addr2) {
-			/* src after dest: copy forward */
-			for (; count != 0; count--, addr1++, addr2++)
-				outb(addr2, inb(addr1));
-		} else {
-			/* dest after src: copy backwards */
-			for (addr1 += (count - 1), addr2 += (count - 1);
-			     count != 0; count--, addr1--, addr2--)
-				outb(addr2, inb(addr1));
-		}
-	}
-#endif
-#if defined(_I386_BUS_PIO_IND_H_)
-#if defined(_I386_BUS_PIO_H_) || defined(_I386_BUS_MEMIO_H_)
-	if (tag == I386_BUS_SPACE_IO_IND)
-#endif
-	{
-		if (bsh1->bsh_iat[off1] >= bsh2->bsh_iat[off2]) {
-			/* src after dest: copy forward */
-			for (; count != 0; count--, off1++, off2++)
-				outb(bsh2->bsh_iat[off2],
-				     inb(bsh1->bsh_iat[off1]));
-		} else {
-			/* dest after src: copy backwards */
-			for (off1 += (count - 1), off2 += (count - 1);
-			     count != 0; count--, off1--, off2--)
-				outb(bsh2->bsh_iat[off2],
-				     inb(bsh1->bsh_iat[off1]));
-		}
-	}
-#endif
-#if defined(_I386_BUS_MEMIO_H_)
-#if defined(_I386_BUS_PIO_H_) || defined(_I386_BUS_PIO_IND_H_)
-	if (tag == I386_BUS_SPACE_MEM)
-#endif
-	{
-		bus_addr_t addr1 = bsh1->bsh_base + off1;
-		bus_addr_t addr2 = bsh2->bsh_base + off2;
-		if (addr1 >= addr2) {
-			/* src after dest: copy forward */
-			for (; count != 0; count--, addr1++, addr2++)
-				*(volatile u_int8_t *)(addr2) =
-				    *(volatile u_int8_t *)(addr1);
-		} else {
-			/* dest after src: copy backwards */
-			for (addr1 += (count - 1), addr2 += (count - 1);
-			     count != 0; count--, addr1--, addr2--)
-				*(volatile u_int8_t *)(addr2) =
-				    *(volatile u_int8_t *)(addr1);
-		}
-	}
-#endif
+#define	_BUS_SPACE_COPY_REGION(BWN)					\
+static __inline void							\
+bus_space_copy_region_##BWN##(tag, sbsh, src, dbsh, dst, cnt)		\
+	bus_space_tag_t tag;						\
+	bus_space_handle_t sbsh;					\
+	bus_size_t src;							\
+	bus_space_handle_t dbsh;					\
+	bus_size_t dst;							\
+	size_t cnt;							\
+{									\
+									\
+	if (dbsh->bsh_bam.bs_copy_region_1 != sbsh->bsh_bam.bs_copy_region_1) \
+		panic("bus_space_copy_region: funcs mismatch (ENOSUPPORT)");\
+									\
+	__asm __volatile("call *%3"					\
+			:"=c" (cnt),					\
+			 "=S" (src),					\
+			 "=D" (dst)					\
+			:"o" (dbsh->bsh_bam.bs_copy_region_##BWN),	\
+			 "a" (sbsh),					\
+			 "b" (dbsh),					\
+			 "0" (cnt),					\
+			 "1" (src),					\
+			 "2" (dst)					\
+			);						\
 }
 
-static __inline void
-bus_space_copy_region_2(bus_space_tag_t tag, bus_space_handle_t bsh1,
-			bus_size_t off1, bus_space_handle_t bsh2,
-			bus_size_t off2, size_t count)
-{
-#if defined(_I386_BUS_PIO_H_)
-#if defined(_I386_BUS_PIO_IND_H_) || defined(_I386_BUS_MEMIO_H_)
-	if (tag == I386_BUS_SPACE_IO)
-#endif
-	{
-		bus_addr_t addr1 = bsh1->bsh_base + off1;
-		bus_addr_t addr2 = bsh2->bsh_base + off2;
-		if (addr1 >= addr2) {
-			/* src after dest: copy forward */
-			for (; count != 0; count--, addr1 += 2, addr2 += 2)
-				outw(addr2, inw(addr1));
-		} else {
-			/* dest after src: copy backwards */
-			for (addr1 += 2 * (count - 1), addr2 += 2 * (count - 1);
-			     count != 0; count--, addr1 -= 2, addr2 -= 2)
-				outw(addr2, inw(addr1));
-		}
-	}
-#endif
-#if defined(_I386_BUS_PIO_IND_H_)
-#if defined(_I386_BUS_PIO_H_) || defined(_I386_BUS_MEMIO_H_)
-	if (tag == I386_BUS_SPACE_IO_IND)
-#endif
-	{
-		if (bsh1->bsh_iat[off1] >= bsh2->bsh_iat[off2]) {
-			/* src after dest: copy forward */
-			for (; count != 0; count--, off1 += 2, off2 += 2)
-				outw(bsh2->bsh_iat[off2],
-				     inw(bsh1->bsh_iat[off1]));
-		} else {
-			/* dest after src: copy backwards */
-			for (off1 += 2 * (count - 1), off2 += 2 * (count - 1);
-			     count != 0; count--, off1 -= 2, off2 -= 2)
-				outw(bsh2->bsh_iat[off2],
-				     inw(bsh1->bsh_iat[off1]));
-		}
-	}
-#endif
-#if defined(_I386_BUS_MEMIO_H_)
-#if defined(_I386_BUS_PIO_H_) || defined(_I386_BUS_PIO_IND_H_)
-	if (tag == I386_BUS_SPACE_MEM)
-#endif
-	{
-		bus_addr_t addr1 = bsh1->bsh_base + off1;
-		bus_addr_t addr2 = bsh2->bsh_base + off2;
-		if (addr1 >= addr2) {
-			/* src after dest: copy forward */
-			for (; count != 0; count--, addr1 += 2, addr2 += 2)
-				*(volatile u_int16_t *)(addr2) =
-				    *(volatile u_int16_t *)(addr1);
-		} else {
-			/* dest after src: copy backwards */
-			for (addr1 += 2 * (count - 1), addr2 += 2 * (count - 1);
-			     count != 0; count--, addr1 -= 2, addr2 -= 2)
-				*(volatile u_int16_t *)(addr2) =
-				    *(volatile u_int16_t *)(addr1);
-		}
-	}
-#endif
-}
-
-static __inline void
-bus_space_copy_region_4(bus_space_tag_t tag, bus_space_handle_t bsh1,
-			bus_size_t off1, bus_space_handle_t bsh2,
-			bus_size_t off2, size_t count)
-{
-#if defined(_I386_BUS_PIO_H_)
-#if defined(_I386_BUS_PIO_IND_H_) || defined(_I386_BUS_MEMIO_H_)
-	if (tag == I386_BUS_SPACE_IO)
-#endif
-	{
-		bus_addr_t addr1 = bsh1->bsh_base + off1;
-		bus_addr_t addr2 = bsh2->bsh_base + off2;
-		if (addr1 >= addr2) {
-			/* src after dest: copy forward */
-			for (; count != 0; count--, addr1 += 4, addr2 += 4)
-				outl(addr2, inl(addr1));
-		} else {
-			/* dest after src: copy backwards */
-			for (addr1 += 4 * (count - 1), addr2 += 4 * (count - 1);
-			    count != 0; count--, addr1 -= 4, addr2 -= 4)
-				outl(addr2, inl(addr1));
-		}
-	}
-#endif
-#if defined(_I386_BUS_PIO_IND_H_)
-#if defined(_I386_BUS_PIO_H_) || defined(_I386_BUS_MEMIO_H_)
-	if (tag == I386_BUS_SPACE_IO_IND)
-#endif
-	{
-		if (bsh1->bsh_iat[off1] >= bsh2->bsh_iat[off2]) {
-			/* src after dest: copy forward */
-			for (; count != 0; count--, off1 += 4, off2 += 4)
-				outl(bsh2->bsh_iat[off2],
-				     inl(bsh1->bsh_iat[off1]));
-		} else {
-			/* dest after src: copy backwards */
-			for (off1 += 4 * (count - 1), off2 += 4 * (count - 1);
-			     count != 0; count--, off1 -= 4, off2 -= 4)
-				outl(bsh2->bsh_iat[off2],
-				     inl(bsh1->bsh_iat[off1]));
-		}
-	}
-#endif
-#if defined(_I386_BUS_MEMIO_H_)
-#if defined(_I386_BUS_PIO_H_) || defined(_I386_BUS_PIO_IND_H_)
-	if (tag == I386_BUS_SPACE_MEM)
-#endif
-	{
-		bus_addr_t addr1 = bsh1->bsh_base + off1;
-		bus_addr_t addr2 = bsh2->bsh_base + off2;
-		if (addr1 >= addr2) {
-			/* src after dest: copy forward */
-			for (; count != 0; count--, addr1 += 4, addr2 += 4)
-				*(volatile u_int32_t *)(addr2) =
-				    *(volatile u_int32_t *)(addr1);
-		} else {
-			/* dest after src: copy backwards */
-			for (addr1 += 4 * (count - 1), addr2 += 4 * (count - 1);
-			    count != 0; count--, addr1 -= 4, addr2 -= 4)
-				*(volatile u_int32_t *)(addr2) =
-				    *(volatile u_int32_t *)(addr1);
-		}
-	}
-#endif
-}
-
-#endif /* defined(_I386_BUS_PIO_H_) || defined(_I386_MEM_IO_H_) */
-
-#if 0	/* Cause a link error for bus_space_copy_8 */
-#define	bus_space_copy_region_8	!!! bus_space_copy_region_8 unimplemented !!!
-#endif
+_BUS_SPACE_COPY_REGION(1)
+_BUS_SPACE_COPY_REGION(2)
+_BUS_SPACE_COPY_REGION(4)
 
 /*
  * Bus read/write barrier methods.
diff --git a/sys/i386/include/bus_pio_ind.h b/sys/i386/include/bus_pio_ind.h
deleted file mode 100644
index c4d7169..0000000
--- a/sys/i386/include/bus_pio_ind.h
+++ /dev/null
@@ -1,31 +0,0 @@
-/*
- * Copyright (c) 1997 Justin Gibbs.
- * All rights reserved.
- *
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions
- * are met:
- * 1. Redistributions of source code must retain the above copyright
- *    notice, this list of conditions, and the following disclaimer,
- *    without modification, immediately at the beginning of the file.
- * 2. The name of the author may not be used to endorse or promote products
- *    derived from this software without specific prior written permission.
- *
- * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
- * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
- * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
- * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE FOR
- * ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
- * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
- * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
- * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
- * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
- * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
- * SUCH DAMAGE.
- *
- * $FreeBSD$
- */
-
-#ifndef _I386_BUS_PIO_IND_H_
-#define _I386_BUS_PIO_IND_H_
-#endif /* _I386_BUS_PIO_IND_H_ */
diff --git a/sys/i386/isa/isa.c b/sys/i386/isa/isa.c
index 1fd0c3c..4888029 100644
--- a/sys/i386/isa/isa.c
+++ b/sys/i386/isa/isa.c
@@ -197,19 +197,24 @@ isa_alloc_resourcev(device_t child, int type, int *rid,
 int
 isa_load_resourcev(struct resource *re, bus_addr_t *res, bus_size_t count)
 {
-	bus_addr_t	*addr;
+	bus_addr_t	start;
 	int		i;
 
-	addr = malloc(sizeof (bus_addr_t) * count, M_DEVBUF, M_NOWAIT);
-	if (addr == NULL)
-		return 1;
+	if (count > re->r_bushandle->bsh_maxiatsz) {
+		printf("isa_load_resourcev: map size too large\n");
+		return EINVAL;
+	}
 
-	for (i = 0; i < count; i++)
-		addr[i] = rman_get_start(re) + res[i];
+	start = rman_get_start(re);
+	for (i = 0; i < re->r_bushandle->bsh_maxiatsz; i++) {
+		if (i < count)
+			re->r_bushandle->bsh_iat[i] = start + res[i];
+		else
+			re->r_bushandle->bsh_iat[i] = start;
+	}
 
-	rman_set_bustag(re, I386_BUS_SPACE_IO_IND);
-	re->r_bushandle->bsh_iat = addr;
 	re->r_bushandle->bsh_iatsz = count;
+	re->r_bushandle->bsh_bam = re->r_bustag->bs_ra;	/* relocate access */
 
 	return 0;
 }
@@ -233,8 +238,6 @@ isa_release_resource(device_t bus, device_t child, int type, int rid,
 				      r->r_bushandle->bsh_res[i]);
 	if (r->r_bushandle->bsh_res != NULL)
 		free(r->r_bushandle->bsh_res, M_DEVBUF);
-	if (r->r_bushandle->bsh_iat != NULL)
-		free(r->r_bushandle->bsh_iat, M_DEVBUF);
 #endif
 	return resource_list_release(rl, bus, child, type, rid, r);
 }
diff --git a/sys/pc98/i386/busio.s b/sys/pc98/i386/busio.s
new file mode 100644
index 0000000..83eb9ca
--- /dev/null
+++ b/sys/pc98/i386/busio.s
@@ -0,0 +1,1671 @@
+/* $FreeBSD$ */
+/*	$NecBSD: busio.s,v 1.16.4.1 1999/08/16 09:06:08 kmatsuda Exp $	*/
+/*	$NetBSD$	*/
+
+/*
+ * [NetBSD for NEC PC-98 series]
+ *  Copyright (c) 1996, 1997, 1998
+ *	NetBSD/pc98 porting staff. All rights reserved.
+ *
+ * [Ported for FreeBSD]
+ *  Copyright (c) 2001
+ *	TAKAHASHI Yoshihiro. All rights reserved.
+ * 
+ *  Redistribution and use in source and binary forms, with or without
+ *  modification, are permitted provided that the following conditions
+ *  are met:
+ *  1. Redistributions of source code must retain the above copyright
+ *     notice, this list of conditions and the following disclaimer.
+ *  2. Redistributions in binary form must reproduce the above copyright
+ *     notice, this list of conditions and the following disclaimer in the
+ *     documentation and/or other materials provided with the distribution.
+ *  3. The name of the author may not be used to endorse or promote products
+ *     derived from this software without specific prior written permission.
+ * 
+ * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
+ * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
+ * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
+ * DISCLAIMED.  IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT,
+ * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
+ * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+ * POSSIBILITY OF SUCH DAMAGE.
+ */
+
+/*
+ * Copyright (c) 1997, 1998
+ *	Naofumi HONDA.  All rights reserved.
+ */
+
+#include <machine/asm.h>
+
+#include "assym.s"
+
+/***********************************************************
+ * Bus IO access methods (Direct Access)
+ ***********************************************************/
+#define	BUS_ACCESS_ADDR(BSHREG,ADDRREG) \
+	addl BUS_SPACE_HANDLE_BASE/**/(%/**/BSHREG/**/),%/**/ADDRREG
+
+/* 
+ *	read_N 
+ *	IN:  edx port
+ *	OUT: eax data
+ */
+ENTRY(SBUS_DA_io_space_read_1)
+	BUS_ACCESS_ADDR(ebx,edx)
+	inb	%dx,%al
+	ret
+
+ENTRY(SBUS_DA_io_space_read_2)
+	BUS_ACCESS_ADDR(ebx,edx)
+	inw	%dx,%ax
+	ret
+
+ENTRY(SBUS_DA_io_space_read_4)
+	BUS_ACCESS_ADDR(ebx,edx)
+	inl	%dx,%eax
+	ret
+
+/*
+ *	write_N
+ *	IN:eax DATA 
+ *	   edx PORT
+ */
+ENTRY(SBUS_DA_io_space_write_1)
+	BUS_ACCESS_ADDR(ebx,edx)
+	outb	%al,%dx
+	ret
+
+ENTRY(SBUS_DA_io_space_write_2)
+	BUS_ACCESS_ADDR(ebx,edx)
+	outw	%ax,%dx
+	ret
+
+ENTRY(SBUS_DA_io_space_write_4)
+	BUS_ACCESS_ADDR(ebx,edx)
+	outl	%eax,%dx
+	ret
+
+/*
+ *	read_multi_N
+ *	IN: ecx COUNT
+ *	    edx PORT
+ *	    edi BUFP
+ */
+ENTRY(SBUS_DA_io_space_read_multi_1)
+	BUS_ACCESS_ADDR(ebx,edx)
+	cld
+	rep
+	insb
+	ret
+
+ENTRY(SBUS_DA_io_space_read_multi_2)
+	BUS_ACCESS_ADDR(ebx,edx)
+	cld
+	rep
+	insw
+	ret
+
+ENTRY(SBUS_DA_io_space_read_multi_4)
+	BUS_ACCESS_ADDR(ebx,edx)
+	cld
+	rep
+	insl
+	ret
+
+/*
+ *	write_multi_N
+ *	IN: ecx COUNT
+ *	    edx PORT
+ *	    esi BUFP
+ */
+ENTRY(SBUS_DA_io_space_write_multi_1)
+	BUS_ACCESS_ADDR(ebx,edx)
+	cld
+	rep
+	outsb
+	ret
+
+ENTRY(SBUS_DA_io_space_write_multi_2)
+	BUS_ACCESS_ADDR(ebx,edx)
+	cld
+	rep
+	outsw
+	ret
+
+ENTRY(SBUS_DA_io_space_write_multi_4)
+	BUS_ACCESS_ADDR(ebx,edx)
+	cld
+	rep
+	outsl
+	ret
+
+/*
+ *	read_region_N
+ *	IN: ecx COUNT
+ *	    edx PORT
+ *	    edi BUFP
+ */
+ENTRY(SBUS_DA_io_space_read_region_1)
+	BUS_ACCESS_ADDR(ebx,edx)
+	cld
+	pushl	%eax
+	orl	%ecx,%ecx
+	jz	2f
+1:
+	inb	%dx,%al
+	stosb
+	incl	%edx
+	decl	%ecx
+	jnz	1b
+2:
+	popl	%eax
+	ret
+
+ENTRY(SBUS_DA_io_space_read_region_2)
+	BUS_ACCESS_ADDR(ebx,edx)
+	cld
+	pushl	%eax
+	orl	%ecx,%ecx
+	jz	2f
+1:
+	inw	%dx,%ax
+	stosw
+	addl	$2,%edx
+	decl	%ecx
+	jnz	1b
+2:
+	popl	%eax
+	ret
+
+ENTRY(SBUS_DA_io_space_read_region_4)
+	BUS_ACCESS_ADDR(ebx,edx)
+	cld
+	pushl	%eax
+	orl	%ecx,%ecx
+	jz	2f
+1:
+	inl	%dx,%eax
+	stosl
+	addl	$4,%edx
+	decl	%ecx
+	jnz	1b
+2:
+	popl	%eax
+	ret
+
+/*
+ *	write_region_N
+ *	IN: ecx COUNT
+ *	    edx PORT
+ *	    esi BUFP
+ */
+ENTRY(SBUS_DA_io_space_write_region_1)
+	BUS_ACCESS_ADDR(ebx,edx)
+	cld
+	pushl	%eax
+	orl	%ecx,%ecx
+	jz	2f
+1:
+	lodsb
+	outb	%al,%dx
+	incl	%edx
+	decl	%ecx
+	jnz	1b
+2:
+	popl	%eax
+	ret	
+
+ENTRY(SBUS_DA_io_space_write_region_2)
+	BUS_ACCESS_ADDR(ebx,edx)
+	cld
+	pushl	%eax
+	orl	%ecx,%ecx
+	jz	2f
+1:
+	lodsw
+	outw	%ax,%dx
+	addl	$2,%edx
+	decl	%ecx
+	jnz	1b
+2:
+	popl	%eax
+	ret	
+
+ENTRY(SBUS_DA_io_space_write_region_4)
+	BUS_ACCESS_ADDR(ebx,edx)
+	cld
+	pushl	%eax
+	orl	%ecx,%ecx
+	jz	2f
+1:
+	lodsl
+	outl	%eax,%dx
+	addl	$4,%edx
+	decl	%ecx
+	jnz	1b
+2:
+	popl	%eax
+	ret	
+
+/*
+ *	set_multi_N
+ *	IN: eax DATA
+ *	    ecx COUNT
+ *	    edx PORT
+ */
+ENTRY(SBUS_DA_io_space_set_multi_1)
+	BUS_ACCESS_ADDR(ebx,edx)
+	orl	%ecx,%ecx
+	jz	2f
+1:
+	outb	%al,%dx
+	decl	%ecx
+	jnz	1b
+2:
+	ret
+
+ENTRY(SBUS_DA_io_space_set_multi_2)
+	BUS_ACCESS_ADDR(ebx,edx)
+	orl	%ecx,%ecx
+	jz	2f
+1:
+	outw	%ax,%dx
+	decl	%ecx
+	jnz	1b
+2:
+	ret
+
+ENTRY(SBUS_DA_io_space_set_multi_4)
+	BUS_ACCESS_ADDR(ebx,edx)
+	orl	%ecx,%ecx
+	jz	2f
+1:
+	outl	%eax,%dx
+	decl	%ecx
+	jnz	1b
+2:
+	ret
+
+/*
+ *	set_region_N
+ *	IN: eax DATA
+ *	    ecx COUNT
+ *	    edx PORT
+ */
+ENTRY(SBUS_DA_io_space_set_region_1)
+	BUS_ACCESS_ADDR(ebx,edx)
+	orl	%ecx,%ecx
+	jz	2f
+1:
+	outb	%al,%dx
+	incl	%edx
+	decl	%ecx
+	jnz	1b
+2:
+	ret
+
+ENTRY(SBUS_DA_io_space_set_region_2)
+	BUS_ACCESS_ADDR(ebx,edx)
+	orl	%ecx,%ecx
+	jz	2f
+1:
+	outw	%ax,%dx
+	addl	$2,%edx
+	decl	%ecx
+	jnz	1b
+2:
+	ret
+
+ENTRY(SBUS_DA_io_space_set_region_4)
+	BUS_ACCESS_ADDR(ebx,edx)
+	orl	%ecx,%ecx
+	jz	2f
+1:
+	outl	%eax,%dx
+	addl	$4,%edx
+	decl	%ecx
+	jnz	1b
+2:
+	ret
+
+/*
+ *	copy_region_N
+ *	IN: ecx COUNT
+ *	    esi SPORT
+ *	    edi	DPORT
+ */
+ENTRY(SBUS_DA_io_space_copy_region_1)
+	BUS_ACCESS_ADDR(eax,esi)
+	BUS_ACCESS_ADDR(ebx,edi)
+	pushl	%eax
+	pushl	%edx
+	orl	%ecx,%ecx
+	jz	2f
+1:
+	movl	%esi,%edx
+	inb	%dx,%al
+	incl	%esi
+
+	movl	%edi,%edx
+	outb	%al,%dx
+	incl	%edi
+
+	decl	%ecx
+	jnz	1b
+2:
+	popl	%edx
+	popl	%eax
+	ret
+
+ENTRY(SBUS_DA_io_space_copy_region_2)
+	BUS_ACCESS_ADDR(eax,esi)
+	BUS_ACCESS_ADDR(ebx,edi)
+	pushl	%eax
+	pushl	%edx
+	orl	%ecx,%ecx
+	jz	2f
+1:
+	movl	%esi,%edx
+	inw	%dx,%ax
+	addl	$2,%esi
+
+	movl	%edi,%edx
+	outw	%ax,%dx
+	addl	$2,%edi
+
+	decl	%ecx
+	jnz	1b
+2:
+	popl	%edx
+	popl	%eax
+	ret
+
+ENTRY(SBUS_DA_io_space_copy_region_4)
+	BUS_ACCESS_ADDR(eax,esi)
+	BUS_ACCESS_ADDR(ebx,edi)
+	pushl	%eax
+	pushl	%edx
+	orl	%ecx,%ecx
+	jz	2f
+1:
+	movl	%esi,%edx
+	inl	%dx,%eax
+	addl	$4,%esi
+
+	movl	%edi,%edx
+	outl	%eax,%dx
+	addl	$4,%edi
+
+	decl	%ecx
+	jnz	1b
+2:
+	popl	%edx
+	popl	%eax
+	ret
+
+/***********************************************************
+ * Bus Memory access methods (Direct Access)
+ ***********************************************************/
+/*
+ *	read_N
+ */
+ENTRY(SBUS_DA_mem_space_read_1)
+	BUS_ACCESS_ADDR(ebx,edx)
+	movb	(%edx),%al
+	ret
+
+ENTRY(SBUS_DA_mem_space_read_2)
+	BUS_ACCESS_ADDR(ebx,edx)
+	movw	(%edx),%ax
+	ret
+
+ENTRY(SBUS_DA_mem_space_read_4)
+	BUS_ACCESS_ADDR(ebx,edx)
+	movl	(%edx),%eax
+	ret
+
+/*
+ *	write_N
+ */
+ENTRY(SBUS_DA_mem_space_write_1)
+	BUS_ACCESS_ADDR(ebx,edx)
+	movb	%al,(%edx)
+	ret
+
+ENTRY(SBUS_DA_mem_space_write_2)
+	BUS_ACCESS_ADDR(ebx,edx)
+	movw	%ax,(%edx)
+	ret
+
+ENTRY(SBUS_DA_mem_space_write_4)
+	BUS_ACCESS_ADDR(ebx,edx)
+	movl	%eax,(%edx)
+	ret
+
+/*
+ *	read_multi_N
+ */
+ENTRY(SBUS_DA_mem_space_read_multi_1)
+	BUS_ACCESS_ADDR(ebx,edx)
+	cld
+	pushl	%eax
+	orl	%ecx,%ecx
+	jz	2f
+1:
+	movb	(%edx),%al
+	stosb
+	decl	%ecx
+	jnz	1b
+2:
+	popl	%eax
+	ret
+
+ENTRY(SBUS_DA_mem_space_read_multi_2)
+	BUS_ACCESS_ADDR(ebx,edx)
+	cld
+	pushl	%eax
+	orl	%ecx,%ecx
+	jz	2f
+1:
+	movw	(%edx),%ax	
+	stosw
+	decl	%ecx
+	jnz	1b
+2:
+	popl	%eax
+	ret
+
+ENTRY(SBUS_DA_mem_space_read_multi_4)
+	BUS_ACCESS_ADDR(ebx,edx)
+	cld
+	pushl	%eax
+	orl	%ecx,%ecx
+	jz	2f
+1:
+	movl	(%edx),%eax	
+	stosl
+	decl	%ecx
+	jnz	1b
+2:
+	popl	%eax
+	ret
+
+/*
+ *	write_multi_N
+ */
+ENTRY(SBUS_DA_mem_space_write_multi_1)
+	BUS_ACCESS_ADDR(ebx,edx)
+	cld
+	pushl	%eax
+	orl	%ecx,%ecx
+	jz	2f
+1:
+	lodsb
+	movb	%al,(%edx)
+	decl	%ecx
+	jnz	1b
+2:
+	popl	%eax
+	ret
+
+ENTRY(SBUS_DA_mem_space_write_multi_2)
+	BUS_ACCESS_ADDR(ebx,edx)
+	cld
+	pushl	%eax
+	orl	%ecx,%ecx
+	jz	2f
+1:
+	lodsw
+	movw	%ax,(%edx)
+	decl	%ecx
+	jnz	1b
+2:
+	popl	%eax
+	ret
+
+ENTRY(SBUS_DA_mem_space_write_multi_4)
+	BUS_ACCESS_ADDR(ebx,edx)
+	cld
+	pushl	%eax
+	orl	%ecx,%ecx
+	jz	2f
+1:
+	lodsl
+	movl	%eax,(%edx)
+	decl	%ecx
+	jnz	1b
+2:
+	popl	%eax
+	ret
+
+/*
+ *	read_region_N
+ */
+ENTRY(SBUS_DA_mem_space_read_region_1)
+	BUS_ACCESS_ADDR(ebx,edx)
+	cld
+	pushl	%esi
+	movl	%edx,%esi
+	rep
+	movsb
+	popl	%esi
+	ret
+
+ENTRY(SBUS_DA_mem_space_read_region_2)
+	BUS_ACCESS_ADDR(ebx,edx)
+	cld
+	pushl	%esi
+	movl	%edx,%esi
+	rep
+	movsw
+	popl	%esi
+	ret
+
+ENTRY(SBUS_DA_mem_space_read_region_4)
+	BUS_ACCESS_ADDR(ebx,edx)
+	cld
+	pushl	%esi
+	movl	%edx,%esi
+	rep
+	movsl
+	popl	%esi
+	ret
+
+/*
+ *	write_region_N
+ */
+ENTRY(SBUS_DA_mem_space_write_region_1)
+	BUS_ACCESS_ADDR(ebx,edx)
+	cld
+	pushl	%edi
+	movl	%edx,%edi
+	rep
+	movsb
+	popl	%edi
+	ret
+
+ENTRY(SBUS_DA_mem_space_write_region_2)
+	BUS_ACCESS_ADDR(ebx,edx)
+	cld
+	pushl	%edi
+	movl	%edx,%edi
+	rep
+	movsw
+	popl	%edi
+	ret
+
+ENTRY(SBUS_DA_mem_space_write_region_4)
+	BUS_ACCESS_ADDR(ebx,edx)
+	cld
+	pushl	%edi
+	movl	%edx,%edi
+	rep
+	movsl
+	popl	%edi
+	ret
+
+/*
+ *	set_multi_N
+ */
+ENTRY(SBUS_DA_mem_space_set_multi_1)
+	BUS_ACCESS_ADDR(ebx,edx)
+	orl	%ecx,%ecx
+	jz	2f
+1:
+	movb	%al,(%edx)
+	decl	%ecx
+	jnz	1b
+2:
+	ret
+
+ENTRY(SBUS_DA_mem_space_set_multi_2)
+	BUS_ACCESS_ADDR(ebx,edx)
+	orl	%ecx,%ecx
+	jz	2f
+1:
+	movw	%ax,(%edx)
+	decl	%ecx
+	jnz	1b
+2:
+	ret
+
+ENTRY(SBUS_DA_mem_space_set_multi_4)
+	BUS_ACCESS_ADDR(ebx,edx)
+	orl	%ecx,%ecx
+	jz	2f
+1:
+	movl	%eax,(%edx)
+	decl	%ecx
+	jnz	1b
+2:
+	ret
+
+/*
+ *	set_region_N
+ */
+ENTRY(SBUS_DA_mem_space_set_region_1)
+	BUS_ACCESS_ADDR(ebx,edx)
+	cld
+	pushl	%edi
+	movl	%edx,%edi
+	rep
+	stosb
+	popl	%edi
+	ret
+
+ENTRY(SBUS_DA_mem_space_set_region_2)
+	BUS_ACCESS_ADDR(ebx,edx)
+	cld
+	pushl	%edi
+	movl	%edx,%edi
+	rep
+	stosw
+	popl	%edi
+	ret
+
+ENTRY(SBUS_DA_mem_space_set_region_4)
+	BUS_ACCESS_ADDR(ebx,edx)
+	cld
+	pushl	%edi
+	movl	%edx,%edi
+	rep
+	stosl
+	popl	%edi
+	ret
+
+/*
+ *	copy_region_N
+ */
+ENTRY(SBUS_DA_mem_space_copy_region_1)
+	BUS_ACCESS_ADDR(eax,esi)
+	BUS_ACCESS_ADDR(ebx,edi)
+	cld
+	rep
+	movsb
+	ret
+
+ENTRY(SBUS_DA_mem_space_copy_region_2)
+	BUS_ACCESS_ADDR(eax,esi)
+	BUS_ACCESS_ADDR(ebx,edi)
+	cld
+	rep
+	movsw
+	ret
+
+ENTRY(SBUS_DA_mem_space_copy_region_4)
+	BUS_ACCESS_ADDR(eax,esi)
+	BUS_ACCESS_ADDR(ebx,edi)
+	cld
+	rep
+	movsl
+	ret
+
+#undef	BUS_ACCESS_ADDR
+
+/***********************************************************
+ * Bus IO access methods (Relocate Access)
+ ***********************************************************/
+#define	BUS_ACCESS_ADDR(BSHREG,ADDRREG)	\
+	movl BUS_SPACE_HANDLE_IAT/**/(%/**/BSHREG/**/, %/**/ADDRREG/**/, 4), \
+	     %/**/ADDRREG
+/* 
+ *	read_N 
+ *	IN:  edx port
+ *	OUT: eax data
+ */
+ENTRY(SBUS_RA_io_space_read_1)
+	BUS_ACCESS_ADDR(ebx,edx)
+	inb	%dx,%al
+	ret
+
+ENTRY(SBUS_RA_io_space_read_2)
+	BUS_ACCESS_ADDR(ebx,edx)
+	inw	%dx,%ax
+	ret
+
+ENTRY(SBUS_RA_io_space_read_4)
+	BUS_ACCESS_ADDR(ebx,edx)
+	inl	%dx,%eax
+	ret
+
+/*
+ *	write_N
+ *	IN:eax DATA 
+ *	   edx PORT
+ */
+ENTRY(SBUS_RA_io_space_write_1)
+	BUS_ACCESS_ADDR(ebx,edx)
+	outb	%al,%dx
+	ret
+
+ENTRY(SBUS_RA_io_space_write_2)
+	BUS_ACCESS_ADDR(ebx,edx)
+	outw	%ax,%dx
+	ret
+
+ENTRY(SBUS_RA_io_space_write_4)
+	BUS_ACCESS_ADDR(ebx,edx)
+	outl	%eax,%dx
+	ret
+
+/*
+ *	read_multi_N
+ *	IN: ecx COUNT
+ *	    edx PORT
+ *	    edi BUFP
+ */
+ENTRY(SBUS_RA_io_space_read_multi_1)
+	BUS_ACCESS_ADDR(ebx,edx)
+	cld
+	rep
+	insb
+	ret
+
+ENTRY(SBUS_RA_io_space_read_multi_2)
+	BUS_ACCESS_ADDR(ebx,edx)
+	cld
+	rep
+	insw
+	ret
+
+ENTRY(SBUS_RA_io_space_read_multi_4)
+	BUS_ACCESS_ADDR(ebx,edx)
+	cld
+	rep
+	insl
+	ret
+
+/*
+ *	write_multi_N
+ *	IN: ecx COUNT
+ *	    edx PORT
+ *	    esi BUFP
+ */
+ENTRY(SBUS_RA_io_space_write_multi_1)
+	BUS_ACCESS_ADDR(ebx,edx)
+	cld
+	rep
+	outsb
+	ret
+
+ENTRY(SBUS_RA_io_space_write_multi_2)
+	BUS_ACCESS_ADDR(ebx,edx)
+	cld
+	rep
+	outsw
+	ret
+
+ENTRY(SBUS_RA_io_space_write_multi_4)
+	BUS_ACCESS_ADDR(ebx,edx)
+	cld
+	rep
+	outsl
+	ret
+
+/*
+ *	read_region_N
+ *	IN: ecx COUNT
+ *	    edx PORT
+ *	    edi BUFP
+ */
+ENTRY(SBUS_RA_io_space_read_region_1)
+	BUS_ACCESS_ADDR(ebx,edx)
+	cld
+	pushl	%eax
+	orl	%ecx,%ecx
+	jz	2f
+1:
+	inb	%dx,%al
+	stosb
+	incl	%edx
+	decl	%ecx
+	jnz	1b
+2:
+	popl	%eax
+	ret
+
+ENTRY(SBUS_RA_io_space_read_region_2)
+	BUS_ACCESS_ADDR(ebx,edx)
+	cld
+	pushl	%eax
+	orl	%ecx,%ecx
+	jz	2f
+1:
+	inw	%dx,%ax
+	stosw
+	addl	$2,%edx
+	decl	%ecx
+	jnz	1b
+2:
+	popl	%eax
+	ret
+
+ENTRY(SBUS_RA_io_space_read_region_4)
+	BUS_ACCESS_ADDR(ebx,edx)
+	cld
+	pushl	%eax
+	orl	%ecx,%ecx
+	jz	2f
+1:
+	inl	%dx,%eax
+	stosl
+	addl	$4,%edx
+	decl	%ecx
+	jnz	1b
+2:
+	popl	%eax
+	ret
+
+/*
+ *	write_region_N
+ *	IN: ecx COUNT
+ *	    edx PORT
+ *	    esi BUFP
+ */
+ENTRY(SBUS_RA_io_space_write_region_1)
+	BUS_ACCESS_ADDR(ebx,edx)
+	cld
+	pushl	%eax
+	orl	%ecx,%ecx
+	jz	2f
+1:
+	lodsb
+	outb	%al,%dx
+	incl	%edx
+	decl	%ecx
+	jnz	1b
+2:
+	popl	%eax
+	ret	
+
+ENTRY(SBUS_RA_io_space_write_region_2)
+	BUS_ACCESS_ADDR(ebx,edx)
+	cld
+	pushl	%eax
+	orl	%ecx,%ecx
+	jz	2f
+1:
+	lodsw
+	outw	%ax,%dx
+	addl	$2,%edx
+	decl	%ecx
+	jnz	1b
+2:
+	popl	%eax
+	ret	
+
+ENTRY(SBUS_RA_io_space_write_region_4)
+	BUS_ACCESS_ADDR(ebx,edx)
+	cld
+	pushl	%eax
+	orl	%ecx,%ecx
+	jz	2f
+1:
+	lodsl
+	outl	%eax,%dx
+	addl	$4,%edx
+	decl	%ecx
+	jnz	1b
+2:
+	popl	%eax
+	ret	
+
+/*
+ *	set_multi_N
+ *	IN: eax DATA
+ *	    ecx COUNT
+ *	    edx PORT
+ */
+ENTRY(SBUS_RA_io_space_set_multi_1)
+	BUS_ACCESS_ADDR(ebx,edx)
+	orl	%ecx,%ecx
+	jz	2f
+1:
+	outb	%al,%dx
+	decl	%ecx
+	jnz	1b
+2:
+	ret
+
+ENTRY(SBUS_RA_io_space_set_multi_2)
+	BUS_ACCESS_ADDR(ebx,edx)
+	orl	%ecx,%ecx
+	jz	2f
+1:
+	outw	%ax,%dx
+	decl	%ecx
+	jnz	1b
+2:
+	ret
+
+ENTRY(SBUS_RA_io_space_set_multi_4)
+	BUS_ACCESS_ADDR(ebx,edx)
+	orl	%ecx,%ecx
+	jz	2f
+1:
+	outl	%eax,%dx
+	decl	%ecx
+	jnz	1b
+2:
+	ret
+
+/*
+ *	set_region_N
+ *	IN: eax DATA
+ *	    ecx COUNT
+ *	    edx PORT
+ */
+ENTRY(SBUS_RA_io_space_set_region_1)
+	BUS_ACCESS_ADDR(ebx,edx)
+	orl	%ecx,%ecx
+	jz	2f
+1:
+	outb	%al,%dx
+	incl	%edx
+	decl	%ecx
+	jnz	1b
+2:
+	ret
+
+ENTRY(SBUS_RA_io_space_set_region_2)
+	BUS_ACCESS_ADDR(ebx,edx)
+	orl	%ecx,%ecx
+	jz	2f
+1:
+	outw	%ax,%dx
+	addl	$2,%edx
+	decl	%ecx
+	jnz	1b
+2:
+	ret
+
+ENTRY(SBUS_RA_io_space_set_region_4)
+	BUS_ACCESS_ADDR(ebx,edx)
+	orl	%ecx,%ecx
+	jz	2f
+1:
+	outl	%eax,%dx
+	addl	$4,%edx
+	decl	%ecx
+	jnz	1b
+2:
+	ret
+
+/*
+ *	copy_region_N
+ *	IN: ecx COUNT
+ *	    esi SPORT
+ *	    edi	DPORT
+ */
+ENTRY(SBUS_RA_io_space_copy_region_1)
+	BUS_ACCESS_ADDR(eax,esi)
+	BUS_ACCESS_ADDR(ebx,edi)
+	pushl	%eax
+	pushl	%edx
+	orl	%ecx,%ecx
+	jz	2f
+1:
+	movl	%esi,%edx
+	inb	%dx,%al
+	incl	%esi
+
+	movl	%edi,%edx
+	outb	%al,%dx
+	incl	%edi
+
+	decl	%ecx
+	jnz	1b
+2:
+	popl	%edx
+	popl	%eax
+	ret
+
+ENTRY(SBUS_RA_io_space_copy_region_2)
+	BUS_ACCESS_ADDR(eax,esi)
+	BUS_ACCESS_ADDR(ebx,edi)
+	pushl	%eax
+	pushl	%edx
+	orl	%ecx,%ecx
+	jz	2f
+1:
+	movl	%esi,%edx
+	inw	%dx,%ax
+	addl	$2,%esi
+
+	movl	%edi,%edx
+	outw	%ax,%dx
+	addl	$2,%edi
+
+	decl	%ecx
+	jnz	1b
+2:
+	popl	%edx
+	popl	%eax
+	ret
+
+ENTRY(SBUS_RA_io_space_copy_region_4)
+	BUS_ACCESS_ADDR(eax,esi)
+	BUS_ACCESS_ADDR(ebx,edi)
+	pushl	%eax
+	pushl	%edx
+	orl	%ecx,%ecx
+	jz	2f
+1:
+	movl	%esi,%edx
+	inl	%dx,%eax
+	addl	$4,%esi
+
+	movl	%edi,%edx
+	outl	%eax,%dx
+	addl	$4,%edi
+
+	decl	%ecx
+	jnz	1b
+2:
+	popl	%edx
+	popl	%eax
+	ret
+
+/***********************************************************
+ * Bus Memory access methods
+ ***********************************************************/
+/*
+ *	read_N
+ */
+ENTRY(SBUS_RA_mem_space_read_1)
+	BUS_ACCESS_ADDR(ebx,edx)
+	movb	(%edx),%al
+	ret
+
+ENTRY(SBUS_RA_mem_space_read_2)
+	BUS_ACCESS_ADDR(ebx,edx)
+	movw	(%edx),%ax
+	ret
+
+ENTRY(SBUS_RA_mem_space_read_4)
+	BUS_ACCESS_ADDR(ebx,edx)
+	movl	(%edx),%eax
+	ret
+
+/*
+ *	write_N
+ */
+ENTRY(SBUS_RA_mem_space_write_1)
+	BUS_ACCESS_ADDR(ebx,edx)
+	movb	%al,(%edx)
+	ret
+
+ENTRY(SBUS_RA_mem_space_write_2)
+	BUS_ACCESS_ADDR(ebx,edx)
+	movw	%ax,(%edx)
+	ret
+
+ENTRY(SBUS_RA_mem_space_write_4)
+	BUS_ACCESS_ADDR(ebx,edx)
+	movl	%eax,(%edx)
+	ret
+
+/*
+ *	read_multi_N
+ */
+ENTRY(SBUS_RA_mem_space_read_multi_1)
+	BUS_ACCESS_ADDR(ebx,edx)
+	cld
+	pushl	%eax
+	orl	%ecx,%ecx
+	jz	2f
+1:
+	movb	(%edx),%al
+	stosb
+	decl	%ecx
+	jnz	1b
+2:
+	popl	%eax
+	ret
+
+ENTRY(SBUS_RA_mem_space_read_multi_2)
+	BUS_ACCESS_ADDR(ebx,edx)
+	cld
+	pushl	%eax
+	orl	%ecx,%ecx
+	jz	2f
+1:
+	movw	(%edx),%ax	
+	stosw
+	decl	%ecx
+	jnz	1b
+2:
+	popl	%eax
+	ret
+
+ENTRY(SBUS_RA_mem_space_read_multi_4)
+	BUS_ACCESS_ADDR(ebx,edx)
+	cld
+	pushl	%eax
+	orl	%ecx,%ecx
+	jz	2f
+1:
+	movl	(%edx),%eax	
+	stosl
+	decl	%ecx
+	jnz	1b
+2:
+	popl	%eax
+	ret
+
+/*
+ *	write_multi_N
+ */
+ENTRY(SBUS_RA_mem_space_write_multi_1)
+	BUS_ACCESS_ADDR(ebx,edx)
+	cld
+	pushl	%eax
+	orl	%ecx,%ecx
+	jz	2f
+1:
+	lodsb
+	movb	%al,(%edx)
+	decl	%ecx
+	jnz	1b
+2:
+	popl	%eax
+	ret
+
+ENTRY(SBUS_RA_mem_space_write_multi_2)
+	BUS_ACCESS_ADDR(ebx,edx)
+	cld
+	pushl	%eax
+	orl	%ecx,%ecx
+	jz	2f
+1:
+	lodsw
+	movw	%ax,(%edx)
+	decl	%ecx
+	jnz	1b
+2:
+	popl	%eax
+	ret
+
+ENTRY(SBUS_RA_mem_space_write_multi_4)
+	BUS_ACCESS_ADDR(ebx,edx)
+	cld
+	pushl	%eax
+	orl	%ecx,%ecx
+	jz	2f
+1:
+	lodsl
+	movl	%eax,(%edx)
+	decl	%ecx
+	jnz	1b
+2:
+	popl	%eax
+	ret
+
+/*
+ *	read_region_N
+ */
+ENTRY(SBUS_RA_mem_space_read_region_1)
+	BUS_ACCESS_ADDR(ebx,edx)
+	cld
+	pushl	%esi
+	movl	%edx,%esi
+	rep
+	movsb
+	popl	%esi
+	ret
+
+ENTRY(SBUS_RA_mem_space_read_region_2)
+	BUS_ACCESS_ADDR(ebx,edx)
+	cld
+	pushl	%esi
+	movl	%edx,%esi
+	rep
+	movsw
+	popl	%esi
+	ret
+
+ENTRY(SBUS_RA_mem_space_read_region_4)
+	BUS_ACCESS_ADDR(ebx,edx)
+	cld
+	pushl	%esi
+	movl	%edx,%esi
+	rep
+	movsl
+	popl	%esi
+	ret
+
+/*
+ *	write_region_N
+ */
+ENTRY(SBUS_RA_mem_space_write_region_1)
+	BUS_ACCESS_ADDR(ebx,edx)
+	cld
+	pushl	%edi
+	movl	%edx,%edi
+	rep
+	movsb
+	popl	%edi
+	ret
+
+ENTRY(SBUS_RA_mem_space_write_region_2)
+	BUS_ACCESS_ADDR(ebx,edx)
+	cld
+	pushl	%edi
+	movl	%edx,%edi
+	rep
+	movsw
+	popl	%edi
+	ret
+
+ENTRY(SBUS_RA_mem_space_write_region_4)
+	BUS_ACCESS_ADDR(ebx,edx)
+	cld
+	pushl	%edi
+	movl	%edx,%edi
+	rep
+	movsl
+	popl	%edi
+	ret
+
+/*
+ *	set_multi_N
+ */
+ENTRY(SBUS_RA_mem_space_set_multi_1)
+	BUS_ACCESS_ADDR(ebx,edx)
+	orl	%ecx,%ecx
+	jz	2f
+1:
+	movb	%al,(%edx)
+	decl	%ecx
+	jnz	1b
+2:
+	ret
+
+ENTRY(SBUS_RA_mem_space_set_multi_2)
+	BUS_ACCESS_ADDR(ebx,edx)
+	orl	%ecx,%ecx
+	jz	2f
+1:
+	movw	%ax,(%edx)
+	decl	%ecx
+	jnz	1b
+2:
+	ret
+
+ENTRY(SBUS_RA_mem_space_set_multi_4)
+	BUS_ACCESS_ADDR(ebx,edx)
+	orl	%ecx,%ecx
+	jz	2f
+1:
+	movl	%eax,(%edx)
+	decl	%ecx
+	jnz	1b
+2:
+	ret
+
+/*
+ *	set_region_N
+ */
+ENTRY(SBUS_RA_mem_space_set_region_1)
+	BUS_ACCESS_ADDR(ebx,edx)
+	cld
+	pushl	%edi
+	movl	%edx,%edi
+	rep
+	stosb
+	popl	%edi
+	ret
+
+ENTRY(SBUS_RA_mem_space_set_region_2)
+	BUS_ACCESS_ADDR(ebx,edx)
+	cld
+	pushl	%edi
+	movl	%edx,%edi
+	rep
+	stosw
+	popl	%edi
+	ret
+
+ENTRY(SBUS_RA_mem_space_set_region_4)
+	BUS_ACCESS_ADDR(ebx,edx)
+	cld
+	pushl	%edi
+	movl	%edx,%edi
+	rep
+	stosl
+	popl	%edi
+	ret
+
+/*
+ *	copy_region_N
+ */
+ENTRY(SBUS_RA_mem_space_copy_region_1)
+	BUS_ACCESS_ADDR(eax,esi)
+	BUS_ACCESS_ADDR(ebx,edi)
+	cld
+	rep
+	movsb
+	ret
+
+ENTRY(SBUS_RA_mem_space_copy_region_2)
+	BUS_ACCESS_ADDR(eax,esi)
+	BUS_ACCESS_ADDR(ebx,edi)
+	cld
+	rep
+	movsw
+	ret
+
+ENTRY(SBUS_RA_mem_space_copy_region_4)
+	BUS_ACCESS_ADDR(eax,esi)
+	BUS_ACCESS_ADDR(ebx,edi)
+	cld
+	rep
+	movsl
+	ret
+
+#undef	BUS_ACCESS_ADDR
+
+
+#include "opt_mecia.h"
+#ifdef DEV_MECIA
+
+/***********************************************************
+ * NEPC pcmcia 16 bits bus access
+ ***********************************************************/
+#define	NEPC_SWITCH_BUS16	\
+	pushl	%ebp		;\
+	pushl	%eax		;\
+	pushl	%edx		;\
+	movl	$0x2a8e,%edx	;\
+	inb	%dx,%al		;\
+	movl	%eax,%ebp	;\
+	andl	$~0x20,%eax	;\
+	outb	%al,%dx		;\
+	popl	%edx		;\
+	popl	%eax
+
+#define	NEPC_BUS_RESTORE	\
+	pushl	%eax		;\
+	movl	%ebp,%eax	;\
+	xchgl	%edx,%ebp	;\
+	movl	$0x2a8e,%edx	;\
+	outb	%al,%dx		;\
+	xchgl	%ebp,%edx	;\
+	popl	%eax		;\
+	popl	%ebp
+	
+/***********************************************************
+ * NEPC pcmcia 16 bits bus acces (Direct Access)
+ ***********************************************************/
+#define	BUS_ACCESS_ADDR(BSHREG,ADDRREG) \
+	addl BUS_SPACE_HANDLE_BASE/**/(%/**/BSHREG/**/),%/**/ADDRREG
+
+ENTRY(NEPC_DA_io_space_read_2)
+	BUS_ACCESS_ADDR(ebx,edx)
+	NEPC_SWITCH_BUS16
+	inw	%dx,%ax
+	NEPC_BUS_RESTORE
+	ret
+
+
+ENTRY(NEPC_DA_io_space_write_2)
+	BUS_ACCESS_ADDR(ebx,edx)
+	NEPC_SWITCH_BUS16
+	outw	%ax,%dx
+	NEPC_BUS_RESTORE
+	ret
+
+ENTRY(NEPC_DA_io_space_read_multi_2)
+	BUS_ACCESS_ADDR(ebx,edx)
+	NEPC_SWITCH_BUS16
+	cld
+	rep
+	insw
+	NEPC_BUS_RESTORE
+	ret
+
+ENTRY(NEPC_DA_io_space_write_multi_2)
+	BUS_ACCESS_ADDR(ebx,edx)
+	NEPC_SWITCH_BUS16
+	cld
+	rep
+	outsw
+	NEPC_BUS_RESTORE
+	ret
+
+ENTRY(NEPC_DA_io_space_read_region_2)
+	NEPC_SWITCH_BUS16
+	call SBUS_DA_io_space_read_region_2
+	NEPC_BUS_RESTORE
+	ret
+
+ENTRY(NEPC_DA_io_space_write_region_2)
+	NEPC_SWITCH_BUS16
+	call SBUS_DA_io_space_write_region_2
+	NEPC_BUS_RESTORE
+	ret
+
+ENTRY(NEPC_DA_io_space_set_multi_2)
+	NEPC_SWITCH_BUS16
+	call SBUS_DA_io_space_set_multi_2
+	NEPC_BUS_RESTORE
+	ret
+
+
+ENTRY(NEPC_DA_io_space_set_region_2)
+	NEPC_SWITCH_BUS16
+	call SBUS_DA_io_space_set_region_2
+	NEPC_BUS_RESTORE
+	ret
+
+ENTRY(NEPC_DA_io_space_copy_region_2)
+	NEPC_SWITCH_BUS16
+	call SBUS_DA_io_space_copy_region_2
+	NEPC_BUS_RESTORE
+	ret
+
+ENTRY(NEPC_DA_io_space_read_4)
+	BUS_ACCESS_ADDR(ebx,edx)
+	NEPC_SWITCH_BUS16
+	inl	%dx,%eax
+	NEPC_BUS_RESTORE
+	ret
+
+ENTRY(NEPC_DA_io_space_write_4)
+	BUS_ACCESS_ADDR(ebx,edx)
+	NEPC_SWITCH_BUS16
+	outl	%eax,%dx
+	NEPC_BUS_RESTORE
+	ret
+
+ENTRY(NEPC_DA_io_space_read_multi_4)
+	BUS_ACCESS_ADDR(ebx,edx)
+	NEPC_SWITCH_BUS16
+	cld
+	rep
+	insl
+	NEPC_BUS_RESTORE
+	ret
+
+ENTRY(NEPC_DA_io_space_write_multi_4)
+	BUS_ACCESS_ADDR(ebx,edx)
+	NEPC_SWITCH_BUS16
+	cld
+	rep
+	outsl
+	NEPC_BUS_RESTORE
+	ret
+
+ENTRY(NEPC_DA_io_space_read_region_4)
+	NEPC_SWITCH_BUS16
+	call SBUS_DA_io_space_read_region_4
+	NEPC_BUS_RESTORE
+	ret
+
+ENTRY(NEPC_DA_io_space_write_region_4)
+	NEPC_SWITCH_BUS16
+	call SBUS_DA_io_space_write_region_4
+	NEPC_BUS_RESTORE
+	ret
+
+ENTRY(NEPC_DA_io_space_set_multi_4)
+	NEPC_SWITCH_BUS16
+	call SBUS_DA_io_space_set_multi_4
+	NEPC_BUS_RESTORE
+	ret
+
+
+ENTRY(NEPC_DA_io_space_set_region_4)
+	NEPC_SWITCH_BUS16
+	call SBUS_DA_io_space_set_region_4
+	NEPC_BUS_RESTORE
+	ret
+
+ENTRY(NEPC_DA_io_space_copy_region_4)
+	NEPC_SWITCH_BUS16
+	call SBUS_DA_io_space_copy_region_4
+	NEPC_BUS_RESTORE
+	ret
+
+#undef	BUS_ACCESS_ADDR
+
+/***********************************************************
+ * NEPC pcmcia 16 bits bus acces (Relocate Access)
+ ***********************************************************/
+#define	BUS_ACCESS_ADDR(BSHREG,ADDRREG)	\
+	movl BUS_SPACE_HANDLE_IAT/**/(%/**/BSHREG/**/, %/**/ADDRREG/**/, 4), \
+	     %/**/ADDRREG
+
+ENTRY(NEPC_RA_io_space_read_2)
+	BUS_ACCESS_ADDR(ebx,edx)
+	NEPC_SWITCH_BUS16
+	inw	%dx,%ax
+	NEPC_BUS_RESTORE
+	ret
+
+
+ENTRY(NEPC_RA_io_space_write_2)
+	BUS_ACCESS_ADDR(ebx,edx)
+	NEPC_SWITCH_BUS16
+	outw	%ax,%dx
+	NEPC_BUS_RESTORE
+	ret
+
+ENTRY(NEPC_RA_io_space_read_multi_2)
+	BUS_ACCESS_ADDR(ebx,edx)
+	NEPC_SWITCH_BUS16
+	cld
+	rep
+	insw
+	NEPC_BUS_RESTORE
+	ret
+
+ENTRY(NEPC_RA_io_space_write_multi_2)
+	BUS_ACCESS_ADDR(ebx,edx)
+	NEPC_SWITCH_BUS16
+	cld
+	rep
+	outsw
+	NEPC_BUS_RESTORE
+	ret
+
+ENTRY(NEPC_RA_io_space_read_region_2)
+	NEPC_SWITCH_BUS16
+	call SBUS_RA_io_space_read_region_2
+	NEPC_BUS_RESTORE
+	ret
+
+ENTRY(NEPC_RA_io_space_write_region_2)
+	NEPC_SWITCH_BUS16
+	call SBUS_RA_io_space_write_region_2
+	NEPC_BUS_RESTORE
+	ret
+
+ENTRY(NEPC_RA_io_space_set_multi_2)
+	NEPC_SWITCH_BUS16
+	call SBUS_RA_io_space_set_multi_2
+	NEPC_BUS_RESTORE
+	ret
+
+
+ENTRY(NEPC_RA_io_space_set_region_2)
+	NEPC_SWITCH_BUS16
+	call SBUS_RA_io_space_set_region_2
+	NEPC_BUS_RESTORE
+	ret
+
+ENTRY(NEPC_RA_io_space_copy_region_2)
+	NEPC_SWITCH_BUS16
+	call SBUS_RA_io_space_copy_region_2
+	NEPC_BUS_RESTORE
+	ret
+
+ENTRY(NEPC_RA_io_space_read_4)
+	BUS_ACCESS_ADDR(ebx,edx)
+	NEPC_SWITCH_BUS16
+	inl	%dx,%eax
+	NEPC_BUS_RESTORE
+	ret
+
+ENTRY(NEPC_RA_io_space_write_4)
+	BUS_ACCESS_ADDR(ebx,edx)
+	NEPC_SWITCH_BUS16
+	outl	%eax,%dx
+	NEPC_BUS_RESTORE
+	ret
+
+ENTRY(NEPC_RA_io_space_read_multi_4)
+	BUS_ACCESS_ADDR(ebx,edx)
+	NEPC_SWITCH_BUS16
+	cld
+	rep
+	insl
+	NEPC_BUS_RESTORE
+	ret
+
+ENTRY(NEPC_RA_io_space_write_multi_4)
+	BUS_ACCESS_ADDR(ebx,edx)
+	NEPC_SWITCH_BUS16
+	cld
+	rep
+	outsl
+	NEPC_BUS_RESTORE
+	ret
+
+ENTRY(NEPC_RA_io_space_read_region_4)
+	NEPC_SWITCH_BUS16
+	call SBUS_RA_io_space_read_region_4
+	NEPC_BUS_RESTORE
+	ret
+
+ENTRY(NEPC_RA_io_space_write_region_4)
+	NEPC_SWITCH_BUS16
+	call SBUS_RA_io_space_write_region_4
+	NEPC_BUS_RESTORE
+	ret
+
+ENTRY(NEPC_RA_io_space_set_multi_4)
+	NEPC_SWITCH_BUS16
+	call SBUS_RA_io_space_set_multi_4
+	NEPC_BUS_RESTORE
+	ret
+
+
+ENTRY(NEPC_RA_io_space_set_region_4)
+	NEPC_SWITCH_BUS16
+	call SBUS_RA_io_space_set_region_4
+	NEPC_BUS_RESTORE
+	ret
+
+ENTRY(NEPC_RA_io_space_copy_region_4)
+	NEPC_SWITCH_BUS16
+	call SBUS_RA_io_space_copy_region_4
+	NEPC_BUS_RESTORE
+	ret
+
+#endif /* DEV_MECIA */
diff --git a/sys/pc98/i386/busiosubr.c b/sys/pc98/i386/busiosubr.c
new file mode 100644
index 0000000..c2c6228
--- /dev/null
+++ b/sys/pc98/i386/busiosubr.c
@@ -0,0 +1,144 @@
+/* $FreeBSD$ */
+/*	$NecBSD: busiosubr.c,v 1.30.4.4 1999/08/28 02:25:35 honda Exp $	*/
+/*	$NetBSD$	*/
+
+/*
+ * [NetBSD for NEC PC-98 series]
+ *  Copyright (c) 1996, 1997, 1998
+ *	NetBSD/pc98 porting staff. All rights reserved.
+ *
+ * [Ported for FreeBSD]
+ *  Copyright (c) 2001
+ *	TAKAHASHI Yoshihiro. All rights reserved.
+ * 
+ *  Redistribution and use in source and binary forms, with or without
+ *  modification, are permitted provided that the following conditions
+ *  are met:
+ *  1. Redistributions of source code must retain the above copyright
+ *     notice, this list of conditions and the following disclaimer.
+ *  2. Redistributions in binary form must reproduce the above copyright
+ *     notice, this list of conditions and the following disclaimer in the
+ *     documentation and/or other materials provided with the distribution.
+ *  3. The name of the author may not be used to endorse or promote products
+ *     derived from this software without specific prior written permission.
+ * 
+ * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
+ * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
+ * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
+ * DISCLAIMED.  IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT,
+ * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
+ * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+ * POSSIBILITY OF SUCH DAMAGE.
+ */
+
+/*
+ * Copyright (c) 1997, 1998
+ *	Naofumi HONDA.  All rights reserved.
+ */
+
+#include <sys/param.h>
+#include <sys/systm.h>
+#include <sys/kernel.h>
+#include <machine/bus.h>
+
+_BUS_SPACE_CALL_FUNCS_PROTO(SBUS_DA_io,u_int8_t,1)
+_BUS_SPACE_CALL_FUNCS_PROTO(SBUS_DA_io,u_int16_t,2)
+_BUS_SPACE_CALL_FUNCS_PROTO(SBUS_DA_io,u_int32_t,4)
+_BUS_SPACE_CALL_FUNCS_PROTO(SBUS_DA_mem,u_int8_t,1)
+_BUS_SPACE_CALL_FUNCS_PROTO(SBUS_DA_mem,u_int16_t,2)
+_BUS_SPACE_CALL_FUNCS_PROTO(SBUS_DA_mem,u_int32_t,4)
+
+_BUS_SPACE_CALL_FUNCS_PROTO(SBUS_RA_io,u_int8_t,1)
+_BUS_SPACE_CALL_FUNCS_PROTO(SBUS_RA_io,u_int16_t,2)
+_BUS_SPACE_CALL_FUNCS_PROTO(SBUS_RA_io,u_int32_t,4)
+_BUS_SPACE_CALL_FUNCS_PROTO(SBUS_RA_mem,u_int8_t,1)
+_BUS_SPACE_CALL_FUNCS_PROTO(SBUS_RA_mem,u_int16_t,2)
+_BUS_SPACE_CALL_FUNCS_PROTO(SBUS_RA_mem,u_int32_t,4)
+
+struct bus_space_tag SBUS_io_space_tag = {
+	BUS_SPACE_IO,
+
+	/* direct bus access methods */
+	{
+		_BUS_SPACE_CALL_FUNCS_TAB(SBUS_DA_io,u_int8_t,1),
+		_BUS_SPACE_CALL_FUNCS_TAB(SBUS_DA_io,u_int16_t,2),
+		_BUS_SPACE_CALL_FUNCS_TAB(SBUS_DA_io,u_int32_t,4),
+	},
+
+	/* relocate bus access methods */
+	{
+		_BUS_SPACE_CALL_FUNCS_TAB(SBUS_RA_io,u_int8_t,1),
+		_BUS_SPACE_CALL_FUNCS_TAB(SBUS_RA_io,u_int16_t,2),
+		_BUS_SPACE_CALL_FUNCS_TAB(SBUS_RA_io,u_int32_t,4),
+	}
+};
+
+struct bus_space_tag SBUS_mem_space_tag = {
+	BUS_SPACE_MEM,
+
+	/* direct bus access methods */
+	{
+		_BUS_SPACE_CALL_FUNCS_TAB(SBUS_DA_mem,u_int8_t,1),
+		_BUS_SPACE_CALL_FUNCS_TAB(SBUS_DA_mem,u_int16_t,2),
+		_BUS_SPACE_CALL_FUNCS_TAB(SBUS_DA_mem,u_int32_t,4),
+	},
+
+	/* relocate bus access methods */
+	{
+		_BUS_SPACE_CALL_FUNCS_TAB(SBUS_RA_mem,u_int8_t,1),
+		_BUS_SPACE_CALL_FUNCS_TAB(SBUS_RA_mem,u_int16_t,2),
+		_BUS_SPACE_CALL_FUNCS_TAB(SBUS_RA_mem,u_int32_t,4),
+	}
+};
+
+
+#include "opt_mecia.h"
+#ifdef DEV_MECIA
+
+_BUS_SPACE_CALL_FUNCS_PROTO(NEPC_DA_io,u_int16_t,2)
+_BUS_SPACE_CALL_FUNCS_PROTO(NEPC_DA_io,u_int32_t,4)
+
+_BUS_SPACE_CALL_FUNCS_PROTO(NEPC_RA_io,u_int16_t,2)
+_BUS_SPACE_CALL_FUNCS_PROTO(NEPC_RA_io,u_int32_t,4)
+
+struct bus_space_tag NEPC_io_space_tag = {
+	BUS_SPACE_IO,
+
+	/* direct bus access methods */
+	{
+		_BUS_SPACE_CALL_FUNCS_TAB(SBUS_DA_io,u_int8_t,1),
+		_BUS_SPACE_CALL_FUNCS_TAB(NEPC_DA_io,u_int16_t,2),
+		_BUS_SPACE_CALL_FUNCS_TAB(NEPC_DA_io,u_int32_t,4),
+	},
+
+	/* relocate bus access methods */
+	{
+		_BUS_SPACE_CALL_FUNCS_TAB(SBUS_RA_io,u_int8_t,1),
+		_BUS_SPACE_CALL_FUNCS_TAB(NEPC_RA_io,u_int16_t,2),
+		_BUS_SPACE_CALL_FUNCS_TAB(NEPC_RA_io,u_int32_t,4),
+	}
+};
+
+struct bus_space_tag NEPC_mem_space_tag = {
+	BUS_SPACE_MEM,
+
+	/* direct bus access methods */
+	{
+		_BUS_SPACE_CALL_FUNCS_TAB(SBUS_DA_mem,u_int8_t,1),
+		_BUS_SPACE_CALL_FUNCS_TAB(SBUS_DA_mem,u_int16_t,2),
+		_BUS_SPACE_CALL_FUNCS_TAB(SBUS_DA_mem,u_int32_t,4),
+	},
+
+	/* relocate bus access methods */
+	{
+		_BUS_SPACE_CALL_FUNCS_TAB(SBUS_RA_mem,u_int8_t,1),
+		_BUS_SPACE_CALL_FUNCS_TAB(SBUS_RA_mem,u_int16_t,2),
+		_BUS_SPACE_CALL_FUNCS_TAB(SBUS_RA_mem,u_int32_t,4),
+	}
+};
+
+#endif /* DEV_MECIA */
diff --git a/sys/pc98/pc98/busio.s b/sys/pc98/pc98/busio.s
new file mode 100644
index 0000000..83eb9ca
--- /dev/null
+++ b/sys/pc98/pc98/busio.s
@@ -0,0 +1,1671 @@
+/* $FreeBSD$ */
+/*	$NecBSD: busio.s,v 1.16.4.1 1999/08/16 09:06:08 kmatsuda Exp $	*/
+/*	$NetBSD$	*/
+
+/*
+ * [NetBSD for NEC PC-98 series]
+ *  Copyright (c) 1996, 1997, 1998
+ *	NetBSD/pc98 porting staff. All rights reserved.
+ *
+ * [Ported for FreeBSD]
+ *  Copyright (c) 2001
+ *	TAKAHASHI Yoshihiro. All rights reserved.
+ * 
+ *  Redistribution and use in source and binary forms, with or without
+ *  modification, are permitted provided that the following conditions
+ *  are met:
+ *  1. Redistributions of source code must retain the above copyright
+ *     notice, this list of conditions and the following disclaimer.
+ *  2. Redistributions in binary form must reproduce the above copyright
+ *     notice, this list of conditions and the following disclaimer in the
+ *     documentation and/or other materials provided with the distribution.
+ *  3. The name of the author may not be used to endorse or promote products
+ *     derived from this software without specific prior written permission.
+ * 
+ * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
+ * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
+ * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
+ * DISCLAIMED.  IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT,
+ * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
+ * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+ * POSSIBILITY OF SUCH DAMAGE.
+ */
+
+/*
+ * Copyright (c) 1997, 1998
+ *	Naofumi HONDA.  All rights reserved.
+ */
+
+#include <machine/asm.h>
+
+#include "assym.s"
+
+/***********************************************************
+ * Bus IO access methods (Direct Access)
+ ***********************************************************/
+#define	BUS_ACCESS_ADDR(BSHREG,ADDRREG) \
+	addl BUS_SPACE_HANDLE_BASE/**/(%/**/BSHREG/**/),%/**/ADDRREG
+
+/* 
+ *	read_N 
+ *	IN:  edx port
+ *	OUT: eax data
+ */
+ENTRY(SBUS_DA_io_space_read_1)
+	BUS_ACCESS_ADDR(ebx,edx)
+	inb	%dx,%al
+	ret
+
+ENTRY(SBUS_DA_io_space_read_2)
+	BUS_ACCESS_ADDR(ebx,edx)
+	inw	%dx,%ax
+	ret
+
+ENTRY(SBUS_DA_io_space_read_4)
+	BUS_ACCESS_ADDR(ebx,edx)
+	inl	%dx,%eax
+	ret
+
+/*
+ *	write_N
+ *	IN:eax DATA 
+ *	   edx PORT
+ */
+ENTRY(SBUS_DA_io_space_write_1)
+	BUS_ACCESS_ADDR(ebx,edx)
+	outb	%al,%dx
+	ret
+
+ENTRY(SBUS_DA_io_space_write_2)
+	BUS_ACCESS_ADDR(ebx,edx)
+	outw	%ax,%dx
+	ret
+
+ENTRY(SBUS_DA_io_space_write_4)
+	BUS_ACCESS_ADDR(ebx,edx)
+	outl	%eax,%dx
+	ret
+
+/*
+ *	read_multi_N
+ *	IN: ecx COUNT
+ *	    edx PORT
+ *	    edi BUFP
+ */
+ENTRY(SBUS_DA_io_space_read_multi_1)
+	BUS_ACCESS_ADDR(ebx,edx)
+	cld
+	rep
+	insb
+	ret
+
+ENTRY(SBUS_DA_io_space_read_multi_2)
+	BUS_ACCESS_ADDR(ebx,edx)
+	cld
+	rep
+	insw
+	ret
+
+ENTRY(SBUS_DA_io_space_read_multi_4)
+	BUS_ACCESS_ADDR(ebx,edx)
+	cld
+	rep
+	insl
+	ret
+
+/*
+ *	write_multi_N
+ *	IN: ecx COUNT
+ *	    edx PORT
+ *	    esi BUFP
+ */
+ENTRY(SBUS_DA_io_space_write_multi_1)
+	BUS_ACCESS_ADDR(ebx,edx)
+	cld
+	rep
+	outsb
+	ret
+
+ENTRY(SBUS_DA_io_space_write_multi_2)
+	BUS_ACCESS_ADDR(ebx,edx)
+	cld
+	rep
+	outsw
+	ret
+
+ENTRY(SBUS_DA_io_space_write_multi_4)
+	BUS_ACCESS_ADDR(ebx,edx)
+	cld
+	rep
+	outsl
+	ret
+
+/*
+ *	read_region_N
+ *	IN: ecx COUNT
+ *	    edx PORT
+ *	    edi BUFP
+ */
+ENTRY(SBUS_DA_io_space_read_region_1)
+	BUS_ACCESS_ADDR(ebx,edx)
+	cld
+	pushl	%eax
+	orl	%ecx,%ecx
+	jz	2f
+1:
+	inb	%dx,%al
+	stosb
+	incl	%edx
+	decl	%ecx
+	jnz	1b
+2:
+	popl	%eax
+	ret
+
+ENTRY(SBUS_DA_io_space_read_region_2)
+	BUS_ACCESS_ADDR(ebx,edx)
+	cld
+	pushl	%eax
+	orl	%ecx,%ecx
+	jz	2f
+1:
+	inw	%dx,%ax
+	stosw
+	addl	$2,%edx
+	decl	%ecx
+	jnz	1b
+2:
+	popl	%eax
+	ret
+
+ENTRY(SBUS_DA_io_space_read_region_4)
+	BUS_ACCESS_ADDR(ebx,edx)
+	cld
+	pushl	%eax
+	orl	%ecx,%ecx
+	jz	2f
+1:
+	inl	%dx,%eax
+	stosl
+	addl	$4,%edx
+	decl	%ecx
+	jnz	1b
+2:
+	popl	%eax
+	ret
+
+/*
+ *	write_region_N
+ *	IN: ecx COUNT
+ *	    edx PORT
+ *	    esi BUFP
+ */
+ENTRY(SBUS_DA_io_space_write_region_1)
+	BUS_ACCESS_ADDR(ebx,edx)
+	cld
+	pushl	%eax
+	orl	%ecx,%ecx
+	jz	2f
+1:
+	lodsb
+	outb	%al,%dx
+	incl	%edx
+	decl	%ecx
+	jnz	1b
+2:
+	popl	%eax
+	ret	
+
+ENTRY(SBUS_DA_io_space_write_region_2)
+	BUS_ACCESS_ADDR(ebx,edx)
+	cld
+	pushl	%eax
+	orl	%ecx,%ecx
+	jz	2f
+1:
+	lodsw
+	outw	%ax,%dx
+	addl	$2,%edx
+	decl	%ecx
+	jnz	1b
+2:
+	popl	%eax
+	ret	
+
+ENTRY(SBUS_DA_io_space_write_region_4)
+	BUS_ACCESS_ADDR(ebx,edx)
+	cld
+	pushl	%eax
+	orl	%ecx,%ecx
+	jz	2f
+1:
+	lodsl
+	outl	%eax,%dx
+	addl	$4,%edx
+	decl	%ecx
+	jnz	1b
+2:
+	popl	%eax
+	ret	
+
+/*
+ *	set_multi_N
+ *	IN: eax DATA
+ *	    ecx COUNT
+ *	    edx PORT
+ */
+ENTRY(SBUS_DA_io_space_set_multi_1)
+	BUS_ACCESS_ADDR(ebx,edx)
+	orl	%ecx,%ecx
+	jz	2f
+1:
+	outb	%al,%dx
+	decl	%ecx
+	jnz	1b
+2:
+	ret
+
+ENTRY(SBUS_DA_io_space_set_multi_2)
+	BUS_ACCESS_ADDR(ebx,edx)
+	orl	%ecx,%ecx
+	jz	2f
+1:
+	outw	%ax,%dx
+	decl	%ecx
+	jnz	1b
+2:
+	ret
+
+ENTRY(SBUS_DA_io_space_set_multi_4)
+	BUS_ACCESS_ADDR(ebx,edx)
+	orl	%ecx,%ecx
+	jz	2f
+1:
+	outl	%eax,%dx
+	decl	%ecx
+	jnz	1b
+2:
+	ret
+
+/*
+ *	set_region_N
+ *	IN: eax DATA
+ *	    ecx COUNT
+ *	    edx PORT
+ */
+ENTRY(SBUS_DA_io_space_set_region_1)
+	BUS_ACCESS_ADDR(ebx,edx)
+	orl	%ecx,%ecx
+	jz	2f
+1:
+	outb	%al,%dx
+	incl	%edx
+	decl	%ecx
+	jnz	1b
+2:
+	ret
+
+ENTRY(SBUS_DA_io_space_set_region_2)
+	BUS_ACCESS_ADDR(ebx,edx)
+	orl	%ecx,%ecx
+	jz	2f
+1:
+	outw	%ax,%dx
+	addl	$2,%edx
+	decl	%ecx
+	jnz	1b
+2:
+	ret
+
+ENTRY(SBUS_DA_io_space_set_region_4)
+	BUS_ACCESS_ADDR(ebx,edx)
+	orl	%ecx,%ecx
+	jz	2f
+1:
+	outl	%eax,%dx
+	addl	$4,%edx
+	decl	%ecx
+	jnz	1b
+2:
+	ret
+
+/*
+ *	copy_region_N
+ *	IN: ecx COUNT
+ *	    esi SPORT
+ *	    edi	DPORT
+ */
+ENTRY(SBUS_DA_io_space_copy_region_1)
+	BUS_ACCESS_ADDR(eax,esi)
+	BUS_ACCESS_ADDR(ebx,edi)
+	pushl	%eax
+	pushl	%edx
+	orl	%ecx,%ecx
+	jz	2f
+1:
+	movl	%esi,%edx
+	inb	%dx,%al
+	incl	%esi
+
+	movl	%edi,%edx
+	outb	%al,%dx
+	incl	%edi
+
+	decl	%ecx
+	jnz	1b
+2:
+	popl	%edx
+	popl	%eax
+	ret
+
+ENTRY(SBUS_DA_io_space_copy_region_2)
+	BUS_ACCESS_ADDR(eax,esi)
+	BUS_ACCESS_ADDR(ebx,edi)
+	pushl	%eax
+	pushl	%edx
+	orl	%ecx,%ecx
+	jz	2f
+1:
+	movl	%esi,%edx
+	inw	%dx,%ax
+	addl	$2,%esi
+
+	movl	%edi,%edx
+	outw	%ax,%dx
+	addl	$2,%edi
+
+	decl	%ecx
+	jnz	1b
+2:
+	popl	%edx
+	popl	%eax
+	ret
+
+ENTRY(SBUS_DA_io_space_copy_region_4)
+	BUS_ACCESS_ADDR(eax,esi)
+	BUS_ACCESS_ADDR(ebx,edi)
+	pushl	%eax
+	pushl	%edx
+	orl	%ecx,%ecx
+	jz	2f
+1:
+	movl	%esi,%edx
+	inl	%dx,%eax
+	addl	$4,%esi
+
+	movl	%edi,%edx
+	outl	%eax,%dx
+	addl	$4,%edi
+
+	decl	%ecx
+	jnz	1b
+2:
+	popl	%edx
+	popl	%eax
+	ret
+
+/***********************************************************
+ * Bus Memory access methods (Direct Access)
+ ***********************************************************/
+/*
+ *	read_N
+ */
+ENTRY(SBUS_DA_mem_space_read_1)
+	BUS_ACCESS_ADDR(ebx,edx)
+	movb	(%edx),%al
+	ret
+
+ENTRY(SBUS_DA_mem_space_read_2)
+	BUS_ACCESS_ADDR(ebx,edx)
+	movw	(%edx),%ax
+	ret
+
+ENTRY(SBUS_DA_mem_space_read_4)
+	BUS_ACCESS_ADDR(ebx,edx)
+	movl	(%edx),%eax
+	ret
+
+/*
+ *	write_N
+ */
+ENTRY(SBUS_DA_mem_space_write_1)
+	BUS_ACCESS_ADDR(ebx,edx)
+	movb	%al,(%edx)
+	ret
+
+ENTRY(SBUS_DA_mem_space_write_2)
+	BUS_ACCESS_ADDR(ebx,edx)
+	movw	%ax,(%edx)
+	ret
+
+ENTRY(SBUS_DA_mem_space_write_4)
+	BUS_ACCESS_ADDR(ebx,edx)
+	movl	%eax,(%edx)
+	ret
+
+/*
+ *	read_multi_N
+ */
+ENTRY(SBUS_DA_mem_space_read_multi_1)
+	BUS_ACCESS_ADDR(ebx,edx)
+	cld
+	pushl	%eax
+	orl	%ecx,%ecx
+	jz	2f
+1:
+	movb	(%edx),%al
+	stosb
+	decl	%ecx
+	jnz	1b
+2:
+	popl	%eax
+	ret
+
+ENTRY(SBUS_DA_mem_space_read_multi_2)
+	BUS_ACCESS_ADDR(ebx,edx)
+	cld
+	pushl	%eax
+	orl	%ecx,%ecx
+	jz	2f
+1:
+	movw	(%edx),%ax	
+	stosw
+	decl	%ecx
+	jnz	1b
+2:
+	popl	%eax
+	ret
+
+ENTRY(SBUS_DA_mem_space_read_multi_4)
+	BUS_ACCESS_ADDR(ebx,edx)
+	cld
+	pushl	%eax
+	orl	%ecx,%ecx
+	jz	2f
+1:
+	movl	(%edx),%eax	
+	stosl
+	decl	%ecx
+	jnz	1b
+2:
+	popl	%eax
+	ret
+
+/*
+ *	write_multi_N
+ */
+ENTRY(SBUS_DA_mem_space_write_multi_1)
+	BUS_ACCESS_ADDR(ebx,edx)
+	cld
+	pushl	%eax
+	orl	%ecx,%ecx
+	jz	2f
+1:
+	lodsb
+	movb	%al,(%edx)
+	decl	%ecx
+	jnz	1b
+2:
+	popl	%eax
+	ret
+
+ENTRY(SBUS_DA_mem_space_write_multi_2)
+	BUS_ACCESS_ADDR(ebx,edx)
+	cld
+	pushl	%eax
+	orl	%ecx,%ecx
+	jz	2f
+1:
+	lodsw
+	movw	%ax,(%edx)
+	decl	%ecx
+	jnz	1b
+2:
+	popl	%eax
+	ret
+
+ENTRY(SBUS_DA_mem_space_write_multi_4)
+	BUS_ACCESS_ADDR(ebx,edx)
+	cld
+	pushl	%eax
+	orl	%ecx,%ecx
+	jz	2f
+1:
+	lodsl
+	movl	%eax,(%edx)
+	decl	%ecx
+	jnz	1b
+2:
+	popl	%eax
+	ret
+
+/*
+ *	read_region_N
+ */
+ENTRY(SBUS_DA_mem_space_read_region_1)
+	BUS_ACCESS_ADDR(ebx,edx)
+	cld
+	pushl	%esi
+	movl	%edx,%esi
+	rep
+	movsb
+	popl	%esi
+	ret
+
+ENTRY(SBUS_DA_mem_space_read_region_2)
+	BUS_ACCESS_ADDR(ebx,edx)
+	cld
+	pushl	%esi
+	movl	%edx,%esi
+	rep
+	movsw
+	popl	%esi
+	ret
+
+ENTRY(SBUS_DA_mem_space_read_region_4)
+	BUS_ACCESS_ADDR(ebx,edx)
+	cld
+	pushl	%esi
+	movl	%edx,%esi
+	rep
+	movsl
+	popl	%esi
+	ret
+
+/*
+ *	write_region_N
+ */
+ENTRY(SBUS_DA_mem_space_write_region_1)
+	BUS_ACCESS_ADDR(ebx,edx)
+	cld
+	pushl	%edi
+	movl	%edx,%edi
+	rep
+	movsb
+	popl	%edi
+	ret
+
+ENTRY(SBUS_DA_mem_space_write_region_2)
+	BUS_ACCESS_ADDR(ebx,edx)
+	cld
+	pushl	%edi
+	movl	%edx,%edi
+	rep
+	movsw
+	popl	%edi
+	ret
+
+ENTRY(SBUS_DA_mem_space_write_region_4)
+	BUS_ACCESS_ADDR(ebx,edx)
+	cld
+	pushl	%edi
+	movl	%edx,%edi
+	rep
+	movsl
+	popl	%edi
+	ret
+
+/*
+ *	set_multi_N
+ */
+ENTRY(SBUS_DA_mem_space_set_multi_1)
+	BUS_ACCESS_ADDR(ebx,edx)
+	orl	%ecx,%ecx
+	jz	2f
+1:
+	movb	%al,(%edx)
+	decl	%ecx
+	jnz	1b
+2:
+	ret
+
+ENTRY(SBUS_DA_mem_space_set_multi_2)
+	BUS_ACCESS_ADDR(ebx,edx)
+	orl	%ecx,%ecx
+	jz	2f
+1:
+	movw	%ax,(%edx)
+	decl	%ecx
+	jnz	1b
+2:
+	ret
+
+ENTRY(SBUS_DA_mem_space_set_multi_4)
+	BUS_ACCESS_ADDR(ebx,edx)
+	orl	%ecx,%ecx
+	jz	2f
+1:
+	movl	%eax,(%edx)
+	decl	%ecx
+	jnz	1b
+2:
+	ret
+
+/*
+ *	set_region_N
+ */
+ENTRY(SBUS_DA_mem_space_set_region_1)
+	BUS_ACCESS_ADDR(ebx,edx)
+	cld
+	pushl	%edi
+	movl	%edx,%edi
+	rep
+	stosb
+	popl	%edi
+	ret
+
+ENTRY(SBUS_DA_mem_space_set_region_2)
+	BUS_ACCESS_ADDR(ebx,edx)
+	cld
+	pushl	%edi
+	movl	%edx,%edi
+	rep
+	stosw
+	popl	%edi
+	ret
+
+ENTRY(SBUS_DA_mem_space_set_region_4)
+	BUS_ACCESS_ADDR(ebx,edx)
+	cld
+	pushl	%edi
+	movl	%edx,%edi
+	rep
+	stosl
+	popl	%edi
+	ret
+
+/*
+ *	copy_region_N
+ */
+ENTRY(SBUS_DA_mem_space_copy_region_1)
+	BUS_ACCESS_ADDR(eax,esi)
+	BUS_ACCESS_ADDR(ebx,edi)
+	cld
+	rep
+	movsb
+	ret
+
+ENTRY(SBUS_DA_mem_space_copy_region_2)
+	BUS_ACCESS_ADDR(eax,esi)
+	BUS_ACCESS_ADDR(ebx,edi)
+	cld
+	rep
+	movsw
+	ret
+
+ENTRY(SBUS_DA_mem_space_copy_region_4)
+	BUS_ACCESS_ADDR(eax,esi)
+	BUS_ACCESS_ADDR(ebx,edi)
+	cld
+	rep
+	movsl
+	ret
+
+#undef	BUS_ACCESS_ADDR
+
+/***********************************************************
+ * Bus IO access methods (Relocate Access)
+ ***********************************************************/
+#define	BUS_ACCESS_ADDR(BSHREG,ADDRREG)	\
+	movl BUS_SPACE_HANDLE_IAT/**/(%/**/BSHREG/**/, %/**/ADDRREG/**/, 4), \
+	     %/**/ADDRREG
+/* 
+ *	read_N 
+ *	IN:  edx port
+ *	OUT: eax data
+ */
+ENTRY(SBUS_RA_io_space_read_1)
+	BUS_ACCESS_ADDR(ebx,edx)
+	inb	%dx,%al
+	ret
+
+ENTRY(SBUS_RA_io_space_read_2)
+	BUS_ACCESS_ADDR(ebx,edx)
+	inw	%dx,%ax
+	ret
+
+ENTRY(SBUS_RA_io_space_read_4)
+	BUS_ACCESS_ADDR(ebx,edx)
+	inl	%dx,%eax
+	ret
+
+/*
+ *	write_N
+ *	IN:eax DATA 
+ *	   edx PORT
+ */
+ENTRY(SBUS_RA_io_space_write_1)
+	BUS_ACCESS_ADDR(ebx,edx)
+	outb	%al,%dx
+	ret
+
+ENTRY(SBUS_RA_io_space_write_2)
+	BUS_ACCESS_ADDR(ebx,edx)
+	outw	%ax,%dx
+	ret
+
+ENTRY(SBUS_RA_io_space_write_4)
+	BUS_ACCESS_ADDR(ebx,edx)
+	outl	%eax,%dx
+	ret
+
+/*
+ *	read_multi_N
+ *	IN: ecx COUNT
+ *	    edx PORT
+ *	    edi BUFP
+ */
+ENTRY(SBUS_RA_io_space_read_multi_1)
+	BUS_ACCESS_ADDR(ebx,edx)
+	cld
+	rep
+	insb
+	ret
+
+ENTRY(SBUS_RA_io_space_read_multi_2)
+	BUS_ACCESS_ADDR(ebx,edx)
+	cld
+	rep
+	insw
+	ret
+
+ENTRY(SBUS_RA_io_space_read_multi_4)
+	BUS_ACCESS_ADDR(ebx,edx)
+	cld
+	rep
+	insl
+	ret
+
+/*
+ *	write_multi_N
+ *	IN: ecx COUNT
+ *	    edx PORT
+ *	    esi BUFP
+ */
+ENTRY(SBUS_RA_io_space_write_multi_1)
+	BUS_ACCESS_ADDR(ebx,edx)
+	cld
+	rep
+	outsb
+	ret
+
+ENTRY(SBUS_RA_io_space_write_multi_2)
+	BUS_ACCESS_ADDR(ebx,edx)
+	cld
+	rep
+	outsw
+	ret
+
+ENTRY(SBUS_RA_io_space_write_multi_4)
+	BUS_ACCESS_ADDR(ebx,edx)
+	cld
+	rep
+	outsl
+	ret
+
+/*
+ *	read_region_N
+ *	IN: ecx COUNT
+ *	    edx PORT
+ *	    edi BUFP
+ */
+ENTRY(SBUS_RA_io_space_read_region_1)
+	BUS_ACCESS_ADDR(ebx,edx)
+	cld
+	pushl	%eax
+	orl	%ecx,%ecx
+	jz	2f
+1:
+	inb	%dx,%al
+	stosb
+	incl	%edx
+	decl	%ecx
+	jnz	1b
+2:
+	popl	%eax
+	ret
+
+ENTRY(SBUS_RA_io_space_read_region_2)
+	BUS_ACCESS_ADDR(ebx,edx)
+	cld
+	pushl	%eax
+	orl	%ecx,%ecx
+	jz	2f
+1:
+	inw	%dx,%ax
+	stosw
+	addl	$2,%edx
+	decl	%ecx
+	jnz	1b
+2:
+	popl	%eax
+	ret
+
+ENTRY(SBUS_RA_io_space_read_region_4)
+	BUS_ACCESS_ADDR(ebx,edx)
+	cld
+	pushl	%eax
+	orl	%ecx,%ecx
+	jz	2f
+1:
+	inl	%dx,%eax
+	stosl
+	addl	$4,%edx
+	decl	%ecx
+	jnz	1b
+2:
+	popl	%eax
+	ret
+
+/*
+ *	write_region_N
+ *	IN: ecx COUNT
+ *	    edx PORT
+ *	    esi BUFP
+ */
+ENTRY(SBUS_RA_io_space_write_region_1)
+	BUS_ACCESS_ADDR(ebx,edx)
+	cld
+	pushl	%eax
+	orl	%ecx,%ecx
+	jz	2f
+1:
+	lodsb
+	outb	%al,%dx
+	incl	%edx
+	decl	%ecx
+	jnz	1b
+2:
+	popl	%eax
+	ret	
+
+ENTRY(SBUS_RA_io_space_write_region_2)
+	BUS_ACCESS_ADDR(ebx,edx)
+	cld
+	pushl	%eax
+	orl	%ecx,%ecx
+	jz	2f
+1:
+	lodsw
+	outw	%ax,%dx
+	addl	$2,%edx
+	decl	%ecx
+	jnz	1b
+2:
+	popl	%eax
+	ret	
+
+ENTRY(SBUS_RA_io_space_write_region_4)
+	BUS_ACCESS_ADDR(ebx,edx)
+	cld
+	pushl	%eax
+	orl	%ecx,%ecx
+	jz	2f
+1:
+	lodsl
+	outl	%eax,%dx
+	addl	$4,%edx
+	decl	%ecx
+	jnz	1b
+2:
+	popl	%eax
+	ret	
+
+/*
+ *	set_multi_N
+ *	IN: eax DATA
+ *	    ecx COUNT
+ *	    edx PORT
+ */
+ENTRY(SBUS_RA_io_space_set_multi_1)
+	BUS_ACCESS_ADDR(ebx,edx)
+	orl	%ecx,%ecx
+	jz	2f
+1:
+	outb	%al,%dx
+	decl	%ecx
+	jnz	1b
+2:
+	ret
+
+ENTRY(SBUS_RA_io_space_set_multi_2)
+	BUS_ACCESS_ADDR(ebx,edx)
+	orl	%ecx,%ecx
+	jz	2f
+1:
+	outw	%ax,%dx
+	decl	%ecx
+	jnz	1b
+2:
+	ret
+
+ENTRY(SBUS_RA_io_space_set_multi_4)
+	BUS_ACCESS_ADDR(ebx,edx)
+	orl	%ecx,%ecx
+	jz	2f
+1:
+	outl	%eax,%dx
+	decl	%ecx
+	jnz	1b
+2:
+	ret
+
+/*
+ *	set_region_N
+ *	IN: eax DATA
+ *	    ecx COUNT
+ *	    edx PORT
+ */
+ENTRY(SBUS_RA_io_space_set_region_1)
+	BUS_ACCESS_ADDR(ebx,edx)
+	orl	%ecx,%ecx
+	jz	2f
+1:
+	outb	%al,%dx
+	incl	%edx
+	decl	%ecx
+	jnz	1b
+2:
+	ret
+
+ENTRY(SBUS_RA_io_space_set_region_2)
+	BUS_ACCESS_ADDR(ebx,edx)
+	orl	%ecx,%ecx
+	jz	2f
+1:
+	outw	%ax,%dx
+	addl	$2,%edx
+	decl	%ecx
+	jnz	1b
+2:
+	ret
+
+ENTRY(SBUS_RA_io_space_set_region_4)
+	BUS_ACCESS_ADDR(ebx,edx)
+	orl	%ecx,%ecx
+	jz	2f
+1:
+	outl	%eax,%dx
+	addl	$4,%edx
+	decl	%ecx
+	jnz	1b
+2:
+	ret
+
+/*
+ *	copy_region_N
+ *	IN: ecx COUNT
+ *	    esi SPORT
+ *	    edi	DPORT
+ */
+ENTRY(SBUS_RA_io_space_copy_region_1)
+	BUS_ACCESS_ADDR(eax,esi)
+	BUS_ACCESS_ADDR(ebx,edi)
+	pushl	%eax
+	pushl	%edx
+	orl	%ecx,%ecx
+	jz	2f
+1:
+	movl	%esi,%edx
+	inb	%dx,%al
+	incl	%esi
+
+	movl	%edi,%edx
+	outb	%al,%dx
+	incl	%edi
+
+	decl	%ecx
+	jnz	1b
+2:
+	popl	%edx
+	popl	%eax
+	ret
+
+ENTRY(SBUS_RA_io_space_copy_region_2)
+	BUS_ACCESS_ADDR(eax,esi)
+	BUS_ACCESS_ADDR(ebx,edi)
+	pushl	%eax
+	pushl	%edx
+	orl	%ecx,%ecx
+	jz	2f
+1:
+	movl	%esi,%edx
+	inw	%dx,%ax
+	addl	$2,%esi
+
+	movl	%edi,%edx
+	outw	%ax,%dx
+	addl	$2,%edi
+
+	decl	%ecx
+	jnz	1b
+2:
+	popl	%edx
+	popl	%eax
+	ret
+
+ENTRY(SBUS_RA_io_space_copy_region_4)
+	BUS_ACCESS_ADDR(eax,esi)
+	BUS_ACCESS_ADDR(ebx,edi)
+	pushl	%eax
+	pushl	%edx
+	orl	%ecx,%ecx
+	jz	2f
+1:
+	movl	%esi,%edx
+	inl	%dx,%eax
+	addl	$4,%esi
+
+	movl	%edi,%edx
+	outl	%eax,%dx
+	addl	$4,%edi
+
+	decl	%ecx
+	jnz	1b
+2:
+	popl	%edx
+	popl	%eax
+	ret
+
+/***********************************************************
+ * Bus Memory access methods
+ ***********************************************************/
+/*
+ *	read_N
+ */
+ENTRY(SBUS_RA_mem_space_read_1)
+	BUS_ACCESS_ADDR(ebx,edx)
+	movb	(%edx),%al
+	ret
+
+ENTRY(SBUS_RA_mem_space_read_2)
+	BUS_ACCESS_ADDR(ebx,edx)
+	movw	(%edx),%ax
+	ret
+
+ENTRY(SBUS_RA_mem_space_read_4)
+	BUS_ACCESS_ADDR(ebx,edx)
+	movl	(%edx),%eax
+	ret
+
+/*
+ *	write_N
+ */
+ENTRY(SBUS_RA_mem_space_write_1)
+	BUS_ACCESS_ADDR(ebx,edx)
+	movb	%al,(%edx)
+	ret
+
+ENTRY(SBUS_RA_mem_space_write_2)
+	BUS_ACCESS_ADDR(ebx,edx)
+	movw	%ax,(%edx)
+	ret
+
+ENTRY(SBUS_RA_mem_space_write_4)
+	BUS_ACCESS_ADDR(ebx,edx)
+	movl	%eax,(%edx)
+	ret
+
+/*
+ *	read_multi_N
+ */
+ENTRY(SBUS_RA_mem_space_read_multi_1)
+	BUS_ACCESS_ADDR(ebx,edx)
+	cld
+	pushl	%eax
+	orl	%ecx,%ecx
+	jz	2f
+1:
+	movb	(%edx),%al
+	stosb
+	decl	%ecx
+	jnz	1b
+2:
+	popl	%eax
+	ret
+
+ENTRY(SBUS_RA_mem_space_read_multi_2)
+	BUS_ACCESS_ADDR(ebx,edx)
+	cld
+	pushl	%eax
+	orl	%ecx,%ecx
+	jz	2f
+1:
+	movw	(%edx),%ax	
+	stosw
+	decl	%ecx
+	jnz	1b
+2:
+	popl	%eax
+	ret
+
+ENTRY(SBUS_RA_mem_space_read_multi_4)
+	BUS_ACCESS_ADDR(ebx,edx)
+	cld
+	pushl	%eax
+	orl	%ecx,%ecx
+	jz	2f
+1:
+	movl	(%edx),%eax	
+	stosl
+	decl	%ecx
+	jnz	1b
+2:
+	popl	%eax
+	ret
+
+/*
+ *	write_multi_N
+ */
+ENTRY(SBUS_RA_mem_space_write_multi_1)
+	BUS_ACCESS_ADDR(ebx,edx)
+	cld
+	pushl	%eax
+	orl	%ecx,%ecx
+	jz	2f
+1:
+	lodsb
+	movb	%al,(%edx)
+	decl	%ecx
+	jnz	1b
+2:
+	popl	%eax
+	ret
+
+ENTRY(SBUS_RA_mem_space_write_multi_2)
+	BUS_ACCESS_ADDR(ebx,edx)
+	cld
+	pushl	%eax
+	orl	%ecx,%ecx
+	jz	2f
+1:
+	lodsw
+	movw	%ax,(%edx)
+	decl	%ecx
+	jnz	1b
+2:
+	popl	%eax
+	ret
+
+ENTRY(SBUS_RA_mem_space_write_multi_4)
+	BUS_ACCESS_ADDR(ebx,edx)
+	cld
+	pushl	%eax
+	orl	%ecx,%ecx
+	jz	2f
+1:
+	lodsl
+	movl	%eax,(%edx)
+	decl	%ecx
+	jnz	1b
+2:
+	popl	%eax
+	ret
+
+/*
+ *	read_region_N
+ */
+ENTRY(SBUS_RA_mem_space_read_region_1)
+	BUS_ACCESS_ADDR(ebx,edx)
+	cld
+	pushl	%esi
+	movl	%edx,%esi
+	rep
+	movsb
+	popl	%esi
+	ret
+
+ENTRY(SBUS_RA_mem_space_read_region_2)
+	BUS_ACCESS_ADDR(ebx,edx)
+	cld
+	pushl	%esi
+	movl	%edx,%esi
+	rep
+	movsw
+	popl	%esi
+	ret
+
+ENTRY(SBUS_RA_mem_space_read_region_4)
+	BUS_ACCESS_ADDR(ebx,edx)
+	cld
+	pushl	%esi
+	movl	%edx,%esi
+	rep
+	movsl
+	popl	%esi
+	ret
+
+/*
+ *	write_region_N
+ */
+ENTRY(SBUS_RA_mem_space_write_region_1)
+	BUS_ACCESS_ADDR(ebx,edx)
+	cld
+	pushl	%edi
+	movl	%edx,%edi
+	rep
+	movsb
+	popl	%edi
+	ret
+
+ENTRY(SBUS_RA_mem_space_write_region_2)
+	BUS_ACCESS_ADDR(ebx,edx)
+	cld
+	pushl	%edi
+	movl	%edx,%edi
+	rep
+	movsw
+	popl	%edi
+	ret
+
+ENTRY(SBUS_RA_mem_space_write_region_4)
+	BUS_ACCESS_ADDR(ebx,edx)
+	cld
+	pushl	%edi
+	movl	%edx,%edi
+	rep
+	movsl
+	popl	%edi
+	ret
+
+/*
+ *	set_multi_N
+ */
+ENTRY(SBUS_RA_mem_space_set_multi_1)
+	BUS_ACCESS_ADDR(ebx,edx)
+	orl	%ecx,%ecx
+	jz	2f
+1:
+	movb	%al,(%edx)
+	decl	%ecx
+	jnz	1b
+2:
+	ret
+
+ENTRY(SBUS_RA_mem_space_set_multi_2)
+	BUS_ACCESS_ADDR(ebx,edx)
+	orl	%ecx,%ecx
+	jz	2f
+1:
+	movw	%ax,(%edx)
+	decl	%ecx
+	jnz	1b
+2:
+	ret
+
+ENTRY(SBUS_RA_mem_space_set_multi_4)
+	BUS_ACCESS_ADDR(ebx,edx)
+	orl	%ecx,%ecx
+	jz	2f
+1:
+	movl	%eax,(%edx)
+	decl	%ecx
+	jnz	1b
+2:
+	ret
+
+/*
+ *	set_region_N
+ */
+ENTRY(SBUS_RA_mem_space_set_region_1)
+	BUS_ACCESS_ADDR(ebx,edx)
+	cld
+	pushl	%edi
+	movl	%edx,%edi
+	rep
+	stosb
+	popl	%edi
+	ret
+
+ENTRY(SBUS_RA_mem_space_set_region_2)
+	BUS_ACCESS_ADDR(ebx,edx)
+	cld
+	pushl	%edi
+	movl	%edx,%edi
+	rep
+	stosw
+	popl	%edi
+	ret
+
+ENTRY(SBUS_RA_mem_space_set_region_4)
+	BUS_ACCESS_ADDR(ebx,edx)
+	cld
+	pushl	%edi
+	movl	%edx,%edi
+	rep
+	stosl
+	popl	%edi
+	ret
+
+/*
+ *	copy_region_N
+ */
+ENTRY(SBUS_RA_mem_space_copy_region_1)
+	BUS_ACCESS_ADDR(eax,esi)
+	BUS_ACCESS_ADDR(ebx,edi)
+	cld
+	rep
+	movsb
+	ret
+
+ENTRY(SBUS_RA_mem_space_copy_region_2)
+	BUS_ACCESS_ADDR(eax,esi)
+	BUS_ACCESS_ADDR(ebx,edi)
+	cld
+	rep
+	movsw
+	ret
+
+ENTRY(SBUS_RA_mem_space_copy_region_4)
+	BUS_ACCESS_ADDR(eax,esi)
+	BUS_ACCESS_ADDR(ebx,edi)
+	cld
+	rep
+	movsl
+	ret
+
+#undef	BUS_ACCESS_ADDR
+
+
+#include "opt_mecia.h"
+#ifdef DEV_MECIA
+
+/***********************************************************
+ * NEPC pcmcia 16 bits bus access
+ ***********************************************************/
+#define	NEPC_SWITCH_BUS16	\
+	pushl	%ebp		;\
+	pushl	%eax		;\
+	pushl	%edx		;\
+	movl	$0x2a8e,%edx	;\
+	inb	%dx,%al		;\
+	movl	%eax,%ebp	;\
+	andl	$~0x20,%eax	;\
+	outb	%al,%dx		;\
+	popl	%edx		;\
+	popl	%eax
+
+#define	NEPC_BUS_RESTORE	\
+	pushl	%eax		;\
+	movl	%ebp,%eax	;\
+	xchgl	%edx,%ebp	;\
+	movl	$0x2a8e,%edx	;\
+	outb	%al,%dx		;\
+	xchgl	%ebp,%edx	;\
+	popl	%eax		;\
+	popl	%ebp
+	
+/***********************************************************
+ * NEPC pcmcia 16 bits bus acces (Direct Access)
+ ***********************************************************/
+#define	BUS_ACCESS_ADDR(BSHREG,ADDRREG) \
+	addl BUS_SPACE_HANDLE_BASE/**/(%/**/BSHREG/**/),%/**/ADDRREG
+
+ENTRY(NEPC_DA_io_space_read_2)
+	BUS_ACCESS_ADDR(ebx,edx)
+	NEPC_SWITCH_BUS16
+	inw	%dx,%ax
+	NEPC_BUS_RESTORE
+	ret
+
+
+ENTRY(NEPC_DA_io_space_write_2)
+	BUS_ACCESS_ADDR(ebx,edx)
+	NEPC_SWITCH_BUS16
+	outw	%ax,%dx
+	NEPC_BUS_RESTORE
+	ret
+
+ENTRY(NEPC_DA_io_space_read_multi_2)
+	BUS_ACCESS_ADDR(ebx,edx)
+	NEPC_SWITCH_BUS16
+	cld
+	rep
+	insw
+	NEPC_BUS_RESTORE
+	ret
+
+ENTRY(NEPC_DA_io_space_write_multi_2)
+	BUS_ACCESS_ADDR(ebx,edx)
+	NEPC_SWITCH_BUS16
+	cld
+	rep
+	outsw
+	NEPC_BUS_RESTORE
+	ret
+
+ENTRY(NEPC_DA_io_space_read_region_2)
+	NEPC_SWITCH_BUS16
+	call SBUS_DA_io_space_read_region_2
+	NEPC_BUS_RESTORE
+	ret
+
+ENTRY(NEPC_DA_io_space_write_region_2)
+	NEPC_SWITCH_BUS16
+	call SBUS_DA_io_space_write_region_2
+	NEPC_BUS_RESTORE
+	ret
+
+ENTRY(NEPC_DA_io_space_set_multi_2)
+	NEPC_SWITCH_BUS16
+	call SBUS_DA_io_space_set_multi_2
+	NEPC_BUS_RESTORE
+	ret
+
+
+ENTRY(NEPC_DA_io_space_set_region_2)
+	NEPC_SWITCH_BUS16
+	call SBUS_DA_io_space_set_region_2
+	NEPC_BUS_RESTORE
+	ret
+
+ENTRY(NEPC_DA_io_space_copy_region_2)
+	NEPC_SWITCH_BUS16
+	call SBUS_DA_io_space_copy_region_2
+	NEPC_BUS_RESTORE
+	ret
+
+ENTRY(NEPC_DA_io_space_read_4)
+	BUS_ACCESS_ADDR(ebx,edx)
+	NEPC_SWITCH_BUS16
+	inl	%dx,%eax
+	NEPC_BUS_RESTORE
+	ret
+
+ENTRY(NEPC_DA_io_space_write_4)
+	BUS_ACCESS_ADDR(ebx,edx)
+	NEPC_SWITCH_BUS16
+	outl	%eax,%dx
+	NEPC_BUS_RESTORE
+	ret
+
+ENTRY(NEPC_DA_io_space_read_multi_4)
+	BUS_ACCESS_ADDR(ebx,edx)
+	NEPC_SWITCH_BUS16
+	cld
+	rep
+	insl
+	NEPC_BUS_RESTORE
+	ret
+
+ENTRY(NEPC_DA_io_space_write_multi_4)
+	BUS_ACCESS_ADDR(ebx,edx)
+	NEPC_SWITCH_BUS16
+	cld
+	rep
+	outsl
+	NEPC_BUS_RESTORE
+	ret
+
+ENTRY(NEPC_DA_io_space_read_region_4)
+	NEPC_SWITCH_BUS16
+	call SBUS_DA_io_space_read_region_4
+	NEPC_BUS_RESTORE
+	ret
+
+ENTRY(NEPC_DA_io_space_write_region_4)
+	NEPC_SWITCH_BUS16
+	call SBUS_DA_io_space_write_region_4
+	NEPC_BUS_RESTORE
+	ret
+
+ENTRY(NEPC_DA_io_space_set_multi_4)
+	NEPC_SWITCH_BUS16
+	call SBUS_DA_io_space_set_multi_4
+	NEPC_BUS_RESTORE
+	ret
+
+
+ENTRY(NEPC_DA_io_space_set_region_4)
+	NEPC_SWITCH_BUS16
+	call SBUS_DA_io_space_set_region_4
+	NEPC_BUS_RESTORE
+	ret
+
+ENTRY(NEPC_DA_io_space_copy_region_4)
+	NEPC_SWITCH_BUS16
+	call SBUS_DA_io_space_copy_region_4
+	NEPC_BUS_RESTORE
+	ret
+
+#undef	BUS_ACCESS_ADDR
+
+/***********************************************************
+ * NEPC pcmcia 16 bits bus acces (Relocate Access)
+ ***********************************************************/
+#define	BUS_ACCESS_ADDR(BSHREG,ADDRREG)	\
+	movl BUS_SPACE_HANDLE_IAT/**/(%/**/BSHREG/**/, %/**/ADDRREG/**/, 4), \
+	     %/**/ADDRREG
+
+ENTRY(NEPC_RA_io_space_read_2)
+	BUS_ACCESS_ADDR(ebx,edx)
+	NEPC_SWITCH_BUS16
+	inw	%dx,%ax
+	NEPC_BUS_RESTORE
+	ret
+
+
+ENTRY(NEPC_RA_io_space_write_2)
+	BUS_ACCESS_ADDR(ebx,edx)
+	NEPC_SWITCH_BUS16
+	outw	%ax,%dx
+	NEPC_BUS_RESTORE
+	ret
+
+ENTRY(NEPC_RA_io_space_read_multi_2)
+	BUS_ACCESS_ADDR(ebx,edx)
+	NEPC_SWITCH_BUS16
+	cld
+	rep
+	insw
+	NEPC_BUS_RESTORE
+	ret
+
+ENTRY(NEPC_RA_io_space_write_multi_2)
+	BUS_ACCESS_ADDR(ebx,edx)
+	NEPC_SWITCH_BUS16
+	cld
+	rep
+	outsw
+	NEPC_BUS_RESTORE
+	ret
+
+ENTRY(NEPC_RA_io_space_read_region_2)
+	NEPC_SWITCH_BUS16
+	call SBUS_RA_io_space_read_region_2
+	NEPC_BUS_RESTORE
+	ret
+
+ENTRY(NEPC_RA_io_space_write_region_2)
+	NEPC_SWITCH_BUS16
+	call SBUS_RA_io_space_write_region_2
+	NEPC_BUS_RESTORE
+	ret
+
+ENTRY(NEPC_RA_io_space_set_multi_2)
+	NEPC_SWITCH_BUS16
+	call SBUS_RA_io_space_set_multi_2
+	NEPC_BUS_RESTORE
+	ret
+
+
+ENTRY(NEPC_RA_io_space_set_region_2)
+	NEPC_SWITCH_BUS16
+	call SBUS_RA_io_space_set_region_2
+	NEPC_BUS_RESTORE
+	ret
+
+ENTRY(NEPC_RA_io_space_copy_region_2)
+	NEPC_SWITCH_BUS16
+	call SBUS_RA_io_space_copy_region_2
+	NEPC_BUS_RESTORE
+	ret
+
+ENTRY(NEPC_RA_io_space_read_4)
+	BUS_ACCESS_ADDR(ebx,edx)
+	NEPC_SWITCH_BUS16
+	inl	%dx,%eax
+	NEPC_BUS_RESTORE
+	ret
+
+ENTRY(NEPC_RA_io_space_write_4)
+	BUS_ACCESS_ADDR(ebx,edx)
+	NEPC_SWITCH_BUS16
+	outl	%eax,%dx
+	NEPC_BUS_RESTORE
+	ret
+
+ENTRY(NEPC_RA_io_space_read_multi_4)
+	BUS_ACCESS_ADDR(ebx,edx)
+	NEPC_SWITCH_BUS16
+	cld
+	rep
+	insl
+	NEPC_BUS_RESTORE
+	ret
+
+ENTRY(NEPC_RA_io_space_write_multi_4)
+	BUS_ACCESS_ADDR(ebx,edx)
+	NEPC_SWITCH_BUS16
+	cld
+	rep
+	outsl
+	NEPC_BUS_RESTORE
+	ret
+
+ENTRY(NEPC_RA_io_space_read_region_4)
+	NEPC_SWITCH_BUS16
+	call SBUS_RA_io_space_read_region_4
+	NEPC_BUS_RESTORE
+	ret
+
+ENTRY(NEPC_RA_io_space_write_region_4)
+	NEPC_SWITCH_BUS16
+	call SBUS_RA_io_space_write_region_4
+	NEPC_BUS_RESTORE
+	ret
+
+ENTRY(NEPC_RA_io_space_set_multi_4)
+	NEPC_SWITCH_BUS16
+	call SBUS_RA_io_space_set_multi_4
+	NEPC_BUS_RESTORE
+	ret
+
+
+ENTRY(NEPC_RA_io_space_set_region_4)
+	NEPC_SWITCH_BUS16
+	call SBUS_RA_io_space_set_region_4
+	NEPC_BUS_RESTORE
+	ret
+
+ENTRY(NEPC_RA_io_space_copy_region_4)
+	NEPC_SWITCH_BUS16
+	call SBUS_RA_io_space_copy_region_4
+	NEPC_BUS_RESTORE
+	ret
+
+#endif /* DEV_MECIA */
diff --git a/sys/pc98/pc98/busiosubr.c b/sys/pc98/pc98/busiosubr.c
new file mode 100644
index 0000000..c2c6228
--- /dev/null
+++ b/sys/pc98/pc98/busiosubr.c
@@ -0,0 +1,144 @@
+/* $FreeBSD$ */
+/*	$NecBSD: busiosubr.c,v 1.30.4.4 1999/08/28 02:25:35 honda Exp $	*/
+/*	$NetBSD$	*/
+
+/*
+ * [NetBSD for NEC PC-98 series]
+ *  Copyright (c) 1996, 1997, 1998
+ *	NetBSD/pc98 porting staff. All rights reserved.
+ *
+ * [Ported for FreeBSD]
+ *  Copyright (c) 2001
+ *	TAKAHASHI Yoshihiro. All rights reserved.
+ * 
+ *  Redistribution and use in source and binary forms, with or without
+ *  modification, are permitted provided that the following conditions
+ *  are met:
+ *  1. Redistributions of source code must retain the above copyright
+ *     notice, this list of conditions and the following disclaimer.
+ *  2. Redistributions in binary form must reproduce the above copyright
+ *     notice, this list of conditions and the following disclaimer in the
+ *     documentation and/or other materials provided with the distribution.
+ *  3. The name of the author may not be used to endorse or promote products
+ *     derived from this software without specific prior written permission.
+ * 
+ * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
+ * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
+ * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
+ * DISCLAIMED.  IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT,
+ * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
+ * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+ * POSSIBILITY OF SUCH DAMAGE.
+ */
+
+/*
+ * Copyright (c) 1997, 1998
+ *	Naofumi HONDA.  All rights reserved.
+ */
+
+#include <sys/param.h>
+#include <sys/systm.h>
+#include <sys/kernel.h>
+#include <machine/bus.h>
+
+_BUS_SPACE_CALL_FUNCS_PROTO(SBUS_DA_io,u_int8_t,1)
+_BUS_SPACE_CALL_FUNCS_PROTO(SBUS_DA_io,u_int16_t,2)
+_BUS_SPACE_CALL_FUNCS_PROTO(SBUS_DA_io,u_int32_t,4)
+_BUS_SPACE_CALL_FUNCS_PROTO(SBUS_DA_mem,u_int8_t,1)
+_BUS_SPACE_CALL_FUNCS_PROTO(SBUS_DA_mem,u_int16_t,2)
+_BUS_SPACE_CALL_FUNCS_PROTO(SBUS_DA_mem,u_int32_t,4)
+
+_BUS_SPACE_CALL_FUNCS_PROTO(SBUS_RA_io,u_int8_t,1)
+_BUS_SPACE_CALL_FUNCS_PROTO(SBUS_RA_io,u_int16_t,2)
+_BUS_SPACE_CALL_FUNCS_PROTO(SBUS_RA_io,u_int32_t,4)
+_BUS_SPACE_CALL_FUNCS_PROTO(SBUS_RA_mem,u_int8_t,1)
+_BUS_SPACE_CALL_FUNCS_PROTO(SBUS_RA_mem,u_int16_t,2)
+_BUS_SPACE_CALL_FUNCS_PROTO(SBUS_RA_mem,u_int32_t,4)
+
+struct bus_space_tag SBUS_io_space_tag = {
+	BUS_SPACE_IO,
+
+	/* direct bus access methods */
+	{
+		_BUS_SPACE_CALL_FUNCS_TAB(SBUS_DA_io,u_int8_t,1),
+		_BUS_SPACE_CALL_FUNCS_TAB(SBUS_DA_io,u_int16_t,2),
+		_BUS_SPACE_CALL_FUNCS_TAB(SBUS_DA_io,u_int32_t,4),
+	},
+
+	/* relocate bus access methods */
+	{
+		_BUS_SPACE_CALL_FUNCS_TAB(SBUS_RA_io,u_int8_t,1),
+		_BUS_SPACE_CALL_FUNCS_TAB(SBUS_RA_io,u_int16_t,2),
+		_BUS_SPACE_CALL_FUNCS_TAB(SBUS_RA_io,u_int32_t,4),
+	}
+};
+
+struct bus_space_tag SBUS_mem_space_tag = {
+	BUS_SPACE_MEM,
+
+	/* direct bus access methods */
+	{
+		_BUS_SPACE_CALL_FUNCS_TAB(SBUS_DA_mem,u_int8_t,1),
+		_BUS_SPACE_CALL_FUNCS_TAB(SBUS_DA_mem,u_int16_t,2),
+		_BUS_SPACE_CALL_FUNCS_TAB(SBUS_DA_mem,u_int32_t,4),
+	},
+
+	/* relocate bus access methods */
+	{
+		_BUS_SPACE_CALL_FUNCS_TAB(SBUS_RA_mem,u_int8_t,1),
+		_BUS_SPACE_CALL_FUNCS_TAB(SBUS_RA_mem,u_int16_t,2),
+		_BUS_SPACE_CALL_FUNCS_TAB(SBUS_RA_mem,u_int32_t,4),
+	}
+};
+
+
+#include "opt_mecia.h"
+#ifdef DEV_MECIA
+
+_BUS_SPACE_CALL_FUNCS_PROTO(NEPC_DA_io,u_int16_t,2)
+_BUS_SPACE_CALL_FUNCS_PROTO(NEPC_DA_io,u_int32_t,4)
+
+_BUS_SPACE_CALL_FUNCS_PROTO(NEPC_RA_io,u_int16_t,2)
+_BUS_SPACE_CALL_FUNCS_PROTO(NEPC_RA_io,u_int32_t,4)
+
+struct bus_space_tag NEPC_io_space_tag = {
+	BUS_SPACE_IO,
+
+	/* direct bus access methods */
+	{
+		_BUS_SPACE_CALL_FUNCS_TAB(SBUS_DA_io,u_int8_t,1),
+		_BUS_SPACE_CALL_FUNCS_TAB(NEPC_DA_io,u_int16_t,2),
+		_BUS_SPACE_CALL_FUNCS_TAB(NEPC_DA_io,u_int32_t,4),
+	},
+
+	/* relocate bus access methods */
+	{
+		_BUS_SPACE_CALL_FUNCS_TAB(SBUS_RA_io,u_int8_t,1),
+		_BUS_SPACE_CALL_FUNCS_TAB(NEPC_RA_io,u_int16_t,2),
+		_BUS_SPACE_CALL_FUNCS_TAB(NEPC_RA_io,u_int32_t,4),
+	}
+};
+
+struct bus_space_tag NEPC_mem_space_tag = {
+	BUS_SPACE_MEM,
+
+	/* direct bus access methods */
+	{
+		_BUS_SPACE_CALL_FUNCS_TAB(SBUS_DA_mem,u_int8_t,1),
+		_BUS_SPACE_CALL_FUNCS_TAB(SBUS_DA_mem,u_int16_t,2),
+		_BUS_SPACE_CALL_FUNCS_TAB(SBUS_DA_mem,u_int32_t,4),
+	},
+
+	/* relocate bus access methods */
+	{
+		_BUS_SPACE_CALL_FUNCS_TAB(SBUS_RA_mem,u_int8_t,1),
+		_BUS_SPACE_CALL_FUNCS_TAB(SBUS_RA_mem,u_int16_t,2),
+		_BUS_SPACE_CALL_FUNCS_TAB(SBUS_RA_mem,u_int32_t,4),
+	}
+};
+
+#endif /* DEV_MECIA */