diff options
| author | hrs <hrs@FreeBSD.org> | 2011-06-11 06:56:26 +0000 |
|---|---|---|
| committer | hrs <hrs@FreeBSD.org> | 2011-06-11 06:56:26 +0000 |
| commit | b2a6f5600367e61c439c79db2317d4619960e2ce (patch) | |
| tree | b813a06aa0583761055c631f2a5c54ae5943b77b | |
| parent | d4f481b2900357dc1f0d48b9f4e052a920909b02 (diff) | |
| parent | c8e3d11e24e29c032a1ed9d46c65d8f10e9f0030 (diff) | |
| download | FreeBSD-src-b2a6f5600367e61c439c79db2317d4619960e2ce.zip FreeBSD-src-b2a6f5600367e61c439c79db2317d4619960e2ce.tar.gz | |
Merge from HEAD@222975.
107 files changed, 48782 insertions, 5451 deletions
diff --git a/bin/sh/eval.c b/bin/sh/eval.c index 585f91e..92a18e4 100644 --- a/bin/sh/eval.c +++ b/bin/sh/eval.c @@ -745,8 +745,9 @@ evalcommand(union node *cmd, int flags, struct backcmd *backcmd) /* Print the command if xflag is set. */ if (xflag) { char sep = 0; - const char *p; - out2str(ps4val()); + const char *p, *ps4; + ps4 = expandstr(ps4val()); + out2str(ps4 != NULL ? ps4 : ps4val()); for (sp = varlist.list ; sp ; sp = sp->next) { if (sep != 0) out2c(' '); diff --git a/bin/sh/expand.c b/bin/sh/expand.c index 108a77c..aaa91ac 100644 --- a/bin/sh/expand.c +++ b/bin/sh/expand.c @@ -174,6 +174,7 @@ expandarg(union node *arg, struct arglist *arglist, int flag) ifslastp = NULL; argstr(arg->narg.text, flag); if (arglist == NULL) { + STACKSTRNUL(expdest); return; /* here document expanded */ } STPUTC('\0', expdest); diff --git a/bin/sh/main.c b/bin/sh/main.c index 9cef1b0..2135d30 100644 --- a/bin/sh/main.c +++ b/bin/sh/main.c @@ -78,7 +78,7 @@ int rootshell; struct jmploc main_handler; int localeisutf8, initial_localeisutf8; -static void read_profile(const char *); +static void read_profile(char *); static char *find_dot_file(char *); /* @@ -92,7 +92,7 @@ static char *find_dot_file(char *); int main(int argc, char *argv[]) { - struct stackmark smark; + struct stackmark smark, smark2; volatile int state; char *shinit; @@ -139,6 +139,7 @@ main(int argc, char *argv[]) rootshell = 1; init(); setstackmark(&smark); + setstackmark(&smark2); procargs(argc, argv); pwd_init(iflag); if (iflag) @@ -163,6 +164,7 @@ state2: } state3: state = 4; + popstackmark(&smark2); if (minusc) { evalstring(minusc, sflag ? 0 : EV_EXIT); } @@ -235,12 +237,16 @@ cmdloop(int top) */ static void -read_profile(const char *name) +read_profile(char *name) { int fd; + const char *expandedname; + expandedname = expandstr(name); + if (expandedname == NULL) + return; INTOFF; - if ((fd = open(name, O_RDONLY)) >= 0) + if ((fd = open(expandedname, O_RDONLY)) >= 0) setinputfd(fd, 1); INTON; if (fd < 0) diff --git a/bin/sh/parser.c b/bin/sh/parser.c index 151970b..2fea1ec 100644 --- a/bin/sh/parser.c +++ b/bin/sh/parser.c @@ -2029,3 +2029,47 @@ getprompt(void *unused __unused) ps[i] = '\0'; return (ps); } + + +const char * +expandstr(char *ps) +{ + union node n; + struct jmploc jmploc; + struct jmploc *const savehandler = handler; + const int saveprompt = doprompt; + struct parsefile *const savetopfile = getcurrentfile(); + struct parser_temp *const saveparser_temp = parser_temp; + const char *result = NULL; + + if (!setjmp(jmploc.loc)) { + handler = &jmploc; + parser_temp = NULL; + setinputstring(ps, 1); + doprompt = 0; + readtoken1(pgetc(), DQSYNTAX, "\n\n", 0); + if (backquotelist != NULL) + error("Command substitution not allowed here"); + + n.narg.type = NARG; + n.narg.next = NULL; + n.narg.text = wordtext; + n.narg.backquote = backquotelist; + + expandarg(&n, NULL, 0); + result = stackblock(); + INTOFF; + } + handler = savehandler; + doprompt = saveprompt; + popfilesupto(savetopfile); + if (parser_temp != saveparser_temp) { + parser_temp_free_all(); + parser_temp = saveparser_temp; + } + if (result != NULL) { + INTON; + } else if (exception == EXINT) + raise(SIGINT); + return result; +} diff --git a/bin/sh/parser.h b/bin/sh/parser.h index e213e21..9a996d0 100644 --- a/bin/sh/parser.h +++ b/bin/sh/parser.h @@ -82,3 +82,4 @@ void fixredir(union node *, const char *, int); int goodname(const char *); int isassignment(const char *); char *getprompt(void *); +const char *expandstr(char *); diff --git a/bin/sh/sh.1 b/bin/sh/sh.1 index 42e55d3..f6682e6 100644 --- a/bin/sh/sh.1 +++ b/bin/sh/sh.1 @@ -32,7 +32,7 @@ .\" from: @(#)sh.1 8.6 (Berkeley) 5/4/95 .\" $FreeBSD$ .\" -.Dd May 21, 2011 +.Dd June 10, 2011 .Dt SH 1 .Os .Sh NAME @@ -124,8 +124,8 @@ If the environment variable .Ev ENV is set on entry to a shell, or is set in the .Pa .profile -of a login shell, the shell then reads commands from the file named in -.Ev ENV . +of a login shell, the shell then subjects its value to parameter expansion +and arithmetic expansion and reads commands from the named file. Therefore, a user should place commands that are to be executed only at login time in the .Pa .profile @@ -324,7 +324,7 @@ Useful for debugging. Write each command (preceded by the value of the .Va PS4 -variable) +variable subjected to parameter expansion and arithmetic expansion) to standard error before it is executed. Useful for debugging. .El diff --git a/cddl/compat/opensolaris/include/assert.h b/cddl/compat/opensolaris/include/assert.h index 353f0c9..0887093 100644 --- a/cddl/compat/opensolaris/include/assert.h +++ b/cddl/compat/opensolaris/include/assert.h @@ -43,6 +43,10 @@ #include <stdio.h> #include <stdlib.h> +#ifdef __cplusplus +extern "C" { +#endif + static __inline void __assert(const char *expr, const char *file, int line) { @@ -52,4 +56,9 @@ __assert(const char *expr, const char *file, int line) abort(); /* NOTREACHED */ } + +#ifdef __cplusplus +} +#endif + #endif /* !_ASSERT_H_ */ diff --git a/contrib/less/NEWS b/contrib/less/NEWS index 4beefaf..eb38025 100644 --- a/contrib/less/NEWS +++ b/contrib/less/NEWS @@ -12,6 +12,15 @@ ====================================================================== + Major changes between "less" versions 443 and 444 + +* Fix bug in unget handling that can cause strange effects on the + command line. + +* Remove vestiges of obsolete -l option that can cause a crash. + +====================================================================== + Major changes between "less" versions 436 and 443 * Change search behavior such that when a search is given an explicit diff --git a/contrib/less/README b/contrib/less/README index 8d5a95b..ba6f269 100644 --- a/contrib/less/README +++ b/contrib/less/README @@ -7,9 +7,9 @@ ************************************************************************** ************************************************************************** - Less, version 443 + Less, version 444 - This is the distribution of less, version 443, released 09 Apr 2011. + This is the distribution of less, version 444, released 09 Jun 2011. This program is part of the GNU project (http://www.gnu.org). This program is free software. You may redistribute it and/or diff --git a/contrib/less/command.c b/contrib/less/command.c index 653db0b..41c3869 100644 --- a/contrib/less/command.c +++ b/contrib/less/command.c @@ -302,7 +302,7 @@ is_erase_char(c) */ static int mca_opt_first_char(c) - int c; + int c; { int flag = (optflag & ~OPT_NO_PROMPT); if (flag == OPT_NO_TOGGLE) @@ -846,6 +846,7 @@ ungetcc(c) ug->ug_char = c; ug->ug_next = ungot; ungot = ug; + unget_end = 0; } /* diff --git a/contrib/less/funcs.h b/contrib/less/funcs.h index 8464ada..6595232 100644 --- a/contrib/less/funcs.h +++ b/contrib/less/funcs.h @@ -194,7 +194,6 @@ public void unmark (); public void opt_o (); public void opt__O (); - public void opt_l (); public void opt_j (); public void calc_jump_sline (); public void opt_shift (); diff --git a/contrib/less/less.man b/contrib/less/less.man index 86e329c..a54609d 100644 --- a/contrib/less/less.man +++ b/contrib/less/less.man @@ -1156,7 +1156,7 @@ LESS(1) LESS(1) next 8bcccbcc18b95.bb125.bb If neither LESSCHARSET nor LESSCHARDEF is set, but any of the strings - "UTF-8", "UTF8", "utf-8" or "utf8" is found in the LC_ALL, LC_TYPE or + "UTF-8", "UTF8", "utf-8" or "utf8" is found in the LC_ALL, LC_CTYPE or LANG environment variables, then the default character set is utf-8. If that string is not found, but your system supports the [4msetlocale[0m @@ -1580,4 +1580,4 @@ LESS(1) LESS(1) - Version 443: 09 Apr 2011 LESS(1) + Version 444: 09 Jun 2011 LESS(1) diff --git a/contrib/less/less.nro b/contrib/less/less.nro index 33050e1..0bc21b5 100644 --- a/contrib/less/less.nro +++ b/contrib/less/less.nro @@ -1,4 +1,4 @@ -.TH LESS 1 "Version 443: 09 Apr 2011" +.TH LESS 1 "Version 444: 09 Jun 2011" .SH NAME less \- opposite of more .SH SYNOPSIS @@ -1276,7 +1276,7 @@ to each of the possible values for LESSCHARSET: .PP If neither LESSCHARSET nor LESSCHARDEF is set, but any of the strings "UTF-8", "UTF8", "utf-8" or "utf8" -is found in the LC_ALL, LC_TYPE or LANG +is found in the LC_ALL, LC_CTYPE or LANG environment variables, then the default character set is utf-8. .PP If that string is not found, but your system supports the diff --git a/contrib/less/lessecho.man b/contrib/less/lessecho.man index 32bccba..682b0bd 100644 --- a/contrib/less/lessecho.man +++ b/contrib/less/lessecho.man @@ -46,4 +46,4 @@ LESSECHO(1) LESSECHO(1) - Version 443: 09 Apr 2011 LESSECHO(1) + Version 444: 09 Jun 2011 LESSECHO(1) diff --git a/contrib/less/lessecho.nro b/contrib/less/lessecho.nro index 5c17708..46540e8 100644 --- a/contrib/less/lessecho.nro +++ b/contrib/less/lessecho.nro @@ -1,4 +1,4 @@ -.TH LESSECHO 1 "Version 443: 09 Apr 2011" +.TH LESSECHO 1 "Version 444: 09 Jun 2011" .SH NAME lessecho \- expand metacharacters .SH SYNOPSIS diff --git a/contrib/less/lesskey.man b/contrib/less/lesskey.man index b315ea6..5e0a999 100644 --- a/contrib/less/lesskey.man +++ b/contrib/less/lesskey.man @@ -354,4 +354,4 @@ LESSKEY(1) LESSKEY(1) - Version 443: 09 Apr 2011 LESSKEY(1) + Version 444: 09 Jun 2011 LESSKEY(1) diff --git a/contrib/less/lesskey.nro b/contrib/less/lesskey.nro index 8c99a0f..d305b95 100644 --- a/contrib/less/lesskey.nro +++ b/contrib/less/lesskey.nro @@ -1,4 +1,4 @@ -.TH LESSKEY 1 "Version 443: 09 Apr 2011" +.TH LESSKEY 1 "Version 444: 09 Jun 2011" .SH NAME lesskey \- specify key bindings for less .SH SYNOPSIS diff --git a/contrib/less/optfunc.c b/contrib/less/optfunc.c index 79ac7c6..a0aa10a 100644 --- a/contrib/less/optfunc.c +++ b/contrib/less/optfunc.c @@ -132,34 +132,6 @@ opt__O(type, s) #endif /* - * Handlers for -l option. - */ - public void -opt_l(type, s) - int type; - char *s; -{ - int err; - int n; - char *t; - - switch (type) - { - case INIT: - t = s; - n = getnum(&t, "l", &err); - if (err || n <= 0) - { - error("Line number is required after -l", NULL_PARG); - return; - } - plusoption = TRUE; - ungetsc(s); - break; - } -} - -/* * Handlers for -j option. */ public void diff --git a/contrib/less/opttbl.c b/contrib/less/opttbl.c index d1c60a2..63f6889 100644 --- a/contrib/less/opttbl.c +++ b/contrib/less/opttbl.c @@ -263,10 +263,6 @@ static struct loption option[] = NULL } }, - { 'l', NULL, - STRING|NO_TOGGLE|NO_QUERY, 0, NULL, opt_l, - { NULL, NULL, NULL } - }, { 'L', &L__optname, BOOL, OPT_ON, &use_lessopen, NULL, { diff --git a/contrib/less/version.c b/contrib/less/version.c index be75d20..dc5bb0c 100644 --- a/contrib/less/version.c +++ b/contrib/less/version.c @@ -742,6 +742,7 @@ v441 1/21/11 Fix semi-infinite loop if no newlines in file; v442 3/2/11 Fix search bug. Add ctrl-G line edit command. v443 4/9/11 Fix Windows build. +v444 6/8/11 Fix ungetc bug; remove vestiges of obsolete -l option. */ -char version[] = "443"; +char version[] = "444"; diff --git a/games/fortune/datfiles/fortunes b/games/fortune/datfiles/fortunes index 7f2a7d4..5a52b18 100644 --- a/games/fortune/datfiles/fortunes +++ b/games/fortune/datfiles/fortunes @@ -2057,7 +2057,7 @@ promised me faithfully that you'd be back before six and here it is almost nine. It just can't take that long to play 18 holes of golf." "Honey, wait," said Harry. "Let me explain. I know what I promised you, but I have a very good reason for being late. Fred and I tee'd off -right on time and everything was find for the first three holes. Then, on +right on time and everything was fine for the first three holes. Then, on the fourth tee Fred had a stroke. I ran back to the clubhouse but couldn't find a doctor. And, by the time I got back to Fred, he was dead. So, for the next 15 holes, it was hit the ball, drag Fred, hit the ball, drag Fred... @@ -25523,7 +25523,9 @@ him, prussic acid could solve our population problems in one generation. % If everybody minded their own business, the world would go around a deal faster. - -- The Duchess, "Through the Looking Glass" + -- The Duchess; Lewis Carroll, + "Through the Looking-Glass, + and What Alice Found There" (1871) % If everything is coming your way then you're in the wrong lane. % @@ -42420,7 +42422,7 @@ in peoples' memories never really happened. Some of them want to use you, Some of them want to be used by you, ...Everybody's looking for something. - -- Eurythmics + -- Eurythmics, "Sweet Dreams (Are Made Of This)" % Some of us are becoming the men we wanted to marry. -- Gloria Steinem diff --git a/gnu/usr.bin/Makefile b/gnu/usr.bin/Makefile index 95eeeb8..b222c47 100644 --- a/gnu/usr.bin/Makefile +++ b/gnu/usr.bin/Makefile @@ -11,7 +11,7 @@ SUBDIR= ${_binutils} \ ${_dtc} \ ${_gdb} \ ${_gperf} \ - ${_grep} \ + grep \ ${_groff} \ patch \ ${_rcs} \ @@ -27,8 +27,6 @@ _groff= groff .endif .endif -_grep= grep - .if ${MK_CVS} != "no" _cvs= cvs .endif diff --git a/lib/libstand/bswap.c b/lib/libstand/bswap.c index 212e2af..b8e6ffb 100644 --- a/lib/libstand/bswap.c +++ b/lib/libstand/bswap.c @@ -8,7 +8,7 @@ __FBSDID("$FreeBSD$"); #if defined(LIBC_SCCS) && !defined(lint) static char *rcsid = "$NetBSD: bswap32.c,v 1.1 1997/10/09 15:42:33 bouyer Exp $"; -static char *rcsid = "$NetBSD: bswap64.c,v 1.1 1997/10/09 15:42:33 bouyer Exp $"; +static char *rcsid = "$NetBSD: bswap64.c,v 1.3 2009/03/16 05:59:21 cegger Exp $"; #endif #include <sys/types.h> @@ -30,12 +30,28 @@ bswap32(u_int32_t x) u_int64_t bswap64(u_int64_t x) -{ - u_int32_t *p = (u_int32_t*)&x; - u_int32_t t; - t = bswap32(p[0]); - p[0] = bswap32(p[1]); - p[1] = t; - return x; -} - +{ +#ifdef _LP64 + /* + * Assume we have wide enough registers to do it without touching + * memory. + */ + return ( (x << 56) & 0xff00000000000000UL ) | + ( (x << 40) & 0x00ff000000000000UL ) | + ( (x << 24) & 0x0000ff0000000000UL ) | + ( (x << 8) & 0x000000ff00000000UL ) | + ( (x >> 8) & 0x00000000ff000000UL ) | + ( (x >> 24) & 0x0000000000ff0000UL ) | + ( (x >> 40) & 0x000000000000ff00UL ) | + ( (x >> 56) & 0x00000000000000ffUL ); +#else + /* + * Split the operation in two 32bit steps. + */ + u_int32_t tl, th; + + th = bswap32((u_int32_t)(x & 0x00000000ffffffffULL)); + tl = bswap32((u_int32_t)((x >> 32) & 0x00000000ffffffffULL)); + return ((u_int64_t)th << 32) | tl; +#endif +} diff --git a/sbin/fsck_ffs/suj.c b/sbin/fsck_ffs/suj.c index c1c5811..b4aa679 100644 --- a/sbin/fsck_ffs/suj.c +++ b/sbin/fsck_ffs/suj.c @@ -1604,7 +1604,7 @@ ino_trunc(ino_t ino, off_t size) * uninitialized space later. */ off = blkoff(fs, size); - if (off) { + if (off && DIP(ip, di_mode) != IFDIR) { uint8_t *buf; long clrsize; @@ -1775,13 +1775,18 @@ cg_trunc(struct suj_cg *sc) struct suj_ino *sino; int i; - for (i = 0; i < SUJ_HASHSIZE; i++) - LIST_FOREACH(sino, &sc->sc_inohash[i], si_next) + for (i = 0; i < SUJ_HASHSIZE; i++) { + LIST_FOREACH(sino, &sc->sc_inohash[i], si_next) { if (sino->si_trunc) { ino_trunc(sino->si_ino, sino->si_trunc->jt_size); + sino->si_blkadj = 0; sino->si_trunc = NULL; } + if (sino->si_blkadj) + ino_adjblks(sino); + } + } } /* @@ -1791,7 +1796,6 @@ cg_trunc(struct suj_cg *sc) static void cg_check_blk(struct suj_cg *sc) { - struct suj_ino *sino; struct suj_blk *sblk; int i; @@ -1799,15 +1803,6 @@ cg_check_blk(struct suj_cg *sc) for (i = 0; i < SUJ_HASHSIZE; i++) LIST_FOREACH(sblk, &sc->sc_blkhash[i], sb_next) blk_check(sblk); - /* - * Now that we've freed blocks which are not referenced we - * make a second pass over all inodes to adjust their block - * counts. - */ - for (i = 0; i < SUJ_HASHSIZE; i++) - LIST_FOREACH(sino, &sc->sc_inohash[i], si_next) - if (sino->si_blkadj) - ino_adjblks(sino); } /* @@ -1961,14 +1956,7 @@ ino_append(union jrec *rec) "parent %d, diroff %jd\n", refrec->jr_op, refrec->jr_ino, refrec->jr_nlink, refrec->jr_parent, refrec->jr_diroff); - /* - * Lookup the ino and clear truncate if one is found. Partial - * truncates are always done synchronously so if we discover - * an operation that requires a lock the truncation has completed - * and can be discarded. - */ sino = ino_lookup(((struct jrefrec *)rec)->jr_ino, 1); - sino->si_trunc = NULL; sino->si_hasrecs = 1; srec = errmalloc(sizeof(*srec)); srec->sr_rec = rec; @@ -2174,9 +2162,7 @@ blk_build(struct jblkrec *blkrec) struct suj_rec *srec; struct suj_blk *sblk; struct jblkrec *blkrn; - struct suj_ino *sino; ufs2_daddr_t blk; - off_t foff; int frag; if (debug) @@ -2185,17 +2171,6 @@ blk_build(struct jblkrec *blkrec) blkrec->jb_op, blkrec->jb_blkno, blkrec->jb_frags, blkrec->jb_oldfrags, blkrec->jb_ino, blkrec->jb_lbn); - /* - * Look up the inode and clear the truncate if any lbns after the - * truncate lbn are freed or allocated. - */ - sino = ino_lookup(blkrec->jb_ino, 0); - if (sino && sino->si_trunc) { - foff = lblktosize(fs, blkrec->jb_lbn); - foff += lfragtosize(fs, blkrec->jb_frags); - if (foff > sino->si_trunc->jt_size) - sino->si_trunc = NULL; - } blk = blknum(fs, blkrec->jb_blkno); frag = fragnum(fs, blkrec->jb_blkno); sblk = blk_lookup(blk, 1); @@ -2242,10 +2217,15 @@ ino_build_trunc(struct jtrncrec *rec) struct suj_ino *sino; if (debug) - printf("ino_build_trunc: ino %d, size %jd\n", - rec->jt_ino, rec->jt_size); + printf("ino_build_trunc: op %d ino %d, size %jd\n", + rec->jt_op, rec->jt_ino, rec->jt_size); sino = ino_lookup(rec->jt_ino, 1); - sino->si_trunc = rec; + if (rec->jt_op == JOP_SYNC) { + sino->si_trunc = NULL; + return; + } + if (sino->si_trunc == NULL || sino->si_trunc->jt_size > rec->jt_size) + sino->si_trunc = rec; } /* diff --git a/sbin/rtsol/Makefile b/sbin/rtsol/Makefile index 413b6d5..39ef258 100644 --- a/sbin/rtsol/Makefile +++ b/sbin/rtsol/Makefile @@ -19,7 +19,7 @@ SRCDIR= ${.CURDIR}/../../usr.sbin/rtsold .PATH: ${SRCDIR} PROG= rtsol -SRCS= rtsold.c rtsol.c if.c probe.c rtsock.c +SRCS= rtsold.c rtsol.c if.c probe.c dump.c rtsock.c NO_MAN= WARNS?= 3 diff --git a/share/skel/dot.shrc b/share/skel/dot.shrc index 7349169..ea32f35 100644 --- a/share/skel/dot.shrc +++ b/share/skel/dot.shrc @@ -44,4 +44,4 @@ alias g='egrep -i' # esac # search path for cd(1) -# CDPATH=.:$HOME +# CDPATH=:$HOME diff --git a/sys/Makefile b/sys/Makefile index 3b24ed9..969994f 100644 --- a/sys/Makefile +++ b/sys/Makefile @@ -12,7 +12,7 @@ CSCOPEDIRS= boot bsm cam cddl compat conf contrib crypto ddb dev fs gdb \ geom gnu isa kern libkern modules net net80211 netatalk \ netgraph netinet netinet6 netipsec netipx netnatm netncp \ netsmb nfs nfsclient nfsserver nlm opencrypto \ - pci rpc security sys ufs vm xdr ${CSCOPE_ARCHDIR} + pci rpc security sys ufs vm xdr xen ${CSCOPE_ARCHDIR} .if defined(ALL_ARCH) CSCOPE_ARCHDIR ?= amd64 arm i386 ia64 mips pc98 powerpc sparc64 x86 .else diff --git a/sys/amd64/amd64/legacy.c b/sys/amd64/amd64/legacy.c index 100ce7c..06d7d17 100644 --- a/sys/amd64/amd64/legacy.c +++ b/sys/amd64/amd64/legacy.c @@ -81,6 +81,7 @@ static device_method_t legacy_methods[] = { DEVMETHOD(bus_read_ivar, legacy_read_ivar), DEVMETHOD(bus_write_ivar, legacy_write_ivar), DEVMETHOD(bus_alloc_resource, bus_generic_alloc_resource), + DEVMETHOD(bus_adjust_resource, bus_generic_adjust_resource), DEVMETHOD(bus_release_resource, bus_generic_release_resource), DEVMETHOD(bus_activate_resource, bus_generic_activate_resource), DEVMETHOD(bus_deactivate_resource, bus_generic_deactivate_resource), diff --git a/sys/cddl/compat/opensolaris/sys/kstat.h b/sys/cddl/compat/opensolaris/sys/kstat.h index 9df4965..d73bd22 100644 --- a/sys/cddl/compat/opensolaris/sys/kstat.h +++ b/sys/cddl/compat/opensolaris/sys/kstat.h @@ -58,7 +58,7 @@ typedef struct kstat_named { } value; } kstat_named_t; -kstat_t *kstat_create(char *module, int instance, char *name, char *class, +kstat_t *kstat_create(char *module, int instance, char *name, char *cls, uchar_t type, ulong_t ndata, uchar_t flags); void kstat_install(kstat_t *ksp); void kstat_delete(kstat_t *ksp); diff --git a/sys/cddl/contrib/opensolaris/uts/common/fs/zfs/sys/arc.h b/sys/cddl/contrib/opensolaris/uts/common/fs/zfs/sys/arc.h index 8f189c6..5265222 100644 --- a/sys/cddl/contrib/opensolaris/uts/common/fs/zfs/sys/arc.h +++ b/sys/cddl/contrib/opensolaris/uts/common/fs/zfs/sys/arc.h @@ -37,8 +37,8 @@ extern "C" { typedef struct arc_buf_hdr arc_buf_hdr_t; typedef struct arc_buf arc_buf_t; -typedef void arc_done_func_t(zio_t *zio, arc_buf_t *buf, void *private); -typedef int arc_evict_func_t(void *private); +typedef void arc_done_func_t(zio_t *zio, arc_buf_t *buf, void *priv); +typedef int arc_evict_func_t(void *priv); /* generic arc_done_func_t's which you can use */ arc_done_func_t arc_bcopy_func; @@ -103,17 +103,17 @@ int arc_referenced(arc_buf_t *buf); #endif int arc_read(zio_t *pio, spa_t *spa, const blkptr_t *bp, arc_buf_t *pbuf, - arc_done_func_t *done, void *private, int priority, int zio_flags, + arc_done_func_t *done, void *priv, int priority, int zio_flags, uint32_t *arc_flags, const zbookmark_t *zb); int arc_read_nolock(zio_t *pio, spa_t *spa, const blkptr_t *bp, - arc_done_func_t *done, void *private, int priority, int flags, + arc_done_func_t *done, void *priv, int priority, int flags, uint32_t *arc_flags, const zbookmark_t *zb); zio_t *arc_write(zio_t *pio, spa_t *spa, uint64_t txg, blkptr_t *bp, arc_buf_t *buf, boolean_t l2arc, const zio_prop_t *zp, - arc_done_func_t *ready, arc_done_func_t *done, void *private, + arc_done_func_t *ready, arc_done_func_t *done, void *priv, int priority, int zio_flags, const zbookmark_t *zb); -void arc_set_callback(arc_buf_t *buf, arc_evict_func_t *func, void *private); +void arc_set_callback(arc_buf_t *buf, arc_evict_func_t *func, void *priv); int arc_buf_evict(arc_buf_t *buf); void arc_flush(spa_t *spa); diff --git a/sys/cddl/contrib/opensolaris/uts/common/fs/zfs/sys/ddt.h b/sys/cddl/contrib/opensolaris/uts/common/fs/zfs/sys/ddt.h index 9724d6e..405622b 100644 --- a/sys/cddl/contrib/opensolaris/uts/common/fs/zfs/sys/ddt.h +++ b/sys/cddl/contrib/opensolaris/uts/common/fs/zfs/sys/ddt.h @@ -169,15 +169,15 @@ typedef struct ddt_ops { #define DDT_NAMELEN 80 extern void ddt_object_name(ddt_t *ddt, enum ddt_type type, - enum ddt_class class, char *name); + enum ddt_class cls, char *name); extern int ddt_object_walk(ddt_t *ddt, enum ddt_type type, - enum ddt_class class, uint64_t *walk, ddt_entry_t *dde); + enum ddt_class cls, uint64_t *walk, ddt_entry_t *dde); extern uint64_t ddt_object_count(ddt_t *ddt, enum ddt_type type, - enum ddt_class class); + enum ddt_class cls); extern int ddt_object_info(ddt_t *ddt, enum ddt_type type, - enum ddt_class class, dmu_object_info_t *); + enum ddt_class cls, dmu_object_info_t *); extern boolean_t ddt_object_exists(ddt_t *ddt, enum ddt_type type, - enum ddt_class class); + enum ddt_class cls); extern void ddt_bp_fill(const ddt_phys_t *ddp, blkptr_t *bp, uint64_t txg); @@ -235,7 +235,7 @@ extern void ddt_unload(spa_t *spa); extern void ddt_sync(spa_t *spa, uint64_t txg); extern int ddt_walk(spa_t *spa, ddt_bookmark_t *ddb, ddt_entry_t *dde); extern int ddt_object_update(ddt_t *ddt, enum ddt_type type, - enum ddt_class class, ddt_entry_t *dde, dmu_tx_t *tx); + enum ddt_class cls, ddt_entry_t *dde, dmu_tx_t *tx); extern const ddt_ops_t ddt_zap_ops; diff --git a/sys/cddl/contrib/opensolaris/uts/common/fs/zfs/sys/dsl_pool.h b/sys/cddl/contrib/opensolaris/uts/common/fs/zfs/sys/dsl_pool.h index 7d25bd7..57725b5 100644 --- a/sys/cddl/contrib/opensolaris/uts/common/fs/zfs/sys/dsl_pool.h +++ b/sys/cddl/contrib/opensolaris/uts/common/fs/zfs/sys/dsl_pool.h @@ -126,10 +126,10 @@ void dsl_free(dsl_pool_t *dp, uint64_t txg, const blkptr_t *bpp); void dsl_free_sync(zio_t *pio, dsl_pool_t *dp, uint64_t txg, const blkptr_t *bpp); int dsl_read(zio_t *pio, spa_t *spa, const blkptr_t *bpp, arc_buf_t *pbuf, - arc_done_func_t *done, void *private, int priority, int zio_flags, + arc_done_func_t *done, void *priv, int priority, int zio_flags, uint32_t *arc_flags, const zbookmark_t *zb); int dsl_read_nolock(zio_t *pio, spa_t *spa, const blkptr_t *bpp, - arc_done_func_t *done, void *private, int priority, int zio_flags, + arc_done_func_t *done, void *priv, int priority, int zio_flags, uint32_t *arc_flags, const zbookmark_t *zb); void dsl_pool_create_origin(dsl_pool_t *dp, dmu_tx_t *tx); void dsl_pool_upgrade_clones(dsl_pool_t *dp, dmu_tx_t *tx); diff --git a/sys/cddl/contrib/opensolaris/uts/common/fs/zfs/sys/spa.h b/sys/cddl/contrib/opensolaris/uts/common/fs/zfs/sys/spa.h index 23d48c8..9cdec18 100644 --- a/sys/cddl/contrib/opensolaris/uts/common/fs/zfs/sys/spa.h +++ b/sys/cddl/contrib/opensolaris/uts/common/fs/zfs/sys/spa.h @@ -655,7 +655,7 @@ extern void spa_history_log_version(spa_t *spa, history_internal_events_t evt); /* error handling */ struct zbookmark; extern void spa_log_error(spa_t *spa, zio_t *zio); -extern void zfs_ereport_post(const char *class, spa_t *spa, vdev_t *vd, +extern void zfs_ereport_post(const char *cls, spa_t *spa, vdev_t *vd, zio_t *zio, uint64_t stateoroffset, uint64_t length); extern void zfs_post_remove(spa_t *spa, vdev_t *vd); extern void zfs_post_state_change(spa_t *spa, vdev_t *vd); diff --git a/sys/cddl/contrib/opensolaris/uts/common/fs/zfs/sys/zfs_ioctl.h b/sys/cddl/contrib/opensolaris/uts/common/fs/zfs/sys/zfs_ioctl.h index 63b9c57..f7e44aa 100644 --- a/sys/cddl/contrib/opensolaris/uts/common/fs/zfs/sys/zfs_ioctl.h +++ b/sys/cddl/contrib/opensolaris/uts/common/fs/zfs/sys/zfs_ioctl.h @@ -115,6 +115,87 @@ typedef enum drr_headertype { /* * zfs ioctl command structure */ +struct drr_begin { + uint64_t drr_magic; + uint64_t drr_versioninfo; /* was drr_version */ + uint64_t drr_creation_time; + dmu_objset_type_t drr_type; + uint32_t drr_flags; + uint64_t drr_toguid; + uint64_t drr_fromguid; + char drr_toname[MAXNAMELEN]; +}; + +struct drr_end { + zio_cksum_t drr_checksum; + uint64_t drr_toguid; +}; + +struct drr_object { + uint64_t drr_object; + dmu_object_type_t drr_type; + dmu_object_type_t drr_bonustype; + uint32_t drr_blksz; + uint32_t drr_bonuslen; + uint8_t drr_checksumtype; + uint8_t drr_compress; + uint8_t drr_pad[6]; + uint64_t drr_toguid; + /* bonus content follows */ +}; + +struct drr_freeobjects { + uint64_t drr_firstobj; + uint64_t drr_numobjs; + uint64_t drr_toguid; +}; + +struct drr_write { + uint64_t drr_object; + dmu_object_type_t drr_type; + uint32_t drr_pad; + uint64_t drr_offset; + uint64_t drr_length; + uint64_t drr_toguid; + uint8_t drr_checksumtype; + uint8_t drr_checksumflags; + uint8_t drr_pad2[6]; + ddt_key_t drr_key; /* deduplication key */ + /* content follows */ +}; + +struct drr_free { + uint64_t drr_object; + uint64_t drr_offset; + uint64_t drr_length; + uint64_t drr_toguid; +}; + +struct drr_write_byref { + /* where to put the data */ + uint64_t drr_object; + uint64_t drr_offset; + uint64_t drr_length; + uint64_t drr_toguid; + /* where to find the prior copy of the data */ + uint64_t drr_refguid; + uint64_t drr_refobject; + uint64_t drr_refoffset; + /* properties of the data */ + uint8_t drr_checksumtype; + uint8_t drr_checksumflags; + uint8_t drr_pad2[6]; + ddt_key_t drr_key; /* deduplication key */ +}; + +struct drr_spill { + uint64_t drr_object; + uint64_t drr_length; + uint64_t drr_toguid; + uint64_t drr_pad[4]; /* needed for crypto */ + /* spill data follows */ +}; + typedef struct dmu_replay_record { enum { DRR_BEGIN, DRR_OBJECT, DRR_FREEOBJECTS, @@ -123,79 +204,14 @@ typedef struct dmu_replay_record { } drr_type; uint32_t drr_payloadlen; union { - struct drr_begin { - uint64_t drr_magic; - uint64_t drr_versioninfo; /* was drr_version */ - uint64_t drr_creation_time; - dmu_objset_type_t drr_type; - uint32_t drr_flags; - uint64_t drr_toguid; - uint64_t drr_fromguid; - char drr_toname[MAXNAMELEN]; - } drr_begin; - struct drr_end { - zio_cksum_t drr_checksum; - uint64_t drr_toguid; - } drr_end; - struct drr_object { - uint64_t drr_object; - dmu_object_type_t drr_type; - dmu_object_type_t drr_bonustype; - uint32_t drr_blksz; - uint32_t drr_bonuslen; - uint8_t drr_checksumtype; - uint8_t drr_compress; - uint8_t drr_pad[6]; - uint64_t drr_toguid; - /* bonus content follows */ - } drr_object; - struct drr_freeobjects { - uint64_t drr_firstobj; - uint64_t drr_numobjs; - uint64_t drr_toguid; - } drr_freeobjects; - struct drr_write { - uint64_t drr_object; - dmu_object_type_t drr_type; - uint32_t drr_pad; - uint64_t drr_offset; - uint64_t drr_length; - uint64_t drr_toguid; - uint8_t drr_checksumtype; - uint8_t drr_checksumflags; - uint8_t drr_pad2[6]; - ddt_key_t drr_key; /* deduplication key */ - /* content follows */ - } drr_write; - struct drr_free { - uint64_t drr_object; - uint64_t drr_offset; - uint64_t drr_length; - uint64_t drr_toguid; - } drr_free; - struct drr_write_byref { - /* where to put the data */ - uint64_t drr_object; - uint64_t drr_offset; - uint64_t drr_length; - uint64_t drr_toguid; - /* where to find the prior copy of the data */ - uint64_t drr_refguid; - uint64_t drr_refobject; - uint64_t drr_refoffset; - /* properties of the data */ - uint8_t drr_checksumtype; - uint8_t drr_checksumflags; - uint8_t drr_pad2[6]; - ddt_key_t drr_key; /* deduplication key */ - } drr_write_byref; - struct drr_spill { - uint64_t drr_object; - uint64_t drr_length; - uint64_t drr_toguid; - uint64_t drr_pad[4]; /* needed for crypto */ - /* spill data follows */ - } drr_spill; + struct drr_begin drr_begin; + struct drr_end drr_end; + struct drr_object drr_object; + struct drr_freeobjects drr_freeobjects; + struct drr_write drr_write; + struct drr_free drr_free; + struct drr_write_byref drr_write_byref; + struct drr_spill drr_spill; } drr_u; } dmu_replay_record_t; diff --git a/sys/cddl/contrib/opensolaris/uts/common/fs/zfs/sys/zio.h b/sys/cddl/contrib/opensolaris/uts/common/fs/zfs/sys/zio.h index e8372f7..4a4e843 100644 --- a/sys/cddl/contrib/opensolaris/uts/common/fs/zfs/sys/zio.h +++ b/sys/cddl/contrib/opensolaris/uts/common/fs/zfs/sys/zio.h @@ -426,22 +426,22 @@ struct zio { }; extern zio_t *zio_null(zio_t *pio, spa_t *spa, vdev_t *vd, - zio_done_func_t *done, void *private, enum zio_flag flags); + zio_done_func_t *done, void *priv, enum zio_flag flags); extern zio_t *zio_root(spa_t *spa, - zio_done_func_t *done, void *private, enum zio_flag flags); + zio_done_func_t *done, void *priv, enum zio_flag flags); extern zio_t *zio_read(zio_t *pio, spa_t *spa, const blkptr_t *bp, void *data, - uint64_t size, zio_done_func_t *done, void *private, + uint64_t size, zio_done_func_t *done, void *priv, int priority, enum zio_flag flags, const zbookmark_t *zb); extern zio_t *zio_write(zio_t *pio, spa_t *spa, uint64_t txg, blkptr_t *bp, void *data, uint64_t size, const zio_prop_t *zp, - zio_done_func_t *ready, zio_done_func_t *done, void *private, + zio_done_func_t *ready, zio_done_func_t *done, void *priv, int priority, enum zio_flag flags, const zbookmark_t *zb); extern zio_t *zio_rewrite(zio_t *pio, spa_t *spa, uint64_t txg, blkptr_t *bp, - void *data, uint64_t size, zio_done_func_t *done, void *private, + void *data, uint64_t size, zio_done_func_t *done, void *priv, int priority, enum zio_flag flags, zbookmark_t *zb); extern void zio_write_override(zio_t *zio, blkptr_t *bp, int copies); @@ -450,19 +450,20 @@ extern void zio_free(spa_t *spa, uint64_t txg, const blkptr_t *bp); extern zio_t *zio_claim(zio_t *pio, spa_t *spa, uint64_t txg, const blkptr_t *bp, - zio_done_func_t *done, void *private, enum zio_flag flags); + zio_done_func_t *done, void *priv, enum zio_flag flags); extern zio_t *zio_ioctl(zio_t *pio, spa_t *spa, vdev_t *vd, int cmd, - zio_done_func_t *done, void *private, int priority, enum zio_flag flags); + zio_done_func_t *done, void *priv, int priority, + enum zio_flag flags); extern zio_t *zio_read_phys(zio_t *pio, vdev_t *vd, uint64_t offset, uint64_t size, void *data, int checksum, - zio_done_func_t *done, void *private, int priority, enum zio_flag flags, + zio_done_func_t *done, void *priv, int priority, enum zio_flag flags, boolean_t labels); extern zio_t *zio_write_phys(zio_t *pio, vdev_t *vd, uint64_t offset, uint64_t size, void *data, int checksum, - zio_done_func_t *done, void *private, int priority, enum zio_flag flags, + zio_done_func_t *done, void *priv, int priority, enum zio_flag flags, boolean_t labels); extern zio_t *zio_free_sync(zio_t *pio, spa_t *spa, uint64_t txg, @@ -493,11 +494,11 @@ extern void zio_resubmit_stage_async(void *); extern zio_t *zio_vdev_child_io(zio_t *zio, blkptr_t *bp, vdev_t *vd, uint64_t offset, void *data, uint64_t size, int type, int priority, - enum zio_flag flags, zio_done_func_t *done, void *private); + enum zio_flag flags, zio_done_func_t *done, void *priv); extern zio_t *zio_vdev_delegated_io(vdev_t *vd, uint64_t offset, void *data, uint64_t size, int type, int priority, - enum zio_flag flags, zio_done_func_t *done, void *private); + enum zio_flag flags, zio_done_func_t *done, void *priv); extern void zio_vdev_io_bypass(zio_t *zio); extern void zio_vdev_io_reissue(zio_t *zio); diff --git a/sys/conf/Makefile.powerpc b/sys/conf/Makefile.powerpc index e4cd85f..725f3c7 100644 --- a/sys/conf/Makefile.powerpc +++ b/sys/conf/Makefile.powerpc @@ -35,7 +35,7 @@ LDSCRIPT_NAME?= ldscript.${MACHINE_ARCH} INCLUDES+= -I$S/contrib/libfdt -CFLAGS+= -msoft-float +CFLAGS+= -msoft-float -Wa,-many DDB_ENABLED!= grep DDB opt_ddb.h || true .if !empty(DDB_ENABLED) diff --git a/sys/conf/files b/sys/conf/files index d654c6f..a62e1a6 100644 --- a/sys/conf/files +++ b/sys/conf/files @@ -3152,41 +3152,41 @@ ofed/drivers/net/mlx4/en_tx.c optional mlxen \ compile-with "${OFED_C_NOIMP} -I$S/ofed/drivers/net/mlx4/" ofed/drivers/infiniband/hw/mthca/mthca_allocator.c optional mthca \ - no-depend compile-with "${OFED_C} -I$S/ofed/drivers/infiniband/mthca/" + no-depend compile-with "${OFED_C}" ofed/drivers/infiniband/hw/mthca/mthca_av.c optional mthca \ - no-depend compile-with "${OFED_C} -I$S/ofed/drivers/infiniband/mthca/" + no-depend compile-with "${OFED_C}" ofed/drivers/infiniband/hw/mthca/mthca_catas.c optional mthca \ - no-depend compile-with "${OFED_C} -I$S/ofed/drivers/infiniband/mthca/" + no-depend compile-with "${OFED_C}" ofed/drivers/infiniband/hw/mthca/mthca_cmd.c optional mthca \ - no-depend compile-with "${OFED_C} -I$S/ofed/drivers/infiniband/mthca/" + no-depend compile-with "${OFED_C}" ofed/drivers/infiniband/hw/mthca/mthca_cq.c optional mthca \ - no-depend compile-with "${OFED_C} -I$S/ofed/drivers/infiniband/mthca/" + no-depend compile-with "${OFED_C}" ofed/drivers/infiniband/hw/mthca/mthca_eq.c optional mthca \ - no-depend compile-with "${OFED_C} -I$S/ofed/drivers/infiniband/mthca/" + no-depend compile-with "${OFED_C}" ofed/drivers/infiniband/hw/mthca/mthca_mad.c optional mthca \ - no-depend compile-with "${OFED_C} -I$S/ofed/drivers/infiniband/mthca/" + no-depend compile-with "${OFED_C}" ofed/drivers/infiniband/hw/mthca/mthca_main.c optional mthca \ - no-depend compile-with "${OFED_C} -I$S/ofed/drivers/infiniband/mthca/" + no-depend compile-with "${OFED_C}" ofed/drivers/infiniband/hw/mthca/mthca_mcg.c optional mthca \ - no-depend compile-with "${OFED_C} -I$S/ofed/drivers/infiniband/mthca/" + no-depend compile-with "${OFED_C}" ofed/drivers/infiniband/hw/mthca/mthca_memfree.c optional mthca \ - no-depend compile-with "${OFED_C} -I$S/ofed/drivers/infiniband/mthca/" + no-depend compile-with "${OFED_C}" ofed/drivers/infiniband/hw/mthca/mthca_mr.c optional mthca \ - no-depend compile-with "${OFED_C} -I$S/ofed/drivers/infiniband/mthca/" + no-depend compile-with "${OFED_C}" ofed/drivers/infiniband/hw/mthca/mthca_pd.c optional mthca \ - no-depend compile-with "${OFED_C} -I$S/ofed/drivers/infiniband/mthca/" + no-depend compile-with "${OFED_C}" ofed/drivers/infiniband/hw/mthca/mthca_profile.c optional mthca \ - no-depend compile-with "${OFED_C} -I$S/ofed/drivers/infiniband/mthca/" + no-depend compile-with "${OFED_C}" ofed/drivers/infiniband/hw/mthca/mthca_provider.c optional mthca \ - no-depend compile-with "${OFED_C} -I$S/ofed/drivers/infiniband/mthca/" + no-depend compile-with "${OFED_C}" ofed/drivers/infiniband/hw/mthca/mthca_qp.c optional mthca \ - no-depend compile-with "${OFED_C} -I$S/ofed/drivers/infiniband/mthca/" + no-depend compile-with "${OFED_C}" ofed/drivers/infiniband/hw/mthca/mthca_reset.c optional mthca \ - no-depend compile-with "${OFED_C} -I$S/ofed/drivers/infiniband/mthca/" + no-depend compile-with "${OFED_C}" ofed/drivers/infiniband/hw/mthca/mthca_srq.c optional mthca \ - no-depend compile-with "${OFED_C} -I$S/ofed/drivers/infiniband/mthca/" + no-depend compile-with "${OFED_C}" ofed/drivers/infiniband/hw/mthca/mthca_uar.c optional mthca \ - no-depend compile-with "${OFED_C} -I$S/ofed/drivers/infiniband/mthca/" + no-depend compile-with "${OFED_C}" # crypto support opencrypto/cast.c optional crypto | ipsec diff --git a/sys/dev/aac/aac.c b/sys/dev/aac/aac.c index 53528fd..45cfa02 100644 --- a/sys/dev/aac/aac.c +++ b/sys/dev/aac/aac.c @@ -661,6 +661,16 @@ aac_detach(device_t dev) callout_drain(&sc->aac_daemontime); + mtx_lock(&sc->aac_io_lock); + while (sc->aifflags & AAC_AIFFLAGS_RUNNING) { + sc->aifflags |= AAC_AIFFLAGS_EXIT; + wakeup(sc->aifthread); + msleep(sc->aac_dev, &sc->aac_io_lock, PUSER, "aacdch", 0); + } + mtx_unlock(&sc->aac_io_lock); + KASSERT((sc->aifflags & AAC_AIFFLAGS_RUNNING) == 0, + ("%s: invalid detach state", __func__)); + /* Remove the child containers */ while ((co = TAILQ_FIRST(&sc->aac_container_tqh)) != NULL) { error = device_delete_child(dev, co->co_disk); @@ -679,15 +689,6 @@ aac_detach(device_t dev) free(sim, M_AACBUF); } - if (sc->aifflags & AAC_AIFFLAGS_RUNNING) { - sc->aifflags |= AAC_AIFFLAGS_EXIT; - wakeup(sc->aifthread); - tsleep(sc->aac_dev, PUSER | PCATCH, "aacdch", 30 * hz); - } - - if (sc->aifflags & AAC_AIFFLAGS_RUNNING) - panic("Cannot shutdown AIF thread"); - if ((error = aac_shutdown(dev))) return(error); @@ -1020,7 +1021,7 @@ aac_command_thread(struct aac_softc *sc) /* * First see if any FIBs need to be allocated. This needs * to be called without the driver lock because contigmalloc - * will grab Giant, and would result in an LOR. + * can sleep. */ if ((sc->aifflags & AAC_AIFFLAGS_ALLOCFIBS) != 0) { mtx_unlock(&sc->aac_io_lock); @@ -1372,7 +1373,9 @@ aac_alloc_command(struct aac_softc *sc, struct aac_command **cmp) if ((cm = aac_dequeue_free(sc)) == NULL) { if (sc->total_fibs < sc->aac_max_fibs) { + mtx_lock(&sc->aac_io_lock); sc->aifflags |= AAC_AIFFLAGS_ALLOCFIBS; + mtx_unlock(&sc->aac_io_lock); wakeup(sc->aifthread); } return (EBUSY); diff --git a/sys/dev/aac/aacvar.h b/sys/dev/aac/aacvar.h index 61f3c5b..d994acf 100644 --- a/sys/dev/aac/aacvar.h +++ b/sys/dev/aac/aacvar.h @@ -386,13 +386,12 @@ struct aac_softc struct proc *aifthread; int aifflags; #define AAC_AIFFLAGS_RUNNING (1 << 0) -#define AAC_AIFFLAGS_AIF (1 << 1) +#define AAC_AIFFLAGS_UNUSED0 (1 << 1) #define AAC_AIFFLAGS_EXIT (1 << 2) #define AAC_AIFFLAGS_EXITED (1 << 3) -#define AAC_AIFFLAGS_PRINTF (1 << 4) +#define AAC_AIFFLAGS_UNUSED1 (1 << 4) #define AAC_AIFFLAGS_ALLOCFIBS (1 << 5) -#define AAC_AIFFLAGS_PENDING (AAC_AIFFLAGS_AIF | AAC_AIFFLAGS_PRINTF | \ - AAC_AIFFLAGS_ALLOCFIBS) +#define AAC_AIFFLAGS_PENDING AAC_AIFFLAGS_ALLOCFIBS u_int32_t flags; #define AAC_FLAGS_PERC2QC (1 << 0) #define AAC_FLAGS_ENABLE_CAM (1 << 1) /* No SCSI passthrough */ diff --git a/sys/dev/acpica/acpi.c b/sys/dev/acpica/acpi.c index f6d6094..3cef351 100644 --- a/sys/dev/acpica/acpi.c +++ b/sys/dev/acpica/acpi.c @@ -123,6 +123,8 @@ static int acpi_set_resource(device_t dev, device_t child, int type, static struct resource *acpi_alloc_resource(device_t bus, device_t child, int type, int *rid, u_long start, u_long end, u_long count, u_int flags); +static int acpi_adjust_resource(device_t bus, device_t child, int type, + struct resource *r, u_long start, u_long end); static int acpi_release_resource(device_t bus, device_t child, int type, int rid, struct resource *r); static void acpi_delete_resource(device_t bus, device_t child, int type, @@ -193,6 +195,7 @@ static device_method_t acpi_methods[] = { DEVMETHOD(bus_set_resource, acpi_set_resource), DEVMETHOD(bus_get_resource, bus_generic_rl_get_resource), DEVMETHOD(bus_alloc_resource, acpi_alloc_resource), + DEVMETHOD(bus_adjust_resource, acpi_adjust_resource), DEVMETHOD(bus_release_resource, acpi_release_resource), DEVMETHOD(bus_delete_resource, acpi_delete_resource), DEVMETHOD(bus_child_pnpinfo_str, acpi_child_pnpinfo_str_method), @@ -1325,29 +1328,40 @@ acpi_alloc_resource(device_t bus, device_t child, int type, int *rid, } static int -acpi_release_resource(device_t bus, device_t child, int type, int rid, - struct resource *r) +acpi_is_resource_managed(int type, struct resource *r) { - struct rman *rm; - int ret; /* We only handle memory and IO resources through rman. */ switch (type) { case SYS_RES_IOPORT: - rm = &acpi_rman_io; - break; + return (rman_is_region_manager(r, &acpi_rman_io)); case SYS_RES_MEMORY: - rm = &acpi_rman_mem; - break; - default: - rm = NULL; + return (rman_is_region_manager(r, &acpi_rman_mem)); } + return (0); +} + +static int +acpi_adjust_resource(device_t bus, device_t child, int type, struct resource *r, + u_long start, u_long end) +{ + + if (acpi_is_resource_managed(type, r)) + return (rman_adjust_resource(r, start, end)); + return (bus_generic_adjust_resource(bus, child, type, r, start, end)); +} + +static int +acpi_release_resource(device_t bus, device_t child, int type, int rid, + struct resource *r) +{ + int ret; /* * If this resource belongs to one of our internal managers, * deactivate it and release it to the local pool. */ - if (rm != NULL && rman_is_region_manager(r, rm)) { + if (acpi_is_resource_managed(type, r)) { if (rman_get_flags(r) & RF_ACTIVE) { ret = bus_deactivate_resource(child, type, rid, r); if (ret != 0) diff --git a/sys/dev/ata/ata-sata.c b/sys/dev/ata/ata-sata.c index e95fc8f..1ddf238 100644 --- a/sys/dev/ata/ata-sata.c +++ b/sys/dev/ata/ata-sata.c @@ -54,6 +54,11 @@ ata_sata_phy_check_events(device_t dev, int port) u_int32_t error, status; ata_sata_scr_read(ch, port, ATA_SERROR, &error); + + /* Check that SError value is sane. */ + if (error == 0xffffffff) + return; + /* Clear set error bits/interrupt. */ if (error) ata_sata_scr_write(ch, port, ATA_SERROR, error); @@ -163,18 +168,18 @@ ata_sata_phy_reset(device_t dev, int port, int quick) if (bootverbose) { if (port < 0) { - device_printf(dev, "hardware reset ...\n"); + device_printf(dev, "hard reset ...\n"); } else { - device_printf(dev, "p%d: hardware reset ...\n", port); + device_printf(dev, "p%d: hard reset ...\n", port); } } for (retry = 0; retry < 10; retry++) { for (loop = 0; loop < 10; loop++) { if (ata_sata_scr_write(ch, port, ATA_SCONTROL, ATA_SC_DET_RESET)) - return (0); + goto fail; ata_udelay(100); if (ata_sata_scr_read(ch, port, ATA_SCONTROL, &val)) - return (0); + goto fail; if ((val & ATA_SC_DET_MASK) == ATA_SC_DET_RESET) break; } @@ -183,15 +188,26 @@ ata_sata_phy_reset(device_t dev, int port, int quick) if (ata_sata_scr_write(ch, port, ATA_SCONTROL, ATA_SC_DET_IDLE | ((ch->pm_level > 0) ? 0 : ATA_SC_IPM_DIS_PARTIAL | ATA_SC_IPM_DIS_SLUMBER))) - return (0); + goto fail; ata_udelay(100); if (ata_sata_scr_read(ch, port, ATA_SCONTROL, &val)) - return (0); + goto fail; if ((val & ATA_SC_DET_MASK) == 0) return ata_sata_connect(ch, port, 0); } } - return 0; +fail: + /* Clear SATA error register. */ + ata_sata_scr_write(ch, port, ATA_SERROR, 0xffffffff); + + if (bootverbose) { + if (port < 0) { + device_printf(dev, "hard reset failed\n"); + } else { + device_printf(dev, "p%d: hard reset failed\n", port); + } + } + return (0); } int diff --git a/sys/dev/atkbdc/atkbd.c b/sys/dev/atkbdc/atkbd.c index b7156cf..c48118c 100644 --- a/sys/dev/atkbdc/atkbd.c +++ b/sys/dev/atkbdc/atkbd.c @@ -1097,6 +1097,15 @@ get_typematic(keyboard_t *kbd) x86regs_t regs; uint8_t *p; + /* + * Traditional entry points of int 0x15 and 0x16 are fixed + * and later BIOSes follow them. (U)EFI CSM specification + * also mandate these fixed entry points. + * + * Validate the entry points here before we proceed further. + * It's known that some recent laptops does not have the + * same entry point and hang on boot if we call it. + */ if (x86bios_get_intr(0x15) != 0xf000f859 || x86bios_get_intr(0x16) != 0xf000e82e) return (ENODEV); diff --git a/sys/dev/bxe/bxe_debug.h b/sys/dev/bxe/bxe_debug.h index 99cbe5d..baf0e32 100644 --- a/sys/dev/bxe/bxe_debug.h +++ b/sys/dev/bxe/bxe_debug.h @@ -41,21 +41,22 @@ extern uint32_t bxe_debug; * Debugging macros and definitions. */ -#define BXE_CP_LOAD 0x00000001 -#define BXE_CP_SEND 0x00000002 -#define BXE_CP_RECV 0x00000004 -#define BXE_CP_INTR 0x00000008 -#define BXE_CP_UNLOAD 0x00000010 -#define BXE_CP_RESET 0x00000020 -#define BXE_CP_IOCTL 0x00000040 -#define BXE_CP_STATS 0x00000080 -#define BXE_CP_MISC 0x00000100 -#define BXE_CP_PHY 0x00000200 -#define BXE_CP_RAMROD 0x00000400 -#define BXE_CP_NVRAM 0x00000800 -#define BXE_CP_REGS 0x00001000 -#define BXE_CP_ALL 0x00FFFFFF -#define BXE_CP_MASK 0x00FFFFFF +#define BXE_CP_LOAD 0x00000001 +#define BXE_CP_SEND 0x00000002 +#define BXE_CP_RECV 0x00000004 +#define BXE_CP_INTR 0x00000008 +#define BXE_CP_UNLOAD 0x00000010 +#define BXE_CP_RESET 0x00000020 +#define BXE_CP_IOCTL 0x00000040 +#define BXE_CP_STATS 0x00000080 +#define BXE_CP_MISC 0x00000100 +#define BXE_CP_PHY 0x00000200 +#define BXE_CP_RAMROD 0x00000400 +#define BXE_CP_NVRAM 0x00000800 +#define BXE_CP_REGS 0x00001000 +#define BXE_CP_TPA 0x00002000 +#define BXE_CP_ALL 0x00FFFFFF +#define BXE_CP_MASK 0x00FFFFFF #define BXE_LEVEL_FATAL 0x00000000 #define BXE_LEVEL_WARN 0x01000000 @@ -144,12 +145,18 @@ extern uint32_t bxe_debug; #define BXE_EXTREME_REGS (BXE_CP_REGS | BXE_LEVEL_EXTREME) #define BXE_INSANE_REGS (BXE_CP_REGS | BXE_LEVEL_INSANE) -#define BXE_FATAL (BXE_CP_ALL | BXE_LEVEL_FATAL) -#define BXE_WARN (BXE_CP_ALL | BXE_LEVEL_WARN) -#define BXE_INFO (BXE_CP_ALL | BXE_LEVEL_INFO) -#define BXE_VERBOSE (BXE_CP_ALL | BXE_LEVEL_VERBOSE) -#define BXE_EXTREME (BXE_CP_ALL | BXE_LEVEL_EXTREME) -#define BXE_INSANE (BXE_CP_ALL | BXE_LEVEL_INSANE) +#define BXE_WARN_TPA (BXE_CP_TPA | BXE_LEVEL_WARN) +#define BXE_INFO_TPA (BXE_CP_TPA | BXE_LEVEL_INFO) +#define BXE_VERBOSE_TPA (BXE_CP_TPA | BXE_LEVEL_VERBOSE) +#define BXE_EXTREME_TPA (BXE_CP_TPA | BXE_LEVEL_EXTREME) +#define BXE_INSANE_TPA (BXE_CP_TPA | BXE_LEVEL_INSANE) + +#define BXE_FATAL (BXE_CP_ALL | BXE_LEVEL_FATAL) +#define BXE_WARN (BXE_CP_ALL | BXE_LEVEL_WARN) +#define BXE_INFO (BXE_CP_ALL | BXE_LEVEL_INFO) +#define BXE_VERBOSE (BXE_CP_ALL | BXE_LEVEL_VERBOSE) +#define BXE_EXTREME (BXE_CP_ALL | BXE_LEVEL_EXTREME) +#define BXE_INSANE (BXE_CP_ALL | BXE_LEVEL_INSANE) #define BXE_CODE_PATH(cp) ((cp & BXE_CP_MASK) & bxe_debug) #define BXE_MSG_LEVEL(lv) ((lv & BXE_LEVEL_MASK) <= (bxe_debug & BXE_LEVEL_MASK)) diff --git a/sys/dev/bxe/bxe_link.c b/sys/dev/bxe/bxe_link.c index 6ee29a8..8adc87e 100644 --- a/sys/dev/bxe/bxe_link.c +++ b/sys/dev/bxe/bxe_link.c @@ -1168,15 +1168,17 @@ bxe_set_parallel_detection(struct link_params *params, uint8_t phy_flags) control2 |= MDIO_SERDES_DIGITAL_A_1000X_CONTROL2_PRL_DT_EN; else control2 &= ~MDIO_SERDES_DIGITAL_A_1000X_CONTROL2_PRL_DT_EN; - DBPRINT(sc, 1, "params->speed_cap_mask = 0x%x, control2 = 0x%x\n", - params->speed_cap_mask, control2); + + DBPRINT(sc, BXE_VERBOSE_PHY, "%s(): params->speed_cap_mask = 0x%x, " + "control2 = 0x%x\n", __FUNCTION__, params->speed_cap_mask, control2); + CL45_WR_OVER_CL22(sc, params->port, params->phy_addr, MDIO_REG_BANK_SERDES_DIGITAL, MDIO_SERDES_DIGITAL_A_1000X_CONTROL2, control2); if ((phy_flags & PHY_XGXS_FLAG) && (params->speed_cap_mask & PORT_HW_CFG_SPEED_CAPABILITY_D0_10G)) { - DBPRINT(sc, BXE_INFO, "XGXS\n"); + DBPRINT(sc, BXE_VERBOSE_PHY, "%s(): XGXS\n", __FUNCTION__); CL45_WR_OVER_CL22(sc, params->port, params->phy_addr, MDIO_REG_BANK_10G_PARALLEL_DETECT, @@ -1688,7 +1690,9 @@ bxe_flow_ctrl_resolve(struct link_params *params, struct link_vars *vars, } bxe_pause_resolve(vars, pause_result); } - DBPRINT(sc, BXE_INFO, "flow_ctrl 0x%x\n", vars->flow_ctrl); + + DBPRINT(sc, BXE_VERBOSE_PHY, "%s(): flow_ctrl 0x%x\n", + __FUNCTION__, vars->flow_ctrl); } static void @@ -1698,13 +1702,16 @@ bxe_check_fallback_to_cl37(struct link_params *params) uint16_t rx_status, ustat_val, cl37_fsm_recieved; sc = params->sc; - DBPRINT(sc, BXE_INFO, "bxe_check_fallback_to_cl37\n"); + + DBPRINT(sc, BXE_VERBOSE_PHY, "%s(): IEEE 802.3 Clause 37 Fallback\n", + __FUNCTION__); + CL45_RD_OVER_CL22(sc, params->port, params->phy_addr, MDIO_REG_BANK_RX0, MDIO_RX0_RX_STATUS, &rx_status); if ((rx_status & MDIO_RX0_RX_STATUS_SIGDET) != (MDIO_RX0_RX_STATUS_SIGDET)) { DBPRINT(sc, BXE_VERBOSE_PHY, - "Signal is not detected. Restoring CL73." + "No signal detected. Restoring CL73." "rx_status(0x80b0) = 0x%x\n", rx_status); CL45_WR_OVER_CL22(sc, params->port, params->phy_addr, MDIO_REG_BANK_CL73_IEEEB0, MDIO_CL73_IEEEB0_CL73_AN_CONTROL, @@ -1738,7 +1745,9 @@ bxe_check_fallback_to_cl37(struct link_params *params) CL45_WR_OVER_CL22(sc, params->port, params->phy_addr, MDIO_REG_BANK_CL73_IEEEB0, MDIO_CL73_IEEEB0_CL73_AN_CONTROL, 0); bxe_restart_autoneg(params, 0); - DBPRINT(sc, BXE_INFO, "Disabling CL73, and restarting CL37 autoneg\n"); + + DBPRINT(sc, BXE_INFO, "%s(): Disabling CL73 and restarting CL37 " + "autoneg\n", __FUNCTION__); } static void @@ -3391,7 +3400,8 @@ bxe_init_internal_phy(struct link_params *params, struct link_vars *vars, ((XGXS_EXT_PHY_TYPE(params->ext_phy_config) == PORT_HW_CFG_XGXS_EXT_PHY_TYPE_DIRECT) && params->loopback_mode == LOOPBACK_EXT)) { - DBPRINT(sc, BXE_INFO, "not SGMII, no AN\n"); + DBPRINT(sc, BXE_VERBOSE_PHY, "%s(): Not SGMII, no AN\n", + __FUNCTION__); /* Disable autoneg. */ bxe_set_autoneg(params, vars, 0); @@ -5338,9 +5348,6 @@ bxe_set_led(struct link_params *params, uint8_t mode, uint32_t speed) emac_base = port ? GRCBASE_EMAC1 : GRCBASE_EMAC0; ext_phy_type = XGXS_EXT_PHY_TYPE(params->ext_phy_config); - DBPRINT(sc, BXE_INFO, "bxe_set_led: port %x, mode %d\n", port, mode); - DBPRINT(sc, BXE_VERBOSE_PHY, "speed 0x%x, hw_led_mode 0x%x\n", speed, - hw_led_mode); switch (mode) { case LED_MODE_OFF: REG_WR(sc, NIG_REG_LED_10G_P0 + port * 4, 0); @@ -5382,7 +5389,7 @@ bxe_set_led(struct link_params *params, uint8_t mode, uint32_t speed) default: rc = -EINVAL; DBPRINT(sc, BXE_VERBOSE_PHY, - "bxe_set_led: Invalid led mode %d\n", mode); + "%s(): Invalid led mode (%d)!\n", __FUNCTION__, mode); break; } return (rc); @@ -5635,7 +5642,10 @@ bxe_link_reset(struct link_params *params, struct link_vars *vars, ext_phy_type = XGXS_EXT_PHY_TYPE(ext_phy_config); val = REG_RD(sc, params->shmem_base + offsetof(struct shmem_region, dev_info.port_feature_config[params->port].config)); - DBPRINT(sc, BXE_INFO, "Resetting the link of port %d\n", port); + + DBPRINT(sc, BXE_INFO, "%s(): Resetting port %d link.\n", + __FUNCTION__, port); + /* Disable attentions. */ vars->link_status = 0; bxe_update_mng(params, vars->link_status); diff --git a/sys/dev/bxe/if_bxe.c b/sys/dev/bxe/if_bxe.c index cf0a40e..e7534f4 100644 --- a/sys/dev/bxe/if_bxe.c +++ b/sys/dev/bxe/if_bxe.c @@ -70,7 +70,6 @@ __FBSDID("$FreeBSD$"); #ifdef BXE_DEBUG uint32_t bxe_debug = BXE_WARN; - /* 0 = Never */ /* 1 = 1 in 2,147,483,648 */ /* 256 = 1 in 8,388,608 */ @@ -84,12 +83,9 @@ uint32_t bxe_debug = BXE_WARN; /* Controls how often to simulate an mbuf allocation failure. */ int bxe_debug_mbuf_allocation_failure = 0; -/* Controls how often to simulate a DMA mapping failure. */ +/* Controls how often to simulate a DMA mapping failure. */ int bxe_debug_dma_map_addr_failure = 0; -/* Controls how often to received frame error. */ -int bxe_debug_received_frame_error = 0; - /* Controls how often to simulate a bootcode failure. */ int bxe_debug_bootcode_running_failure = 0; #endif @@ -103,7 +99,7 @@ int bxe_debug_bootcode_running_failure = 0; /* BXE Build Time Options */ /* #define BXE_NVRAM_WRITE 1 */ -#define USE_DMAE 1 +#define BXE_USE_DMAE 1 /* * PCI Device ID Table @@ -132,14 +128,17 @@ static int bxe_attach(device_t); static int bxe_detach(device_t); static int bxe_shutdown(device_t); -static void bxe_set_tunables(struct bxe_softc *); +/* + * Driver local functions. + */ +static void bxe_tunables_set(struct bxe_softc *); static void bxe_print_adapter_info(struct bxe_softc *); static void bxe_probe_pci_caps(struct bxe_softc *); static void bxe_link_settings_supported(struct bxe_softc *, uint32_t); static void bxe_link_settings_requested(struct bxe_softc *); -static int bxe_get_function_hwinfo(struct bxe_softc *); -static void bxe_get_port_hwinfo(struct bxe_softc *); -static void bxe_get_common_hwinfo(struct bxe_softc *); +static int bxe_hwinfo_function_get(struct bxe_softc *); +static int bxe_hwinfo_port_get(struct bxe_softc *); +static int bxe_hwinfo_common_get(struct bxe_softc *); static void bxe_undi_unload(struct bxe_softc *); static int bxe_setup_leading(struct bxe_softc *); static int bxe_stop_leading(struct bxe_softc *); @@ -241,8 +240,8 @@ static int bxe_tx_encap(struct bxe_fastpath *, struct mbuf **); static void bxe_tx_start(struct ifnet *); static void bxe_tx_start_locked(struct ifnet *, struct bxe_fastpath *); static int bxe_tx_mq_start(struct ifnet *, struct mbuf *); -static int bxe_tx_mq_start_locked(struct ifnet *, struct bxe_fastpath *, - struct mbuf *); +static int bxe_tx_mq_start_locked(struct ifnet *, + struct bxe_fastpath *, struct mbuf *); static void bxe_mq_flush(struct ifnet *ifp); static int bxe_ioctl(struct ifnet *, u_long, caddr_t); static __inline int bxe_has_rx_work(struct bxe_fastpath *); @@ -254,33 +253,34 @@ static void bxe_intr_sp(void *); static void bxe_task_fp(void *, int); static void bxe_intr_fp(void *); static void bxe_zero_sb(struct bxe_softc *, int); -static void bxe_init_sb(struct bxe_softc *, struct host_status_block *, - bus_addr_t, int); +static void bxe_init_sb(struct bxe_softc *, + struct host_status_block *, bus_addr_t, int); static void bxe_zero_def_sb(struct bxe_softc *); -static void bxe_init_def_sb(struct bxe_softc *, struct host_def_status_block *, - bus_addr_t, int); +static void bxe_init_def_sb(struct bxe_softc *, + struct host_def_status_block *, bus_addr_t, int); static void bxe_update_coalesce(struct bxe_softc *); static __inline void bxe_update_rx_prod(struct bxe_softc *, - struct bxe_fastpath *, uint16_t, uint16_t, uint16_t); + struct bxe_fastpath *, uint16_t, uint16_t, uint16_t); static void bxe_clear_sge_mask_next_elems(struct bxe_fastpath *); static __inline void bxe_init_sge_ring_bit_mask(struct bxe_fastpath *); -static __inline void bxe_free_tpa_pool(struct bxe_fastpath *, int); -static __inline void bxe_free_rx_sge(struct bxe_softc *, struct bxe_fastpath *, - uint16_t); -static __inline void bxe_free_rx_sge_range(struct bxe_softc *, - struct bxe_fastpath *, int); -static struct mbuf *bxe_alloc_mbuf(struct bxe_fastpath *, int); -static int bxe_map_mbuf(struct bxe_fastpath *, struct mbuf *, bus_dma_tag_t, - bus_dmamap_t, bus_dma_segment_t *); -static struct mbuf *bxe_alloc_tpa_mbuf(struct bxe_fastpath *, int, int); -static void bxe_alloc_mutexes(struct bxe_softc *); -static void bxe_free_mutexes(struct bxe_softc *); -static int bxe_alloc_rx_sge(struct bxe_softc *, struct bxe_fastpath *, - uint16_t); -static void bxe_init_rx_chains(struct bxe_softc *); +static int bxe_alloc_tpa_mbuf(struct bxe_fastpath *, int); +static int bxe_fill_tpa_pool(struct bxe_fastpath *); +static void bxe_free_tpa_pool(struct bxe_fastpath *); + +static int bxe_alloc_rx_sge_mbuf(struct bxe_fastpath *, uint16_t); +static int bxe_fill_sg_chain(struct bxe_fastpath *); +static void bxe_free_sg_chain(struct bxe_fastpath *); + +static int bxe_alloc_rx_bd_mbuf(struct bxe_fastpath *, uint16_t); +static int bxe_fill_rx_bd_chain(struct bxe_fastpath *); +static void bxe_free_rx_bd_chain(struct bxe_fastpath *); + +static void bxe_mutexes_alloc(struct bxe_softc *); +static void bxe_mutexes_free(struct bxe_softc *); +static void bxe_clear_rx_chains(struct bxe_softc *); +static int bxe_init_rx_chains(struct bxe_softc *); +static void bxe_clear_tx_chains(struct bxe_softc *); static void bxe_init_tx_chains(struct bxe_softc *); -static void bxe_free_rx_chains(struct bxe_softc *); -static void bxe_free_tx_chains(struct bxe_softc *); static void bxe_init_sp_ring(struct bxe_softc *); static void bxe_init_context(struct bxe_softc *); static void bxe_init_ind_table(struct bxe_softc *); @@ -291,8 +291,7 @@ static void bxe_init_internal_port(struct bxe_softc *); static void bxe_init_internal_func(struct bxe_softc *); static void bxe_init_internal(struct bxe_softc *, uint32_t); -static void bxe_init_nic(struct bxe_softc *, uint32_t); -static int bxe_gunzip_init(struct bxe_softc *); +static int bxe_init_nic(struct bxe_softc *, uint32_t); static void bxe_lb_pckt(struct bxe_softc *); static int bxe_int_mem_test(struct bxe_softc *); static void bxe_enable_blocks_attention (struct bxe_softc *); @@ -304,13 +303,9 @@ static void bxe_ilt_wr(struct bxe_softc *, uint32_t, bus_addr_t); static int bxe_init_func(struct bxe_softc *); static int bxe_init_hw(struct bxe_softc *, uint32_t); static int bxe_fw_command(struct bxe_softc *, uint32_t); -static void bxe_dma_free(struct bxe_softc *); -static void bxe_dmamem_free(struct bxe_softc *, bus_dma_tag_t, caddr_t, - bus_dmamap_t); +static void bxe_host_structures_free(struct bxe_softc *); static void bxe_dma_map_addr(void *, bus_dma_segment_t *, int, int); -static int bxe_dma_alloc(device_t); -static int bxe_dmamem_alloc(struct bxe_softc *, bus_dma_tag_t, bus_dmamap_t, - void *, uint32_t, bus_addr_t *); +static int bxe_host_structures_alloc(device_t); static void bxe_set_mac_addr_e1(struct bxe_softc *, int); static void bxe_set_mac_addr_e1h(struct bxe_softc *, int); static void bxe_set_rx_mode(struct bxe_softc *); @@ -330,15 +325,12 @@ static void bxe_tpa_stop(struct bxe_softc *, struct bxe_fastpath *, uint16_t, int, int, union eth_rx_cqe *, uint16_t); static void bxe_rxeof(struct bxe_fastpath *); static void bxe_txeof(struct bxe_fastpath *); -static int bxe_get_buf(struct bxe_fastpath *, struct mbuf *, uint16_t); static int bxe_watchdog(struct bxe_fastpath *fp); -static int bxe_change_mtu(struct bxe_softc *, int); static void bxe_tick(void *); static void bxe_add_sysctls(struct bxe_softc *); -static void bxe_gunzip_end(struct bxe_softc *); -static void bxe_write_dmae_phys_len(struct bxe_softc *, bus_addr_t, uint32_t, - uint32_t); +static void bxe_write_dmae_phys_len(struct bxe_softc *, + bus_addr_t, uint32_t, uint32_t); void bxe_write_dmae(struct bxe_softc *, bus_addr_t, uint32_t, uint32_t); void bxe_read_dmae(struct bxe_softc *, uint32_t, uint32_t); @@ -360,32 +352,33 @@ static int bxe_sysctl_dump_rx_bd_chain(SYSCTL_HANDLER_ARGS); static int bxe_sysctl_dump_tx_chain(SYSCTL_HANDLER_ARGS); static int bxe_sysctl_reg_read(SYSCTL_HANDLER_ARGS); static int bxe_sysctl_breakpoint(SYSCTL_HANDLER_ARGS); -static void bxe_validate_rx_packet(struct bxe_fastpath *, uint16_t, - union eth_rx_cqe *, struct mbuf *); +static __noinline void bxe_validate_rx_packet(struct bxe_fastpath *, + uint16_t, union eth_rx_cqe *, struct mbuf *); static void bxe_grcdump(struct bxe_softc *, int); -static void bxe_dump_enet(struct bxe_softc *,struct mbuf *); -static void bxe_dump_mbuf (struct bxe_softc *, struct mbuf *); -static void bxe_dump_tx_mbuf_chain(struct bxe_softc *, int, int); -static void bxe_dump_rx_mbuf_chain(struct bxe_softc *, int, int); -static void bxe_dump_tx_parsing_bd(struct bxe_fastpath *,int, - struct eth_tx_parse_bd *); -static void bxe_dump_txbd(struct bxe_fastpath *, int, - union eth_tx_bd_types *); -static void bxe_dump_rxbd(struct bxe_fastpath *, int, - struct eth_rx_bd *); -static void bxe_dump_cqe(struct bxe_fastpath *, int, union eth_rx_cqe *); -static void bxe_dump_tx_chain(struct bxe_fastpath *, int, int); -static void bxe_dump_rx_cq_chain(struct bxe_fastpath *, int, int); -static void bxe_dump_rx_bd_chain(struct bxe_fastpath *, int, int); -static void bxe_dump_status_block(struct bxe_softc *); -static void bxe_dump_stats_block(struct bxe_softc *); -static void bxe_dump_fp_state(struct bxe_fastpath *); -static void bxe_dump_port_state_locked(struct bxe_softc *); -static void bxe_dump_link_vars_state_locked(struct bxe_softc *); -static void bxe_dump_link_params_state_locked(struct bxe_softc *); -static void bxe_dump_driver_state(struct bxe_softc *); -static void bxe_dump_hw_state(struct bxe_softc *); -static void bxe_dump_fw(struct bxe_softc *); +static __noinline void bxe_dump_enet(struct bxe_softc *,struct mbuf *); +static __noinline void bxe_dump_mbuf (struct bxe_softc *, struct mbuf *); +static __noinline void bxe_dump_tx_mbuf_chain(struct bxe_softc *, int, int); +static __noinline void bxe_dump_rx_mbuf_chain(struct bxe_softc *, int, int); +static __noinline void bxe_dump_tx_parsing_bd(struct bxe_fastpath *,int, + struct eth_tx_parse_bd *); +static __noinline void bxe_dump_txbd(struct bxe_fastpath *, int, + union eth_tx_bd_types *); +static __noinline void bxe_dump_rxbd(struct bxe_fastpath *, int, + struct eth_rx_bd *); +static __noinline void bxe_dump_cqe(struct bxe_fastpath *, + int, union eth_rx_cqe *); +static __noinline void bxe_dump_tx_chain(struct bxe_fastpath *, int, int); +static __noinline void bxe_dump_rx_cq_chain(struct bxe_fastpath *, int, int); +static __noinline void bxe_dump_rx_bd_chain(struct bxe_fastpath *, int, int); +static __noinline void bxe_dump_status_block(struct bxe_softc *); +static __noinline void bxe_dump_stats_block(struct bxe_softc *); +static __noinline void bxe_dump_fp_state(struct bxe_fastpath *); +static __noinline void bxe_dump_port_state_locked(struct bxe_softc *); +static __noinline void bxe_dump_link_vars_state_locked(struct bxe_softc *); +static __noinline void bxe_dump_link_params_state_locked(struct bxe_softc *); +static __noinline void bxe_dump_driver_state(struct bxe_softc *); +static __noinline void bxe_dump_hw_state(struct bxe_softc *); +static __noinline void bxe_dump_fw(struct bxe_softc *); static void bxe_decode_mb_msgs(struct bxe_softc *, uint32_t, uint32_t); static void bxe_decode_ramrod_cmd(struct bxe_softc *, int); static void bxe_breakpoint(struct bxe_softc *); @@ -433,11 +426,6 @@ DRIVER_MODULE(bxe, pci, bxe_driver, bxe_devclass, 0, 0); SYSCTL_NODE(_hw, OID_AUTO, bxe, CTLFLAG_RD, 0, "bxe driver parameters"); /* Allowable values are TRUE (1) or FALSE (0). */ -static int bxe_stats_enable = FALSE; -TUNABLE_INT("hw.bxe.stats_enable", &bxe_stats_enable); -SYSCTL_UINT(_hw_bxe, OID_AUTO, stats_enable, CTLFLAG_RDTUN, &bxe_stats_enable, - 0, "stats Enable/Disable"); - static int bxe_dcc_enable = FALSE; TUNABLE_INT("hw.bxe.dcc_enable", &bxe_dcc_enable); SYSCTL_UINT(_hw_bxe, OID_AUTO, dcc_enable, CTLFLAG_RDTUN, &bxe_dcc_enable, @@ -456,18 +444,6 @@ SYSCTL_UINT(_hw_bxe, OID_AUTO, int_mode, CTLFLAG_RDTUN, &bxe_int_mode, 0, "Interrupt (MSI-X|MSI|INTx) mode"); /* - * Specifies whether the driver should disable Transparent Packet - * Aggregation (TPA, also known as LRO). By default TPA is enabled. - * - * Allowable values are TRUE (1) or FALSE (0). - */ -static int bxe_tpa_enable = FALSE; -TUNABLE_INT("hw.bxe.tpa_enable", &bxe_tpa_enable); -SYSCTL_UINT(_hw_bxe, OID_AUTO, tpa_enable, CTLFLAG_RDTUN, &bxe_tpa_enable, - 0, "TPA Enable/Disable"); - - -/* * Specifies the number of queues that will be used when a multi-queue * RSS mode is selected using bxe_multi_mode below. * @@ -480,8 +456,8 @@ SYSCTL_UINT(_hw_bxe, OID_AUTO, queue_count, CTLFLAG_RDTUN, &bxe_queue_count, /* * ETH_RSS_MODE_DISABLED (0) - * Disables all multi-queue/packet sorting algorithms. Each - * received frame is routed to the same receive queue. + * Disables all multi-queue/packet sorting algorithms. All + * received frames are routed to a single receive queue. * * ETH_RSS_MODE_REGULAR (1) * The default mode which assigns incoming frames to receive @@ -579,7 +555,7 @@ bxe_reg_write32(struct bxe_softc *sc, bus_size_t offset, uint32_t val) (uintmax_t)offset); } - DBPRINT(sc, BXE_INSANE, "%s(): offset = 0x%jX, val = 0x%08X\n", + DBPRINT(sc, BXE_INSANE_REGS, "%s(): offset = 0x%jX, val = 0x%08X\n", __FUNCTION__, (uintmax_t)offset, val); bus_space_write_4(sc->bxe_btag, sc->bxe_bhandle, offset, val); @@ -602,7 +578,7 @@ bxe_reg_write16(struct bxe_softc *sc, bus_size_t offset, uint16_t val) (uintmax_t)offset); } - DBPRINT(sc, BXE_INSANE, "%s(): offset = 0x%jX, val = 0x%04X\n", + DBPRINT(sc, BXE_INSANE_REGS, "%s(): offset = 0x%jX, val = 0x%04X\n", __FUNCTION__, (uintmax_t)offset, val); bus_space_write_2(sc->bxe_btag, sc->bxe_bhandle, offset, val); @@ -619,7 +595,7 @@ static void bxe_reg_write8(struct bxe_softc *sc, bus_size_t offset, uint8_t val) { - DBPRINT(sc, BXE_INSANE, "%s(): offset = 0x%jX, val = 0x%02X\n", + DBPRINT(sc, BXE_INSANE_REGS, "%s(): offset = 0x%jX, val = 0x%02X\n", __FUNCTION__, (uintmax_t)offset, val); bus_space_write_1(sc->bxe_btag, sc->bxe_bhandle, offset, val); @@ -645,7 +621,7 @@ bxe_reg_read32(struct bxe_softc *sc, bus_size_t offset) val = bus_space_read_4(sc->bxe_btag, sc->bxe_bhandle, offset); - DBPRINT(sc, BXE_INSANE, "%s(): offset = 0x%jX, val = 0x%08X\n", + DBPRINT(sc, BXE_INSANE_REGS, "%s(): offset = 0x%jX, val = 0x%08X\n", __FUNCTION__, (uintmax_t)offset, val); return (val); @@ -671,7 +647,7 @@ bxe_reg_read16(struct bxe_softc *sc, bus_size_t offset) val = bus_space_read_2(sc->bxe_btag, sc->bxe_bhandle, offset); - DBPRINT(sc, BXE_INSANE, "%s(): offset = 0x%jX, val = 0x%08X\n", + DBPRINT(sc, BXE_INSANE_REGS, "%s(): offset = 0x%jX, val = 0x%08X\n", __FUNCTION__, (uintmax_t)offset, val); return (val); @@ -690,10 +666,10 @@ bxe_reg_read8(struct bxe_softc *sc, bus_size_t offset) { uint8_t val = bus_space_read_1(sc->bxe_btag, sc->bxe_bhandle, offset); - DBPRINT(sc, BXE_INSANE, "%s(): offset = 0x%jX, val = 0x%02X\n", + DBPRINT(sc, BXE_INSANE_REGS, "%s(): offset = 0x%jX, val = 0x%02X\n", __FUNCTION__, (uintmax_t)offset, val); - return(val); + return (val); } #endif @@ -996,6 +972,7 @@ bxe_probe(device_t dev) * Returns: * None. */ +/* ToDo: Create a sysctl for this info. */ static void bxe_print_adapter_info(struct bxe_softc *sc) { @@ -1025,19 +1002,14 @@ bxe_print_adapter_info(struct bxe_softc *sc) printf("); Flags ("); /* Miscellaneous flags. */ - if (sc->bxe_flags & BXE_USING_MSI_FLAG) + if (sc->msi_count > 0) printf("MSI"); - if (sc->bxe_flags & BXE_USING_MSIX_FLAG) { + if (sc->msix_count > 0) { if (i > 0) printf("|"); printf("MSI-X"); i++; } - if (sc->bxe_flags & BXE_SAFC_TX_FLAG) { - if (i > 0) printf("|"); - printf("SAFC"); i++; - } - if (TPA_ENABLED(sc)) { if (i > 0) printf("|"); printf("TPA"); i++; @@ -1056,6 +1028,9 @@ bxe_print_adapter_info(struct bxe_softc *sc) break; } + printf("); BD's (RX:%d,TX:%d", + (int) USABLE_RX_BD, (int) USABLE_TX_BD); + /* Firmware versions and device features. */ printf("); Firmware (%d.%d.%d); Bootcode (%d.%d.%d)\n", BCM_5710_FW_MAJOR_VERSION, @@ -1069,6 +1044,64 @@ bxe_print_adapter_info(struct bxe_softc *sc) } /* + * Release any interrupts allocated by the driver. + * + * Returns: + * None + */ +static void +bxe_interrupt_free(struct bxe_softc *sc) +{ + device_t dev; + int i; + + DBENTER(BXE_VERBOSE_RESET | BXE_VERBOSE_UNLOAD); + + dev = sc->dev; + + if (sc->msix_count > 0) { + /* Free MSI-X resources. */ + + for (i = 0; i < sc->msix_count; i++) { + DBPRINT(sc, (BXE_VERBOSE_LOAD | BXE_VERBOSE_RESET | + BXE_VERBOSE_INTR), "%s(): Releasing MSI-X[%d] " + "vector.\n", __FUNCTION__, i); + if (sc->bxe_msix_res[i] && sc->bxe_msix_rid[i]) + bus_release_resource(dev, SYS_RES_IRQ, + sc->bxe_msix_rid[i], sc->bxe_msix_res[i]); + } + + pci_release_msi(dev); + + } else if (sc->msi_count > 0) { + /* Free MSI resources. */ + + for (i = 0; i < sc->msi_count; i++) { + DBPRINT(sc, (BXE_VERBOSE_LOAD | BXE_VERBOSE_RESET | + BXE_VERBOSE_INTR), "%s(): Releasing MSI[%d] " + "vector.\n", __FUNCTION__, i); + if (sc->bxe_msi_res[i] && sc->bxe_msi_rid[i]) + bus_release_resource(dev, SYS_RES_IRQ, + sc->bxe_msi_rid[i], sc->bxe_msi_res[i]); + } + + pci_release_msi(dev); + + } else { + /* Free legacy interrupt resources. */ + + DBPRINT(sc, (BXE_VERBOSE_LOAD | BXE_VERBOSE_RESET | + BXE_VERBOSE_INTR), "%s(): Releasing legacy interrupt.\n", + __FUNCTION__); + if (sc->bxe_irq_res != NULL) + bus_release_resource(dev, SYS_RES_IRQ, + sc->bxe_irq_rid, sc->bxe_irq_res); + } + + DBEXIT(BXE_VERBOSE_RESET | BXE_VERBOSE_UNLOAD); +} + +/* * This function determines and allocates the appropriate * interrupt based on system capabilites and user request. * @@ -1086,30 +1119,19 @@ bxe_print_adapter_info(struct bxe_softc *sc) * 0 = Success, !0 = Failure. */ static int -bxe_interrupt_allocate(struct bxe_softc *sc) +bxe_interrupt_alloc(struct bxe_softc *sc) { device_t dev; - int i, rid, rc; + int error, i, rid, rc; int msi_count, msi_required, msi_allocated; int msix_count, msix_required, msix_allocated; - rc = 0; - dev = sc->dev; - msi_count = 0; - msi_required = 0; - msi_allocated = 0; - msix_count = 0; - msix_required = 0; - msix_allocated = 0; - DBENTER(BXE_VERBOSE_LOAD | BXE_VERBOSE_INTR); - /* Assume SAFC not enabled for TX. */ - sc->bxe_flags &= ~BXE_SAFC_TX_FLAG; - - /* Clear any previous priority queue mappings. */ - for (i = 0; i < BXE_MAX_PRIORITY; i++) - sc->pri_map[i] = 0; + rc = 0; + dev = sc->dev; + msi_count = msi_required = msi_allocated = 0; + msix_count = msix_required = msix_allocated = 0; /* Get the number of available MSI/MSI-X interrupts from the OS. */ if (sc->int_mode > 0) { @@ -1140,7 +1162,8 @@ bxe_interrupt_allocate(struct bxe_softc *sc) /* BSD resource identifier */ rid = 1; - if (pci_alloc_msix(dev, &msix_allocated) == 0) { + error = pci_alloc_msix(dev, &msix_allocated); + if (error == 0) { DBPRINT(sc, (BXE_VERBOSE_LOAD | BXE_VERBOSE_INTR), "%s(): Required/Allocated (%d/%d) MSI-X vector(s).\n", __FUNCTION__, msix_required, msix_allocated); @@ -1148,7 +1171,6 @@ bxe_interrupt_allocate(struct bxe_softc *sc) /* Make sure we got all the interrupts we asked for. */ if (msix_allocated >= msix_required) { sc->msix_count = msix_required; - sc->bxe_flags |= BXE_USING_MSIX_FLAG; msi_count = 0; /* Allocate the MSI-X vectors. */ @@ -1165,7 +1187,7 @@ bxe_interrupt_allocate(struct bxe_softc *sc) "%s(%d): Failed to map MSI-X[%d] vector!\n", __FILE__, __LINE__, (3)); rc = ENXIO; - goto bxe_interrupt_allocate_exit; + goto bxe_interrupt_alloc_exit; } } } else { @@ -1176,7 +1198,6 @@ bxe_interrupt_allocate(struct bxe_softc *sc) /* Release any resources acquired. */ pci_release_msi(dev); - sc->bxe_flags &= ~BXE_USING_MSIX_FLAG; sc->msix_count = msix_count = 0; /* We'll try MSI next. */ @@ -1200,7 +1221,8 @@ bxe_interrupt_allocate(struct bxe_softc *sc) msi_required); rid = 1; - if (pci_alloc_msi(dev, &msi_allocated) == 0) { + error = pci_alloc_msi(dev, &msi_allocated); + if (error == 0) { DBPRINT(sc, (BXE_VERBOSE_LOAD | BXE_VERBOSE_INTR), "%s(): Required/Allocated (%d/%d) MSI vector(s).\n", __FUNCTION__, msi_required, msi_allocated); @@ -1212,7 +1234,6 @@ bxe_interrupt_allocate(struct bxe_softc *sc) */ if (msi_required >= msi_allocated) { sc->msi_count = msi_required; - sc->bxe_flags |= BXE_USING_MSI_FLAG; /* Allocate the MSI vectors. */ for (i = 0; i < msi_required; i++) { sc->bxe_msi_rid[i] = i + rid; @@ -1226,7 +1247,7 @@ bxe_interrupt_allocate(struct bxe_softc *sc) "%s(%d): Failed to map MSI vector (%d)!\n", __FILE__, __LINE__, (i)); rc = ENXIO; - goto bxe_interrupt_allocate_exit; + goto bxe_interrupt_alloc_exit; } } } @@ -1237,7 +1258,6 @@ bxe_interrupt_allocate(struct bxe_softc *sc) /* Release any resources acquired. */ pci_release_msi(dev); - sc->bxe_flags &= ~BXE_USING_MSI_FLAG; sc->msi_count = msi_count = 0; /* We'll try INTx next. */ @@ -1262,7 +1282,7 @@ bxe_interrupt_allocate(struct bxe_softc *sc) BXE_PRINTF("%s(%d): PCI map interrupt failed!\n", __FILE__, __LINE__); rc = ENXIO; - goto bxe_interrupt_allocate_exit; + goto bxe_interrupt_alloc_exit; } sc->bxe_irq_rid = rid; } @@ -1271,27 +1291,55 @@ bxe_interrupt_allocate(struct bxe_softc *sc) "%s(): Actual: int_mode = %d, multi_mode = %d, num_queues = %d\n", __FUNCTION__, sc->int_mode, sc->multi_mode, sc->num_queues); -bxe_interrupt_allocate_exit: +bxe_interrupt_alloc_exit: DBEXIT(BXE_VERBOSE_LOAD | BXE_VERBOSE_INTR); return (rc); } +/* + * This function releases taskqueues. + * + * Returns: + * None + */ static void bxe_interrupt_detach(struct bxe_softc *sc) { +#ifdef BXE_TASK + struct bxe_fastpath *fp; +#endif device_t dev; int i; + DBENTER(BXE_VERBOSE_UNLOAD); + dev = sc->dev; - DBENTER(BXE_VERBOSE_RESET | BXE_VERBOSE_UNLOAD); + +#ifdef BXE_TASK + /* Free the OS taskqueue resources. */ + for (i = 0; i < sc->num_queues; i++) { + fp = &sc->fp[i]; + + if (fp->tq != NULL) { + taskqueue_drain(fp->tq, &fp->task); + taskqueue_free(fp->tq); + } + } + + if (sc->tq != NULL) { + taskqueue_drain(sc->tq, &sc->task); + taskqueue_free(sc->tq); + } +#endif + /* Release interrupt resources. */ - if ((sc->bxe_flags & BXE_USING_MSIX_FLAG) && sc->msix_count) { + if (sc->msix_count > 0) { for (i = 0; i < sc->msix_count; i++) { if (sc->bxe_msix_tag[i] && sc->bxe_msix_res[i]) bus_teardown_intr(dev, sc->bxe_msix_res[i], sc->bxe_msix_tag[i]); } - } else if ((sc->bxe_flags & BXE_USING_MSI_FLAG) && sc->msi_count) { + } else if (sc->msi_count > 0) { for (i = 0; i < sc->msi_count; i++) { if (sc->bxe_msi_tag[i] && sc->bxe_msi_res[i]) bus_teardown_intr(dev, sc->bxe_msi_res[i], @@ -1302,6 +1350,8 @@ bxe_interrupt_detach(struct bxe_softc *sc) bus_teardown_intr(dev, sc->bxe_irq_res, sc->bxe_irq_tag); } + + DBEXIT(BXE_VERBOSE_UNLOAD); } /* @@ -1336,7 +1386,7 @@ bxe_interrupt_attach(struct bxe_softc *sc) #endif /* Setup interrupt handlers. */ - if (sc->bxe_flags & BXE_USING_MSIX_FLAG) { + if (sc->msix_count > 0) { DBPRINT(sc, (BXE_VERBOSE_LOAD | BXE_VERBOSE_INTR), "%s(): Enabling slowpath MSI-X[0] vector.\n",__FUNCTION__); /* @@ -1344,13 +1394,9 @@ bxe_interrupt_attach(struct bxe_softc *sc) * driver instance to the interrupt handler for the * slowpath. */ - rc = bus_setup_intr(sc->dev, - sc->bxe_msix_res[0], - INTR_TYPE_NET | INTR_MPSAFE, - NULL, - bxe_intr_sp, - sc, - &sc->bxe_msix_tag[0]); + rc = bus_setup_intr(sc->dev, sc->bxe_msix_res[0], + INTR_TYPE_NET | INTR_MPSAFE, NULL, bxe_intr_sp, + sc, &sc->bxe_msix_tag[0]); if (rc) { BXE_PRINTF( @@ -1360,10 +1406,8 @@ bxe_interrupt_attach(struct bxe_softc *sc) } #if __FreeBSD_version >= 800504 - bus_describe_intr(sc->dev, - sc->bxe_msix_res[0], - sc->bxe_msix_tag[0], - "sp"); + bus_describe_intr(sc->dev, sc->bxe_msix_res[0], + sc->bxe_msix_tag[0], "sp"); #endif /* Now initialize the fastpath vectors. */ @@ -1377,13 +1421,9 @@ bxe_interrupt_attach(struct bxe_softc *sc) * fastpath context to the interrupt handler in this * case. Also the first msix_res was used by the sp. */ - rc = bus_setup_intr(sc->dev, - sc->bxe_msix_res[i + 1], - INTR_TYPE_NET | INTR_MPSAFE, - NULL, - bxe_intr_fp, - fp, - &sc->bxe_msix_tag[i + 1]); + rc = bus_setup_intr(sc->dev, sc->bxe_msix_res[i + 1], + INTR_TYPE_NET | INTR_MPSAFE, NULL, bxe_intr_fp, + fp, &sc->bxe_msix_tag[i + 1]); if (rc) { BXE_PRINTF( @@ -1393,11 +1433,8 @@ bxe_interrupt_attach(struct bxe_softc *sc) } #if __FreeBSD_version >= 800504 - bus_describe_intr(sc->dev, - sc->bxe_msix_res[i + 1], - sc->bxe_msix_tag[i + 1], - "fp[%02d]", - i); + bus_describe_intr(sc->dev, sc->bxe_msix_res[i + 1], + sc->bxe_msix_tag[i + 1], "fp[%02d]", i); #endif /* Bind the fastpath instance to a CPU. */ @@ -1409,13 +1446,13 @@ bxe_interrupt_attach(struct bxe_softc *sc) #ifdef BXE_TASK TASK_INIT(&fp->task, 0, bxe_task_fp, fp); fp->tq = taskqueue_create_fast("bxe_fpq", M_NOWAIT, - taskqueue_thread_enqueue, &fp->tq); + taskqueue_thread_enqueue, &fp->tq); taskqueue_start_threads(&fp->tq, 1, PI_NET, "%s fpq", - device_get_nameunit(sc->dev)); + device_get_nameunit(sc->dev)); #endif fp->state = BXE_FP_STATE_IRQ; } - } else if (sc->bxe_flags & BXE_USING_MSI_FLAG) { + } else if (sc->msi_count > 0) { DBPRINT(sc, (BXE_VERBOSE_LOAD | BXE_VERBOSE_INTR), "%s(): Enabling slowpath MSI[0] vector.\n", __FUNCTION__); @@ -1424,12 +1461,8 @@ bxe_interrupt_attach(struct bxe_softc *sc) * instance to the interrupt handler for the slowpath. */ rc = bus_setup_intr(sc->dev,sc->bxe_msi_res[0], - INTR_TYPE_NET | INTR_MPSAFE, - NULL, - bxe_intr_sp, - sc, - &sc->bxe_msi_tag[0] - ); + INTR_TYPE_NET | INTR_MPSAFE, NULL, bxe_intr_sp, + sc, &sc->bxe_msi_tag[0]); if (rc) { BXE_PRINTF( @@ -1439,10 +1472,8 @@ bxe_interrupt_attach(struct bxe_softc *sc) } #if __FreeBSD_version >= 800504 - bus_describe_intr(sc->dev, - sc->bxe_msi_res[0], - sc->bxe_msi_tag[0], - "sp"); + bus_describe_intr(sc->dev, sc->bxe_msi_res[0], + sc->bxe_msi_tag[0], "sp"); #endif /* Now initialize the fastpath vectors. */ @@ -1457,14 +1488,9 @@ bxe_interrupt_attach(struct bxe_softc *sc) * fastpath context to the interrupt handler in this * case. */ - rc = bus_setup_intr(sc->dev, - sc->bxe_msi_res[i + 1], - INTR_TYPE_NET | INTR_MPSAFE, - NULL, - bxe_intr_fp, - fp, - &sc->bxe_msi_tag[i + 1] - ); + rc = bus_setup_intr(sc->dev, sc->bxe_msi_res[i + 1], + INTR_TYPE_NET | INTR_MPSAFE, NULL, bxe_intr_fp, + fp, &sc->bxe_msi_tag[i + 1]); if (rc) { BXE_PRINTF( @@ -1474,19 +1500,16 @@ bxe_interrupt_attach(struct bxe_softc *sc) } #if __FreeBSD_version >= 800504 - bus_describe_intr(sc->dev, - sc->bxe_msi_res[i + 1], - sc->bxe_msi_tag[i + 1], - "fp[%02d]", - i); + bus_describe_intr(sc->dev, sc->bxe_msi_res[i + 1], + sc->bxe_msi_tag[i + 1], "fp[%02d]", i); #endif #ifdef BXE_TASK TASK_INIT(&fp->task, 0, bxe_task_fp, fp); fp->tq = taskqueue_create_fast("bxe_fpq", M_NOWAIT, - taskqueue_thread_enqueue, &fp->tq); + taskqueue_thread_enqueue, &fp->tq); taskqueue_start_threads(&fp->tq, 1, PI_NET, "%s fpq", - device_get_nameunit(sc->dev)); + device_get_nameunit(sc->dev)); #endif } @@ -1495,23 +1518,19 @@ bxe_interrupt_attach(struct bxe_softc *sc) fp = &sc->fp[0]; #endif DBPRINT(sc, (BXE_VERBOSE_LOAD | BXE_VERBOSE_INTR), - "%s(): Enabling INTx interrupts.\n", __FUNCTION__); + "%s(): Enabling INTx interrupts.\n", __FUNCTION__); /* * Setup the interrupt handler. Note that we pass the * driver instance to the interrupt handler which * will handle both the slowpath and fastpath. */ - rc = bus_setup_intr(sc->dev,sc->bxe_irq_res, - INTR_TYPE_NET | INTR_MPSAFE, - NULL, - bxe_intr_legacy, - sc, - &sc->bxe_irq_tag); + rc = bus_setup_intr(sc->dev,sc->bxe_irq_res, INTR_TYPE_NET | + INTR_MPSAFE, NULL, bxe_intr_legacy, sc, &sc->bxe_irq_tag); if (rc) { BXE_PRINTF("%s(%d): Failed to allocate interrupt!\n", - __FILE__, __LINE__); + __FILE__, __LINE__); goto bxe_interrupt_attach_exit; } #ifdef BXE_TASK @@ -1616,56 +1635,78 @@ bxe_probe_pci_caps(struct bxe_softc *sc) DBEXIT(BXE_EXTREME_LOAD); } +/* + * Setup firmware pointers for BCM57710. + * + * Returns: + * None + */ static void bxe_init_e1_firmware(struct bxe_softc *sc) { - INIT_OPS(sc) = (struct raw_op *)init_ops_e1; - INIT_DATA(sc) = (const uint32_t *)init_data_e1; - INIT_OPS_OFFSETS(sc) = (const uint16_t *)init_ops_offsets_e1; - INIT_TSEM_INT_TABLE_DATA(sc) = tsem_int_table_data_e1; - INIT_TSEM_PRAM_DATA(sc) = tsem_pram_data_e1; - INIT_USEM_INT_TABLE_DATA(sc) = usem_int_table_data_e1; - INIT_USEM_PRAM_DATA(sc) = usem_pram_data_e1; - INIT_XSEM_INT_TABLE_DATA(sc) = xsem_int_table_data_e1; - INIT_XSEM_PRAM_DATA(sc) = xsem_pram_data_e1; - INIT_CSEM_INT_TABLE_DATA(sc) = csem_int_table_data_e1; - INIT_CSEM_PRAM_DATA(sc) = csem_pram_data_e1; + INIT_OPS(sc) = (struct raw_op *)init_ops_e1; + INIT_DATA(sc) = (const uint32_t *)init_data_e1; + INIT_OPS_OFFSETS(sc) = (const uint16_t *)init_ops_offsets_e1; + INIT_TSEM_INT_TABLE_DATA(sc) = tsem_int_table_data_e1; + INIT_TSEM_PRAM_DATA(sc) = tsem_pram_data_e1; + INIT_USEM_INT_TABLE_DATA(sc) = usem_int_table_data_e1; + INIT_USEM_PRAM_DATA(sc) = usem_pram_data_e1; + INIT_XSEM_INT_TABLE_DATA(sc) = xsem_int_table_data_e1; + INIT_XSEM_PRAM_DATA(sc) = xsem_pram_data_e1; + INIT_CSEM_INT_TABLE_DATA(sc) = csem_int_table_data_e1; + INIT_CSEM_PRAM_DATA(sc) = csem_pram_data_e1; } +/* + * Setup firmware pointers for BCM57711. + * + * Returns: + * None + */ static void bxe_init_e1h_firmware(struct bxe_softc *sc) { - INIT_OPS(sc) = (struct raw_op *)init_ops_e1h; - INIT_DATA(sc) = (const uint32_t *)init_data_e1h; - INIT_OPS_OFFSETS(sc) = (const uint16_t *)init_ops_offsets_e1h; - INIT_TSEM_INT_TABLE_DATA(sc) = tsem_int_table_data_e1h; - INIT_TSEM_PRAM_DATA(sc) = tsem_pram_data_e1h; - INIT_USEM_INT_TABLE_DATA(sc) = usem_int_table_data_e1h; - INIT_USEM_PRAM_DATA(sc) = usem_pram_data_e1h; - INIT_XSEM_INT_TABLE_DATA(sc) = xsem_int_table_data_e1h; - INIT_XSEM_PRAM_DATA(sc) = xsem_pram_data_e1h; - INIT_CSEM_INT_TABLE_DATA(sc) = csem_int_table_data_e1h; - INIT_CSEM_PRAM_DATA(sc) = csem_pram_data_e1h; + INIT_OPS(sc) = (struct raw_op *)init_ops_e1h; + INIT_DATA(sc) = (const uint32_t *)init_data_e1h; + INIT_OPS_OFFSETS(sc) = (const uint16_t *)init_ops_offsets_e1h; + INIT_TSEM_INT_TABLE_DATA(sc) = tsem_int_table_data_e1h; + INIT_TSEM_PRAM_DATA(sc) = tsem_pram_data_e1h; + INIT_USEM_INT_TABLE_DATA(sc) = usem_int_table_data_e1h; + INIT_USEM_PRAM_DATA(sc) = usem_pram_data_e1h; + INIT_XSEM_INT_TABLE_DATA(sc) = xsem_int_table_data_e1h; + INIT_XSEM_PRAM_DATA(sc) = xsem_pram_data_e1h; + INIT_CSEM_INT_TABLE_DATA(sc) = csem_int_table_data_e1h; + INIT_CSEM_PRAM_DATA(sc) = csem_pram_data_e1h; } +/* + * Sets up pointers for loading controller firmware. + * + * Returns: + * 0 = Success, !0 = Failure + */ static int bxe_init_firmware(struct bxe_softc *sc) { + int rc; + + rc = 0; + if (CHIP_IS_E1(sc)) bxe_init_e1_firmware(sc); else if (CHIP_IS_E1H(sc)) bxe_init_e1h_firmware(sc); else { - BXE_PRINTF("%s(%d): Unsupported chip revision\n", + BXE_PRINTF("%s(%d): No firmware to support chip revision!\n", __FILE__, __LINE__); - return (ENXIO); + rc = ENXIO; } - return (0); -} + return (rc); +} static void -bxe_set_tunables(struct bxe_softc *sc) +bxe_tunables_set(struct bxe_softc *sc) { /* * Get our starting point for interrupt mode/number of queues. @@ -1724,15 +1765,7 @@ bxe_set_tunables(struct bxe_softc *sc) "%s(): Requested: int_mode = %d, multi_mode = %d num_queues = %d\n", __FUNCTION__, sc->int_mode, sc->multi_mode, sc->num_queues); - /* Set transparent packet aggregation (TPA), aka LRO, flag. */ - if (bxe_tpa_enable!= FALSE) - sc->bxe_flags |= BXE_TPA_ENABLE_FLAG; - - /* Capture the stats enable/disable setting. */ - if (bxe_stats_enable == FALSE) - sc->stats_enable = FALSE; - else - sc->stats_enable = TRUE; + sc->stats_enable = TRUE; /* Select the host coalescing tick count values (limit values). */ if (bxe_tx_ticks > 100) { @@ -1766,11 +1799,13 @@ bxe_set_tunables(struct bxe_softc *sc) /* + * Allocates PCI resources from OS. + * * Returns: * 0 = Success, !0 = Failure */ static int -bxe_alloc_pci_resources(struct bxe_softc *sc) +bxe_pci_resources_alloc(struct bxe_softc *sc) { int rid, rc = 0; @@ -1782,32 +1817,32 @@ bxe_alloc_pci_resources(struct bxe_softc *sc) * processor memory. */ rid = PCIR_BAR(0); - sc->bxe_res = bus_alloc_resource_any( - sc->dev, SYS_RES_MEMORY, &rid, RF_ACTIVE); + sc->bxe_res = bus_alloc_resource_any(sc->dev, + SYS_RES_MEMORY, &rid, RF_ACTIVE); if (sc->bxe_res == NULL) { BXE_PRINTF("%s(%d):PCI BAR0 memory allocation failed\n", __FILE__, __LINE__); rc = ENXIO; - goto bxe_alloc_pci_resources_exit; + goto bxe_pci_resources_alloc_exit; } /* Get OS resource handles for BAR0 memory. */ - sc->bxe_btag = rman_get_bustag(sc->bxe_res); - sc->bxe_bhandle = rman_get_bushandle(sc->bxe_res); - sc->bxe_vhandle = (vm_offset_t) rman_get_virtual(sc->bxe_res); + sc->bxe_btag = rman_get_bustag(sc->bxe_res); + sc->bxe_bhandle = rman_get_bushandle(sc->bxe_res); + sc->bxe_vhandle = (vm_offset_t) rman_get_virtual(sc->bxe_res); /* * Allocate PCI memory resources for BAR2. * Doorbell (DB) memory. */ rid = PCIR_BAR(2); - sc->bxe_db_res = bus_alloc_resource_any( - sc->dev, SYS_RES_MEMORY, &rid, RF_ACTIVE); + sc->bxe_db_res = bus_alloc_resource_any(sc->dev, + SYS_RES_MEMORY, &rid, RF_ACTIVE); if (sc->bxe_db_res == NULL) { BXE_PRINTF("%s(%d): PCI BAR2 memory allocation failed\n", __FILE__, __LINE__); rc = ENXIO; - goto bxe_alloc_pci_resources_exit; + goto bxe_pci_resources_alloc_exit; } /* Get OS resource handles for BAR2 memory. */ @@ -1815,45 +1850,52 @@ bxe_alloc_pci_resources(struct bxe_softc *sc) sc->bxe_db_bhandle = rman_get_bushandle(sc->bxe_db_res); sc->bxe_db_vhandle = (vm_offset_t) rman_get_virtual(sc->bxe_db_res); -bxe_alloc_pci_resources_exit: +bxe_pci_resources_alloc_exit: DBEXIT(BXE_VERBOSE_LOAD); - return(rc); + return (rc); } /* + * Frees PCI resources allocated in bxe_pci_resources_alloc(). + * * Returns: * None */ static void -bxe_release_pci_resources(struct bxe_softc *sc) +bxe_pci_resources_free(struct bxe_softc *sc) { + DBENTER(BXE_VERBOSE_UNLOAD); + /* Release the PCIe BAR0 mapped memory. */ if (sc->bxe_res != NULL) { - DBPRINT(sc, (BXE_VERBOSE_LOAD | BXE_VERBOSE_RESET), - "%s(): Releasing PCI BAR0 memory.\n", __FUNCTION__); - bus_release_resource(sc->dev, - SYS_RES_MEMORY, PCIR_BAR(0), sc->bxe_res); + bus_release_resource(sc->dev, SYS_RES_MEMORY, + PCIR_BAR(0), sc->bxe_res); } /* Release the PCIe BAR2 (doorbell) mapped memory. */ if (sc->bxe_db_res != NULL) { - DBPRINT(sc, (BXE_VERBOSE_LOAD | BXE_VERBOSE_RESET), - "%s(): Releasing PCI BAR2 memory.\n", __FUNCTION__); - bus_release_resource(sc->dev, - SYS_RES_MEMORY, PCIR_BAR(2), sc->bxe_db_res); + bus_release_resource(sc->dev, SYS_RES_MEMORY, + PCIR_BAR(2), sc->bxe_db_res); } + + DBENTER(BXE_VERBOSE_UNLOAD); } /* + * Determines the media reported to the OS by examining + * the installed PHY type. + * * Returns: * 0 = Success, !0 = Failure */ static int bxe_media_detect(struct bxe_softc *sc) { - int rc = 0; + int rc; + + rc = 0; /* Identify supported media based on the PHY type. */ switch (XGXS_EXT_PHY_TYPE(sc->link_params.ext_phy_config)) { @@ -1887,8 +1929,6 @@ bxe_media_detect(struct bxe_softc *sc) case PORT_HW_CFG_XGXS_EXT_PHY_TYPE_FAILURE: case PORT_HW_CFG_XGXS_EXT_PHY_TYPE_NOT_CONN: default: - BXE_PRINTF("%s(%d): PHY not supported by driver!\n", - __FILE__, __LINE__); sc->media = 0; rc = ENODEV; } @@ -1915,7 +1955,7 @@ bxe_attach(device_t dev) int rc; sc = device_get_softc(dev); - DBENTER(BXE_VERBOSE_LOAD | BXE_VERBOSE_RESET); + DBENTER(BXE_INFO_LOAD | BXE_INFO_RESET); sc->dev = dev; sc->bxe_unit = device_get_unit(dev); @@ -1923,18 +1963,34 @@ bxe_attach(device_t dev) sc->bxe_flags = 0; sc->state = BXE_STATE_CLOSED; rc = 0; - bxe_set_tunables(sc); - bxe_alloc_mutexes(sc); + DBPRINT(sc, BXE_FATAL, "%s(): ************************\n", + __FUNCTION__); + DBPRINT(sc, BXE_FATAL, "%s(): ** Debug mode enabled **\n", + __FUNCTION__); + DBPRINT(sc, BXE_FATAL, "%s(): ************************\n", + __FUNCTION__); + DBPRINT(sc, BXE_FATAL, "%s(): sc vaddr = 0x%08X:%08X\n", + __FUNCTION__, (uint32_t) U64_HI(sc), (uint32_t) U64_LO(sc)); + + /* Get the user configurable values for driver load. */ + bxe_tunables_set(sc); - /* Prepare the tick routine. */ - callout_init(&sc->bxe_tick_callout, CALLOUT_MPSAFE); + bxe_mutexes_alloc(sc); + + /* Prepare tick routine. */ + callout_init_mtx(&sc->bxe_tick_callout, &sc->bxe_core_mtx, 0); /* Enable bus master capability */ pci_enable_busmaster(dev); - if ((rc = bxe_alloc_pci_resources(sc)) != 0) + /* Enable PCI BAR mapped memory for register access. */ + rc = bxe_pci_resources_alloc(sc); + if (rc != 0) { + BXE_PRINTF("%s(%d): Error allocating PCI resources!\n", + __FILE__, __LINE__); goto bxe_attach_fail; + } /* Put indirect address registers into a sane state. */ pci_write_config(sc->dev, PCICFG_GRC_ADDRESS, @@ -1945,19 +2001,26 @@ bxe_attach(device_t dev) REG_WR(sc, PXP2_REG_PGL_ADDR_94_F0 + BP_PORT(sc) * 16, 0); /* Get hardware info from shared memory and validate data. */ - if (bxe_get_function_hwinfo(sc)) { + rc = bxe_hwinfo_function_get(sc); + if (rc != 0) { DBPRINT(sc, BXE_WARN, "%s(): Failed to get hardware info!\n", __FUNCTION__); - rc = ENODEV; goto bxe_attach_fail; } /* Setup supported media options. */ - if ((rc = bxe_media_detect(sc)) != 0) + rc = bxe_media_detect(sc); + if (rc != 0) { + BXE_PRINTF("%s(%d): Unknown media (PHY) type!\n", + __FILE__, __LINE__); goto bxe_attach_fail; + } + /* Interface entrypoint for media type/status reporting. */ ifmedia_init(&sc->bxe_ifmedia, IFM_IMASK, bxe_ifmedia_upd, bxe_ifmedia_status); + + /* Default interface values. */ ifmedia_add(&sc->bxe_ifmedia, IFM_ETHER | sc->media | IFM_FDX, 0, NULL); ifmedia_add(&sc->bxe_ifmedia, @@ -1967,38 +2030,37 @@ bxe_attach(device_t dev) sc->bxe_ifmedia.ifm_media = sc->bxe_ifmedia.ifm_cur->ifm_media; - /* Set init arrays */ + /* Setup firmware arrays (firmware load comes later). */ rc = bxe_init_firmware(sc); if (rc) { - BXE_PRINTF("%s(%d): Error loading firmware\n", + BXE_PRINTF("%s(%d): Error preparing firmware load!\n", __FILE__, __LINE__); goto bxe_attach_fail; } - #ifdef BXE_DEBUG /* Allocate a memory buffer for grcdump output.*/ sc->grcdump_buffer = malloc(BXE_GRCDUMP_BUF_SIZE, M_TEMP, M_NOWAIT); if (sc->grcdump_buffer == NULL) { - /* Failure is OK, just print a message and continue attach. */ BXE_PRINTF("%s(%d): Failed to allocate grcdump memory " "buffer!\n", __FILE__, __LINE__); + rc = ENOBUFS; } #endif /* Check that NVRAM contents are valid.*/ - if (bxe_nvram_test(sc)) { + rc = bxe_nvram_test(sc); + if (rc != 0) { BXE_PRINTF("%s(%d): Failed NVRAM test!\n", __FILE__, __LINE__); - rc = ENODEV; goto bxe_attach_fail; } /* Allocate the appropriate interrupts.*/ - if (bxe_interrupt_allocate(sc)) { + rc = bxe_interrupt_alloc(sc); + if (rc != 0) { BXE_PRINTF("%s(%d): Interrupt allocation failed!\n", __FILE__, __LINE__); - rc = ENODEV; goto bxe_attach_fail; } @@ -2016,7 +2078,7 @@ bxe_attach(device_t dev) } /* Check if PXE/UNDI is still active and unload it. */ - if (!BP_NOMCP(sc)) + if (!NOMCP(sc)) bxe_undi_unload(sc); /* @@ -2032,6 +2094,7 @@ bxe_attach(device_t dev) sc->rx_ring_size = USABLE_RX_BD; /* Assume receive IP/TCP/UDP checksum is enabled. */ + /* ToDo: Change when IOCTL changes checksum offload? */ sc->rx_csum = 1; /* Disable WoL. */ @@ -2041,10 +2104,10 @@ bxe_attach(device_t dev) sc->mbuf_alloc_size = MCLBYTES; /* Allocate DMA memory resources. */ - if (bxe_dma_alloc(sc->dev)) { + rc = bxe_host_structures_alloc(sc->dev); + if (rc != 0) { BXE_PRINTF("%s(%d): DMA memory allocation failed!\n", __FILE__, __LINE__); - rc = ENOMEM; goto bxe_attach_fail; } @@ -2060,10 +2123,13 @@ bxe_attach(device_t dev) /* Initialize the FreeBSD ifnet interface. */ ifp->if_softc = sc; if_initname(ifp, device_get_name(dev), device_get_unit(dev)); + + /* Written by driver before attach, read-only afterwards. */ ifp->if_flags = IFF_BROADCAST | IFF_SIMPLEX | IFF_MULTICAST; + + /* Driver entrypoints from the network interface. */ ifp->if_ioctl = bxe_ioctl; ifp->if_start = bxe_tx_start; - #if __FreeBSD_version >= 800000 ifp->if_transmit = bxe_tx_mq_start; ifp->if_qflush = bxe_mq_flush; @@ -2077,10 +2143,8 @@ bxe_attach(device_t dev) ifp->if_mtu = ETHERMTU; ifp->if_hwassist = BXE_IF_HWASSIST; ifp->if_capabilities = BXE_IF_CAPABILITIES; - if (TPA_ENABLED(sc)) { - ifp->if_capabilities |= IFCAP_LRO; - } - ifp->if_capenable = ifp->if_capabilities; + /* TPA not enabled by default. */ + ifp->if_capenable = BXE_IF_CAPABILITIES & ~IFCAP_LRO; ifp->if_baudrate = IF_Gbps(10UL); ifp->if_snd.ifq_drv_maxlen = sc->tx_ring_size; @@ -2092,7 +2156,8 @@ bxe_attach(device_t dev) ether_ifattach(ifp, sc->link_params.mac_addr); /* Attach the interrupts to the interrupt handlers. */ - if (bxe_interrupt_attach(sc)) { + rc = bxe_interrupt_attach(sc); + if (rc != 0) { BXE_PRINTF("%s(%d): Interrupt allocation failed!\n", __FILE__, __LINE__); goto bxe_attach_fail; @@ -2108,8 +2173,8 @@ bxe_attach_fail: if (rc != 0) bxe_detach(dev); - DBEXIT(BXE_VERBOSE_LOAD | BXE_VERBOSE_RESET); - return(rc); + DBEXIT(BXE_INFO_LOAD | BXE_INFO_RESET); + return (rc); } @@ -2593,7 +2658,7 @@ bxe_link_settings_requested_exit: * 0 = Success, !0 = Failure */ static int -bxe_get_function_hwinfo(struct bxe_softc *sc) +bxe_hwinfo_function_get(struct bxe_softc *sc) { uint32_t mac_hi, mac_lo, val; int func, rc; @@ -2604,7 +2669,7 @@ bxe_get_function_hwinfo(struct bxe_softc *sc) func = BP_FUNC(sc); /* Get the common hardware configuration first. */ - bxe_get_common_hwinfo(sc); + bxe_hwinfo_common_get(sc); /* Assume no outer VLAN/multi-function support. */ sc->e1hov = sc->e1hmf = 0; @@ -2621,13 +2686,13 @@ bxe_get_function_hwinfo(struct bxe_softc *sc) } else { if (BP_E1HVN(sc)) { rc = EPERM; - goto bxe_get_function_hwinfo_exit; + goto bxe_hwinfo_function_get_exit; } } } - if (!BP_NOMCP(sc)) { - bxe_get_port_hwinfo(sc); + if (!NOMCP(sc)) { + bxe_hwinfo_port_get(sc); sc->fw_seq = SHMEM_RD(sc, func_mb[func].drv_mb_header) & DRV_MSG_SEQ_NUMBER_MASK; } @@ -2636,7 +2701,7 @@ bxe_get_function_hwinfo(struct bxe_softc *sc) /* * Fetch the factory configured MAC address for multi function * devices. If this is not a multi-function device then the MAC - * address was already read in the bxe_get_port_hwinfo() routine. + * address was already read in the bxe_hwinfo_port_get() routine. * The MAC addresses used by the port are not the same as the MAC * addressed used by the function. */ @@ -2647,6 +2712,7 @@ bxe_get_function_hwinfo(struct bxe_softc *sc) if ((mac_lo == 0) && (mac_hi == 0)) { BXE_PRINTF("%s(%d): Invalid Ethernet address!\n", __FILE__, __LINE__); + rc = ENODEV; } else { sc->link_params.mac_addr[0] = (u_char)(mac_hi >> 8); sc->link_params.mac_addr[1] = (u_char)(mac_hi); @@ -2658,9 +2724,9 @@ bxe_get_function_hwinfo(struct bxe_softc *sc) } -bxe_get_function_hwinfo_exit: +bxe_hwinfo_function_get_exit: DBEXIT(BXE_VERBOSE_LOAD); - return(rc); + return (rc); } @@ -2674,15 +2740,16 @@ bxe_get_function_hwinfo_exit: * for future use. * * Returns: - * None + * 0 = Success, !0 = Failure */ -static void -bxe_get_port_hwinfo(struct bxe_softc *sc) +static int +bxe_hwinfo_port_get(struct bxe_softc *sc) { - int i, port; + int i, port, rc; uint32_t val, mac_hi, mac_lo; DBENTER(BXE_VERBOSE_LOAD); + rc = 0; port = BP_PORT(sc); sc->link_params.sc = sc; @@ -2736,6 +2803,7 @@ bxe_get_port_hwinfo(struct bxe_softc *sc) if (mac_lo == 0 && mac_hi == 0) { BXE_PRINTF("%s(%d): No Ethernet address programmed on the " "controller!\n", __FILE__, __LINE__); + rc = ENODEV; } else { sc->link_params.mac_addr[0] = (u_char)(mac_hi >> 8); sc->link_params.mac_addr[1] = (u_char)(mac_hi); @@ -2746,6 +2814,7 @@ bxe_get_port_hwinfo(struct bxe_softc *sc) } DBEXIT(BXE_VERBOSE_LOAD); + return (rc); } @@ -2753,17 +2822,22 @@ bxe_get_port_hwinfo(struct bxe_softc *sc) * Get common hardware configuration. * * Multiple port devices such as the BCM57710 have configuration - * information that is specific to each Ethernet port of the controller. + * information that is shared between all ports of the Ethernet + * controller. This function reads that configuration + * information from the bootcode's shared memory and saves it + * for future use. * * Returns: - * None + * 0 = Success, !0 = Failure */ -static void -bxe_get_common_hwinfo(struct bxe_softc *sc) +static int +bxe_hwinfo_common_get(struct bxe_softc *sc) { uint32_t val; + int rc; DBENTER(BXE_VERBOSE_LOAD); + rc = 0; /* Get the chip revision. */ sc->common.chip_id = sc->link_params.chip_id = @@ -2806,10 +2880,12 @@ bxe_get_common_hwinfo(struct bxe_softc *sc) (sc->common.shmem_base < 0xA0000) || (sc->common.shmem_base > 0xC0000)) { - DBPRINT(sc, BXE_FATAL, "%s(): MCP is not active!\n", - __FUNCTION__); + BXE_PRINTF("%s(%d): MCP is not active!\n", + __FILE__, __LINE__); + /* ToDo: Remove the NOMCP support. */ sc->bxe_flags |= BXE_NO_MCP_FLAG; - goto bxe_get_common_hwinfo_exit; + rc = ENODEV; + goto bxe_hwinfo_common_get_exit; } /* Make sure the shared memory contents are valid. */ @@ -2818,7 +2894,8 @@ bxe_get_common_hwinfo(struct bxe_softc *sc) (SHR_MEM_VALIDITY_DEV_INFO | SHR_MEM_VALIDITY_MB)) { BXE_PRINTF("%s(%d): Invalid NVRAM! Bad validity " "signature.\n", __FILE__, __LINE__); - goto bxe_get_common_hwinfo_exit; + rc = ENODEV; + goto bxe_hwinfo_common_get_exit; } /* Read the device configuration from shared memory. */ @@ -2854,11 +2931,13 @@ bxe_get_common_hwinfo(struct bxe_softc *sc) BXE_PRINTF("%s(%d): Warning: This driver needs bootcode " "0x%08X but found 0x%08X, please upgrade!\n", __FILE__, __LINE__, MIN_BXE_BC_VER, sc->common.bc_ver); - goto bxe_get_common_hwinfo_exit; + rc = ENODEV; + goto bxe_hwinfo_common_get_exit; } -bxe_get_common_hwinfo_exit: +bxe_hwinfo_common_get_exit: DBEXIT(BXE_VERBOSE_LOAD); + return (rc); } @@ -2979,51 +3058,45 @@ bxe_undi_unload(struct bxe_softc *sc) * Stops the controller, resets the controller, and releases resources. * * Returns: - * 0 on success, positive value on failure. + * 0 on success, !0 = failure. */ static int bxe_detach(device_t dev) { struct bxe_softc *sc; struct ifnet *ifp; -#ifdef BXE_TASK - struct bxe_fastpath *fp; - int i; -#endif + int rc; sc = device_get_softc(dev); - DBENTER(BXE_VERBOSE_RESET); + DBENTER(BXE_INFO_UNLOAD); + + rc = 0; ifp = sc->bxe_ifp; if (ifp != NULL && ifp->if_vlantrunk != NULL) { BXE_PRINTF("%s(%d): Cannot detach while VLANs are in use.\n", __FILE__, __LINE__); - return(EBUSY); + rc = EBUSY; + goto bxe_detach_exit; } /* Stop and reset the controller if it was open. */ if (sc->state != BXE_STATE_CLOSED) { BXE_CORE_LOCK(sc); - bxe_stop_locked(sc, UNLOAD_CLOSE); + rc = bxe_stop_locked(sc, UNLOAD_CLOSE); BXE_CORE_UNLOCK(sc); } -#ifdef BXE_TASK - /* Free the OS taskqueue resources. */ - for (i = 0; i < sc->num_queues; i++) { - fp = &sc->fp[i]; +#ifdef BXE_DEBUG + /* Free memory buffer for grcdump output.*/ + if (sc->grcdump_buffer != NULL) + free(sc->grcdump_buffer, M_TEMP); +#endif - if (fp->tq) { - taskqueue_drain(fp->tq, &fp->task); - taskqueue_free(fp->tq); - } - } + /* Clean-up any remaining interrupt resources. */ + bxe_interrupt_detach(sc); + bxe_interrupt_free(sc); - if (sc->tq) { - taskqueue_drain(sc->tq, &sc->task); - taskqueue_free(sc->tq); - } -#endif /* Release the network interface. */ if (ifp != NULL) ether_ifdetach(ifp); @@ -3031,8 +3104,15 @@ bxe_detach(device_t dev) /* Release all remaining resources. */ bxe_release_resources(sc); + + /* Free all PCI resources. */ + bxe_pci_resources_free(sc); pci_disable_busmaster(dev); + bxe_mutexes_free(sc); + +bxe_detach_exit: + DBEXIT(BXE_INFO_UNLOAD); return(0); } @@ -3079,9 +3159,8 @@ bxe_stop_leading(struct bxe_softc *sc) uint16_t dsb_sp_prod_idx; int rc, timeout; - DBENTER(BXE_VERBOSE_LOAD | BXE_VERBOSE_RESET | BXE_VERBOSE_RAMROD); - - DBPRINT(sc, BXE_VERBOSE_LOAD, "%s(): Stop client connection " + DBPRINT(sc, (BXE_VERBOSE_LOAD | BXE_VERBOSE_RESET | + BXE_VERBOSE_UNLOAD), "%s(): Stop client connection " "on fp[00].\n", __FUNCTION__); /* Send the ETH_HALT ramrod. */ @@ -3089,26 +3168,24 @@ bxe_stop_leading(struct bxe_softc *sc) bxe_sp_post(sc,RAMROD_CMD_ID_ETH_HALT, 0, 0, sc->fp[0].cl_id, 0); /* Poll for the ETH_HALT ramrod on the leading connection. */ - rc = bxe_wait_ramrod(sc, BXE_FP_STATE_HALTED, 0, &(sc->fp[0].state), 1); - if (rc) + rc = bxe_wait_ramrod(sc, BXE_FP_STATE_HALTED, + 0, &(sc->fp[0].state), 1); + if (rc) { + DBPRINT(sc, BXE_FATAL, "%s(): Timeout waiting for " + "STATE_HALTED ramrod completion!\n", __FUNCTION__); goto bxe_stop_leading_exit; + } + /* Get the default status block SP producer index. */ dsb_sp_prod_idx = *sc->dsb_sp_prod; - /* - * Now that the connection is in the - * HALTED state send PORT_DELETE ramrod. - */ + /* After HALT we send PORT_DELETE ramrod. */ bxe_sp_post(sc, RAMROD_CMD_ID_ETH_PORT_DEL, 0, 0, 0, 1); - /* - * Wait for completion. This can take a * long time if the other port - * is busy. Give the command some time to complete but don't wait for a - * completion since there's nothing we can do. - */ + /* Be patient but don't wait forever. */ timeout = 500; while (dsb_sp_prod_idx == *sc->dsb_sp_prod) { - if (!timeout) { + if (timeout == 0) { DBPRINT(sc, BXE_FATAL, "%s(): Timeout waiting for " "PORT_DEL ramrod completion!\n", __FUNCTION__); rc = EBUSY; @@ -3124,8 +3201,7 @@ bxe_stop_leading(struct bxe_softc *sc) sc->fp[0].state = BXE_FP_STATE_CLOSED; bxe_stop_leading_exit: - DBEXIT(BXE_VERBOSE_LOAD | BXE_VERBOSE_RESET | BXE_VERBOSE_RAMROD); - return(rc); + return (rc); } /* @@ -3140,9 +3216,8 @@ bxe_setup_multi(struct bxe_softc *sc, int index) struct bxe_fastpath *fp; int rc; - DBENTER(BXE_VERBOSE_LOAD | BXE_VERBOSE_RESET | BXE_VERBOSE_RAMROD); - - DBPRINT(sc, BXE_VERBOSE_LOAD, "%s(): Setup client connection " + DBPRINT(sc, (BXE_VERBOSE_LOAD | BXE_VERBOSE_RESET | + BXE_VERBOSE_UNLOAD), "%s(): Setup client connection " "on fp[%02d].\n", __FUNCTION__, index); fp = &sc->fp[index]; @@ -3154,10 +3229,9 @@ bxe_setup_multi(struct bxe_softc *sc, int index) bxe_sp_post(sc, RAMROD_CMD_ID_ETH_CLIENT_SETUP, index, 0, fp->cl_id, 0); /* Wait for the ramrod to complete. */ - rc = bxe_wait_ramrod(sc, BXE_FP_STATE_OPEN, index, &(fp->state), 1); + rc = bxe_wait_ramrod(sc, BXE_FP_STATE_OPEN, index, &fp->state, 1); - DBEXIT(BXE_VERBOSE_LOAD | BXE_VERBOSE_RESET | BXE_VERBOSE_RAMROD); - return(rc); + return (rc); } /* @@ -3175,9 +3249,8 @@ bxe_stop_multi(struct bxe_softc *sc, int index) struct bxe_fastpath *fp; int rc; - DBENTER(BXE_VERBOSE_LOAD | BXE_VERBOSE_RESET | BXE_VERBOSE_RAMROD); - - DBPRINT(sc, BXE_VERBOSE_LOAD, "%s(): Stop client connection " + DBPRINT(sc, (BXE_VERBOSE_LOAD | BXE_VERBOSE_RESET | + BXE_VERBOSE_UNLOAD), "%s(): Stop client connection " "on fp[%02d].\n", __FUNCTION__, index); fp = &sc->fp[index]; @@ -3186,8 +3259,8 @@ bxe_stop_multi(struct bxe_softc *sc, int index) fp->state = BXE_FP_STATE_HALTING; bxe_sp_post(sc, RAMROD_CMD_ID_ETH_HALT, index, 0, fp->cl_id, 0); - /* Wait for the ramrod completion. */ - rc = bxe_wait_ramrod(sc, BXE_FP_STATE_HALTED, index, &(fp->state), 1); + /* Wait for the HALT ramrod completion. */ + rc = bxe_wait_ramrod(sc, BXE_FP_STATE_HALTED, index, &fp->state, 1); if (rc){ BXE_PRINTF("%s(%d): fp[%02d] client ramrod halt failed!\n", __FILE__, __LINE__, index); @@ -3196,12 +3269,11 @@ bxe_stop_multi(struct bxe_softc *sc, int index) /* Delete the CFC entry. */ bxe_sp_post(sc, RAMROD_CMD_ID_ETH_CFC_DEL, index, 0, 0, 1); - /* Poll for the ramrod completion. */ - rc = bxe_wait_ramrod(sc, BXE_FP_STATE_CLOSED, index, &(fp->state), 1); + /* Poll for the DELETE ramrod completion. */ + rc = bxe_wait_ramrod(sc, BXE_FP_STATE_CLOSED, index, &fp->state, 1); bxe_stop_multi_exit: - DBEXIT(BXE_VERBOSE_LOAD | BXE_VERBOSE_RESET | BXE_VERBOSE_RAMROD); - return(rc); + return (rc); } /* @@ -3268,7 +3340,7 @@ bxe__link_reset(struct bxe_softc *sc) { DBENTER(BXE_VERBOSE_PHY); - if (!BP_NOMCP(sc)) { + if (!NOMCP(sc)) { bxe_acquire_phy_lock(sc); bxe_link_reset(&sc->link_params, &sc->link_vars, 1); bxe_release_phy_lock(sc); @@ -3285,7 +3357,7 @@ bxe__link_reset(struct bxe_softc *sc) * Stop the controller. * * Returns: - * Nothing. + * 0 = Success, !0 = Failure */ static int bxe_stop_locked(struct bxe_softc *sc, int unload_mode) @@ -3298,18 +3370,20 @@ bxe_stop_locked(struct bxe_softc *sc, int unload_mode) uint8_t entry, *mac_addr; int count, i, port, rc; - DBENTER(BXE_VERBOSE_LOAD | BXE_VERBOSE_RESET | BXE_VERBOSE_UNLOAD); + DBENTER(BXE_INFO_LOAD | BXE_INFO_RESET | BXE_INFO_UNLOAD); + ifp = sc->bxe_ifp; port = BP_PORT(sc), - reset_code = 0; - rc = 0; + rc = reset_code = 0; + + BXE_CORE_LOCK_ASSERT(sc); /* Stop the periodic tick. */ callout_stop(&sc->bxe_tick_callout); sc->state = BXE_STATE_CLOSING_WAIT4_HALT; - /* Stop receiving all types of Ethernet traffic. */ + /* Prevent any further RX traffic. */ sc->rx_mode = BXE_RX_MODE_NONE; bxe_set_storm_rx_mode(sc); @@ -3320,6 +3394,7 @@ bxe_stop_locked(struct bxe_softc *sc, int unload_mode) /* Tell the bootcode to stop watching for a heartbeat. */ SHMEM_WR(sc, func_mb[BP_FUNC(sc)].drv_pulse_mb, (DRV_PULSE_ALWAYS_ALIVE | sc->fw_drv_pulse_wr_seq)); + /* Stop the statistics updates. */ bxe_stats_handle(sc, STATS_EVENT_STOP); @@ -3327,6 +3402,9 @@ bxe_stop_locked(struct bxe_softc *sc, int unload_mode) for (i = 0; i < sc->num_queues; i++) { fp = &sc->fp[i]; + if (fp == NULL || fp->tx_pkt_cons_sb == NULL) + break; + count = 1000; while (bxe_has_tx_work(fp)) { @@ -3334,7 +3412,7 @@ bxe_stop_locked(struct bxe_softc *sc, int unload_mode) if (count == 0) { BXE_PRINTF( - "%s(%d): Timeout wating for fp[%d] transmits to complete!\n", + "%s(%d): Timeout wating for fp[%02d] transmits to complete!\n", __FILE__, __LINE__, i); break; } @@ -3351,8 +3429,8 @@ bxe_stop_locked(struct bxe_softc *sc, int unload_mode) /* Disable Interrupts */ bxe_int_disable(sc); - DELAY(1000); + /* Clear the MAC addresses. */ if (CHIP_IS_E1(sc)) { config = BXE_SP(sc, mcast_config); @@ -3376,8 +3454,10 @@ bxe_stop_locked(struct bxe_softc *sc, int unload_mode) REG_WR(sc, MC_HASH_OFFSET(sc, i), 0); REG_WR(sc, MISC_REG_E1HMF_MODE, 0); } + /* Determine if any WoL settings needed. */ if (unload_mode == UNLOAD_NORMAL) + /* Driver initiatied WoL is disabled. */ reset_code = DRV_MSG_CODE_UNLOAD_REQ_WOL_DIS; else if (sc->bxe_flags & BXE_NO_WOL_FLAG) { /* Driver initiated WoL is disabled, use OOB WoL settings. */ @@ -3398,38 +3478,29 @@ bxe_stop_locked(struct bxe_softc *sc, int unload_mode) /* Prevent WoL. */ reset_code = DRV_MSG_CODE_UNLOAD_REQ_WOL_DIS; } + /* Stop all non-leading client connections. */ for (i = 1; i < sc->num_queues; i++) { if (bxe_stop_multi(sc, i)){ goto bxe_stop_locked_exit; } } + /* Stop the leading client connection. */ rc = bxe_stop_leading(sc); - if (rc) { -#ifdef BXE_DEBUG - if ((sc->state != BXE_STATE_CLOSING_WAIT4_UNLOAD) || - (sc->fp[0].state != BXE_FP_STATE_CLOSED)) { - BXE_PRINTF("%s(%d): Failed to close leading " - "client connection!\n", __FILE__, __LINE__); - } -#endif - } - DELAY(10000); bxe_stop_locked_exit: - - if (BP_NOMCP(sc)) { + if (NOMCP(sc)) { DBPRINT(sc, BXE_INFO, - "%s(): Old No MCP load counts: %d, %d, %d\n", __FUNCTION__, - load_count[0], load_count[1], load_count[2]); + "%s(): Old No MCP load counts: %d, %d, %d\n", + __FUNCTION__, load_count[0], load_count[1], load_count[2]); load_count[0]--; load_count[1 + port]--; DBPRINT(sc, BXE_INFO, - "%s(): New No MCP load counts: %d, %d, %d\n", __FUNCTION__, - load_count[0], load_count[1], load_count[2]); + "%s(): New No MCP load counts: %d, %d, %d\n", + __FUNCTION__, load_count[0], load_count[1], load_count[2]); if (load_count[0] == 0) reset_code = FW_MSG_CODE_DRV_UNLOAD_COMMON; @@ -3454,32 +3525,31 @@ bxe_stop_locked_exit: DELAY(10000); /* Report UNLOAD_DONE to MCP */ - if (!BP_NOMCP(sc)) + if (!NOMCP(sc)) bxe_fw_command(sc, DRV_MSG_CODE_UNLOAD_DONE); sc->port.pmf = 0; /* Free RX chains and buffers. */ - bxe_free_rx_chains(sc); + bxe_clear_rx_chains(sc); /* Free TX chains and buffers. */ - bxe_free_tx_chains(sc); + bxe_clear_tx_chains(sc); sc->state = BXE_STATE_CLOSED; bxe_ack_int(sc); - DBEXIT(BXE_VERBOSE_LOAD | BXE_VERBOSE_RESET |BXE_VERBOSE_UNLOAD); - return(rc); + DBEXIT(BXE_INFO_LOAD | BXE_INFO_RESET |BXE_INFO_UNLOAD); + return (rc); } - /* * Device shutdown function. * * Stops and resets the controller. * * Returns: - * Nothing + * 0 = Success, !0 = Failure */ static int bxe_shutdown(device_t dev) @@ -3487,13 +3557,13 @@ bxe_shutdown(device_t dev) struct bxe_softc *sc; sc = device_get_softc(dev); - DBENTER(BXE_VERBOSE_LOAD | BXE_VERBOSE_RESET | BXE_VERBOSE_UNLOAD); + DBENTER(BXE_INFO_LOAD | BXE_INFO_RESET | BXE_INFO_UNLOAD); BXE_CORE_LOCK(sc); bxe_stop_locked(sc, UNLOAD_NORMAL); BXE_CORE_UNLOCK(sc); - DBEXIT(BXE_VERBOSE_LOAD | BXE_VERBOSE_RESET | BXE_VERBOSE_UNLOAD); + DBEXIT(BXE_INFO_LOAD | BXE_INFO_RESET | BXE_INFO_UNLOAD); return (0); } @@ -3571,7 +3641,9 @@ bxe__link_status_update(struct bxe_softc *sc) bxe_stats_handle(sc, STATS_EVENT_LINK_UP); else bxe_stats_handle(sc, STATS_EVENT_STOP); + bxe_read_mf_cfg(sc); + /* Indicate link status. */ bxe_link_report(sc); @@ -3630,7 +3702,7 @@ bxe_initial_phy_init(struct bxe_softc *sc) DBENTER(BXE_VERBOSE_PHY); rc = 0; - if (!BP_NOMCP(sc)) { + if (!NOMCP(sc)) { /* * It is recommended to turn off RX flow control for 5771x @@ -3646,6 +3718,7 @@ bxe_initial_phy_init(struct bxe_softc *sc) bxe_release_phy_lock(sc); bxe_calc_fc_adv(sc); + if (sc->link_vars.link_up) { bxe_stats_handle(sc,STATS_EVENT_LINK_UP); bxe_link_report(sc); @@ -3673,9 +3746,10 @@ static int bxe_alloc_buf_rings(struct bxe_softc *sc) { struct bxe_fastpath *fp; - int i, rc = 0; + int i, rc; DBENTER(BXE_VERBOSE_LOAD); + rc = 0; for (i = 0; i < sc->num_queues; i++) { fp = &sc->fp[i]; @@ -3685,14 +3759,15 @@ bxe_alloc_buf_rings(struct bxe_softc *sc) M_DEVBUF, M_DONTWAIT, &fp->mtx); if (fp->br == NULL) { rc = ENOMEM; - return(rc); + goto bxe_alloc_buf_rings_exit; } } else BXE_PRINTF("%s(%d): Bug!\n", __FILE__, __LINE__); } +bxe_alloc_buf_rings_exit: DBEXIT(BXE_VERBOSE_LOAD); - return(rc); + return (rc); } /* @@ -3737,9 +3812,9 @@ bxe_init_locked(struct bxe_softc *sc, int load_mode) { struct ifnet *ifp; uint32_t load_code; - int i, port; + int error, i, port; - DBENTER(BXE_VERBOSE_LOAD | BXE_VERBOSE_RESET); + DBENTER(BXE_INFO_LOAD | BXE_INFO_RESET); BXE_CORE_LOCK_ASSERT(sc); @@ -3753,7 +3828,7 @@ bxe_init_locked(struct bxe_softc *sc, int load_mode) /* Check if the driver is still running and bail out if it is. */ if (ifp->if_drv_flags & IFF_DRV_RUNNING) { - DBPRINT(sc, BXE_INFO, + DBPRINT(sc, BXE_WARN, "%s(): Init called while driver is running!\n", __FUNCTION__); goto bxe_init_locked_exit; @@ -3770,7 +3845,7 @@ bxe_init_locked(struct bxe_softc *sc, int load_mode) */ sc->state = BXE_STATE_OPENING_WAIT4_LOAD; - if (BP_NOMCP(sc)) { + if (NOMCP(sc)) { port = BP_PORT(sc); DBPRINT(sc, BXE_INFO, @@ -3817,7 +3892,8 @@ bxe_init_locked(struct bxe_softc *sc, int load_mode) sc->intr_sem = 1; /* Initialize hardware. */ - if (bxe_init_hw(sc, load_code)){ + error = bxe_init_hw(sc, load_code); + if (error != 0){ BXE_PRINTF("%s(%d): Hardware initialization failed, " "aborting!\n", __FILE__, __LINE__); goto bxe_init_locked_failed1; @@ -3826,6 +3902,7 @@ bxe_init_locked(struct bxe_softc *sc, int load_mode) /* Calculate and save the Ethernet MTU size. */ sc->port.ether_mtu = ifp->if_mtu + ETHER_HDR_LEN + (ETHER_VLAN_ENCAP_LEN * 2) + ETHER_CRC_LEN + 4; + DBPRINT(sc, BXE_INFO, "%s(): Setting MTU = %d\n", __FUNCTION__, sc->port.ether_mtu); @@ -3836,12 +3913,18 @@ bxe_init_locked(struct bxe_softc *sc, int load_mode) sc->mbuf_alloc_size = PAGE_SIZE; else sc->mbuf_alloc_size = MJUM9BYTES; + DBPRINT(sc, BXE_INFO, "%s(): mbuf_alloc_size = %d, " "max_frame_size = %d\n", __FUNCTION__, sc->mbuf_alloc_size, sc->port.ether_mtu); /* Setup NIC internals and enable interrupts. */ - bxe_init_nic(sc, load_code); + error = bxe_init_nic(sc, load_code); + if (error != 0) { + BXE_PRINTF("%s(%d): NIC initialization failed, " + "aborting!\n", __FILE__, __LINE__); + goto bxe_init_locked_failed1; + } if ((load_code == FW_MSG_CODE_DRV_LOAD_COMMON) && (sc->common.shmem2_base)){ @@ -3855,7 +3938,8 @@ bxe_init_locked(struct bxe_softc *sc, int load_mode) #if __FreeBSD_version >= 800000 /* Allocate buffer rings for multiqueue operation. */ - if (bxe_alloc_buf_rings(sc)) { + error = bxe_alloc_buf_rings(sc); + if (error != 0) { BXE_PRINTF("%s(%d): Buffer ring initialization failed, " "aborting!\n", __FILE__, __LINE__); goto bxe_init_locked_failed1; @@ -3863,7 +3947,7 @@ bxe_init_locked(struct bxe_softc *sc, int load_mode) #endif /* Tell MCP that driver load is done. */ - if (!BP_NOMCP(sc)) { + if (!NOMCP(sc)) { load_code = bxe_fw_command(sc, DRV_MSG_CODE_LOAD_DONE); if (!load_code) { BXE_PRINTF("%s(%d): Driver load failed! No MCP " @@ -3878,10 +3962,12 @@ bxe_init_locked(struct bxe_softc *sc, int load_mode) sc->intr_sem = 0; /* Setup the leading connection for the controller. */ - if (bxe_setup_leading(sc)) + error = bxe_setup_leading(sc); + if (error != 0) { DBPRINT(sc, BXE_FATAL, "%s(): Initial PORT_SETUP ramrod " "failed. State is not OPEN!\n", __FUNCTION__); - + goto bxe_init_locked_failed3; + } if (CHIP_IS_E1H(sc)) { if (sc->mf_config[BP_E1HVN(sc)] & FUNC_MF_CFG_FUNC_DISABLED) { @@ -3917,7 +4003,6 @@ bxe_init_locked(struct bxe_softc *sc, int load_mode) else bxe_set_mac_addr_e1h(sc, 1); - DELAY(1000); /* Perform PHY initialization for the primary port. */ @@ -3950,7 +4035,7 @@ bxe_init_locked(struct bxe_softc *sc, int load_mode) bxe__link_status_update(sc); DELAY(1000); - /* Tell the stack the driver is running and the TX queue is open. */ + /* Tell the stack the driver is running. */ ifp->if_drv_flags = IFF_DRV_RUNNING; /* Schedule our periodic timer tick. */ @@ -3958,23 +4043,20 @@ bxe_init_locked(struct bxe_softc *sc, int load_mode) /* Everything went OK, go ahead and exit. */ goto bxe_init_locked_exit; - /* Try and gracefully shutdown the device because of a failure. */ bxe_init_locked_failed4: - + /* Try and gracefully shutdown the device because of a failure. */ for (i = 1; i < sc->num_queues; i++) bxe_stop_multi(sc, i); +bxe_init_locked_failed3: bxe_stop_leading(sc); - bxe_stats_handle(sc, STATS_EVENT_STOP); bxe_init_locked_failed2: - bxe_int_disable(sc); bxe_init_locked_failed1: - - if (!BP_NOMCP(sc)) { + if (!NOMCP(sc)) { bxe_fw_command(sc, DRV_MSG_CODE_LOAD_DONE); bxe_fw_command(sc, DRV_MSG_CODE_UNLOAD_REQ_WOL_MCP); bxe_fw_command(sc, DRV_MSG_CODE_UNLOAD_DONE); @@ -3985,11 +4067,10 @@ bxe_init_locked_failed1: bxe_free_buf_rings(sc); #endif - DBPRINT(sc, BXE_INFO, "%s(): Initialization failed!\n", __FUNCTION__); + DBPRINT(sc, BXE_WARN, "%s(): Initialization failed!\n", __FUNCTION__); bxe_init_locked_exit: - - DBEXIT(BXE_VERBOSE_LOAD | BXE_VERBOSE_RESET); + DBEXIT(BXE_INFO_LOAD | BXE_INFO_RESET); } /* @@ -4039,7 +4120,7 @@ bxe_wait_ramrod(struct bxe_softc *sc, int state, int idx, int *state_p, } /* We timed out polling for a completion. */ - DBPRINT(sc, BXE_FATAL, "%s(): Timeout %s for state 0x%08X on fp[%d]. " + DBPRINT(sc, BXE_FATAL, "%s(): Timeout %s for state 0x%08X on fp[%02d]. " "Got 0x%x instead\n", __FUNCTION__, poll ? "polling" : "waiting", state, idx, *state_p); @@ -4060,7 +4141,7 @@ bxe_write_dmae_phys_len(struct bxe_softc *sc, bus_addr_t phys_addr, uint32_t addr, uint32_t len) { int dmae_wr_max, offset; - DBENTER(BXE_VERBOSE_LOAD); + DBENTER(BXE_INSANE_REGS); dmae_wr_max = DMAE_LEN32_WR_MAX(sc); offset = 0; @@ -4071,7 +4152,7 @@ bxe_write_dmae_phys_len(struct bxe_softc *sc, bus_addr_t phys_addr, len -= dmae_wr_max; } bxe_write_dmae(sc, phys_addr + offset, addr + offset, len); - DBEXIT(BXE_VERBOSE_LOAD); + DBEXIT(BXE_INSANE_REGS); } @@ -4119,17 +4200,17 @@ bxe_init_ind_wr(struct bxe_softc *sc, uint32_t addr, const uint32_t *data, static void bxe_write_big_buf(struct bxe_softc *sc, uint32_t addr, uint32_t len) { - DBENTER(BXE_VERBOSE_LOAD); -#ifdef USE_DMAE + DBENTER(BXE_INSANE_REGS); +#ifdef BXE_USE_DMAE if (sc->dmae_ready) - bxe_write_dmae_phys_len(sc, sc->gunzip_mapping, addr, len); + bxe_write_dmae_phys_len(sc, sc->gz_dma.paddr, addr, len); else - bxe_init_str_wr(sc, addr, sc->gunzip_buf, len); + bxe_init_str_wr(sc, addr, sc->gz, len); #else - bxe_init_str_wr(sc, addr, sc->gunzip_buf, len); + bxe_init_str_wr(sc, addr, sc->gz, len); #endif - DBEXIT(BXE_VERBOSE_LOAD); + DBEXIT(BXE_INSANE_REGS); } /* @@ -4148,9 +4229,9 @@ bxe_init_fill(struct bxe_softc *sc, uint32_t addr, int fill, uint32_t len) DBENTER(BXE_VERBOSE_LOAD); - length = (((len * 4) > FW_BUF_SIZE) ? FW_BUF_SIZE : (len * 4)); + length = (((len * 4) > BXE_FW_BUF_SIZE) ? BXE_FW_BUF_SIZE : (len * 4)); leftovers = length / 4; - memset(sc->gunzip_buf, fill, length); + memset(sc->gz, fill, length); for (i = 0; i < len; i += leftovers) { cur_len = min(leftovers, len - i); @@ -4173,13 +4254,15 @@ bxe_init_wr_64(struct bxe_softc *sc, uint32_t addr, const uint32_t *data, uint32_t buf_len32, cur_len, len; int i; - buf_len32 = FW_BUF_SIZE / 4; + DBENTER(BXE_INSANE_REGS); + + buf_len32 = BXE_FW_BUF_SIZE / 4; len = len64 * 2; /* 64 bit value is in a blob: first low DWORD, then high DWORD. */ data64 = HILO_U64((*(data + 1)), (*data)); - len64 = min((uint32_t)(FW_BUF_SIZE / 8), len64); + len64 = min((uint32_t)(BXE_FW_BUF_SIZE / 8), len64); for (i = 0; i < len64; i++) { - pdata = ((uint64_t *)(sc->gunzip_buf)) + i; + pdata = ((uint64_t *)(sc->gz)) + i; *pdata = data64; } @@ -4187,6 +4270,8 @@ bxe_init_wr_64(struct bxe_softc *sc, uint32_t addr, const uint32_t *data, cur_len = min(buf_len32, len - i); bxe_write_big_buf(sc, addr + i*4, cur_len); } + + DBEXIT(BXE_INSANE_REGS); } @@ -4247,15 +4332,15 @@ static void bxe_write_big_buf_wb(struct bxe_softc *sc, uint32_t addr, uint32_t len) { if (sc->dmae_ready) - bxe_write_dmae_phys_len(sc, sc->gunzip_mapping, addr, len); + bxe_write_dmae_phys_len(sc, sc->gz_dma.paddr, addr, len); else - bxe_init_ind_wr(sc, addr, sc->gunzip_buf, len); + bxe_init_ind_wr(sc, addr, sc->gz, len); } #define VIRT_WR_DMAE_LEN(sc, data, addr, len32, le32_swap) \ do { \ - memcpy(sc->gunzip_buf, data, (len32)*4); \ + memcpy(sc->gz, data, (len32)*4); \ bxe_write_big_buf_wb(sc, addr, len32); \ } while (0) @@ -4271,7 +4356,7 @@ bxe_init_wr_wb(struct bxe_softc *sc, uint32_t addr, const uint32_t *data, { const uint32_t *old_data; - DBENTER(BXE_VERBOSE_LOAD); + DBENTER(BXE_INSANE_REGS); old_data = data; data = (const uint32_t *)bxe_sel_blob(sc, addr, (const uint8_t *)data); if (sc->dmae_ready) { @@ -4282,7 +4367,7 @@ bxe_init_wr_wb(struct bxe_softc *sc, uint32_t addr, const uint32_t *data, } else bxe_init_ind_wr(sc, addr, data, len); - DBEXIT(BXE_VERBOSE_LOAD); + DBEXIT(BXE_INSANE_REGS); } static void @@ -4316,6 +4401,8 @@ bxe_init_block(struct bxe_softc *sc, uint32_t block, uint32_t stage) uint16_t op_end, op_start; int hw_wr; + DBENTER(BXE_VERBOSE_LOAD | BXE_VERBOSE_RESET); + op_start = INIT_OPS_OFFSETS(sc)[BLOCK_OPS_IDX(block, stage, STAGE_START)]; op_end = INIT_OPS_OFFSETS(sc)[BLOCK_OPS_IDX(block, stage, STAGE_END)]; @@ -4370,11 +4457,14 @@ bxe_init_block(struct bxe_softc *sc, uint32_t block, uint32_t stage) break; } } + + DBEXIT(BXE_VERBOSE_LOAD | BXE_VERBOSE_RESET); } /* * Handles controller initialization when called from an unlocked routine. * ifconfig calls this function. + * * Returns: * None. */ @@ -4384,16 +4474,12 @@ bxe_init(void *xsc) struct bxe_softc *sc; sc = xsc; - DBENTER(BXE_VERBOSE_RESET | BXE_VERBOSE_UNLOAD); BXE_CORE_LOCK(sc); bxe_init_locked(sc, LOAD_NORMAL); BXE_CORE_UNLOCK(sc); - - DBEXIT(BXE_VERBOSE_RESET | BXE_VERBOSE_UNLOAD); } - /* * Release all resources used by the driver. * @@ -4407,7 +4493,6 @@ static void bxe_release_resources(struct bxe_softc *sc) { device_t dev; - int i; DBENTER(BXE_VERBOSE_RESET | BXE_VERBOSE_UNLOAD); @@ -4417,57 +4502,14 @@ bxe_release_resources(struct bxe_softc *sc) if (sc->bxe_ifp != NULL) if_free(sc->bxe_ifp); - /* Release interrupt resources. */ - bxe_interrupt_detach(sc); - - if ((sc->bxe_flags & BXE_USING_MSIX_FLAG) && sc->msix_count) { - - for (i = 0; i < sc->msix_count; i++) { - DBPRINT(sc, (BXE_VERBOSE_LOAD | BXE_VERBOSE_RESET | - BXE_VERBOSE_INTR), "%s(): Releasing MSI-X[%d] " - "vector.\n", __FUNCTION__, i); - if (sc->bxe_msix_res[i] && sc->bxe_msix_rid[i]) - bus_release_resource(dev, SYS_RES_IRQ, - sc->bxe_msix_rid[i], sc->bxe_msix_res[i]); - } - - pci_release_msi(dev); - - } else if ((sc->bxe_flags & BXE_USING_MSI_FLAG) && sc->msi_count) { - - for (i = 0; i < sc->msi_count; i++) { - DBPRINT(sc, (BXE_VERBOSE_LOAD | BXE_VERBOSE_RESET | - BXE_VERBOSE_INTR), "%s(): Releasing MSI[%d] " - "vector.\n", __FUNCTION__, i); - if (sc->bxe_msi_res[i] && sc->bxe_msi_rid[i]) - bus_release_resource(dev, SYS_RES_IRQ, - sc->bxe_msi_rid[i], sc->bxe_msi_res[i]); - } - - pci_release_msi(dev); - - } else { - - DBPRINT(sc, (BXE_VERBOSE_LOAD | BXE_VERBOSE_RESET | - BXE_VERBOSE_INTR), "%s(): Releasing legacy interrupt.\n", - __FUNCTION__); - if (sc->bxe_irq_res != NULL) - bus_release_resource(dev, SYS_RES_IRQ, - sc->bxe_irq_rid, sc->bxe_irq_res); - } - /* Free the DMA resources. */ - bxe_dma_free(sc); - - bxe_release_pci_resources(sc); + bxe_host_structures_free(sc); #if __FreeBSD_version >= 800000 /* Free multiqueue buffer rings. */ bxe_free_buf_rings(sc); #endif - /* Free remaining fastpath resources. */ - bxe_free_mutexes(sc); } @@ -4484,7 +4526,7 @@ bxe_release_resources(struct bxe_softc *sc) static void bxe_reg_wr_ind(struct bxe_softc *sc, uint32_t offset, uint32_t val) { - DBPRINT(sc, BXE_INSANE, "%s(); offset = 0x%08X, val = 0x%08X\n", + DBPRINT(sc, BXE_INSANE_REGS, "%s(); offset = 0x%08X, val = 0x%08X\n", __FUNCTION__, offset, val); pci_write_config(sc->dev, PCICFG_GRC_ADDRESS, offset, 4); @@ -4518,7 +4560,7 @@ bxe_reg_rd_ind(struct bxe_softc *sc, uint32_t offset) pci_write_config(sc->dev, PCICFG_GRC_ADDRESS, PCICFG_VENDOR_ID_OFFSET, 4); - DBPRINT(sc, BXE_INSANE, "%s(); offset = 0x%08X, val = 0x%08X\n", + DBPRINT(sc, BXE_INSANE_REGS, "%s(); offset = 0x%08X, val = 0x%08X\n", __FUNCTION__, offset, val); return (val); } @@ -4548,7 +4590,7 @@ bxe_post_dmae(struct bxe_softc *sc, struct dmae_command *dmae, int idx) for (i = 0; i < (sizeof(struct dmae_command) / 4); i++) { REG_WR(sc, cmd_offset + i * 4, *(((uint32_t *)dmae) + i)); - DBPRINT(sc, BXE_INSANE, "%s(): DMAE cmd[%d].%d : 0x%08X\n", + DBPRINT(sc, BXE_INSANE_REGS, "%s(): DMAE cmd[%d].%d : 0x%08X\n", __FUNCTION__, idx, i, cmd_offset + i * 4); } @@ -4666,7 +4708,7 @@ bxe_read_dmae(struct bxe_softc *sc, uint32_t src_addr, uint32_t *data, *wb_comp; int i, timeout; - DBENTER(BXE_INSANE); + DBENTER(BXE_INSANE_REGS); wb_comp = BXE_SP(sc, wb_comp); /* Fall back to indirect access if DMAE is not ready. */ @@ -4728,7 +4770,7 @@ bxe_read_dmae(struct bxe_softc *sc, uint32_t src_addr, BXE_DMAE_UNLOCK(sc); bxe_read_dmae_exit: - DBEXIT(BXE_INSANE); + DBEXIT(BXE_INSANE_REGS); } /* @@ -4962,7 +5004,7 @@ bxe_int_enable(struct bxe_softc *sc) port = BP_PORT(sc); hc_addr = port ? HC_REG_CONFIG_1 : HC_REG_CONFIG_0; val = REG_RD(sc, hc_addr); - if (sc->bxe_flags & BXE_USING_MSIX_FLAG) { + if (sc->msix_count > 0) { if (sc->msix_count == 1) { /* Single interrupt, multiple queues.*/ @@ -4993,7 +5035,7 @@ bxe_int_enable(struct bxe_softc *sc) HC_CONFIG_0_REG_ATTN_BIT_EN_0); } - } else if (sc->bxe_flags & BXE_USING_MSI_FLAG) { + } else if (sc->msi_count > 0) { if (sc->msi_count == 1) { @@ -5080,7 +5122,7 @@ bxe_int_disable(struct bxe_softc *sc) uint32_t hc_addr, val; int port; - DBENTER(BXE_VERBOSE_INTR); + DBENTER(BXE_VERBOSE_INTR | BXE_VERBOSE_RESET | BXE_VERBOSE_UNLOAD); port = BP_PORT(sc); hc_addr = port ? HC_REG_CONFIG_1 : HC_REG_CONFIG_0; @@ -5097,7 +5139,7 @@ bxe_int_disable(struct bxe_softc *sc) __FUNCTION__, val); } - DBEXIT(BXE_VERBOSE_INTR); + DBEXIT(BXE_VERBOSE_INTR | BXE_VERBOSE_RESET | BXE_VERBOSE_UNLOAD); } #define BXE_CRC32_RESIDUAL 0xdebb20e3 @@ -5592,10 +5634,6 @@ bxe_ack_sb(struct bxe_softc *sc, uint8_t sb_id, uint8_t storm, uint16_t index, struct igu_ack_register igu_ack; uint32_t hc_addr; - DBPRINT(sc, BXE_VERBOSE_INTR, "%s(): sb_id = %d, storm = %d, " - "index = %d, int_mode = %d, update = %d.\n", __FUNCTION__, sb_id, - storm, index, int_mode, update); - hc_addr = (HC_REG_COMMAND_REG + BP_PORT(sc) * 32 + COMMAND_REG_INT_ACK); igu_ack.status_block_index = index; igu_ack.sb_id_and_flags = @@ -5605,11 +5643,6 @@ bxe_ack_sb(struct bxe_softc *sc, uint8_t sb_id, uint8_t storm, uint16_t index, (int_mode << IGU_ACK_REGISTER_INTERRUPT_MODE_SHIFT)); rmb(); - - DBPRINT(sc, BXE_VERBOSE_INTR, - "%s(): Writing 0x%08X to HC addr 0x%08X\n", __FUNCTION__, - (*(uint32_t *) &igu_ack), hc_addr); - REG_WR(sc, hc_addr, (*(uint32_t *) &igu_ack)); wmb(); } @@ -5618,7 +5651,8 @@ bxe_ack_sb(struct bxe_softc *sc, uint8_t sb_id, uint8_t storm, uint16_t index, * Update fastpath status block index. * * Returns: - * 0 + * 0 = Nu completes, 1 = TX completes, 2 = RX completes, + * 3 = RX & TX completes */ static __inline uint16_t bxe_update_fpsb_idx(struct bxe_fastpath *fp) @@ -5686,7 +5720,7 @@ bxe_sp_event(struct bxe_fastpath *fp, union eth_rx_cqe *rr_cqe) cid = SW_CID(rr_cqe->ramrod_cqe.conn_and_cmd_data); command = CQE_CMD(rr_cqe->ramrod_cqe.conn_and_cmd_data); DBPRINT(sc, BXE_VERBOSE_RAMROD, "%s(): CID = %d, ramrod command = %d, " - "device state = 0x%08X, fp[%d].state = 0x%08X, type = %d\n", + "device state = 0x%08X, fp[%02d].state = 0x%08X, type = %d\n", __FUNCTION__, cid, command, sc->state, fp->index, fp->state, rr_cqe->ramrod_cqe.ramrod_type); @@ -5699,13 +5733,13 @@ bxe_sp_event(struct bxe_fastpath *fp, union eth_rx_cqe *rr_cqe) switch (command | fp->state) { case (RAMROD_CMD_ID_ETH_CLIENT_SETUP | BXE_FP_STATE_OPENING): DBPRINT(sc, BXE_VERBOSE_RAMROD, - "%s(): Completed fp[%d] CLIENT_SETUP Ramrod.\n", + "%s(): Completed fp[%02d] CLIENT_SETUP Ramrod.\n", __FUNCTION__, cid); fp->state = BXE_FP_STATE_OPEN; break; case (RAMROD_CMD_ID_ETH_HALT | BXE_FP_STATE_HALTING): DBPRINT(sc, BXE_VERBOSE_RAMROD, - "%s(): Completed fp[%d] ETH_HALT ramrod\n", + "%s(): Completed fp[%02d] ETH_HALT ramrod\n", __FUNCTION__, cid); fp->state = BXE_FP_STATE_HALTED; break; @@ -5734,7 +5768,7 @@ bxe_sp_event(struct bxe_fastpath *fp, union eth_rx_cqe *rr_cqe) break; case (RAMROD_CMD_ID_ETH_CFC_DEL | BXE_STATE_CLOSING_WAIT4_HALT): DBPRINT(sc, BXE_VERBOSE_RAMROD, - "%s(): Completed fp[%d] ETH_CFC_DEL ramrod.\n", + "%s(): Completed fp[%02d] ETH_CFC_DEL ramrod.\n", __FUNCTION__, cid); sc->fp[cid].state = BXE_FP_STATE_CLOSED; break; @@ -5787,7 +5821,7 @@ bxe_acquire_hw_lock(struct bxe_softc *sc, uint32_t resource) /* Validating that the resource is within range. */ if (resource > HW_LOCK_MAX_RESOURCE_VALUE) { - DBPRINT(sc, BXE_INFO, "%s(): Resource is out of range! " + DBPRINT(sc, BXE_WARN, "%s(): Resource is out of range! " "resource(0x%08X) > HW_LOCK_MAX_RESOURCE_VALUE(0x%08X)\n", __FUNCTION__, resource, HW_LOCK_MAX_RESOURCE_VALUE); rc = EINVAL; @@ -5797,7 +5831,7 @@ bxe_acquire_hw_lock(struct bxe_softc *sc, uint32_t resource) /* Validating that the resource is not already taken. */ lock_status = REG_RD(sc, hw_lock_control_reg); if (lock_status & resource_bit) { - DBPRINT(sc, BXE_INFO, "%s(): Failed to acquire lock! " + DBPRINT(sc, BXE_WARN, "%s(): Failed to acquire lock! " "lock_status = 0x%08X, resource_bit = 0x%08X\n", __FUNCTION__, lock_status, resource_bit); rc = EEXIST; @@ -5815,7 +5849,7 @@ bxe_acquire_hw_lock(struct bxe_softc *sc, uint32_t resource) DELAY(5000); } - DBPRINT(sc, BXE_INFO, "%s(): Timeout!\n", __FUNCTION__); + DBPRINT(sc, BXE_WARN, "%s(): Timeout!\n", __FUNCTION__); rc = EAGAIN; bxe_acquire_hw_lock_exit: @@ -5846,7 +5880,7 @@ bxe_release_hw_lock(struct bxe_softc *sc, uint32_t resource) rc = 0; /* Validating that the resource is within range */ if (resource > HW_LOCK_MAX_RESOURCE_VALUE) { - DBPRINT(sc, BXE_INFO, "%s(): Resource is out of range! " + DBPRINT(sc, BXE_WARN, "%s(): Resource is out of range! " "resource(0x%08X) > HW_LOCK_MAX_RESOURCE_VALUE(0x%08X)\n", __FUNCTION__, resource, HW_LOCK_MAX_RESOURCE_VALUE); rc = EINVAL; @@ -5861,7 +5895,7 @@ bxe_release_hw_lock(struct bxe_softc *sc, uint32_t resource) /* Validating that the resource is currently taken */ lock_status = REG_RD(sc, hw_lock_control_reg); if (!(lock_status & resource_bit)) { - DBPRINT(sc, BXE_INFO, "%s(): The resource is not currently " + DBPRINT(sc, BXE_WARN, "%s(): The resource is not currently " "locked! lock_status = 0x%08X, resource_bit = 0x%08X\n", __FUNCTION__, lock_status, resource_bit); rc = EFAULT; @@ -6045,15 +6079,13 @@ bxe_set_spio(struct bxe_softc *sc, int spio_num, uint32_t mode) uint32_t spio_reg, spio_mask; int rc; - DBENTER(BXE_VERBOSE_MISC); - rc = 0; spio_mask = 1 << spio_num; /* Validate the SPIO. */ if ((spio_num < MISC_REGISTERS_SPIO_4) || (spio_num > MISC_REGISTERS_SPIO_7)) { - DBPRINT(sc, BXE_FATAL, "%s(): Invalid SPIO (%d)!\n", + DBPRINT(sc, BXE_WARN, "%s(): Invalid SPIO (%d)!\n", __FUNCTION__, spio_num); rc = EINVAL; goto bxe_set_spio_exit; @@ -6071,24 +6103,24 @@ bxe_set_spio(struct bxe_softc *sc, int spio_num, uint32_t mode) switch (mode) { case MISC_REGISTERS_SPIO_OUTPUT_LOW : - DBPRINT(sc, BXE_INFO, "%s(): Set SPIO %d -> output low\n", - __FUNCTION__, spio_num); + DBPRINT(sc, BXE_VERBOSE_MISC, "%s(): Set SPIO %d -> " + "output low\n", __FUNCTION__, spio_num); spio_reg &= ~(spio_mask << MISC_REGISTERS_SPIO_FLOAT_POS); spio_reg |= (spio_mask << MISC_REGISTERS_SPIO_CLR_POS); break; case MISC_REGISTERS_SPIO_OUTPUT_HIGH : - DBPRINT(sc, BXE_INFO, "%s(): Set SPIO %d -> output high\n", - __FUNCTION__, spio_num); + DBPRINT(sc, BXE_VERBOSE_MISC, "%s(): Set SPIO %d -> " + "output high\n", __FUNCTION__, spio_num); spio_reg &= ~(spio_mask << MISC_REGISTERS_SPIO_FLOAT_POS); spio_reg |= (spio_mask << MISC_REGISTERS_SPIO_SET_POS); break; case MISC_REGISTERS_SPIO_INPUT_HI_Z: - DBPRINT(sc, BXE_INFO, "%s(): Set SPIO %d -> input\n", - __FUNCTION__, spio_num); + DBPRINT(sc, BXE_VERBOSE_MISC, "%s(): Set SPIO %d -> " + "input\n", __FUNCTION__, spio_num); spio_reg |= (spio_mask << MISC_REGISTERS_SPIO_FLOAT_POS); break; default: - DBPRINT(sc, BXE_FATAL, "%s(): Unknown SPIO mode (0x%08X)!\n", + DBPRINT(sc, BXE_WARN, "%s(): Unknown SPIO mode (0x%08X)!\n", __FUNCTION__, mode); break; } @@ -6101,7 +6133,6 @@ bxe_set_spio(struct bxe_softc *sc, int spio_num, uint32_t mode) } bxe_set_spio_exit: - DBEXIT(BXE_VERBOSE_MISC); return (rc); } @@ -6202,9 +6233,6 @@ bxe_link_attn(struct bxe_softc *sc) bxe_stats_handle(sc, STATS_EVENT_LINK_UP); } - /* Report the new link status. */ - bxe_link_report(sc); - /* Need additional handling for multi-function devices. */ if (IS_E1HMF(sc)) { port = BP_PORT(sc); @@ -6254,11 +6282,9 @@ bxe_pmf_update(struct bxe_softc *sc) uint32_t val; int port; - DBENTER(BXE_VERBOSE_INTR); - /* Record that this driver instance is managing the port. */ sc->port.pmf = 1; - DBPRINT(sc, BXE_INFO, "%s(): Enabling port management function.\n", + DBPRINT(sc, BXE_INFO, "%s(): Enabling this port as PMF.\n", __FUNCTION__); /* Enable NIG attention. */ @@ -6268,8 +6294,6 @@ bxe_pmf_update(struct bxe_softc *sc) REG_WR(sc, HC_REG_LEADING_EDGE_0 + port * 8, val); bxe_stats_handle(sc, STATS_EVENT_PMF); - - DBEXIT(BXE_VERBOSE_INTR); } /* 8073 Download definitions */ @@ -6376,9 +6400,9 @@ bxe_sp_post(struct bxe_softc *sc, int command, int cid, uint32_t data_hi, { int func, rc; - DBENTER(BXE_VERBOSE_LOAD | BXE_VERBOSE_RESET | BXE_VERBOSE_RAMROD); - - DBRUNMSG(BXE_VERBOSE_RAMROD, bxe_decode_ramrod_cmd(sc, command)); + DBRUNMSG((BXE_EXTREME_LOAD | BXE_EXTREME_RESET | + BXE_EXTREME_UNLOAD | BXE_EXTREME_RAMROD), + bxe_decode_ramrod_cmd(sc, command)); DBPRINT(sc, BXE_VERBOSE_RAMROD, "%s(): cid = %d, data_hi = 0x%08X, " "data_low = 0x%08X, remaining spq entries = %d\n", __FUNCTION__, @@ -6437,8 +6461,6 @@ bxe_sp_post(struct bxe_softc *sc, int command, int cid, uint32_t data_hi, bxe_sp_post_exit: BXE_SP_UNLOCK(sc); - DBEXIT(BXE_VERBOSE_LOAD | BXE_VERBOSE_RESET | BXE_VERBOSE_RAMROD); - return (rc); } @@ -6512,7 +6534,7 @@ bxe_update_dsb_idx(struct bxe_softc *sc) uint16_t rc; rc = 0; - dsb = sc->def_status_block; + dsb = sc->def_sb; /* Read memory barrier since block is written by hardware. */ rmb(); @@ -7130,9 +7152,9 @@ bxe_attn_int(struct bxe_softc* sc) DBENTER(BXE_VERBOSE_INTR); - attn_bits = le32toh(sc->def_status_block->atten_status_block.attn_bits); + attn_bits = le32toh(sc->def_sb->atten_status_block.attn_bits); attn_ack = - le32toh(sc->def_status_block->atten_status_block.attn_bits_ack); + le32toh(sc->def_sb->atten_status_block.attn_bits_ack); attn_state = sc->attn_state; asserted = attn_bits & ~attn_ack & ~attn_state; deasserted = ~attn_bits & attn_ack & attn_state; @@ -7262,7 +7284,7 @@ bxe_attn_int(struct bxe_softc* sc) #ifdef __i386__ #define BITS_PER_LONG 32 -#else /*Only support x86_64(AMD64 and EM64T)*/ +#else #define BITS_PER_LONG 64 #endif @@ -7290,19 +7312,19 @@ static void bxe_stats_storm_post(struct bxe_softc *sc) { struct eth_query_ramrod_data ramrod_data = {0}; - int rc; + int i, rc; DBENTER(BXE_INSANE_STATS); if (!sc->stats_pending) { ramrod_data.drv_counter = sc->stats_counter++; ramrod_data.collect_port = sc->port.pmf ? 1 : 0; - ramrod_data.ctr_id_vector = (1 << BP_CL_ID(sc)); + for (i = 0; i < sc->num_queues; i++) + ramrod_data.ctr_id_vector |= (1 << sc->fp[i].cl_id); rc = bxe_sp_post(sc, RAMROD_CMD_ID_ETH_STAT_QUERY, 0, ((uint32_t *)&ramrod_data)[1], ((uint32_t *)&ramrod_data)[0], 0); - if (rc == 0) { /* Stats ramrod has it's own slot on the SPQ. */ sc->spq_left++; @@ -7313,22 +7335,32 @@ bxe_stats_storm_post(struct bxe_softc *sc) DBEXIT(BXE_INSANE_STATS); } +/* + * Setup the adrress used by the driver to report port-based statistics + * back to the controller. + * + * Returns: + * None. + */ static void bxe_stats_port_base_init(struct bxe_softc *sc) { uint32_t *stats_comp; struct dmae_command *dmae; - if (!sc->port.pmf || !sc->port.port_stx) { + DBENTER(BXE_VERBOSE_STATS); + + /* Only the port management function (PMF) does this work. */ + if ((sc->port.pmf == 0) || !sc->port.port_stx) { BXE_PRINTF("%s(%d): Invalid statistcs port setup!\n", __FILE__, __LINE__); - return; + goto bxe_stats_port_base_init_exit; } stats_comp = BXE_SP(sc, stats_comp); + sc->executer_idx = 0; - sc->executer_idx = 0; /* dmae clients */ - + /* DMA the address of the drivers port statistics block. */ dmae = BXE_SP(sc, dmae[sc->executer_idx++]); dmae->opcode = (DMAE_CMD_SRC_PCI | DMAE_CMD_DST_GRC | DMAE_CMD_C_DST_PCI | DMAE_CMD_C_ENABLE | @@ -7352,8 +7384,18 @@ bxe_stats_port_base_init(struct bxe_softc *sc) *stats_comp = 0; bxe_stats_hw_post(sc); bxe_stats_comp(sc); + +bxe_stats_port_base_init_exit: + DBEXIT(BXE_VERBOSE_STATS); } +/* + * Setup the adrress used by the driver to report function-based statistics + * back to the controller. + * + * Returns: + * None. + */ static void bxe_stats_func_base_init(struct bxe_softc *sc) { @@ -7361,12 +7403,22 @@ bxe_stats_func_base_init(struct bxe_softc *sc) int vn, vn_max; uint32_t func_stx; + DBENTER(BXE_VERBOSE_STATS); + + /* Only the port management function (PMF) does this work. */ + if ((sc->port.pmf == 0) || !sc->func_stx) { + BXE_PRINTF("%s(%d): Invalid statistcs function setup!\n", + __FILE__, __LINE__); + goto bxe_stats_func_base_init_exit; + } + port = BP_PORT(sc); func_stx = sc->func_stx; vn_max = IS_E1HMF(sc) ? E1HVN_MAX : E1VN_MAX; + /* Initialize each function individually. */ for (vn = VN_0; vn < vn_max; vn++) { - func = 2*vn + port; + func = 2 * vn + port; sc->func_stx = SHMEM_RD(sc, func_mb[func].fw_mb_param); bxe_stats_func_init(sc); bxe_stats_hw_post(sc); @@ -7374,20 +7426,38 @@ bxe_stats_func_base_init(struct bxe_softc *sc) } sc->func_stx = func_stx; + +bxe_stats_func_base_init_exit: + DBEXIT(BXE_VERBOSE_STATS); } +/* + * DMA the function-based statistics to the controller. + * + * Returns: + * None. + */ static void bxe_stats_func_base_update(struct bxe_softc *sc) { uint32_t *stats_comp; struct dmae_command *dmae; + DBENTER(BXE_VERBOSE_STATS); + + /* Only the port management function (PMF) does this work. */ + if ((sc->port.pmf == 0) || !sc->func_stx) { + BXE_PRINTF("%s(%d): Invalid statistcs function update!\n", + __FILE__, __LINE__); + goto bxe_stats_func_base_update_exit; + } + dmae = &sc->stats_dmae; stats_comp = BXE_SP(sc, stats_comp); - sc->executer_idx = 0; memset(dmae, 0, sizeof(struct dmae_command)); + /* DMA the function statistics from the driver to the H/W. */ dmae->opcode = (DMAE_CMD_SRC_GRC | DMAE_CMD_DST_PCI | DMAE_CMD_C_DST_PCI | DMAE_CMD_C_ENABLE | DMAE_CMD_SRC_RESET | DMAE_CMD_DST_RESET | @@ -7410,6 +7480,9 @@ bxe_stats_func_base_update(struct bxe_softc *sc) *stats_comp = 0; bxe_stats_hw_post(sc); bxe_stats_comp(sc); + +bxe_stats_func_base_update_exit: + DBEXIT(BXE_VERBOSE_STATS); } @@ -7428,7 +7501,7 @@ bxe_stats_init(struct bxe_softc *sc) DBENTER(BXE_VERBOSE_STATS); if (sc->stats_enable == FALSE) - return; + goto bxe_stats_init_exit; port = BP_PORT(sc); func = BP_FUNC(sc); @@ -7436,19 +7509,21 @@ bxe_stats_init(struct bxe_softc *sc) sc->stats_counter = 0; sc->stats_pending = 0; - /* Fetch the offset of port statistics in shared memory. */ - if (BP_NOMCP(sc)){ + /* Fetch the offset of port & function statistics in shared memory. */ + if (NOMCP(sc)){ sc->port.port_stx = 0; sc->func_stx = 0; } else{ sc->port.port_stx = SHMEM_RD(sc, port_mb[port].port_stx); sc->func_stx = SHMEM_RD(sc, func_mb[func].fw_mb_param); } - /* If this is still 0 then no management firmware running. */ + DBPRINT(sc, BXE_VERBOSE_STATS, "%s(): sc->port.port_stx = 0x%08X\n", __FUNCTION__, sc->port.port_stx); + DBPRINT(sc, BXE_VERBOSE_STATS, "%s(): sc->func_stx = 0x%08X\n", + __FUNCTION__, sc->func_stx); - /* port stats */ + /* Port statistics. */ memset(&(sc->port.old_nig_stats), 0, sizeof(struct nig_stats)); sc->port.old_nig_stats.brb_discard = REG_RD(sc, NIG_REG_STAT0_BRB_DISCARD + port * 0x38); @@ -7459,10 +7534,11 @@ bxe_stats_init(struct bxe_softc *sc) REG_RD_DMAE(sc, NIG_REG_STAT0_EGRESS_MAC_PKT1 + port * 0x50, &(sc->port.old_nig_stats.egress_mac_pkt1_lo), 2); - /* function stats */ + /* Function statistics. */ for (i = 0; i < sc->num_queues; i++) { fp = &sc->fp[i]; - /* Clear function statistics memory. */ + + /* Clear all per-queue statistics. */ memset(&fp->old_tclient, 0, sizeof(struct tstorm_per_client_stats)); memset(&fp->old_uclient, 0, @@ -7473,18 +7549,21 @@ bxe_stats_init(struct bxe_softc *sc) sizeof(struct bxe_q_stats)); } + /* ToDo: Clear any driver specific statistics? */ + sc->stats_state = STATS_STATE_DISABLED; - /* Init port statistics if we're the port management function. */ - if (sc->port.pmf) { - /* Port_stx are in 57710 when ncsi presnt & always in 57711.*/ + if (sc->port.pmf == 1) { + /* Init port & function stats if we're PMF. */ if (sc->port.port_stx) bxe_stats_port_base_init(sc); if (sc->func_stx) bxe_stats_func_base_init(sc); } else if (sc->func_stx) + /* Update function stats if we're not PMF. */ bxe_stats_func_base_update(sc); +bxe_stats_init_exit: DBEXIT(BXE_VERBOSE_STATS); } @@ -7548,9 +7627,10 @@ bxe_stats_hw_post(struct bxe_softc *sc) } /* + * Delay routine which polls for the DMA engine to complete. * * Returns: - * 1 + * 0 = Failure, !0 = Success */ static int bxe_stats_comp(struct bxe_softc *sc) @@ -7562,6 +7642,7 @@ bxe_stats_comp(struct bxe_softc *sc) stats_comp = BXE_SP(sc, stats_comp); cnt = 10; + while (*stats_comp != DMAE_COMP_VAL) { if (!cnt) { BXE_PRINTF("%s(%d): Timeout waiting for statistics " @@ -7573,11 +7654,12 @@ bxe_stats_comp(struct bxe_softc *sc) } DBEXIT(BXE_VERBOSE_STATS); + /* ToDo: Shouldn't this return the value of cnt? */ return (1); } /* - * Initialize port statistics. + * DMA port statistcs from controller to driver. * * Returns: * None. @@ -7595,13 +7677,14 @@ bxe_stats_pmf_update(struct bxe_softc *sc) loader_idx = PMF_DMAE_C(sc); /* We shouldn't be here if any of the following are false. */ - if (!IS_E1HMF(sc) || !sc->port.pmf || !sc->port.port_stx) { - DBPRINT(sc, BXE_WARN, "%s(): Bug!\n", __FUNCTION__); + if (!IS_E1HMF(sc) || (sc->port.pmf == 0) || !sc->port.port_stx) { + BXE_PRINTF("%s(%d): Statistics bug!\n", __FILE__, __LINE__); goto bxe_stats_pmf_update_exit; } sc->executer_idx = 0; + /* Instruct DMA engine to copy port statistics from H/W to driver. */ opcode = (DMAE_CMD_SRC_GRC | DMAE_CMD_DST_PCI | DMAE_CMD_C_DST_PCI | DMAE_CMD_C_ENABLE | DMAE_CMD_SRC_RESET | DMAE_CMD_DST_RESET | @@ -7638,6 +7721,7 @@ bxe_stats_pmf_update(struct bxe_softc *sc) dmae->comp_addr_hi = U64_HI(BXE_SP_MAPPING(sc, stats_comp)); dmae->comp_val = DMAE_COMP_VAL; + /* Start the DMA and wait for the result. */ *stats_comp = 0; bxe_stats_hw_post(sc); bxe_stats_comp(sc); @@ -7647,7 +7731,10 @@ bxe_stats_pmf_update_exit: } /* - * Prepare the DMAE parameters required for port statistics. + * Prepare the DMAE parameters required for all statistics. + * + * This function should only be called by the driver instance + * that is designated as the port management function (PMF). * * Returns: * None. @@ -7666,8 +7753,8 @@ bxe_stats_port_init(struct bxe_softc *sc) loader_idx = PMF_DMAE_C(sc); stats_comp = BXE_SP(sc, stats_comp); - /* Sanity check. */ - if (!sc->link_vars.link_up || !sc->port.pmf) { + /* Only the port management function (PMF) does this work. */ + if (!sc->link_vars.link_up || (sc->port.pmf == 0)) { BXE_PRINTF("%s(%d): Invalid statistics port setup!\n", __FILE__, __LINE__); goto bxe_stats_port_init_exit; @@ -7675,7 +7762,7 @@ bxe_stats_port_init(struct bxe_softc *sc) sc->executer_idx = 0; - /* Setup statistics reporting to MCP. */ + /* The same opcde is used for multiple DMA operations. */ opcode = (DMAE_CMD_SRC_PCI | DMAE_CMD_DST_GRC | DMAE_CMD_C_DST_GRC | DMAE_CMD_C_ENABLE | DMAE_CMD_SRC_RESET | DMAE_CMD_DST_RESET | @@ -7728,7 +7815,7 @@ bxe_stats_port_init(struct bxe_softc *sc) (vn << DMAE_CMD_E1HVN_SHIFT)); if (sc->link_vars.mac_type == MAC_TYPE_BMAC) { - /* Enable statistics for the BMAC. */ + /* Enable statistics for the 10Gb BMAC. */ mac_addr = (port ? NIG_REG_INGRESS_BMAC1_MEM : NIG_REG_INGRESS_BMAC0_MEM); @@ -7764,7 +7851,7 @@ bxe_stats_port_init(struct bxe_softc *sc) dmae->comp_val = 1; } else if (sc->link_vars.mac_type == MAC_TYPE_EMAC) { - /* Enable statistics for the EMAC. */ + /* Enable statistics for the 1Gb EMAC. */ mac_addr = (port ? GRCBASE_EMAC1 : GRCBASE_EMAC0); @@ -7873,6 +7960,8 @@ bxe_stats_port_init_exit: /* * Prepare the DMAE parameters required for function statistics. * + * This function is called by all driver instances. + * * Returns: * None. */ @@ -7884,15 +7973,14 @@ bxe_stats_func_init(struct bxe_softc *sc) DBENTER(BXE_VERBOSE_STATS); - dmae = &sc->stats_dmae; - stats_comp = BXE_SP(sc, stats_comp); - if (!sc->func_stx) { BXE_PRINTF("%s(%d): Invalid statistics function setup!\n", __FILE__, __LINE__); goto bxe_stats_func_init_exit; } + dmae = &sc->stats_dmae; + stats_comp = BXE_SP(sc, stats_comp); sc->executer_idx = 0; memset(dmae, 0, sizeof(struct dmae_command)); @@ -7924,6 +8012,8 @@ bxe_stats_func_init_exit: } /* + * Starts a statistics update DMA and waits for completion. + * * Returns: * None. */ @@ -7933,9 +8023,8 @@ bxe_stats_start(struct bxe_softc *sc) DBENTER(BXE_VERBOSE_STATS); - if (sc->port.pmf) + if (sc->port.pmf == 1) bxe_stats_port_init(sc); - else if (sc->func_stx) bxe_stats_func_init(sc); @@ -7978,6 +8067,7 @@ bxe_stats_restart(struct bxe_softc *sc) } /* + * Update the Big MAC (10Gb BMAC) statistics. * * Returns: * None. @@ -7987,7 +8077,7 @@ bxe_stats_bmac_update(struct bxe_softc *sc) { struct bmac_stats *new; struct host_port_stats *pstats; - struct bxe_eth_stats *estats; + struct bxe_port_stats *estats; struct regpair diff; DBENTER(BXE_INSANE_STATS); @@ -7996,19 +8086,32 @@ bxe_stats_bmac_update(struct bxe_softc *sc) pstats = BXE_SP(sc, port_stats); estats = &sc->eth_stats; - UPDATE_STAT64(rx_stat_grerb, rx_stat_ifhcinbadoctets); - UPDATE_STAT64(rx_stat_grfcs, rx_stat_dot3statsfcserrors); - UPDATE_STAT64(rx_stat_grund, rx_stat_etherstatsundersizepkts); - UPDATE_STAT64(rx_stat_grovr, rx_stat_dot3statsframestoolong); - UPDATE_STAT64(rx_stat_grfrg, rx_stat_etherstatsfragments); - UPDATE_STAT64(rx_stat_grjbr, rx_stat_etherstatsjabbers); - UPDATE_STAT64(rx_stat_grxcf, rx_stat_maccontrolframesreceived); - UPDATE_STAT64(rx_stat_grxpf, rx_stat_xoffstateentered); - UPDATE_STAT64(rx_stat_grxpf, rx_stat_bmac_xpf); - UPDATE_STAT64(tx_stat_gtxpf, tx_stat_outxoffsent); - UPDATE_STAT64(tx_stat_gtxpf, tx_stat_flowcontroldone); - UPDATE_STAT64(tx_stat_gt64, tx_stat_etherstatspkts64octets); - UPDATE_STAT64(tx_stat_gt127, tx_stat_etherstatspkts65octetsto127octets); + UPDATE_STAT64(rx_stat_grerb, + rx_stat_ifhcinbadoctets); + UPDATE_STAT64(rx_stat_grfcs, + rx_stat_dot3statsfcserrors); + UPDATE_STAT64(rx_stat_grund, + rx_stat_etherstatsundersizepkts); + UPDATE_STAT64(rx_stat_grovr, + rx_stat_dot3statsframestoolong); + UPDATE_STAT64(rx_stat_grfrg, + rx_stat_etherstatsfragments); + UPDATE_STAT64(rx_stat_grjbr, + rx_stat_etherstatsjabbers); + UPDATE_STAT64(rx_stat_grxcf, + rx_stat_maccontrolframesreceived); + UPDATE_STAT64(rx_stat_grxpf, + rx_stat_xoffstateentered); + UPDATE_STAT64(rx_stat_grxpf, + rx_stat_bmac_xpf); + UPDATE_STAT64(tx_stat_gtxpf, + tx_stat_outxoffsent); + UPDATE_STAT64(tx_stat_gtxpf, + tx_stat_flowcontroldone); + UPDATE_STAT64(tx_stat_gt64, + tx_stat_etherstatspkts64octets); + UPDATE_STAT64(tx_stat_gt127, + tx_stat_etherstatspkts65octetsto127octets); UPDATE_STAT64(tx_stat_gt255, tx_stat_etherstatspkts128octetsto255octets); UPDATE_STAT64(tx_stat_gt511, @@ -8017,19 +8120,23 @@ bxe_stats_bmac_update(struct bxe_softc *sc) tx_stat_etherstatspkts512octetsto1023octets); UPDATE_STAT64(tx_stat_gt1518, tx_stat_etherstatspkts1024octetsto1522octets); - UPDATE_STAT64(tx_stat_gt2047, tx_stat_bmac_2047); - UPDATE_STAT64(tx_stat_gt4095, tx_stat_bmac_4095); - UPDATE_STAT64(tx_stat_gt9216, tx_stat_bmac_9216); - UPDATE_STAT64(tx_stat_gt16383, tx_stat_bmac_16383); + UPDATE_STAT64(tx_stat_gt2047, + tx_stat_bmac_2047); + UPDATE_STAT64(tx_stat_gt4095, + tx_stat_bmac_4095); + UPDATE_STAT64(tx_stat_gt9216, + tx_stat_bmac_9216); + UPDATE_STAT64(tx_stat_gt16383, + tx_stat_bmac_16383); UPDATE_STAT64(tx_stat_gterr, tx_stat_dot3statsinternalmactransmiterrors); - UPDATE_STAT64(tx_stat_gtufl, tx_stat_bmac_ufl); + UPDATE_STAT64(tx_stat_gtufl, + tx_stat_bmac_ufl); estats->pause_frames_received_hi = pstats->mac_stx[1].rx_stat_bmac_xpf_hi; estats->pause_frames_received_lo = pstats->mac_stx[1].rx_stat_bmac_xpf_lo; - estats->pause_frames_sent_hi = pstats->mac_stx[1].tx_stat_outxoffsent_hi; estats->pause_frames_sent_lo = @@ -8039,6 +8146,8 @@ bxe_stats_bmac_update(struct bxe_softc *sc) } /* + * Update the Ethernet MAC (1Gb EMAC) statistics. + * * Returns: * None. */ @@ -8047,7 +8156,7 @@ bxe_stats_emac_update(struct bxe_softc *sc) { struct emac_stats *new; struct host_port_stats *pstats; - struct bxe_eth_stats *estats; + struct bxe_port_stats *estats; DBENTER(BXE_INSANE_STATS); @@ -8092,9 +8201,9 @@ bxe_stats_emac_update(struct bxe_softc *sc) estats->pause_frames_received_lo = pstats->mac_stx[1].rx_stat_xonpauseframesreceived_lo; ADD_64(estats->pause_frames_received_hi, - pstats->mac_stx[1].rx_stat_xoffpauseframesreceived_hi, - estats->pause_frames_received_lo, - pstats->mac_stx[1].rx_stat_xoffpauseframesreceived_lo); + pstats->mac_stx[1].rx_stat_xoffpauseframesreceived_hi, + estats->pause_frames_received_lo, + pstats->mac_stx[1].rx_stat_xoffpauseframesreceived_lo); estats->pause_frames_sent_hi = pstats->mac_stx[1].tx_stat_outxonsent_hi; @@ -8117,7 +8226,7 @@ bxe_stats_hw_update(struct bxe_softc *sc) { struct nig_stats *new, *old; struct host_port_stats *pstats; - struct bxe_eth_stats *estats; + struct bxe_port_stats *estats; struct regpair diff; uint32_t nig_timer_max; int rc; @@ -8162,12 +8271,15 @@ bxe_stats_hw_update(struct bxe_softc *sc) pstats->host_port_stats_start = ++pstats->host_port_stats_end; - nig_timer_max = SHMEM_RD(sc, port_mb[BP_PORT(sc)].stat_nig_timer); - if (nig_timer_max != estats->nig_timer_max) { - estats->nig_timer_max = nig_timer_max; - DBPRINT(sc, BXE_WARN, - "%s(): NIG timer reached max value (%u)!\n", __FUNCTION__, - estats->nig_timer_max); + if (!NOMCP(sc)) { + nig_timer_max = + SHMEM_RD(sc, port_mb[BP_PORT(sc)].stat_nig_timer); + if (nig_timer_max != estats->nig_timer_max) { + estats->nig_timer_max = nig_timer_max; + DBPRINT(sc, BXE_WARN, + "%s(): NIG timer reached max value (%u)!\n", + __FUNCTION__, estats->nig_timer_max); + } } bxe_stats_hw_update_exit: @@ -8179,12 +8291,15 @@ bxe_stats_hw_update_exit: * Returns: * 0 = Success, !0 = Failure. */ +// DRC - Done static int bxe_stats_storm_update(struct bxe_softc *sc) { int rc, i, cl_id; struct eth_stats_query *stats; + struct bxe_port_stats *estats; struct host_func_stats *fstats; + struct bxe_q_stats *qstats; struct tstorm_per_port_stats *tport; struct tstorm_per_client_stats *tclient; struct ustorm_per_client_stats *uclient; @@ -8192,72 +8307,66 @@ bxe_stats_storm_update(struct bxe_softc *sc) struct tstorm_per_client_stats *old_tclient; struct ustorm_per_client_stats *old_uclient; struct xstorm_per_client_stats *old_xclient; - struct bxe_eth_stats *estats; - struct bxe_q_stats *qstats; struct bxe_fastpath * fp; uint32_t diff; DBENTER(BXE_INSANE_STATS); rc = 0; + diff = 0; stats = BXE_SP(sc, fw_stats); tport = &stats->tstorm_common.port_statistics; - fstats = BXE_SP(sc, func_stats); + memcpy(&(fstats->total_bytes_received_hi), &(BXE_SP(sc, func_stats_base)->total_bytes_received_hi), - sizeof(struct host_func_stats) - 2*sizeof(uint32_t)); + sizeof(struct host_func_stats) - 2 * sizeof(uint32_t)); - diff = 0; estats = &sc->eth_stats; estats->no_buff_discard_hi = 0; estats->no_buff_discard_lo = 0; estats->error_bytes_received_hi = 0; estats->error_bytes_received_lo = 0; -/* estats->etherstatsoverrsizepkts_hi = 0; + estats->etherstatsoverrsizepkts_hi = 0; estats->etherstatsoverrsizepkts_lo = 0; -*/ + for (i = 0; i < sc->num_queues; i++) { fp = &sc->fp[i]; cl_id = fp->cl_id; tclient = &stats->tstorm_common.client_statistics[cl_id]; - uclient = &stats->ustorm_common.client_statistics[cl_id]; - xclient = &stats->xstorm_common.client_statistics[cl_id]; old_tclient = &fp->old_tclient; + uclient = &stats->ustorm_common.client_statistics[cl_id]; old_uclient = &fp->old_uclient; + xclient = &stats->xstorm_common.client_statistics[cl_id]; old_xclient = &fp->old_xclient; qstats = &fp->eth_q_stats; - /* Are STORM statistics valid? */ + /* Are TSTORM statistics valid? */ if ((uint16_t)(le16toh(tclient->stats_counter) + 1) != sc->stats_counter) { -#if 0 DBPRINT(sc, BXE_WARN, "%s(): Stats not updated by TSTORM " "(tstorm counter (%d) != stats_counter (%d))!\n", __FUNCTION__, tclient->stats_counter, sc->stats_counter); -#endif rc = 1; goto bxe_stats_storm_update_exit; } + /* Are USTORM statistics valid? */ if ((uint16_t)(le16toh(uclient->stats_counter) + 1) != sc->stats_counter) { -#if 0 DBPRINT(sc, BXE_WARN, "%s(): Stats not updated by USTORM " "(ustorm counter (%d) != stats_counter (%d))!\n", __FUNCTION__, uclient->stats_counter, sc->stats_counter); -#endif rc = 2; goto bxe_stats_storm_update_exit; } + /* Are XSTORM statistics valid? */ if ((uint16_t)(le16toh(xclient->stats_counter) + 1) != sc->stats_counter) { -#if 0 DBPRINT(sc, BXE_WARN, "%s(): Stats not updated by XSTORM " "(xstorm counter (%d) != stats_counter (%d))!\n", __FUNCTION__, xclient->stats_counter, sc->stats_counter); -#endif rc = 3; goto bxe_stats_storm_update_exit; } @@ -8313,9 +8422,8 @@ bxe_stats_storm_update(struct bxe_softc *sc) total_multicast_packets_received); UPDATE_EXTEND_TSTAT(rcv_broadcast_pkts, total_broadcast_packets_received); -/* UPDATE_EXTEND_TSTAT(packets_too_big_discard, - etherstatsoverrsizepkts); -*/ + UPDATE_EXTEND_TSTAT(packets_too_big_discard, + etherstatsoverrsizepkts); UPDATE_EXTEND_TSTAT(no_buff_discard, no_buff_discard); SUB_EXTEND_USTAT(ucast_no_buff_pkts, @@ -8329,19 +8437,19 @@ bxe_stats_storm_update(struct bxe_softc *sc) UPDATE_EXTEND_USTAT(bcast_no_buff_pkts, no_buff_discard); qstats->total_bytes_transmitted_hi = - (xclient->unicast_bytes_sent.hi); + le32toh(xclient->unicast_bytes_sent.hi); qstats->total_bytes_transmitted_lo = - (xclient->unicast_bytes_sent.lo); + le32toh(xclient->unicast_bytes_sent.lo); ADD_64(qstats->total_bytes_transmitted_hi, - (xclient->multicast_bytes_sent.hi), + le32toh(xclient->multicast_bytes_sent.hi), qstats->total_bytes_transmitted_lo, - (xclient->multicast_bytes_sent.lo)); + le32toh(xclient->multicast_bytes_sent.lo)); ADD_64(qstats->total_bytes_transmitted_hi, - (xclient->broadcast_bytes_sent.hi), + le32toh(xclient->broadcast_bytes_sent.hi), qstats->total_bytes_transmitted_lo, - (xclient->broadcast_bytes_sent.lo)); + le32toh(xclient->broadcast_bytes_sent.lo)); UPDATE_EXTEND_XSTAT(unicast_pkts_sent, total_unicast_packets_transmitted); @@ -8356,63 +8464,72 @@ bxe_stats_storm_update(struct bxe_softc *sc) old_tclient->ttl0_discard = tclient->ttl0_discard; ADD_64(fstats->total_bytes_received_hi, - qstats->total_bytes_received_hi, - fstats->total_bytes_received_lo, - qstats->total_bytes_received_lo); + qstats->total_bytes_received_hi, + fstats->total_bytes_received_lo, + qstats->total_bytes_received_lo); ADD_64(fstats->total_bytes_transmitted_hi, - qstats->total_bytes_transmitted_hi, - fstats->total_bytes_transmitted_lo, - qstats->total_bytes_transmitted_lo); + qstats->total_bytes_transmitted_hi, + fstats->total_bytes_transmitted_lo, + qstats->total_bytes_transmitted_lo); ADD_64(fstats->total_unicast_packets_received_hi, - qstats->total_unicast_packets_received_hi, - fstats->total_unicast_packets_received_lo, - qstats->total_unicast_packets_received_lo); + qstats->total_unicast_packets_received_hi, + fstats->total_unicast_packets_received_lo, + qstats->total_unicast_packets_received_lo); ADD_64(fstats->total_multicast_packets_received_hi, - qstats->total_multicast_packets_received_hi, - fstats->total_multicast_packets_received_lo, - qstats->total_multicast_packets_received_lo); + qstats->total_multicast_packets_received_hi, + fstats->total_multicast_packets_received_lo, + qstats->total_multicast_packets_received_lo); ADD_64(fstats->total_broadcast_packets_received_hi, - qstats->total_broadcast_packets_received_hi, - fstats->total_broadcast_packets_received_lo, - qstats->total_broadcast_packets_received_lo); + qstats->total_broadcast_packets_received_hi, + fstats->total_broadcast_packets_received_lo, + qstats->total_broadcast_packets_received_lo); ADD_64(fstats->total_unicast_packets_transmitted_hi, - qstats->total_unicast_packets_transmitted_hi, - fstats->total_unicast_packets_transmitted_lo, - qstats->total_unicast_packets_transmitted_lo); + qstats->total_unicast_packets_transmitted_hi, + fstats->total_unicast_packets_transmitted_lo, + qstats->total_unicast_packets_transmitted_lo); ADD_64(fstats->total_multicast_packets_transmitted_hi, - qstats->total_multicast_packets_transmitted_hi, - fstats->total_multicast_packets_transmitted_lo, - qstats->total_multicast_packets_transmitted_lo); + qstats->total_multicast_packets_transmitted_hi, + fstats->total_multicast_packets_transmitted_lo, + qstats->total_multicast_packets_transmitted_lo); ADD_64(fstats->total_broadcast_packets_transmitted_hi, - qstats->total_broadcast_packets_transmitted_hi, - fstats->total_broadcast_packets_transmitted_lo, - qstats->total_broadcast_packets_transmitted_lo); + qstats->total_broadcast_packets_transmitted_hi, + fstats->total_broadcast_packets_transmitted_lo, + qstats->total_broadcast_packets_transmitted_lo); ADD_64(fstats->valid_bytes_received_hi, - qstats->valid_bytes_received_hi, - fstats->valid_bytes_received_lo, - qstats->valid_bytes_received_lo); + qstats->valid_bytes_received_hi, + fstats->valid_bytes_received_lo, + qstats->valid_bytes_received_lo); ADD_64(estats->error_bytes_received_hi, - qstats->error_bytes_received_hi, - estats->error_bytes_received_lo, - qstats->error_bytes_received_lo); - - ADD_64(estats->no_buff_discard_hi, qstats->no_buff_discard_hi, - estats->no_buff_discard_lo, qstats->no_buff_discard_lo); + qstats->error_bytes_received_hi, + estats->error_bytes_received_lo, + qstats->error_bytes_received_lo); + ADD_64(estats->etherstatsoverrsizepkts_hi, + qstats->etherstatsoverrsizepkts_hi, + estats->etherstatsoverrsizepkts_lo, + qstats->etherstatsoverrsizepkts_lo); + ADD_64(estats->no_buff_discard_hi, + qstats->no_buff_discard_hi, + estats->no_buff_discard_lo, + qstats->no_buff_discard_lo); } ADD_64(fstats->total_bytes_received_hi, - estats->rx_stat_ifhcinbadoctets_hi, - fstats->total_bytes_received_lo, - estats->rx_stat_ifhcinbadoctets_lo); + estats->rx_stat_ifhcinbadoctets_hi, + fstats->total_bytes_received_lo, + estats->rx_stat_ifhcinbadoctets_lo); memcpy(estats, &(fstats->total_bytes_received_hi), - sizeof(struct host_func_stats) - 2*sizeof(uint32_t)); + sizeof(struct host_func_stats) - 2 * sizeof(uint32_t)); + ADD_64(estats->etherstatsoverrsizepkts_hi, + estats->rx_stat_dot3statsframestoolong_hi, + estats->etherstatsoverrsizepkts_lo, + estats->rx_stat_dot3statsframestoolong_lo); ADD_64(estats->error_bytes_received_hi, - estats->rx_stat_ifhcinbadoctets_hi, - estats->error_bytes_received_lo, - estats->rx_stat_ifhcinbadoctets_lo); + estats->rx_stat_ifhcinbadoctets_hi, + estats->error_bytes_received_lo, + estats->rx_stat_ifhcinbadoctets_lo); if (sc->port.pmf) { estats->mac_filter_discard = @@ -8431,7 +8548,7 @@ bxe_stats_storm_update(struct bxe_softc *sc) bxe_stats_storm_update_exit: DBEXIT(BXE_INSANE_STATS); - return(rc); + return (rc); } /* @@ -8444,7 +8561,7 @@ static void bxe_stats_net_update(struct bxe_softc *sc) { struct tstorm_per_client_stats *old_tclient; - struct bxe_eth_stats *estats; + struct bxe_port_stats *estats; struct ifnet *ifp; DBENTER(BXE_INSANE_STATS); @@ -8469,7 +8586,6 @@ bxe_stats_net_update(struct bxe_softc *sc) (u_long) estats->no_buff_discard_lo + (u_long) estats->mac_discard + (u_long) estats->rx_stat_etherstatsundersizepkts_lo + - (u_long) estats->jabber_packets_received + (u_long) estats->brb_drop_lo + (u_long) estats->brb_truncate_discard + (u_long) estats->rx_stat_dot3statsfcserrors_lo + @@ -8515,7 +8631,7 @@ bxe_stats_update(struct bxe_softc *sc) goto bxe_stats_update_exit; /* Check for any hardware statistics updates. */ - if (sc->port.pmf) + if (sc->port.pmf == 1) update = (bxe_stats_hw_update(sc) == 0); /* Check for any STORM statistics updates. */ @@ -8637,10 +8753,11 @@ bxe_stats_stop(struct bxe_softc *sc) DBENTER(BXE_VERBOSE_STATS); update = 0; + /* Wait for any pending completions. */ bxe_stats_comp(sc); - if (sc->port.pmf) + if (sc->port.pmf == 1) update = (bxe_stats_hw_update(sc) == 0); update |= (bxe_stats_storm_update(sc) == 0); @@ -8648,7 +8765,7 @@ bxe_stats_stop(struct bxe_softc *sc) if (update) { bxe_stats_net_update(sc); - if (sc->port.pmf) + if (sc->port.pmf == 1) bxe_stats_port_stop(sc); bxe_stats_hw_post(sc); @@ -8667,7 +8784,8 @@ bxe_stats_stop(struct bxe_softc *sc) static void bxe_stats_do_nothing(struct bxe_softc *sc) { - + DBENTER(BXE_VERBOSE_STATS); + DBEXIT(BXE_VERBOSE_STATS); } static const struct { @@ -8701,9 +8819,10 @@ bxe_stats_handle(struct bxe_softc *sc, enum bxe_stats_event event) { enum bxe_stats_state state; - DBENTER(BXE_INSANE_STATS); + DBENTER(BXE_EXTREME_STATS); state = sc->stats_state; + #ifdef BXE_DEBUG if (event != STATS_EVENT_UPDATE) DBPRINT(sc, BXE_VERBOSE_STATS, @@ -8720,7 +8839,7 @@ bxe_stats_handle(struct bxe_softc *sc, enum bxe_stats_event event) __FUNCTION__, sc->stats_state); #endif - DBEXIT(BXE_INSANE_STATS); + DBEXIT(BXE_EXTREME_STATS); } /* @@ -8798,167 +8917,137 @@ bxe_tx_encap(struct bxe_fastpath *fp, struct mbuf **m_head) struct eth_tx_bd *tx_data_bd; struct eth_tx_bd *tx_total_pkt_size_bd; struct eth_tx_start_bd *tx_start_bd; - uint16_t etype, bd_prod, pkt_prod, total_pkt_size; + uint16_t etype, sw_tx_bd_prod, sw_pkt_prod, total_pkt_size; +// uint16_t bd_index, pkt_index; uint8_t mac_type; - int i, e_hlen, error, nsegs, rc, nbds, vlan_off, ovlan; + int i, defragged, e_hlen, error, nsegs, rc, nbds, vlan_off, ovlan; struct bxe_softc *sc; sc = fp->sc; DBENTER(BXE_VERBOSE_SEND); - rc = nbds = ovlan = vlan_off = total_pkt_size = 0; + DBRUN(M_ASSERTPKTHDR(*m_head)); m0 = *m_head; - - tx_total_pkt_size_bd = NULL; + rc = defragged = nbds = ovlan = vlan_off = total_pkt_size = 0; tx_start_bd = NULL; tx_data_bd = NULL; tx_parse_bd = NULL; + tx_total_pkt_size_bd = NULL; - pkt_prod = fp->tx_pkt_prod; - bd_prod = TX_BD(fp->tx_bd_prod); + /* Get the H/W pointer (0 to 65535) for packets and BD's. */ + sw_pkt_prod = fp->tx_pkt_prod; + sw_tx_bd_prod = fp->tx_bd_prod; - mac_type = UNICAST_ADDRESS; + /* Create the S/W index (0 to MAX_TX_BD) for packets and BD's. */ +// pkt_index = TX_BD(sw_pkt_prod); +// bd_index = TX_BD(sw_tx_bd_prod); -#ifdef BXE_DEBUG - int debug_prod; - DBRUN(debug_prod = bd_prod); -#endif + mac_type = UNICAST_ADDRESS; /* Map the mbuf into the next open DMAable memory. */ - map = fp->tx_mbuf_map[TX_BD(pkt_prod)]; + map = fp->tx_mbuf_map[TX_BD(sw_pkt_prod)]; error = bus_dmamap_load_mbuf_sg(fp->tx_mbuf_tag, map, m0, segs, &nsegs, BUS_DMA_NOWAIT); - do{ - /* Handle any mapping errors. */ - if(__predict_false(error)){ - fp->tx_dma_mapping_failure++; - if (error == ENOMEM) { - /* Resource issue, try again later. */ - rc = ENOMEM; - }else if (error == EFBIG) { - /* Possibly recoverable. */ - fp->mbuf_defrag_attempts++; - m0 = m_defrag(*m_head, M_DONTWAIT); - if (m0 == NULL) { - fp->mbuf_defrag_failures++; - rc = ENOBUFS; - } else { - /* Defrag was successful, try mapping again.*/ - fp->mbuf_defrag_successes++; - *m_head = m0; - error = - bus_dmamap_load_mbuf_sg( - fp->tx_mbuf_tag, map, m0, - segs, &nsegs, BUS_DMA_NOWAIT); - if (error) { - fp->tx_dma_mapping_failure++; - rc = error; - } - } - }else { - /* Unrecoverable. */ - DBPRINT(sc, BXE_WARN_SEND, - "%s(): Unknown TX mapping error! " - "rc = %d.\n", __FUNCTION__, error); - DBRUN(bxe_dump_mbuf(sc, m0)); - rc = error; - } - - break; - } - - /* Make sure this enough room in the send queue. */ - if (__predict_false((nsegs + 2) > - (USABLE_TX_BD - fp->used_tx_bd))) { - fp->tx_queue_too_full++; - bus_dmamap_unload(fp->tx_mbuf_tag, map); - rc = ENOBUFS; - break; - } - - /* Now make sure it fits in the pkt window */ - if (__predict_false(nsegs > 12)) { - - /* - * The mbuf may be to big for the controller - * to handle. If the frame is a TSO frame - * we'll need to do an additional check. - */ - if(m0->m_pkthdr.csum_flags & CSUM_TSO){ - if (bxe_chktso_window(sc,nsegs,segs,m0) == 0) - /* OK to send. */ - break; - else - fp->window_violation_tso++; - } else - fp->window_violation_std++; - - /* - * If this is a standard frame then defrag is - * required. Unmap the mbuf, defrag it, then - * try mapping it again. - */ + /* Handle any mapping errors. */ + if(__predict_false(error != 0)){ + fp->tx_dma_mapping_failure++; + if (error == ENOMEM) { + /* Resource issue, try again later. */ + rc = ENOMEM; + } else if (error == EFBIG) { + /* Possibly recoverable with defragmentation. */ fp->mbuf_defrag_attempts++; - bus_dmamap_unload(fp->tx_mbuf_tag, map); m0 = m_defrag(*m_head, M_DONTWAIT); if (m0 == NULL) { fp->mbuf_defrag_failures++; rc = ENOBUFS; - break; + } else { + /* Defrag successful, try mapping again.*/ + *m_head = m0; + error = bus_dmamap_load_mbuf_sg( + fp->tx_mbuf_tag, map, m0, + segs, &nsegs, BUS_DMA_NOWAIT); + if (error) { + fp->tx_dma_mapping_failure++; + rc = error; + } } + } else { + /* Unknown, unrecoverable mapping error. */ + DBPRINT(sc, BXE_WARN_SEND, + "%s(): Unknown TX mapping error! " + "rc = %d.\n", __FUNCTION__, error); + DBRUN(bxe_dump_mbuf(sc, m0)); + rc = error; + } - /* Defrag was successful, try mapping again. */ - fp->mbuf_defrag_successes++; - *m_head = m0; - error = - bus_dmamap_load_mbuf_sg( - fp->tx_mbuf_tag, map, m0, - segs, &nsegs, BUS_DMA_NOWAIT); - - /* Handle any mapping errors. */ - if (__predict_false(error)) { - fp->tx_dma_mapping_failure++; - rc = error; - break; - } + goto bxe_tx_encap_continue; + } - /* Last try */ - if (m0->m_pkthdr.csum_flags & CSUM_TSO){ - if (bxe_chktso_window(sc,nsegs,segs,m0) == 1) - rc = ENOBUFS; - } else if (nsegs > 12 ){ - rc = ENOBUFS; - } else - rc = 0; - } - }while (0); + /* Make sure there's enough room in the send queue. */ + if (__predict_false((nsegs + 2) > + (USABLE_TX_BD - fp->tx_bd_used))) { + /* Recoverable, try again later. */ + fp->tx_hw_queue_full++; + bus_dmamap_unload(fp->tx_mbuf_tag, map); + rc = ENOMEM; + goto bxe_tx_encap_continue; + } + + /* Capture the current H/W TX chain high watermark. */ + if (__predict_false(fp->tx_hw_max_queue_depth < + fp->tx_bd_used)) + fp->tx_hw_max_queue_depth = fp->tx_bd_used; + + /* Now make sure it fits in the packet window. */ + if (__predict_false(nsegs > 12)) { + /* + * The mbuf may be to big for the controller + * to handle. If the frame is a TSO frame + * we'll need to do an additional check. + */ + if(m0->m_pkthdr.csum_flags & CSUM_TSO){ + if (bxe_chktso_window(sc,nsegs,segs,m0) == 0) + /* OK to send. */ + goto bxe_tx_encap_continue; + else + fp->tx_window_violation_tso++; + } else + fp->tx_window_violation_std++; + /* No sense trying to defrag again, we'll drop the frame. */ + if (defragged > 0) + rc = ENODEV; + } + +bxe_tx_encap_continue: /* Check for errors */ if (rc){ if(rc == ENOMEM){ /* Recoverable try again later */ }else{ - fp->soft_tx_errors++; - DBRUN(fp->tx_mbuf_alloc--); + fp->tx_soft_errors++; + fp->tx_mbuf_alloc--; m_freem(*m_head); *m_head = NULL; } - return (rc); + goto bxe_tx_encap_exit; } - /* We're committed to sending the frame, update the counter. */ - fp->tx_pkt_prod++; + /* Save the mbuf and mapping. */ + fp->tx_mbuf_ptr[TX_BD(sw_pkt_prod)] = m0; + fp->tx_mbuf_map[TX_BD(sw_pkt_prod)] = map; - /* set flag according to packet type (UNICAST_ADDRESS is default)*/ + /* Set flag according to packet type (UNICAST_ADDRESS is default). */ if (m0->m_flags & M_BCAST) mac_type = BROADCAST_ADDRESS; else if (m0->m_flags & M_MCAST) mac_type = MULTICAST_ADDRESS; - /* Prepare the first transmit BD for the mbuf(Get a link from the chain). */ - tx_start_bd = &fp->tx_bd_chain[TX_PAGE(bd_prod)][TX_IDX(bd_prod)].start_bd; + /* Prepare the first transmit (Start) BD for the mbuf. */ + tx_start_bd = &fp->tx_chain[TX_BD(sw_tx_bd_prod)].start_bd; tx_start_bd->addr_lo = htole32(U64_LO(segs[0].ds_addr)); tx_start_bd->addr_hi = htole32(U64_HI(segs[0].ds_addr)); @@ -8970,32 +9059,29 @@ bxe_tx_encap(struct bxe_fastpath *fp, struct mbuf **m_head) tx_start_bd->general_data |= (1 << ETH_TX_START_BD_HDR_NBDS_SHIFT); - nbds = nsegs + 1; /* Add 1 for parsing bd. Assuming nseg > 0 */ + /* All frames have at least Start BD + Parsing BD. */ + nbds = nsegs + 1; tx_start_bd->nbd = htole16(nbds); if (m0->m_flags & M_VLANTAG) { -// vlan_off += ETHER_VLAN_ENCAP_LEN; tx_start_bd->bd_flags.as_bitfield |= ETH_TX_BD_FLAGS_VLAN_TAG; tx_start_bd->vlan = htole16(m0->m_pkthdr.ether_vtag); - DBPRINT(sc, BXE_VERBOSE_SEND, "%s(): Inserting VLAN tag %d\n", - __FUNCTION__, m0->m_pkthdr.ether_vtag); - } - else + } else /* * In cases where the VLAN tag is not used the firmware * expects to see a packet counter in the VLAN tag field * Failure to do so will cause an assertion which will * stop the controller. */ - tx_start_bd->vlan = htole16(pkt_prod); + tx_start_bd->vlan = htole16(fp->tx_pkt_prod); /* - * Add a parsing BD from the chain. The parsing bd is always added, - * however, it is only used for tso & chksum. + * Add a parsing BD from the chain. The parsing BD is always added, + * however, it is only used for TSO & chksum. */ - bd_prod = TX_BD(NEXT_TX_BD(bd_prod)); + sw_tx_bd_prod = NEXT_TX_BD(sw_tx_bd_prod); tx_parse_bd = (struct eth_tx_parse_bd *) - &fp->tx_bd_chain[TX_PAGE(bd_prod)][TX_IDX(bd_prod)].parse_bd; + &fp->tx_chain[TX_BD(sw_tx_bd_prod)].parse_bd; memset(tx_parse_bd, 0, sizeof(struct eth_tx_parse_bd)); /* Gather all info about the packet and add to tx_parse_bd */ @@ -9006,7 +9092,7 @@ bxe_tx_encap(struct bxe_fastpath *fp, struct mbuf **m_head) uint16_t flags = 0; struct udphdr *uh = NULL; - /* Map the Ethernet header to find the type & header length. */ + /* Map Ethernet header to find type & header length. */ eh = mtod(m0, struct ether_vlan_header *); /* Handle VLAN encapsulation if present. */ @@ -9024,23 +9110,22 @@ bxe_tx_encap(struct bxe_fastpath *fp, struct mbuf **m_head) ETH_TX_PARSE_BD_LLC_SNAP_EN_SHIFT); switch (etype) { - case ETHERTYPE_IP:{ - /* if mbuf's len < 20bytes, the ip_hdr is in next mbuf*/ + case ETHERTYPE_IP: + /* If mbuf len < 20bytes, IP header is in next mbuf. */ if (m0->m_len < sizeof(struct ip)) - ip = (struct ip *)m0->m_next->m_data; + ip = (struct ip *) m0->m_next->m_data; else - ip = (struct ip *)(m0->m_data + e_hlen); + ip = (struct ip *) (m0->m_data + e_hlen); /* Calculate IP header length (16 bit words). */ tx_parse_bd->ip_hlen = (ip->ip_hl << 1); /* Calculate enet + IP header length (16 bit words). */ - tx_parse_bd->total_hlen = tx_parse_bd->ip_hlen + (e_hlen >> 1); + tx_parse_bd->total_hlen = tx_parse_bd->ip_hlen + + (e_hlen >> 1); if (m0->m_pkthdr.csum_flags & CSUM_IP) { - DBPRINT(sc, BXE_EXTREME_SEND, "%s(): IP checksum " - "enabled.\n", __FUNCTION__); - fp->offload_frames_csum_ip++; + fp->tx_offload_frames_csum_ip++; flags |= ETH_TX_BD_FLAGS_IP_CSUM; } @@ -9048,132 +9133,130 @@ bxe_tx_encap(struct bxe_fastpath *fp, struct mbuf **m_head) if ((m0->m_pkthdr.csum_flags & CSUM_TCP)|| (m0->m_pkthdr.csum_flags & CSUM_TSO)){ - /* Perform TCP checksum offload. */ - DBPRINT(sc, BXE_EXTREME_SEND, "%s(): TCP checksum " - "enabled.\n", __FUNCTION__); - /* Get the TCP header. */ - th = (struct tcphdr *)((caddr_t)ip + (ip->ip_hl << 2)); + th = (struct tcphdr *)((caddr_t)ip + + (ip->ip_hl << 2)); /* Add the TCP checksum offload flag. */ flags |= ETH_TX_BD_FLAGS_L4_CSUM; - fp->offload_frames_csum_tcp++; + fp->tx_offload_frames_csum_tcp++; /* Update the enet + IP + TCP header length. */ - tx_parse_bd->total_hlen += (uint16_t)(th->th_off << 1); + tx_parse_bd->total_hlen += + (uint16_t)(th->th_off << 1); /* Get the pseudo header checksum. */ - tx_parse_bd->tcp_pseudo_csum = ntohs(th->th_sum); + tx_parse_bd->tcp_pseudo_csum = + ntohs(th->th_sum); + } else if (m0->m_pkthdr.csum_flags & CSUM_UDP) { /* - * The hardware doesn't actually support UDP checksum - * offload but we can fake it by doing TCP checksum - * offload and factoring out the extra bytes that are - * different between the TCP header and the UDP header. - * calculation will begin 10 bytes before the actual - * start of the UDP header. To work around this we - * need to calculate the checksum of the 10 bytes - * before the UDP header and factor that out of the - * UDP pseudo header checksum before asking the H/W - * to calculate the full UDP checksum. + * The hardware doesn't actually support UDP + * checksum offload but we can fake it by + * doing TCP checksum offload and factoring + * out the extra bytes that are different + * between the TCP header and the UDP header. + * + * Calculation will begin 10 bytes before the + * actual start of the UDP header. To work + * around this we need to calculate the + * checksum of the 10 bytes before the UDP + * header and factor that out of the UDP + * pseudo header checksum before asking the + * H/W to calculate the full UDP checksum. */ uint16_t tmp_csum; uint32_t *tmp_uh; /* This value is 10. */ - uint8_t fix = (uint8_t) (offsetof(struct tcphdr, th_sum) - - (int) offsetof(struct udphdr, uh_sum)); - - /* Perform UDP checksum offload. */ - DBPRINT(sc, BXE_EXTREME_SEND, "%s(): UDP checksum " - "enabled.\n", __FUNCTION__); + uint8_t fix = (uint8_t) (offsetof(struct tcphdr, th_sum) - + (int) offsetof(struct udphdr, uh_sum)); - /* Add the TCP checksum offload flag for UDP frames too. */ + /* + * Add the TCP checksum offload flag for + * UDP frames too.* + */ flags |= ETH_TX_BD_FLAGS_L4_CSUM; - fp->offload_frames_csum_udp++; - tx_parse_bd->global_data |= ETH_TX_PARSE_BD_UDP_CS_FLG; + fp->tx_offload_frames_csum_udp++; + tx_parse_bd->global_data |= + ETH_TX_PARSE_BD_UDP_CS_FLG; /* Get a pointer to the UDP header. */ - uh = (struct udphdr *)((caddr_t)ip + (ip->ip_hl << 2)); + uh = (struct udphdr *)((caddr_t)ip + + (ip->ip_hl << 2)); - /* Set a pointer 10 bytes before the actual UDP header. */ - tmp_uh = (uint32_t *)((uint8_t *)uh - fix); + /* Set pointer 10 bytes before UDP header. */ + tmp_uh = (uint32_t *)((uint8_t *)uh - + fix); /* - * Calculate a pseudo header checksum over the 10 bytes - * before the UDP header. + * Calculate a pseudo header checksum over + * the 10 bytes before the UDP header. */ tmp_csum = in_pseudo(ntohl(*tmp_uh), - ntohl(*(tmp_uh + 1)), - ntohl((*(tmp_uh + 2)) & 0x0000FFFF)); + ntohl(*(tmp_uh + 1)), + ntohl((*(tmp_uh + 2)) & 0x0000FFFF)); /* Update the enet + IP + UDP header length. */ - tx_parse_bd->total_hlen += (sizeof(struct udphdr) >> 1); - tx_parse_bd->tcp_pseudo_csum = ~in_addword(uh->uh_sum, ~tmp_csum); + tx_parse_bd->total_hlen += + (sizeof(struct udphdr) >> 1); + tx_parse_bd->tcp_pseudo_csum = + ~in_addword(uh->uh_sum, ~tmp_csum); } - /* Update the flags settings for VLAN/Offload. */ + /* Update the offload flags. */ tx_start_bd->bd_flags.as_bitfield |= flags; - break; - } + case ETHERTYPE_IPV6: - fp->unsupported_tso_request_ipv6++; - /* DRC - How to handle this error? */ + fp->tx_unsupported_tso_request_ipv6++; + /* ToDo: Add IPv6 support. */ break; default: - fp->unsupported_tso_request_not_tcp++; - /* DRC - How to handle this error? */ + fp->tx_unsupported_tso_request_not_tcp++; + /* ToDo - How to handle this error? */ } /* Setup the Parsing BD with TSO specific info */ if (m0->m_pkthdr.csum_flags & CSUM_TSO) { - uint16_t hdr_len = tx_parse_bd->total_hlen << 1; - DBPRINT(sc, BXE_EXTREME_SEND, "%s(): TSO is enabled.\n", - __FUNCTION__); - - tx_start_bd->bd_flags.as_bitfield |= ETH_TX_BD_FLAGS_SW_LSO; + tx_start_bd->bd_flags.as_bitfield |= + ETH_TX_BD_FLAGS_SW_LSO; + fp->tx_offload_frames_tso++; - fp->offload_frames_tso++; - if (__predict_false(tx_start_bd->nbytes > hdr_len)) { + /* ToDo: Does this really help? */ + if (__predict_false(tx_start_bd->nbytes > hdr_len)) { + fp->tx_header_splits++; /* * Split the first BD into 2 BDs to make the - * FW job easy... + * firmwares job easy... */ tx_start_bd->nbd++; DBPRINT(sc, BXE_EXTREME_SEND, "%s(): TSO split headr size is %d (%x:%x) nbds %d\n", - __FUNCTION__, tx_start_bd->nbytes, tx_start_bd->addr_hi, + __FUNCTION__, tx_start_bd->nbytes, + tx_start_bd->addr_hi, tx_start_bd->addr_lo, nbds); - bd_prod = TX_BD(NEXT_TX_BD(bd_prod)); - - /* Get a new transmit BD (after the tx_parse_bd) and fill it. */ - tx_data_bd = &fp->tx_bd_chain[TX_PAGE(bd_prod)][TX_IDX(bd_prod)].reg_bd; - tx_data_bd->addr_hi = htole32(U64_HI(segs[0].ds_addr + hdr_len)); - tx_data_bd->addr_lo = htole32(U64_LO(segs[0].ds_addr + hdr_len)); - tx_data_bd->nbytes = htole16(segs[0].ds_len) - hdr_len; + sw_tx_bd_prod = NEXT_TX_BD(sw_tx_bd_prod); + + /* New transmit BD (after the tx_parse_bd). */ + tx_data_bd = + &fp->tx_chain[TX_BD(sw_tx_bd_prod)].reg_bd; + tx_data_bd->addr_hi = + htole32(U64_HI(segs[0].ds_addr + hdr_len)); + tx_data_bd->addr_lo = + htole32(U64_LO(segs[0].ds_addr + hdr_len)); + tx_data_bd->nbytes = + htole16(segs[0].ds_len) - hdr_len; if (tx_total_pkt_size_bd == NULL) tx_total_pkt_size_bd = tx_data_bd; - - /* - * This indicates that the transmit BD - * has no individual mapping and the - * FW ignores this flag in a BD that is - * not marked with the start flag. - */ - - DBPRINT(sc, BXE_EXTREME_SEND, - "%s(): TSO split data size is %d (%x:%x)\n", - __FUNCTION__, tx_data_bd->nbytes, - tx_data_bd->addr_hi, tx_data_bd->addr_lo); } /* - * For TSO the controller needs the following info: + * The controller needs the following info for TSO: * MSS, tcp_send_seq, ip_id, and tcp_pseudo_csum. */ tx_parse_bd->lso_mss = htole16(m0->m_pkthdr.tso_segsz); @@ -9190,10 +9273,10 @@ bxe_tx_encap(struct bxe_fastpath *fp, struct mbuf **m_head) } } - /* Prepare Remaining BDs. Start_tx_bd contains first seg(frag). */ + /* Prepare remaining BDs. Start_tx_bd contains first seg (frag). */ for (i = 1; i < nsegs ; i++) { - bd_prod = TX_BD(NEXT_TX_BD(bd_prod)); - tx_data_bd = &fp->tx_bd_chain[TX_PAGE(bd_prod)][TX_IDX(bd_prod)].reg_bd; + sw_tx_bd_prod = NEXT_TX_BD(sw_tx_bd_prod); + tx_data_bd = &fp->tx_chain[TX_BD(sw_tx_bd_prod)].reg_bd; tx_data_bd->addr_lo = htole32(U64_LO(segs[i].ds_addr)); tx_data_bd->addr_hi = htole32(U64_HI(segs[i].ds_addr)); tx_data_bd->nbytes = htole16(segs[i].ds_len); @@ -9205,56 +9288,27 @@ bxe_tx_encap(struct bxe_fastpath *fp, struct mbuf **m_head) if(tx_total_pkt_size_bd != NULL) tx_total_pkt_size_bd->total_pkt_bytes = total_pkt_size; - /* Update bd producer index value for next tx */ - bd_prod = TX_BD(NEXT_TX_BD(bd_prod)); - DBRUNMSG(BXE_EXTREME_SEND, bxe_dump_tx_chain(fp, debug_prod, nbds)); - - /* - * Ensure that the mbuf pointer for this - * transmission is placed at the array index - * of the last descriptor in this chain. - * This is done because a single map is used - * for all segments of the mbuf and we don't - * want to unload the map before all of the - * segments have been freed. - */ - fp->tx_mbuf_ptr[TX_BD(pkt_prod)] = m0; + /* Update TX BD producer index value for next TX */ + sw_tx_bd_prod = NEXT_TX_BD(sw_tx_bd_prod); - fp->used_tx_bd += nbds; + /* Update the used TX BD counter. */ + fp->tx_bd_used += nbds; /* - * Ring the tx doorbell, counting the next - * bd if the packet contains or ends with it. + * If the chain of tx_bd's describing this frame + * is adjacent to or spans an eth_tx_next_bd element + * then we need to increment the nbds value. */ - if(TX_IDX(bd_prod) < nbds) + if(TX_IDX(sw_tx_bd_prod) < nbds) nbds++; -//BXE_PRINTF("nsegs:%d, tpktsz:0x%x\n",nsegs, total_pkt_size) ; - - /* - * Update the buffer descriptor producer count and the packet - * producer count in doorbell data memory (eth_tx_db_data) then - * ring the doorbell. - */ -/* fp->hw_tx_prods->bds_prod = - htole16(le16toh(fp->hw_tx_prods->bds_prod) + nbds); -*/ - - /* Don't allow reordering of writes for nbd and packets. */ mb(); -/* - fp->hw_tx_prods->packets_prod = - htole32(le32toh(fp->hw_tx_prods->packets_prod) + 1); -*/ -// DOORBELL(sc, fp->index, 0); - -// BXE_PRINTF("doorbell: nbd %d bd %u index %d\n", nbds, bd_prod, fp->index); - fp->tx_db.data.prod += nbds; /* Producer points to the next free tx_bd at this point. */ - fp->tx_bd_prod = bd_prod; + fp->tx_pkt_prod++; + fp->tx_bd_prod = sw_tx_bd_prod; DOORBELL(sc, fp->index, fp->tx_db.raw); @@ -9268,8 +9322,9 @@ bxe_tx_encap(struct bxe_fastpath *fp, struct mbuf **m_head) bus_space_barrier(sc->bxe_db_btag, sc->bxe_db_bhandle, 0, 0, BUS_SPACE_BARRIER_READ); +bxe_tx_encap_exit: DBEXIT(BXE_VERBOSE_SEND); - return(rc); + return (rc); } @@ -9291,7 +9346,7 @@ bxe_tx_start(struct ifnet *ifp) /* Exit if the transmit queue is full or link down. */ if (((ifp->if_drv_flags & (IFF_DRV_RUNNING | IFF_DRV_OACTIVE)) != IFF_DRV_RUNNING) || !sc->link_vars.link_up) { - DBPRINT(sc, BXE_VERBOSE_SEND, + DBPRINT(sc, BXE_WARN, "%s(): No link or TX queue full, ignoring " "transmit request.\n", __FUNCTION__); goto bxe_tx_start_exit; @@ -9336,7 +9391,7 @@ bxe_tx_start_locked(struct ifnet *ifp, struct bxe_fastpath *fp) break; /* The transmit mbuf now belongs to us, keep track of it. */ - DBRUN(fp->tx_mbuf_alloc++); + fp->tx_mbuf_alloc++; /* * Pack the data into the transmit ring. If we @@ -9354,8 +9409,8 @@ bxe_tx_start_locked(struct ifnet *ifp, struct bxe_fastpath *fp) */ ifp->if_drv_flags |= IFF_DRV_OACTIVE; IFQ_DRV_PREPEND(&ifp->if_snd, m); - DBRUN(fp->tx_mbuf_alloc--); - sc->eth_stats.driver_xoff++; + fp->tx_mbuf_alloc--; + fp->tx_queue_xoff++; } else { } @@ -9375,8 +9430,6 @@ bxe_tx_start_locked(struct ifnet *ifp, struct bxe_fastpath *fp) if (tx_count > 0) /* Reset the TX watchdog timeout timer. */ fp->watchdog_timer = BXE_TX_TIMEOUT; - else - fp->tx_start_called_on_empty_queue++; DBEXIT(BXE_EXTREME_SEND); } @@ -9391,41 +9444,27 @@ bxe_tx_start_locked(struct ifnet *ifp, struct bxe_fastpath *fp) static int bxe_tx_mq_start(struct ifnet *ifp, struct mbuf *m) { - struct bxe_softc *sc; - struct bxe_fastpath *fp; - int fp_index, rc; + struct bxe_softc *sc; + struct bxe_fastpath *fp; + int fp_index, rc; sc = ifp->if_softc; - fp_index = 0; - DBENTER(BXE_EXTREME_SEND); - /* Map the flow ID to a queue number. */ - if ((m->m_flags & M_FLOWID) != 0) { - fp_index = m->m_pkthdr.flowid % sc->num_queues; - DBPRINT(sc, BXE_EXTREME_SEND, - "%s(): Found flowid %d\n", - __FUNCTION__, fp_index); - } else { - DBPRINT(sc, BXE_EXTREME_SEND, - "%s(): No flowid found, using %d\n", - __FUNCTION__, fp_index); - } + fp_index = 0; + /* If using flow ID, assign the TX queue based on the flow ID. */ + if ((m->m_flags & M_FLOWID) != 0) + fp_index = m->m_pkthdr.flowid % sc->num_queues; /* Select the fastpath TX queue for the frame. */ fp = &sc->fp[fp_index]; - /* Exit if the transmit queue is full or link down. */ + /* Skip H/W enqueue if transmit queue is full or link down. */ if (((ifp->if_drv_flags & (IFF_DRV_RUNNING | IFF_DRV_OACTIVE)) != IFF_DRV_RUNNING) || !sc->link_vars.link_up) { - /* We're stuck with the mbuf. Stash it for now. */ - DBPRINT(sc, BXE_EXTREME_SEND, - "%s(): TX queue full/link down, " - "parking mbuf...\n", __FUNCTION__); + /* Stash the mbuf if we can. */ rc = drbr_enqueue(ifp, fp->br, m); - /* DRC - Setup a task to try again. */ - /* taskqueue_enqueue(tq, task); */ goto bxe_tx_mq_start_exit; } @@ -9435,12 +9474,13 @@ bxe_tx_mq_start(struct ifnet *ifp, struct mbuf *m) bxe_tx_mq_start_exit: DBEXIT(BXE_EXTREME_SEND); - return(rc); + return (rc); } /* - * Multiqueue (TSS) transmit routine. + * Multiqueue (TSS) transmit routine. This routine is responsible + * for adding a frame to the hardware's transmit queue. * * Returns: * 0 if transmit succeeds, !0 otherwise. @@ -9451,55 +9491,40 @@ bxe_tx_mq_start_locked(struct ifnet *ifp, { struct bxe_softc *sc; struct mbuf *next; - int depth, rc = 0, tx_count = 0; + int depth, rc, tx_count; sc = fp->sc; - DBENTER(BXE_EXTREME_SEND); + + rc = tx_count = 0; + + /* Fetch the depth of the driver queue. */ depth = drbr_inuse(ifp, fp->br); - if (depth > fp->max_drbr_queue_depth) { - fp->max_drbr_queue_depth = depth; - } - DBPRINT(sc, BXE_EXTREME_SEND, - "%s(): fp[%02d], drbr queue depth=%d\n", - __FUNCTION__, fp->index, depth); + if (depth > fp->tx_max_drbr_queue_depth) + fp->tx_max_drbr_queue_depth = depth; BXE_FP_LOCK_ASSERT(fp); if (m == NULL) { - /* Check for any other work. */ - DBPRINT(sc, BXE_EXTREME_SEND, - "%s(): No initial work, dequeue mbuf...\n", - __FUNCTION__); + /* No new work, check for pending frames. */ next = drbr_dequeue(ifp, fp->br); } else if (drbr_needs_enqueue(ifp, fp->br)) { - /* Work pending, queue mbuf to maintain packet order. */ - DBPRINT(sc, BXE_EXTREME_SEND, - "%s(): Found queued data pending...\n", - __FUNCTION__); - if ((rc = drbr_enqueue(ifp, fp->br, m)) != 0) { - DBPRINT(sc, BXE_EXTREME_SEND, - "%s(): Enqueue failed...\n", - __FUNCTION__); + /* Both new and pending work, maintain packet order. */ + rc = drbr_enqueue(ifp, fp->br, m); + if (rc != 0) { + fp->tx_soft_errors++; goto bxe_tx_mq_start_locked_exit; } - DBPRINT(sc, BXE_EXTREME_SEND, - "%s(): Dequeueing old mbuf...\n", - __FUNCTION__); next = drbr_dequeue(ifp, fp->br); - } else { - /* Work with the mbuf we have. */ - DBPRINT(sc, BXE_EXTREME_SEND, - "%s(): Start with current mbuf...\n", - __FUNCTION__); + } else + /* New work only, nothing pending. */ next = m; - } /* Keep adding entries while there are frames to send. */ while (next != NULL) { /* The transmit mbuf now belongs to us, keep track of it. */ - DBRUN(fp->tx_mbuf_alloc++); + fp->tx_mbuf_alloc++; /* * Pack the data into the transmit ring. If we @@ -9507,9 +9532,8 @@ bxe_tx_mq_start_locked(struct ifnet *ifp, * head of the TX queue, set the OACTIVE flag, * and wait for the NIC to drain the chain. */ - if (__predict_false(bxe_tx_encap(fp, &next))) { - DBPRINT(sc, BXE_WARN, "%s(): TX encap failure...\n", - __FUNCTION__); + rc = bxe_tx_encap(fp, &next); + if (__predict_false(rc != 0)) { fp->tx_encap_failures++; /* Very Bad Frames(tm) may have been dropped. */ if (next != NULL) { @@ -9518,12 +9542,11 @@ bxe_tx_mq_start_locked(struct ifnet *ifp, * the frame. */ ifp->if_drv_flags |= IFF_DRV_OACTIVE; - DBPRINT(sc, BXE_EXTREME_SEND, - "%s(): Save mbuf for another time...\n", - __FUNCTION__); + fp->tx_frame_deferred++; + + /* This may reorder frame. */ rc = drbr_enqueue(ifp, fp->br, next); - DBRUN(fp->tx_mbuf_alloc--); - sc->eth_stats.driver_xoff++; + fp->tx_mbuf_alloc--; } /* Stop looking for more work. */ @@ -9536,27 +9559,27 @@ bxe_tx_mq_start_locked(struct ifnet *ifp, /* Send a copy of the frame to any BPF listeners. */ BPF_MTAP(ifp, next); - DBPRINT(sc, BXE_EXTREME_SEND, - "%s(): Check for queued mbufs...\n", - __FUNCTION__); + /* Handle any completions if we're running low. */ + if (fp->tx_bd_used >= BXE_TX_CLEANUP_THRESHOLD) + bxe_txeof(fp); + + /* Close TX since there's so little room left. */ + if (fp->tx_bd_used >= BXE_TX_CLEANUP_THRESHOLD) { + ifp->if_drv_flags &= ~IFF_DRV_OACTIVE; + break; + } + next = drbr_dequeue(ifp, fp->br); } - DBPRINT(sc, BXE_EXTREME_SEND, - "%s(): Enqueued %d mbufs...\n", - __FUNCTION__, tx_count); - /* No TX packets were dequeued. */ - if (tx_count > 0) { + if (tx_count > 0) /* Reset the TX watchdog timeout timer. */ fp->watchdog_timer = BXE_TX_TIMEOUT; - } else { - fp->tx_start_called_on_empty_queue++; - } bxe_tx_mq_start_locked_exit: DBEXIT(BXE_EXTREME_SEND); - return(rc); + return (rc); } @@ -9575,10 +9598,11 @@ bxe_mq_flush(struct ifnet *ifp) for (i = 0; i < sc->num_queues; i++) { fp = &sc->fp[i]; - DBPRINT(sc, BXE_VERBOSE_UNLOAD, "%s(): Clearing fp[%02d]...\n", - __FUNCTION__, fp->index); - if (fp->br != NULL) { + DBPRINT(sc, BXE_VERBOSE_UNLOAD, + "%s(): Clearing fp[%02d]...\n", + __FUNCTION__, fp->index); + BXE_FP_LOCK(fp); while ((m = buf_ring_dequeue_sc(fp->br)) != NULL) m_freem(m); @@ -9607,7 +9631,7 @@ bxe_ioctl(struct ifnet *ifp, u_long command, caddr_t data) int error, mask, reinit; sc = ifp->if_softc; - DBENTER(BXE_EXTREME_MISC); + DBENTER(BXE_VERBOSE_LOAD | BXE_VERBOSE_RESET | BXE_VERBOSE_MISC); ifr = (struct ifreq *)data; error = 0; @@ -9616,72 +9640,65 @@ bxe_ioctl(struct ifnet *ifp, u_long command, caddr_t data) switch (command) { case SIOCSIFMTU: /* Set the MTU. */ - DBPRINT(sc, BXE_EXTREME_MISC, "%s(): Received SIOCSIFMTU\n", + DBPRINT(sc, BXE_VERBOSE_MISC, "%s(): Received SIOCSIFMTU\n", __FUNCTION__); /* Check that the MTU setting is supported. */ if ((ifr->ifr_mtu < BXE_MIN_MTU) || - (ifr->ifr_mtu > BXE_JUMBO_MTU)) { - DBPRINT(sc, BXE_WARN, "%s(): Unsupported MTU " - "(%d < %d < %d)!\n", __FUNCTION__, BXE_MIN_MTU, - ifr->ifr_mtu, BXE_JUMBO_MTU); + (ifr->ifr_mtu > BXE_JUMBO_MTU)) { error = EINVAL; break; } BXE_CORE_LOCK(sc); ifp->if_mtu = ifr->ifr_mtu; - bxe_change_mtu(sc, ifp->if_drv_flags & IFF_DRV_RUNNING); BXE_CORE_UNLOCK(sc); + + reinit = 1; break; case SIOCSIFFLAGS: /* Toggle the interface state up or down. */ - DBPRINT(sc, BXE_EXTREME_MISC, "%s(): Received SIOCSIFFLAGS\n", + DBPRINT(sc, BXE_VERBOSE_MISC, "%s(): Received SIOCSIFFLAGS\n", __FUNCTION__); BXE_CORE_LOCK(sc); - /* Check if the interface is up. */ if (ifp->if_flags & IFF_UP) { if (ifp->if_drv_flags & IFF_DRV_RUNNING) { - /* - * Change the promiscuous/multicast flags as - * necessary. - */ + /* Set promiscuous/multicast flags. */ bxe_set_rx_mode(sc); } else { /* Start the HW */ bxe_init_locked(sc, LOAD_NORMAL); } } else { - /* - * The interface is down. Check if the driver is - * running. - */ + /* Bring down the interface. */ if (ifp->if_drv_flags & IFF_DRV_RUNNING) bxe_stop_locked(sc, UNLOAD_NORMAL); } BXE_CORE_UNLOCK(sc); + break; case SIOCADDMULTI: case SIOCDELMULTI: /* Add/Delete multicast addresses. */ - DBPRINT(sc, BXE_EXTREME_MISC, + DBPRINT(sc, BXE_VERBOSE_MISC, "%s(): Received SIOCADDMULTI/SIOCDELMULTI\n", __FUNCTION__); BXE_CORE_LOCK(sc); - - /* Don't bother unless the driver's running. */ + /* Check if the interface is up. */ if (ifp->if_drv_flags & IFF_DRV_RUNNING) + /* Set receive mode flags. */ bxe_set_rx_mode(sc); - BXE_CORE_UNLOCK(sc); + break; case SIOCSIFMEDIA: case SIOCGIFMEDIA: /* Set/Get Interface media */ - DBPRINT(sc, BXE_EXTREME_MISC, + DBPRINT(sc, BXE_VERBOSE_MISC, "%s(): Received SIOCSIFMEDIA/SIOCGIFMEDIA\n", __FUNCTION__); + error = ifmedia_ioctl(ifp, ifr, &sc->bxe_ifmedia, command); break; case SIOCSIFCAP: @@ -9697,13 +9714,13 @@ bxe_ioctl(struct ifnet *ifp, u_long command, caddr_t data) /* Toggle the LRO capabilites enable flag. */ if (mask & IFCAP_LRO) { - if (TPA_ENABLED(sc)) { - ifp->if_capenable ^= IFCAP_LRO; - sc->bxe_flags ^= BXE_TPA_ENABLE_FLAG; - DBPRINT(sc, BXE_INFO_MISC, - "%s(): Toggling LRO (bxe_flags = " - "0x%08X).\n", __FUNCTION__, sc->bxe_flags); - } + ifp->if_capenable ^= IFCAP_LRO; + sc->bxe_flags ^= BXE_TPA_ENABLE_FLAG; + DBPRINT(sc, BXE_INFO_MISC, + "%s(): Toggling LRO (bxe_flags = " + "0x%08X).\n", __FUNCTION__, sc->bxe_flags); + + /* LRO requires different buffer setup. */ reinit = 1; } @@ -9735,6 +9752,7 @@ bxe_ioctl(struct ifnet *ifp, u_long command, caddr_t data) /* Toggle VLAN_MTU capabilities enable flag. */ if (mask & IFCAP_VLAN_MTU) { + /* ToDo: Is this really true? */ BXE_PRINTF("%s(%d): Changing VLAN_MTU not supported.\n", __FILE__, __LINE__); error = EINVAL; @@ -9742,6 +9760,7 @@ bxe_ioctl(struct ifnet *ifp, u_long command, caddr_t data) /* Toggle VLANHWTAG capabilities enabled flag. */ if (mask & IFCAP_VLAN_HWTAGGING) { + /* ToDo: Is this really true? */ BXE_PRINTF( "%s(%d): Changing VLAN_HWTAGGING not supported!\n", __FILE__, __LINE__); @@ -9758,27 +9777,22 @@ bxe_ioctl(struct ifnet *ifp, u_long command, caddr_t data) /* Toggle TSO6 capabilities enabled flag. */ if (mask & IFCAP_TSO6) { - DBPRINT(sc, BXE_VERBOSE_MISC, - "%s(): Toggling IFCAP_TSO6.\n", __FUNCTION__); - - ifp->if_capenable ^= IFCAP_TSO6; - } - - /* Handle any other capabilities. */ - if (mask & ~(IFCAP_VLAN_HWTAGGING | IFCAP_VLAN_MTU | - IFCAP_RXCSUM | IFCAP_TXCSUM)) { - BXE_PRINTF("%s(%d): Unsupported capability!\n", + /* ToDo: Add TSO6 support. */ + BXE_PRINTF( + "%s(%d): Changing TSO6 not supported!\n", __FILE__, __LINE__); - error = EINVAL; - } - - /* Restart the controller with the new capabilities. */ - if (reinit) { - bxe_stop_locked(sc, UNLOAD_NORMAL); - bxe_init_locked(sc, LOAD_NORMAL); } - BXE_CORE_UNLOCK(sc); + + /* + * ToDo: Look into supporting: + * VLAN_HWFILTER + * VLAN_HWCSUM + * VLAN_HWTSO + * POLLING + * WOL[_UCAST|_MCAST|_MAGIC] + * + */ break; default: /* We don't know how to handle the IOCTL, pass it on. */ @@ -9786,7 +9800,15 @@ bxe_ioctl(struct ifnet *ifp, u_long command, caddr_t data) break; } - DBEXIT(BXE_EXTREME_MISC); + /* Restart the controller with the new capabilities. */ + if ((ifp->if_drv_flags & IFF_DRV_RUNNING) && (reinit != 0)) { + BXE_CORE_LOCK(sc); + bxe_stop_locked(sc, UNLOAD_NORMAL); + bxe_init_locked(sc, LOAD_NORMAL); + BXE_CORE_UNLOCK(sc); + } + + DBEXIT(BXE_VERBOSE_LOAD | BXE_VERBOSE_RESET | BXE_VERBOSE_MISC); return (error); } @@ -9798,7 +9820,7 @@ bxe_ioctl(struct ifnet *ifp, u_long command, caddr_t data) * caller. * * Returns: - * The adjusted value of *fp->rx_cons_sb. + * The adjusted value of *fp->rx_cons_sb. */ static __inline uint16_t bxe_rx_cq_cons(struct bxe_fastpath *fp) @@ -9816,7 +9838,7 @@ bxe_rx_cq_cons(struct bxe_fastpath *fp) * need to adjust the value accordingly. */ if ((rx_cq_cons_sb & USABLE_RCQ_ENTRIES_PER_PAGE) == - USABLE_RCQ_ENTRIES_PER_PAGE) + USABLE_RCQ_ENTRIES_PER_PAGE) rx_cq_cons_sb++; return (rx_cq_cons_sb); @@ -9827,7 +9849,7 @@ bxe_has_tx_work(struct bxe_fastpath *fp) { rmb(); - return (((fp->tx_pkt_prod != le16toh(*fp->tx_cons_sb)) || \ + return (((fp->tx_pkt_prod != le16toh(*fp->tx_pkt_cons_sb)) || \ (fp->tx_pkt_prod != fp->tx_pkt_cons))); } @@ -9836,8 +9858,8 @@ bxe_has_tx_work(struct bxe_fastpath *fp) * completion queue. * * Returns: - * 0 = No received frames pending, !0 = Received frames - * pending + * 0 = No received frames pending, !0 = Received frames + * pending */ static __inline int bxe_has_rx_work(struct bxe_fastpath *fp) @@ -9860,7 +9882,6 @@ bxe_task_sp(void *xsc, int pending) uint32_t sp_status; sc = xsc; - DBENTER(BXE_EXTREME_INTR); DBPRINT(sc, BXE_EXTREME_INTR, "%s(): pending = %d.\n", __FUNCTION__, pending); @@ -9897,8 +9918,6 @@ bxe_task_sp(void *xsc, int pending) IGU_INT_NOP, 1); bxe_ack_sb(sc, DEF_SB_ID, TSTORM_ID, le16toh(sc->def_t_idx), IGU_INT_ENABLE, 1); - - DBEXIT(BXE_EXTREME_INTR); } @@ -9931,9 +9950,6 @@ bxe_intr_legacy(void *xsc) if (fp_status == 0) goto bxe_intr_legacy_exit; - /* Need to weed out calls due to shared interrupts. */ - DBENTER(BXE_EXTREME_INTR); - /* Handle the fastpath interrupt. */ /* * sb_id = 0 for ustorm, 1 for cstorm. @@ -9945,9 +9961,8 @@ bxe_intr_legacy(void *xsc) */ mask = (0x2 << fp->sb_id); - DBPRINT(sc, BXE_EXTREME_INTR, - "%s(): fp_status = 0x%08X, mask = 0x%08X\n", __FUNCTION__, - fp_status, mask); + DBPRINT(sc, BXE_INSANE_INTR, "%s(): fp_status = 0x%08X, mask = " + "0x%08X\n", __FUNCTION__, fp_status, mask); /* CSTORM event means fastpath completion. */ if (fp_status & mask) { @@ -10004,7 +10019,9 @@ bxe_intr_sp(void *xsc) struct bxe_softc *sc; sc = xsc; - DBENTER(BXE_EXTREME_INTR); + + DBPRINT(sc, BXE_INSANE_INTR, "%s(%d): Slowpath interrupt.\n", + __FUNCTION__, curcpu); /* Don't handle any interrupts if we're not ready. */ if (__predict_false(sc->intr_sem != 0)) @@ -10021,7 +10038,7 @@ bxe_intr_sp(void *xsc) #endif bxe_intr_sp_exit: - DBEXIT(BXE_EXTREME_INTR); + return; } /* @@ -10041,10 +10058,8 @@ bxe_intr_fp (void *xfp) fp = xfp; sc = fp->sc; - DBENTER(BXE_EXTREME_INTR); - - DBPRINT(sc, BXE_VERBOSE_INTR, - "%s(%d): MSI-X vector on fp[%d].sb_id = %d\n", + DBPRINT(sc, BXE_INSANE_INTR, + "%s(%d): fp[%02d].sb_id = %d interrupt.\n", __FUNCTION__, curcpu, fp->index, fp->sb_id); /* Don't handle any interrupts if we're not ready. */ @@ -10060,7 +10075,7 @@ bxe_intr_fp (void *xfp) #endif bxe_intr_fp_exit: - DBEXIT(BXE_EXTREME_INTR); + return; } /* @@ -10080,12 +10095,7 @@ bxe_task_fp (void *xfp, int pending) fp = xfp; sc = fp->sc; - DBENTER(BXE_EXTREME_INTR); - - DBPRINT(sc, BXE_EXTREME_INTR, "%s(): pending = %d.\n", __FUNCTION__, - pending); - - DBPRINT(sc, BXE_EXTREME_INTR, "%s(%d): Fastpath task on fp[%d]" + DBPRINT(sc, BXE_EXTREME_INTR, "%s(%d): Fastpath task on fp[%02d]" ".sb_id = %d\n", __FUNCTION__, curcpu, fp->index, fp->sb_id); /* Update the fast path indices */ @@ -10105,8 +10115,6 @@ bxe_task_fp (void *xfp, int pending) /* Acknowledge the fastpath status block indices. */ bxe_ack_sb(sc, fp->sb_id, USTORM_ID, fp->fp_u_idx, IGU_INT_NOP, 1); bxe_ack_sb(sc, fp->sb_id, CSTORM_ID, fp->fp_c_idx, IGU_INT_ENABLE, 1); - - DBEXIT(BXE_EXTREME_INTR); } /* @@ -10120,12 +10128,8 @@ bxe_zero_sb(struct bxe_softc *sc, int sb_id) { int port; - port = BP_PORT(sc); - DBENTER(BXE_VERBOSE_LOAD | BXE_VERBOSE_RESET | BXE_VERBOSE_INTR); - DBPRINT(sc, (BXE_VERBOSE_LOAD | BXE_VERBOSE_RESET), - "%s(): Clearing sb_id = %d on port %d.\n", __FUNCTION__, sb_id, - port); + port = BP_PORT(sc); /* "CSTORM" */ bxe_init_fill(sc, CSEM_REG_FAST_MEMORY + @@ -10151,13 +10155,14 @@ bxe_init_sb(struct bxe_softc *sc, struct host_status_block *sb, uint64_t section; int func, index, port; + DBENTER(BXE_VERBOSE_LOAD | BXE_VERBOSE_RESET | BXE_VERBOSE_INTR); + port = BP_PORT(sc); func = BP_FUNC(sc); - DBENTER(BXE_VERBOSE_LOAD | BXE_VERBOSE_RESET | BXE_VERBOSE_INTR); DBPRINT(sc, (BXE_VERBOSE_LOAD | BXE_VERBOSE_RESET | BXE_VERBOSE_INTR), - "%s(): Initializing sb_id = %d on port %d, function %d.\n", - __FUNCTION__, sb_id, port, func); + "%s(): Initializing sb_id = %d on port %d, function %d.\n", + __FUNCTION__, sb_id, port, func); /* Setup the USTORM status block. */ section = ((uint64_t)mapping) + offsetof(struct host_status_block, @@ -10418,300 +10423,580 @@ bxe_update_coalesce(struct bxe_softc *sc) } /* - * Free memory buffers from the TPA pool. + * Allocate an mbuf and assign it to the TPA pool. * * Returns: - * None + * 0 = Success, !0 = Failure + * + * Modifies: + * fp->tpa_mbuf_ptr[queue] + * fp->tpa_mbuf_map[queue] + * fp->tpa_mbuf_segs[queue] */ -static __inline void -bxe_free_tpa_pool(struct bxe_fastpath *fp, int last) +static int +bxe_alloc_tpa_mbuf(struct bxe_fastpath *fp, int queue) { struct bxe_softc *sc; - int j; + bus_dma_segment_t segs[1]; + bus_dmamap_t map; + struct mbuf *m; + int nsegs, rc; sc = fp->sc; + DBENTER(BXE_INSANE_TPA); + rc = 0; + + DBRUNIF((fp->disable_tpa == TRUE), + BXE_PRINTF("%s(): fp[%02d] TPA disabled!\n", + __FUNCTION__, fp->index)); + #ifdef BXE_DEBUG - int tpa_pool_max; + /* Simulate an mbuf allocation failure. */ + if (DB_RANDOMTRUE(bxe_debug_mbuf_allocation_failure)) { + sc->debug_sim_mbuf_alloc_failed++; + fp->mbuf_tpa_alloc_failed++; + rc = ENOMEM; + goto bxe_alloc_tpa_mbuf_exit; + } +#endif - tpa_pool_max = CHIP_IS_E1H(sc) ? ETH_MAX_AGGREGATION_QUEUES_E1H : - ETH_MAX_AGGREGATION_QUEUES_E1; - DBRUNIF((last > tpa_pool_max), DBPRINT(sc, BXE_FATAL, - "%s(): Index value out of range (%d > %d)!\n", __FUNCTION__, last, - tpa_pool_max)); + /* Allocate the new TPA mbuf. */ + m = m_getjcl(M_DONTWAIT, MT_DATA, M_PKTHDR, sc->mbuf_alloc_size); + if (__predict_false(m == NULL)) { + fp->mbuf_tpa_alloc_failed++; + rc = ENOBUFS; + goto bxe_alloc_tpa_mbuf_exit; + } + + DBRUN(fp->tpa_mbuf_alloc++); + + /* Initialize the mbuf buffer length. */ + m->m_pkthdr.len = m->m_len = sc->mbuf_alloc_size; + +#ifdef BXE_DEBUG + /* Simulate an mbuf mapping failure. */ + if (DB_RANDOMTRUE(bxe_debug_dma_map_addr_failure)) { + sc->debug_sim_mbuf_map_failed++; + fp->mbuf_tpa_mapping_failed++; + m_freem(m); + DBRUN(fp->tpa_mbuf_alloc--); + rc = ENOMEM; + goto bxe_alloc_tpa_mbuf_exit; + } #endif - if (!(TPA_ENABLED(sc))) - return; + /* Map the TPA mbuf into non-paged pool. */ + rc = bus_dmamap_load_mbuf_sg(fp->rx_mbuf_tag, + fp->tpa_mbuf_spare_map, m, segs, &nsegs, BUS_DMA_NOWAIT); + if (__predict_false(rc != 0)) { + fp->mbuf_tpa_mapping_failed++; + m_free(m); + DBRUN(fp->tpa_mbuf_alloc--); + goto bxe_alloc_tpa_mbuf_exit; + } - for (j = 0; j < last; j++) { - if (fp->rx_mbuf_tag) { - if (fp->tpa_mbuf_map[j] != NULL) { - bus_dmamap_sync(fp->rx_mbuf_tag, - fp->tpa_mbuf_map[j], BUS_DMASYNC_POSTREAD); - bus_dmamap_unload(fp->rx_mbuf_tag, - fp->tpa_mbuf_map[j]); - } + /* All mubfs must map to a single segment. */ + KASSERT(nsegs == 1, ("%s(): Too many segments (%d) returned!", + __FUNCTION__, nsegs)); - if (fp->tpa_mbuf_ptr[j] != NULL) { - m_freem(fp->tpa_mbuf_ptr[j]); - DBRUN(fp->tpa_mbuf_alloc--); - fp->tpa_mbuf_ptr[j] = NULL; - } else { - DBPRINT(sc, BXE_FATAL, - "%s(): TPA bin %d empty on free!\n", - __FUNCTION__, j); - } - } + /* Release any existing TPA mbuf mapping. */ + if (fp->tpa_mbuf_map[queue] != NULL) { + bus_dmamap_sync(fp->rx_mbuf_tag, + fp->tpa_mbuf_map[queue], BUS_DMASYNC_POSTREAD); + bus_dmamap_unload(fp->rx_mbuf_tag, + fp->tpa_mbuf_map[queue]); } + + /* Save the mbuf and mapping info for the TPA mbuf. */ + map = fp->tpa_mbuf_map[queue]; + fp->tpa_mbuf_map[queue] = fp->tpa_mbuf_spare_map; + fp->tpa_mbuf_spare_map = map; + bus_dmamap_sync(fp->rx_mbuf_tag, + fp->tpa_mbuf_map[queue], BUS_DMASYNC_PREREAD); + fp->tpa_mbuf_ptr[queue] = m; + fp->tpa_mbuf_segs[queue] = segs[0]; + +bxe_alloc_tpa_mbuf_exit: + DBEXIT(BXE_INSANE_TPA); + return (rc); } /* - * Free an entry in the receive scatter gather list. + * Allocate mbufs for a fastpath TPA pool. * * Returns: - * None + * 0 = Success, !0 = Failure. + * + * Modifies: + * fp->tpa_state[] + * fp->disable_tpa */ -static __inline void -bxe_free_rx_sge(struct bxe_softc *sc, struct bxe_fastpath *fp, uint16_t index) +static int +bxe_fill_tpa_pool(struct bxe_fastpath *fp) { - struct eth_rx_sge *sge; + struct bxe_softc *sc; + int max_agg_queues, queue, rc; - sge = &fp->rx_sge_chain[RX_SGE_PAGE(index)][RX_SGE_IDX(index)]; - /* Skip "next page" elements */ - if (!sge) - return; + sc = fp->sc; + DBENTER(BXE_VERBOSE_LOAD | BXE_VERBOSE_RESET); + rc = 0; - if (fp->rx_sge_buf_tag) { - if (fp->rx_sge_buf_map[index]) { - bus_dmamap_sync(fp->rx_sge_buf_tag, - fp->rx_sge_buf_map[index], BUS_DMASYNC_POSTREAD); - bus_dmamap_unload(fp->rx_sge_buf_tag, - fp->rx_sge_buf_map[index]); - } + if (!TPA_ENABLED(sc)) { + fp->disable_tpa = TRUE; + goto bxe_fill_tpa_pool_exit; + } - if (fp->rx_sge_buf_ptr[index]) { - DBRUN(fp->sge_mbuf_alloc--); - m_freem(fp->rx_sge_buf_ptr[index]); - fp->rx_sge_buf_ptr[index] = NULL; - } + max_agg_queues = CHIP_IS_E1(sc) ? ETH_MAX_AGGREGATION_QUEUES_E1 : + ETH_MAX_AGGREGATION_QUEUES_E1H; + + /* Assume the fill operation worked. */ + fp->disable_tpa = FALSE; - sge->addr_hi = sge->addr_lo = 0; + /* Fill the TPA pool. */ + for (queue = 0; queue < max_agg_queues; queue++) { + rc = bxe_alloc_tpa_mbuf(fp, queue); + if (rc != 0) { + BXE_PRINTF( + "%s(%d): fp[%02d] TPA disabled!\n", + __FILE__, __LINE__, fp->index); + fp->disable_tpa = TRUE; + break; + } + fp->tpa_state[queue] = BXE_TPA_STATE_STOP; } + +bxe_fill_tpa_pool_exit: + DBEXIT(BXE_VERBOSE_LOAD | BXE_VERBOSE_RESET); + return (rc); } /* - * Free a range of scatter gather elements from the ring. + * Free all mbufs from a fastpath TPA pool. * * Returns: * None + * + * Modifies: + * fp->tpa_mbuf_ptr[] + * fp->tpa_mbuf_map[] + * fp->tpa_mbuf_alloc */ -static __inline void -bxe_free_rx_sge_range(struct bxe_softc *sc, struct bxe_fastpath *fp, int last) +static void +bxe_free_tpa_pool(struct bxe_fastpath *fp) { - int i; + struct bxe_softc *sc; + int i, max_agg_queues; + + sc = fp->sc; + DBENTER(BXE_INSANE_LOAD | BXE_INSANE_UNLOAD | BXE_INSANE_TPA); - for (i = 0; i < last; i++) - bxe_free_rx_sge(sc, fp, i); + if (fp->rx_mbuf_tag == NULL) + goto bxe_free_tpa_pool_exit; + + max_agg_queues = CHIP_IS_E1H(sc) ? + ETH_MAX_AGGREGATION_QUEUES_E1H : + ETH_MAX_AGGREGATION_QUEUES_E1; + + /* Release all mbufs and and all DMA maps in the TPA pool. */ + for (i = 0; i < max_agg_queues; i++) { + if (fp->tpa_mbuf_map[i] != NULL) { + bus_dmamap_sync(fp->rx_mbuf_tag, fp->tpa_mbuf_map[i], + BUS_DMASYNC_POSTREAD); + bus_dmamap_unload(fp->rx_mbuf_tag, fp->tpa_mbuf_map[i]); + } + + if (fp->tpa_mbuf_ptr[i] != NULL) { + m_freem(fp->tpa_mbuf_ptr[i]); + DBRUN(fp->tpa_mbuf_alloc--); + fp->tpa_mbuf_ptr[i] = NULL; + } + } + +bxe_free_tpa_pool_exit: + DBEXIT(BXE_INSANE_LOAD | BXE_INSANE_UNLOAD | BXE_INSANE_TPA); } /* - * Allocate an mbuf of the specified size for the caller. + * Allocate an mbuf and assign it to the receive scatter gather chain. + * The caller must take care to save a copy of the existing mbuf in the + * SG mbuf chain. * * Returns: - * NULL on failure or an mbuf pointer on success. + * 0 = Success, !0= Failure. + * + * Modifies: + * fp->sg_chain[index] + * fp->rx_sge_buf_ptr[index] + * fp->rx_sge_buf_map[index] + * fp->rx_sge_spare_map */ -static struct mbuf* -bxe_alloc_mbuf(struct bxe_fastpath *fp, int size) +static int +bxe_alloc_rx_sge_mbuf(struct bxe_fastpath *fp, uint16_t index) { struct bxe_softc *sc; - struct mbuf *m_new; + struct eth_rx_sge *sge; + bus_dma_segment_t segs[1]; + bus_dmamap_t map; + struct mbuf *m; + int nsegs, rc; sc = fp->sc; - DBENTER(BXE_INSANE); + DBENTER(BXE_INSANE_TPA); + rc = 0; #ifdef BXE_DEBUG /* Simulate an mbuf allocation failure. */ if (DB_RANDOMTRUE(bxe_debug_mbuf_allocation_failure)) { - DBPRINT(sc, BXE_WARN, - "%s(): Simulated mbuf allocation failure!\n", __FUNCTION__); - fp->mbuf_alloc_failed++; - sc->debug_mbuf_sim_alloc_failed++; - m_new = NULL; - goto bxe_alloc_mbuf_exit; + sc->debug_sim_mbuf_alloc_failed++; + fp->mbuf_sge_alloc_failed++; + rc = ENOMEM; + goto bxe_alloc_rx_sge_mbuf_exit; } #endif - /* Allocate a new mbuf with memory attached. */ - if (size <= MCLBYTES) - m_new = m_getcl(M_DONTWAIT, MT_DATA, M_PKTHDR); - else - m_new = m_getjcl(M_DONTWAIT, MT_DATA, M_PKTHDR, size); - - /* Check whether the allocation succeeded and handle a failure. */ - if (__predict_false(m_new == NULL)) { - DBPRINT(sc, BXE_WARN, "%s(): Failed to allocate %d byte " - "mbuf on fp[%02d]!\n", __FUNCTION__, size, fp->index); - fp->mbuf_alloc_failed++; - goto bxe_alloc_mbuf_exit; + /* Allocate a new SGE mbuf. */ + m = m_getjcl(M_DONTWAIT, MT_DATA, M_PKTHDR, SGE_PAGE_SIZE); + if (__predict_false(m == NULL)) { + fp->mbuf_sge_alloc_failed++; + rc = ENOMEM; + goto bxe_alloc_rx_sge_mbuf_exit; } - /* Do a little extra error checking when debugging. */ - DBRUN(M_ASSERTPKTHDR(m_new)); + DBRUN(fp->sge_mbuf_alloc++); /* Initialize the mbuf buffer length. */ - m_new->m_pkthdr.len = m_new->m_len = size; - DBRUN(sc->debug_memory_allocated += size); + m->m_pkthdr.len = m->m_len = SGE_PAGE_SIZE; + +#ifdef BXE_DEBUG + /* Simulate an mbuf mapping failure. */ + if (DB_RANDOMTRUE(bxe_debug_dma_map_addr_failure)) { + sc->debug_sim_mbuf_map_failed++; + fp->mbuf_sge_mapping_failed++; + m_freem(m); + DBRUN(fp->sge_mbuf_alloc--); + rc = ENOMEM; + goto bxe_alloc_rx_sge_mbuf_exit; + } +#endif + + /* Map the SGE mbuf into non-paged pool. */ + rc = bus_dmamap_load_mbuf_sg(fp->rx_sge_buf_tag, + fp->rx_sge_spare_map, m, segs, &nsegs, BUS_DMA_NOWAIT); + if (__predict_false(rc != 0)) { + fp->mbuf_sge_mapping_failed++; + m_freem(m); + DBRUN(fp->sge_mbuf_alloc--); + goto bxe_alloc_rx_sge_mbuf_exit; + } -bxe_alloc_mbuf_exit: - return (m_new); + /* All mubfs must map to a single segment. */ + KASSERT(nsegs == 1, ("%s(): Too many segments (%d) returned!", + __FUNCTION__, nsegs)); + + /* Unload any existing SGE mbuf mapping. */ + if (fp->rx_sge_buf_map[index] != NULL) { + bus_dmamap_sync(fp->rx_sge_buf_tag, + fp->rx_sge_buf_map[index], BUS_DMASYNC_POSTREAD); + bus_dmamap_unload(fp->rx_sge_buf_tag, + fp->rx_sge_buf_map[index]); + } + + /* Add the new SGE mbuf to the SGE ring. */ + map = fp->rx_sge_buf_map[index]; + fp->rx_sge_buf_map[index] = fp->rx_sge_spare_map; + fp->rx_sge_spare_map = map; + bus_dmamap_sync(fp->rx_sge_buf_tag, + fp->rx_sge_buf_map[index], BUS_DMASYNC_PREREAD); + fp->rx_sge_buf_ptr[index] = m; + sge = &fp->sg_chain[index]; + sge->addr_hi = htole32(U64_HI(segs[0].ds_addr)); + sge->addr_lo = htole32(U64_LO(segs[0].ds_addr)); + +bxe_alloc_rx_sge_mbuf_exit: + DBEXIT(BXE_INSANE_TPA); + return (rc); } /* - * Map an mbuf into non-paged memory for the caller. + * Allocate mbufs for a SGE chain. * * Returns: * 0 = Success, !0 = Failure. * - * Side-effects: - * The mbuf passed will be released if a mapping failure occurs. - * The segment mapping will be udpated if the mapping is successful. + * Modifies: + * fp->disable_tpa + * fp->rx_sge_prod */ static int -bxe_map_mbuf(struct bxe_fastpath *fp, struct mbuf *m, bus_dma_tag_t tag, - bus_dmamap_t map, bus_dma_segment_t *seg) +bxe_fill_sg_chain(struct bxe_fastpath *fp) { struct bxe_softc *sc; - bus_dma_segment_t segs[4]; - int nsegs, rc; + uint16_t index; + int i, rc; + sc = fp->sc; + DBENTER(BXE_VERBOSE_LOAD | BXE_VERBOSE_RESET); rc = 0; - DBENTER(BXE_INSANE); - -#ifdef BXE_DEBUG - /* Simulate an mbuf mapping failure. */ - if (DB_RANDOMTRUE(bxe_debug_dma_map_addr_failure)) { - DBPRINT(sc, BXE_WARN, "%s(): Simulated mbuf mapping failure!\n", - __FUNCTION__); - sc->debug_mbuf_sim_map_failed++; - fp->mbuf_alloc_failed++; - sc->debug_memory_allocated -= m->m_len; - m_freem(m); - rc = EINVAL; - goto bxe_map_mbuf_exit; + if (!TPA_ENABLED(sc)) { + fp->disable_tpa = TRUE; + goto bxe_fill_sg_chain_exit; } -#endif - /* Map the buffer memory into non-paged memory. */ - rc = bus_dmamap_load_mbuf_sg(tag, map, m, segs, &nsegs, BUS_DMA_NOWAIT); + /* Assume the fill operation works. */ + fp->disable_tpa = FALSE; - /* Handle any mapping errors. */ - if (__predict_false(rc)) { - DBPRINT(sc, BXE_WARN, "%s(): mbuf mapping failure (%d) on " - "fp[%02d]!\n", __FUNCTION__, rc, fp->index); - fp->mbuf_alloc_failed++; - DBRUN(sc->debug_memory_allocated -= m->m_len); - m_freem(m); - goto bxe_map_mbuf_exit; + /* Fill the RX SGE chain. */ + index = 0; + for (i = 0; i < USABLE_RX_SGE; i++) { + rc = bxe_alloc_rx_sge_mbuf(fp, index); + if (rc != 0) { + BXE_PRINTF( + "%s(%d): fp[%02d] SGE memory allocation failure!\n", + __FILE__, __LINE__, fp->index); + index = 0; + fp->disable_tpa = TRUE; + break; + } + index = NEXT_SGE_IDX(index); } - /* All mubfs must map to a single segment. */ - KASSERT(nsegs == 1, ("%s(): Too many segments (%d) returned!", - __FUNCTION__, nsegs)); - - /* Save the DMA mapping tag for this memory buffer. */ - *seg = segs[0]; + /* Update the driver's copy of the RX SGE producer index. */ + fp->rx_sge_prod = index; -bxe_map_mbuf_exit: - DBEXIT(BXE_INSANE); +bxe_fill_sg_chain_exit: + DBEXIT(BXE_VERBOSE_LOAD | BXE_VERBOSE_RESET); return (rc); } /* - * Allocate an mbuf for the TPA pool. + * Free all elements from the receive scatter gather chain. * * Returns: - * NULL on failure or an mbuf pointer on success. + * None + * + * Modifies: + * fp->rx_sge_buf_ptr[] + * fp->rx_sge_buf_map[] + * fp->sge_mbuf_alloc */ -static struct mbuf * -bxe_alloc_tpa_mbuf(struct bxe_fastpath *fp, int index, int size) +static void +bxe_free_sg_chain(struct bxe_fastpath *fp) { - bus_dma_segment_t seg; - struct mbuf *m; - int rc; - - /* Allocate the new mbuf. */ - if ((m = bxe_alloc_mbuf(fp, size)) == NULL) - goto bxe_alloc_tpa_mbuf_exit; + struct bxe_softc *sc; + int i; - /* Map the mbuf into non-paged pool. */ - rc = bxe_map_mbuf(fp, m, fp->rx_mbuf_tag, fp->tpa_mbuf_map[index], - &seg); + sc = fp->sc; + DBENTER(BXE_INSANE_TPA); - if (rc) { - m = NULL; - goto bxe_alloc_tpa_mbuf_exit; - } + if (fp->rx_sge_buf_tag == NULL) + goto bxe_free_sg_chain_exit; - DBRUN(fp->tpa_mbuf_alloc++); + /* Free all mbufs and unload all maps. */ + for (i = 0; i < TOTAL_RX_SGE; i++) { + /* Free the map and the mbuf if they're allocated. */ + if (fp->rx_sge_buf_map[i] != NULL) { + bus_dmamap_sync(fp->rx_sge_buf_tag, + fp->rx_sge_buf_map[i], BUS_DMASYNC_POSTREAD); + bus_dmamap_unload(fp->rx_sge_buf_tag, + fp->rx_sge_buf_map[i]); + } - /* Save the mapping info for the mbuf. */ - fp->tpa_mbuf_segs[index] = seg; + if (fp->rx_sge_buf_ptr[i] != NULL) { + m_freem(fp->rx_sge_buf_ptr[i]); + DBRUN(fp->sge_mbuf_alloc--); + fp->rx_sge_buf_ptr[i] = NULL; + } + } -bxe_alloc_tpa_mbuf_exit: - return (m); +bxe_free_sg_chain_exit: + DBEXIT(BXE_INSANE_TPA); } /* - * Allocate a receive scatter gather entry + * Allocate an mbuf, if necessary, and add it to the receive chain. * * Returns: - * 0 = Success, != Failure. + * 0 = Success, !0 = Failure. */ static int -bxe_alloc_rx_sge(struct bxe_softc *sc, struct bxe_fastpath *fp, - uint16_t ring_prod) +bxe_alloc_rx_bd_mbuf(struct bxe_fastpath *fp, uint16_t index) { - struct eth_rx_sge *sge; - bus_dma_segment_t seg; + struct bxe_softc *sc; + struct eth_rx_bd *rx_bd; + bus_dma_segment_t segs[1]; + bus_dmamap_t map; struct mbuf *m; - int rc; + int nsegs, rc; - sge = &fp->rx_sge_chain[RX_SGE_PAGE(ring_prod)][RX_SGE_IDX(ring_prod)]; + sc = fp->sc; + DBENTER(BXE_INSANE_LOAD | BXE_INSANE_RESET | BXE_INSANE_RECV); rc = 0; - /* Allocate a new mbuf. */ - if ((m = bxe_alloc_mbuf(fp, PAGE_SIZE)) == NULL) { +#ifdef BXE_DEBUG + /* Simulate an mbuf allocation failure. */ + if (DB_RANDOMTRUE(bxe_debug_mbuf_allocation_failure)) { + sc->debug_sim_mbuf_alloc_failed++; + fp->mbuf_rx_bd_alloc_failed++; rc = ENOMEM; - goto bxe_alloc_rx_sge_exit; + goto bxe_alloc_rx_bd_mbuf_exit; } +#endif - /* Map the mbuf into non-paged pool. */ - rc = bxe_map_mbuf(fp, m, fp->rx_sge_buf_tag, - fp->rx_sge_buf_map[ring_prod], &seg); + /* Allocate the new RX BD mbuf. */ + m = m_getjcl(M_DONTWAIT, MT_DATA, M_PKTHDR, sc->mbuf_alloc_size); + if (__predict_false(m == NULL)) { + fp->mbuf_rx_bd_alloc_failed++; + rc = ENOBUFS; + goto bxe_alloc_rx_bd_mbuf_exit; + } - if (rc) - goto bxe_alloc_rx_sge_exit; + DBRUN(fp->rx_mbuf_alloc++); - DBRUN(fp->sge_mbuf_alloc++); + /* Initialize the mbuf buffer length. */ + m->m_pkthdr.len = m->m_len = sc->mbuf_alloc_size; - /* Add the SGE buffer to the SGE ring. */ - sge->addr_hi = htole32(U64_HI(seg.ds_addr)); - sge->addr_lo = htole32(U64_LO(seg.ds_addr)); - fp->rx_sge_buf_ptr[ring_prod] = m; +#ifdef BXE_DEBUG + /* Simulate an mbuf mapping failure. */ + if (DB_RANDOMTRUE(bxe_debug_dma_map_addr_failure)) { + sc->debug_sim_mbuf_map_failed++; + fp->mbuf_rx_bd_mapping_failed++; + m_freem(m); + DBRUN(fp->rx_mbuf_alloc--); + rc = ENOMEM; + goto bxe_alloc_rx_bd_mbuf_exit; + } +#endif -bxe_alloc_rx_sge_exit: + /* Map the TPA mbuf into non-paged pool. */ + rc = bus_dmamap_load_mbuf_sg(fp->rx_mbuf_tag, + fp->rx_mbuf_spare_map, m, segs, &nsegs, BUS_DMA_NOWAIT); + if (__predict_false(rc != 0)) { + fp->mbuf_rx_bd_mapping_failed++; + m_freem(m); + DBRUN(fp->rx_mbuf_alloc--); + goto bxe_alloc_rx_bd_mbuf_exit; + } + + /* All mubfs must map to a single segment. */ + KASSERT(nsegs == 1, ("%s(): Too many segments (%d) returned!", + __FUNCTION__, nsegs)); + + /* Release any existing RX BD mbuf mapping. */ + if (fp->rx_mbuf_map[index] != NULL) { + bus_dmamap_sync(fp->rx_mbuf_tag, + fp->rx_mbuf_map[index], BUS_DMASYNC_POSTREAD); + bus_dmamap_unload(fp->rx_mbuf_tag, + fp->rx_mbuf_map[index]); + } + + /* Save the mbuf and mapping info. */ + map = fp->rx_mbuf_map[index]; + fp->rx_mbuf_map[index] = fp->rx_mbuf_spare_map; + fp->rx_mbuf_spare_map = map; + bus_dmamap_sync(fp->rx_mbuf_tag, + fp->rx_mbuf_map[index], BUS_DMASYNC_PREREAD); + fp->rx_mbuf_ptr[index] = m; + rx_bd = &fp->rx_chain[index]; + rx_bd->addr_hi = htole32(U64_HI(segs[0].ds_addr)); + rx_bd->addr_lo = htole32(U64_LO(segs[0].ds_addr)); + +bxe_alloc_rx_bd_mbuf_exit: + DBEXIT(BXE_INSANE_LOAD | BXE_INSANE_RESET | BXE_INSANE_RECV); return (rc); } + +/* + * Allocate mbufs for a receive chain. + * + * Returns: + * 0 = Success, !0 = Failure. + * + * Modifies: + * fp->rx_bd_prod + */ +static int +bxe_fill_rx_bd_chain(struct bxe_fastpath *fp) +{ + struct bxe_softc *sc; + uint16_t index; + int i, rc; + + sc = fp->sc; + DBENTER(BXE_VERBOSE_LOAD | BXE_VERBOSE_RESET); + rc = index = 0; + + /* Allocate buffers for all the RX BDs in RX BD Chain. */ + for (i = 0; i < USABLE_RX_BD; i++) { + rc = bxe_alloc_rx_bd_mbuf(fp, index); + if (rc != 0) { + BXE_PRINTF( + "%s(%d): Memory allocation failure! Cannot fill fp[%02d] RX chain.\n", + __FILE__, __LINE__, fp->index); + index = 0; + break; + } + index = NEXT_RX_BD(index); + } + + fp->rx_bd_prod = index; + DBEXIT(BXE_VERBOSE_LOAD | BXE_VERBOSE_RESET); + return (rc); +} + +/* + * Free all buffers from the receive chain. + * + * Returns: + * None + * + * Modifies: + * fp->rx_mbuf_ptr[] + * fp->rx_mbuf_map[] + * fp->rx_mbuf_alloc + */ +static void +bxe_free_rx_bd_chain(struct bxe_fastpath *fp) +{ + struct bxe_softc *sc; + int i; + + sc = fp->sc; + DBENTER(BXE_VERBOSE_LOAD | BXE_VERBOSE_RESET); + + if (fp->rx_mbuf_tag == NULL) + goto bxe_free_rx_bd_chain_exit; + + /* Free all mbufs and unload all maps. */ + for (i = 0; i < TOTAL_RX_BD; i++) { + if (fp->rx_mbuf_map[i] != NULL) { + bus_dmamap_sync(fp->rx_mbuf_tag, fp->rx_mbuf_map[i], + BUS_DMASYNC_POSTREAD); + bus_dmamap_unload(fp->rx_mbuf_tag, fp->rx_mbuf_map[i]); + } + + if (fp->rx_mbuf_ptr[i] != NULL) { + m_freem(fp->rx_mbuf_ptr[i]); + DBRUN(fp->rx_mbuf_alloc--); + fp->rx_mbuf_ptr[i] = NULL; + } + } + +bxe_free_rx_bd_chain_exit: + DBEXIT(BXE_VERBOSE_LOAD | BXE_VERBOSE_RESET); +} + /* + * Setup mutexes used by the driver. + * * Returns: * None. */ static void -bxe_alloc_mutexes(struct bxe_softc *sc) +bxe_mutexes_alloc(struct bxe_softc *sc) { struct bxe_fastpath *fp; int i; @@ -10726,7 +11011,7 @@ bxe_alloc_mutexes(struct bxe_softc *sc) BXE_PRINT_LOCK_INIT(sc, "bxe_print_lock"); /* Allocate one mutex for each fastpath structure. */ - for (i=0; i < sc->num_queues; i++ ) { + for (i = 0; i < sc->num_queues; i++ ) { fp = &sc->fp[i]; /* Allocate per fastpath mutexes. */ @@ -10739,23 +11024,25 @@ bxe_alloc_mutexes(struct bxe_softc *sc) } /* + * Free mutexes used by the driver. + * * Returns: * None. */ static void -bxe_free_mutexes(struct bxe_softc *sc) +bxe_mutexes_free(struct bxe_softc *sc) { struct bxe_fastpath *fp; int i; DBENTER(BXE_VERBOSE_UNLOAD); - for (i=0; i < sc->num_queues; i++ ) { + for (i = 0; i < sc->num_queues; i++ ) { fp = &sc->fp[i]; /* Release per fastpath mutexes. */ - if (mtx_initialized(&(fp->mtx))) - mtx_destroy(&(fp->mtx)); + if (mtx_initialized(&fp->mtx)) + mtx_destroy(&fp->mtx); } BXE_PRINT_LOCK_DESTROY(sc); @@ -10769,7 +11056,42 @@ bxe_free_mutexes(struct bxe_softc *sc) } +/* + * Free memory and clear the RX data structures. + * + * Returns: + * Nothing. + */ +static void +bxe_clear_rx_chains(struct bxe_softc *sc) +{ + struct bxe_fastpath *fp; + int i; + DBENTER(BXE_VERBOSE_RESET); + + for (i = 0; i < sc->num_queues; i++) { + fp = &sc->fp[i]; + + /* Free all RX buffers. */ + bxe_free_rx_bd_chain(fp); + bxe_free_tpa_pool(fp); + bxe_free_sg_chain(fp); + + /* Check if any mbufs lost in the process. */ + DBRUNIF((fp->tpa_mbuf_alloc), DBPRINT(sc, BXE_FATAL, + "%s(): Memory leak! Lost %d mbufs from fp[%02d] TPA pool!\n", + __FUNCTION__, fp->tpa_mbuf_alloc, fp->index)); + DBRUNIF((fp->sge_mbuf_alloc), DBPRINT(sc, BXE_FATAL, + "%s(): Memory leak! Lost %d mbufs from fp[%02d] SGE chain!\n", + __FUNCTION__, fp->sge_mbuf_alloc, fp->index)); + DBRUNIF((fp->rx_mbuf_alloc), DBPRINT(sc, BXE_FATAL, + "%s(): Memory leak! Lost %d mbufs from fp[%02d] RX chain!\n", + __FUNCTION__, fp->rx_mbuf_alloc, fp->index)); + } + + DBEXIT(BXE_VERBOSE_RESET); +} /* * Initialize the receive rings. @@ -10777,69 +11099,26 @@ bxe_free_mutexes(struct bxe_softc *sc) * Returns: * None. */ -static void +static int bxe_init_rx_chains(struct bxe_softc *sc) { struct bxe_fastpath *fp; - struct eth_rx_sge *sge; - struct eth_rx_bd *rx_bd; - struct eth_rx_cqe_next_page *nextpg; - uint16_t rx_bd_prod, rx_sge_prod; - int func, i, j, rcq_idx, rx_idx, rx_sge_idx, max_agg_queues; + int func, i, rc; DBENTER(BXE_VERBOSE_LOAD | BXE_VERBOSE_RESET); - + rc = 0; func = BP_FUNC(sc); - max_agg_queues = CHIP_IS_E1(sc) ? ETH_MAX_AGGREGATION_QUEUES_E1 : - ETH_MAX_AGGREGATION_QUEUES_E1H; - - sc->rx_buf_size = sc->mbuf_alloc_size; - - /* Allocate memory for the TPA pool. */ - if (TPA_ENABLED(sc)) { - DBPRINT(sc, (BXE_INFO_LOAD | BXE_INFO_RESET), - "%s(): mtu = %d, rx_buf_size = %d\n", __FUNCTION__, - (int)sc->bxe_ifp->if_mtu, sc->rx_buf_size); - - for (i = 0; i < sc->num_queues; i++) { - fp = &sc->fp[i]; - DBPRINT(sc, (BXE_INSANE_LOAD | BXE_INSANE_RESET), - "%s(): Initializing fp[%02d] TPA pool.\n", - __FUNCTION__, i); - - for (j = 0; j < max_agg_queues; j++) { - DBPRINT(sc, - (BXE_INSANE_LOAD | BXE_INSANE_RESET), - "%s(): Initializing fp[%02d] TPA " - "pool[%d].\n", __FUNCTION__, i, j); - - fp->disable_tpa = 0; - fp->tpa_mbuf_ptr[j] = bxe_alloc_tpa_mbuf(fp, j, - sc->mbuf_alloc_size); - - if (fp->tpa_mbuf_ptr[j] == NULL) { - fp->tpa_mbuf_alloc_failed++; - BXE_PRINTF("TPA disabled on " - "fp[%02d]!\n", i); - bxe_free_tpa_pool(fp, j); - fp->disable_tpa = 1; - break; - } - fp->tpa_state[j] = BXE_TPA_STATE_STOP; - } - } - } /* Allocate memory for RX and CQ chains. */ for (i = 0; i < sc->num_queues; i++) { fp = &sc->fp[i]; DBPRINT(sc, (BXE_VERBOSE_LOAD | BXE_VERBOSE_RESET), - "%s(): Initializing fp[%d] RX chain.\n", __FUNCTION__, i); + "%s(): Initializing fp[%02d] RX chain.\n", __FUNCTION__, i); fp->rx_bd_cons = fp->rx_bd_prod = 0; fp->rx_cq_cons = fp->rx_cq_prod = 0; - /* Status block's completion queue consumer index. */ + /* Pointer to status block's CQ consumer index. */ fp->rx_cq_cons_sb = &fp->status_block-> u_status_block.index_values[HC_INDEX_U_ETH_RX_CQ_CONS]; @@ -10847,138 +11126,30 @@ bxe_init_rx_chains(struct bxe_softc *sc) fp->rx_bd_cons_sb = &fp->status_block-> u_status_block.index_values[HC_INDEX_U_ETH_RX_BD_CONS]; - if (TPA_ENABLED(sc)) { - DBPRINT(sc, (BXE_INSANE_LOAD | BXE_INSANE_RESET), - "%s(): Linking fp[%d] SGE rings.\n", __FUNCTION__, - i); - - /* Link the SGE Ring Pages to form SGE chain */ - for (j = 0; j < NUM_RX_SGE_PAGES; j++) { - rx_sge_idx = ((j + 1) % NUM_RX_SGE_PAGES); - sge = &fp->rx_sge_chain[j][MAX_RX_SGE_CNT]; - - DBPRINT(sc, (BXE_EXTREME_LOAD | BXE_EXTREME_RESET), - "%s(): fp[%02d].rx_sge_chain[%02d][0x%04X]=0x%jX\n", - __FUNCTION__, i, j, - (uint16_t) MAX_RX_SGE_CNT, - (uintmax_t) fp->rx_sge_chain_paddr[rx_sge_idx]); - - sge->addr_hi = - htole32(U64_HI(fp->rx_sge_chain_paddr[rx_sge_idx])); - sge->addr_lo = - htole32(U64_LO(fp->rx_sge_chain_paddr[rx_sge_idx])); - } - - bxe_init_sge_ring_bit_mask(fp); - } - - DBPRINT(sc, (BXE_INSANE_LOAD | BXE_INSANE_RESET), - "%s(): Linking fp[%d] RX chain pages.\n", __FUNCTION__, i); - - /* Link the pages to form the RX BD Chain. */ - for (j = 0; j < NUM_RX_PAGES; j++) { - rx_idx = ((j + 1) % NUM_RX_PAGES); - rx_bd = &fp->rx_bd_chain[j][USABLE_RX_BD_PER_PAGE]; - - DBPRINT(sc, (BXE_EXTREME_LOAD), - "%s(): fp[%02d].rx_bd_chain[%02d][0x%04X]=0x%jX\n", - __FUNCTION__, i, j, - (uint16_t) USABLE_RX_BD_PER_PAGE, - (uintmax_t) fp->rx_bd_chain_paddr[rx_idx]); - - rx_bd->addr_hi = - htole32(U64_HI(fp->rx_bd_chain_paddr[rx_idx])); - rx_bd->addr_lo = - htole32(U64_LO(fp->rx_bd_chain_paddr[rx_idx])); - } - - DBPRINT(sc, (BXE_INSANE_LOAD | BXE_INSANE_RESET), - "%s(): Linking fp[%d] RX completion chain pages.\n", - __FUNCTION__, i); - - /* Link the pages to form the RX Completion Queue.*/ - for (j = 0; j < NUM_RCQ_PAGES; j++) { - rcq_idx = ((j + 1) % NUM_RCQ_PAGES); - nextpg = (struct eth_rx_cqe_next_page *) - &fp->rx_cq_chain[j][USABLE_RCQ_ENTRIES_PER_PAGE]; - - DBPRINT(sc, (BXE_EXTREME_LOAD), - "%s(): fp[%02d].rx_cq_chain[%02d][0x%04X]=0x%jX\n", - __FUNCTION__, i, j, - (uint16_t) USABLE_RCQ_ENTRIES_PER_PAGE, - (uintmax_t) fp->rx_cq_chain_paddr[rcq_idx]); - - nextpg->addr_hi = - htole32(U64_HI(fp->rx_cq_chain_paddr[rcq_idx])); - nextpg->addr_lo = - htole32(U64_LO(fp->rx_cq_chain_paddr[rcq_idx])); - } - - if (TPA_ENABLED(sc)) { - /* Allocate SGEs and initialize the ring elements. */ - rx_sge_prod = 0; - - while (rx_sge_prod < sc->rx_ring_size) { - if (bxe_alloc_rx_sge(sc, fp, rx_sge_prod) != 0) { - fp->tpa_mbuf_alloc_failed++; - BXE_PRINTF( - "%s(%d): Memory allocation failure! " - "Disabling TPA for fp[%02d].\n", - __FILE__, __LINE__, i); - - /* Cleanup already allocated elements */ - bxe_free_rx_sge_range(sc, fp, - rx_sge_prod); - fp->disable_tpa = 1; - rx_sge_prod = 0; - break; - } - rx_sge_prod = NEXT_SGE_IDX(rx_sge_prod); - } - - fp->rx_sge_prod = rx_sge_prod; - } - - /* - * Allocate buffers for all the RX BDs in RX BD Chain. - */ - rx_bd_prod = 0; - DBRUN(fp->free_rx_bd = sc->rx_ring_size); - - for (j = 0; j < sc->rx_ring_size; j++) { - if (bxe_get_buf(fp, NULL, rx_bd_prod)) { - BXE_PRINTF( - "%s(%d): Memory allocation failure! Cannot fill fp[%d] RX chain.\n", - __FILE__, __LINE__, i); - break; - } - rx_bd_prod = NEXT_RX_BD(rx_bd_prod); - } - - /* Update the driver's copy of the producer indices. */ - fp->rx_bd_prod = rx_bd_prod; fp->rx_cq_prod = TOTAL_RCQ_ENTRIES; - fp->rx_pkts = fp->rx_calls = 0; + fp->rx_pkts = fp->rx_tpa_pkts = fp->rx_soft_errors = 0; - DBPRINT(sc, (BXE_VERBOSE_LOAD | BXE_VERBOSE_RESET), - "%s(): USABLE_RX_BD=0x%04X, USABLE_RCQ_ENTRIES=0x%04X\n", - __FUNCTION__, (uint16_t) USABLE_RX_BD, - (uint16_t) USABLE_RCQ_ENTRIES); - DBPRINT(sc, (BXE_VERBOSE_LOAD | BXE_VERBOSE_RESET), - "%s(): fp[%02d]->rx_bd_prod=0x%04X, rx_cq_prod=0x%04X\n", - __FUNCTION__, i, fp->rx_bd_prod, fp->rx_cq_prod); + /* Allocate memory for the receive chain. */ + rc = bxe_fill_rx_bd_chain(fp); + if (rc != 0) + goto bxe_init_rx_chains_exit; + + /* Allocate memory for TPA pool. */ + rc = bxe_fill_tpa_pool(fp); + if (rc != 0) + goto bxe_init_rx_chains_exit; + /* Allocate memory for scatter-gather chain. */ + rc = bxe_fill_sg_chain(fp); + if (rc != 0) + goto bxe_init_rx_chains_exit; - /* Prepare the recevie BD and CQ buffers for DMA access. */ - for (j = 0; j < NUM_RX_PAGES; j++) - bus_dmamap_sync(fp->rx_bd_chain_tag, - fp->rx_bd_chain_map[j], BUS_DMASYNC_PREREAD | - BUS_DMASYNC_PREWRITE); + /* Prepare the receive BD and CQ buffers for DMA access. */ + bus_dmamap_sync(fp->rx_dma.tag, fp->rx_dma.map, + BUS_DMASYNC_PREREAD | BUS_DMASYNC_PREWRITE); - for (j = 0; j < NUM_RCQ_PAGES; j++) - bus_dmamap_sync(fp->rx_cq_chain_tag, - fp->rx_cq_chain_map[j], BUS_DMASYNC_PREREAD | - BUS_DMASYNC_PREWRITE); + bus_dmamap_sync(fp->rcq_dma.tag, fp->rcq_dma.map, + BUS_DMASYNC_PREREAD | BUS_DMASYNC_PREWRITE); /* * Tell the controller that we have rx_bd's and CQE's @@ -10989,6 +11160,7 @@ bxe_init_rx_chains(struct bxe_softc *sc) bxe_update_rx_prod(sc, fp, fp->rx_bd_prod, fp->rx_cq_prod, fp->rx_sge_prod); + /* ToDo - Move to dma_alloc(). */ /* * Tell controller where the receive CQ * chains start in physical memory. @@ -10996,214 +11168,123 @@ bxe_init_rx_chains(struct bxe_softc *sc) if (i == 0) { REG_WR(sc, BAR_USTORM_INTMEM + USTORM_MEM_WORKAROUND_ADDRESS_OFFSET(func), - U64_LO(fp->rx_cq_chain_paddr[0])); + U64_LO(fp->rcq_dma.paddr)); REG_WR(sc, BAR_USTORM_INTMEM + USTORM_MEM_WORKAROUND_ADDRESS_OFFSET(func) + 4, - U64_HI(fp->rx_cq_chain_paddr[0])); + U64_HI(fp->rcq_dma.paddr)); } } - /* - * ToDo: Need a cleanup path if memory allocation - * fails during initializtion. This is especially - * easy if multiqueue is used on a system with - * jumbo frames and many CPUs. On my 16GB system - * with 8 CPUs I get the following defaults: - * - * kern.ipc.nmbjumbo16: 3200 - * kern.ipc.nmbjumbo9: 6400 - * kern.ipc.nmbjumbop: 12800 - * kern.ipc.nmbclusters: 25600 - */ - - DBEXIT(BXE_VERBOSE_LOAD | BXE_VERBOSE_RESET); -} - -/* - * Initialize the transmit chain. - * - * Returns: - * None. - */ -static void -bxe_init_tx_chains(struct bxe_softc *sc) -{ - struct bxe_fastpath *fp; - struct eth_tx_next_bd *tx_n_bd; - int i, j; - - DBENTER(BXE_VERBOSE_LOAD | BXE_VERBOSE_RESET); - - for (i = 0; i < sc->num_queues; i++) { - fp = &sc->fp[i]; - - DBPRINT(sc, (BXE_INSANE_LOAD | BXE_INSANE_RESET), - "%s(): Linking fp[%d] TX chain pages.\n", __FUNCTION__, i); - - for (j = 0; j < NUM_TX_PAGES; j++) { - tx_n_bd = - &fp->tx_bd_chain[j][USABLE_TX_BD_PER_PAGE].next_bd; - - DBPRINT(sc, (BXE_INSANE_LOAD | BXE_INSANE_RESET), - "%s(): Linking fp[%d] TX BD chain page[%d].\n", - __FUNCTION__, i, j); - - tx_n_bd->addr_hi = - htole32(U64_HI(fp->tx_bd_chain_paddr[(j + 1) % - NUM_TX_PAGES])); - tx_n_bd->addr_lo = - htole32(U64_LO(fp->tx_bd_chain_paddr[(j + 1) % - NUM_TX_PAGES])); - } - - fp->tx_db.data.header.header = DOORBELL_HDR_DB_TYPE; - fp->tx_db.data.zero_fill1 = 0; - fp->tx_db.data.prod = 0; - - fp->tx_pkt_prod = 0; - fp->tx_pkt_cons = 0; - fp->tx_bd_prod = 0; - fp->tx_bd_cons = 0; - fp->used_tx_bd = 0; - - /* - * Copy of TX BD Chain completion queue Consumer Index - * from the Status Block. - */ - fp->tx_cons_sb = - &fp->status_block->c_status_block.index_values[C_SB_ETH_TX_CQ_INDEX]; - - fp->tx_pkts = 0; - } +bxe_init_rx_chains_exit: + /* Release memory if an error occurred. */ + if (rc != 0) + bxe_clear_rx_chains(sc); DBEXIT(BXE_VERBOSE_LOAD | BXE_VERBOSE_RESET); + return (rc); } /* - * Free memory and clear the RX data structures. + * Free memory and clear the TX data structures. * * Returns: * Nothing. */ static void -bxe_free_rx_chains(struct bxe_softc *sc) +bxe_clear_tx_chains(struct bxe_softc *sc) { struct bxe_fastpath *fp; - int i, j, max_agg_queues; + int i, j; DBENTER(BXE_VERBOSE_RESET); for (i = 0; i < sc->num_queues; i++) { fp = &sc->fp[i]; - if (fp->rx_mbuf_tag) { - /* Free any mbufs still in the RX mbuf chain. */ - for (j = 0; j < TOTAL_RX_BD; j++) { - if (fp->rx_mbuf_ptr[j] != NULL) { - if (fp->rx_mbuf_map[j] != NULL) - bus_dmamap_sync(fp->rx_mbuf_tag, - fp->rx_mbuf_map[j], - BUS_DMASYNC_POSTREAD); - DBRUN(fp->rx_mbuf_alloc--); - m_freem(fp->rx_mbuf_ptr[j]); - fp->rx_mbuf_ptr[j] = NULL; - } - } - - /* Clear each RX chain page. */ - for (j = 0; j < NUM_RX_PAGES; j++) { - if (fp->rx_bd_chain[j] != NULL) - bzero((char *)fp->rx_bd_chain[j], - BXE_RX_CHAIN_PAGE_SZ); - } - /* Clear each RX completion queue page. */ - for (j = 0; j < NUM_RCQ_PAGES; j++) { - if (fp->rx_cq_chain[j] != NULL) - bzero((char *)fp->rx_cq_chain[j], - BXE_RX_CHAIN_PAGE_SZ); - } - - if (TPA_ENABLED(sc)) { - max_agg_queues = CHIP_IS_E1H(sc) ? - ETH_MAX_AGGREGATION_QUEUES_E1H : - ETH_MAX_AGGREGATION_QUEUES_E1; - - /* Free the TPA Pool mbufs. */ - bxe_free_tpa_pool(fp, max_agg_queues); - - /* - * Free any mbufs still in the RX SGE - * buf chain. - */ - bxe_free_rx_sge_range(fp->sc, fp, MAX_RX_SGE); - - /* Clear each RX SGE page. */ - for (j = 0; j < NUM_RX_SGE_PAGES; j++) { - if (fp->rx_sge_chain[j] != NULL) - bzero( - (char *)fp->rx_sge_chain[j], - BXE_RX_CHAIN_PAGE_SZ); + /* Free all mbufs and unload all maps. */ + if (fp->tx_mbuf_tag) { + for (j = 0; j < TOTAL_TX_BD; j++) { + if (fp->tx_mbuf_ptr[j] != NULL) { + bus_dmamap_sync(fp->tx_mbuf_tag, + fp->tx_mbuf_map[j], + BUS_DMASYNC_POSTWRITE); + bus_dmamap_unload(fp->tx_mbuf_tag, + fp->tx_mbuf_map[j]); + m_freem(fp->tx_mbuf_ptr[j]); + fp->tx_mbuf_alloc--; + fp->tx_mbuf_ptr[j] = NULL; } } } /* Check if we lost any mbufs in the process. */ - DBRUNIF((fp->rx_mbuf_alloc), DBPRINT(sc, BXE_FATAL, - "%s(): Memory leak! Lost %d mbufs from fp[%d] RX chain!\n", - __FUNCTION__, fp->rx_mbuf_alloc, fp->index)); + DBRUNIF((fp->tx_mbuf_alloc), DBPRINT(sc, BXE_FATAL, + "%s(): Memory leak! Lost %d mbufs from fp[%02d] TX chain!\n", + __FUNCTION__, fp->tx_mbuf_alloc, fp->index)); } DBEXIT(BXE_VERBOSE_RESET); } /* - * Free memory and clear the TX data structures. + * Initialize the transmit chain. * * Returns: - * Nothing. + * None. */ static void -bxe_free_tx_chains(struct bxe_softc *sc) +bxe_init_tx_chains(struct bxe_softc *sc) { struct bxe_fastpath *fp; int i, j; - DBENTER(BXE_VERBOSE_RESET); + DBENTER(BXE_VERBOSE_LOAD | BXE_VERBOSE_RESET); for (i = 0; i < sc->num_queues; i++) { fp = &sc->fp[i]; - if (fp->tx_mbuf_tag) { - /* - * Unmap, unload, and free any mbufs in the - * TX mbuf chain. - */ - for (j = 0; j < TOTAL_TX_BD; j++) { - if (fp->tx_mbuf_ptr[j] != NULL) { - if (fp->tx_mbuf_map[j] != NULL) - bus_dmamap_sync(fp->tx_mbuf_tag, - fp->tx_mbuf_map[j], - BUS_DMASYNC_POSTWRITE); - DBRUN(fp->tx_mbuf_alloc--); - m_freem(fp->tx_mbuf_ptr[j]); - fp->tx_mbuf_ptr[j] = NULL; - } - } - /* Clear each TX chain page. */ - for (j = 0; j < NUM_TX_PAGES; j++) { - if (fp->tx_bd_chain[j] != NULL) - bzero((char *)fp->tx_bd_chain[j], - BXE_TX_CHAIN_PAGE_SZ); - } + /* Initialize transmit doorbell. */ + fp->tx_db.data.header.header = DOORBELL_HDR_DB_TYPE; + fp->tx_db.data.zero_fill1 = 0; + fp->tx_db.data.prod = 0; + + /* Initialize tranmsit producer/consumer indices. */ + fp->tx_pkt_prod = fp->tx_pkt_cons = 0; + fp->tx_bd_prod = fp->tx_bd_cons = 0; + fp->tx_bd_used = 0; - /* Check if we lost any mbufs in the process. */ - DBRUNIF((fp->tx_mbuf_alloc), DBPRINT(sc, BXE_FATAL, - "%s(): Memory leak! Lost %d mbufs from fp[%d] TX chain!\n", - __FUNCTION__, fp->tx_mbuf_alloc, fp->index)); + /* Pointer to TX packet consumer in status block. */ + fp->tx_pkt_cons_sb = + &fp->status_block->c_status_block.index_values[C_SB_ETH_TX_CQ_INDEX]; + + /* Soft TX counters. */ + fp->tx_pkts = 0; + fp->tx_soft_errors = 0; + fp->tx_offload_frames_csum_ip = 0; + fp->tx_offload_frames_csum_tcp = 0; + fp->tx_offload_frames_csum_udp = 0; + fp->tx_offload_frames_tso = 0; + fp->tx_header_splits = 0; + fp->tx_encap_failures = 0; + fp->tx_hw_queue_full = 0; + fp->tx_hw_max_queue_depth = 0; + fp->tx_dma_mapping_failure = 0; + fp->tx_max_drbr_queue_depth = 0; + fp->tx_window_violation_std = 0; + fp->tx_window_violation_tso = 0; + fp->tx_unsupported_tso_request_ipv6 = 0; + fp->tx_unsupported_tso_request_not_tcp = 0; + fp->tx_chain_lost_mbuf = 0; + fp->tx_frame_deferred = 0; + fp->tx_queue_xoff = 0; + + /* Clear all TX mbuf pointers. */ + for (j = 0; j < TOTAL_TX_BD; j++) { + fp->tx_mbuf_ptr[j] = NULL; } } - DBEXIT(BXE_VERBOSE_RESET); + DBEXIT(BXE_VERBOSE_LOAD | BXE_VERBOSE_RESET); } /* @@ -11232,9 +11313,9 @@ bxe_init_sp_ring(struct bxe_softc *sc) /* Tell the controller the address of the slowpath ring. */ REG_WR(sc, XSEM_REG_FAST_MEMORY + XSTORM_SPQ_PAGE_BASE_OFFSET(func), - U64_LO(sc->spq_paddr)); + U64_LO(sc->spq_dma.paddr)); REG_WR(sc, XSEM_REG_FAST_MEMORY + XSTORM_SPQ_PAGE_BASE_OFFSET(func) + 4, - U64_HI(sc->spq_paddr)); + U64_HI(sc->spq_dma.paddr)); REG_WR(sc, XSEM_REG_FAST_MEMORY + XSTORM_SPQ_PROD_OFFSET(func), sc->spq_prod_idx); @@ -11283,27 +11364,33 @@ bxe_init_context(struct bxe_softc *sc) context->ustorm_st_context.common.mc_alignment_log_size = 8; /* Set the size of the receive buffers. */ context->ustorm_st_context.common.bd_buff_size = - sc->rx_buf_size; + sc->mbuf_alloc_size; /* Set the address of the receive chain base page. */ context->ustorm_st_context.common.bd_page_base_hi = - U64_HI(fp->rx_bd_chain_paddr[0]); + U64_HI(fp->rx_dma.paddr); context->ustorm_st_context.common.bd_page_base_lo = - U64_LO(fp->rx_bd_chain_paddr[0]); + U64_LO(fp->rx_dma.paddr); - if (TPA_ENABLED(sc) && !(fp->disable_tpa)) { + if (TPA_ENABLED(sc) && (fp->disable_tpa == FALSE)) { /* Enable TPA and SGE chain support. */ context->ustorm_st_context.common.flags |= USTORM_ETH_ST_CONTEXT_CONFIG_ENABLE_TPA; + /* Set the size of the SGE buffer. */ context->ustorm_st_context.common.sge_buff_size = - (uint16_t) (PAGES_PER_SGE * BCM_PAGE_SIZE); + (uint16_t) (SGE_PAGE_SIZE * PAGES_PER_SGE); + /* Set the address of the SGE chain base page. */ context->ustorm_st_context.common.sge_page_base_hi = - U64_HI(fp->rx_sge_chain_paddr[0]); + U64_HI(fp->sg_dma.paddr); context->ustorm_st_context.common.sge_page_base_lo = - U64_LO(fp->rx_sge_chain_paddr[0]); + U64_LO(fp->sg_dma.paddr); + + DBPRINT(sc, BXE_VERBOSE_TPA, "%s(): MTU = %d\n", + __FUNCTION__, (int) sc->bxe_ifp->if_mtu); + /* Describe MTU to SGE alignment. */ context->ustorm_st_context.common.max_sges_for_packet = SGE_PAGE_ALIGN(sc->bxe_ifp->if_mtu) >> SGE_PAGE_SHIFT; @@ -11311,6 +11398,10 @@ bxe_init_context(struct bxe_softc *sc) ((context->ustorm_st_context.common. max_sges_for_packet + PAGES_PER_SGE - 1) & (~(PAGES_PER_SGE - 1))) >> PAGES_PER_SGE_SHIFT; + + DBPRINT(sc, BXE_VERBOSE_TPA, + "%s(): max_sges_for_packet = %d\n", __FUNCTION__, + context->ustorm_st_context.common.max_sges_for_packet); } /* Update USTORM context. */ @@ -11325,9 +11416,9 @@ bxe_init_context(struct bxe_softc *sc) /* Set the address of the transmit chain base page. */ context->xstorm_st_context.tx_bd_page_base_hi = - U64_HI(fp->tx_bd_chain_paddr[0]); + U64_HI(fp->tx_dma.paddr); context->xstorm_st_context.tx_bd_page_base_lo = - U64_LO(fp->tx_bd_chain_paddr[0]); + U64_LO(fp->tx_dma.paddr); /* Enable XSTORM statistics. */ context->xstorm_st_context.statistics_data = (cl_id | @@ -11592,7 +11683,7 @@ bxe_init_internal_func(struct bxe_softc *sc) } /* Enable TPA if needed */ - if (sc->bxe_flags & BXE_TPA_ENABLE_FLAG) + if (TPA_ENABLED(sc)) tstorm_config.config_flags |= TSTORM_ETH_FUNCTION_COMMON_CONFIG_ENABLE_TPA; @@ -11693,21 +11784,24 @@ bxe_init_internal_func(struct bxe_softc *sc) } /* Init completion queue mapping and TPA aggregation size. */ - max_agg_size = min((uint32_t)(sc->rx_buf_size + 8 * BCM_PAGE_SIZE * - PAGES_PER_SGE), (uint32_t)0xffff); + max_agg_size = min((uint32_t)(sc->mbuf_alloc_size + + (8 * BCM_PAGE_SIZE * PAGES_PER_SGE)), (uint32_t)0xffff); + + DBPRINT(sc, BXE_VERBOSE_TPA, "%s(): max_agg_size = 0x%08X\n", + __FUNCTION__, max_agg_size); for (i = 0; i < sc->num_queues; i++) { fp = &sc->fp[i]; nextpg = (struct eth_rx_cqe_next_page *) - &fp->rx_cq_chain[0][USABLE_RCQ_ENTRIES_PER_PAGE]; + &fp->rcq_chain[USABLE_RCQ_ENTRIES_PER_PAGE]; /* Program the completion queue address. */ REG_WR(sc, BAR_USTORM_INTMEM + USTORM_CQE_PAGE_BASE_OFFSET(port, fp->cl_id), - U64_LO(fp->rx_cq_chain_paddr[0])); + U64_LO(fp->rcq_dma.paddr)); REG_WR(sc, BAR_USTORM_INTMEM + USTORM_CQE_PAGE_BASE_OFFSET(port, fp->cl_id) + 4, - U64_HI(fp->rx_cq_chain_paddr[0])); + U64_HI(fp->rcq_dma.paddr)); /* Program the first CQ next page address. */ REG_WR(sc, BAR_USTORM_INTMEM + @@ -11735,7 +11829,7 @@ bxe_init_internal_func(struct bxe_softc *sc) for (i = 0; i < sc->num_queues; i++) { fp = &sc->fp[i]; - if (!fp->disable_tpa) { + if (fp->disable_tpa == FALSE) { rx_pause.sge_thr_low = 150; rx_pause.sge_thr_high = 250; } @@ -11818,18 +11912,18 @@ bxe_init_internal(struct bxe_softc *sc, uint32_t load_code) * Returns: * None */ -static void +static int bxe_init_nic(struct bxe_softc *sc, uint32_t load_code) { struct bxe_fastpath *fp; - int i; + int i, rc; DBENTER(BXE_VERBOSE_LOAD | BXE_VERBOSE_RESET); /* Intialize fastpath structures and the status block. */ for (i = 0; i < sc->num_queues; i++) { fp = &sc->fp[i]; - fp->disable_tpa = 1; + fp->disable_tpa = TRUE; bzero((char *)fp->status_block, BXE_STATUS_BLK_SZ); fp->fp_u_idx = 0; @@ -11851,29 +11945,31 @@ bxe_init_nic(struct bxe_softc *sc, uint32_t load_code) fp->sb_id = fp->cl_id; DBPRINT(sc, (BXE_VERBOSE_LOAD | BXE_VERBOSE_RESET), - "%s(): fp[%d]: cl_id = %d, sb_id = %d\n", + "%s(): fp[%02d]: cl_id = %d, sb_id = %d\n", __FUNCTION__, fp->index, fp->cl_id, fp->sb_id); /* Initialize the fastpath status block. */ - bxe_init_sb(sc, fp->status_block, fp->status_block_paddr, + bxe_init_sb(sc, fp->status_block, fp->sb_dma.paddr, fp->sb_id); bxe_update_fpsb_idx(fp); } rmb(); - bzero((char *)sc->def_status_block, BXE_DEF_STATUS_BLK_SZ); + bzero((char *)sc->def_sb, BXE_DEF_STATUS_BLK_SZ); /* Initialize the Default Status Block. */ - bxe_init_def_sb(sc, sc->def_status_block, sc->def_status_block_paddr, - DEF_SB_ID); + bxe_init_def_sb(sc, sc->def_sb, sc->def_sb_dma.paddr, DEF_SB_ID); bxe_update_dsb_idx(sc); /* Initialize the coalescence parameters. */ bxe_update_coalesce(sc); - /* Intiialize the Receive BD Chain and Receive Completion Chain. */ - bxe_init_rx_chains(sc); + /* Initialize receive chains. */ + rc = bxe_init_rx_chains(sc); + if (rc != 0) { + goto bxe_init_nic_exit; + } /* Initialize the Transmit BD Chain. */ bxe_init_tx_chains(sc); @@ -11895,46 +11991,7 @@ bxe_init_nic(struct bxe_softc *sc, uint32_t load_code) /* Disable the interrupts from device until init is complete.*/ bxe_int_disable(sc); - DBEXIT(BXE_VERBOSE_LOAD | BXE_VERBOSE_RESET); -} - -/* -* -* Returns: -* 0 = Success, !0 = Failure -*/ -static int -bxe_gunzip_init(struct bxe_softc *sc) -{ - int rc; - - rc = 0; - - DBENTER(BXE_VERBOSE_LOAD | BXE_VERBOSE_RESET); - - bxe_dmamem_alloc(sc, sc->gunzip_tag, sc->gunzip_map, sc->gunzip_buf, - FW_BUF_SIZE, &sc->gunzip_mapping); - - if (sc->gunzip_buf == NULL) - goto bxe_gunzip_init_nomem1; - - sc->strm = malloc(sizeof(*sc->strm), M_DEVBUF, M_NOWAIT); - if (sc->strm == NULL) - goto bxe_gunzip_init_nomem2; - - goto bxe_gunzip_init_exit; - -bxe_gunzip_init_nomem2: - bxe_dmamem_free(sc, sc->gunzip_tag, sc->gunzip_buf, sc->gunzip_map); - sc->gunzip_buf = NULL; - -bxe_gunzip_init_nomem1: - BXE_PRINTF( - "%s(%d): Cannot allocate firmware buffer for decompression!\n", - __FILE__, __LINE__); - rc = ENOMEM; - -bxe_gunzip_init_exit: +bxe_init_nic_exit: DBEXIT(BXE_VERBOSE_LOAD | BXE_VERBOSE_RESET); return (rc); } @@ -11948,14 +12005,14 @@ bxe_gunzip_init_exit: static void bxe_lb_pckt(struct bxe_softc *sc) { -#ifdef USE_DMAE +#ifdef BXE_USE_DMAE uint32_t wb_write[3]; #endif DBENTER(BXE_VERBOSE_LOAD | BXE_VERBOSE_RESET); /* Ethernet source and destination addresses. */ -#ifdef USE_DMAE +#ifdef BXE_USE_DMAE wb_write[0] = 0x55555555; wb_write[1] = 0x55555555; wb_write[2] = 0x20; /* SOP */ @@ -11967,7 +12024,7 @@ bxe_lb_pckt(struct bxe_softc *sc) #endif /* NON-IP protocol. */ -#ifdef USE_DMAE +#ifdef BXE_USE_DMAE wb_write[0] = 0x09000000; wb_write[1] = 0x55555555; wb_write[2] = 0x10; /* EOP */ @@ -12130,7 +12187,8 @@ bxe_int_mem_test(struct bxe_softc *sc) val = REG_RD(sc, NIG_REG_INGRESS_EOP_LB_EMPTY); if (val != 1) { - DBPRINT(sc, BXE_INFO, "clear of NIG failed\n"); + DBPRINT(sc, BXE_INFO, "%s(): Unable to clear NIG!\n", + __FUNCTION__); rc = 6; goto bxe_int_mem_test_exit; } @@ -12495,7 +12553,7 @@ bxe_setup_fan_failure_detection(struct bxe_softc *sc) int is_required, port; is_required = 0; - if (BP_NOMCP(sc)) + if (NOMCP(sc)) return; val = SHMEM_RD(sc, dev_info.shared_hw_config.config2) & @@ -12787,7 +12845,7 @@ bxe_init_common(struct bxe_softc *sc) bxe_enable_blocks_attention(sc); - if (!BP_NOMCP(sc)) { + if (!NOMCP(sc)) { bxe_acquire_phy_lock(sc); bxe_common_init_phy(sc, sc->common.shmem_base); bxe_release_phy_lock(sc); @@ -12813,7 +12871,7 @@ bxe_init_port(struct bxe_softc *sc) uint32_t val, low, high; uint32_t swap_val, swap_override, aeu_gpio_mask, offset; uint32_t reg_addr; - int i, init_stage, port; + int init_stage, port; port = BP_PORT(sc); init_stage = port ? PORT1_STAGE : PORT0_STAGE; @@ -12855,14 +12913,6 @@ bxe_init_port(struct bxe_softc *sc) REG_WR(sc, BRB1_REG_PAUSE_LOW_THRESHOLD_0 + port * 4, low); REG_WR(sc, BRB1_REG_PAUSE_HIGH_THRESHOLD_0 + port * 4, high); - if (sc->bxe_flags & BXE_SAFC_TX_FLAG) { - REG_WR(sc, BRB1_REG_HIGH_LLFC_LOW_THRESHOLD_0 + port * 4, 0xa0); - REG_WR(sc, BRB1_REG_HIGH_LLFC_HIGH_THRESHOLD_0 + port * 4, - 0xd8); - REG_WR(sc, BRB1_REG_LOW_LLFC_LOW_THRESHOLD_0 + port *4, 0xa0); - REG_WR(sc, BRB1_REG_LOW_LLFC_HIGH_THRESHOLD_0 + port * 4, 0xd8); - } - /* Port PRS comes here. */ bxe_init_block(sc, PRS_BLOCK, init_stage); @@ -12901,6 +12951,7 @@ bxe_init_port(struct bxe_softc *sc) REG_WR(sc, HC_REG_LEADING_EDGE_0 + port * 8, 0); REG_WR(sc, HC_REG_TRAILING_EDGE_0 + port * 8, 0); } + bxe_init_block(sc, HC_BLOCK, init_stage); bxe_init_block(sc, MISC_AEU_BLOCK, init_stage); @@ -12927,33 +12978,12 @@ bxe_init_port(struct bxe_softc *sc) /* Enable outer VLAN support if required. */ REG_WR(sc, NIG_REG_LLH0_BRB1_DRV_MASK_MF + port * 4, (IS_E1HOV(sc) ? 0x1 : 0x2)); - - if (sc->bxe_flags & BXE_SAFC_TX_FLAG){ - high = 0; - for (i = 0; i < BXE_MAX_PRIORITY; i++) { - if (sc->pri_map[i] == 1) - high |= (1 << i); - } - REG_WR(sc, NIG_REG_LLFC_HIGH_PRIORITY_CLASSES_0 + - port * 4, high); - low = 0; - for (i = 0; i < BXE_MAX_PRIORITY; i++) { - if (sc->pri_map[i] == 0) - low |= (1 << i); - } - REG_WR(sc, NIG_REG_LLFC_LOW_PRIORITY_CLASSES_0 + - port * 4, low); - - REG_WR(sc, NIG_REG_PAUSE_ENABLE_0 + port * 4, 0); - REG_WR(sc, NIG_REG_LLFC_ENABLE_0 + port * 4, 1); - REG_WR(sc, NIG_REG_LLFC_OUT_EN_0 + port * 4, 1); - } else { - REG_WR(sc, NIG_REG_LLFC_ENABLE_0 + port * 4, 0); - REG_WR(sc, NIG_REG_LLFC_OUT_EN_0 + port * 4, 0); - REG_WR(sc, NIG_REG_PAUSE_ENABLE_0 + port * 4, 1); - } } + REG_WR(sc, NIG_REG_LLFC_ENABLE_0 + port * 4, 0); + REG_WR(sc, NIG_REG_LLFC_OUT_EN_0 + port * 4, 0); + REG_WR(sc, NIG_REG_PAUSE_ENABLE_0 + port * 4, 1); + bxe_init_block(sc, MCP_BLOCK, init_stage); bxe_init_block(sc, DMAE_BLOCK, init_stage); @@ -13127,7 +13157,6 @@ bxe_init_hw(struct bxe_softc *sc, uint32_t load_code) DBENTER(BXE_VERBOSE_LOAD | BXE_VERBOSE_RESET); sc->dmae_ready = 0; - bxe_gunzip_init(sc); switch (load_code) { case FW_MSG_CODE_DRV_LOAD_COMMON: rc = bxe_init_common(sc); @@ -13154,21 +13183,19 @@ bxe_init_hw(struct bxe_softc *sc, uint32_t load_code) } /* Fetch additional config data if the bootcode is running. */ - if (!BP_NOMCP(sc)) { + if (!NOMCP(sc)) { func = BP_FUNC(sc); /* Fetch the pulse sequence number. */ sc->fw_drv_pulse_wr_seq = (SHMEM_RD(sc, func_mb[func].drv_pulse_mb) & DRV_PULSE_SEQ_MASK); } - /* This needs to be done before gunzip end. */ + /* Clear the default status block. */ bxe_zero_def_sb(sc); for (i = 0; i < sc->num_queues; i++) bxe_zero_sb(sc, BP_L_ID(sc) + i); bxe_init_hw_exit: - bxe_gunzip_end(sc); - DBEXIT(BXE_VERBOSE_LOAD | BXE_VERBOSE_RESET); return (rc); @@ -13194,8 +13221,6 @@ bxe_fw_command(struct bxe_softc *sc, uint32_t command) rc = 0; cnt = 1; - DBENTER(BXE_VERBOSE_LOAD | BXE_VERBOSE_RESET); - DBRUNMSG(BXE_VERBOSE, bxe_decode_mb_msgs(sc, (command | seq), 0)); BXE_FWMB_LOCK(sc); @@ -13225,321 +13250,285 @@ bxe_fw_command(struct bxe_softc *sc, uint32_t command) } BXE_FWMB_UNLOCK(sc); - - DBEXIT(BXE_VERBOSE_LOAD | BXE_VERBOSE_RESET); return (rc); } /* - * Free any DMA memory owned by the driver. - * - * Scans through each data structre that requires DMA memory and frees - * the memory if allocated. + * Allocate a block of memory and map it for DMA. No partial + * completions allowed, release any resources acquired if we + * can't acquire all resources. * * Returns: - * Nothing. + * 0 = Success, !0 = Failure + * + * Modifies: + * dma->paddr + * dma->vaddr + * dma->tag + * dma->map + * dma->size + * */ -static void -bxe_dma_free(struct bxe_softc *sc) +static int +bxe_dma_malloc(struct bxe_softc *sc, bus_size_t size, + struct bxe_dma *dma, int mapflags, const char *msg) { - struct bxe_fastpath *fp; - int i, j; + int rc; DBENTER(BXE_VERBOSE_LOAD | BXE_VERBOSE_RESET); - if (sc->parent_tag != NULL) { + DBRUNIF(dma->size > 0, + BXE_PRINTF("%s(): Called for %s with size > 0 (%05d)!\n", + __FUNCTION__, msg, (int) dma->size)); - for (i = 0; i < sc->num_queues; i++) { - fp = &sc->fp[i]; - /* Trust no one! */ - if (fp) { - /* Free, unmap, and destroy the status block. */ - if (fp->status_block_tag != NULL) { - if (fp->status_block_map != NULL) { - if (fp->status_block != NULL) - bus_dmamem_free( - fp->status_block_tag, - fp->status_block, - fp->status_block_map); - - bus_dmamap_unload( - fp->status_block_tag, - fp->status_block_map); - bus_dmamap_destroy( - fp->status_block_tag, - fp->status_block_map); - } + rc = bus_dma_tag_create( + sc->parent_tag, /* parent */ + BCM_PAGE_SIZE, /* alignment for segs */ + BXE_DMA_BOUNDARY, /* cannot cross */ + BUS_SPACE_MAXADDR, /* restricted low */ + BUS_SPACE_MAXADDR, /* restricted hi */ + NULL, NULL, /* filter f(), arg */ + size, /* max size for this tag */ + 1, /* # of discontinuities */ + size, /* max seg size */ + BUS_DMA_ALLOCNOW, /* flags */ + NULL, NULL, /* lock f(), arg */ + &dma->tag); - bus_dma_tag_destroy( - fp->status_block_tag); - } + if (rc != 0) { + BXE_PRINTF("%s(%d): bus_dma_tag_create() " + "failed (rc = %d) for %s!\n", + __FILE__, __LINE__, rc, msg); + goto bxe_dma_malloc_fail_create; + } - /* - * Free, unmap and destroy all TX BD - * chain pages. - */ - if (fp->tx_bd_chain_tag != NULL) { - for (j = 0; j < NUM_TX_PAGES; j++ ) { - if (fp->tx_bd_chain_map[j] != NULL) { - if (fp->tx_bd_chain[j] != NULL) - bus_dmamem_free(fp->tx_bd_chain_tag, - fp->tx_bd_chain[j], - fp->tx_bd_chain_map[j]); - - bus_dmamap_unload(fp->tx_bd_chain_tag, - fp->tx_bd_chain_map[j]); - bus_dmamap_destroy(fp->tx_bd_chain_tag, - fp->tx_bd_chain_map[j]); - } - } + rc = bus_dmamem_alloc(dma->tag, (void **)&dma->vaddr, + BUS_DMA_NOWAIT, &dma->map); + if (rc != 0) { + BXE_PRINTF("%s(%d): bus_dmamem_alloc() " + "failed (rc = %d) for %s!\n", + __FILE__, __LINE__, rc, msg); + goto bxe_dma_malloc_fail_alloc; + } - bus_dma_tag_destroy(fp->tx_bd_chain_tag); - } + rc = bus_dmamap_load(dma->tag, dma->map, dma->vaddr, size, + bxe_dma_map_addr, &dma->paddr, mapflags | BUS_DMA_NOWAIT); + if (rc != 0) { + BXE_PRINTF("%s(%d): bus_dmamap_load() " + "failed (rc = %d) for %s!\n", + __FILE__, __LINE__, rc, msg); + goto bxe_dma_malloc_fail_load; + } - /* Free, unmap and destroy all RX BD chain pages. */ - if (fp->rx_bd_chain_tag != NULL) { - - for (j = 0; j < NUM_RX_PAGES; j++ ) { - if (fp->rx_bd_chain_map[j] != NULL) { - if (fp->rx_bd_chain[j] != NULL) - bus_dmamem_free(fp->rx_bd_chain_tag, - fp->rx_bd_chain[j], - fp->rx_bd_chain_map[j]); - - bus_dmamap_unload(fp->rx_bd_chain_tag, - fp->rx_bd_chain_map[j]); - bus_dmamap_destroy(fp->rx_bd_chain_tag, - fp->rx_bd_chain_map[j]); - } - } + dma->size = size; - bus_dma_tag_destroy(fp->rx_bd_chain_tag); - } + DBPRINT(sc, BXE_VERBOSE, "%s(): size=%06d, vaddr=0x%p, " + "paddr=0x%jX - %s\n", __FUNCTION__, (int) dma->size, + dma->vaddr, (uintmax_t) dma->paddr, msg); - /* - * Free, unmap and destroy all RX CQ - * chain pages. - */ - if (fp->rx_cq_chain_tag != NULL) { - for (j = 0; j < NUM_RCQ_PAGES; j++ ) { - if (fp->rx_cq_chain_map[j] != NULL) { - if (fp->rx_cq_chain[j] != NULL) - bus_dmamem_free(fp->rx_cq_chain_tag, - fp->rx_cq_chain[j], - fp->rx_cq_chain_map[j]); - - bus_dmamap_unload(fp->rx_cq_chain_tag, - fp->rx_cq_chain_map[j]); - bus_dmamap_destroy(fp->rx_cq_chain_tag, - fp->rx_cq_chain_map[j]); - } - } + goto bxe_dma_malloc_exit; - bus_dma_tag_destroy(fp->rx_cq_chain_tag); - } +bxe_dma_malloc_fail_load: + bus_dmamem_free(dma->tag, dma->vaddr, dma->map); - /* Unload and destroy the TX mbuf maps. */ - if (fp->tx_mbuf_tag != NULL) { - for (j = 0; j < TOTAL_TX_BD; j++) { - if (fp->tx_mbuf_map[j] != NULL) { - bus_dmamap_unload(fp->tx_mbuf_tag, - fp->tx_mbuf_map[j]); - bus_dmamap_destroy(fp->tx_mbuf_tag, - fp->tx_mbuf_map[j]); - } - } +bxe_dma_malloc_fail_alloc: + bus_dma_tag_destroy(dma->tag); + dma->vaddr = NULL; - bus_dma_tag_destroy(fp->tx_mbuf_tag); - } +bxe_dma_malloc_fail_create: + dma->map = NULL; + dma->tag = NULL; + dma->size = 0; +bxe_dma_malloc_exit: + DBEXIT(BXE_VERBOSE_LOAD | BXE_VERBOSE_RESET); + return (rc); +} - if (TPA_ENABLED(sc)) { - int tpa_pool_max = CHIP_IS_E1H(sc) ? - ETH_MAX_AGGREGATION_QUEUES_E1H : - ETH_MAX_AGGREGATION_QUEUES_E1; +/* + * Release a block of DMA memory associated tag/map. + * + * Returns: + * None + */ +static void +bxe_dma_free(struct bxe_softc *sc, struct bxe_dma *dma) +{ + DBENTER(BXE_VERBOSE_LOAD | BXE_VERBOSE_UNLOAD); - /* Unload and destroy the TPA pool mbuf maps. */ - if (fp->rx_mbuf_tag != NULL) { + if (dma->size > 0) { + bus_dmamap_sync(dma->tag, dma->map, + BUS_DMASYNC_POSTREAD | BUS_DMASYNC_POSTWRITE); + bus_dmamap_unload(dma->tag, dma->map); + bus_dmamem_free(dma->tag, dma->vaddr, dma->map); + bus_dma_tag_destroy(dma->tag); + dma->size = 0; + } - for (j = 0; j < tpa_pool_max; j++) { + DBEXIT(BXE_VERBOSE_LOAD | BXE_VERBOSE_UNLOAD); +} - if (fp->tpa_mbuf_map[j] != NULL) { - bus_dmamap_unload(fp->rx_mbuf_tag, - fp->tpa_mbuf_map[j]); - bus_dmamap_destroy(fp->rx_mbuf_tag, - fp->tpa_mbuf_map[j]); - } - } - } +/* + * Free any DMA memory owned by the driver. + * + * Scans through each data structre that requires DMA memory and frees + * the memory if allocated. + * + * Returns: + * Nothing. + */ +static void +bxe_host_structures_free(struct bxe_softc *sc) +{ + struct bxe_fastpath *fp; + int i, j, max_agg_queues; - /* Free, unmap and destroy all RX SGE chain pages. */ - if (fp->rx_sge_chain_tag != NULL) { - for (j = 0; j < NUM_RX_SGE_PAGES; j++ ) { - if (fp->rx_sge_chain_map[j] != NULL) { - if (fp->rx_sge_chain[j] != NULL) - bus_dmamem_free(fp->rx_sge_chain_tag, - fp->rx_sge_chain[j], - fp->rx_sge_chain_map[j]); - - bus_dmamap_unload(fp->rx_sge_chain_tag, - fp->rx_sge_chain_map[j]); - bus_dmamap_destroy(fp->rx_sge_chain_tag, - fp->rx_sge_chain_map[j]); - } - } - - bus_dma_tag_destroy(fp->rx_sge_chain_tag); - } + DBENTER(BXE_VERBOSE_LOAD | BXE_VERBOSE_RESET | BXE_VERBOSE_UNLOAD); + max_agg_queues = CHIP_IS_E1H(sc) ? + ETH_MAX_AGGREGATION_QUEUES_E1H : + ETH_MAX_AGGREGATION_QUEUES_E1; - /* Unload and destroy the SGE Buf maps. */ - if (fp->rx_sge_buf_tag != NULL) { + if (sc->parent_tag == NULL) + goto bxe_host_structures_free_exit; - for (j = 0; j < TOTAL_RX_SGE; j++) { - if (fp->rx_sge_buf_map[j] != NULL) { - bus_dmamap_unload(fp->rx_sge_buf_tag, - fp->rx_sge_buf_map[j]); - bus_dmamap_destroy(fp->rx_sge_buf_tag, - fp->rx_sge_buf_map[j]); - } - } + for (i = 0; i < sc->num_queues; i++) { + fp = &sc->fp[i]; - bus_dma_tag_destroy(fp->rx_sge_buf_tag); - } - } + /* Trust no one! */ + if (fp == NULL) + break; - /* Unload and destroy the RX mbuf maps. */ - if (fp->rx_mbuf_tag != NULL) { - for (j = 0; j < TOTAL_RX_BD; j++) { - if (fp->rx_mbuf_map[j] != NULL) { - bus_dmamap_unload(fp->rx_mbuf_tag, - fp->rx_mbuf_map[j]); - bus_dmamap_destroy(fp->rx_mbuf_tag, - fp->rx_mbuf_map[j]); - } - } + /* Status block. */ + bxe_dma_free(sc, &fp->sb_dma); - bus_dma_tag_destroy(fp->rx_mbuf_tag); - } + /* TX chain. */ + bxe_dma_free(sc, &fp->tx_dma); + fp->tx_chain = NULL; - } - } + /* RX chain */ + bxe_dma_free(sc, &fp->rx_dma); + fp->rx_chain = NULL; - /* Destroy the def_status block. */ - if (sc->def_status_block_tag != NULL) { - if (sc->def_status_block_map != NULL) { - if (sc->def_status_block != NULL) - bus_dmamem_free( - sc->def_status_block_tag, - sc->def_status_block, - sc->def_status_block_map); - - bus_dmamap_unload(sc->def_status_block_tag, - sc->def_status_block_map); - bus_dmamap_destroy(sc->def_status_block_tag, - sc->def_status_block_map); - } + /* RCQ chain */ + bxe_dma_free(sc, &fp->rcq_dma); + fp->rcq_chain = NULL; - bus_dma_tag_destroy(sc->def_status_block_tag); - } + /* SG chain */ + bxe_dma_free(sc, &fp->sg_dma); + fp->sg_chain = NULL; - /* Destroy the statistics block. */ - if (sc->stats_tag != NULL) { - if (sc->stats_map != NULL) { - if (sc->stats_block != NULL) - bus_dmamem_free(sc->stats_tag, - sc->stats_block, sc->stats_map); - bus_dmamap_unload(sc->stats_tag, sc->stats_map); - bus_dmamap_destroy(sc->stats_tag, - sc->stats_map); + /* Unload and destroy the TX mbuf maps. */ + if (fp->tx_mbuf_tag != NULL) { + for (j = 0; j < TOTAL_TX_BD; j++) { + if (fp->tx_mbuf_map[j] != NULL) { + bus_dmamap_unload( + fp->tx_mbuf_tag, + fp->tx_mbuf_map[j]); + bus_dmamap_destroy( + fp->tx_mbuf_tag, + fp->tx_mbuf_map[j]); + } } - bus_dma_tag_destroy(sc->stats_tag); + bus_dma_tag_destroy(fp->tx_mbuf_tag); } - /* Destroy the Slow Path block. */ - if (sc->slowpath_tag != NULL) { - if (sc->slowpath_map != NULL) { - if (sc->slowpath != NULL) - bus_dmamem_free(sc->slowpath_tag, - sc->slowpath, sc->slowpath_map); - - bus_dmamap_unload(sc->slowpath_tag, - sc->slowpath_map); - bus_dmamap_destroy(sc->slowpath_tag, - sc->slowpath_map); + /* Unload and destroy the TPA pool mbuf maps. */ + if (fp->rx_mbuf_tag != NULL) { + if (fp->tpa_mbuf_spare_map != NULL) { + bus_dmamap_unload( + fp->rx_mbuf_tag, + fp->tpa_mbuf_spare_map); + bus_dmamap_destroy( + fp->rx_mbuf_tag, + fp->tpa_mbuf_spare_map); } - bus_dma_tag_destroy(sc->slowpath_tag); + for (j = 0; j < max_agg_queues; j++) { + if (fp->tpa_mbuf_map[j] != NULL) { + bus_dmamap_unload( + fp->rx_mbuf_tag, + fp->tpa_mbuf_map[j]); + bus_dmamap_destroy( + fp->rx_mbuf_tag, + fp->tpa_mbuf_map[j]); + } + } } - /* Destroy the Slow Path Ring. */ - if (sc->spq_tag != NULL) { - if (sc->spq_map != NULL) { - if (sc->spq != NULL) - bus_dmamem_free(sc->spq_tag, sc->spq, - sc->spq_map); + /* Unload and destroy the SGE Buf maps. */ + if (fp->rx_sge_buf_tag != NULL) { + if (fp->rx_sge_spare_map != NULL) { + bus_dmamap_unload( + fp->rx_sge_buf_tag, + fp->rx_sge_spare_map); + bus_dmamap_destroy( + fp->rx_sge_buf_tag, + fp->rx_sge_spare_map); + } - bus_dmamap_unload(sc->spq_tag, sc->spq_map); - bus_dmamap_destroy(sc->spq_tag, sc->spq_map); + for (j = 0; j < TOTAL_RX_SGE; j++) { + if (fp->rx_sge_buf_map[j] != NULL) { + bus_dmamap_unload( + fp->rx_sge_buf_tag, + fp->rx_sge_buf_map[j]); + bus_dmamap_destroy( + fp->rx_sge_buf_tag, + fp->rx_sge_buf_map[j]); + } } - bus_dma_tag_destroy(sc->spq_tag); + bus_dma_tag_destroy(fp->rx_sge_buf_tag); } + /* Unload and destroy the RX mbuf maps. */ + if (fp->rx_mbuf_tag != NULL) { + if (fp->rx_mbuf_spare_map != NULL) { + bus_dmamap_unload(fp->rx_mbuf_tag, + fp->rx_mbuf_spare_map); + bus_dmamap_destroy(fp->rx_mbuf_tag, + fp->rx_mbuf_spare_map); + } - free(sc->strm, M_DEVBUF); - sc->strm = NULL; - - if (sc->gunzip_tag != NULL) { - if (sc->gunzip_map != NULL) { - if (sc->gunzip_buf != NULL) - bus_dmamem_free(sc->gunzip_tag, - sc->gunzip_buf, sc->gunzip_map); - - bus_dmamap_unload(sc->gunzip_tag, - sc->gunzip_map); - bus_dmamap_destroy(sc->gunzip_tag, - sc->gunzip_map); + for (j = 0; j < TOTAL_RX_BD; j++) { + if (fp->rx_mbuf_map[j] != NULL) { + bus_dmamap_unload( + fp->rx_mbuf_tag, + fp->rx_mbuf_map[j]); + bus_dmamap_destroy( + fp->rx_mbuf_tag, + fp->rx_mbuf_map[j]); + } } - bus_dma_tag_destroy(sc->gunzip_tag); + bus_dma_tag_destroy(fp->rx_mbuf_tag); } - - bus_dma_tag_destroy(sc->parent_tag); } - DBENTER(BXE_VERBOSE_LOAD | BXE_VERBOSE_RESET); -} + /* Destroy the default status block */ + bxe_dma_free(sc, &sc->def_sb_dma); + sc->def_sb = NULL; -/* - * Free paged pool memory maps and tags. - * - * Returns: - * Nothing. - */ - -static void -bxe_dmamem_free(struct bxe_softc *sc, bus_dma_tag_t tag, caddr_t buf, - bus_dmamap_t map) -{ + /* Destroy the statistics block */ + bxe_dma_free(sc, &sc->stats_dma); + sc->stats = NULL; - DBENTER(BXE_VERBOSE_RESET | BXE_VERBOSE_UNLOAD); - - if (tag) { - if (sc->gunzip_buf != NULL) - bus_dmamem_free(tag, buf, map); + /* Destroy the slowpath block. */ + bxe_dma_free(sc, &sc->slowpath_dma); + sc->slowpath = NULL; - if (map != NULL) { - bus_dmamap_unload(tag, map); - bus_dmamap_destroy(tag, map); - } - - if (tag != NULL) - bus_dma_tag_destroy(tag); - } + /* Destroy the slowpath queue. */ + bxe_dma_free(sc, &sc->spq_dma); + sc->spq = NULL; + /* Destroy the slowpath queue. */ + bxe_dma_free(sc, &sc->gz_dma); + sc->gz = NULL; + free(sc->strm, M_DEVBUF); + sc->strm = NULL; - DBEXIT(BXE_VERBOSE_RESET | BXE_VERBOSE_UNLOAD); +bxe_host_structures_free_exit: + DBEXIT(BXE_VERBOSE_LOAD | BXE_VERBOSE_RESET | BXE_VERBOSE_UNLOAD); } /* @@ -13575,31 +13564,30 @@ bxe_dma_map_addr(void *arg, bus_dma_segment_t *segs, int nseg, int error) /* * Allocate any non-paged DMA memory needed by the driver. * - * Allocates DMA memory needed for the various global structures which are - * read or written by the hardware. - * * Returns: * 0 = Success, !0 = Failure. */ static int -bxe_dma_alloc(device_t dev) +bxe_host_structures_alloc(device_t dev) { struct bxe_softc *sc; struct bxe_fastpath *fp; - int error, rc; + int rc; bus_addr_t busaddr; bus_size_t max_size, max_seg_size; int i, j, max_segments; sc = device_get_softc(dev); - rc = 0; - DBENTER(BXE_VERBOSE_RESET); + rc = 0; + int max_agg_queues = CHIP_IS_E1H(sc) ? + ETH_MAX_AGGREGATION_QUEUES_E1H : + ETH_MAX_AGGREGATION_QUEUES_E1; /* * Allocate the parent bus DMA tag appropriate for PCI. */ - if (bus_dma_tag_create(NULL, /* parent tag */ + rc = bus_dma_tag_create(NULL, /* parent tag */ 1, /* alignment for segs */ BXE_DMA_BOUNDARY, /* cannot cross */ BUS_SPACE_MAXADDR, /* restricted low */ @@ -13612,136 +13600,112 @@ bxe_dma_alloc(device_t dev) 0, /* flags */ NULL, /* lock f() */ NULL, /* lock f() arg */ - &sc->parent_tag) /* dma tag */ - ) { + &sc->parent_tag); /* dma tag */ + if (rc != 0) { BXE_PRINTF("%s(%d): Could not allocate parent DMA tag!\n", __FILE__, __LINE__); rc = ENOMEM; - goto bxe_dma_alloc_exit; + goto bxe_host_structures_alloc_exit; } /* Allocate DMA memory for each fastpath structure. */ for (i = 0; i < sc->num_queues; i++) { fp = &sc->fp[i]; - DBPRINT(sc, (BXE_EXTREME_LOAD | BXE_EXTREME_RESET), - "%s(): fp[%d] virtual address = %p, size = %lu\n", - __FUNCTION__, i, fp, - (long unsigned int)sizeof(struct bxe_fastpath)); /* - * Create a DMA tag for the status block, allocate and - * clear the memory, map the memory into DMA space, and - * fetch the physical address of the block. - */ + * Allocate status block* + */ + rc = bxe_dma_malloc(sc, BXE_STATUS_BLK_SZ, + &fp->sb_dma, BUS_DMA_NOWAIT, "fp status block"); + /* ToDo: Only using 32 bytes out of 4KB allocation! */ + if (rc != 0) + goto bxe_host_structures_alloc_exit; + fp->status_block = + (struct host_status_block *) fp->sb_dma.vaddr; - if (bus_dma_tag_create(sc->parent_tag, - BCM_PAGE_SIZE, /* alignment for segs */ - BXE_DMA_BOUNDARY, /* cannot cross */ - BUS_SPACE_MAXADDR, /* restricted low */ - BUS_SPACE_MAXADDR, /* restricted hi */ - NULL, /* filter f() */ - NULL, /* filter f() arg */ - BXE_STATUS_BLK_SZ, /* max map for this tag */ - 1, /* # of discontinuities */ - BXE_STATUS_BLK_SZ, /* max seg size */ - 0, /* flags */ - NULL, /* lock f() */ - NULL, /* lock f() arg */ - &fp->status_block_tag)) { - BXE_PRINTF( - "%s(%d): Could not allocate fp[%d] status block DMA tag!\n", - __FILE__, __LINE__, i); - rc = ENOMEM; - goto bxe_dma_alloc_exit; - } - - if (bus_dmamem_alloc(fp->status_block_tag, - (void **)&fp->status_block, BUS_DMA_NOWAIT, - &fp->status_block_map)) { - BXE_PRINTF( - "%s(%d): Could not allocate fp[%d] status block DMA memory!\n", - __FILE__, __LINE__, i); - rc = ENOMEM; - goto bxe_dma_alloc_exit; + /* + * Allocate TX chain. + */ + rc = bxe_dma_malloc(sc, BXE_TX_CHAIN_PAGE_SZ * + NUM_TX_PAGES, &fp->tx_dma, BUS_DMA_NOWAIT, + "tx chain pages"); + if (rc != 0) + goto bxe_host_structures_alloc_exit; + fp->tx_chain = (union eth_tx_bd_types *) fp->tx_dma.vaddr; + + /* Link the TX chain pages. */ + for (j = 1; j <= NUM_TX_PAGES; j++) { + struct eth_tx_next_bd *tx_n_bd = + &fp->tx_chain[TOTAL_TX_BD_PER_PAGE * j - 1].next_bd; + + busaddr = fp->tx_dma.paddr + + BCM_PAGE_SIZE * (j % NUM_TX_PAGES); + tx_n_bd->addr_hi = htole32(U64_HI(busaddr)); + tx_n_bd->addr_lo = htole32(U64_LO(busaddr)); } - bzero((char *)fp->status_block, BXE_STATUS_BLK_SZ); - - error = bus_dmamap_load(fp->status_block_tag, - fp->status_block_map, fp->status_block, BXE_STATUS_BLK_SZ, - bxe_dma_map_addr, &busaddr, BUS_DMA_NOWAIT); - - if (error) { - BXE_PRINTF( - "%s(%d): Could not map fp[%d] status block DMA memory!\n", - __FILE__, __LINE__, i); - rc = ENOMEM; - goto bxe_dma_alloc_exit; + /* + * Allocate RX chain. + */ + rc = bxe_dma_malloc(sc, BXE_RX_CHAIN_PAGE_SZ * + NUM_RX_PAGES, &fp->rx_dma, BUS_DMA_NOWAIT, + "rx chain pages"); + if (rc != 0) + goto bxe_host_structures_alloc_exit; + fp->rx_chain = (struct eth_rx_bd *) fp->rx_dma.vaddr; + + /* Link the RX chain pages. */ + for (j = 1; j <= NUM_RX_PAGES; j++) { + struct eth_rx_bd *rx_bd = + &fp->rx_chain[TOTAL_RX_BD_PER_PAGE * j - 2]; + + busaddr = fp->rx_dma.paddr + + BCM_PAGE_SIZE * (j % NUM_RX_PAGES); + rx_bd->addr_hi = htole32(U64_HI(busaddr)); + rx_bd->addr_lo = htole32(U64_LO(busaddr)); } - /* Physical address of Status Block */ - fp->status_block_paddr = busaddr; - DBPRINT(sc, (BXE_EXTREME_LOAD | BXE_EXTREME_RESET), - "%s(): fp[%d] status block physical address = 0x%jX\n", - __FUNCTION__, i, (uintmax_t) fp->status_block_paddr); - /* - * Create a DMA tag for the TX buffer descriptor chain, - * allocate and clear the memory, and fetch the - * physical address of the block. + * Allocate CQ chain. */ - if (bus_dma_tag_create(sc->parent_tag, - BCM_PAGE_SIZE, /* alignment for segs */ - BXE_DMA_BOUNDARY, /* cannot cross */ - BUS_SPACE_MAXADDR, /* restricted low */ - BUS_SPACE_MAXADDR, /* restricted hi */ - NULL, /* filter f() */ - NULL, /* filter f() arg */ - BXE_TX_CHAIN_PAGE_SZ,/* max map for this tag */ - 1, /* # of discontinuities */ - BXE_TX_CHAIN_PAGE_SZ,/* max seg size */ - 0, /* flags */ - NULL, /* lock f() */ - NULL, /* lock f() arg */ - &fp->tx_bd_chain_tag)) { - BXE_PRINTF( - "%s(%d): Could not allocate fp[%d] TX descriptor chain DMA tag!\n", - __FILE__, __LINE__, i); - rc = ENOMEM; - goto bxe_dma_alloc_exit; + rc = bxe_dma_malloc(sc, BXE_RX_CHAIN_PAGE_SZ * + NUM_RCQ_PAGES, &fp->rcq_dma, BUS_DMA_NOWAIT, + "rcq chain pages"); + if (rc != 0) + goto bxe_host_structures_alloc_exit; + fp->rcq_chain = (union eth_rx_cqe *) fp->rcq_dma.vaddr; + + /* Link the CQ chain pages. */ + for (j = 1; j <= NUM_RCQ_PAGES; j++) { + struct eth_rx_cqe_next_page *nextpg = + (struct eth_rx_cqe_next_page *) + &fp->rcq_chain[TOTAL_RCQ_ENTRIES_PER_PAGE * j - 1]; + + busaddr = fp->rcq_dma.paddr + + BCM_PAGE_SIZE * (j % NUM_RCQ_PAGES); + nextpg->addr_hi = htole32(U64_HI(busaddr)); + nextpg->addr_lo = htole32(U64_LO(busaddr)); } - for (j = 0; j < NUM_TX_PAGES; j++) { - if (bus_dmamem_alloc(fp->tx_bd_chain_tag, - (void **)&fp->tx_bd_chain[j], BUS_DMA_NOWAIT, - &fp->tx_bd_chain_map[j])) { - BXE_PRINTF( - "%s(%d): Could not allocate fp[%d] TX descriptor chain DMA memory!\n", - __FILE__, __LINE__, i); - rc = ENOMEM; - goto bxe_dma_alloc_exit; - } - - bzero((char *)fp->tx_bd_chain[j], BXE_TX_CHAIN_PAGE_SZ); - - error = bus_dmamap_load(fp->tx_bd_chain_tag, - fp->tx_bd_chain_map[j], fp->tx_bd_chain[j], - BXE_TX_CHAIN_PAGE_SZ, bxe_dma_map_addr, - &busaddr, BUS_DMA_NOWAIT); - - if (error) { - BXE_PRINTF( - "%s(%d): Could not map fp[%d] TX descriptor chain DMA memory!\n", - __FILE__, __LINE__, i); - rc = ENOMEM; - goto bxe_dma_alloc_exit; - } - - /* Physical Address of each page in the Tx BD Chain. */ - fp->tx_bd_chain_paddr[j] = busaddr; - DBPRINT(sc, (BXE_EXTREME_LOAD | BXE_EXTREME_RESET), - "%s(): fp[%d]->tx_bd_chain_paddr[%d] = 0x%jX\n", - __FUNCTION__, i, j, (uintmax_t)busaddr); + /* + * Allocate SG chain. + */ + rc = bxe_dma_malloc(sc, BXE_RX_CHAIN_PAGE_SZ * + NUM_RX_SGE_PAGES, &fp->sg_dma, BUS_DMA_NOWAIT, + "sg chain pages"); + if (rc != 0) + goto bxe_host_structures_alloc_exit; + fp->sg_chain = (struct eth_rx_sge *) fp->sg_dma.vaddr; + + /* Link the SG chain pages. */ + for (j = 1; j <= NUM_RX_SGE_PAGES; j++) { + struct eth_rx_sge *nextpg = + &fp->sg_chain[TOTAL_RX_SGE_PER_PAGE * j - 2]; + + busaddr = fp->sg_dma.paddr + + BCM_PAGE_SIZE * (j % NUM_RX_SGE_PAGES); + nextpg->addr_hi = htole32(U64_HI(busaddr)); + nextpg->addr_lo = htole32(U64_LO(busaddr)); } /* @@ -13773,84 +13737,25 @@ bxe_dma_alloc(device_t dev) NULL, /* lock f() arg */ &fp->tx_mbuf_tag)) { BXE_PRINTF( - "%s(%d): Could not allocate fp[%d] TX mbuf DMA tag!\n", + "%s(%d): Could not allocate fp[%d] " + "TX mbuf DMA tag!\n", __FILE__, __LINE__, i); rc = ENOMEM; - goto bxe_dma_alloc_exit; + goto bxe_host_structures_alloc_exit; } /* Create DMA maps for each the TX mbuf cluster(ext buf). */ for (j = 0; j < TOTAL_TX_BD; j++) { if (bus_dmamap_create(fp->tx_mbuf_tag, BUS_DMA_NOWAIT, - &(fp->tx_mbuf_map[j]))) { - BXE_PRINTF( - "%s(%d): Unable to create fp[%d] TX mbuf DMA map!\n", - __FILE__, __LINE__, i); - rc = ENOMEM; - goto bxe_dma_alloc_exit; - } - } - - /* - * Create a DMA tag for the RX buffer - * descriptor chain, allocate and clear - * the memory, and fetch the physical - * address of the blocks. - */ - if (bus_dma_tag_create(sc->parent_tag, - BCM_PAGE_SIZE, /* alignment for segs */ - BXE_DMA_BOUNDARY, /* cannot cross */ - BUS_SPACE_MAXADDR, /* restricted low */ - BUS_SPACE_MAXADDR, /* restricted hi */ - NULL, /* filter f() */ - NULL, /* filter f() arg */ - BXE_RX_CHAIN_PAGE_SZ,/* max map for this tag */ - 1, /* # of discontinuities */ - BXE_RX_CHAIN_PAGE_SZ,/* max seg size */ - 0, /* flags */ - NULL, /* lock f() */ - NULL, /* lock f() arg */ - &fp->rx_bd_chain_tag)) { - BXE_PRINTF( - "%s(%d): Could not allocate fp[%d] RX BD chain DMA tag!\n", - __FILE__, __LINE__, i); - rc = ENOMEM; - goto bxe_dma_alloc_exit; - } - - for (j = 0; j < NUM_RX_PAGES; j++) { - if (bus_dmamem_alloc(fp->rx_bd_chain_tag, - (void **)&fp->rx_bd_chain[j], BUS_DMA_NOWAIT, - &fp->rx_bd_chain_map[j])) { + &fp->tx_mbuf_map[j])) { BXE_PRINTF( - "%s(%d): Could not allocate fp[%d] RX BD chain[%d] DMA memory!\n", + "%s(%d): Unable to create fp[%02d]." + "tx_mbuf_map[%d] DMA map!\n", __FILE__, __LINE__, i, j); rc = ENOMEM; - goto bxe_dma_alloc_exit; + goto bxe_host_structures_alloc_exit; } - - bzero((char *)fp->rx_bd_chain[j], BXE_RX_CHAIN_PAGE_SZ); - - error = bus_dmamap_load(fp->rx_bd_chain_tag, - fp->rx_bd_chain_map[j], fp->rx_bd_chain[j], - BXE_RX_CHAIN_PAGE_SZ, bxe_dma_map_addr, &busaddr, - BUS_DMA_NOWAIT); - - if (error) { - BXE_PRINTF( - "%s(%d): Could not map fp[%d] RX BD chain[%d] DMA memory!\n", - __FILE__, __LINE__, i, j); - rc = ENOMEM; - goto bxe_dma_alloc_exit; - } - - /* Physical address of each page in the RX BD chain */ - fp->rx_bd_chain_paddr[j] = busaddr; - - DBPRINT(sc, (BXE_EXTREME_LOAD | BXE_EXTREME_RESET), - "%s(): fp[%d]->rx_bd_chain_paddr[%d] = 0x%jX\n", - __FUNCTION__, i, j, (uintmax_t)busaddr); } /* @@ -13871,431 +13776,152 @@ bxe_dma_alloc(device_t dev) NULL, /* lock f() arg */ &fp->rx_mbuf_tag)) { BXE_PRINTF( - "%s(%d): Could not allocate fp[%d] RX mbuf DMA tag!\n", + "%s(%d): Could not allocate fp[%02d] " + "RX mbuf DMA tag!\n", __FILE__, __LINE__, i); rc = ENOMEM; - goto bxe_dma_alloc_exit; + goto bxe_host_structures_alloc_exit; } /* Create DMA maps for the RX mbuf clusters. */ + if (bus_dmamap_create(fp->rx_mbuf_tag, + BUS_DMA_NOWAIT, &fp->rx_mbuf_spare_map)) { + BXE_PRINTF( + "%s(%d): Unable to create fp[%02d]." + "rx_mbuf_spare_map DMA map!\n", + __FILE__, __LINE__, i); + rc = ENOMEM; + goto bxe_host_structures_alloc_exit; + } + for (j = 0; j < TOTAL_RX_BD; j++) { if (bus_dmamap_create(fp->rx_mbuf_tag, - BUS_DMA_NOWAIT, &(fp->rx_mbuf_map[j]))) { + BUS_DMA_NOWAIT, &fp->rx_mbuf_map[j])) { BXE_PRINTF( - "%s(%d): Unable to create fp[%d] RX mbuf DMA map!\n", - __FILE__, __LINE__, i); + "%s(%d): Unable to create fp[%02d]." + "rx_mbuf_map[%d] DMA map!\n", + __FILE__, __LINE__, i, j); rc = ENOMEM; - goto bxe_dma_alloc_exit; + goto bxe_host_structures_alloc_exit; } } /* - * Create a DMA tag for the RX Completion - * Queue, allocate and clear the memory, - * map the memory into DMA space, and fetch - * the physical address of the block. + * Create a DMA tag for RX SGE bufs. */ - if (bus_dma_tag_create(sc->parent_tag, - BCM_PAGE_SIZE, /* alignment for segs */ - BXE_DMA_BOUNDARY, /* cannot cross */ - BUS_SPACE_MAXADDR, /* restricted low */ - BUS_SPACE_MAXADDR, /* restricted hi */ - NULL, /* filter f() */ - NULL, /* filter f() arg */ - BXE_RX_CHAIN_PAGE_SZ,/* max map for this tag */ - 1, /* # of discontinuities */ - BXE_RX_CHAIN_PAGE_SZ,/* max seg size */ - 0, /* flags */ - NULL, /* lock f() */ - NULL, /* lock f() arg */ - &fp->rx_cq_chain_tag)) { + if (bus_dma_tag_create(sc->parent_tag, 1, + BXE_DMA_BOUNDARY, BUS_SPACE_MAXADDR, + BUS_SPACE_MAXADDR, NULL, NULL, PAGE_SIZE, 1, + PAGE_SIZE, 0, NULL, NULL, &fp->rx_sge_buf_tag)) { BXE_PRINTF( - "%s(%d): Could not allocate fp[%d] RX Completion Queue DMA tag!\n", + "%s(%d): Could not allocate fp[%02d] " + "RX SGE mbuf DMA tag!\n", __FILE__, __LINE__, i); rc = ENOMEM; - goto bxe_dma_alloc_exit; + goto bxe_host_structures_alloc_exit; } - for (j = 0; j < NUM_RCQ_PAGES; j++) { - if (bus_dmamem_alloc(fp->rx_cq_chain_tag, - (void **)&fp->rx_cq_chain[j], BUS_DMA_NOWAIT, - &fp->rx_cq_chain_map[j])) { - BXE_PRINTF( - "%s(%d): Could not allocate fp[%d] RX Completion Queue DMA memory!\n", - __FILE__, __LINE__, i); - rc = ENOMEM; - goto bxe_dma_alloc_exit; - } - - bzero((char *)fp->rx_cq_chain[j], - BXE_RX_CHAIN_PAGE_SZ); - - error = bus_dmamap_load(fp->rx_cq_chain_tag, - fp->rx_cq_chain_map[j], fp->rx_cq_chain[j], - BXE_RX_CHAIN_PAGE_SZ, bxe_dma_map_addr, &busaddr, - BUS_DMA_NOWAIT); - - if (error) { - BXE_PRINTF( - "%s(%d): Could not map fp[%d] RX Completion Queue DMA memory!\n", - __FILE__, __LINE__, i); - rc = ENOMEM; - goto bxe_dma_alloc_exit; - } - - /* - * Physical address of each page in the RX - * Completion Chain. - */ - fp->rx_cq_chain_paddr[j] = busaddr; - - DBPRINT(sc, (BXE_EXTREME_LOAD | BXE_EXTREME_RESET), - "%s(): fp[%d]->rx_cq_chain_paddr[%d] = 0x%jX\n", - __FUNCTION__, i, j, (uintmax_t)busaddr); + /* Create DMA maps for the SGE mbuf clusters. */ + if (bus_dmamap_create(fp->rx_sge_buf_tag, + BUS_DMA_NOWAIT, &fp->rx_sge_spare_map)) { + BXE_PRINTF( + "%s(%d): Unable to create fp[%02d]." + "rx_sge_spare_map DMA map!\n", + __FILE__, __LINE__, i); + rc = ENOMEM; + goto bxe_host_structures_alloc_exit; } - if (TPA_ENABLED(sc)) { - int tpa_pool_max = CHIP_IS_E1H(sc) ? - ETH_MAX_AGGREGATION_QUEUES_E1H : - ETH_MAX_AGGREGATION_QUEUES_E1; - - /* - * Create a DMA tag for the RX SGE Ring, - * allocate and clear the memory, map the - * memory into DMA space, and fetch the - * physical address of the block. - */ - if (bus_dma_tag_create(sc->parent_tag, - BCM_PAGE_SIZE, /* alignment for segs */ - BXE_DMA_BOUNDARY, /* cannot cross */ - BUS_SPACE_MAXADDR, /* restricted low */ - BUS_SPACE_MAXADDR, /* restricted hi */ - NULL, /* filter f() */ - NULL, /* filter f() arg */ - BXE_RX_CHAIN_PAGE_SZ,/* max map for this tag */ - 1, /* # of discontinuities */ - BXE_RX_CHAIN_PAGE_SZ,/* max seg size */ - 0, /* flags */ - NULL, /* lock f() */ - NULL, /* lock f() arg */ - &fp->rx_sge_chain_tag)) { + for (j = 0; j < TOTAL_RX_SGE; j++) { + if (bus_dmamap_create(fp->rx_sge_buf_tag, + BUS_DMA_NOWAIT, &fp->rx_sge_buf_map[j])) { BXE_PRINTF( - "%s(%d): Could not allocate fp[%d] RX SGE descriptor chain DMA tag!\n", - __FILE__, __LINE__, i); + "%s(%d): Unable to create fp[%02d]." + "rx_sge_buf_map[%d] DMA map!\n", + __FILE__, __LINE__, i, j); rc = ENOMEM; - goto bxe_dma_alloc_exit; + goto bxe_host_structures_alloc_exit; } + } - for (j = 0; j < NUM_RX_SGE_PAGES; j++) { - if (bus_dmamem_alloc(fp->rx_sge_chain_tag, - (void **)&fp->rx_sge_chain[j], - BUS_DMA_NOWAIT, &fp->rx_sge_chain_map[j])) { - BXE_PRINTF( - "%s(%d): Could not allocate fp[%d] RX SGE chain[%d] DMA memory!\n", - __FILE__, __LINE__, i, j); - rc = ENOMEM; - goto bxe_dma_alloc_exit; - } - - bzero((char *)fp->rx_sge_chain[j], - BXE_RX_CHAIN_PAGE_SZ); - - error = bus_dmamap_load(fp->rx_sge_chain_tag, - fp->rx_sge_chain_map[j], - fp->rx_sge_chain[j], BXE_RX_CHAIN_PAGE_SZ, - bxe_dma_map_addr, &busaddr, BUS_DMA_NOWAIT); - - if (error) { - BXE_PRINTF( - "%s(%d): Could not map fp[%d] RX SGE chain[%d] DMA memory!\n", - __FILE__, __LINE__, i, j); - rc = ENOMEM; - goto bxe_dma_alloc_exit; - } - - /* - * Physical address of each page in the RX - * SGE chain. - */ - DBPRINT(sc, - (BXE_EXTREME_LOAD | BXE_EXTREME_RESET), - "%s(): fp[%d]->rx_sge_chain_paddr[%d] = 0x%jX\n", - __FUNCTION__, i, j, (uintmax_t)busaddr); - fp->rx_sge_chain_paddr[j] = busaddr; - } + /* Create DMA maps for the TPA pool mbufs. */ + if (bus_dmamap_create(fp->rx_mbuf_tag, + BUS_DMA_NOWAIT, &fp->tpa_mbuf_spare_map)) { + BXE_PRINTF( + "%s(%d): Unable to create fp[%02d]." + "tpa_mbuf_spare_map DMA map!\n", + __FILE__, __LINE__, i); + rc = ENOMEM; + goto bxe_host_structures_alloc_exit; + } - /* - * Create a DMA tag for RX SGE bufs. - */ - if (bus_dma_tag_create(sc->parent_tag, 1, - BXE_DMA_BOUNDARY, BUS_SPACE_MAXADDR, - BUS_SPACE_MAXADDR, NULL, NULL, PAGE_SIZE, 1, - PAGE_SIZE, 0, NULL, NULL, &fp->rx_sge_buf_tag)) { + for (j = 0; j < max_agg_queues; j++) { + if (bus_dmamap_create(fp->rx_mbuf_tag, + BUS_DMA_NOWAIT, &fp->tpa_mbuf_map[j])) { BXE_PRINTF( - "%s(%d): Could not allocate fp[%d] RX SGE mbuf DMA tag!\n", - __FILE__, __LINE__, i); + "%s(%d): Unable to create fp[%02d]." + "tpa_mbuf_map[%d] DMA map!\n", + __FILE__, __LINE__, i, j); rc = ENOMEM; - goto bxe_dma_alloc_exit; - } - - /* Create DMA maps for the SGE mbuf clusters. */ - for (j = 0; j < TOTAL_RX_SGE; j++) { - if (bus_dmamap_create(fp->rx_sge_buf_tag, - BUS_DMA_NOWAIT, &(fp->rx_sge_buf_map[j]))) { - BXE_PRINTF( - "%s(%d): Unable to create fp[%d] RX SGE mbuf DMA map!\n", - __FILE__, __LINE__, i); - rc = ENOMEM; - goto bxe_dma_alloc_exit; - } - } - - /* Create DMA maps for the TPA pool mbufs. */ - for (j = 0; j < tpa_pool_max; j++) { - if (bus_dmamap_create(fp->rx_mbuf_tag, - BUS_DMA_NOWAIT, &(fp->tpa_mbuf_map[j]))) { - BXE_PRINTF( - "%s(%d): Unable to create fp[%d] TPA DMA map!\n", - __FILE__, __LINE__, i); - rc = ENOMEM; - goto bxe_dma_alloc_exit; - } + goto bxe_host_structures_alloc_exit; } } + + bxe_init_sge_ring_bit_mask(fp); } /* - * Create a DMA tag for the def_status block, allocate and clear the - * memory, map the memory into DMA space, and fetch the physical - * address of the block. + * Allocate default status block. */ - if (bus_dma_tag_create(sc->parent_tag, BCM_PAGE_SIZE, BXE_DMA_BOUNDARY, - BUS_SPACE_MAXADDR, BUS_SPACE_MAXADDR, NULL, NULL, - BXE_DEF_STATUS_BLK_SZ, 1, BXE_DEF_STATUS_BLK_SZ, 0, NULL, NULL, - &sc->def_status_block_tag)) { - BXE_PRINTF( - "%s(%d): Could not allocate def_status block DMA tag!\n", - __FILE__, __LINE__); - rc = ENOMEM; - goto bxe_dma_alloc_exit; - } - - if (bus_dmamem_alloc(sc->def_status_block_tag, - (void **)&sc->def_status_block, BUS_DMA_NOWAIT, - &sc->def_status_block_map)) { - BXE_PRINTF( - "%s(%d): Could not allocate def_status block DMA memory!\n", - __FILE__, __LINE__); - rc = ENOMEM; - goto bxe_dma_alloc_exit; - } - - bzero((char *)sc->def_status_block, BXE_DEF_STATUS_BLK_SZ); - - error = bus_dmamap_load(sc->def_status_block_tag, - sc->def_status_block_map, sc->def_status_block, - BXE_DEF_STATUS_BLK_SZ, bxe_dma_map_addr, &busaddr, BUS_DMA_NOWAIT); - - if (error) { - BXE_PRINTF( - "%s(%d): Could not map def_status block DMA memory!\n", - __FILE__, __LINE__); - rc = ENOMEM; - goto bxe_dma_alloc_exit; - } - - /* Physical Address of Default Status Block. */ - sc->def_status_block_paddr = busaddr; - DBPRINT(sc, (BXE_EXTREME_LOAD | BXE_EXTREME_RESET), - "%s(): Default status block physical address = 0x%08X\n", - __FUNCTION__, (uint32_t)sc->def_status_block_paddr); + rc = bxe_dma_malloc(sc, BXE_DEF_STATUS_BLK_SZ, &sc->def_sb_dma, + BUS_DMA_NOWAIT, "default status block"); + if (rc != 0) + goto bxe_host_structures_alloc_exit; + sc->def_sb = (struct host_def_status_block *) sc->def_sb_dma.vaddr; /* - * Create a DMA tag for the statistics block, allocate and clear the - * memory, map the memory into DMA space, and fetch the physical - * address of the block. + * Allocate statistics block. */ - if (bus_dma_tag_create(sc->parent_tag, BXE_DMA_ALIGN, BXE_DMA_BOUNDARY, - BUS_SPACE_MAXADDR, BUS_SPACE_MAXADDR, NULL, NULL, BXE_STATS_BLK_SZ, - 1, BXE_STATS_BLK_SZ, 0, NULL, NULL, &sc->stats_tag)) { - BXE_PRINTF( - "%s(%d): Could not allocate statistics block DMA tag!\n", - __FILE__, __LINE__); - rc = ENOMEM; - goto bxe_dma_alloc_exit; - } - - if (bus_dmamem_alloc(sc->stats_tag, (void **)&sc->stats_block, - BUS_DMA_NOWAIT, &sc->stats_map)) { - BXE_PRINTF( - "%s(%d): Could not allocate statistics block DMA memory!\n", - __FILE__, __LINE__); - rc = ENOMEM; - goto bxe_dma_alloc_exit; - } - - bzero((char *)sc->stats_block, BXE_STATS_BLK_SZ); - - error = bus_dmamap_load(sc->stats_tag, sc->stats_map, sc->stats_block, - BXE_STATS_BLK_SZ, bxe_dma_map_addr, &busaddr, BUS_DMA_NOWAIT); - - if (error) { - BXE_PRINTF( - "%s(%d): Could not map statistics block DMA memory!\n", - __FILE__, __LINE__); - rc = ENOMEM; - goto bxe_dma_alloc_exit; - } - - /* Physical Address of Statistics Block. */ - sc->stats_block_paddr = busaddr; - DBPRINT(sc, (BXE_EXTREME_LOAD | BXE_EXTREME_RESET), - "%s(): Statistics block physical address = 0x%08X\n", - __FUNCTION__, (uint32_t)sc->stats_block_paddr); + rc = bxe_dma_malloc(sc, BXE_STATS_BLK_SZ, &sc->stats_dma, + BUS_DMA_NOWAIT, "statistics block"); + if (rc != 0) + goto bxe_host_structures_alloc_exit; + sc->stats = (struct statistics_block *) sc->stats_dma.vaddr; /* - * Create a DMA tag for slowpath memory, allocate and clear the - * memory, map the memory into DMA space, and fetch the physical - * address of the block. + * Allocate slowpath block. */ - if (bus_dma_tag_create(sc->parent_tag, BCM_PAGE_SIZE, BXE_DMA_BOUNDARY, - BUS_SPACE_MAXADDR, BUS_SPACE_MAXADDR, NULL, NULL, BXE_SLOWPATH_SZ, - 1, BXE_SLOWPATH_SZ, 0, NULL, NULL, &sc->slowpath_tag)) { - BXE_PRINTF( - "%s(%d): Could not allocate slowpath DMA tag!\n", - __FILE__, __LINE__); - rc = ENOMEM; - goto bxe_dma_alloc_exit; - } - - if (bus_dmamem_alloc(sc->slowpath_tag, (void **)&sc->slowpath, - BUS_DMA_NOWAIT, &sc->slowpath_map)) { - BXE_PRINTF( - "%s(%d): Could not allocate slowpath DMA memory!\n", - __FILE__, __LINE__); - rc = ENOMEM; - goto bxe_dma_alloc_exit; - } - - bzero((char *)sc->slowpath, BXE_SLOWPATH_SZ); - - error = bus_dmamap_load(sc->slowpath_tag, sc->slowpath_map, - sc->slowpath, BXE_SLOWPATH_SZ, bxe_dma_map_addr, &busaddr, - BUS_DMA_NOWAIT); - - if (error) { - BXE_PRINTF("%s(%d): Could not map slowpath DMA memory!\n", - __FILE__, __LINE__); - rc = ENOMEM; - goto bxe_dma_alloc_exit; - } - - /* Physical Address For Slow Path Context. */ - sc->slowpath_paddr = busaddr; - DBPRINT(sc, (BXE_VERBOSE_LOAD | BXE_VERBOSE_RESET), - "%s(): Slowpath context physical address = 0x%08X\n", - __FUNCTION__, (uint32_t)sc->slowpath_paddr); + rc = bxe_dma_malloc(sc, BXE_SLOWPATH_SZ, &sc->slowpath_dma, + BUS_DMA_NOWAIT, "slowpath block"); + if (rc != 0) + goto bxe_host_structures_alloc_exit; + sc->slowpath = (struct bxe_slowpath *) sc->slowpath_dma.vaddr; /* - * Create a DMA tag for the Slow Path Queue, allocate and clear the - * memory, map the memory into DMA space, and fetch the physical - * address of the block. + * Allocate slowpath queue. */ - if (bus_dma_tag_create(sc->parent_tag, BCM_PAGE_SIZE, BXE_DMA_BOUNDARY, - BUS_SPACE_MAXADDR, BUS_SPACE_MAXADDR, NULL, NULL, BXE_SPQ_SZ, 1, - BXE_SPQ_SZ, 0, NULL, NULL, &sc->spq_tag)) { - BXE_PRINTF("%s(%d): Could not allocate SPQ DMA tag!\n", - __FILE__, __LINE__); - rc = ENOMEM; - goto bxe_dma_alloc_exit; - } - - if (bus_dmamem_alloc(sc->spq_tag, (void **)&sc->spq, BUS_DMA_NOWAIT, - &sc->spq_map)) { - BXE_PRINTF("%s(%d): Could not allocate SPQ DMA memory!\n", - __FILE__, __LINE__); - rc = ENOMEM; - goto bxe_dma_alloc_exit; - } - - bzero((char *)sc->spq, BXE_SPQ_SZ); - - error = bus_dmamap_load(sc->spq_tag, sc->spq_map, sc->spq, BXE_SPQ_SZ, - bxe_dma_map_addr, &busaddr, BUS_DMA_NOWAIT); - - if (error) { - BXE_PRINTF("%s(%d): Could not map SPQ DMA memory!\n", - __FILE__, __LINE__); - rc = ENOMEM; - goto bxe_dma_alloc_exit; - } - - /* Physical address of slow path queue. */ - sc->spq_paddr = busaddr; - DBPRINT(sc, (BXE_EXTREME_LOAD | BXE_EXTREME_RESET), - "%s(): Slowpath queue physical address = 0x%08X\n", - __FUNCTION__, (uint32_t)sc->spq_paddr); - - if (bxe_gunzip_init(sc)) { - rc = ENOMEM; - goto bxe_dma_alloc_exit; - } - -bxe_dma_alloc_exit: - DBEXIT(BXE_VERBOSE_RESET); - return (rc); -} - -/* - * Allocate DMA memory used for the firmware gunzip memory. - * - * Returns: - * 0 for success, !0 = Failure. - */ - -static int -bxe_dmamem_alloc(struct bxe_softc *sc, bus_dma_tag_t tag, bus_dmamap_t map, - void *buf, uint32_t buflen, bus_addr_t *busaddr) -{ - int rc; - - rc = 0; - - DBENTER(BXE_VERBOSE_LOAD | BXE_VERBOSE_RESET); + rc = bxe_dma_malloc(sc, BXE_SPQ_SZ, &sc->spq_dma, + BUS_DMA_NOWAIT, "slowpath queue"); + if (rc != 0) + goto bxe_host_structures_alloc_exit; + sc->spq = (struct eth_spe *) sc->spq_dma.vaddr; /* - * Create a DMA tag for the block, allocate and clear the - * memory, map the memory into DMA space, and fetch the physical - * address of the block. + * Allocate firmware decompression buffer. */ - if (bus_dma_tag_create(sc->parent_tag, BXE_DMA_ALIGN, BXE_DMA_BOUNDARY, - BUS_SPACE_MAXADDR, BUS_SPACE_MAXADDR, NULL, NULL, buflen, 1, buflen, - 0, NULL, NULL, &sc->gunzip_tag)) { - BXE_PRINTF("%s(%d): Could not allocate DMA tag!\n", - __FILE__, __LINE__); - rc = ENOMEM; - goto bxe_dmamem_alloc_exit; - } - - if (bus_dmamem_alloc(sc->gunzip_tag, (void **)&sc->gunzip_buf, - BUS_DMA_NOWAIT, &sc->gunzip_map)) { - BXE_PRINTF("%s(%d): Could not allocate DMA memory!\n", - __FILE__, __LINE__); - rc = ENOMEM; - goto bxe_dmamem_alloc_exit; + rc = bxe_dma_malloc(sc, BXE_FW_BUF_SIZE, &sc->gz_dma, + BUS_DMA_NOWAIT, "gunzip buffer"); + if (rc != 0) + goto bxe_host_structures_alloc_exit; + sc->gz = sc->gz_dma.vaddr; + if (sc->strm == NULL) { + goto bxe_host_structures_alloc_exit; } - bzero((char *)sc->gunzip_buf, buflen); - - if (bus_dmamap_load(sc->gunzip_tag, sc->gunzip_map, sc->gunzip_buf, - buflen, bxe_dma_map_addr, busaddr, BUS_DMA_NOWAIT)) { - BXE_PRINTF("%s(%d): Could not map DMA memory!\n", - __FILE__, __LINE__); - rc = ENOMEM; - } + sc->strm = malloc(sizeof(*sc->strm), M_DEVBUF, M_NOWAIT); -bxe_dmamem_alloc_exit: - DBEXIT(BXE_VERBOSE_LOAD | BXE_VERBOSE_RESET); +bxe_host_structures_alloc_exit: + DBEXIT(BXE_VERBOSE_RESET); return (rc); } @@ -14313,7 +13939,7 @@ bxe_set_mac_addr_e1(struct bxe_softc *sc, int set) uint8_t *eaddr; int port; - DBENTER(BXE_VERBOSE_MISC); + DBENTER(BXE_VERBOSE_LOAD | BXE_VERBOSE_RESET | BXE_VERBOSE_UNLOAD); config = BXE_SP(sc, mac_config); port = BP_PORT(sc); @@ -14371,7 +13997,7 @@ bxe_set_mac_addr_e1(struct bxe_softc *sc, int set) U64_HI(BXE_SP_MAPPING(sc, mac_config)), U64_LO(BXE_SP_MAPPING(sc, mac_config)), 0); - DBEXIT(BXE_VERBOSE_MISC); + DBEXIT(BXE_VERBOSE_LOAD | BXE_VERBOSE_RESET | BXE_VERBOSE_UNLOAD); } /* @@ -14388,7 +14014,7 @@ bxe_set_mac_addr_e1h(struct bxe_softc *sc, int set) uint8_t *eaddr; int func, port; - DBENTER(BXE_VERBOSE_MISC); + DBENTER(BXE_VERBOSE_LOAD | BXE_VERBOSE_RESET | BXE_VERBOSE_UNLOAD); config = (struct mac_configuration_cmd_e1h *)BXE_SP(sc, mac_config); port = BP_PORT(sc); @@ -14428,7 +14054,7 @@ bxe_set_mac_addr_e1h(struct bxe_softc *sc, int set) config_table->flags = MAC_CONFIGURATION_ENTRY_E1H_ACTION_TYPE; - DBPRINT(sc, BXE_VERBOSE_MISC, + DBPRINT(sc, BXE_VERBOSE, "%s(): %s MAC (%04x:%04x:%04x), E1HOV = %d, CLID = %d\n", __FUNCTION__, (set ? "Setting" : "Clearing"), config_table->msb_mac_addr, config_table->middle_mac_addr, @@ -14439,7 +14065,7 @@ bxe_set_mac_addr_e1h(struct bxe_softc *sc, int set) U64_LO(BXE_SP_MAPPING(sc, mac_config)), 0); bxe_set_mac_addr_e1h_exit: - DBEXIT(BXE_VERBOSE_MISC); + DBEXIT(BXE_VERBOSE_LOAD | BXE_VERBOSE_RESET | BXE_VERBOSE_UNLOAD); } /* @@ -14481,24 +14107,14 @@ bxe_set_rx_mode(struct bxe_softc *sc) * multicast address filtering. */ if (ifp->if_flags & IFF_PROMISC) { - DBPRINT(sc, BXE_VERBOSE_MISC, - "%s(): Enabling promiscuous mode.\n", __FUNCTION__); - /* Enable promiscuous mode. */ rx_mode = BXE_RX_MODE_PROMISC; } else if (ifp->if_flags & IFF_ALLMULTI || ifp->if_amcount > BXE_MAX_MULTICAST) { - DBPRINT(sc, BXE_VERBOSE_MISC, - "%s(): Enabling all multicast mode.\n", __FUNCTION__); - /* Enable all multicast addresses. */ rx_mode = BXE_RX_MODE_ALLMULTI; } else { /* Enable selective multicast mode. */ - DBPRINT(sc, BXE_VERBOSE_MISC, - "%s(): Enabling selective multicast mode.\n", - __FUNCTION__); - if (CHIP_IS_E1(sc)) { i = 0; config = BXE_SP(sc, mcast_config); @@ -14608,7 +14224,6 @@ bxe_reset_func(struct bxe_softc *sc) /* Configure IGU. */ REG_WR(sc, HC_REG_LEADING_EDGE_0 + port * 8, 0); REG_WR(sc, HC_REG_TRAILING_EDGE_0 + port * 8, 0); - REG_WR(sc, HC_REG_CONFIG_0 + (port * 4), 0x1000); /* Clear ILT. */ @@ -14670,8 +14285,10 @@ bxe_reset_common(struct bxe_softc *sc) DBENTER(BXE_VERBOSE_LOAD | BXE_VERBOSE_RESET | BXE_VERBOSE_UNLOAD); - REG_WR(sc, GRCBASE_MISC + MISC_REGISTERS_RESET_REG_1_CLEAR, 0xd3ffff7f); - REG_WR(sc, GRCBASE_MISC + MISC_REGISTERS_RESET_REG_2_CLEAR, 0x1403); + REG_WR(sc, GRCBASE_MISC + MISC_REGISTERS_RESET_REG_1_CLEAR, + 0xd3ffff7f); + REG_WR(sc, GRCBASE_MISC + MISC_REGISTERS_RESET_REG_2_CLEAR, + 0x1403); DBEXIT(BXE_VERBOSE_LOAD | BXE_VERBOSE_RESET | BXE_VERBOSE_UNLOAD); } @@ -14687,7 +14304,6 @@ bxe_reset_chip(struct bxe_softc *sc, uint32_t reset_code) { DBENTER(BXE_VERBOSE_LOAD | BXE_VERBOSE_RESET | BXE_VERBOSE_UNLOAD); - DBRUNLV(BXE_INFO, bxe_decode_mb_msgs(sc, 0, reset_code)); switch (reset_code) { case FW_MSG_CODE_DRV_UNLOAD_COMMON: @@ -14712,10 +14328,12 @@ bxe_reset_chip(struct bxe_softc *sc, uint32_t reset_code) } /* - * Called by the OS to set media options (link, speed, etc.). + * Called by the OS to set media options (link, speed, etc.) + * when the user specifies "ifconfig bxe media XXX" or + * "ifconfig bxe mediaopt XXX". * * Returns: - * 0 = Success, positive value for failure. + * 0 = Success, !0 = Failure */ static int bxe_ifmedia_upd(struct ifnet *ifp) @@ -14730,44 +14348,32 @@ bxe_ifmedia_upd(struct ifnet *ifp) ifm = &sc->bxe_ifmedia; rc = 0; - /* This is an Ethernet controller. */ + /* We only support Ethernet media type. */ if (IFM_TYPE(ifm->ifm_media) != IFM_ETHER) { rc = EINVAL; goto bxe_ifmedia_upd_exit; } - BXE_CORE_LOCK(sc); - switch (IFM_SUBTYPE(ifm->ifm_media)) { case IFM_AUTO: - DBPRINT(sc, BXE_VERBOSE_PHY, - "%s(): Media set to IFM_AUTO, restarting autonegotiation.\n", - __FUNCTION__); + /* ToDo: What to do here? */ + /* Doing nothing translates to success here. */ break; case IFM_10G_CX4: - DBPRINT(sc, BXE_VERBOSE_PHY, - "%s(): Media set to IFM_10G_CX4, forced mode.\n", __FUNCTION__); - break; + /* Fall-through */ case IFM_10G_SR: - DBPRINT(sc, BXE_VERBOSE_PHY, - "%s(): Media set to IFM_10G_SR, forced mode.\n", __FUNCTION__); - break; + /* Fall-through */ case IFM_10G_T: - DBPRINT(sc, BXE_VERBOSE_PHY, - "%s(): Media set to IFM_10G_T, forced mode.\n", __FUNCTION__); - break; + /* Fall-through */ case IFM_10G_TWINAX: - DBPRINT(sc, BXE_VERBOSE_PHY, - "%s(): Media set to IFM_10G_TWINAX, forced mode.\n", __FUNCTION__); - break; + /* Fall-through */ default: + /* We don't support channging the media type. */ DBPRINT(sc, BXE_WARN, "%s(): Invalid media type!\n", __FUNCTION__); rc = EINVAL; } - BXE_CORE_UNLOCK(sc); - bxe_ifmedia_upd_exit: DBENTER(BXE_VERBOSE_PHY); return (rc); @@ -14789,7 +14395,7 @@ bxe_ifmedia_status(struct ifnet *ifp, struct ifmediareq *ifmr) DBENTER(BXE_EXTREME_LOAD | BXE_EXTREME_RESET); /* Report link down if the driver isn't running. */ - if (!(ifp->if_drv_flags & IFF_DRV_RUNNING)) { + if ((ifp->if_drv_flags & IFF_DRV_RUNNING) == 0) { ifmr->ifm_active |= IFM_NONE; goto bxe_ifmedia_status_exit; } @@ -14824,13 +14430,13 @@ bxe_ifmedia_status_exit: * None. */ static __inline void -bxe_update_last_max_sge(struct bxe_fastpath *fp, uint16_t idx) +bxe_update_last_max_sge(struct bxe_fastpath *fp, uint16_t index) { uint16_t last_max; last_max = fp->last_max_sge; - if (SUB_S16(idx, last_max) > 0) - fp->last_max_sge = idx; + if (SUB_S16(index, last_max) > 0) + fp->last_max_sge = index; } /* @@ -14842,13 +14448,13 @@ bxe_update_last_max_sge(struct bxe_fastpath *fp, uint16_t idx) static void bxe_clear_sge_mask_next_elems(struct bxe_fastpath *fp) { - int i, idx, j; + int i, index, j; - for (i = 1; i <= NUM_RX_SGE_PAGES; i++) { - idx = RX_SGE_CNT * i - 1; + for (i = 0; i < NUM_RX_SGE_PAGES; i++) { + index = i * TOTAL_RX_SGE_PER_PAGE + USABLE_RX_SGE_PER_PAGE; for (j = 0; j < 2; j++) { - SGE_MASK_CLEAR_BIT(fp, idx); - idx--; + SGE_MASK_CLEAR_BIT(fp, index); + index++; } } } @@ -14864,7 +14470,7 @@ bxe_update_sge_prod(struct bxe_fastpath *fp, struct eth_fast_path_rx_cqe *fp_cqe) { struct bxe_softc *sc; - uint16_t delta, last_max, last_elem, first_elem, sge_len; + uint16_t delta, first_elem, last_max, last_elem, sge_len; int i; sc = fp->sc; @@ -14874,7 +14480,7 @@ bxe_update_sge_prod(struct bxe_fastpath *fp, sge_len = SGE_PAGE_ALIGN(le16toh(fp_cqe->pkt_len) - le16toh(fp_cqe->len_on_bd)) >> SGE_PAGE_SHIFT; if (!sge_len) - return; + goto bxe_update_sge_prod_exit; /* First mark all used pages. */ for (i = 0; i < sge_len; i++) @@ -14893,10 +14499,10 @@ bxe_update_sge_prod(struct bxe_fastpath *fp, /* Now update the producer index. */ for (i = first_elem; i != last_elem; i = NEXT_SGE_MASK_ELEM(i)) { - if (fp->sge_mask[i]) + if (fp->rx_sge_mask[i]) break; - fp->sge_mask[i] = RX_SGE_MASK_ELEM_ONE_MASK; + fp->rx_sge_mask[i] = RX_SGE_MASK_ELEM_ONE_MASK; delta += RX_SGE_MASK_ELEM_SZ; } @@ -14906,16 +14512,18 @@ bxe_update_sge_prod(struct bxe_fastpath *fp, bxe_clear_sge_mask_next_elems(fp); } +bxe_update_sge_prod_exit: DBEXIT(BXE_EXTREME_RECV); } /* * Initialize scatter gather ring bitmask. * - * Elements may be taken from the scatter gather ring out of order since - * TCP frames may be out of order or intermingled among multiple TCP - * flows on the wire. The SGE bitmask tracks which elements are used - * or available. + * Each entry in the SGE is associated with an aggregation in process. + * Since there is no guarantee that all Ethernet frames associated with + * a partciular TCP flow will arrive at the adapter and be placed into + * the SGE chain contiguously, we maintain a bitmask for each SGE element + * that identifies which aggregation an Ethernet frame belongs to. * * Returns: * None @@ -14925,13 +14533,15 @@ bxe_init_sge_ring_bit_mask(struct bxe_fastpath *fp) { /* Set the mask to all 1s, it's faster to compare to 0 than to 0xf. */ - memset(fp->sge_mask, 0xff, + memset(fp->rx_sge_mask, 0xff, (TOTAL_RX_SGE >> RX_SGE_MASK_ELEM_SHIFT) * sizeof(uint64_t)); /* - * Clear the two last indices in the page to 1. These are the - * indices that correspond to the "next" element which will - * never be indicated and should be removed from calculations. + * The SGE chain is formatted just like the RX chain. + * The last two elements are reserved as a "next page pointer" + * to the next page of SGE elements. Clear the last two + * elements in each SGE chain page since they will never be + * used to track an aggregation. */ bxe_clear_sge_mask_next_elems(fp); } @@ -14948,32 +14558,55 @@ static void bxe_tpa_start(struct bxe_fastpath *fp, uint16_t queue, uint16_t cons, uint16_t prod) { - struct bxe_softc *sc = fp->sc; + struct bxe_softc *sc; struct mbuf *m_temp; struct eth_rx_bd *rx_bd; bus_dmamap_t map_temp; + int max_agg_queues; sc = fp->sc; - DBENTER(BXE_EXTREME_RECV); + DBENTER(BXE_INSANE_RECV | BXE_INSANE_TPA); - /* Move the empty mbuf and mapping from the TPA pool. */ + + + DBPRINT(sc, BXE_EXTREME_TPA, + "%s(): fp[%02d].tpa[%02d], cons=0x%04X, prod=0x%04X\n", + __FUNCTION__, fp->index, queue, cons, prod); + + max_agg_queues = CHIP_IS_E1(sc) ? ETH_MAX_AGGREGATION_QUEUES_E1 : + ETH_MAX_AGGREGATION_QUEUES_E1H; + + DBRUNIF((queue > max_agg_queues), + BXE_PRINTF("%s(): fp[%02d] illegal aggregation (%d > %d)!\n", + __FUNCTION__, fp->index, queue, max_agg_queues)); + + DBRUNIF((fp->tpa_state[queue] != BXE_TPA_STATE_STOP), + BXE_PRINTF("%s(): Starting aggregation on " + "fp[%02d].tpa[%02d] even though queue is not in the " + "TPA_STOP state!\n", __FUNCTION__, fp->index, queue)); + + /* Remove the existing mbuf and mapping from the TPA pool. */ m_temp = fp->tpa_mbuf_ptr[queue]; map_temp = fp->tpa_mbuf_map[queue]; + /* Only the paranoid survive! */ + if(m_temp == NULL) { + BXE_PRINTF("%s(%d): fp[%02d].tpa[%02d] not allocated!\n", + __FILE__, __LINE__, fp->index, queue); + /* ToDo: Additional error handling! */ + goto bxe_tpa_start_exit; + } + /* Move received mbuf and mapping to TPA pool. */ fp->tpa_mbuf_ptr[queue] = fp->rx_mbuf_ptr[cons]; fp->tpa_mbuf_map[queue] = fp->rx_mbuf_map[cons]; - DBRUNIF((fp->tpa_state[queue] != BXE_TPA_STATE_STOP), - DBPRINT(sc, BXE_FATAL, "%s(): Starting bin[%d] even though queue " - "is not in the TPA_STOP state!\n", __FUNCTION__, queue)); - /* Place the TPA bin into the START state. */ fp->tpa_state[queue] = BXE_TPA_STATE_START; DBRUN(fp->tpa_queue_used |= (1 << queue)); /* Get the rx_bd for the next open entry on the receive chain. */ - rx_bd = &fp->rx_bd_chain[RX_PAGE(prod)][RX_IDX(prod)]; + rx_bd = &fp->rx_chain[prod]; /* Update the rx_bd with the empty mbuf from the TPA pool. */ rx_bd->addr_hi = htole32(U64_HI(fp->tpa_mbuf_segs[queue].ds_addr)); @@ -14981,13 +14614,14 @@ bxe_tpa_start(struct bxe_fastpath *fp, uint16_t queue, uint16_t cons, fp->rx_mbuf_ptr[prod] = m_temp; fp->rx_mbuf_map[prod] = map_temp; - DBEXIT(BXE_EXTREME_RECV); +bxe_tpa_start_exit: + DBEXIT(BXE_INSANE_RECV | BXE_INSANE_TPA); } /* * When a TPA aggregation is completed, loop through the individual mbufs * of the aggregation, combining them into a single mbuf which will be sent - * up the stack. Refill all mbufs freed as we go along. + * up the stack. Refill all freed SGEs with mbufs as we go along. * * Returns: * 0 = Success, !0 = Failure. @@ -14996,22 +14630,27 @@ static int bxe_fill_frag_mbuf(struct bxe_softc *sc, struct bxe_fastpath *fp, struct mbuf *m, struct eth_fast_path_rx_cqe *fp_cqe, uint16_t cqe_idx) { + struct mbuf *m_frag; uint32_t frag_len, frag_size, pages, i; uint16_t sge_idx, len_on_bd; - int rc, j; + int j, rc; - DBENTER(BXE_EXTREME_RECV); + DBENTER(BXE_EXTREME_RECV | BXE_EXTREME_TPA); rc = 0; len_on_bd = le16toh(fp_cqe->len_on_bd); frag_size = le16toh(fp_cqe->pkt_len) - len_on_bd; pages = SGE_PAGE_ALIGN(frag_size) >> SGE_PAGE_SHIFT; + DBPRINT(sc, BXE_VERBOSE_TPA, + "%s(): len_on_bd=%d, frag_size=%d, pages=%d\n", + __FUNCTION__, len_on_bd, frag_size, pages); + /* Make sure the aggregated frame is not too big to handle. */ if (pages > 8 * PAGES_PER_SGE) { DBPRINT(sc, BXE_FATAL, - "%s(): SGL length (%d) is too long! CQE index is %d\n", - __FUNCTION__, pages, cqe_idx); + "%s(): fp[%02d].rx_sge[0x%04X] has too many pages (%d)!\n", + __FUNCTION__, fp->index, cqe_idx, pages); DBPRINT(sc, BXE_FATAL, "%s(): fp_cqe->pkt_len = %d fp_cqe->len_on_bd = %d\n", __FUNCTION__, le16toh(fp_cqe->pkt_len), len_on_bd); @@ -15021,7 +14660,7 @@ bxe_fill_frag_mbuf(struct bxe_softc *sc, struct bxe_fastpath *fp, } /* - * Run through the scatter gather list, pulling the individual + * Scan through the scatter gather list, pulling individual * mbufs into a single mbuf for the host stack. */ for (i = 0, j = 0; i < pages; i += PAGES_PER_SGE, j++) { @@ -15035,38 +14674,37 @@ bxe_fill_frag_mbuf(struct bxe_softc *sc, struct bxe_fastpath *fp, frag_len = min(frag_size, (uint32_t)(BCM_PAGE_SIZE * PAGES_PER_SGE)); - /* Update the mbuf with the fragment length. */ - fp->rx_sge_buf_ptr[sge_idx]->m_len = frag_len; + DBPRINT(sc, BXE_VERBOSE_TPA, + "%s(): i=%d, j=%d, frag_size=%d, frag_len=%d\n", + __FUNCTION__, i, j, frag_size, frag_len); - /* Unmap the mbuf from DMA space. */ - bus_dmamap_sync(fp->rx_sge_buf_tag, fp->rx_sge_buf_map[sge_idx], - BUS_DMASYNC_POSTREAD); - bus_dmamap_unload(fp->rx_sge_buf_tag, - fp->rx_sge_buf_map[sge_idx]); + m_frag = fp->rx_sge_buf_ptr[sge_idx]; - /* Concatenate the current fragment to the aggregated mbuf. */ - m_cat(m, fp->rx_sge_buf_ptr[sge_idx]); + /* Allocate a new mbuf for the SGE. */ + rc = bxe_alloc_rx_sge_mbuf(fp, sge_idx); + if (rc) { + /* + * Leave all remaining SGEs in the ring. + */ + goto bxe_fill_frag_mbuf_exit; + } - /* The SGE mbuf was freed in the call to m_cat(). */ - DBRUN(fp->sge_mbuf_alloc--); - fp->rx_sge_buf_ptr[sge_idx] = NULL; + /* Update the fragment its length. */ + m_frag->m_len = frag_len; - /* - * Try an allocate a new mbuf for the SGE that was just - * released. If an allocation error occurs stop where we - * are and drop the whole frame. - */ - rc = bxe_alloc_rx_sge(sc, fp, sge_idx); - if (rc) - goto bxe_fill_frag_mbuf_exit; + /* Concatenate the fragment to the head mbuf. */ + m_cat(m, m_frag); + DBRUN(fp->sge_mbuf_alloc--); + /* Update TPA mbuf size and remaining fragment size. */ m->m_pkthdr.len += frag_len; - frag_size -= frag_len; } bxe_fill_frag_mbuf_exit: - DBEXIT(BXE_EXTREME_RECV); + DBPRINT(sc, BXE_VERBOSE_TPA, + "%s(): frag_size=%d\n", __FUNCTION__, frag_size); + DBEXIT(BXE_EXTREME_RECV | BXE_EXTREME_TPA); return (rc); } @@ -15082,102 +14720,70 @@ static void bxe_tpa_stop(struct bxe_softc *sc, struct bxe_fastpath *fp, uint16_t queue, int pad, int len, union eth_rx_cqe *cqe, uint16_t cqe_idx) { - struct mbuf *m_old, *m_new; - struct ip *ip; + struct mbuf *m; struct ifnet *ifp; - struct ether_vlan_header *eh; - bus_dma_segment_t seg; - int rc, e_hlen; + int rc; - DBENTER(BXE_EXTREME_RECV); - DBPRINT(sc, BXE_VERBOSE_RECV, - "%s(): fp[%d], tpa queue = %d, len = %d, pad = %d\n", __FUNCTION__, - fp->index, queue, len, pad); + DBENTER(BXE_INSANE_RECV | BXE_INSANE_TPA); + DBPRINT(sc, (BXE_EXTREME_RECV | BXE_EXTREME_TPA), + "%s(): fp[%02d].tpa[%02d], len=%d, pad=%d\n", + __FUNCTION__, fp->index, queue, len, pad); rc = 0; ifp = sc->bxe_ifp; - /* Unmap m_old from DMA space. */ - m_old = fp->tpa_mbuf_ptr[queue]; - bus_dmamap_sync(fp->rx_mbuf_tag, fp->tpa_mbuf_map[queue], - BUS_DMASYNC_POSTREAD); - bus_dmamap_unload(fp->rx_mbuf_tag, fp->tpa_mbuf_map[queue]); + m = fp->tpa_mbuf_ptr[queue]; - /* Skip over the pad when passing the data up the stack. */ - m_adj(m_old, pad); + /* Allocate a replacement before modifying existing mbuf. */ + rc = bxe_alloc_tpa_mbuf(fp, queue); + if (rc) { + /* Drop the frame and log a soft error. */ + fp->rx_soft_errors++; + goto bxe_tpa_stop_exit; + } - /* Adjust the packet length to match the received data. */ - m_old->m_pkthdr.len = m_old->m_len = len; + /* We have a replacement, fixup the current mbuf. */ + m_adj(m, pad); + m->m_pkthdr.len = m->m_len = len; - /* Validate the checksum if offload enabled. */ - m_old->m_pkthdr.csum_flags |= CSUM_IP_CHECKED | CSUM_IP_VALID | + /* Mark the checksums valid (taken care of by firmware). */ + m->m_pkthdr.csum_flags |= CSUM_IP_CHECKED | CSUM_IP_VALID | CSUM_DATA_VALID | CSUM_PSEUDO_HDR; - m_old->m_pkthdr.csum_data = 0xffff; - - /* Map the header and find the Ethernet type & header length. */ - eh = mtod(m_old, struct ether_vlan_header *); - if (eh->evl_encap_proto == htons(ETHERTYPE_VLAN)) - e_hlen = ETHER_HDR_LEN + ETHER_VLAN_ENCAP_LEN; - else - e_hlen = ETHER_HDR_LEN; - - /* Get the IP header pointer. */ - ip = (struct ip *)(m_old->m_data + e_hlen); + m->m_pkthdr.csum_data = 0xffff; - ip->ip_sum = 0; - ip->ip_sum = in_cksum_hdr(ip); - - /* Try and aggregate all of the receive mbufs into a single mbuf. */ - if (!bxe_fill_frag_mbuf(sc, fp, m_old, &cqe->fast_path_cqe, cqe_idx)) { - /* - * We have an aggregated frame. If the frame has a vlan tag - * attach that information to the mbuf. - */ + /* Aggregate all of the SGEs into a single mbuf. */ + rc = bxe_fill_frag_mbuf(sc, fp, m, &cqe->fast_path_cqe, cqe_idx); + if (rc) { + /* Drop the packet and log an error. */ + fp->rx_soft_errors++; + m_freem(m); + } else { + /* Find VLAN tag and send frame up to the stack. */ if ((le16toh(cqe->fast_path_cqe.pars_flags.flags) & PARSING_FLAGS_VLAN)) { - m_old->m_pkthdr.ether_vtag = + m->m_pkthdr.ether_vtag = cqe->fast_path_cqe.vlan_tag; - m_old->m_flags |= M_VLANTAG; + m->m_flags |= M_VLANTAG; } - /* Send the packet to the appropriate interface. */ - m_old->m_pkthdr.rcvif = ifp; + /* Assign packet to the appropriate interface. */ + m->m_pkthdr.rcvif = ifp; - /* Pass the packet up to the stack. */ - fp->ipackets++; - DBRUN(fp->tpa_pkts++); - (*ifp->if_input)(ifp, m_old); - } else { - DBPRINT(sc, BXE_WARN, - "%s(): Failed to allocate new SGE page, dropping frame!\n", - __FUNCTION__); - fp->soft_rx_errors++; - m_freem(m_old); + /* Update packet statistics. */ + fp->rx_tpa_pkts++; + ifp->if_ipackets++; + + /* ToDo: Any potential locking issues here? */ + /* Pass the frame to the stack. */ + (*ifp->if_input)(ifp, m); } - /* We passed m_old up the stack or dropped the frame. */ + /* We passed mbuf up the stack or dropped the frame. */ DBRUN(fp->tpa_mbuf_alloc--); - /* Allocate a replacement mbuf. */ - if (__predict_false((m_new = bxe_alloc_mbuf(fp, - sc->mbuf_alloc_size)) == NULL)) - goto bxe_tpa_stop_exit; - - /* Map the new mbuf and place it in the pool. */ - rc = bxe_map_mbuf(fp, m_new, fp->rx_mbuf_tag, - fp->tpa_mbuf_map[queue], &seg); - if (rc) - goto bxe_tpa_stop_exit; - - DBRUN(fp->tpa_mbuf_alloc++); - - fp->tpa_mbuf_ptr[queue] = m_new; - fp->tpa_mbuf_segs[queue] = seg; - bxe_tpa_stop_exit: fp->tpa_state[queue] = BXE_TPA_STATE_STOP; DBRUN(fp->tpa_queue_used &= ~(1 << queue)); - - DBEXIT(BXE_EXTREME_RECV); + DBEXIT(BXE_INSANE_RECV | BXE_INSANE_TPA); } /* @@ -15195,7 +14801,7 @@ bxe_update_rx_prod(struct bxe_softc *sc, struct bxe_fastpath *fp, int i; /* Update producers. */ - rx_prods.bd_prod = bd_prod; + rx_prods.bd_prod = bd_prod; rx_prods.cqe_prod = cqe_prod; rx_prods.sge_prod = sge_prod; @@ -15213,7 +14819,7 @@ bxe_update_rx_prod(struct bxe_softc *sc, struct bxe_fastpath *fp, } /* - * Handles received frame interrupt events. + * Processes received frames. * * Returns: * Nothing. @@ -15228,6 +14834,7 @@ bxe_rxeof(struct bxe_fastpath *fp) uint16_t rx_cq_cons, rx_cq_cons_idx; uint16_t rx_cq_prod, rx_cq_cons_sb; unsigned long rx_pkts = 0; + int rc; sc = fp->sc; ifp = sc->bxe_ifp; @@ -15240,8 +14847,8 @@ bxe_rxeof(struct bxe_fastpath *fp) /* * Get working copies of the driver's view of the * RX indices. These are 16 bit values that are - * expected to increment from from 0 to 65535 - * and then wrap-around to 0 again. + * expected to increment from 0 to 65535 and then + * wrap-around to 0 again. */ rx_bd_cons = fp->rx_bd_cons; rx_bd_prod = fp->rx_bd_prod; @@ -15249,7 +14856,7 @@ bxe_rxeof(struct bxe_fastpath *fp) rx_cq_prod = fp->rx_cq_prod; DBPRINT(sc, (BXE_EXTREME_RECV), - "%s(%d): BEFORE: fp[%d], rx_bd_cons = 0x%04X, rx_bd_prod = 0x%04X, " + "%s(%d): BEFORE: fp[%02d], rx_bd_cons = 0x%04X, rx_bd_prod = 0x%04X, " "rx_cq_cons_sw = 0x%04X, rx_cq_prod_sw = 0x%04X\n", __FUNCTION__, curcpu, fp->index, rx_bd_cons, rx_bd_prod, rx_cq_cons, rx_cq_prod); @@ -15271,33 +14878,24 @@ bxe_rxeof(struct bxe_fastpath *fp) /* * Convert the 16 bit indices used by hardware - * into values that map to the arrays used by - * the driver (i.e. an index). + * into array indices used by the driver. */ - rx_cq_cons_idx = RCQ_ENTRY(rx_cq_cons); + rx_cq_cons_idx = RCQ_ENTRY(rx_cq_cons); rx_bd_prod_idx = RX_BD(rx_bd_prod); rx_bd_cons_idx = RX_BD(rx_bd_cons); wmb(); - /* Fetch the cookie. */ + /* Fetch the completion queue entry (i.e. cookie). */ cqe = (union eth_rx_cqe *) - &fp->rx_cq_chain[RCQ_PAGE(rx_cq_cons_idx)][RCQ_IDX(rx_cq_cons_idx)]; + &fp->rcq_chain[rx_cq_cons_idx]; cqe_fp_flags = cqe->fast_path_cqe.type_error_flags; -#ifdef BXE_DEBUG - /* Simulate an error on the received frame. */ - if (DB_RANDOMTRUE(bxe_debug_received_frame_error)) { - DBPRINT(sc, BXE_WARN, - "%s(): Simulated CQE error flags!\n", __FUNCTION__); - cqe_fp_flags |= ETH_RX_ERROR_FLAGS; - sc->debug_received_frame_error++; + /* Sanity check the cookie flags. */ + if (__predict_false(cqe_fp_flags == 0)) { + fp->rx_null_cqe_flags++; + DBRUN(bxe_dump_cqe(fp, rx_cq_cons_idx, cqe)); + /* ToDo: What error handling can be done here? */ } -#endif - - DBRUNIF((cqe_fp_flags == 0), - fp->null_cqe_flags++; - bxe_dump_cqe(fp, rx_cq_cons_idx, cqe)); - /* DRC - ANything else to do here? */ /* Check the CQE type for slowpath or fastpath completion. */ if (__predict_false(CQE_TYPE(cqe_fp_flags) == @@ -15314,7 +14912,8 @@ bxe_rxeof(struct bxe_fastpath *fp) pad = cqe->fast_path_cqe.placement_offset; /* Check if the completion is for TPA. */ - if ((!fp->disable_tpa) && (TPA_TYPE(cqe_fp_flags) != + if ((fp->disable_tpa == FALSE) && + (TPA_TYPE(cqe_fp_flags) != (TPA_TYPE_START | TPA_TYPE_END))) { uint16_t queue = cqe->fast_path_cqe.queue_index; @@ -15325,21 +14924,19 @@ bxe_rxeof(struct bxe_fastpath *fp) * the frames. */ - /* - * Check if a TPA aggregation has been started. - */ + /* Check if TPA aggregation has started. */ if (TPA_TYPE(cqe_fp_flags) == TPA_TYPE_START) { - bxe_tpa_start(fp, queue, - rx_bd_cons_idx, rx_bd_prod_idx); + bxe_tpa_start(fp, queue, rx_bd_cons_idx, + rx_bd_prod_idx); goto bxe_rxeof_next_rx; } - /* Check if a TPA aggregation has completed. */ + /* Check if TPA aggregation has completed. */ if (TPA_TYPE(cqe_fp_flags) == TPA_TYPE_END) { - if (!BXE_RX_SUM_FIX(cqe)) - DBPRINT(sc, BXE_FATAL, - "%s(): STOP on non-TCP data.\n", - __FUNCTION__); + DBRUNIF(!BXE_RX_SUM_FIX(cqe), + DBPRINT(sc, BXE_FATAL, + "%s(): STOP on non-TCP data.\n", + __FUNCTION__)); /* * This is the size of the linear @@ -15359,108 +14956,39 @@ bxe_rxeof(struct bxe_fastpath *fp) } } - /* Remove the mbuf from the RX chain. */ m = fp->rx_mbuf_ptr[rx_bd_cons_idx]; - fp->rx_mbuf_ptr[rx_bd_cons_idx] = NULL; - DBRUN(fp->free_rx_bd++); - DBRUNIF((fp->free_rx_bd > USABLE_RX_BD), - DBPRINT(sc, BXE_FATAL, - "%s(): fp[%d] - Too many free rx_bd's (0x%04X)!\n", - __FUNCTION__, fp->index, fp->free_rx_bd)); - - /* Unmap the mbuf from DMA space. */ - bus_dmamap_sync(fp->rx_mbuf_tag, - fp->rx_mbuf_map[rx_bd_cons_idx], - BUS_DMASYNC_POSTREAD); - bus_dmamap_unload(fp->rx_mbuf_tag, - fp->rx_mbuf_map[rx_bd_cons_idx]); + /* Allocate a replacement before modifying existing mbuf. */ + rc = bxe_alloc_rx_bd_mbuf(fp, rx_bd_prod_idx); + if (rc) { + /* Drop the frame and log a soft error. */ + fp->rx_soft_errors++; + goto bxe_rxeof_next_rx; + } /* Check if the received frame has any errors. */ if (__predict_false(cqe_fp_flags & ETH_RX_ERROR_FLAGS)) { DBPRINT(sc, BXE_WARN , - "%s(): Found error flags (0x%08X) " - "set in received frame on fp[%d]!\n", - __FUNCTION__, cqe_fp_flags, fp->index); - - fp->soft_rx_errors++; - - /* Reuse the mbuf for a new frame. */ - if (bxe_get_buf(fp, m, rx_bd_prod_idx)) { - DBPRINT(sc, BXE_FATAL, - "%s(): Can't reuse RX mbuf!\n", - __FUNCTION__); - DBRUN(bxe_breakpoint(sc)); + "%s(): fp[%02d].cqe[0x%04X] has errors " + "(0x%08X)!\n", __FUNCTION__, fp->index, + rx_cq_cons, cqe_fp_flags); - /* ToDo: Find alterntive to panic(). */ - panic("bxe%d: Can't reuse RX mbuf!\n", - sc->bxe_unit); - } - - /* Go handle any additional received frames. */ + fp->rx_soft_errors++; goto bxe_rxeof_next_rx; } - /* - * The high level logic used here is to - * immediatley replace each receive buffer - * as it is used so that the receive chain - * is full at all times. First we try to - * allocate a new receive buffer, but if - * that fails then we will reuse the - * existing mbuf and log an error for the - * lost packet. - */ - - /* Allocate a new mbuf for the receive chain. */ - if (__predict_false(bxe_get_buf(fp, - NULL, rx_bd_prod_idx))) { - /* - * Drop the current frame if we can't get - * a new mbuf. - */ - fp->soft_rx_errors++; - - /* - * Place the current mbuf back in the - * receive chain. - */ - if (__predict_false(bxe_get_buf(fp, m, - rx_bd_prod_idx))) { - /* This is really bad! */ - DBPRINT(sc, BXE_FATAL, - "%s(): Can't reuse RX mbuf!\n", - __FUNCTION__); - DBRUN(bxe_breakpoint(sc)); - - /* ToDo: Find alterntive to panic(). */ - panic( - "bxe%d: Double mbuf allocation failure!\n", - sc->bxe_unit); - } - - /* Go handle any additional received frames. */ - goto bxe_rxeof_next_rx; - } - - /* - * Skip over the pad when passing the data up the stack. - */ + /* We have a replacement, fixup the current mbuf. */ m_adj(m, pad); - - /* - * Adjust the packet length to match the received data. - */ m->m_pkthdr.len = m->m_len = len; - /* Send the packet to the appropriate interface. */ + /* Assign packet to the appropriate interface. */ m->m_pkthdr.rcvif = ifp; - /* Assume no hardware checksum. */ + /* Assume no hardware checksum complated. */ m->m_pkthdr.csum_flags = 0; - /* Validate the checksum if offload enabled. */ + /* Validate checksum if offload enabled. */ if (ifp->if_capenable & IFCAP_RXCSUM) { /* Check whether IP checksummed or not. */ if (sc->rx_csum && @@ -15517,8 +15045,9 @@ bxe_rxeof(struct bxe_fastpath *fp) /* Last chance to check for problems. */ DBRUN(bxe_validate_rx_packet(fp, rx_cq_cons, cqe, m)); - /* Pass the mbuf off to the upper layers. */ + /* Update packet statistics. */ ifp->if_ipackets++; + rx_pkts++; /* ToDo: Any potential locking issues here? */ /* Pass the frame to the stack. */ @@ -15530,7 +15059,6 @@ bxe_rxeof(struct bxe_fastpath *fp) bxe_rxeof_next_rx: rx_bd_prod = NEXT_RX_BD(rx_bd_prod); rx_bd_cons = NEXT_RX_BD(rx_bd_cons); - rx_pkts++; bxe_rxeof_next_cqe: rx_cq_prod = NEXT_RCQ_IDX(rx_cq_prod); @@ -15543,14 +15071,14 @@ bxe_rxeof_next_cqe: rmb(); } - /* Update the driver copy of the fastpath indices. */ + /* Update driver copy of the fastpath indices. */ fp->rx_bd_cons = rx_bd_cons; fp->rx_bd_prod = rx_bd_prod; fp->rx_cq_cons = rx_cq_cons; fp->rx_cq_prod = rx_cq_prod; DBPRINT(sc, (BXE_EXTREME_RECV), - "%s(%d): AFTER: fp[%d], rx_bd_cons = 0x%04X, rx_bd_prod = 0x%04X, " + "%s(%d): AFTER: fp[%02d], rx_bd_cons = 0x%04X, rx_bd_prod = 0x%04X, " "rx_cq_cons_sw = 0x%04X, rx_cq_prod_sw = 0x%04X\n", __FUNCTION__, curcpu, fp->index, rx_bd_cons, rx_bd_prod, rx_cq_cons, rx_cq_prod); @@ -15561,12 +15089,11 @@ bxe_rxeof_next_cqe: BUS_SPACE_BARRIER_READ); fp->rx_pkts += rx_pkts; - fp->rx_calls++; DBEXIT(BXE_EXTREME_RECV); } /* - * Handles transmit completion interrupt events. + * Processes transmit completions. * * Returns: * Nothing. @@ -15577,92 +15104,60 @@ bxe_txeof(struct bxe_fastpath *fp) struct bxe_softc *sc; struct ifnet *ifp; struct eth_tx_start_bd *txbd; - uint16_t hw_pkt_cons, sw_pkt_cons, sw_tx_bd_cons, sw_tx_chain_cons; - uint16_t pkt_cons, nbds; + uint16_t hw_pkt_cons, sw_pkt_cons, sw_tx_bd_cons; + uint16_t bd_index, pkt_index, nbds; int i; sc = fp->sc; ifp = sc->bxe_ifp; DBENTER(BXE_EXTREME_SEND); - DBPRINT(sc, BXE_EXTREME_SEND, "%s(): Servicing fp[%d]\n", - __FUNCTION__, fp->index); /* Get the hardware's view of the TX packet consumer index. */ - hw_pkt_cons = le16toh(*fp->tx_cons_sb); + hw_pkt_cons = le16toh(*fp->tx_pkt_cons_sb); sw_pkt_cons = fp->tx_pkt_cons; sw_tx_bd_cons = fp->tx_bd_cons; /* Cycle through any completed TX chain page entries. */ while (sw_pkt_cons != hw_pkt_cons) { - txbd = NULL; - sw_tx_chain_cons = TX_BD(sw_tx_bd_cons); - pkt_cons = TX_BD(sw_pkt_cons); + bd_index = TX_BD(sw_tx_bd_cons); + pkt_index = TX_BD(sw_pkt_cons); -#ifdef BXE_DEBUG - if (sw_tx_chain_cons > MAX_TX_BD) { - BXE_PRINTF( - "%s(): TX chain consumer out of range! 0x%04X > 0x%04X\n", - __FUNCTION__, sw_tx_chain_cons, (int)MAX_TX_BD); - bxe_breakpoint(sc); - } -#endif - - txbd = -&fp->tx_bd_chain[TX_PAGE(sw_tx_chain_cons)][TX_IDX(sw_tx_chain_cons)].start_bd; - -#ifdef BXE_DEBUG - if (txbd == NULL) { - BXE_PRINTF("%s(): Unexpected NULL tx_bd[0x%04X]!\n", - __FUNCTION__, sw_tx_chain_cons); - bxe_breakpoint(sc); - } -#endif - - /* - * Find the number of BD's that were used in the completed pkt. - */ + txbd = &fp->tx_chain[bd_index].start_bd; nbds = txbd->nbd; - /* - * Free the ext mbuf cluster from the mbuf of the completed - * frame. - */ - if (__predict_true(fp->tx_mbuf_ptr[pkt_cons] != NULL)) { - /* Unmap it from the mbuf. */ + /* Free the completed frame's mbuf. */ + if (__predict_true(fp->tx_mbuf_ptr[pkt_index] != NULL)) { + /* Unmap the mbuf from non-paged memory. */ bus_dmamap_unload(fp->tx_mbuf_tag, - fp->tx_mbuf_map[pkt_cons]); + fp->tx_mbuf_map[pkt_index]); - /* Return the mbuf to the stack. */ - DBRUN(fp->tx_mbuf_alloc--); - m_freem(fp->tx_mbuf_ptr[pkt_cons]); - fp->tx_mbuf_ptr[pkt_cons] = NULL; + /* Return the mbuf to the system. */ + m_freem(fp->tx_mbuf_ptr[pkt_index]); + fp->tx_mbuf_alloc--; + fp->tx_mbuf_ptr[pkt_index] = NULL; fp->opackets++; } else { fp->tx_chain_lost_mbuf++; } - /* Skip over the remaining used buffer descriptors. */ - fp->used_tx_bd -= nbds; + /* Updated packet consumer value. */ + sw_pkt_cons++; + /* Skip over the remaining used buffer descriptors. */ + fp->tx_bd_used -= nbds; for (i = 0; i < nbds; i++) sw_tx_bd_cons = NEXT_TX_BD(sw_tx_bd_cons); - /* Increment the software copy of packet consumer index */ - sw_pkt_cons++; - - /* - * Refresh the hw packet consumer index to see if there's - * new work. - */ - hw_pkt_cons = le16toh(*fp->tx_cons_sb); + /* Check for new work since we started. */ + hw_pkt_cons = le16toh(*fp->tx_pkt_cons_sb); rmb(); } /* Enable new transmits if we've made enough room. */ - if (fp->used_tx_bd < BXE_TX_CLEANUP_THRESHOLD) { + if (fp->tx_bd_used < BXE_TX_CLEANUP_THRESHOLD) { ifp->if_drv_flags &= ~IFF_DRV_OACTIVE; - if (fp->used_tx_bd == 0) { + if (fp->tx_bd_used == 0) { /* * Clear the watchdog timer if we've emptied * the TX chain. @@ -15684,78 +15179,6 @@ bxe_txeof(struct bxe_fastpath *fp) } /* - * Encapsulate an mbuf cluster into the rx_bd. - * - * This routine will map an mbuf cluster into 1 rx_bd - * - * Returns: - * 0 for success, positive value for failure. - */ -static int -bxe_get_buf(struct bxe_fastpath *fp, struct mbuf *m, uint16_t prod) -{ - struct bxe_softc *sc; - bus_dma_segment_t seg; - struct mbuf *m_new; - struct eth_rx_bd *rx_bd; - int rc; - - sc = fp->sc; - m_new = NULL; - rc = 0; - - DBENTER(BXE_INSANE_LOAD | BXE_INSANE_RESET | BXE_INSANE_RECV); - - /* Make sure the inputs are valid. */ - DBRUNIF((prod > MAX_RX_BD), - BXE_PRINTF("%s(): RX producer out of range: 0x%04X > 0x%04X\n", - __FUNCTION__, prod, (uint16_t) MAX_RX_BD)); - - /* Check whether this is a new mbuf allocation. */ - if (m == NULL) { - if ((m_new = bxe_alloc_mbuf(fp, sc->mbuf_alloc_size)) == NULL) { - rc = ENOBUFS; - goto bxe_get_buf_exit; - } - - DBRUN(fp->rx_mbuf_alloc++); - } else { - /* Reuse the existing mbuf. */ - m_new = m; - m_new->m_pkthdr.len = m_new->m_len = sc->mbuf_alloc_size; - } - - /* Do some additional sanity checks on the mbuf. */ - DBRUN(m_sanity(m_new, FALSE)); - - rc = bxe_map_mbuf(fp, m_new, fp->rx_mbuf_tag, - fp->rx_mbuf_map[prod], &seg); - - if (__predict_false(rc)) { - DBRUN(fp->rx_mbuf_alloc--); - rc = ENOBUFS; - goto bxe_get_buf_exit; - } - - /* Setup the rx_bd for the first segment. */ - rx_bd = &fp->rx_bd_chain[RX_PAGE(prod)][RX_IDX(prod)]; - rx_bd->addr_lo = htole32(U64_LO(seg.ds_addr)); - rx_bd->addr_hi = htole32(U64_HI(seg.ds_addr)); - - /* Save the mbuf and update our counter. */ - fp->rx_mbuf_ptr[prod] = m_new; - - DBRUN(fp->free_rx_bd--); - DBRUNIF((fp->free_rx_bd > USABLE_RX_BD), - DBPRINT(sc, BXE_FATAL, "%s(): fp[%d] - Too many free rx_bd's " - "(0x%04X)!\n", __FUNCTION__, fp->index, fp->free_rx_bd)); - -bxe_get_buf_exit: - DBEXIT(BXE_INSANE_LOAD | BXE_INSANE_RESET | BXE_INSANE_RECV); - return (rc); -} - -/* * Transmit timeout handler. * * Returns: @@ -15764,9 +15187,10 @@ bxe_get_buf_exit: static int bxe_watchdog(struct bxe_fastpath *fp) { - struct bxe_softc *sc = fp->sc; + struct bxe_softc *sc; int rc = 0; + sc = fp->sc; DBENTER(BXE_INSANE_SEND); BXE_FP_LOCK(fp); @@ -15795,39 +15219,10 @@ bxe_watchdog(struct bxe_fastpath *fp) bxe_watchdog_exit: DBEXIT(BXE_INSANE_SEND); - return(rc); -} - - -/* - * Change the MTU size for the port. The MTU should be validated before - * calling this routine. - * - * Returns: - * 0 = Success, !0 = Failure. - */ -static int -bxe_change_mtu(struct bxe_softc *sc, int if_drv_running) -{ - struct ifnet *ifp; - int rc; - - BXE_CORE_LOCK_ASSERT(sc); - - rc = 0; - ifp = sc->bxe_ifp; - sc->bxe_ifp->if_mtu = ifp->if_mtu; - if (if_drv_running) { - DBPRINT(sc, BXE_INFO_IOCTL, "%s(): Changing the MTU to %d.\n", - __FUNCTION__, sc->bxe_ifp->if_mtu); - - bxe_stop_locked(sc, UNLOAD_NORMAL); - bxe_init_locked(sc, LOAD_NORMAL); - } - return (rc); } + /* * The periodic timer tick routine. * @@ -15850,21 +15245,22 @@ bxe_tick(void *xsc) sc = xsc; DBENTER(BXE_INSANE_MISC); + /* Check for TX timeouts on any fastpath. */ for (i = 0; i < sc->num_queues; i++) { fp = &sc->fp[i]; + if (bxe_watchdog(fp) != 0) break; } - BXE_CORE_LOCK(sc); func = BP_FUNC(sc); /* Schedule the next tick. */ callout_reset(&sc->bxe_tick_callout, hz, bxe_tick, sc); #if 0 - if (!BP_NOMCP(sc)) { + if (!NOMCP(sc)) { func = BP_FUNC(sc); ++sc->fw_drv_pulse_wr_seq; @@ -15894,8 +15290,6 @@ bxe_tick(void *xsc) if ((sc->state == BXE_STATE_OPEN) || (sc->state == BXE_STATE_DISABLED)) bxe_stats_handle(sc, STATS_EVENT_UPDATE); - - BXE_CORE_UNLOCK(sc); } #ifdef BXE_DEBUG @@ -16155,7 +15549,7 @@ bxe_add_sysctls(struct bxe_softc *sc) device_get_sysctl_ctx(sc->dev); struct sysctl_oid_list *children = SYSCTL_CHILDREN(device_get_sysctl_tree(sc->dev)); - struct bxe_eth_stats *estats = &sc->eth_stats; + struct bxe_port_stats *estats = &sc->eth_stats; SYSCTL_ADD_UINT(ctx, children, OID_AUTO, "estats_total_bytes_received_hi", @@ -16275,95 +15669,110 @@ bxe_add_sysctls(struct bxe_softc *sc) namebuf, CTLFLAG_RD, NULL, "Queue Name"); queue_list = SYSCTL_CHILDREN(queue_node); + /* + * Receive related fastpath statistics.* + */ SYSCTL_ADD_ULONG(ctx, queue_list, OID_AUTO, "rx_pkts", CTLFLAG_RD, &fp->rx_pkts, "Received packets"); SYSCTL_ADD_ULONG(ctx, queue_list, OID_AUTO, - "tx_pkts", - CTLFLAG_RD, &fp->tx_pkts, - "Transmitted packets"); - - SYSCTL_ADD_ULONG(ctx, queue_list, OID_AUTO, - "mbuf_alloc_failed", - CTLFLAG_RD, &fp->mbuf_alloc_failed, - "Mbuf allocation failure count"); + "rx_tpa_pkts", + CTLFLAG_RD, &fp->rx_tpa_pkts, + "Received TPA packets"); SYSCTL_ADD_ULONG(ctx, queue_list, OID_AUTO, - "tpa_mbuf_alloc_failed", - CTLFLAG_RD, &fp->tpa_mbuf_alloc_failed, - "TPA mbuf allocation failure count"); + "rx_null_cqe_flags", + CTLFLAG_RD, &fp->rx_null_cqe_flags, + "CQEs with NULL flags count"); SYSCTL_ADD_ULONG(ctx, queue_list, OID_AUTO, - "mbuf_defrag_attempts", - CTLFLAG_RD, &fp->mbuf_defrag_attempts, - "Mbuf defrag attempt count"); + "rx_soft_errors", + CTLFLAG_RD, &fp->rx_soft_errors, + "Received frames dropped by driver count"); + /* + * Transmit related fastpath statistics.* + */ SYSCTL_ADD_ULONG(ctx, queue_list, OID_AUTO, - "mbuf_defrag_failures", - CTLFLAG_RD, &fp->mbuf_defrag_failures, - "Mbuf defrag failure count"); + "tx_pkts", + CTLFLAG_RD, &fp->tx_pkts, + "Transmitted packets"); SYSCTL_ADD_ULONG(ctx, queue_list, OID_AUTO, - "mbuf_defrag_successes", - CTLFLAG_RD, &fp->mbuf_defrag_successes, - "Mbuf defrag success count"); + "tx_soft_errors", + CTLFLAG_RD, &fp->tx_soft_errors, + "Transmit frames dropped by driver count"); SYSCTL_ADD_ULONG(ctx, queue_list, OID_AUTO, - "offload_frames_csum_ip", - CTLFLAG_RD, &fp->offload_frames_csum_ip, + "tx_offload_frames_csum_ip", + CTLFLAG_RD, &fp->tx_offload_frames_csum_ip, "IP checksum offload frame count"); SYSCTL_ADD_ULONG(ctx, queue_list, OID_AUTO, - "offload_frames_csum_tcp", - CTLFLAG_RD, &fp->offload_frames_csum_tcp, + "tx_offload_frames_csum_tcp", + CTLFLAG_RD, &fp->tx_offload_frames_csum_tcp, "TCP checksum offload frame count"); SYSCTL_ADD_ULONG(ctx, queue_list, OID_AUTO, - "offload_frames_csum_udp", - CTLFLAG_RD, &fp->offload_frames_csum_udp, + "tx_offload_frames_csum_udp", + CTLFLAG_RD, &fp->tx_offload_frames_csum_udp, "UDP checksum offload frame count"); SYSCTL_ADD_ULONG(ctx, queue_list, OID_AUTO, - "offload_frames_tso", - CTLFLAG_RD, &fp->offload_frames_tso, + "tx_offload_frames_tso", + CTLFLAG_RD, &fp->tx_offload_frames_tso, "TSO offload frame count"); SYSCTL_ADD_ULONG(ctx, queue_list, OID_AUTO, + "tx_header_splits", + CTLFLAG_RD, &fp->tx_header_splits, + "TSO frame header/data split count"); + + SYSCTL_ADD_ULONG(ctx, queue_list, OID_AUTO, "tx_encap_failures", CTLFLAG_RD, &fp->tx_encap_failures, "TX encapsulation failure count"); SYSCTL_ADD_ULONG(ctx, queue_list, OID_AUTO, - "tx_start_called_on_empty_queue", - CTLFLAG_RD, &fp->tx_start_called_on_empty_queue, - "TX start function called on empty " - "TX queue count"); + "tx_hw_queue_full", + CTLFLAG_RD, &fp->tx_hw_queue_full, + "TX H/W queue too full to add a frame count"); SYSCTL_ADD_ULONG(ctx, queue_list, OID_AUTO, - "tx_queue_too_full", - CTLFLAG_RD, &fp->tx_queue_too_full, - "TX queue too full to add a TX frame count"); + "tx_hw_max_queue_depth", + CTLFLAG_RD, &fp->tx_hw_max_queue_depth, + "TX H/W maximum queue depth count"); SYSCTL_ADD_ULONG(ctx, queue_list, OID_AUTO, - "window_violation_std", - CTLFLAG_RD, &fp->window_violation_std, + "tx_dma_mapping_failure", + CTLFLAG_RD, &fp->tx_dma_mapping_failure, + "TX DMA mapping failure"); + + SYSCTL_ADD_INT(ctx, queue_list, OID_AUTO, + "tx_max_drbr_queue_depth", + CTLFLAG_RD, &fp->tx_max_drbr_queue_depth, + 0, "TX S/W queue maximum depth"); + + SYSCTL_ADD_ULONG(ctx, queue_list, OID_AUTO, + "tx_window_violation_std", + CTLFLAG_RD, &fp->tx_window_violation_std, "Standard frame TX BD window violation count"); SYSCTL_ADD_ULONG(ctx, queue_list, OID_AUTO, - "window_violation_tso", - CTLFLAG_RD, &fp->window_violation_tso, + "tx_window_violation_tso", + CTLFLAG_RD, &fp->tx_window_violation_tso, "TSO frame TX BD window violation count"); SYSCTL_ADD_ULONG(ctx, queue_list, OID_AUTO, - "unsupported_tso_request_ipv6", - CTLFLAG_RD, &fp->unsupported_tso_request_ipv6, + "tx_unsupported_tso_request_ipv6", + CTLFLAG_RD, &fp->tx_unsupported_tso_request_ipv6, "TSO frames with unsupported IPv6 protocol count"); SYSCTL_ADD_ULONG(ctx, queue_list, OID_AUTO, - "unsupported_tso_request_not_tcp", - CTLFLAG_RD, &fp->unsupported_tso_request_not_tcp, + "tx_unsupported_tso_request_not_tcp", + CTLFLAG_RD, &fp->tx_unsupported_tso_request_not_tcp, "TSO frames with unsupported protocol count"); SYSCTL_ADD_ULONG(ctx, queue_list, OID_AUTO, @@ -16371,17 +15780,58 @@ bxe_add_sysctls(struct bxe_softc *sc) CTLFLAG_RD, &fp->tx_chain_lost_mbuf, "Mbufs lost on TX chain count"); - SYSCTL_ADD_INT(ctx, queue_list, OID_AUTO, - "max_drbr_queue_depth", - CTLFLAG_RD, &fp->max_drbr_queue_depth, - 0, "Driver queue maximum dpeth"); + SYSCTL_ADD_ULONG(ctx, queue_list, OID_AUTO, + "tx_frame_deferred", + CTLFLAG_RD, &fp->tx_frame_deferred, + "TX frame deferred from H/W queue to S/W queue count"); -#ifdef BXE_DEBUG SYSCTL_ADD_ULONG(ctx, queue_list, OID_AUTO, - "null_cqe_flags", - CTLFLAG_RD, &fp->null_cqe_flags, - "CQEs with NULL flags count"); -#endif + "tx_queue_xoff", + CTLFLAG_RD, &fp->tx_queue_xoff, + "TX queue full count"); + + /* + * Memory related fastpath statistics.* + */ + SYSCTL_ADD_ULONG(ctx, queue_list, OID_AUTO, + "mbuf_rx_bd_alloc_failed", + CTLFLAG_RD, &fp->mbuf_rx_bd_alloc_failed, + "RX BD mbuf allocation failure count"); + + SYSCTL_ADD_ULONG(ctx, queue_list, OID_AUTO, + "mbuf_rx_bd_mapping_failed", + CTLFLAG_RD, &fp->mbuf_rx_bd_mapping_failed, + "RX BD mbuf mapping failure count"); + + SYSCTL_ADD_ULONG(ctx, queue_list, OID_AUTO, + "mbuf_tpa_alloc_failed", + CTLFLAG_RD, &fp->mbuf_tpa_alloc_failed, + "TPA mbuf allocation failure count"); + + SYSCTL_ADD_ULONG(ctx, queue_list, OID_AUTO, + "mbuf_tpa_mapping_failed", + CTLFLAG_RD, &fp->mbuf_tpa_mapping_failed, + "TPA mbuf mapping failure count"); + + SYSCTL_ADD_ULONG(ctx, queue_list, OID_AUTO, + "mbuf_sge_alloc_failed", + CTLFLAG_RD, &fp->mbuf_sge_alloc_failed, + "SGE mbuf allocation failure count"); + + SYSCTL_ADD_ULONG(ctx, queue_list, OID_AUTO, + "mbuf_sge_mapping_failed", + CTLFLAG_RD, &fp->mbuf_sge_mapping_failed, + "SGE mbuf mapping failure count"); + + SYSCTL_ADD_ULONG(ctx, queue_list, OID_AUTO, + "mbuf_defrag_attempts", + CTLFLAG_RD, &fp->mbuf_defrag_attempts, + "Mbuf defrag attempt count"); + + SYSCTL_ADD_ULONG(ctx, queue_list, OID_AUTO, + "mbuf_defrag_failures", + CTLFLAG_RD, &fp->mbuf_defrag_failures, + "Mbuf defrag failure count"); } } while (0); @@ -16560,13 +16010,13 @@ bxe_dump_debug_reg_wread(struct bxe_softc *sc, uint32_t *index) pwreg_addrs = NULL; /* Read different registers for different controllers. */ - if (CHIP_IS_E1H(sc)) { - wregs_count = wregs_count_e1h; - pwreg_addrs = &wreg_addrs_e1h[0]; - } else { - wregs_count = wregs_count_e1; - pwreg_addrs = &wreg_addrs_e1[0]; - } + if (CHIP_IS_E1H(sc)) { + wregs_count = wregs_count_e1h; + pwreg_addrs = &wreg_addrs_e1h[0]; + } else { + wregs_count = wregs_count_e1; + pwreg_addrs = &wreg_addrs_e1[0]; + } for (reg_addrs_index = 0; reg_addrs_index < wregs_count; reg_addrs_index++) { @@ -16646,22 +16096,23 @@ bxe_grcdump(struct bxe_softc *sc, int log) * Returns: * Nothing. */ -static __attribute__ ((noinline)) +static __noinline void bxe_validate_rx_packet(struct bxe_fastpath *fp, uint16_t comp_cons, union eth_rx_cqe *cqe, struct mbuf *m) { struct bxe_softc *sc; + int error; sc = fp->sc; - /* Check that the mbuf is sane. */ - m_sanity(m, FALSE); - /* Make sure the packet has a valid length. */ - if ((m->m_len < ETHER_HDR_LEN) | - (m->m_len > ETH_MAX_JUMBO_PACKET_SIZE + ETH_OVREHEAD)) { + /* Check that the mbuf is sane. */ + error = m_sanity(m, FALSE); + if (error != 1 || ((m->m_len < ETHER_HDR_LEN) | + (m->m_len > ETH_MAX_JUMBO_PACKET_SIZE + ETH_OVREHEAD))) { m_print(m, 128); bxe_dump_enet(sc, m); bxe_dump_cqe(fp, comp_cons, cqe); + /* Make sure the packet has a valid length. */ } } @@ -16673,7 +16124,7 @@ void bxe_validate_rx_packet(struct bxe_fastpath *fp, uint16_t comp_cons, * Returns: * Nothing. */ -static __attribute__ ((noinline)) +static __noinline void bxe_dump_enet(struct bxe_softc *sc, struct mbuf *m) { struct ether_vlan_header *eh; @@ -16803,7 +16254,7 @@ bxe_dump_mbuf_data(struct mbuf *m, int len) * Returns: * Nothing. */ -static __attribute__ ((noinline)) +static __noinline void bxe_dump_mbuf(struct bxe_softc *sc, struct mbuf *m) { if (m == NULL) { @@ -16868,17 +16319,19 @@ void bxe_dump_mbuf(struct bxe_softc *sc, struct mbuf *m) * Returns: * Nothing. */ -static __attribute__ ((noinline)) +static __noinline void bxe_dump_rxbd(struct bxe_fastpath *fp, int idx, struct eth_rx_bd *rx_bd) { - struct bxe_softc *sc = fp->sc; + struct bxe_softc *sc; + + sc = fp->sc; /* Check if index out of range. */ if (idx > MAX_RX_BD) { BXE_PRINTF("fp[%02d].rx_bd[0x%04X] XX: Invalid rx_bd index!\n", fp->index, idx); - } else if ((idx & RX_DESC_MASK) >= USABLE_RX_BD_PER_PAGE) { + } else if ((idx & RX_BD_PER_PAGE_MASK) >= USABLE_RX_BD_PER_PAGE) { /* RX Chain page pointer. */ BXE_PRINTF("fp[%02d].rx_bd[0x%04X] NP: haddr=0x%08X:%08X\n", fp->index, idx, rx_bd->addr_hi, rx_bd->addr_lo); @@ -16894,11 +16347,13 @@ void bxe_dump_rxbd(struct bxe_fastpath *fp, int idx, * Returns: * Nothing. */ -static __attribute__ ((noinline)) +static __noinline void bxe_dump_cqe(struct bxe_fastpath *fp, int idx, union eth_rx_cqe *cqe) { - struct bxe_softc *sc = fp->sc; + struct bxe_softc *sc; + + sc = fp->sc; if (idx > MAX_RCQ_ENTRIES) { /* Index out of range. */ @@ -16931,26 +16386,28 @@ void bxe_dump_cqe(struct bxe_fastpath *fp, int idx, * Returns: * Nothing. */ -static __attribute__ ((noinline)) +static __noinline void bxe_dump_tx_parsing_bd(struct bxe_fastpath *fp, int idx, struct eth_tx_parse_bd *p_bd) { - struct bxe_softc *sc = fp->sc; - - if (idx > MAX_TX_BD){ - /* Index out of range. */ - BXE_PRINTF("fp[%02d].tx_bd[0x%04X] XX: Invalid tx_bd index!\n", - fp->index, idx); - } else { - BXE_PRINTF("fp[%02d]:tx_bd[0x%04X] PB: global_data=0x%b, " - "tcp_flags=0x%b, ip_hlen=%04d, total_hlen=%04d, " - "tcp_pseudo_csum=0x%04X, lso_mss=0x%04X, ip_id=0x%04X, " - "tcp_send_seq=0x%08X\n", fp->index, idx, - p_bd->global_data, BXE_ETH_TX_PARSE_BD_GLOBAL_DATA_PRINTFB, - p_bd->tcp_flags, BXE_ETH_TX_PARSE_BD_TCP_FLAGS_PRINTFB, - p_bd->ip_hlen, p_bd->total_hlen, p_bd->tcp_pseudo_csum, - p_bd->lso_mss, p_bd->ip_id, p_bd->tcp_send_seq); - } + struct bxe_softc *sc; + + sc = fp->sc; + + if (idx > MAX_TX_BD){ + /* Index out of range. */ + BXE_PRINTF("fp[%02d].tx_bd[0x%04X] XX: Invalid tx_bd index!\n", + fp->index, idx); + } else { + BXE_PRINTF("fp[%02d]:tx_bd[0x%04X] PB: global_data=0x%b, " + "tcp_flags=0x%b, ip_hlen=%04d, total_hlen=%04d, " + "tcp_pseudo_csum=0x%04X, lso_mss=0x%04X, ip_id=0x%04X, " + "tcp_send_seq=0x%08X\n", fp->index, idx, + p_bd->global_data, BXE_ETH_TX_PARSE_BD_GLOBAL_DATA_PRINTFB, + p_bd->tcp_flags, BXE_ETH_TX_PARSE_BD_TCP_FLAGS_PRINTFB, + p_bd->ip_hlen, p_bd->total_hlen, p_bd->tcp_pseudo_csum, + p_bd->lso_mss, p_bd->ip_id, p_bd->tcp_send_seq); + } } /* @@ -16959,11 +16416,13 @@ void bxe_dump_tx_parsing_bd(struct bxe_fastpath *fp, int idx, * Returns: * Nothing. */ -static __attribute__ ((noinline)) +static __noinline void bxe_dump_txbd(struct bxe_fastpath *fp, int idx, union eth_tx_bd_types *tx_bd) { - struct bxe_softc *sc = fp->sc; + struct bxe_softc *sc; + + sc = fp->sc; if (idx > MAX_TX_BD){ /* Index out of range. */ @@ -17002,24 +16461,26 @@ void bxe_dump_txbd(struct bxe_fastpath *fp, int idx, * Returns: * Nothing. */ -static __attribute__ ((noinline)) +static __noinline void bxe_dump_tx_chain(struct bxe_fastpath * fp, int tx_bd_prod, int count) { - struct bxe_softc *sc = fp->sc; + struct bxe_softc *sc; union eth_tx_bd_types *tx_bd; uint32_t val_hi, val_lo; int i, parsing_bd = 0; + sc = fp->sc; + /* First some info about the tx_bd chain structure. */ BXE_PRINTF( "----------------------------" " tx_bd chain " "----------------------------\n"); - val_hi = U64_HI(fp->tx_bd_chain_paddr); - val_lo = U64_LO(fp->tx_bd_chain_paddr); + val_hi = U64_HI(fp->tx_dma.paddr); + val_lo = U64_LO(fp->tx_dma.paddr); BXE_PRINTF( - "0x%08X:%08X - (fp[%02d]->tx_bd_chain_paddr) TX Chain physical address\n", + "0x%08X:%08X - (fp[%02d]->tx_dma.paddr) TX Chain physical address\n", val_hi, val_lo, fp->index); BXE_PRINTF( "page size = 0x%08X, tx chain pages = 0x%08X\n", @@ -17037,12 +16498,11 @@ void bxe_dump_tx_chain(struct bxe_fastpath * fp, int tx_bd_prod, int count) /* Now print out the tx_bd's themselves. */ for (i = 0; i < count; i++) { - tx_bd = - &fp->tx_bd_chain[TX_PAGE(tx_bd_prod)][TX_IDX(tx_bd_prod)]; + tx_bd = &fp->tx_chain[tx_bd_prod]; if (parsing_bd) { struct eth_tx_parse_bd *p_bd; p_bd = (struct eth_tx_parse_bd *) - &fp->tx_bd_chain[TX_PAGE(tx_bd_prod)][TX_IDX(tx_bd_prod)].parse_bd; + &fp->tx_chain[tx_bd_prod].parse_bd; bxe_dump_tx_parsing_bd(fp, tx_bd_prod, p_bd); parsing_bd = 0; } else { @@ -17071,23 +16531,23 @@ void bxe_dump_tx_chain(struct bxe_fastpath * fp, int tx_bd_prod, int count) * Returns: * Nothing. */ -static __attribute__ ((noinline)) +static __noinline void bxe_dump_rx_cq_chain(struct bxe_fastpath *fp, int rx_cq_prod, int count) { - struct bxe_softc *sc = fp->sc; + struct bxe_softc *sc; union eth_rx_cqe *cqe; int i; + sc = fp->sc; + /* First some info about the tx_bd chain structure. */ BXE_PRINTF( "----------------------------" " CQE Chain " "----------------------------\n"); - for (i=0; i< NUM_RCQ_PAGES; i++) { - BXE_PRINTF("fp[%02d]->rx_cq_chain_paddr[%d] = 0x%jX\n", - fp->index, i, (uintmax_t) fp->rx_cq_chain_paddr[i]); - } + BXE_PRINTF("fp[%02d]->rcq_dma.paddr = 0x%jX\n", + fp->index, (uintmax_t) fp->rcq_dma.paddr); BXE_PRINTF("page size = 0x%08X, cq chain pages " " = 0x%08X\n", @@ -17107,9 +16567,10 @@ void bxe_dump_rx_cq_chain(struct bxe_fastpath *fp, int rx_cq_prod, int count) "----------------------------\n"); for (i = 0; i < count; i++) { - cqe = (union eth_rx_cqe *)&fp->rx_cq_chain - [RCQ_PAGE(rx_cq_prod)][RCQ_IDX(rx_cq_prod)]; + cqe = (union eth_rx_cqe *)&fp->rcq_chain[rx_cq_prod]; + bxe_dump_cqe(fp, rx_cq_prod, cqe); + /* Don't skip next page pointers. */ rx_cq_prod = ((rx_cq_prod + 1) & MAX_RCQ_ENTRIES); } @@ -17126,8 +16587,8 @@ void bxe_dump_rx_cq_chain(struct bxe_fastpath *fp, int rx_cq_prod, int count) * Returns: * Nothing. */ -static __attribute__ ((noinline)) -void bxe_dump_rx_bd_chain(struct bxe_fastpath *fp, int rx_prod, int count) +static __noinline +void bxe_dump_rx_bd_chain(struct bxe_fastpath *fp, int prod, int count) { struct bxe_softc *sc; struct eth_rx_bd *rx_bd; @@ -17135,6 +16596,7 @@ void bxe_dump_rx_bd_chain(struct bxe_fastpath *fp, int rx_prod, int count) int i; sc = fp->sc; + /* First some info about the tx_bd chain structure. */ BXE_PRINTF( "----------------------------" @@ -17144,8 +16606,8 @@ void bxe_dump_rx_bd_chain(struct bxe_fastpath *fp, int rx_prod, int count) BXE_PRINTF( "----- RX_BD Chain -----\n"); - BXE_PRINTF("fp[%02d]->rx_cq_chain_paddr[0] = 0x%jX\n", - fp->index, (uintmax_t) fp->rx_cq_chain_paddr[0]); + BXE_PRINTF("fp[%02d]->rx_dma.paddr = 0x%jX\n", + fp->index, (uintmax_t) fp->rx_dma.paddr); BXE_PRINTF( "page size = 0x%08X, rx chain pages = 0x%08X\n", @@ -17166,15 +16628,14 @@ void bxe_dump_rx_bd_chain(struct bxe_fastpath *fp, int rx_prod, int count) /* Now print out the rx_bd's themselves. */ for (i = 0; i < count; i++) { - rx_bd = (struct eth_rx_bd *) - (&fp->rx_bd_chain[RX_PAGE(rx_prod)][RX_IDX(rx_prod)]); - m = sc->fp->rx_mbuf_ptr[rx_prod]; + rx_bd = (struct eth_rx_bd *) (&fp->rx_chain[prod]); + m = sc->fp->rx_mbuf_ptr[prod]; - bxe_dump_rxbd(fp, rx_prod, rx_bd); + bxe_dump_rxbd(fp, prod, rx_bd); bxe_dump_mbuf(sc, m); /* Don't skip next page pointers. */ - rx_prod = ((rx_prod + 1) & MAX_RX_BD); + prod = ((prod + 1) & MAX_RX_BD); } BXE_PRINTF( @@ -17189,7 +16650,7 @@ void bxe_dump_rx_bd_chain(struct bxe_fastpath *fp, int rx_prod, int count) * Returns: * Nothing. */ -static __attribute__ ((noinline)) +static __noinline void bxe_dump_hw_state(struct bxe_softc *sc) { int i; @@ -17216,7 +16677,7 @@ void bxe_dump_hw_state(struct bxe_softc *sc) * Returns: * Nothing. */ -static __attribute__ ((noinline)) +static __noinline void bxe_dump_rx_mbuf_chain(struct bxe_softc *sc, int chain_prod, int count) { struct mbuf *m; @@ -17246,7 +16707,7 @@ void bxe_dump_rx_mbuf_chain(struct bxe_softc *sc, int chain_prod, int count) * Returns: * Nothing. */ -static __attribute__ ((noinline)) +static __noinline void bxe_dump_tx_mbuf_chain(struct bxe_softc *sc, int chain_prod, int count) { struct mbuf *m; @@ -17276,15 +16737,15 @@ void bxe_dump_tx_mbuf_chain(struct bxe_softc *sc, int chain_prod, int count) * Returns: * Nothing. */ -static __attribute__ ((noinline)) +static __noinline void bxe_dump_status_block(struct bxe_softc *sc) { struct bxe_fastpath *fp; - struct host_def_status_block *dsb; + struct host_def_status_block *def_sb; struct host_status_block *fpsb; int i; - dsb = sc->def_status_block; + def_sb = sc->def_sb; BXE_PRINTF( "----------------------------" " Status Block " @@ -17359,92 +16820,92 @@ void bxe_dump_status_block(struct bxe_softc *sc) /* Print attention information. */ BXE_PRINTF( " 0x%02X - Status Block ID\n", - dsb->atten_status_block.status_block_id); + def_sb->atten_status_block.status_block_id); BXE_PRINTF( "0x%08X - Attn Bits\n", - dsb->atten_status_block.attn_bits); + def_sb->atten_status_block.attn_bits); BXE_PRINTF( "0x%08X - Attn Bits Ack\n", - dsb->atten_status_block.attn_bits_ack); + def_sb->atten_status_block.attn_bits_ack); BXE_PRINTF( " 0x%04X - Attn Block Index\n", - le16toh(dsb->atten_status_block.attn_bits_index)); + le16toh(def_sb->atten_status_block.attn_bits_index)); /* Print the USTORM fields (HC_USTORM_DEF_SB_NUM_INDICES). */ BXE_PRINTF( " 0x%02X - USTORM Status Block ID\n", - dsb->u_def_status_block.status_block_id); + def_sb->u_def_status_block.status_block_id); BXE_PRINTF( " 0x%04X - USTORM Status Block Index\n", - le16toh(dsb->u_def_status_block.status_block_index)); + le16toh(def_sb->u_def_status_block.status_block_index)); BXE_PRINTF( " 0x%04X - USTORM [ETH_RDMA_RX_CQ_CONS]\n", - le16toh(dsb->u_def_status_block.index_values[HC_INDEX_DEF_U_ETH_RDMA_RX_CQ_CONS])); + le16toh(def_sb->u_def_status_block.index_values[HC_INDEX_DEF_U_ETH_RDMA_RX_CQ_CONS])); BXE_PRINTF( " 0x%04X - USTORM [ETH_ISCSI_RX_CQ_CONS]\n", - le16toh(dsb->u_def_status_block.index_values[HC_INDEX_DEF_U_ETH_ISCSI_RX_CQ_CONS])); + le16toh(def_sb->u_def_status_block.index_values[HC_INDEX_DEF_U_ETH_ISCSI_RX_CQ_CONS])); BXE_PRINTF( " 0x%04X - USTORM [ETH_RDMA_RX_BD_CONS]\n", - le16toh(dsb->u_def_status_block.index_values[HC_INDEX_DEF_U_ETH_RDMA_RX_BD_CONS])); + le16toh(def_sb->u_def_status_block.index_values[HC_INDEX_DEF_U_ETH_RDMA_RX_BD_CONS])); BXE_PRINTF( " 0x%04X - USTORM [ETH_ISCSI_RX_BD_CONS]\n", - le16toh(dsb->u_def_status_block.index_values[HC_INDEX_DEF_U_ETH_ISCSI_RX_BD_CONS])); + le16toh(def_sb->u_def_status_block.index_values[HC_INDEX_DEF_U_ETH_ISCSI_RX_BD_CONS])); /* Print the CSTORM fields (HC_CSTORM_DEF_SB_NUM_INDICES). */ BXE_PRINTF( " 0x%02X - CSTORM Status Block ID\n", - dsb->c_def_status_block.status_block_id); + def_sb->c_def_status_block.status_block_id); BXE_PRINTF( " 0x%04X - CSTORM Status Block Index\n", - le16toh(dsb->c_def_status_block.status_block_index)); + le16toh(def_sb->c_def_status_block.status_block_index)); BXE_PRINTF( " 0x%04X - CSTORM [RDMA_EQ_CONS]\n", - le16toh(dsb->c_def_status_block.index_values[HC_INDEX_DEF_C_RDMA_EQ_CONS])); + le16toh(def_sb->c_def_status_block.index_values[HC_INDEX_DEF_C_RDMA_EQ_CONS])); BXE_PRINTF( " 0x%04X - CSTORM [RDMA_NAL_PROD]\n", - le16toh(dsb->c_def_status_block.index_values[HC_INDEX_DEF_C_RDMA_NAL_PROD])); + le16toh(def_sb->c_def_status_block.index_values[HC_INDEX_DEF_C_RDMA_NAL_PROD])); BXE_PRINTF( " 0x%04X - CSTORM [ETH_FW_TX_CQ_CONS]\n", - le16toh(dsb->c_def_status_block.index_values[HC_INDEX_DEF_C_ETH_FW_TX_CQ_CONS])); + le16toh(def_sb->c_def_status_block.index_values[HC_INDEX_DEF_C_ETH_FW_TX_CQ_CONS])); BXE_PRINTF( " 0x%04X - CSTORM [ETH_SLOW_PATH]\n", - le16toh(dsb->c_def_status_block.index_values[HC_INDEX_DEF_C_ETH_SLOW_PATH])); + le16toh(def_sb->c_def_status_block.index_values[HC_INDEX_DEF_C_ETH_SLOW_PATH])); BXE_PRINTF( " 0x%04X - CSTORM [ETH_RDMA_CQ_CONS]\n", - le16toh(dsb->c_def_status_block.index_values[HC_INDEX_DEF_C_ETH_RDMA_CQ_CONS])); + le16toh(def_sb->c_def_status_block.index_values[HC_INDEX_DEF_C_ETH_RDMA_CQ_CONS])); BXE_PRINTF( " 0x%04X - CSTORM [ETH_ISCSI_CQ_CONS]\n", - le16toh(dsb->c_def_status_block.index_values[HC_INDEX_DEF_C_ETH_ISCSI_CQ_CONS])); + le16toh(def_sb->c_def_status_block.index_values[HC_INDEX_DEF_C_ETH_ISCSI_CQ_CONS])); BXE_PRINTF( " 0x%04X - CSTORM [UNUSED]\n", - le16toh(dsb->c_def_status_block.index_values[6])); + le16toh(def_sb->c_def_status_block.index_values[6])); BXE_PRINTF( " 0x%04X - CSTORM [UNUSED]\n", - le16toh(dsb->c_def_status_block.index_values[7])); + le16toh(def_sb->c_def_status_block.index_values[7])); /* Print the TSTORM fields (HC_TSTORM_DEF_SB_NUM_INDICES). */ BXE_PRINTF( " 0x%02X - TSTORM Status Block ID\n", - dsb->t_def_status_block.status_block_id); + def_sb->t_def_status_block.status_block_id); BXE_PRINTF( " 0x%04X - TSTORM Status Block Index\n", - le16toh(dsb->t_def_status_block.status_block_index)); + le16toh(def_sb->t_def_status_block.status_block_index)); for (i = 0; i < HC_TSTORM_DEF_SB_NUM_INDICES; i++) BXE_PRINTF( " 0x%04X - TSTORM [UNUSED]\n", - le16toh(dsb->t_def_status_block.index_values[i])); + le16toh(def_sb->t_def_status_block.index_values[i])); /* Print the XSTORM fields (HC_XSTORM_DEF_SB_NUM_INDICES). */ BXE_PRINTF( " 0x%02X - XSTORM Status Block ID\n", - dsb->x_def_status_block.status_block_id); + def_sb->x_def_status_block.status_block_id); BXE_PRINTF( " 0x%04X - XSTORM Status Block Index\n", - le16toh(dsb->x_def_status_block.status_block_index)); + le16toh(def_sb->x_def_status_block.status_block_index)); for (i = 0; i < HC_XSTORM_DEF_SB_NUM_INDICES; i++) BXE_PRINTF( " 0x%04X - XSTORM [UNUSED]\n", - le16toh(dsb->x_def_status_block.index_values[i])); + le16toh(def_sb->x_def_status_block.index_values[i])); BXE_PRINTF( "----------------------------" @@ -17459,7 +16920,7 @@ void bxe_dump_status_block(struct bxe_softc *sc) * Returns: * Nothing. */ -static __attribute__ ((noinline)) +static __noinline void bxe_dump_stats_block(struct bxe_softc *sc) { @@ -17471,7 +16932,7 @@ void bxe_dump_stats_block(struct bxe_softc *sc) * Returns: * Nothing. */ -static __attribute__ ((noinline)) +static __noinline void bxe_dump_fp_state(struct bxe_fastpath *fp) { struct bxe_softc *sc; @@ -17501,9 +16962,6 @@ void bxe_dump_fp_state(struct bxe_fastpath *fp) /* Receive state. */ BXE_PRINTF( - " 0x%04X - (fp[%02d]->free_rx_bd)\n", - fp->free_rx_bd, fp->index); - BXE_PRINTF( " 0x%04X - (fp[%02d]->rx_bd_prod)\n", fp->rx_bd_prod, fp->index); BXE_PRINTF( @@ -17525,13 +16983,13 @@ void bxe_dump_fp_state(struct bxe_fastpath *fp) " %16lu - (fp[%02d]->ipackets)\n", fp->ipackets, fp->index); BXE_PRINTF( - " %16lu - (fp[%02d]->soft_rx_errors)\n", - fp->soft_rx_errors, fp->index); + " %16lu - (fp[%02d]->rx_soft_errors)\n", + fp->rx_soft_errors, fp->index); /* Transmit state. */ BXE_PRINTF( - " 0x%04X - (fp[%02d]->used_tx_bd)\n", - fp->used_tx_bd, fp->index); + " 0x%04X - (fp[%02d]->tx_bd_used)\n", + fp->tx_bd_used, fp->index); BXE_PRINTF( " 0x%04X - (fp[%02d]->tx_bd_prod)\n", fp->tx_bd_prod, fp->index); @@ -17554,14 +17012,14 @@ void bxe_dump_fp_state(struct bxe_fastpath *fp) " %16lu - (fp[%02d]->opackets)\n", fp->opackets, fp->index); BXE_PRINTF( - " %16lu - (fp[%02d]->soft_tx_errors)\n", - fp->soft_tx_errors, fp->index); + " %16lu - (fp[%02d]->tx_soft_errors)\n", + fp->tx_soft_errors, fp->index); /* TPA state. */ if (TPA_ENABLED(sc)) { BXE_PRINTF( - " %16lu - (fp[%02d]->tpa_pkts)\n", - fp->tpa_pkts, fp->index); + " %16lu - (fp[%02d]->rx_tpa_pkts)\n", + fp->rx_tpa_pkts, fp->index); BXE_PRINTF( " 0x%08X - (fp[%02d]->tpa_mbuf_alloc)\n", fp->tpa_mbuf_alloc, fp->index); @@ -17592,7 +17050,7 @@ void bxe_dump_fp_state(struct bxe_fastpath *fp) * Returns: * Nothing. */ -static __attribute__ ((noinline)) +static __noinline void bxe_dump_port_state_locked(struct bxe_softc *sc) { @@ -17622,7 +17080,7 @@ void bxe_dump_port_state_locked(struct bxe_softc *sc) * Returns: * Nothing. */ -static __attribute__ ((noinline)) +static __noinline void bxe_dump_link_vars_state_locked(struct bxe_softc *sc) { BXE_PRINTF( @@ -17685,7 +17143,7 @@ void bxe_dump_link_vars_state_locked(struct bxe_softc *sc) * Returns: * Nothing. */ -static __attribute__ ((noinline)) +static __noinline void bxe_dump_link_params_state_locked(struct bxe_softc *sc) { BXE_PRINTF( @@ -17739,7 +17197,7 @@ void bxe_dump_link_params_state_locked(struct bxe_softc *sc) * Returns: * Nothing. */ -static __attribute__ ((noinline)) +static __noinline void bxe_dump_driver_state(struct bxe_softc *sc) { uint32_t val_hi, val_lo; @@ -17773,12 +17231,10 @@ void bxe_dump_driver_state(struct bxe_softc *sc) sc->rx_lane_swap); BXE_PRINTF(" 0x%08X - (sc->tx_lane_swap) TX XAUI lane swap\n", sc->tx_lane_swap); - BXE_PRINTF(" %16lu - (sc->debug_mbuf_sim_alloc_failed)\n", - sc->debug_mbuf_sim_alloc_failed); - BXE_PRINTF(" %16lu - (sc->debug_mbuf_sim_map_failed)\n", - sc->debug_mbuf_sim_map_failed); - BXE_PRINTF(" %16lu - (sc->debug_memory_allocated)\n", - sc->debug_memory_allocated); + BXE_PRINTF(" %16lu - (sc->debug_sim_mbuf_alloc_failed)\n", + sc->debug_sim_mbuf_alloc_failed); + BXE_PRINTF(" %16lu - (sc->debug_sim_mbuf_map_failed)\n", + sc->debug_sim_mbuf_map_failed); BXE_PRINTF( "----------------------------" @@ -17791,44 +17247,39 @@ void bxe_dump_driver_state(struct bxe_softc *sc) } /* - * Dump bootcode debug buffer to the console. + * Dump bootcode (MCP) debug buffer to the console. * * Returns: * None */ -static __attribute__ ((noinline)) +static __noinline void bxe_dump_fw(struct bxe_softc *sc) { - uint32_t data[9], mark, offset; - int word; + uint32_t addr, mark, data[9], offset; + int word; - mark = REG_RD(sc, MCP_REG_MCPR_SCRATCH + 0xf104); - mark = ((mark + 0x3) & ~0x3); + addr = sc->common.shmem_base - 0x0800 + 4; + mark = REG_RD(sc, addr); + mark = MCP_REG_MCPR_SCRATCH + ((mark + 0x3) & ~0x3) - 0x08000000; BXE_PRINTF( - "----------------------------" - " Bootcode State " - "----------------------------\n"); - BXE_PRINTF("Begin MCP bootcode dump (mark = 0x%08X)\n", mark); - BXE_PRINTF( - "----------------------------" - "----------------" - "----------------------------\n"); + "---------------------------" + " MCP Debug Buffer " + "---------------------------\n"); - for (offset = mark - 0x08000000; offset <= 0xF900; + /* Read from "mark" to the end of the buffer. */ + for (offset = mark; offset <= sc->common.shmem_base; offset += (0x8 * 4)) { for (word = 0; word < 8; word++) - data[word] = htonl(REG_RD(sc, MCP_REG_MCPR_SCRATCH + - offset + 4 * word)); + data[word] = htonl(REG_RD(sc, offset + 4 * word)); data[8] = 0x0; printf("%s", (char *) data); } - for (offset = 0xF108; offset <= mark - 0x08000000; - offset += (0x8 * 4)) { + /* Read from the start of the buffer to "mark". */ + for (offset = addr + 4; offset <= mark; offset += (0x8 * 4)) { for (word = 0; word < 8; word++) - data[word] = htonl(REG_RD(sc, MCP_REG_MCPR_SCRATCH + - offset + 4 * word)); + data[word] = htonl(REG_RD(sc, offset + 4 * word)); data[8] = 0x0; printf("%s", (char *) data); } @@ -18129,26 +17580,9 @@ bxe_breakpoint(struct bxe_softc *sc) bxe_dump_fp_state(&sc->fp[i]); bxe_dump_status_block(sc); + bxe_dump_fw(sc); /* Call the OS debugger. */ breakpoint(); } #endif - -/* - * - * Returns: - * Nothing. - */ -static void -bxe_gunzip_end(struct bxe_softc *sc) -{ - free(sc->strm, M_DEVBUF); - sc->strm = NULL; - - if (sc->gunzip_buf) { - bxe_dmamem_free(sc, sc->gunzip_tag, sc->gunzip_buf, - sc->gunzip_map); - sc->gunzip_buf = NULL; - } -} diff --git a/sys/dev/bxe/if_bxe.h b/sys/dev/bxe/if_bxe.h index 8da3db4..a5af0bd 100644 --- a/sys/dev/bxe/if_bxe.h +++ b/sys/dev/bxe/if_bxe.h @@ -251,20 +251,22 @@ struct bxe_type { #define SGE_PAGE_SHIFT PAGE_SHIFT #define SGE_PAGE_ALIGN(addr) PAGE_ALIGN(addr) -/* SGE ring related macros */ +/* NUM_RX_SGE_PAGES must be a power of 2. */ #define NUM_RX_SGE_PAGES 2 -#define RX_SGE_CNT (BCM_PAGE_SIZE / sizeof(struct eth_rx_sge)) -#define MAX_RX_SGE_CNT (RX_SGE_CNT - 2) +#define TOTAL_RX_SGE_PER_PAGE (BCM_PAGE_SIZE / sizeof(struct eth_rx_sge)) /* 512 */ +#define USABLE_RX_SGE_PER_PAGE (TOTAL_RX_SGE_PER_PAGE - 2) /* 510 */ +#define RX_SGE_PER_PAGE_MASK (TOTAL_RX_SGE_PER_PAGE - 1) /* 511 */ +#define TOTAL_RX_SGE (TOTAL_RX_SGE_PER_PAGE * NUM_RX_SGE_PAGES) /* 1024 */ +#define USABLE_RX_SGE (USABLE_RX_SGE_PER_PAGE * NUM_RX_SGE_PAGES) /* 1020 */ +#define MAX_RX_SGE (TOTAL_RX_SGE - 1) /* 1023 */ + -/* RX_SGE_CNT is required to be a power of 2 */ -#define RX_SGE_MASK (RX_SGE_CNT - 1) -#define TOTAL_RX_SGE (RX_SGE_CNT * NUM_RX_SGE_PAGES) -#define MAX_RX_SGE (TOTAL_RX_SGE - 1) #define NEXT_SGE_IDX(x) \ - ((((x) & RX_SGE_MASK) == (MAX_RX_SGE_CNT - 1)) ? (x) + 3 : (x) + 1) + ((((x) & RX_SGE_PER_PAGE_MASK) == (USABLE_RX_SGE_PER_PAGE - 1)) \ + ? (x) + 3 : (x) + 1) #define RX_SGE(x) ((x) & MAX_RX_SGE) -#define RX_SGE_PAGE(x) (((x) & ~RX_SGE_MASK) >> 9) -#define RX_SGE_IDX(x) ((x) & RX_SGE_MASK) +#define RX_SGE_PAGE(x) (((x) & ~RX_SGE_PER_PAGE_MASK) >> 9) +#define RX_SGE_IDX(x) ((x) & RX_SGE_PER_PAGE_MASK) /* SGE producer mask related macros. */ /* Number of bits in one sge_mask array element. */ @@ -282,23 +284,23 @@ struct bxe_type { /* Number of uint64_t elements in SGE mask array. */ #define RX_SGE_MASK_LEN \ - ((NUM_RX_SGE_PAGES * RX_SGE_CNT) / RX_SGE_MASK_ELEM_SZ) + ((NUM_RX_SGE_PAGES * TOTAL_RX_SGE_PER_PAGE) / RX_SGE_MASK_ELEM_SZ) #define RX_SGE_MASK_LEN_MASK (RX_SGE_MASK_LEN - 1) #define NEXT_SGE_MASK_ELEM(el) (((el) + 1) & RX_SGE_MASK_LEN_MASK) + /* * Transmit Buffer Descriptor (tx_bd) definitions* */ -/* ToDo: Tune this value based on multi-queue/RSS enable/disable. */ -#define NUM_TX_PAGES 2 +/* NUM_TX_PAGES must be a power of 2. */ +#define NUM_TX_PAGES 1 +#define TOTAL_TX_BD_PER_PAGE (BCM_PAGE_SIZE / sizeof(union eth_tx_bd_types)) /* 256 */ +#define USABLE_TX_BD_PER_PAGE (TOTAL_TX_BD_PER_PAGE - 1) /* 255 */ +#define TOTAL_TX_BD (TOTAL_TX_BD_PER_PAGE * NUM_TX_PAGES) /* 512 */ +#define USABLE_TX_BD (USABLE_TX_BD_PER_PAGE * NUM_TX_PAGES) /* 510 */ +#define MAX_TX_BD (TOTAL_TX_BD - 1) /* 511 */ -#define TOTAL_TX_BD_PER_PAGE (BCM_PAGE_SIZE / sizeof(union eth_tx_bd_types)) -#define USABLE_TX_BD_PER_PAGE (TOTAL_TX_BD_PER_PAGE - 1) -#define TOTAL_TX_BD (TOTAL_TX_BD_PER_PAGE * NUM_TX_PAGES) -#define USABLE_TX_BD (USABLE_TX_BD_PER_PAGE * NUM_TX_PAGES) -#define MAX_TX_AVAIL (USABLE_TX_BD_PER_PAGE * NUM_TX_PAGES - 2) -#define MAX_TX_BD (TOTAL_TX_BD - 1) #define NEXT_TX_BD(x) \ ((((x) & USABLE_TX_BD_PER_PAGE) == \ (USABLE_TX_BD_PER_PAGE - 1)) ? (x) + 2 : (x) + 1) @@ -309,55 +311,33 @@ struct bxe_type { /* * Receive Buffer Descriptor (rx_bd) definitions* */ -#define NUM_RX_PAGES 2 - -/* 512 (0x200) of 8 byte bds in 4096 byte page. */ -#define TOTAL_RX_BD_PER_PAGE (BCM_PAGE_SIZE / sizeof(struct eth_rx_bd)) - -/* 510 (0x1fe) = 512 - 2 */ -#define USABLE_RX_BD_PER_PAGE (TOTAL_RX_BD_PER_PAGE - 2) - -/* 1024 (0x400) */ -#define TOTAL_RX_BD (TOTAL_RX_BD_PER_PAGE * NUM_RX_PAGES) -/* 1020 (0x3fc) = 1024 - 4 */ -#define USABLE_RX_BD (USABLE_RX_BD_PER_PAGE * NUM_RX_PAGES) - -/* 1023 (0x3ff) = 1024 -1 */ -#define MAX_RX_BD (TOTAL_RX_BD - 1) - -/* 511 (0x1ff) = 512 - 1 */ -#define RX_DESC_MASK (TOTAL_RX_BD_PER_PAGE - 1) +/* NUM_RX_PAGES must be a power of 2. */ +#define NUM_RX_PAGES 1 +#define TOTAL_RX_BD_PER_PAGE (BCM_PAGE_SIZE / sizeof(struct eth_rx_bd)) /* 512 */ +#define USABLE_RX_BD_PER_PAGE (TOTAL_RX_BD_PER_PAGE - 2) /* 510 */ +#define RX_BD_PER_PAGE_MASK (TOTAL_RX_BD_PER_PAGE - 1) /* 511 */ +#define TOTAL_RX_BD (TOTAL_RX_BD_PER_PAGE * NUM_RX_PAGES) /* 1024 */ +#define USABLE_RX_BD (USABLE_RX_BD_PER_PAGE * NUM_RX_PAGES) /* 1020 */ +#define MAX_RX_BD (TOTAL_RX_BD - 1) /* 1023 */ #define NEXT_RX_BD(x) \ - ((((x) & RX_DESC_MASK) == \ + ((((x) & RX_BD_PER_PAGE_MASK) == \ (USABLE_RX_BD_PER_PAGE - 1)) ? (x) + 3 : (x) + 1) /* x & 0x3ff */ #define RX_BD(x) ((x) & MAX_RX_BD) -#define RX_PAGE(x) (((x) & ~RX_DESC_MASK) >> 9) -#define RX_IDX(x) ((x) & RX_DESC_MASK) +#define RX_PAGE(x) (((x) & ~RX_BD_PER_PAGE_MASK) >> 9) +#define RX_IDX(x) ((x) & RX_BD_PER_PAGE_MASK) /* * Receive Completion Queue definitions* */ - -/* CQEs (32 bytes) are 4 times larger than rx_bd's (8 bytes). */ #define NUM_RCQ_PAGES (NUM_RX_PAGES * 4) - -/* 128 (0x80) */ -#define TOTAL_RCQ_ENTRIES_PER_PAGE (BCM_PAGE_SIZE / sizeof(union eth_rx_cqe)) - -/* 127 (0x7f)for the next page RCQ bd */ -#define USABLE_RCQ_ENTRIES_PER_PAGE (TOTAL_RCQ_ENTRIES_PER_PAGE - 1) - -/* 1024 (0x400) */ -#define TOTAL_RCQ_ENTRIES (TOTAL_RCQ_ENTRIES_PER_PAGE * NUM_RCQ_PAGES) - -/* 1016 (0x3f8) */ -#define USABLE_RCQ_ENTRIES (USABLE_RCQ_ENTRIES_PER_PAGE * NUM_RCQ_PAGES) - -/* 1023 (0x3ff) */ -#define MAX_RCQ_ENTRIES (TOTAL_RCQ_ENTRIES - 1) +#define TOTAL_RCQ_ENTRIES_PER_PAGE (BCM_PAGE_SIZE / sizeof(union eth_rx_cqe)) /* 128 */ +#define USABLE_RCQ_ENTRIES_PER_PAGE (TOTAL_RCQ_ENTRIES_PER_PAGE - 1) /* 127 */ +#define TOTAL_RCQ_ENTRIES (TOTAL_RCQ_ENTRIES_PER_PAGE * NUM_RCQ_PAGES) /* 1024 */ +#define USABLE_RCQ_ENTRIES (USABLE_RCQ_ENTRIES_PER_PAGE * NUM_RCQ_PAGES) /* 1016 */ +#define MAX_RCQ_ENTRIES (TOTAL_RCQ_ENTRIES - 1) /* 1023 */ #define NEXT_RCQ_IDX(x) \ ((((x) & USABLE_RCQ_ENTRIES_PER_PAGE) == \ @@ -383,11 +363,11 @@ struct bxe_type { } while (0) #define SGE_MASK_SET_BIT(fp, idx) \ - __SGE_MASK_SET_BIT(fp->sge_mask[(idx) >> RX_SGE_MASK_ELEM_SHIFT], \ + __SGE_MASK_SET_BIT(fp->rx_sge_mask[(idx) >> RX_SGE_MASK_ELEM_SHIFT], \ ((idx) & RX_SGE_MASK_ELEM_MASK)) #define SGE_MASK_CLEAR_BIT(fp, idx) \ - __SGE_MASK_CLEAR_BIT(fp->sge_mask[(idx) >> RX_SGE_MASK_ELEM_SHIFT], \ + __SGE_MASK_CLEAR_BIT(fp->rx_sge_mask[(idx) >> RX_SGE_MASK_ELEM_SHIFT], \ ((idx) & RX_SGE_MASK_ELEM_MASK)) #define BXE_TX_TIMEOUT 5 @@ -418,14 +398,14 @@ struct bxe_type { * IFCAP_TSO6, IFCAP_WOL_UCAST. */ #if __FreeBSD_version < 700000 -#define BXE_IF_CAPABILITIES \ +#define BXE_IF_CAPABILITIES \ (IFCAP_VLAN_MTU | IFCAP_VLAN_HWTAGGING | IFCAP_HWCSUM | \ IFCAP_JUMBO_MTU) #else - /* TSO was introduced in FreeBSD 7 */ -#define BXE_IF_CAPABILITIES \ + /* TSO/LRO was introduced in FreeBSD 7 */ +#define BXE_IF_CAPABILITIES \ (IFCAP_VLAN_MTU | IFCAP_VLAN_HWTAGGING | IFCAP_HWCSUM | \ - IFCAP_JUMBO_MTU | IFCAP_TSO4 | IFCAP_VLAN_HWCSUM) + IFCAP_JUMBO_MTU | IFCAP_TSO4 | IFCAP_VLAN_HWCSUM | IFCAP_LRO) #endif /* Some typical Ethernet frame sizes */ @@ -449,6 +429,10 @@ struct bxe_type { /* Resolution of the rate shaping timer - 100 usec */ #define RS_PERIODIC_TIMEOUT_USEC 100 +#define BXE_MBUF_ALLOC_RETRY_COUNT 10 +#define BXE_MBUF_MAPPING_RETRY_COUNT 10 +#define BXE_MBUF_RETRY_DELAY 100 + /* * Resolution of fairness algorithm, in usecs. * Coefficient for calculating the actual t_fair. @@ -546,7 +530,8 @@ enum bxe_stats_state { STATS_STATE_MAX }; -struct bxe_eth_stats { +/* Statistics for an Ethernet port. */ +struct bxe_port_stats { uint32_t total_bytes_received_hi; uint32_t total_bytes_received_lo; uint32_t total_bytes_transmitted_hi; @@ -567,6 +552,12 @@ struct bxe_eth_stats { uint32_t valid_bytes_received_lo; uint32_t error_bytes_received_hi; uint32_t error_bytes_received_lo; + uint32_t etherstatsoverrsizepkts_hi; + uint32_t etherstatsoverrsizepkts_lo; + uint32_t no_buff_discard_hi; + uint32_t no_buff_discard_lo; + + /* Layout must match struct mac_stx. */ uint32_t rx_stat_ifhcinbadoctets_hi; uint32_t rx_stat_ifhcinbadoctets_lo; uint32_t tx_stat_ifhcoutbadoctets_hi; @@ -643,39 +634,33 @@ struct bxe_eth_stats { uint32_t tx_stat_dot3statsinternalmactransmiterrors_lo; uint32_t tx_stat_bmac_ufl_hi; uint32_t tx_stat_bmac_ufl_lo; - uint32_t brb_drop_hi; - uint32_t brb_drop_lo; - uint32_t brb_truncate_hi; - uint32_t brb_truncate_lo; + /* End of mac_stx. */ + uint32_t pause_frames_received_hi; uint32_t pause_frames_received_lo; uint32_t pause_frames_sent_hi; uint32_t pause_frames_sent_lo; - uint32_t jabber_packets_received; - uint32_t etherstatspkts1024octetsto1522octets_hi; uint32_t etherstatspkts1024octetsto1522octets_lo; uint32_t etherstatspktsover1522octets_hi; uint32_t etherstatspktsover1522octets_lo; - - uint32_t no_buff_discard_hi; - uint32_t no_buff_discard_lo; - + uint32_t brb_drop_hi; + uint32_t brb_drop_lo; + uint32_t brb_truncate_hi; + uint32_t brb_truncate_lo; uint32_t mac_filter_discard; uint32_t xxoverflow_discard; uint32_t brb_truncate_discard; uint32_t mac_discard; - uint32_t driver_xoff; uint32_t rx_err_discard_pkt; uint32_t rx_skb_alloc_failed; uint32_t hw_csum_err; - uint32_t nig_timer_max; }; #define STATS_OFFSET32(stat_name) \ - (offsetof(struct bxe_eth_stats, stat_name) / 4) + (offsetof(struct bxe_port_stats, stat_name) / 4) #define MAX_CONTEXT 16 @@ -841,6 +826,18 @@ struct bxe_port { #define PMF_DMAE_C(sc) \ (BP_PORT(sc) * MAX_DMAE_C_PER_PORT + E1HVN_MAX) + +/* Used to manage DMA allocations. */ +struct bxe_dma { + bus_addr_t paddr; + void *vaddr; + bus_dma_tag_t tag; + bus_dmamap_t map; + bus_dma_segment_t seg; + bus_size_t size; + int nseg; +}; + /* * This is the slowpath data structure. It is mapped into non-paged memory * so that the hardware can access it's contents directly and must be page @@ -884,7 +881,7 @@ struct bxe_slowpath { #define BXE_SP(sc, var) (&sc->slowpath->var) #define BXE_SP_CHECK(sc, var) ((sc->slowpath) ? (&sc->slowpath->var) : NULL) #define BXE_SP_MAPPING(sc, var) \ - (sc->slowpath_paddr + offsetof(struct bxe_slowpath, var)) + (sc->slowpath_dma.paddr + offsetof(struct bxe_slowpath, var)) union db_prod { struct doorbell_set_prod data; @@ -933,51 +930,33 @@ struct bxe_fastpath { struct mtx mtx; char mtx_name[16]; - /* Hardware maintained status block. */ - bus_dma_tag_t status_block_tag; - bus_dmamap_t status_block_map; + /* Status block. */ + struct bxe_dma sb_dma; struct host_status_block *status_block; - bus_addr_t status_block_paddr; -#ifdef notyet - /* - * In this implementation the doorbell data block - * (eth_tx_db_data) is mapped into memory immediately - * following the status block and is part of the same - * memory allocation. - */ - struct eth_tx_db_data *hw_tx_prods; - bus_addr_t tx_prods_paddr; -#endif - /* Hardware maintained TX buffer descriptor chains. */ - bus_dma_tag_t tx_bd_chain_tag; - bus_dmamap_t tx_bd_chain_map[NUM_TX_PAGES]; + /* Transmit chain. */ + struct bxe_dma tx_dma; + union eth_tx_bd_types *tx_chain; + + /* Receive chain. */ + struct bxe_dma rx_dma; + struct eth_rx_bd *rx_chain; - union eth_tx_bd_types *tx_bd_chain[NUM_TX_PAGES]; - bus_addr_t tx_bd_chain_paddr[NUM_TX_PAGES]; + /* Receive completion queue chain. */ + struct bxe_dma rcq_dma; + union eth_rx_cqe *rcq_chain; - /* Bus resource tag for TX mbufs. */ + /* Bus resource tag, map, and mbufs for TX chain. */ bus_dma_tag_t tx_mbuf_tag; bus_dmamap_t tx_mbuf_map[TOTAL_TX_BD]; struct mbuf *tx_mbuf_ptr[TOTAL_TX_BD]; - /* Hardware maintained RX buffer descriptor chains. */ - bus_dma_tag_t rx_bd_chain_tag; - bus_dmamap_t rx_bd_chain_map[NUM_RX_PAGES]; - struct eth_rx_bd *rx_bd_chain[NUM_RX_PAGES]; - bus_addr_t rx_bd_chain_paddr[NUM_RX_PAGES]; - - /* Bus resource tag for RX mbufs. */ + /* Bus resource tag, map, and mbufs for RX chain. */ bus_dma_tag_t rx_mbuf_tag; bus_dmamap_t rx_mbuf_map[TOTAL_RX_BD]; + bus_dmamap_t rx_mbuf_spare_map; struct mbuf *rx_mbuf_ptr[TOTAL_RX_BD]; - /* Hardware maintained Completion Queue (CQ) chains. */ - bus_dma_tag_t rx_cq_chain_tag; - bus_dmamap_t rx_cq_chain_map[NUM_RCQ_PAGES]; - union eth_rx_cqe *rx_cq_chain[NUM_RCQ_PAGES]; - bus_addr_t rx_cq_chain_paddr[NUM_RCQ_PAGES]; - /* Ticks until chip reset. */ int watchdog_timer; @@ -1014,8 +993,6 @@ struct bxe_fastpath { /* Transmit packet producer index (used in eth_tx_bd). */ uint16_t tx_pkt_prod; - - /* Transmit packet consumer index. */ uint16_t tx_pkt_cons; /* Transmit buffer descriptor prod/cons indices. */ @@ -1044,25 +1021,27 @@ struct bxe_fastpath { uint16_t *rx_bd_cons_sb; /* Pointer to the transmit consumer in the status block. */ - uint16_t *tx_cons_sb; + uint16_t *tx_pkt_cons_sb; - /* Free/used buffer descriptor counters. */ - uint16_t used_tx_bd; + /* Used TX buffer descriptor counters. */ + uint16_t tx_bd_used; /* Begin: TPA Related data structure. */ - /* Hardware maintained RX Scatter Gather Entry chains. */ - bus_dma_tag_t rx_sge_chain_tag; - bus_dmamap_t rx_sge_chain_map[NUM_RX_SGE_PAGES]; - struct eth_rx_sge *rx_sge_chain[NUM_RX_SGE_PAGES]; - bus_addr_t rx_sge_chain_paddr[NUM_RX_SGE_PAGES]; + struct bxe_dma sg_dma; + struct eth_rx_sge *sg_chain; /* Bus tag for RX SGE bufs. */ bus_dma_tag_t rx_sge_buf_tag; bus_dmamap_t rx_sge_buf_map[TOTAL_RX_SGE]; + bus_dmamap_t rx_sge_spare_map; struct mbuf *rx_sge_buf_ptr[TOTAL_RX_SGE]; - uint64_t sge_mask[RX_SGE_MASK_LEN]; + /* + * Bitmask for each SGE element indicating which + * aggregation that element is a part of. + */ + uint64_t rx_sge_mask[RX_SGE_MASK_LEN]; uint16_t rx_sge_prod; /* The last maximal completed SGE. */ @@ -1072,6 +1051,7 @@ struct bxe_fastpath { /* Use the larger supported size for TPA queue length. */ bus_dmamap_t tpa_mbuf_map[ETH_MAX_AGGREGATION_QUEUES_E1H]; + bus_dmamap_t tpa_mbuf_spare_map; struct mbuf *tpa_mbuf_ptr[ETH_MAX_AGGREGATION_QUEUES_E1H]; bus_dma_segment_t tpa_mbuf_segs[ETH_MAX_AGGREGATION_QUEUES_E1H]; @@ -1088,21 +1068,46 @@ struct bxe_fastpath { struct xstorm_per_client_stats old_xclient; struct bxe_q_stats eth_q_stats; - uint16_t free_rx_bd; - #if __FreeBSD_version >= 800000 struct buf_ring *br; #endif - /* Recieve/transmit packet counters. */ + /* Receive path driver statistics. */ unsigned long rx_pkts; + unsigned long rx_tpa_pkts; + unsigned long rx_null_cqe_flags; + unsigned long rx_soft_errors; + + /* Transmit path driver statistics. */ unsigned long tx_pkts; - unsigned long tpa_pkts; - unsigned long rx_calls; - unsigned long mbuf_alloc_failed; + unsigned long tx_soft_errors; + unsigned long tx_offload_frames_csum_ip; + unsigned long tx_offload_frames_csum_tcp; + unsigned long tx_offload_frames_csum_udp; + unsigned long tx_offload_frames_tso; + unsigned long tx_header_splits; + unsigned long tx_encap_failures; + unsigned long tx_hw_queue_full; + unsigned long tx_hw_max_queue_depth; + unsigned long tx_dma_mapping_failure; + int tx_max_drbr_queue_depth; + unsigned long tx_window_violation_std; + unsigned long tx_window_violation_tso; + unsigned long tx_unsupported_tso_request_ipv6; + unsigned long tx_unsupported_tso_request_not_tcp; + unsigned long tx_chain_lost_mbuf; + unsigned long tx_frame_deferred; + unsigned long tx_queue_xoff; + + /* Memory path driver statistics. */ unsigned long mbuf_defrag_attempts; unsigned long mbuf_defrag_failures; - unsigned long mbuf_defrag_successes; + unsigned long mbuf_rx_bd_alloc_failed; + unsigned long mbuf_rx_bd_mapping_failed; + unsigned long mbuf_tpa_alloc_failed; + unsigned long mbuf_tpa_mapping_failed; + unsigned long mbuf_sge_alloc_failed; + unsigned long mbuf_sge_mapping_failed; /* Track the number of enqueued mbufs. */ int tx_mbuf_alloc; @@ -1110,29 +1115,9 @@ struct bxe_fastpath { int sge_mbuf_alloc; int tpa_mbuf_alloc; - int max_drbr_queue_depth; - uint64_t tpa_queue_used; - unsigned long null_cqe_flags; - unsigned long offload_frames_csum_ip; - unsigned long offload_frames_csum_tcp; - unsigned long offload_frames_csum_udp; - unsigned long offload_frames_tso; - unsigned long tx_encap_failures; - unsigned long tx_start_called_on_empty_queue; - unsigned long tx_queue_too_full; - unsigned long tx_dma_mapping_failure; - unsigned long window_violation_tso; - unsigned long window_violation_std; - unsigned long unsupported_tso_request_ipv6; - unsigned long unsupported_tso_request_not_tcp; - unsigned long tpa_mbuf_alloc_failed; - unsigned long tx_chain_lost_mbuf; - /* FreeBSD interface statistics. */ - unsigned long soft_rx_errors; - unsigned long soft_tx_errors; unsigned long ipackets; unsigned long opackets; @@ -1144,7 +1129,7 @@ struct bxe_fastpath { #define BXE_STATUS_BLK_SZ \ sizeof(struct host_status_block) /* +sizeof(struct eth_tx_db_data) */ #define BXE_DEF_STATUS_BLK_SZ sizeof(struct host_def_status_block) -#define BXE_STATS_BLK_SZ sizeof(struct bxe_eth_stats) +#define BXE_STATS_BLK_SZ sizeof(struct bxe_port_stats) #define BXE_SLOWPATH_SZ sizeof(struct bxe_slowpath) #define BXE_SPQ_SZ BCM_PAGE_SIZE #define BXE_TX_CHAIN_PAGE_SZ BCM_PAGE_SIZE @@ -1165,14 +1150,13 @@ struct bxe_softc { /* Bus tag for the bxe controller. */ bus_dma_tag_t parent_tag; + /* OS resources for BAR0 memory. */ struct resource *bxe_res; bus_space_tag_t bxe_btag; bus_space_handle_t bxe_bhandle; vm_offset_t bxe_vhandle; - /* OS resources for BAR2 memory. */ - /* OS resources for BAR1 doorbell memory. */ #define BXE_DB_SIZE (16 * 2048) struct resource *bxe_db_res; @@ -1216,7 +1200,6 @@ struct bxe_softc { struct taskqueue *tq; /* RX Driver parameters*/ uint32_t rx_csum; - int rx_buf_size; /* ToDo: Replace with OS specific defintions. */ #define ETH_HLEN 14 @@ -1225,11 +1208,8 @@ struct bxe_softc { #define ETH_MAX_PACKET_SIZE 1500 #define ETH_MAX_JUMBO_PACKET_SIZE 9600 - /* Hardware Maintained Host Default Status Block. */ - bus_dma_tag_t def_status_block_tag; - bus_dmamap_t def_status_block_map; - struct host_def_status_block *def_status_block; - bus_addr_t def_status_block_paddr; + struct bxe_dma def_sb_dma; + struct host_def_status_block *def_sb; #define DEF_SB_ID 16 uint16_t def_c_idx; @@ -1241,23 +1221,15 @@ struct bxe_softc { uint32_t attn_state; struct attn_route attn_group[MAX_DYNAMIC_ATTN_GRPS]; - /* H/W maintained statistics block. */ - bus_dma_tag_t stats_tag; - bus_dmamap_t stats_map; - struct statistics_block *stats_block; - bus_addr_t stats_block_paddr; + struct bxe_dma stats_dma; + struct statistics_block *stats; - /* H/W maintained slow path. */ - bus_dma_tag_t slowpath_tag; - bus_dmamap_t slowpath_map; + struct bxe_dma slowpath_dma; struct bxe_slowpath *slowpath; - bus_addr_t slowpath_paddr; - /* Slow path ring. */ - bus_dma_tag_t spq_tag; - bus_dmamap_t spq_map; + struct bxe_dma spq_dma; struct eth_spe *spq; - bus_addr_t spq_paddr; + uint16_t spq_prod_idx; struct eth_spe *spq_prod_bd; struct eth_spe *spq_last_bd; @@ -1273,17 +1245,15 @@ struct bxe_softc { /* Device flags. */ uint32_t bxe_flags; -#define BXE_ONE_PORT_FLAG 0x00000004 -#define BXE_NO_WOL_FLAG 0x00000008 -#define BXE_USING_DAC_FLAG 0x00000010 -#define BXE_USING_MSIX_FLAG 0x00000020 -#define BXE_USING_MSI_FLAG 0x00000040 -#define BXE_TPA_ENABLE_FLAG 0x00000080 -#define BXE_NO_MCP_FLAG 0x00000100 -#define BP_NOMCP(sc) (sc->bxe_flags & BXE_NO_MCP_FLAG) -#define BXE_SAFC_TX_FLAG 0x00000200 +#define BXE_ONE_PORT_FLAG 0x00000001 +#define BXE_NO_WOL_FLAG 0x00000002 +#define BXE_USING_DAC_FLAG 0x00000004 +#define BXE_TPA_ENABLE_FLAG 0x00000008 +#define BXE_NO_MCP_FLAG 0x00000010 #define TPA_ENABLED(sc) (sc->bxe_flags & BXE_TPA_ENABLE_FLAG) +#define NOMCP(sc) (sc->bxe_flags & BXE_NO_MCP_FLAG) + /* PCI Express function number for the device. */ int bxe_func; @@ -1386,8 +1356,6 @@ struct bxe_softc { int mrrs; int dcc_enable; -#define BXE_NUM_QUEUES(cos) \ - ((bxe_qs_per_cos & (0xff << (cos * 8))) >> (cos * 8)) #define BXE_MAX_QUEUES(sc) \ (IS_E1HMF(sc) ? (MAX_CONTEXT / E1HVN_MAX) : MAX_CONTEXT) @@ -1396,18 +1364,6 @@ struct bxe_softc { #define BXE_MAX_PRIORITY 8 #define BXE_MAX_ENTRIES_PER_PRI 16 - /* Number of queues per class of service. */ - uint8_t qs_per_cos[BXE_MAX_COS]; - - /* Priority to class of service mapping. */ - uint8_t pri_map[BXE_MAX_PRIORITY]; - - /* min rate per cos */ - uint16_t cos_min_rate[BXE_MAX_COS]; - - /* Class of service to queue mapping. */ - uint8_t cos_map[BXE_MAX_COS]; - /* Used for multiple function devices. */ uint32_t mf_config[E1HVN_MAX]; @@ -1449,15 +1405,13 @@ struct bxe_softc { /* Statistics. */ uint16_t stats_counter; - struct bxe_eth_stats eth_stats; + struct bxe_port_stats eth_stats; + /* Support for DMAE and compressed firmware. */ z_streamp strm; - bus_dma_tag_t gunzip_tag; - bus_dmamap_t gunzip_map; - void *gunzip_buf; - bus_addr_t gunzip_mapping; - int gunzip_outlen; -#define FW_BUF_SIZE 0x40000 + struct bxe_dma gz_dma; + void *gz; +#define BXE_FW_BUF_SIZE 0x40000 struct raw_op *init_ops; /* Init blocks offsets inside init_ops */ @@ -1500,10 +1454,9 @@ struct bxe_softc { uint8_t intr_sem; #ifdef BXE_DEBUG - unsigned long debug_mbuf_sim_alloc_failed; - unsigned long debug_mbuf_sim_map_failed; + unsigned long debug_sim_mbuf_alloc_failed; + unsigned long debug_sim_mbuf_map_failed; unsigned long debug_received_frame_error; - unsigned long debug_memory_allocated; /* A buffer for hardware/firmware state information (grcdump). */ uint32_t *grcdump_buffer; @@ -1763,7 +1716,7 @@ struct bxe_softc { (&fp->status_block->c_status_block.index_values[C_SB_ETH_TX_CQ_INDEX]) #define BXE_SP_DSB_INDEX \ - &sc->def_status_block->c_def_status_block.index_values[C_DEF_SB_SP_INDEX] + &sc->def_sb->c_def_status_block.index_values[C_DEF_SB_SP_INDEX] #define BXE_RX_SB_INDEX_NUM \ (((U_SB_ETH_RX_CQ_INDEX << \ diff --git a/sys/dev/cxgbe/adapter.h b/sys/dev/cxgbe/adapter.h index 0b33b67..8624fc1 100644 --- a/sys/dev/cxgbe/adapter.h +++ b/sys/dev/cxgbe/adapter.h @@ -297,7 +297,7 @@ struct sge_eq { uint16_t pidx; /* producer idx (desc idx) */ uint16_t pending; /* # of descriptors used since last doorbell */ uint16_t iqid; /* iq that gets egr_update for the eq */ - uint32_t cntxt_id; /* SGE context id for the eq */ + unsigned int cntxt_id; /* SGE context id for the eq */ }; struct sge_fl { diff --git a/sys/dev/cxgbe/t4_ioctl.h b/sys/dev/cxgbe/t4_ioctl.h index a0b489f..ecc2c3d 100644 --- a/sys/dev/cxgbe/t4_ioctl.h +++ b/sys/dev/cxgbe/t4_ioctl.h @@ -46,6 +46,7 @@ enum { T4_GET_FILTER, /* get information about a filter */ T4_SET_FILTER, /* program a filter */ T4_DEL_FILTER, /* delete a filter */ + T4_GET_SGE_CONTEXT, /* get SGE context for a queue */ }; struct t4_reg { @@ -184,6 +185,20 @@ struct t4_filter { struct t4_filter_specification fs; }; +#define T4_SGE_CONTEXT_SIZE 24 +enum { + SGE_CONTEXT_EGRESS, + SGE_CONTEXT_INGRESS, + SGE_CONTEXT_FLM, + SGE_CONTEXT_CNM +}; + +struct t4_sge_context { + uint32_t mem_id; + uint32_t cid; + uint32_t data[T4_SGE_CONTEXT_SIZE / 4]; +}; + #define CHELSIO_T4_GETREG _IOWR('f', T4_GETREG, struct t4_reg) #define CHELSIO_T4_SETREG _IOW('f', T4_SETREG, struct t4_reg) #define CHELSIO_T4_REGDUMP _IOWR('f', T4_REGDUMP, struct t4_regdump) @@ -192,4 +207,6 @@ struct t4_filter { #define CHELSIO_T4_GET_FILTER _IOWR('f', T4_GET_FILTER, struct t4_filter) #define CHELSIO_T4_SET_FILTER _IOW('f', T4_SET_FILTER, struct t4_filter) #define CHELSIO_T4_DEL_FILTER _IOW('f', T4_DEL_FILTER, struct t4_filter) +#define CHELSIO_T4_GET_SGE_CONTEXT _IOWR('f', T4_GET_SGE_CONTEXT, \ + struct t4_sge_context) #endif diff --git a/sys/dev/cxgbe/t4_main.c b/sys/dev/cxgbe/t4_main.c index 90e5001..18b813d 100644 --- a/sys/dev/cxgbe/t4_main.c +++ b/sys/dev/cxgbe/t4_main.c @@ -313,6 +313,7 @@ static void clear_filter(struct filter_entry *); static int set_filter_wr(struct adapter *, int); static int del_filter_wr(struct adapter *, int); void filter_rpl(struct adapter *, const struct cpl_set_tcb_rpl *); +static int get_sge_context(struct adapter *, struct t4_sge_context *); static int t4_mod_event(module_t, int, void *); struct t4_pciids { @@ -3417,6 +3418,35 @@ filter_rpl(struct adapter *sc, const struct cpl_set_tcb_rpl *rpl) } } +static int +get_sge_context(struct adapter *sc, struct t4_sge_context *cntxt) +{ + int rc = EINVAL; + + if (cntxt->cid > M_CTXTQID) + return (rc); + + if (cntxt->mem_id != CTXT_EGRESS && cntxt->mem_id != CTXT_INGRESS && + cntxt->mem_id != CTXT_FLM && cntxt->mem_id != CTXT_CNM) + return (rc); + + if (sc->flags & FW_OK) { + ADAPTER_LOCK(sc); /* Avoid parallel t4_wr_mbox */ + rc = -t4_sge_ctxt_rd(sc, sc->mbox, cntxt->cid, cntxt->mem_id, + &cntxt->data[0]); + ADAPTER_UNLOCK(sc); + } + + if (rc != 0) { + /* Read via firmware failed or wasn't even attempted */ + + rc = -t4_sge_ctxt_rd_bd(sc, cntxt->cid, cntxt->mem_id, + &cntxt->data[0]); + } + + return (rc); +} + int t4_os_find_pci_capability(struct adapter *sc, int cap) { @@ -3580,6 +3610,9 @@ t4_ioctl(struct cdev *dev, unsigned long cmd, caddr_t data, int fflag, rc = del_filter(sc, (struct t4_filter *)data); ADAPTER_UNLOCK(sc); break; + case CHELSIO_T4_GET_SGE_CONTEXT: + rc = get_sge_context(sc, (struct t4_sge_context *)data); + break; default: rc = EINVAL; } diff --git a/sys/dev/cxgbe/t4_sge.c b/sys/dev/cxgbe/t4_sge.c index b3e3567..b676799 100644 --- a/sys/dev/cxgbe/t4_sge.c +++ b/sys/dev/cxgbe/t4_sge.c @@ -1368,6 +1368,12 @@ alloc_fwq(struct adapter *sc, int intr_idx) children = SYSCTL_CHILDREN(sc->oid_fwq); + SYSCTL_ADD_PROC(&sc->ctx, children, OID_AUTO, "abs_id", + CTLTYPE_INT | CTLFLAG_RD, &fwq->abs_id, 0, sysctl_uint16, "I", + "absolute id of the queue"); + SYSCTL_ADD_PROC(&sc->ctx, children, OID_AUTO, "cntxt_id", + CTLTYPE_INT | CTLFLAG_RD, &fwq->cntxt_id, 0, sysctl_uint16, "I", + "SGE context id of the queue"); SYSCTL_ADD_PROC(&sc->ctx, children, OID_AUTO, "cidx", CTLTYPE_INT | CTLFLAG_RD, &fwq->cidx, 0, sysctl_uint16, "I", "consumer index"); @@ -1418,6 +1424,12 @@ alloc_rxq(struct port_info *pi, struct sge_rxq *rxq, int intr_idx, int idx) SYSCTL_ADD_PROC(&pi->ctx, children, OID_AUTO, "abs_id", CTLTYPE_INT | CTLFLAG_RD, &rxq->iq.abs_id, 0, sysctl_uint16, "I", "absolute id of the queue"); + SYSCTL_ADD_PROC(&pi->ctx, children, OID_AUTO, "cntxt_id", + CTLTYPE_INT | CTLFLAG_RD, &rxq->iq.cntxt_id, 0, sysctl_uint16, "I", + "SGE context id of the queue"); + SYSCTL_ADD_PROC(&pi->ctx, children, OID_AUTO, "cidx", + CTLTYPE_INT | CTLFLAG_RD, &rxq->iq.cidx, 0, sysctl_uint16, "I", + "consumer index"); #ifdef INET SYSCTL_ADD_INT(&pi->ctx, children, OID_AUTO, "lro_queued", CTLFLAG_RD, &rxq->lro.lro_queued, 0, NULL); @@ -1430,6 +1442,19 @@ alloc_rxq(struct port_info *pi, struct sge_rxq *rxq, int intr_idx, int idx) CTLFLAG_RD, &rxq->vlan_extraction, "# of times hardware extracted 802.1Q tag"); + children = SYSCTL_CHILDREN(oid); + oid = SYSCTL_ADD_NODE(&pi->ctx, children, OID_AUTO, "fl", CTLFLAG_RD, + NULL, "freelist"); + children = SYSCTL_CHILDREN(oid); + + SYSCTL_ADD_PROC(&pi->ctx, children, OID_AUTO, "cntxt_id", + CTLTYPE_INT | CTLFLAG_RD, &rxq->fl.cntxt_id, 0, sysctl_uint16, "I", + "SGE context id of the queue"); + SYSCTL_ADD_UINT(&pi->ctx, children, OID_AUTO, "cidx", CTLFLAG_RD, + &rxq->fl.cidx, 0, "consumer index"); + SYSCTL_ADD_UINT(&pi->ctx, children, OID_AUTO, "pidx", CTLFLAG_RD, + &rxq->fl.pidx, 0, "producer index"); + return (rc); } @@ -1652,6 +1677,15 @@ alloc_txq(struct port_info *pi, struct sge_txq *txq, int idx) NULL, "tx queue"); children = SYSCTL_CHILDREN(oid); + SYSCTL_ADD_UINT(&pi->ctx, children, OID_AUTO, "cntxt_id", CTLFLAG_RD, + &eq->cntxt_id, 0, "SGE context id of the queue"); + SYSCTL_ADD_PROC(&pi->ctx, children, OID_AUTO, "cidx", + CTLTYPE_INT | CTLFLAG_RD, &eq->cidx, 0, sysctl_uint16, "I", + "consumer index"); + SYSCTL_ADD_PROC(&pi->ctx, children, OID_AUTO, "pidx", + CTLTYPE_INT | CTLFLAG_RD, &eq->pidx, 0, sysctl_uint16, "I", + "producer index"); + SYSCTL_ADD_UQUAD(&pi->ctx, children, OID_AUTO, "txcsum", CTLFLAG_RD, &txq->txcsum, "# of times hardware assisted with checksum"); SYSCTL_ADD_UQUAD(&pi->ctx, children, OID_AUTO, "vlan_insertion", diff --git a/sys/dev/iwn/if_iwn.c b/sys/dev/iwn/if_iwn.c index f905311..ab3dec7 100644 --- a/sys/dev/iwn/if_iwn.c +++ b/sys/dev/iwn/if_iwn.c @@ -2105,6 +2105,7 @@ rate2plcp(int rate) static void iwn_newassoc(struct ieee80211_node *ni, int isnew) { +#define RV(v) ((v) & IEEE80211_RATE_VAL) struct ieee80211com *ic = ni->ni_ic; struct iwn_softc *sc = ic->ic_ifp->if_softc; struct iwn_node *wn = (void *)ni; @@ -2118,7 +2119,7 @@ iwn_newassoc(struct ieee80211_node *ni, int isnew) if (IEEE80211_IS_CHAN_HT(ni->ni_chan)) { ridx = ni->ni_rates.rs_nrates - 1; for (i = ni->ni_htrates.rs_nrates - 1; i >= 0; i--) { - plcp = ni->ni_htrates.rs_rates[i] | IWN_RFLAG_MCS; + plcp = RV(ni->ni_htrates.rs_rates[i]) | IWN_RFLAG_MCS; if (IEEE80211_IS_CHAN_HT40(ni->ni_chan)) { plcp |= IWN_RFLAG_HT40; if (ni->ni_htcap & IEEE80211_HTCAP_SHORTGI40) @@ -2130,8 +2131,7 @@ iwn_newassoc(struct ieee80211_node *ni, int isnew) else plcp |= IWN_RFLAG_ANT(txant1); if (ridx >= 0) { - rate = ni->ni_rates.rs_rates[ridx]; - rate &= IEEE80211_RATE_VAL; + rate = RV(ni->ni_rates.rs_rates[ridx]); wn->ridx[rate] = plcp; } wn->ridx[IEEE80211_RATE_MCS | i] = plcp; @@ -2139,8 +2139,7 @@ iwn_newassoc(struct ieee80211_node *ni, int isnew) } } else { for (i = 0; i < ni->ni_rates.rs_nrates; i++) { - rate = ni->ni_rates.rs_rates[i] & IEEE80211_RATE_VAL; - + rate = RV(ni->ni_rates.rs_rates[i]); plcp = rate2plcp(rate); ridx = ic->ic_rt->rateCodeToIndex[rate]; if (ridx < IWN_RIDX_OFDM6 && @@ -2150,6 +2149,7 @@ iwn_newassoc(struct ieee80211_node *ni, int isnew) wn->ridx[rate] = htole32(plcp); } } +#undef RV } static int @@ -3993,6 +3993,7 @@ iwn5000_add_node(struct iwn_softc *sc, struct iwn_node_info *node, int async) static int iwn_set_link_quality(struct iwn_softc *sc, struct ieee80211_node *ni) { +#define RV(v) ((v) & IEEE80211_RATE_VAL) struct iwn_node *wn = (void *)ni; struct ieee80211_rateset *rs = &ni->ni_rates; struct iwn_cmd_link_quality linkq; @@ -4019,11 +4020,11 @@ iwn_set_link_quality(struct iwn_softc *sc, struct ieee80211_node *ni) if (IEEE80211_IS_CHAN_HT(ni->ni_chan)) rate = IEEE80211_RATE_MCS | txrate; else - rate = rs->rs_rates[txrate] & IEEE80211_RATE_VAL; + rate = RV(rs->rs_rates[txrate]); linkq.retry[i] = wn->ridx[rate]; if ((le32toh(wn->ridx[rate]) & IWN_RFLAG_MCS) && - (le32toh(wn->ridx[rate]) & 0xff) > 7) + RV(le32toh(wn->ridx[rate])) > 7) linkq.mimo = i + 1; /* Next retry at immediate lower bit-rate. */ @@ -4031,6 +4032,7 @@ iwn_set_link_quality(struct iwn_softc *sc, struct ieee80211_node *ni) txrate--; } return iwn_cmd(sc, IWN_CMD_LINK_QUALITY, &linkq, sizeof linkq, 1); +#undef RV } /* diff --git a/sys/dev/pci/pci_pci.c b/sys/dev/pci/pci_pci.c index f68973b..da8465c 100644 --- a/sys/dev/pci/pci_pci.c +++ b/sys/dev/pci/pci_pci.c @@ -916,7 +916,8 @@ pcib_grow_window(struct pcib_softc *sc, struct pcib_window *w, int type, /* Move end_free down until it is properly aligned. */ end_free &= ~(align - 1); - front = end_free - count; + end_free--; + front = end_free - (count - 1); /* * The resource would now be allocated at (front, @@ -944,7 +945,7 @@ pcib_grow_window(struct pcib_softc *sc, struct pcib_window *w, int type, /* Move start_free up until it is properly aligned. */ start_free = roundup2(start_free, align); - back = start_free + count; + back = start_free + count - 1; /* * The resource would now be allocated at (start_free, @@ -957,7 +958,7 @@ pcib_grow_window(struct pcib_softc *sc, struct pcib_window *w, int type, if (bootverbose) printf("\tback candidate range: %#lx-%#lx\n", start_free, back); - back = roundup2(back, w->step) - 1; + back = roundup2(back + 1, w->step) - 1; back -= rman_get_end(w->res); } else back = 0; diff --git a/sys/dev/xen/blkback/blkback.c b/sys/dev/xen/blkback/blkback.c index 458149d..8b412cf 100644 --- a/sys/dev/xen/blkback/blkback.c +++ b/sys/dev/xen/blkback/blkback.c @@ -2921,7 +2921,7 @@ xbb_resume(device_t dev) * * \return 0 for success, errno codes for failure. */ -static int +static void xbb_frontend_changed(device_t dev, XenbusState frontend_state) { struct xbb_softc *xbb = device_get_softc(dev); @@ -2948,7 +2948,6 @@ xbb_frontend_changed(device_t dev, XenbusState frontend_state) frontend_state); break; } - return (0); } /*---------------------------- NewBus Registration ---------------------------*/ diff --git a/sys/dev/xen/blkfront/blkfront.c b/sys/dev/xen/blkfront/blkfront.c index 81c0e8b..2868313 100644 --- a/sys/dev/xen/blkfront/blkfront.c +++ b/sys/dev/xen/blkfront/blkfront.c @@ -739,7 +739,7 @@ setup_blkring(struct xb_softc *sc) /** * Callback received when the backend's state changes. */ -static int +static void blkfront_backend_changed(device_t dev, XenbusState backend_state) { struct xb_softc *sc = device_get_softc(dev); @@ -772,8 +772,6 @@ blkfront_backend_changed(device_t dev, XenbusState backend_state) blkfront_closing(dev); break; } - - return (0); } /* diff --git a/sys/dev/xen/control/control.c b/sys/dev/xen/control/control.c index 0f44181..bc59fa0 100644 --- a/sys/dev/xen/control/control.c +++ b/sys/dev/xen/control/control.c @@ -173,8 +173,6 @@ static struct xctrl_shutdown_reason xctrl_shutdown_reasons[] = { }; struct xctrl_softc { - - /** Must be first */ struct xs_watch xctrl_watch; }; @@ -450,6 +448,7 @@ xctrl_attach(device_t dev) /* Activate watch */ xctrl->xctrl_watch.node = "control/shutdown"; xctrl->xctrl_watch.callback = xctrl_on_watch_event; + xctrl->xctrl_watch.callback_data = (uintptr_t)xctrl; xs_register_watch(&xctrl->xctrl_watch); #ifndef XENHVM diff --git a/sys/dev/xen/netfront/netfront.c b/sys/dev/xen/netfront/netfront.c index 40ff031..c694514 100644 --- a/sys/dev/xen/netfront/netfront.c +++ b/sys/dev/xen/netfront/netfront.c @@ -650,7 +650,7 @@ netfront_send_fake_arp(device_t dev, struct netfront_info *info) /** * Callback received when the backend's state changes. */ -static int +static void netfront_backend_changed(device_t dev, XenbusState newstate) { struct netfront_info *sc = device_get_softc(dev); @@ -680,7 +680,6 @@ netfront_backend_changed(device_t dev, XenbusState newstate) xenbus_set_state(dev, XenbusStateClosed); break; } - return (0); } static void diff --git a/sys/i386/i386/legacy.c b/sys/i386/i386/legacy.c index 2136d80..6fe5700 100644 --- a/sys/i386/i386/legacy.c +++ b/sys/i386/i386/legacy.c @@ -86,6 +86,7 @@ static device_method_t legacy_methods[] = { DEVMETHOD(bus_read_ivar, legacy_read_ivar), DEVMETHOD(bus_write_ivar, legacy_write_ivar), DEVMETHOD(bus_alloc_resource, bus_generic_alloc_resource), + DEVMETHOD(bus_adjust_resource, bus_generic_adjust_resource), DEVMETHOD(bus_release_resource, bus_generic_release_resource), DEVMETHOD(bus_activate_resource, bus_generic_activate_resource), DEVMETHOD(bus_deactivate_resource, bus_generic_deactivate_resource), diff --git a/sys/ia64/ia64/machdep.c b/sys/ia64/ia64/machdep.c index 1463fb5..f3105fc 100644 --- a/sys/ia64/ia64/machdep.c +++ b/sys/ia64/ia64/machdep.c @@ -232,6 +232,9 @@ identifycpu(void) case 0x00: model_name = "Montecito"; break; + case 0x01: + model_name = "Montvale"; + break; } break; } diff --git a/sys/kern/kern_shutdown.c b/sys/kern/kern_shutdown.c index da041fa..60e854f 100644 --- a/sys/kern/kern_shutdown.c +++ b/sys/kern/kern_shutdown.c @@ -555,11 +555,12 @@ panic(const char *fmt, ...) ; /* nothing */ #endif - bootopt = RB_AUTOBOOT | RB_DUMP; + bootopt = RB_AUTOBOOT; newpanic = 0; if (panicstr) bootopt |= RB_NOSYNC; else { + bootopt |= RB_DUMP; panicstr = fmt; newpanic = 1; } diff --git a/sys/kern/vfs_bio.c b/sys/kern/vfs_bio.c index 00681ca..2743089 100644 --- a/sys/kern/vfs_bio.c +++ b/sys/kern/vfs_bio.c @@ -3999,10 +3999,11 @@ DB_SHOW_COMMAND(buffer, db_show_buffer) db_printf("b_flags = 0x%b\n", (u_int)bp->b_flags, PRINT_BUF_FLAGS); db_printf( "b_error = %d, b_bufsize = %ld, b_bcount = %ld, b_resid = %ld\n" - "b_bufobj = (%p), b_data = %p, b_blkno = %jd, b_dep = %p\n", + "b_bufobj = (%p), b_data = %p, b_blkno = %jd, b_lblkno = %jd, " + "b_dep = %p\n", bp->b_error, bp->b_bufsize, bp->b_bcount, bp->b_resid, bp->b_bufobj, bp->b_data, (intmax_t)bp->b_blkno, - bp->b_dep.lh_first); + (intmax_t)bp->b_lblkno, bp->b_dep.lh_first); if (bp->b_npages) { int i; db_printf("b_npages = %d, pages(OBJ, IDX, PA): ", bp->b_npages); diff --git a/sys/sys/vnode.h b/sys/sys/vnode.h index bfe94fb..40f9a6a 100644 --- a/sys/sys/vnode.h +++ b/sys/sys/vnode.h @@ -302,6 +302,7 @@ struct vattr { #define IO_EXT 0x0400 /* operate on external attributes */ #define IO_NORMAL 0x0800 /* operate on regular data */ #define IO_NOMACCHECK 0x1000 /* MAC checks unnecessary */ +#define IO_BUFLOCKED 0x2000 /* ffs flag; indir buf is locked */ #define IO_SEQMAX 0x7F /* seq heuristic max value */ #define IO_SEQSHIFT 16 /* seq heuristic in upper 16 bits */ diff --git a/sys/ufs/ffs/ffs_alloc.c b/sys/ufs/ffs/ffs_alloc.c index 7f5d1b4..685b9e1 100644 --- a/sys/ufs/ffs/ffs_alloc.c +++ b/sys/ufs/ffs/ffs_alloc.c @@ -217,7 +217,7 @@ nospace: (void) chkdq(ip, -btodb(size), cred, FORCE); UFS_LOCK(ump); #endif - if (reclaimed == 0) { + if (reclaimed == 0 && (flags & IO_BUFLOCKED) == 0) { reclaimed = 1; softdep_request_cleanup(fs, ITOV(ip), cred, FLUSH_BLOCKS_WAIT); goto retry; @@ -418,7 +418,7 @@ nospace: /* * no space available */ - if (reclaimed == 0) { + if (reclaimed == 0 && (flags & IO_BUFLOCKED) == 0) { reclaimed = 1; UFS_UNLOCK(ump); if (bp) { diff --git a/sys/ufs/ffs/ffs_balloc.c b/sys/ufs/ffs/ffs_balloc.c index 6d5f27c..4775768 100644 --- a/sys/ufs/ffs/ffs_balloc.c +++ b/sys/ufs/ffs/ffs_balloc.c @@ -105,6 +105,7 @@ ffs_balloc_ufs1(struct vnode *vp, off_t startoffset, int size, ufs2_daddr_t *lbns_remfree, lbns[NIADDR + 1]; int unwindidx = -1; int saved_inbdflush; + int reclaimed; ip = VTOI(vp); dp = ip->i_din1; @@ -112,6 +113,7 @@ ffs_balloc_ufs1(struct vnode *vp, off_t startoffset, int size, ump = ip->i_ump; lbn = lblkno(fs, startoffset); size = blkoff(fs, startoffset) + size; + reclaimed = 0; if (size > fs->fs_bsize) panic("ffs_balloc_ufs1: blk too big"); *bpp = NULL; @@ -276,6 +278,7 @@ ffs_balloc_ufs1(struct vnode *vp, off_t startoffset, int size, /* * Fetch through the indirect blocks, allocating as necessary. */ +retry: for (i = 1;;) { error = bread(vp, indirs[i].in_lbn, (int)fs->fs_bsize, NOCRED, &bp); @@ -296,8 +299,15 @@ ffs_balloc_ufs1(struct vnode *vp, off_t startoffset, int size, if (pref == 0) pref = ffs_blkpref_ufs1(ip, lbn, 0, (ufs1_daddr_t *)0); if ((error = ffs_alloc(ip, lbn, pref, (int)fs->fs_bsize, - flags, cred, &newb)) != 0) { + flags | IO_BUFLOCKED, cred, &newb)) != 0) { brelse(bp); + if (++reclaimed == 1) { + UFS_LOCK(ump); + softdep_request_cleanup(fs, vp, cred, + FLUSH_BLOCKS_WAIT); + UFS_UNLOCK(ump); + goto retry; + } goto fail; } nb = newb; @@ -349,10 +359,17 @@ ffs_balloc_ufs1(struct vnode *vp, off_t startoffset, int size, if (nb == 0) { UFS_LOCK(ump); pref = ffs_blkpref_ufs1(ip, lbn, indirs[i].in_off, &bap[0]); - error = ffs_alloc(ip, - lbn, pref, (int)fs->fs_bsize, flags, cred, &newb); + error = ffs_alloc(ip, lbn, pref, (int)fs->fs_bsize, + flags | IO_BUFLOCKED, cred, &newb); if (error) { brelse(bp); + if (++reclaimed == 1) { + UFS_LOCK(ump); + softdep_request_cleanup(fs, vp, cred, + FLUSH_BLOCKS_WAIT); + UFS_UNLOCK(ump); + goto retry; + } goto fail; } nb = newb; @@ -506,6 +523,7 @@ ffs_balloc_ufs2(struct vnode *vp, off_t startoffset, int size, int deallocated, osize, nsize, num, i, error; int unwindidx = -1; int saved_inbdflush; + int reclaimed; ip = VTOI(vp); dp = ip->i_din2; @@ -513,6 +531,7 @@ ffs_balloc_ufs2(struct vnode *vp, off_t startoffset, int size, ump = ip->i_ump; lbn = lblkno(fs, startoffset); size = blkoff(fs, startoffset) + size; + reclaimed = 0; if (size > fs->fs_bsize) panic("ffs_balloc_ufs2: blk too big"); *bpp = NULL; @@ -787,6 +806,7 @@ ffs_balloc_ufs2(struct vnode *vp, off_t startoffset, int size, /* * Fetch through the indirect blocks, allocating as necessary. */ +retry: for (i = 1;;) { error = bread(vp, indirs[i].in_lbn, (int)fs->fs_bsize, NOCRED, &bp); @@ -807,8 +827,15 @@ ffs_balloc_ufs2(struct vnode *vp, off_t startoffset, int size, if (pref == 0) pref = ffs_blkpref_ufs2(ip, lbn, 0, (ufs2_daddr_t *)0); if ((error = ffs_alloc(ip, lbn, pref, (int)fs->fs_bsize, - flags, cred, &newb)) != 0) { + flags | IO_BUFLOCKED, cred, &newb)) != 0) { brelse(bp); + if (++reclaimed == 1) { + UFS_LOCK(ump); + softdep_request_cleanup(fs, vp, cred, + FLUSH_BLOCKS_WAIT); + UFS_UNLOCK(ump); + goto retry; + } goto fail; } nb = newb; @@ -860,10 +887,17 @@ ffs_balloc_ufs2(struct vnode *vp, off_t startoffset, int size, if (nb == 0) { UFS_LOCK(ump); pref = ffs_blkpref_ufs2(ip, lbn, indirs[i].in_off, &bap[0]); - error = ffs_alloc(ip, - lbn, pref, (int)fs->fs_bsize, flags, cred, &newb); + error = ffs_alloc(ip, lbn, pref, (int)fs->fs_bsize, + flags | IO_BUFLOCKED, cred, &newb); if (error) { brelse(bp); + if (++reclaimed == 1) { + UFS_LOCK(ump); + softdep_request_cleanup(fs, vp, cred, + FLUSH_BLOCKS_WAIT); + UFS_UNLOCK(ump); + goto retry; + } goto fail; } nb = newb; diff --git a/sys/ufs/ffs/ffs_extern.h b/sys/ufs/ffs/ffs_extern.h index d819c8a..58d6121 100644 --- a/sys/ufs/ffs/ffs_extern.h +++ b/sys/ufs/ffs/ffs_extern.h @@ -74,6 +74,7 @@ int ffs_isfreeblock(struct fs *, u_char *, ufs1_daddr_t); void ffs_load_inode(struct buf *, struct inode *, struct fs *, ino_t); int ffs_mountroot(void); void ffs_oldfscompat_write(struct fs *, struct ufsmount *); +void ffs_pages_remove(struct vnode *vp, vm_pindex_t start, vm_pindex_t end); int ffs_reallocblks(struct vop_reallocblks_args *); int ffs_realloccg(struct inode *, ufs2_daddr_t, ufs2_daddr_t, ufs2_daddr_t, int, int, int, struct ucred *, struct buf **); @@ -107,7 +108,6 @@ extern struct vop_vector ffs_fifoops2; int softdep_check_suspend(struct mount *, struct vnode *, int, int, int, int); -int softdep_complete_trunc(struct vnode *, void *); void softdep_get_depcounts(struct mount *, int *, int *); void softdep_initialize(void); void softdep_uninitialize(void); @@ -139,14 +139,17 @@ void softdep_setup_blkfree(struct mount *, struct buf *, ufs2_daddr_t, int, void softdep_setup_inofree(struct mount *, struct buf *, ino_t, struct workhead *); void softdep_setup_sbupdate(struct ufsmount *, struct fs *, struct buf *); -void *softdep_setup_trunc(struct vnode *vp, off_t length, int flags); void softdep_fsync_mountdev(struct vnode *); int softdep_sync_metadata(struct vnode *); +int softdep_sync_buf(struct vnode *, struct buf *, int); int softdep_process_worklist(struct mount *, int); int softdep_fsync(struct vnode *); int softdep_waitidle(struct mount *); int softdep_prealloc(struct vnode *, int); int softdep_journal_lookup(struct mount *, struct vnode **); +void softdep_journal_freeblocks(struct inode *, struct ucred *, off_t, int); +void softdep_journal_fsync(struct inode *); + /* * Things to request flushing in softdep_request_cleanup() diff --git a/sys/ufs/ffs/ffs_inode.c b/sys/ufs/ffs/ffs_inode.c index ba2813d..67e91c7 100644 --- a/sys/ufs/ffs/ffs_inode.c +++ b/sys/ufs/ffs/ffs_inode.c @@ -120,7 +120,7 @@ ffs_update(vp, waitfor) } } -static void +void ffs_pages_remove(struct vnode *vp, vm_pindex_t start, vm_pindex_t end) { vm_object_t object; @@ -151,12 +151,12 @@ ffs_truncate(vp, length, flags, cred, td) ufs2_daddr_t bn, lbn, lastblock, lastiblock[NIADDR], indir_lbn[NIADDR]; ufs2_daddr_t oldblks[NDADDR + NIADDR], newblks[NDADDR + NIADDR]; ufs2_daddr_t count, blocksreleased = 0, datablocks; - void *cookie; struct bufobj *bo; struct fs *fs; struct buf *bp; struct ufsmount *ump; - int needextclean, softdepslowdown, extblocks; + int softdeptrunc, journaltrunc; + int needextclean, extblocks; int offset, size, level, nblocks; int i, error, allerror; off_t osize; @@ -165,7 +165,6 @@ ffs_truncate(vp, length, flags, cred, td) fs = ip->i_fs; ump = ip->i_ump; bo = &vp->v_bufobj; - cookie = NULL; ASSERT_VOP_LOCKED(vp, "ffs_truncate"); @@ -173,6 +172,11 @@ ffs_truncate(vp, length, flags, cred, td) return (EINVAL); if (length > fs->fs_maxfilesize) return (EFBIG); +#ifdef QUOTA + error = getinoquota(ip); + if (error) + return (error); +#endif /* * Historically clients did not have to specify which data * they were truncating. So, if not specified, we assume @@ -191,7 +195,10 @@ ffs_truncate(vp, length, flags, cred, td) */ allerror = 0; needextclean = 0; - softdepslowdown = DOINGSOFTDEP(vp) && softdep_slowdown(vp); + softdeptrunc = 0; + journaltrunc = DOINGSUJ(vp); + if (journaltrunc == 0 && DOINGSOFTDEP(vp) && length == 0) + softdeptrunc = !softdep_slowdown(vp); extblocks = 0; datablocks = DIP(ip, i_blocks); if (fs->fs_magic == FS_UFS2_MAGIC && ip->i_din2->di_extsize > 0) { @@ -199,27 +206,23 @@ ffs_truncate(vp, length, flags, cred, td) datablocks -= extblocks; } if ((flags & IO_EXT) && extblocks > 0) { - if (DOINGSOFTDEP(vp) && softdepslowdown == 0 && length == 0) { - if ((flags & IO_NORMAL) == 0) { - softdep_setup_freeblocks(ip, length, IO_EXT); - return (0); - } + if (length != 0) + panic("ffs_truncate: partial trunc of extdata"); + if (softdeptrunc || journaltrunc) { + if ((flags & IO_NORMAL) == 0) + goto extclean; needextclean = 1; } else { - if (length != 0) - panic("ffs_truncate: partial trunc of extdata"); if ((error = ffs_syncvnode(vp, MNT_WAIT)) != 0) return (error); - if (DOINGSUJ(vp)) - cookie = softdep_setup_trunc(vp, length, flags); - osize = ip->i_din2->di_extsize; - ip->i_din2->di_blocks -= extblocks; #ifdef QUOTA (void) chkdq(ip, -extblocks, NOCRED, 0); #endif vinvalbuf(vp, V_ALT, 0, 0); ffs_pages_remove(vp, OFF_TO_IDX(lblktosize(fs, -extblocks)), 0); + osize = ip->i_din2->di_extsize; + ip->i_din2->di_blocks -= extblocks; ip->i_din2->di_extsize = 0; for (i = 0; i < NXADDR; i++) { oldblks[i] = ip->i_din2->di_extb[i]; @@ -227,7 +230,7 @@ ffs_truncate(vp, length, flags, cred, td) } ip->i_flag |= IN_CHANGE; if ((error = ffs_update(vp, 1))) - goto out; + return (error); for (i = 0; i < NXADDR; i++) { if (oldblks[i] == 0) continue; @@ -236,10 +239,8 @@ ffs_truncate(vp, length, flags, cred, td) } } } - if ((flags & IO_NORMAL) == 0) { - error = 0; - goto out; - } + if ((flags & IO_NORMAL) == 0) + return (0); if (vp->v_type == VLNK && (ip->i_size < vp->v_mount->mnt_maxsymlinklen || datablocks == 0)) { @@ -252,24 +253,17 @@ ffs_truncate(vp, length, flags, cred, td) DIP_SET(ip, i_size, 0); ip->i_flag |= IN_CHANGE | IN_UPDATE; if (needextclean) - softdep_setup_freeblocks(ip, length, IO_EXT); - error = ffs_update(vp, 1); - goto out; + goto extclean; + return ffs_update(vp, 1); } if (ip->i_size == length) { ip->i_flag |= IN_CHANGE | IN_UPDATE; if (needextclean) - softdep_setup_freeblocks(ip, length, IO_EXT); - error = ffs_update(vp, 0); - goto out; + goto extclean; + return ffs_update(vp, 0); } if (fs->fs_ronly) panic("ffs_truncate: read-only filesystem"); -#ifdef QUOTA - error = getinoquota(ip); - if (error) - goto out; -#endif if ((ip->i_flags & SF_SNAPSHOT) != 0) ffs_snapremove(vp); vp->v_lasta = vp->v_clen = vp->v_cstart = vp->v_lastw = 0; @@ -285,7 +279,7 @@ ffs_truncate(vp, length, flags, cred, td) error = UFS_BALLOC(vp, length - 1, 1, cred, flags, &bp); if (error) { vnode_pager_setsize(vp, osize); - goto out; + return (error); } ip->i_size = length; DIP_SET(ip, i_size, length); @@ -296,11 +290,10 @@ ffs_truncate(vp, length, flags, cred, td) else bawrite(bp); ip->i_flag |= IN_CHANGE | IN_UPDATE; - error = ffs_update(vp, 1); - goto out; + return ffs_update(vp, 1); } if (DOINGSOFTDEP(vp)) { - if (length > 0 || softdepslowdown) { + if (softdeptrunc == 0 && journaltrunc == 0) { /* * If a file is only partially truncated, then * we have to clean up the data structures @@ -311,29 +304,20 @@ ffs_truncate(vp, length, flags, cred, td) * so that it will have no data structures left. */ if ((error = ffs_syncvnode(vp, MNT_WAIT)) != 0) - goto out; - /* - * We have to journal the truncation before we change - * any blocks so we don't leave the file partially - * truncated. - */ - if (DOINGSUJ(vp) && cookie == NULL) - cookie = softdep_setup_trunc(vp, length, flags); + return (error); } else { -#ifdef QUOTA - (void) chkdq(ip, -datablocks, NOCRED, 0); -#endif - softdep_setup_freeblocks(ip, length, needextclean ? - IO_EXT | IO_NORMAL : IO_NORMAL); + flags = IO_NORMAL | (needextclean ? IO_EXT: 0); + if (journaltrunc) + softdep_journal_freeblocks(ip, cred, length, + flags); + else + softdep_setup_freeblocks(ip, length, flags); ASSERT_VOP_LOCKED(vp, "ffs_truncate1"); - vinvalbuf(vp, needextclean ? 0 : V_NORMAL, 0, 0); - if (!needextclean) - ffs_pages_remove(vp, 0, - OFF_TO_IDX(lblktosize(fs, -extblocks))); - vnode_pager_setsize(vp, 0); - ip->i_flag |= IN_CHANGE | IN_UPDATE; - error = ffs_update(vp, 0); - goto out; + if (journaltrunc == 0) { + ip->i_flag |= IN_CHANGE | IN_UPDATE; + error = ffs_update(vp, 0); + } + return (error); } } /* @@ -353,7 +337,7 @@ ffs_truncate(vp, length, flags, cred, td) flags |= BA_CLRBUF; error = UFS_BALLOC(vp, length - 1, 1, cred, flags, &bp); if (error) - goto out; + return (error); /* * When we are doing soft updates and the UFS_BALLOC * above fills in a direct block hole with a full sized @@ -365,7 +349,7 @@ ffs_truncate(vp, length, flags, cred, td) if (DOINGSOFTDEP(vp) && lbn < NDADDR && fragroundup(fs, blkoff(fs, length)) < fs->fs_bsize && (error = ffs_syncvnode(vp, MNT_WAIT)) != 0) - goto out; + return (error); ip->i_size = length; DIP_SET(ip, i_size, length); size = blksize(fs, ip, lbn); @@ -411,13 +395,7 @@ ffs_truncate(vp, length, flags, cred, td) DIP_SET(ip, i_db[i], 0); } ip->i_flag |= IN_CHANGE | IN_UPDATE; - /* - * When doing softupdate journaling we must preserve the size along - * with the old pointers until they are freed or we might not - * know how many fragments remain. - */ - if (!DOINGSUJ(vp)) - allerror = ffs_update(vp, 1); + allerror = ffs_update(vp, 1); /* * Having written the new inode to disk, save its new configuration @@ -541,14 +519,14 @@ done: #ifdef QUOTA (void) chkdq(ip, -blocksreleased, NOCRED, 0); #endif - error = allerror; -out: - if (cookie) { - allerror = softdep_complete_trunc(vp, cookie); - if (allerror != 0 && error == 0) - error = allerror; - } - return (error); + return (allerror); + +extclean: + if (journaltrunc) + softdep_journal_freeblocks(ip, cred, length, IO_EXT); + else + softdep_setup_freeblocks(ip, length, IO_EXT); + return ffs_update(vp, MNT_WAIT); } /* diff --git a/sys/ufs/ffs/ffs_softdep.c b/sys/ufs/ffs/ffs_softdep.c index a7ae484..c125ee3 100644 --- a/sys/ufs/ffs/ffs_softdep.c +++ b/sys/ufs/ffs/ffs_softdep.c @@ -59,6 +59,7 @@ __FBSDID("$FreeBSD$"); #include <sys/buf.h> #include <sys/kdb.h> #include <sys/kthread.h> +#include <sys/limits.h> #include <sys/lock.h> #include <sys/malloc.h> #include <sys/mount.h> @@ -71,6 +72,7 @@ __FBSDID("$FreeBSD$"); #include <sys/syslog.h> #include <sys/vnode.h> #include <sys/conf.h> + #include <ufs/ufs/dir.h> #include <ufs/ufs/extattr.h> #include <ufs/ufs/quota.h> @@ -82,6 +84,8 @@ __FBSDID("$FreeBSD$"); #include <ufs/ufs/ufs_extern.h> #include <vm/vm.h> +#include <vm/vm_extern.h> +#include <vm/vm_object.h> #include <ddb/ddb.h> @@ -214,6 +218,25 @@ softdep_setup_allocindir_meta(nbp, ip, bp, ptrno, newblkno) } void +softdep_journal_freeblocks(ip, cred, length, flags) + struct inode *ip; + struct ucred *cred; + off_t length; + int flags; +{ + + panic("softdep_journal_freeblocks called"); +} + +void +softdep_journal_fsync(ip) + struct inode *ip; +{ + + panic("softdep_journal_fsync called"); +} + +void softdep_setup_freeblocks(ip, length, flags) struct inode *ip; off_t length; @@ -282,29 +305,6 @@ softdep_setup_directory_change(bp, dp, ip, newinum, isrmdir) panic("softdep_setup_directory_change called"); } -void * -softdep_setup_trunc(vp, length, flags) - struct vnode *vp; - off_t length; - int flags; -{ - - panic("%s called", __FUNCTION__); - - return (NULL); -} - -int -softdep_complete_trunc(vp, cookie) - struct vnode *vp; - void *cookie; -{ - - panic("%s called", __FUNCTION__); - - return (0); -} - void softdep_setup_blkfree(mp, bp, blkno, frags, wkhd) struct mount *mp; @@ -499,6 +499,13 @@ softdep_sync_metadata(struct vnode *vp) } int +softdep_sync_buf(struct vnode *vp, struct buf *bp, int waitfor) +{ + + return (0); +} + +int softdep_slowdown(vp) struct vnode *vp; { @@ -614,10 +621,13 @@ FEATURE(softupdates, "FFS soft-updates support"); #define D_JSEGDEP 23 #define D_SBDEP 24 #define D_JTRUNC 25 -#define D_LAST D_JTRUNC +#define D_JFSYNC 26 +#define D_SENTINAL 27 +#define D_LAST D_SENTINAL unsigned long dep_current[D_LAST + 1]; unsigned long dep_total[D_LAST + 1]; +unsigned long dep_write[D_LAST + 1]; SYSCTL_NODE(_debug, OID_AUTO, softdep, CTLFLAG_RW, 0, "soft updates stats"); @@ -625,13 +635,17 @@ SYSCTL_NODE(_debug_softdep, OID_AUTO, total, CTLFLAG_RW, 0, "total dependencies allocated"); SYSCTL_NODE(_debug_softdep, OID_AUTO, current, CTLFLAG_RW, 0, "current dependencies allocated"); +SYSCTL_NODE(_debug_softdep, OID_AUTO, write, CTLFLAG_RW, 0, + "current dependencies written"); #define SOFTDEP_TYPE(type, str, long) \ static MALLOC_DEFINE(M_ ## type, #str, long); \ SYSCTL_ULONG(_debug_softdep_total, OID_AUTO, str, CTLFLAG_RD, \ &dep_total[D_ ## type], 0, ""); \ SYSCTL_ULONG(_debug_softdep_current, OID_AUTO, str, CTLFLAG_RD, \ - &dep_current[D_ ## type], 0, ""); + &dep_current[D_ ## type], 0, ""); \ + SYSCTL_ULONG(_debug_softdep_write, OID_AUTO, str, CTLFLAG_RD, \ + &dep_write[D_ ## type], 0, ""); SOFTDEP_TYPE(PAGEDEP, pagedep, "File page dependencies"); SOFTDEP_TYPE(INODEDEP, inodedep, "Inode dependencies"); @@ -660,6 +674,7 @@ SOFTDEP_TYPE(JSEG, jseg, "Journal segment"); SOFTDEP_TYPE(JSEGDEP, jsegdep, "Journal segment complete"); SOFTDEP_TYPE(SBDEP, sbdep, "Superblock write dependency"); SOFTDEP_TYPE(JTRUNC, jtrunc, "Journal inode truncation"); +SOFTDEP_TYPE(JFSYNC, jfsync, "Journal fsync complete"); static MALLOC_DEFINE(M_SAVEDINO, "savedino", "Saved inodes"); static MALLOC_DEFINE(M_JBLOCKS, "jblocks", "Journal block locations"); @@ -694,7 +709,8 @@ static struct malloc_type *memtype[] = { M_JSEG, M_JSEGDEP, M_SBDEP, - M_JTRUNC + M_JTRUNC, + M_JFSYNC }; static LIST_HEAD(mkdirlist, mkdir) mkdirlisthd; @@ -734,10 +750,11 @@ static void clear_unlinked_inodedep(struct inodedep *); static struct inodedep *first_unlinked_inodedep(struct ufsmount *); static int flush_pagedep_deps(struct vnode *, struct mount *, struct diraddhd *); -static void free_pagedep(struct pagedep *); +static int free_pagedep(struct pagedep *); static int flush_newblk_dep(struct vnode *, struct mount *, ufs_lbn_t); -static int flush_inodedep_deps(struct mount *, ino_t); +static int flush_inodedep_deps(struct vnode *, struct mount *, ino_t); static int flush_deplist(struct allocdirectlst *, int, int *); +static int sync_cgs(struct mount *, int); static int handle_written_filepage(struct pagedep *, struct buf *); static int handle_written_sbdep(struct sbdep *, struct buf *); static void initiate_write_sbdep(struct sbdep *); @@ -750,7 +767,7 @@ static void handle_written_jaddref(struct jaddref *); static void handle_written_jremref(struct jremref *); static void handle_written_jseg(struct jseg *, struct buf *); static void handle_written_jnewblk(struct jnewblk *); -static void handle_written_jfreeblk(struct jfreeblk *); +static void handle_written_jblkdep(struct jblkdep *); static void handle_written_jfreefrag(struct jfreefrag *); static void complete_jseg(struct jseg *); static void jseg_write(struct ufsmount *ump, struct jseg *, uint8_t *); @@ -758,6 +775,7 @@ static void jaddref_write(struct jaddref *, struct jseg *, uint8_t *); static void jremref_write(struct jremref *, struct jseg *, uint8_t *); static void jmvref_write(struct jmvref *, struct jseg *, uint8_t *); static void jtrunc_write(struct jtrunc *, struct jseg *, uint8_t *); +static void jfsync_write(struct jfsync *, struct jseg *, uint8_t *data); static void jnewblk_write(struct jnewblk *, struct jseg *, uint8_t *); static void jfreeblk_write(struct jfreeblk *, struct jseg *, uint8_t *); static void jfreefrag_write(struct jfreefrag *, struct jseg *, uint8_t *); @@ -768,7 +786,9 @@ static void handle_allocdirect_partdone(struct allocdirect *, static struct jnewblk *cancel_newblk(struct newblk *, struct worklist *, struct workhead *); static void indirdep_complete(struct indirdep *); -static int indirblk_inseg(struct mount *, ufs2_daddr_t); +static int indirblk_lookup(struct mount *, ufs2_daddr_t); +static void indirblk_insert(struct freework *); +static void indirblk_remove(struct freework *); static void handle_allocindir_partdone(struct allocindir *); static void initiate_write_filepage(struct pagedep *, struct buf *); static void initiate_write_indirdep(struct indirdep*, struct buf *); @@ -777,10 +797,12 @@ static void initiate_write_bmsafemap(struct bmsafemap *, struct buf *); static void initiate_write_inodeblock_ufs1(struct inodedep *, struct buf *); static void initiate_write_inodeblock_ufs2(struct inodedep *, struct buf *); static void handle_workitem_freefile(struct freefile *); -static void handle_workitem_remove(struct dirrem *, struct vnode *); +static int handle_workitem_remove(struct dirrem *, int); static struct dirrem *newdirrem(struct buf *, struct inode *, struct inode *, int, struct dirrem **); -static void cancel_indirdep(struct indirdep *, struct buf *, struct inodedep *, +static struct indirdep *indirdep_lookup(struct mount *, struct inode *, + struct buf *); +static void cancel_indirdep(struct indirdep *, struct buf *, struct freeblks *); static void free_indirdep(struct indirdep *); static void free_diradd(struct diradd *, struct workhead *); @@ -795,8 +817,13 @@ static void cancel_diradd(struct diradd *, struct dirrem *, struct jremref *, struct jremref *, struct jremref *); static void dirrem_journal(struct dirrem *, struct jremref *, struct jremref *, struct jremref *); -static void cancel_allocindir(struct allocindir *, struct inodedep *, - struct freeblks *); +static void cancel_allocindir(struct allocindir *, struct buf *bp, + struct freeblks *, int); +static int setup_trunc_indir(struct freeblks *, struct inode *, + ufs_lbn_t, ufs_lbn_t, ufs2_daddr_t); +static void complete_trunc_indir(struct freework *); +static void trunc_indirdep(struct indirdep *, struct freeblks *, struct buf *, + int); static void complete_mkdir(struct mkdir *); static void free_newdirblk(struct newdirblk *); static void free_jremref(struct jremref *); @@ -806,7 +833,7 @@ static void free_jsegs(struct jblocks *); static void rele_jseg(struct jseg *); static void free_jseg(struct jseg *, struct jblocks *); static void free_jnewblk(struct jnewblk *); -static void free_jfreeblk(struct jfreeblk *); +static void free_jblkdep(struct jblkdep *); static void free_jfreefrag(struct jfreefrag *); static void free_freedep(struct freedep *); static void journal_jremref(struct dirrem *, struct jremref *, @@ -818,30 +845,33 @@ static void cancel_jfreefrag(struct jfreefrag *); static inline void setup_freedirect(struct freeblks *, struct inode *, int, int); static inline void setup_freeext(struct freeblks *, struct inode *, int, int); -static inline void setup_freeindir(struct freeblks *, struct inode *, int i, +static inline void setup_freeindir(struct freeblks *, struct inode *, int, ufs_lbn_t, int); static inline struct freeblks *newfreeblks(struct mount *, struct inode *); static void indir_trunc(struct freework *, ufs2_daddr_t, ufs_lbn_t); -static void softdep_trunc_deps(struct vnode *, struct freeblks *, ufs_lbn_t, +ufs2_daddr_t blkcount(struct fs *, ufs2_daddr_t, off_t); +static int trunc_check_buf(struct buf *, int *, ufs_lbn_t, int, int); +static void trunc_dependencies(struct inode *, struct freeblks *, ufs_lbn_t, int, int); -static int cancel_pagedep(struct pagedep *, struct inodedep *, - struct freeblks *); -static int deallocate_dependencies(struct buf *, struct inodedep *, - struct freeblks *, int off); +static void trunc_pages(struct inode *, off_t, ufs2_daddr_t, int); +static int cancel_pagedep(struct pagedep *, struct freeblks *, int); +static int deallocate_dependencies(struct buf *, struct freeblks *, int); +static void newblk_freefrag(struct newblk*); static void free_newblk(struct newblk *); static void cancel_allocdirect(struct allocdirectlst *, - struct allocdirect *, struct freeblks *, int); + struct allocdirect *, struct freeblks *); static int check_inode_unwritten(struct inodedep *); static int free_inodedep(struct inodedep *); static void freework_freeblock(struct freework *); -static void handle_workitem_freeblocks(struct freeblks *, int); -static void handle_complete_freeblocks(struct freeblks *); +static void freework_enqueue(struct freework *); +static int handle_workitem_freeblocks(struct freeblks *, int); +static int handle_complete_freeblocks(struct freeblks *, int); static void handle_workitem_indirblk(struct freework *); -static void handle_written_freework(struct freework *); +static void handle_written_freework(struct freework *, int); static void merge_inode_lists(struct allocdirectlst *,struct allocdirectlst *); static struct worklist *jnewblk_merge(struct worklist *, struct worklist *, struct workhead *); -static void setup_allocindir_phase2(struct buf *, struct inode *, +static struct freefrag *setup_allocindir_phase2(struct buf *, struct inode *, struct inodedep *, struct allocindir *, ufs_lbn_t); static struct allocindir *newallocindir(struct inode *, int, ufs2_daddr_t, ufs2_daddr_t, ufs_lbn_t); @@ -862,16 +892,20 @@ static int newblk_lookup(struct mount *, ufs2_daddr_t, int, struct newblk **); static int inodedep_find(struct inodedep_hashhead *, struct fs *, ino_t, struct inodedep **); static int inodedep_lookup(struct mount *, ino_t, int, struct inodedep **); -static int pagedep_lookup(struct mount *, ino_t, ufs_lbn_t, int, - struct pagedep **); +static int pagedep_lookup(struct mount *, struct buf *bp, ino_t, ufs_lbn_t, + int, struct pagedep **); static int pagedep_find(struct pagedep_hashhead *, ino_t, ufs_lbn_t, struct mount *mp, int, struct pagedep **); static void pause_timer(void *); static int request_cleanup(struct mount *, int); -static int process_worklist_item(struct mount *, int); +static int process_worklist_item(struct mount *, int, int); static void process_removes(struct vnode *); +static void process_truncates(struct vnode *); static void jwork_move(struct workhead *, struct workhead *); +static void jwork_insert(struct workhead *, struct jsegdep *); static void add_to_worklist(struct worklist *, int); +static void wake_worklist(struct worklist *); +static void wait_worklist(struct worklist *, char *); static void remove_from_worklist(struct worklist *); static void softdep_flush(void); static int softdep_speedup(void); @@ -889,17 +923,20 @@ static struct jremref *newjremref(struct dirrem *, struct inode *, struct inode *ip, off_t, nlink_t); static struct jaddref *newjaddref(struct inode *, ino_t, off_t, int16_t, uint16_t); -static inline void newinoref(struct inoref *, ino_t, ino_t, off_t, nlink_t, +static inline void newinoref(struct inoref *, ino_t, ino_t, off_t, nlink_t, uint16_t); -static inline struct jsegdep *inoref_jseg(struct inoref *); +static inline struct jsegdep *inoref_jseg(struct inoref *); static struct jmvref *newjmvref(struct inode *, ino_t, off_t, off_t); static struct jfreeblk *newjfreeblk(struct freeblks *, ufs_lbn_t, ufs2_daddr_t, int); +static struct jtrunc *newjtrunc(struct freeblks *, off_t, int); +static void move_newblock_dep(struct jaddref *, struct inodedep *); +static void cancel_jfreeblk(struct freeblks *, ufs2_daddr_t); static struct jfreefrag *newjfreefrag(struct freefrag *, struct inode *, ufs2_daddr_t, long, ufs_lbn_t); static struct freework *newfreework(struct ufsmount *, struct freeblks *, - struct freework *, ufs_lbn_t, ufs2_daddr_t, int, int); -static void jwait(struct worklist *wk); + struct freework *, ufs_lbn_t, ufs2_daddr_t, int, int, int); +static int jwait(struct worklist *, int); static struct inodedep *inodedep_lookup_ip(struct inode *); static int bmsafemap_rollbacks(struct bmsafemap *); static struct freefile *handle_bufwait(struct inodedep *, struct workhead *); @@ -1064,6 +1101,30 @@ jwork_move(dst, src) } } +static void +jwork_insert(dst, jsegdep) + struct workhead *dst; + struct jsegdep *jsegdep; +{ + struct jsegdep *jsegdepn; + struct worklist *wk; + + LIST_FOREACH(wk, dst, wk_list) + if (wk->wk_type == D_JSEGDEP) + break; + if (wk == NULL) { + WORKLIST_INSERT(dst, &jsegdep->jd_list); + return; + } + jsegdepn = WK_JSEGDEP(wk); + if (jsegdep->jd_seg->js_seq < jsegdepn->jd_seg->js_seq) { + WORKLIST_REMOVE(wk); + free_jsegdep(jsegdepn); + WORKLIST_INSERT(dst, &jsegdep->jd_list); + } else + free_jsegdep(jsegdep); +} + /* * Routines for tracking and managing workitems. */ @@ -1088,6 +1149,8 @@ workitem_free(item, type) panic("workitem_free: type mismatch %s != %s", TYPENAME(item->wk_type), TYPENAME(type)); #endif + if (item->wk_state & IOWAITING) + wakeup(item); ump = VFSTOUFS(item->wk_mp); if (--ump->softdep_deps == 0 && ump->softdep_req) wakeup(&ump->softdep_deps); @@ -1101,14 +1164,18 @@ workitem_alloc(item, type, mp) int type; struct mount *mp; { + struct ufsmount *ump; + item->wk_type = type; item->wk_mp = mp; item->wk_state = 0; + + ump = VFSTOUFS(mp); ACQUIRE_LOCK(&lk); dep_current[type]++; dep_total[type]++; - VFSTOUFS(mp)->softdep_deps++; - VFSTOUFS(mp)->softdep_accdeps++; + ump->softdep_deps++; + ump->softdep_accdeps++; FREE_LOCK(&lk); } @@ -1270,8 +1337,7 @@ softdep_flush(void) vfslocked = VFS_LOCK_GIANT(mp); progress += softdep_process_worklist(mp, 0); ump = VFSTOUFS(mp); - remaining += ump->softdep_on_worklist - - ump->softdep_on_worklist_inprogress; + remaining += ump->softdep_on_worklist; VFS_UNLOCK_GIANT(vfslocked); mtx_lock(&mountlist_mtx); nmp = TAILQ_NEXT(mp, mnt_list); @@ -1314,10 +1380,14 @@ softdep_speedup(void) * The following routine is the only one that removes items * and does so in order from first to last. */ + +#define WK_HEAD 0x0001 /* Add to HEAD. */ +#define WK_NODELAY 0x0002 /* Process immediately. */ + static void -add_to_worklist(wk, nodelay) +add_to_worklist(wk, flags) struct worklist *wk; - int nodelay; + int flags; { struct ufsmount *ump; @@ -1327,13 +1397,17 @@ add_to_worklist(wk, nodelay) panic("add_to_worklist: %s(0x%X) already on list", TYPENAME(wk->wk_type), wk->wk_state); wk->wk_state |= ONWORKLIST; - if (LIST_EMPTY(&ump->softdep_workitem_pending)) + if (ump->softdep_on_worklist == 0) { LIST_INSERT_HEAD(&ump->softdep_workitem_pending, wk, wk_list); - else + ump->softdep_worklist_tail = wk; + } else if (flags & WK_HEAD) { + LIST_INSERT_HEAD(&ump->softdep_workitem_pending, wk, wk_list); + } else { LIST_INSERT_AFTER(ump->softdep_worklist_tail, wk, wk_list); - ump->softdep_worklist_tail = wk; + ump->softdep_worklist_tail = wk; + } ump->softdep_on_worklist += 1; - if (nodelay) + if (flags & WK_NODELAY) worklist_speedup(); } @@ -1346,19 +1420,35 @@ remove_from_worklist(wk) struct worklist *wk; { struct ufsmount *ump; - struct worklist *wkend; ump = VFSTOUFS(wk->wk_mp); WORKLIST_REMOVE(wk); - if (wk == ump->softdep_worklist_tail) { - LIST_FOREACH(wkend, &ump->softdep_workitem_pending, wk_list) - if (LIST_NEXT(wkend, wk_list) == NULL) - break; - ump->softdep_worklist_tail = wkend; - } + if (ump->softdep_worklist_tail == wk) + ump->softdep_worklist_tail = + (struct worklist *)wk->wk_list.le_prev; ump->softdep_on_worklist -= 1; } +static void +wake_worklist(wk) + struct worklist *wk; +{ + if (wk->wk_state & IOWAITING) { + wk->wk_state &= ~IOWAITING; + wakeup(wk); + } +} + +static void +wait_worklist(wk, wmesg) + struct worklist *wk; + char *wmesg; +{ + + wk->wk_state |= IOWAITING; + msleep(wk, &lk, PVM, wmesg, 0); +} + /* * Process that runs once per second to handle items in the background queue. * @@ -1389,7 +1479,7 @@ softdep_process_worklist(mp, full) starttime = time_second; softdep_process_journal(mp, NULL, full?MNT_WAIT:0); while (ump->softdep_on_worklist > 0) { - if ((cnt = process_worklist_item(mp, LK_NOWAIT)) == -1) + if ((cnt = process_worklist_item(mp, 10, LK_NOWAIT)) == 0) break; else matchcnt += cnt; @@ -1449,46 +1539,122 @@ process_removes(vp) mp = vp->v_mount; inum = VTOI(vp)->i_number; for (;;) { +top: if (inodedep_lookup(mp, inum, 0, &inodedep) == 0) return; - LIST_FOREACH(dirrem, &inodedep->id_dirremhd, dm_inonext) - if ((dirrem->dm_state & (COMPLETE | ONWORKLIST)) == + LIST_FOREACH(dirrem, &inodedep->id_dirremhd, dm_inonext) { + /* + * If another thread is trying to lock this vnode + * it will fail but we must wait for it to do so + * before we can proceed. + */ + if (dirrem->dm_state & INPROGRESS) { + wait_worklist(&dirrem->dm_list, "pwrwait"); + goto top; + } + if ((dirrem->dm_state & (COMPLETE | ONWORKLIST)) == (COMPLETE | ONWORKLIST)) break; + } if (dirrem == NULL) return; - /* - * If another thread is trying to lock this vnode it will - * fail but we must wait for it to do so before we can - * proceed. - */ - if (dirrem->dm_state & INPROGRESS) { - dirrem->dm_state |= IOWAITING; - msleep(&dirrem->dm_list, &lk, PVM, "pwrwait", 0); - continue; - } remove_from_worklist(&dirrem->dm_list); FREE_LOCK(&lk); if (vn_start_secondary_write(NULL, &mp, V_NOWAIT)) panic("process_removes: suspended filesystem"); - handle_workitem_remove(dirrem, vp); + handle_workitem_remove(dirrem, 0); vn_finished_secondary_write(mp); ACQUIRE_LOCK(&lk); } } /* + * Process all truncations associated with a vnode if we are running out + * of journal space. This is called when the vnode lock is already held + * and no other process can clear the truncation. This function returns + * a value greater than zero if it did any work. + */ +static void +process_truncates(vp) + struct vnode *vp; +{ + struct inodedep *inodedep; + struct freeblks *freeblks; + struct mount *mp; + ino_t inum; + int cgwait; + + mtx_assert(&lk, MA_OWNED); + + mp = vp->v_mount; + inum = VTOI(vp)->i_number; + for (;;) { + if (inodedep_lookup(mp, inum, 0, &inodedep) == 0) + return; + cgwait = 0; + TAILQ_FOREACH(freeblks, &inodedep->id_freeblklst, fb_next) { + /* Journal entries not yet written. */ + if (!LIST_EMPTY(&freeblks->fb_jblkdephd)) { + jwait(&LIST_FIRST( + &freeblks->fb_jblkdephd)->jb_list, + MNT_WAIT); + break; + } + /* Another thread is executing this item. */ + if (freeblks->fb_state & INPROGRESS) { + wait_worklist(&freeblks->fb_list, "ptrwait"); + break; + } + /* Freeblks is waiting on a inode write. */ + if ((freeblks->fb_state & COMPLETE) == 0) { + FREE_LOCK(&lk); + ffs_update(vp, 1); + ACQUIRE_LOCK(&lk); + break; + } + if ((freeblks->fb_state & (ALLCOMPLETE | ONWORKLIST)) == + (ALLCOMPLETE | ONWORKLIST)) { + remove_from_worklist(&freeblks->fb_list); + freeblks->fb_state |= INPROGRESS; + FREE_LOCK(&lk); + if (vn_start_secondary_write(NULL, &mp, + V_NOWAIT)) + panic("process_truncates: " + "suspended filesystem"); + handle_workitem_freeblocks(freeblks, 0); + vn_finished_secondary_write(mp); + ACQUIRE_LOCK(&lk); + break; + } + if (freeblks->fb_cgwait) + cgwait++; + } + if (cgwait) { + FREE_LOCK(&lk); + sync_cgs(mp, MNT_WAIT); + ACQUIRE_LOCK(&lk); + continue; + } + if (freeblks == NULL) + break; + } + return; +} + +/* * Process one item on the worklist. */ static int -process_worklist_item(mp, flags) +process_worklist_item(mp, target, flags) struct mount *mp; + int target; int flags; { + struct worklist sintenel; struct worklist *wk; struct ufsmount *ump; - struct vnode *vp; - int matchcnt = 0; + int matchcnt; + int error; mtx_assert(&lk, MA_OWNED); KASSERT(mp != NULL, ("process_worklist_item: NULL mp")); @@ -1499,77 +1665,79 @@ process_worklist_item(mp, flags) */ if (curthread->td_pflags & TDP_COWINPROGRESS) return (-1); - /* - * Normally we just process each item on the worklist in order. - * However, if we are in a situation where we cannot lock any - * inodes, we have to skip over any dirrem requests whose - * vnodes are resident and locked. - */ - vp = NULL; + PHOLD(curproc); /* Don't let the stack go away. */ ump = VFSTOUFS(mp); - LIST_FOREACH(wk, &ump->softdep_workitem_pending, wk_list) { - if (wk->wk_state & INPROGRESS) + matchcnt = 0; + sintenel.wk_mp = NULL; + sintenel.wk_type = D_SENTINAL; + LIST_INSERT_HEAD(&ump->softdep_workitem_pending, &sintenel, wk_list); + for (wk = LIST_NEXT(&sintenel, wk_list); wk != NULL; + wk = LIST_NEXT(&sintenel, wk_list)) { + if (wk->wk_type == D_SENTINAL) { + LIST_REMOVE(&sintenel, wk_list); + LIST_INSERT_AFTER(wk, &sintenel, wk_list); continue; - if ((flags & LK_NOWAIT) == 0 || wk->wk_type != D_DIRREM) - break; + } + if (wk->wk_state & INPROGRESS) + panic("process_worklist_item: %p already in progress.", + wk); wk->wk_state |= INPROGRESS; - ump->softdep_on_worklist_inprogress++; + remove_from_worklist(wk); FREE_LOCK(&lk); - ffs_vgetf(mp, WK_DIRREM(wk)->dm_oldinum, - LK_NOWAIT | LK_EXCLUSIVE, &vp, FFSV_FORCEINSMQ); - ACQUIRE_LOCK(&lk); - if (wk->wk_state & IOWAITING) { - wk->wk_state &= ~IOWAITING; - wakeup(wk); - } - wk->wk_state &= ~INPROGRESS; - ump->softdep_on_worklist_inprogress--; - if (vp != NULL) + if (vn_start_secondary_write(NULL, &mp, V_NOWAIT)) + panic("process_worklist_item: suspended filesystem"); + switch (wk->wk_type) { + case D_DIRREM: + /* removal of a directory entry */ + error = handle_workitem_remove(WK_DIRREM(wk), flags); break; - } - if (wk == 0) - return (-1); - remove_from_worklist(wk); - FREE_LOCK(&lk); - if (vn_start_secondary_write(NULL, &mp, V_NOWAIT)) - panic("process_worklist_item: suspended filesystem"); - matchcnt++; - switch (wk->wk_type) { - - case D_DIRREM: - /* removal of a directory entry */ - handle_workitem_remove(WK_DIRREM(wk), vp); - if (vp) - vput(vp); - break; - case D_FREEBLKS: - /* releasing blocks and/or fragments from a file */ - handle_workitem_freeblocks(WK_FREEBLKS(wk), flags & LK_NOWAIT); - break; - - case D_FREEFRAG: - /* releasing a fragment when replaced as a file grows */ - handle_workitem_freefrag(WK_FREEFRAG(wk)); - break; + case D_FREEBLKS: + /* releasing blocks and/or fragments from a file */ + error = handle_workitem_freeblocks(WK_FREEBLKS(wk), + flags); + break; - case D_FREEFILE: - /* releasing an inode when its link count drops to 0 */ - handle_workitem_freefile(WK_FREEFILE(wk)); - break; + case D_FREEFRAG: + /* releasing a fragment when replaced as a file grows */ + handle_workitem_freefrag(WK_FREEFRAG(wk)); + error = 0; + break; - case D_FREEWORK: - /* Final block in an indirect was freed. */ - handle_workitem_indirblk(WK_FREEWORK(wk)); - break; + case D_FREEFILE: + /* releasing an inode when its link count drops to 0 */ + handle_workitem_freefile(WK_FREEFILE(wk)); + error = 0; + break; - default: - panic("%s_process_worklist: Unknown type %s", - "softdep", TYPENAME(wk->wk_type)); - /* NOTREACHED */ - } - vn_finished_secondary_write(mp); - ACQUIRE_LOCK(&lk); + default: + panic("%s_process_worklist: Unknown type %s", + "softdep", TYPENAME(wk->wk_type)); + /* NOTREACHED */ + } + vn_finished_secondary_write(mp); + ACQUIRE_LOCK(&lk); + if (error == 0) { + if (++matchcnt == target) + break; + continue; + } + /* + * We have to retry the worklist item later. Wake up any + * waiters who may be able to complete it immediately and + * add the item back to the head so we don't try to execute + * it again. + */ + wk->wk_state &= ~INPROGRESS; + wake_worklist(wk); + add_to_worklist(wk, WK_HEAD); + } + LIST_REMOVE(&sintenel, wk_list); + /* Sentinal could've become the tail from remove_from_worklist. */ + if (ump->softdep_worklist_tail == &sintenel) + ump->softdep_worklist_tail = + (struct worklist *)sintenel.wk_list.le_prev; + PRELE(curproc); return (matchcnt); } @@ -1774,31 +1942,26 @@ pagedep_find(pagedephd, ino, lbn, mp, flags, pagedeppp) { struct pagedep *pagedep; - LIST_FOREACH(pagedep, pagedephd, pd_hash) - if (ino == pagedep->pd_ino && - lbn == pagedep->pd_lbn && - mp == pagedep->pd_list.wk_mp) - break; - if (pagedep) { - *pagedeppp = pagedep; - if ((flags & DEPALLOC) != 0 && - (pagedep->pd_state & ONWORKLIST) == 0) - return (0); - return (1); + LIST_FOREACH(pagedep, pagedephd, pd_hash) { + if (ino == pagedep->pd_ino && lbn == pagedep->pd_lbn && + mp == pagedep->pd_list.wk_mp) { + *pagedeppp = pagedep; + return (1); + } } *pagedeppp = NULL; return (0); } /* - * Look up a pagedep. Return 1 if found, 0 if not found or found - * when asked to allocate but not associated with any buffer. + * Look up a pagedep. Return 1 if found, 0 otherwise. * If not found, allocate if DEPALLOC flag is passed. * Found or allocated entry is returned in pagedeppp. * This routine must be called with splbio interrupts blocked. */ static int -pagedep_lookup(mp, ino, lbn, flags, pagedeppp) +pagedep_lookup(mp, bp, ino, lbn, flags, pagedeppp) struct mount *mp; + struct buf *bp; ino_t ino; ufs_lbn_t lbn; int flags; @@ -1806,15 +1969,28 @@ pagedep_lookup(mp, ino, lbn, flags, pagedeppp) { struct pagedep *pagedep; struct pagedep_hashhead *pagedephd; + struct worklist *wk; int ret; int i; mtx_assert(&lk, MA_OWNED); + if (bp) { + LIST_FOREACH(wk, &bp->b_dep, wk_list) { + if (wk->wk_type == D_PAGEDEP) { + *pagedeppp = WK_PAGEDEP(wk); + return (1); + } + } + } pagedephd = PAGEDEP_HASH(mp, ino, lbn); - ret = pagedep_find(pagedephd, ino, lbn, mp, flags, pagedeppp); - if (*pagedeppp || (flags & DEPALLOC) == 0) - return (ret); + if (ret) { + if (((*pagedeppp)->pd_state & ONWORKLIST) == 0 && bp) + WORKLIST_INSERT(&bp->b_dep, &(*pagedeppp)->pd_list); + return (1); + } + if ((flags & DEPALLOC) == 0) + return (0); FREE_LOCK(&lk); pagedep = malloc(sizeof(struct pagedep), M_PAGEDEP, M_SOFTDEP_FLAGS|M_ZERO); @@ -1822,6 +1998,10 @@ pagedep_lookup(mp, ino, lbn, flags, pagedeppp) ACQUIRE_LOCK(&lk); ret = pagedep_find(pagedephd, ino, lbn, mp, flags, pagedeppp); if (*pagedeppp) { + /* + * This should never happen since we only create pagedeps + * with the vnode lock held. Could be an assert. + */ WORKITEM_FREE(pagedep, D_PAGEDEP); return (ret); } @@ -1832,6 +2012,7 @@ pagedep_lookup(mp, ino, lbn, flags, pagedeppp) for (i = 0; i < DAHASHSZ; i++) LIST_INIT(&pagedep->pd_diraddhd[i]); LIST_INSERT_HEAD(pagedephd, pagedep, pd_hash); + WORKLIST_INSERT(&bp->b_dep, &pagedep->pd_list); *pagedeppp = pagedep; return (0); } @@ -1922,6 +2103,7 @@ inodedep_lookup(mp, inum, flags, inodedeppp) TAILQ_INIT(&inodedep->id_newinoupdt); TAILQ_INIT(&inodedep->id_extupdt); TAILQ_INIT(&inodedep->id_newextupdt); + TAILQ_INIT(&inodedep->id_freeblklst); LIST_INSERT_HEAD(inodedephd, inodedep, id_hash); *inodedeppp = inodedep; return (0); @@ -2008,43 +2190,86 @@ newblk_lookup(mp, newblkno, flags, newblkpp) } /* - * Structures and routines associated with indir caching. + * Structures and routines associated with freed indirect block caching. */ -struct workhead *indir_hashtbl; +struct freeworklst *indir_hashtbl; u_long indir_hash; /* size of hash table - 1 */ #define INDIR_HASH(mp, blkno) \ (&indir_hashtbl[((((register_t)(mp)) >> 13) + (blkno)) & indir_hash]) +/* + * Lookup an indirect block in the indir hash table. The freework is + * removed and potentially freed. The caller must do a blocking journal + * write before writing to the blkno. + */ static int -indirblk_inseg(mp, blkno) +indirblk_lookup(mp, blkno) struct mount *mp; ufs2_daddr_t blkno; { struct freework *freework; - struct workhead *wkhd; - struct worklist *wk; + struct freeworklst *wkhd; wkhd = INDIR_HASH(mp, blkno); - LIST_FOREACH(wk, wkhd, wk_list) { - freework = WK_FREEWORK(wk); - if (freework->fw_blkno == blkno && - freework->fw_list.wk_mp == mp) { - LIST_REMOVE(freework, fw_next); - WORKLIST_REMOVE(&freework->fw_list); - WORKITEM_FREE(freework, D_FREEWORK); - return (1); - } + TAILQ_FOREACH(freework, wkhd, fw_next) { + if (freework->fw_blkno != blkno) + continue; + if (freework->fw_list.wk_mp != mp) + continue; + indirblk_remove(freework); + return (1); } return (0); } /* + * Insert an indirect block represented by freework into the indirblk + * hash table so that it may prevent the block from being re-used prior + * to the journal being written. + */ +static void +indirblk_insert(freework) + struct freework *freework; +{ + struct freeblks *freeblks; + struct jsegdep *jsegdep; + struct worklist *wk; + + freeblks = freework->fw_freeblks; + LIST_FOREACH(wk, &freeblks->fb_jwork, wk_list) + if (wk->wk_type == D_JSEGDEP) + break; + if (wk == NULL) + return; + + jsegdep = WK_JSEGDEP(wk); + LIST_INSERT_HEAD(&jsegdep->jd_seg->js_indirs, freework, fw_segs); + TAILQ_INSERT_HEAD(INDIR_HASH(freework->fw_list.wk_mp, + freework->fw_blkno), freework, fw_next); + freework->fw_state &= ~DEPCOMPLETE; +} + +static void +indirblk_remove(freework) + struct freework *freework; +{ + + LIST_REMOVE(freework, fw_segs); + TAILQ_REMOVE(INDIR_HASH(freework->fw_list.wk_mp, + freework->fw_blkno), freework, fw_next); + freework->fw_state |= DEPCOMPLETE; + if ((freework->fw_state & ALLCOMPLETE) == ALLCOMPLETE) + WORKITEM_FREE(freework, D_FREEWORK); +} + +/* * Executed during filesystem system initialization before * mounting any filesystems. */ void softdep_initialize() { + int i; LIST_INIT(&mkdirlisthd); max_softdeps = desiredvnodes * 4; @@ -2052,7 +2277,12 @@ softdep_initialize() inodedep_hashtbl = hashinit(desiredvnodes, M_INODEDEP, &inodedep_hash); newblk_hashtbl = hashinit(desiredvnodes / 5, M_NEWBLK, &newblk_hash); bmsafemap_hashtbl = hashinit(1024, M_BMSAFEMAP, &bmsafemap_hash); - indir_hashtbl = hashinit(desiredvnodes / 10, M_FREEWORK, &indir_hash); + i = 1 << (ffs(desiredvnodes / 10) - 1); + indir_hashtbl = malloc(i * sizeof(indir_hashtbl[0]), M_FREEWORK, + M_WAITOK); + indir_hash = i - 1; + for (i = 0; i <= indir_hash; i++) + TAILQ_INIT(&indir_hashtbl[i]); /* initialise bioops hack */ bioops.io_start = softdep_disk_io_initiation; @@ -2077,6 +2307,7 @@ softdep_uninitialize() hashdestroy(inodedep_hashtbl, M_INODEDEP, inodedep_hash); hashdestroy(newblk_hashtbl, M_NEWBLK, newblk_hash); hashdestroy(bmsafemap_hashtbl, M_BMSAFEMAP, bmsafemap_hash); + free(indir_hashtbl, M_FREEWORK); } /* @@ -2108,6 +2339,7 @@ softdep_mount(devvp, mp, fs, cred) LIST_INIT(&ump->softdep_workitem_pending); LIST_INIT(&ump->softdep_journal_pending); TAILQ_INIT(&ump->softdep_unlinked); + LIST_INIT(&ump->softdep_dirtycg); ump->softdep_worklist_tail = NULL; ump->softdep_on_worklist = 0; ump->softdep_deps = 0; @@ -2570,6 +2802,7 @@ softdep_prealloc(vp, waitok) ffs_syncvnode(vp, waitok); ACQUIRE_LOCK(&lk); process_removes(vp); + process_truncates(vp); if (journal_space(ump, 0) == 0) { softdep_speedup(); if (journal_space(ump, 1) == 0) @@ -2604,12 +2837,14 @@ softdep_prelink(dvp, vp) ffs_syncvnode(dvp, MNT_WAIT); ACQUIRE_LOCK(&lk); /* Process vp before dvp as it may create .. removes. */ - if (vp) + if (vp) { process_removes(vp); + process_truncates(vp); + } process_removes(dvp); + process_truncates(dvp); softdep_speedup(); - process_worklist_item(UFSTOVFS(ump), LK_NOWAIT); - process_worklist_item(UFSTOVFS(ump), LK_NOWAIT); + process_worklist_item(UFSTOVFS(ump), 2, LK_NOWAIT); if (journal_space(ump, 0) == 0) { softdep_speedup(); if (journal_space(ump, 1) == 0) @@ -2717,7 +2952,7 @@ jfreeblk_write(jfreeblk, jseg, data) { struct jblkrec *rec; - jfreeblk->jf_jsegdep->jd_seg = jseg; + jfreeblk->jf_dep.jb_jsegdep->jd_seg = jseg; rec = (struct jblkrec *)data; rec->jb_op = JOP_FREEBLK; rec->jb_ino = jfreeblk->jf_ino; @@ -2753,6 +2988,7 @@ jtrunc_write(jtrunc, jseg, data) { struct jtrncrec *rec; + jtrunc->jt_dep.jb_jsegdep->jd_seg = jseg; rec = (struct jtrncrec *)data; rec->jt_op = JOP_TRUNC; rec->jt_ino = jtrunc->jt_ino; @@ -2760,6 +2996,21 @@ jtrunc_write(jtrunc, jseg, data) rec->jt_extsize = jtrunc->jt_extsize; } +static void +jfsync_write(jfsync, jseg, data) + struct jfsync *jfsync; + struct jseg *jseg; + uint8_t *data; +{ + struct jtrncrec *rec; + + rec = (struct jtrncrec *)data; + rec->jt_op = JOP_SYNC; + rec->jt_ino = jfsync->jfs_ino; + rec->jt_size = jfsync->jfs_size; + rec->jt_extsize = jfsync->jfs_extsize; +} + /* * Flush some journal records to disk. */ @@ -2909,7 +3160,7 @@ softdep_process_journal(mp, needwk, flags) if (wk == needwk) needwk = NULL; remove_from_journal(wk); - wk->wk_state |= IOSTARTED; + wk->wk_state |= INPROGRESS; WORKLIST_INSERT(&jseg->js_entries, wk); switch (wk->wk_type) { case D_JADDREF: @@ -2933,6 +3184,9 @@ softdep_process_journal(mp, needwk, flags) case D_JTRUNC: jtrunc_write(WK_JTRUNC(wk), jseg, data); break; + case D_JFSYNC: + jfsync_write(WK_JFSYNC(wk), jseg, data); + break; default: panic("process_journal: Unknown type %s", TYPENAME(wk->wk_type)); @@ -2956,7 +3210,7 @@ softdep_process_journal(mp, needwk, flags) * We only do the blocking wait once we find the journal * entry we're looking for. */ - if (needwk == NULL && flags & MNT_WAIT) + if (needwk == NULL && flags == MNT_WAIT) bwrite(bp); else bawrite(bp); @@ -2996,7 +3250,7 @@ complete_jseg(jseg) while ((wk = LIST_FIRST(&jseg->js_entries)) != NULL) { WORKLIST_REMOVE(wk); waiting = wk->wk_state & IOWAITING; - wk->wk_state &= ~(IOSTARTED | IOWAITING); + wk->wk_state &= ~(INPROGRESS | IOWAITING); wk->wk_state |= COMPLETE; KASSERT(i++ < jseg->js_cnt, ("handle_written_jseg: overflow %d >= %d", @@ -3009,26 +3263,29 @@ complete_jseg(jseg) handle_written_jremref(WK_JREMREF(wk)); break; case D_JMVREF: - /* No jsegdep here. */ - rele_jseg(jseg); + rele_jseg(jseg); /* No jsegdep. */ jmvref = WK_JMVREF(wk); LIST_REMOVE(jmvref, jm_deps); - free_pagedep(jmvref->jm_pagedep); + if ((jmvref->jm_pagedep->pd_state & ONWORKLIST) == 0) + free_pagedep(jmvref->jm_pagedep); WORKITEM_FREE(jmvref, D_JMVREF); break; case D_JNEWBLK: handle_written_jnewblk(WK_JNEWBLK(wk)); break; case D_JFREEBLK: - handle_written_jfreeblk(WK_JFREEBLK(wk)); + handle_written_jblkdep(&WK_JFREEBLK(wk)->jf_dep); + break; + case D_JTRUNC: + handle_written_jblkdep(&WK_JTRUNC(wk)->jt_dep); + break; + case D_JFSYNC: + rele_jseg(jseg); /* No jsegdep. */ + WORKITEM_FREE(wk, D_JFSYNC); break; case D_JFREEFRAG: handle_written_jfreefrag(WK_JFREEFRAG(wk)); break; - case D_JTRUNC: - WK_JTRUNC(wk)->jt_jsegdep->jd_seg = jseg; - WORKITEM_FREE(wk, D_JTRUNC); - break; default: panic("handle_written_jseg: Unknown type %s", TYPENAME(wk->wk_type)); @@ -3123,7 +3380,7 @@ handle_written_jremref(jremref) jremref->jr_dirrem = NULL; LIST_REMOVE(jremref, jr_deps); jsegdep->jd_state |= jremref->jr_state & MKDIR_PARENT; - WORKLIST_INSERT(&dirrem->dm_jwork, &jsegdep->jd_list); + jwork_insert(&dirrem->dm_jwork, jsegdep); if (LIST_EMPTY(&dirrem->dm_jremrefhd) && (dirrem->dm_state & COMPLETE) != 0) add_to_worklist(&dirrem->dm_list, 0); @@ -3183,7 +3440,7 @@ handle_written_jaddref(jaddref) mkdir->md_state |= DEPCOMPLETE; complete_mkdir(mkdir); } - WORKLIST_INSERT(&diradd->da_jwork, &jsegdep->jd_list); + jwork_insert(&diradd->da_jwork, jsegdep); if (jaddref->ja_state & NEWBLOCK) { inodedep->id_state |= ONDEPLIST; LIST_INSERT_HEAD(&inodedep->id_bmsafemap->sm_inodedephd, @@ -3205,10 +3462,9 @@ handle_written_jnewblk(jnewblk) { struct bmsafemap *bmsafemap; struct freefrag *freefrag; + struct freework *freework; struct jsegdep *jsegdep; struct newblk *newblk; - struct freework *freework; - struct indirdep *indirdep; /* Grab the jsegdep. */ jsegdep = jnewblk->jn_jsegdep; @@ -3225,10 +3481,13 @@ handle_written_jnewblk(jnewblk) */ newblk = WK_NEWBLK(jnewblk->jn_dep); newblk->nb_jnewblk = NULL; - bmsafemap = newblk->nb_bmsafemap; - newblk->nb_state |= ONDEPLIST; - LIST_INSERT_HEAD(&bmsafemap->sm_newblkhd, newblk, nb_deps); - WORKLIST_INSERT(&newblk->nb_jwork, &jsegdep->jd_list); + if ((newblk->nb_state & GOINGAWAY) == 0) { + bmsafemap = newblk->nb_bmsafemap; + newblk->nb_state |= ONDEPLIST; + LIST_INSERT_HEAD(&bmsafemap->sm_newblkhd, newblk, + nb_deps); + } + jwork_insert(&newblk->nb_jwork, jsegdep); break; case D_FREEFRAG: /* @@ -3245,15 +3504,8 @@ handle_written_jnewblk(jnewblk) */ freework = WK_FREEWORK(jnewblk->jn_dep); freework->fw_jnewblk = NULL; - WORKLIST_INSERT(&freework->fw_jwork, &jsegdep->jd_list); - break; - case D_INDIRDEP: - /* - * An indirect block was removed by truncate. - */ - indirdep = WK_INDIRDEP(jnewblk->jn_dep); - LIST_REMOVE(jnewblk, jn_indirdeps); - WORKLIST_INSERT(&indirdep->ir_jwork, &jsegdep->jd_list); + WORKLIST_INSERT(&freework->fw_freeblks->fb_jwork, + &jsegdep->jd_list); break; default: panic("handle_written_jnewblk: Unknown type %d.", @@ -3293,7 +3545,7 @@ free_jfreefrag(jfreefrag) struct jfreefrag *jfreefrag; { - if (jfreefrag->fr_state & IOSTARTED) + if (jfreefrag->fr_state & INPROGRESS) WORKLIST_REMOVE(&jfreefrag->fr_list); else if (jfreefrag->fr_state & ONWORKLIST) remove_from_journal(&jfreefrag->fr_list); @@ -3321,7 +3573,7 @@ handle_written_jfreefrag(jfreefrag) panic("handle_written_jfreefrag: No freefrag."); freefrag->ff_state |= DEPCOMPLETE; freefrag->ff_jdep = NULL; - WORKLIST_INSERT(&freefrag->ff_jwork, &jsegdep->jd_list); + jwork_insert(&freefrag->ff_jwork, jsegdep); if ((freefrag->ff_state & ALLCOMPLETE) == ALLCOMPLETE) add_to_worklist(&freefrag->ff_list, 0); jfreefrag->fr_freefrag = NULL; @@ -3335,30 +3587,26 @@ handle_written_jfreefrag(jfreefrag) * have been reclaimed. */ static void -handle_written_jfreeblk(jfreeblk) - struct jfreeblk *jfreeblk; +handle_written_jblkdep(jblkdep) + struct jblkdep *jblkdep; { struct freeblks *freeblks; struct jsegdep *jsegdep; /* Grab the jsegdep. */ - jsegdep = jfreeblk->jf_jsegdep; - jfreeblk->jf_jsegdep = NULL; - freeblks = jfreeblk->jf_freeblks; - LIST_REMOVE(jfreeblk, jf_deps); + jsegdep = jblkdep->jb_jsegdep; + jblkdep->jb_jsegdep = NULL; + freeblks = jblkdep->jb_freeblks; + LIST_REMOVE(jblkdep, jb_deps); WORKLIST_INSERT(&freeblks->fb_jwork, &jsegdep->jd_list); /* * If the freeblks is all journaled, we can add it to the worklist. */ - if (LIST_EMPTY(&freeblks->fb_jfreeblkhd) && - (freeblks->fb_state & ALLCOMPLETE) == ALLCOMPLETE) { - /* Remove from the b_dep that is waiting on this write. */ - if (freeblks->fb_state & ONWORKLIST) - WORKLIST_REMOVE(&freeblks->fb_list); - add_to_worklist(&freeblks->fb_list, 1); - } + if (LIST_EMPTY(&freeblks->fb_jblkdephd) && + (freeblks->fb_state & ALLCOMPLETE) == ALLCOMPLETE) + add_to_worklist(&freeblks->fb_list, WK_NODELAY); - free_jfreeblk(jfreeblk); + free_jblkdep(jblkdep); } static struct jsegdep * @@ -3480,9 +3728,12 @@ static void free_freedep(freedep) struct freedep *freedep; { + struct freework *freework; - if (--freedep->fd_freework->fw_ref == 0) - add_to_worklist(&freedep->fd_freework->fw_list, 1); + freework = freedep->fd_freework; + freework->fw_freeblks->fb_cgwait--; + if (--freework->fw_ref == 0) + freework_enqueue(freework); WORKITEM_FREE(freedep, D_FREEDEP); } @@ -3493,42 +3744,69 @@ free_freedep(freedep) * is visible outside of softdep_setup_freeblocks(). */ static struct freework * -newfreework(ump, freeblks, parent, lbn, nb, frags, journal) +newfreework(ump, freeblks, parent, lbn, nb, frags, off, journal) struct ufsmount *ump; struct freeblks *freeblks; struct freework *parent; ufs_lbn_t lbn; ufs2_daddr_t nb; int frags; + int off; int journal; { struct freework *freework; freework = malloc(sizeof(*freework), M_FREEWORK, M_SOFTDEP_FLAGS); workitem_alloc(&freework->fw_list, D_FREEWORK, freeblks->fb_list.wk_mp); + freework->fw_state = ATTACHED; freework->fw_jnewblk = NULL; freework->fw_freeblks = freeblks; freework->fw_parent = parent; freework->fw_lbn = lbn; freework->fw_blkno = nb; freework->fw_frags = frags; + freework->fw_indir = NULL; freework->fw_ref = ((UFSTOVFS(ump)->mnt_kern_flag & MNTK_SUJ) == 0 || lbn >= -NXADDR) ? 0 : NINDIR(ump->um_fs) + 1; - freework->fw_off = 0; - LIST_INIT(&freework->fw_jwork); - + freework->fw_start = freework->fw_off = off; + if (journal) + newjfreeblk(freeblks, lbn, nb, frags); if (parent == NULL) { - WORKLIST_INSERT_UNLOCKED(&freeblks->fb_freeworkhd, - &freework->fw_list); + ACQUIRE_LOCK(&lk); + WORKLIST_INSERT(&freeblks->fb_freeworkhd, &freework->fw_list); freeblks->fb_ref++; + FREE_LOCK(&lk); } - if (journal) - newjfreeblk(freeblks, lbn, nb, frags); return (freework); } /* + * Eliminate a jfreeblk for a block that does not need journaling. + */ +static void +cancel_jfreeblk(freeblks, blkno) + struct freeblks *freeblks; + ufs2_daddr_t blkno; +{ + struct jfreeblk *jfreeblk; + struct jblkdep *jblkdep; + + LIST_FOREACH(jblkdep, &freeblks->fb_jblkdephd, jb_deps) { + if (jblkdep->jb_list.wk_type != D_JFREEBLK) + continue; + jfreeblk = WK_JFREEBLK(&jblkdep->jb_list); + if (jfreeblk->jf_blkno == blkno) + break; + } + if (jblkdep == NULL) + return; + free_jsegdep(jblkdep->jb_jsegdep); + LIST_REMOVE(jblkdep, jb_deps); + WORKITEM_FREE(jfreeblk, D_JFREEBLK); +} + +/* * Allocate a new jfreeblk to journal top level block pointer when truncating * a file. The caller must add this to the worklist when lk is held. */ @@ -3542,20 +3820,43 @@ newjfreeblk(freeblks, lbn, blkno, frags) struct jfreeblk *jfreeblk; jfreeblk = malloc(sizeof(*jfreeblk), M_JFREEBLK, M_SOFTDEP_FLAGS); - workitem_alloc(&jfreeblk->jf_list, D_JFREEBLK, freeblks->fb_list.wk_mp); - jfreeblk->jf_jsegdep = newjsegdep(&jfreeblk->jf_list); - jfreeblk->jf_state = ATTACHED | DEPCOMPLETE; - jfreeblk->jf_ino = freeblks->fb_previousinum; + workitem_alloc(&jfreeblk->jf_dep.jb_list, D_JFREEBLK, + freeblks->fb_list.wk_mp); + jfreeblk->jf_dep.jb_jsegdep = newjsegdep(&jfreeblk->jf_dep.jb_list); + jfreeblk->jf_dep.jb_freeblks = freeblks; + jfreeblk->jf_ino = freeblks->fb_inum; jfreeblk->jf_lbn = lbn; jfreeblk->jf_blkno = blkno; jfreeblk->jf_frags = frags; - jfreeblk->jf_freeblks = freeblks; - LIST_INSERT_HEAD(&freeblks->fb_jfreeblkhd, jfreeblk, jf_deps); + LIST_INSERT_HEAD(&freeblks->fb_jblkdephd, &jfreeblk->jf_dep, jb_deps); return (jfreeblk); } -static void move_newblock_dep(struct jaddref *, struct inodedep *); +/* + * Allocate a new jtrunc to track a partial truncation. + */ +static struct jtrunc * +newjtrunc(freeblks, size, extsize) + struct freeblks *freeblks; + off_t size; + int extsize; +{ + struct jtrunc *jtrunc; + + jtrunc = malloc(sizeof(*jtrunc), M_JTRUNC, M_SOFTDEP_FLAGS); + workitem_alloc(&jtrunc->jt_dep.jb_list, D_JTRUNC, + freeblks->fb_list.wk_mp); + jtrunc->jt_dep.jb_jsegdep = newjsegdep(&jtrunc->jt_dep.jb_list); + jtrunc->jt_dep.jb_freeblks = freeblks; + jtrunc->jt_ino = freeblks->fb_inum; + jtrunc->jt_size = size; + jtrunc->jt_extsize = extsize; + LIST_INSERT_HEAD(&freeblks->fb_jblkdephd, &jtrunc->jt_dep, jb_deps); + + return (jtrunc); +} + /* * If we're canceling a new bitmap we have to search for another ref * to move into the bmsafemap dep. This might be better expressed @@ -3613,7 +3914,7 @@ cancel_jaddref(jaddref, inodedep, wkhd) KASSERT((jaddref->ja_state & COMPLETE) == 0, ("cancel_jaddref: Canceling complete jaddref")); - if (jaddref->ja_state & (IOSTARTED | COMPLETE)) + if (jaddref->ja_state & (INPROGRESS | COMPLETE)) needsj = 1; else needsj = 0; @@ -3637,15 +3938,12 @@ cancel_jaddref(jaddref, inodedep, wkhd) jsegdep = inoref_jseg(&jaddref->ja_ref); if (jaddref->ja_state & NEWBLOCK) move_newblock_dep(jaddref, inodedep); - if (jaddref->ja_state & IOWAITING) { - jaddref->ja_state &= ~IOWAITING; - wakeup(&jaddref->ja_list); - } + wake_worklist(&jaddref->ja_list); jaddref->ja_mkdir = NULL; - if (jaddref->ja_state & IOSTARTED) { - jaddref->ja_state &= ~IOSTARTED; + if (jaddref->ja_state & INPROGRESS) { + jaddref->ja_state &= ~INPROGRESS; WORKLIST_REMOVE(&jaddref->ja_list); - WORKLIST_INSERT(wkhd, &jsegdep->jd_list); + jwork_insert(wkhd, jsegdep); } else { free_jsegdep(jsegdep); if (jaddref->ja_state & DEPCOMPLETE) @@ -3694,7 +3992,7 @@ free_jaddref(jaddref) jaddref, jaddref->ja_state); if (jaddref->ja_state & NEWBLOCK) LIST_REMOVE(jaddref, ja_bmdeps); - if (jaddref->ja_state & (IOSTARTED | ONWORKLIST)) + if (jaddref->ja_state & (INPROGRESS | ONWORKLIST)) panic("free_jaddref: Bad state %p(0x%X)", jaddref, jaddref->ja_state); if (jaddref->ja_mkdir != NULL) @@ -3712,7 +4010,7 @@ free_jremref(jremref) if (jremref->jr_ref.if_jsegdep) free_jsegdep(jremref->jr_ref.if_jsegdep); - if (jremref->jr_state & IOSTARTED) + if (jremref->jr_state & INPROGRESS) panic("free_jremref: IO still pending"); WORKITEM_FREE(jremref, D_JREMREF); } @@ -3734,11 +4032,7 @@ free_jnewblk(jnewblk) } /* - * Cancel a jnewblk which has been superseded by a freeblk. The jnewblk - * is kept linked into the bmsafemap until the free completes, thus - * preventing the modified state from ever reaching disk. The free - * routine must pass this structure via ffs_blkfree() to - * softdep_setup_freeblks() so there is no race in releasing the space. + * Cancel a jnewblk which has been been made redundant by frag extension. */ static void cancel_jnewblk(jnewblk, wkhd) @@ -3753,27 +4047,30 @@ cancel_jnewblk(jnewblk, wkhd) jnewblk->jn_jsegdep = NULL; jnewblk->jn_dep = NULL; jnewblk->jn_state |= GOINGAWAY; - if (jnewblk->jn_state & IOSTARTED) { - jnewblk->jn_state &= ~IOSTARTED; + if (jnewblk->jn_state & INPROGRESS) { + jnewblk->jn_state &= ~INPROGRESS; WORKLIST_REMOVE(&jnewblk->jn_list); - WORKLIST_INSERT(wkhd, &jsegdep->jd_list); + jwork_insert(wkhd, jsegdep); } else { free_jsegdep(jsegdep); remove_from_journal(&jnewblk->jn_list); } - if (jnewblk->jn_state & IOWAITING) { - jnewblk->jn_state &= ~IOWAITING; - wakeup(&jnewblk->jn_list); - } + wake_worklist(&jnewblk->jn_list); WORKLIST_INSERT(wkhd, &jnewblk->jn_list); } static void -free_jfreeblk(jfreeblk) - struct jfreeblk *jfreeblk; +free_jblkdep(jblkdep) + struct jblkdep *jblkdep; { - WORKITEM_FREE(jfreeblk, D_JFREEBLK); + if (jblkdep->jb_list.wk_type == D_JFREEBLK) + WORKITEM_FREE(jblkdep, D_JFREEBLK); + else if (jblkdep->jb_list.wk_type == D_JTRUNC) + WORKITEM_FREE(jblkdep, D_JTRUNC); + else + panic("free_jblkdep: Unexpected type %s", + TYPENAME(jblkdep->jb_list.wk_type)); } /* @@ -3792,11 +4089,8 @@ free_jseg(jseg, jblocks) * Free freework structures that were lingering to indicate freed * indirect blocks that forced journal write ordering on reallocate. */ - while ((freework = LIST_FIRST(&jseg->js_indirs)) != NULL) { - LIST_REMOVE(freework, fw_next); - WORKLIST_REMOVE(&freework->fw_list); - WORKITEM_FREE(freework, D_FREEWORK); - } + while ((freework = LIST_FIRST(&jseg->js_indirs)) != NULL) + indirblk_remove(freework); if (jblocks->jb_oldestseg == jseg) jblocks->jb_oldestseg = TAILQ_NEXT(jseg, js_next); TAILQ_REMOVE(&jblocks->jb_segs, jseg, js_next); @@ -3887,24 +4181,53 @@ free_jsegdep(jsegdep) * Wait for a journal item to make it to disk. Initiate journal processing * if required. */ -static void -jwait(wk) +static int +jwait(wk, waitfor) struct worklist *wk; + int waitfor; { - stat_journal_wait++; + /* + * Blocking journal waits cause slow synchronous behavior. Record + * stats on the frequency of these blocking operations. + */ + if (waitfor == MNT_WAIT) { + stat_journal_wait++; + switch (wk->wk_type) { + case D_JREMREF: + case D_JMVREF: + stat_jwait_filepage++; + break; + case D_JTRUNC: + case D_JFREEBLK: + stat_jwait_freeblks++; + break; + case D_JNEWBLK: + stat_jwait_newblk++; + break; + case D_JADDREF: + stat_jwait_inode++; + break; + default: + break; + } + } /* * If IO has not started we process the journal. We can't mark the * worklist item as IOWAITING because we drop the lock while * processing the journal and the worklist entry may be freed after * this point. The caller may call back in and re-issue the request. */ - if ((wk->wk_state & IOSTARTED) == 0) { - softdep_process_journal(wk->wk_mp, wk, MNT_WAIT); - return; + if ((wk->wk_state & INPROGRESS) == 0) { + softdep_process_journal(wk->wk_mp, wk, waitfor); + if (waitfor != MNT_WAIT) + return (EBUSY); + return (0); } - wk->wk_state |= IOWAITING; - msleep(wk, &lk, PRIBIO, "jwait", 0); + if (waitfor != MNT_WAIT) + return (EBUSY); + wait_worklist(wk, "jwait"); + return (0); } /* @@ -3928,68 +4251,6 @@ inodedep_lookup_ip(ip) } /* - * Create a journal entry that describes a truncate that we're about to - * perform. The inode allocations and frees between here and the completion - * of the operation are done asynchronously and without journaling. At - * the end of the operation the vnode is sync'd and the journal space - * is released. Recovery will discover the partially completed truncate - * and complete it. - */ -void * -softdep_setup_trunc(vp, length, flags) - struct vnode *vp; - off_t length; - int flags; -{ - struct jsegdep *jsegdep; - struct jtrunc *jtrunc; - struct ufsmount *ump; - struct inode *ip; - - softdep_prealloc(vp, MNT_WAIT); - ip = VTOI(vp); - ump = VFSTOUFS(vp->v_mount); - jtrunc = malloc(sizeof(*jtrunc), M_JTRUNC, M_SOFTDEP_FLAGS); - workitem_alloc(&jtrunc->jt_list, D_JTRUNC, vp->v_mount); - jsegdep = jtrunc->jt_jsegdep = newjsegdep(&jtrunc->jt_list); - jtrunc->jt_ino = ip->i_number; - jtrunc->jt_extsize = 0; - jtrunc->jt_size = length; - if ((flags & IO_EXT) == 0 && ump->um_fstype == UFS2) - jtrunc->jt_extsize = ip->i_din2->di_extsize; - if ((flags & IO_NORMAL) == 0) - jtrunc->jt_size = DIP(ip, i_size); - ACQUIRE_LOCK(&lk); - add_to_journal(&jtrunc->jt_list); - while (jsegdep->jd_seg == NULL) { - stat_jwait_freeblks++; - jwait(&jtrunc->jt_list); - } - FREE_LOCK(&lk); - - return (jsegdep); -} - -/* - * After synchronous truncation is complete we free sync the vnode and - * release the jsegdep so the journal space can be freed. - */ -int -softdep_complete_trunc(vp, cookie) - struct vnode *vp; - void *cookie; -{ - int error; - - error = ffs_syncvnode(vp, MNT_WAIT); - ACQUIRE_LOCK(&lk); - free_jsegdep((struct jsegdep *)cookie); - FREE_LOCK(&lk); - - return (error); -} - -/* * Called prior to creating a new inode and linking it to a directory. The * jaddref structure must already be allocated by softdep_setup_inomapdep * and it is discovered here so we can initialize the mode and update @@ -4523,6 +4784,8 @@ bmsafemap_lookup(mp, bp, cg) LIST_INIT(&bmsafemap->sm_newblkwr); LIST_INIT(&bmsafemap->sm_jaddrefhd); LIST_INIT(&bmsafemap->sm_jnewblkhd); + LIST_INIT(&bmsafemap->sm_freehd); + LIST_INIT(&bmsafemap->sm_freewr); ACQUIRE_LOCK(&lk); if (bmsafemap_find(bmsafemaphd, mp, cg, &collision) == 1) { WORKITEM_FREE(bmsafemap, D_BMSAFEMAP); @@ -4530,6 +4793,7 @@ bmsafemap_lookup(mp, bp, cg) } bmsafemap->sm_cg = cg; LIST_INSERT_HEAD(bmsafemaphd, bmsafemap, sm_hash); + LIST_INSERT_HEAD(&VFSTOUFS(mp)->softdep_dirtycg, bmsafemap, sm_next); WORKLIST_INSERT(&bp->b_dep, &bmsafemap->sm_list); return (bmsafemap); } @@ -4609,10 +4873,9 @@ softdep_setup_allocdirect(ip, off, newblkno, oldblkno, newsize, oldsize, bp) * allocate an associated pagedep to track additions and * deletions. */ - if ((ip->i_mode & IFMT) == IFDIR && - pagedep_lookup(mp, ip->i_number, off, DEPALLOC, - &pagedep) == 0) - WORKLIST_INSERT(&bp->b_dep, &pagedep->pd_list); + if ((ip->i_mode & IFMT) == IFDIR) + pagedep_lookup(mp, bp, ip->i_number, off, DEPALLOC, + &pagedep); } if (newblk_lookup(mp, newblkno, 0, &newblk) == 0) panic("softdep_setup_allocdirect: lost block"); @@ -4751,7 +5014,6 @@ allocdirect_merge(adphead, newadp, oldadp) { struct worklist *wk; struct freefrag *freefrag; - struct newdirblk *newdirblk; freefrag = NULL; mtx_assert(&lk, MA_OWNED); @@ -4791,11 +5053,10 @@ allocdirect_merge(adphead, newadp, oldadp) * move it from the old allocdirect to the new allocdirect. */ if ((wk = LIST_FIRST(&oldadp->ad_newdirblk)) != NULL) { - newdirblk = WK_NEWDIRBLK(wk); - WORKLIST_REMOVE(&newdirblk->db_list); + WORKLIST_REMOVE(wk); if (!LIST_EMPTY(&oldadp->ad_newdirblk)) panic("allocdirect_merge: extra newdirblk"); - WORKLIST_INSERT(&newadp->ad_newdirblk, &newdirblk->db_list); + WORKLIST_INSERT(&newadp->ad_newdirblk, wk); } TAILQ_REMOVE(adphead, oldadp, ad_next); /* @@ -4814,9 +5075,8 @@ allocdirect_merge(adphead, newadp, oldadp) &oldadp->ad_block.nb_jnewblk->jn_list, &newadp->ad_block.nb_jwork); oldadp->ad_block.nb_jnewblk = NULL; - if (cancel_newblk(&oldadp->ad_block, NULL, - &newadp->ad_block.nb_jwork)) - panic("allocdirect_merge: Unexpected dependency."); + cancel_newblk(&oldadp->ad_block, NULL, + &newadp->ad_block.nb_jwork); } else { wk = (struct worklist *) cancel_newblk(&oldadp->ad_block, &freefrag->ff_list, &freefrag->ff_jwork); @@ -5084,6 +5344,7 @@ newallocindir(ip, ptrno, newblkno, oldblkno, lbn) aip = (struct allocindir *)newblk; aip->ai_offset = ptrno; aip->ai_oldblkno = oldblkno; + aip->ai_lbn = lbn; if ((jnewblk = newblk->nb_jnewblk) != NULL) { jnewblk->jn_ino = ip->i_number; jnewblk->jn_lbn = lbn; @@ -5110,6 +5371,7 @@ softdep_setup_allocindir_page(ip, lbn, bp, ptrno, newblkno, oldblkno, nbp) struct buf *nbp; /* buffer holding allocated page */ { struct inodedep *inodedep; + struct freefrag *freefrag; struct allocindir *aip; struct pagedep *pagedep; struct mount *mp; @@ -5126,12 +5388,13 @@ softdep_setup_allocindir_page(ip, lbn, bp, ptrno, newblkno, oldblkno, nbp) * allocate an associated pagedep to track additions and * deletions. */ - if ((ip->i_mode & IFMT) == IFDIR && - pagedep_lookup(mp, ip->i_number, lbn, DEPALLOC, &pagedep) == 0) - WORKLIST_INSERT(&nbp->b_dep, &pagedep->pd_list); + if ((ip->i_mode & IFMT) == IFDIR) + pagedep_lookup(mp, nbp, ip->i_number, lbn, DEPALLOC, &pagedep); WORKLIST_INSERT(&nbp->b_dep, &aip->ai_block.nb_list); - setup_allocindir_phase2(bp, ip, inodedep, aip, lbn); + freefrag = setup_allocindir_phase2(bp, ip, inodedep, aip, lbn); FREE_LOCK(&lk); + if (freefrag) + handle_workitem_freefrag(freefrag); } /* @@ -5155,7 +5418,8 @@ softdep_setup_allocindir_meta(nbp, ip, bp, ptrno, newblkno) aip = newallocindir(ip, ptrno, newblkno, 0, lbn); inodedep_lookup(UFSTOVFS(ip->i_ump), ip->i_number, DEPALLOC, &inodedep); WORKLIST_INSERT(&nbp->b_dep, &aip->ai_block.nb_list); - setup_allocindir_phase2(bp, ip, inodedep, aip, lbn); + if (setup_allocindir_phase2(bp, ip, inodedep, aip, lbn)) + panic("softdep_setup_allocindir_meta: Block already existed"); FREE_LOCK(&lk); } @@ -5166,7 +5430,7 @@ indirdep_complete(indirdep) struct allocindir *aip; LIST_REMOVE(indirdep, ir_next); - indirdep->ir_state &= ~ONDEPLIST; + indirdep->ir_state |= DEPCOMPLETE; while ((aip = LIST_FIRST(&indirdep->ir_completehd)) != NULL) { LIST_REMOVE(aip, ai_next); @@ -5181,124 +5445,131 @@ indirdep_complete(indirdep) free_indirdep(indirdep); } -/* - * Called to finish the allocation of the "aip" allocated - * by one of the two routines above. - */ -static void -setup_allocindir_phase2(bp, ip, inodedep, aip, lbn) - struct buf *bp; /* in-memory copy of the indirect block */ - struct inode *ip; /* inode for file being extended */ - struct inodedep *inodedep; /* Inodedep for ip */ - struct allocindir *aip; /* allocindir allocated by the above routines */ - ufs_lbn_t lbn; /* Logical block number for this block. */ +static struct indirdep * +indirdep_lookup(mp, ip, bp) + struct mount *mp; + struct inode *ip; + struct buf *bp; { + struct indirdep *indirdep, *newindirdep; + struct newblk *newblk; struct worklist *wk; struct fs *fs; - struct newblk *newblk; - struct indirdep *indirdep, *newindirdep; - struct allocindir *oldaip; - struct freefrag *freefrag; - struct mount *mp; ufs2_daddr_t blkno; - mp = UFSTOVFS(ip->i_ump); - fs = ip->i_fs; mtx_assert(&lk, MA_OWNED); - if (bp->b_lblkno >= 0) - panic("setup_allocindir_phase2: not indir blk"); - for (freefrag = NULL, indirdep = NULL, newindirdep = NULL; ; ) { + indirdep = NULL; + newindirdep = NULL; + fs = ip->i_fs; + for (;;) { LIST_FOREACH(wk, &bp->b_dep, wk_list) { if (wk->wk_type != D_INDIRDEP) continue; indirdep = WK_INDIRDEP(wk); break; } - if (indirdep == NULL && newindirdep) { - indirdep = newindirdep; - newindirdep = NULL; - WORKLIST_INSERT(&bp->b_dep, &indirdep->ir_list); - if (newblk_lookup(mp, dbtofsb(fs, bp->b_blkno), 0, - &newblk)) { - indirdep->ir_state |= ONDEPLIST; - LIST_INSERT_HEAD(&newblk->nb_indirdeps, - indirdep, ir_next); - } else - indirdep->ir_state |= DEPCOMPLETE; - } - if (indirdep) { - aip->ai_indirdep = indirdep; - /* - * Check to see if there is an existing dependency - * for this block. If there is, merge the old - * dependency into the new one. This happens - * as a result of reallocblk only. - */ - if (aip->ai_oldblkno == 0) - oldaip = NULL; - else - - LIST_FOREACH(oldaip, &indirdep->ir_deplisthd, - ai_next) - if (oldaip->ai_offset == aip->ai_offset) - break; - if (oldaip != NULL) - freefrag = allocindir_merge(aip, oldaip); - LIST_INSERT_HEAD(&indirdep->ir_deplisthd, aip, ai_next); - KASSERT(aip->ai_offset >= 0 && - aip->ai_offset < NINDIR(ip->i_ump->um_fs), - ("setup_allocindir_phase2: Bad offset %d", - aip->ai_offset)); - KASSERT(indirdep->ir_savebp != NULL, - ("setup_allocindir_phase2 NULL ir_savebp")); - if (ip->i_ump->um_fstype == UFS1) - ((ufs1_daddr_t *)indirdep->ir_savebp->b_data) - [aip->ai_offset] = aip->ai_oldblkno; - else - ((ufs2_daddr_t *)indirdep->ir_savebp->b_data) - [aip->ai_offset] = aip->ai_oldblkno; - FREE_LOCK(&lk); - if (freefrag != NULL) - handle_workitem_freefrag(freefrag); - } else - FREE_LOCK(&lk); - if (newindirdep) { - newindirdep->ir_savebp->b_flags |= B_INVAL | B_NOCACHE; - brelse(newindirdep->ir_savebp); - ACQUIRE_LOCK(&lk); - WORKITEM_FREE((caddr_t)newindirdep, D_INDIRDEP); - if (indirdep) - break; - FREE_LOCK(&lk); - } - if (indirdep) { - ACQUIRE_LOCK(&lk); + /* Found on the buffer worklist, no new structure to free. */ + if (indirdep != NULL && newindirdep == NULL) + return (indirdep); + if (indirdep != NULL && newindirdep != NULL) + panic("indirdep_lookup: simultaneous create"); + /* None found on the buffer and a new structure is ready. */ + if (indirdep == NULL && newindirdep != NULL) break; - } + /* None found and no new structure available. */ + FREE_LOCK(&lk); newindirdep = malloc(sizeof(struct indirdep), - M_INDIRDEP, M_SOFTDEP_FLAGS); + M_INDIRDEP, M_SOFTDEP_FLAGS); workitem_alloc(&newindirdep->ir_list, D_INDIRDEP, mp); newindirdep->ir_state = ATTACHED; if (ip->i_ump->um_fstype == UFS1) newindirdep->ir_state |= UFS1FMT; + TAILQ_INIT(&newindirdep->ir_trunc); newindirdep->ir_saveddata = NULL; LIST_INIT(&newindirdep->ir_deplisthd); LIST_INIT(&newindirdep->ir_donehd); LIST_INIT(&newindirdep->ir_writehd); LIST_INIT(&newindirdep->ir_completehd); - LIST_INIT(&newindirdep->ir_jwork); - LIST_INIT(&newindirdep->ir_jnewblkhd); if (bp->b_blkno == bp->b_lblkno) { ufs_bmaparray(bp->b_vp, bp->b_lblkno, &blkno, bp, NULL, NULL); bp->b_blkno = blkno; } + newindirdep->ir_freeblks = NULL; newindirdep->ir_savebp = getblk(ip->i_devvp, bp->b_blkno, bp->b_bcount, 0, 0, 0); + newindirdep->ir_bp = bp; BUF_KERNPROC(newindirdep->ir_savebp); bcopy(bp->b_data, newindirdep->ir_savebp->b_data, bp->b_bcount); ACQUIRE_LOCK(&lk); } + indirdep = newindirdep; + WORKLIST_INSERT(&bp->b_dep, &indirdep->ir_list); + /* + * If the block is not yet allocated we don't set DEPCOMPLETE so + * that we don't free dependencies until the pointers are valid. + * This could search b_dep for D_ALLOCDIRECT/D_ALLOCINDIR rather + * than using the hash. + */ + if (newblk_lookup(mp, dbtofsb(fs, bp->b_blkno), 0, &newblk)) + LIST_INSERT_HEAD(&newblk->nb_indirdeps, indirdep, ir_next); + else + indirdep->ir_state |= DEPCOMPLETE; + return (indirdep); +} + +/* + * Called to finish the allocation of the "aip" allocated + * by one of the two routines above. + */ +static struct freefrag * +setup_allocindir_phase2(bp, ip, inodedep, aip, lbn) + struct buf *bp; /* in-memory copy of the indirect block */ + struct inode *ip; /* inode for file being extended */ + struct inodedep *inodedep; /* Inodedep for ip */ + struct allocindir *aip; /* allocindir allocated by the above routines */ + ufs_lbn_t lbn; /* Logical block number for this block. */ +{ + struct fs *fs; + struct indirdep *indirdep; + struct allocindir *oldaip; + struct freefrag *freefrag; + struct mount *mp; + + mtx_assert(&lk, MA_OWNED); + mp = UFSTOVFS(ip->i_ump); + fs = ip->i_fs; + if (bp->b_lblkno >= 0) + panic("setup_allocindir_phase2: not indir blk"); + KASSERT(aip->ai_offset >= 0 && aip->ai_offset < NINDIR(fs), + ("setup_allocindir_phase2: Bad offset %d", aip->ai_offset)); + indirdep = indirdep_lookup(mp, ip, bp); + KASSERT(indirdep->ir_savebp != NULL, + ("setup_allocindir_phase2 NULL ir_savebp")); + aip->ai_indirdep = indirdep; + /* + * Check for an unwritten dependency for this indirect offset. If + * there is, merge the old dependency into the new one. This happens + * as a result of reallocblk only. + */ + freefrag = NULL; + if (aip->ai_oldblkno != 0) { + LIST_FOREACH(oldaip, &indirdep->ir_deplisthd, ai_next) { + if (oldaip->ai_offset == aip->ai_offset) { + freefrag = allocindir_merge(aip, oldaip); + goto done; + } + } + LIST_FOREACH(oldaip, &indirdep->ir_donehd, ai_next) { + if (oldaip->ai_offset == aip->ai_offset) { + freefrag = allocindir_merge(aip, oldaip); + goto done; + } + } + } +done: + LIST_INSERT_HEAD(&indirdep->ir_deplisthd, aip, ai_next); + return (freefrag); } /* @@ -5310,7 +5581,6 @@ allocindir_merge(aip, oldaip) struct allocindir *aip; struct allocindir *oldaip; { - struct newdirblk *newdirblk; struct freefrag *freefrag; struct worklist *wk; @@ -5326,11 +5596,10 @@ allocindir_merge(aip, oldaip) * move it from the old allocindir to the new allocindir. */ if ((wk = LIST_FIRST(&oldaip->ai_newdirblk)) != NULL) { - newdirblk = WK_NEWDIRBLK(wk); - WORKLIST_REMOVE(&newdirblk->db_list); + WORKLIST_REMOVE(wk); if (!LIST_EMPTY(&oldaip->ai_newdirblk)) panic("allocindir_merge: extra newdirblk"); - WORKLIST_INSERT(&aip->ai_newdirblk, &newdirblk->db_list); + WORKLIST_INSERT(&aip->ai_newdirblk, wk); } /* * We can skip journaling for this freefrag and just complete @@ -5363,7 +5632,7 @@ setup_freedirect(freeblks, ip, i, needj) DIP_SET(ip, i_db[i], 0); frags = sblksize(ip->i_fs, ip->i_size, i); frags = numfrags(ip->i_fs, frags); - newfreework(ip->i_ump, freeblks, NULL, i, blkno, frags, needj); + newfreework(ip->i_ump, freeblks, NULL, i, blkno, frags, 0, needj); } static inline void @@ -5382,15 +5651,15 @@ setup_freeext(freeblks, ip, i, needj) ip->i_din2->di_extb[i] = 0; frags = sblksize(ip->i_fs, ip->i_din2->di_extsize, i); frags = numfrags(ip->i_fs, frags); - newfreework(ip->i_ump, freeblks, NULL, -1 - i, blkno, frags, needj); + newfreework(ip->i_ump, freeblks, NULL, -1 - i, blkno, frags, 0, needj); } static inline void setup_freeindir(freeblks, ip, i, lbn, needj) struct freeblks *freeblks; struct inode *ip; - ufs_lbn_t lbn; int i; + ufs_lbn_t lbn; int needj; { ufs2_daddr_t blkno; @@ -5400,7 +5669,7 @@ setup_freeindir(freeblks, ip, i, lbn, needj) return; DIP_SET(ip, i_ib[i], 0); newfreework(ip->i_ump, freeblks, NULL, lbn, blkno, ip->i_fs->fs_frag, - needj); + 0, needj); } static inline struct freeblks * @@ -5413,17 +5682,616 @@ newfreeblks(mp, ip) freeblks = malloc(sizeof(struct freeblks), M_FREEBLKS, M_SOFTDEP_FLAGS|M_ZERO); workitem_alloc(&freeblks->fb_list, D_FREEBLKS, mp); - LIST_INIT(&freeblks->fb_jfreeblkhd); + LIST_INIT(&freeblks->fb_jblkdephd); LIST_INIT(&freeblks->fb_jwork); + freeblks->fb_ref = 0; + freeblks->fb_cgwait = 0; freeblks->fb_state = ATTACHED; freeblks->fb_uid = ip->i_uid; - freeblks->fb_previousinum = ip->i_number; + freeblks->fb_inum = ip->i_number; + freeblks->fb_modrev = DIP(ip, i_modrev); freeblks->fb_devvp = ip->i_devvp; freeblks->fb_chkcnt = 0; + freeblks->fb_freecnt = 0; + freeblks->fb_len = 0; return (freeblks); } +static void +trunc_indirdep(indirdep, freeblks, bp, off) + struct indirdep *indirdep; + struct freeblks *freeblks; + struct buf *bp; + int off; +{ + struct allocindir *aip, *aipn; + + /* + * The first set of allocindirs won't be in savedbp. + */ + LIST_FOREACH_SAFE(aip, &indirdep->ir_deplisthd, ai_next, aipn) + if (aip->ai_offset > off) + cancel_allocindir(aip, bp, freeblks, 1); + LIST_FOREACH_SAFE(aip, &indirdep->ir_donehd, ai_next, aipn) + if (aip->ai_offset > off) + cancel_allocindir(aip, bp, freeblks, 1); + /* + * These will exist in savedbp. + */ + LIST_FOREACH_SAFE(aip, &indirdep->ir_writehd, ai_next, aipn) + if (aip->ai_offset > off) + cancel_allocindir(aip, NULL, freeblks, 0); + LIST_FOREACH_SAFE(aip, &indirdep->ir_completehd, ai_next, aipn) + if (aip->ai_offset > off) + cancel_allocindir(aip, NULL, freeblks, 0); +} + +/* + * Follow the chain of indirects down to lastlbn creating a freework + * structure for each. This will be used to start indir_trunc() at + * the right offset and create the journal records for the parrtial + * truncation. A second step will handle the truncated dependencies. + */ +static int +setup_trunc_indir(freeblks, ip, lbn, lastlbn, blkno) + struct freeblks *freeblks; + struct inode *ip; + ufs_lbn_t lbn; + ufs_lbn_t lastlbn; + ufs2_daddr_t blkno; +{ + struct indirdep *indirdep; + struct indirdep *indirn; + struct freework *freework; + struct newblk *newblk; + struct mount *mp; + struct buf *bp; + uint8_t *start; + uint8_t *end; + ufs_lbn_t lbnadd; + int level; + int error; + int off; + + + freework = NULL; + if (blkno == 0) + return (0); + mp = freeblks->fb_list.wk_mp; + bp = getblk(ITOV(ip), lbn, mp->mnt_stat.f_iosize, 0, 0, 0); + if ((bp->b_flags & B_CACHE) == 0) { + bp->b_blkno = blkptrtodb(VFSTOUFS(mp), blkno); + bp->b_iocmd = BIO_READ; + bp->b_flags &= ~B_INVAL; + bp->b_ioflags &= ~BIO_ERROR; + vfs_busy_pages(bp, 0); + bp->b_iooffset = dbtob(bp->b_blkno); + bstrategy(bp); + curthread->td_ru.ru_inblock++; + error = bufwait(bp); + if (error) { + brelse(bp); + return (error); + } + } + level = lbn_level(lbn); + lbnadd = lbn_offset(ip->i_fs, level); + /* + * Compute the offset of the last block we want to keep. Store + * in the freework the first block we want to completely free. + */ + off = (lastlbn - -(lbn + level)) / lbnadd; + if (off + 1 == NINDIR(ip->i_fs)) + goto nowork; + freework = newfreework(ip->i_ump, freeblks, NULL, lbn, blkno, 0, off+1, + 0); + /* + * Link the freework into the indirdep. This will prevent any new + * allocations from proceeding until we are finished with the + * truncate and the block is written. + */ + ACQUIRE_LOCK(&lk); + indirdep = indirdep_lookup(mp, ip, bp); + if (indirdep->ir_freeblks) + panic("setup_trunc_indir: indirdep already truncated."); + TAILQ_INSERT_TAIL(&indirdep->ir_trunc, freework, fw_next); + freework->fw_indir = indirdep; + /* + * Cancel any allocindirs that will not make it to disk. + * We have to do this for all copies of the indirdep that + * live on this newblk. + */ + if ((indirdep->ir_state & DEPCOMPLETE) == 0) { + newblk_lookup(mp, dbtofsb(ip->i_fs, bp->b_blkno), 0, &newblk); + LIST_FOREACH(indirn, &newblk->nb_indirdeps, ir_next) + trunc_indirdep(indirn, freeblks, bp, off); + } else + trunc_indirdep(indirdep, freeblks, bp, off); + FREE_LOCK(&lk); + /* + * Creation is protected by the buf lock. The saveddata is only + * needed if a full truncation follows a partial truncation but it + * is difficult to allocate in that case so we fetch it anyway. + */ + if (indirdep->ir_saveddata == NULL) + indirdep->ir_saveddata = malloc(bp->b_bcount, M_INDIRDEP, + M_SOFTDEP_FLAGS); +nowork: + /* Fetch the blkno of the child and the zero start offset. */ + if (ip->i_ump->um_fstype == UFS1) { + blkno = ((ufs1_daddr_t *)bp->b_data)[off]; + start = (uint8_t *)&((ufs1_daddr_t *)bp->b_data)[off+1]; + } else { + blkno = ((ufs2_daddr_t *)bp->b_data)[off]; + start = (uint8_t *)&((ufs2_daddr_t *)bp->b_data)[off+1]; + } + if (freework) { + /* Zero the truncated pointers. */ + end = bp->b_data + bp->b_bcount; + bzero(start, end - start); + bdwrite(bp); + } else + bqrelse(bp); + if (level == 0) + return (0); + lbn++; /* adjust level */ + lbn -= (off * lbnadd); + return setup_trunc_indir(freeblks, ip, lbn, lastlbn, blkno); +} + +/* + * Complete the partial truncation of an indirect block setup by + * setup_trunc_indir(). This zeros the truncated pointers in the saved + * copy and writes them to disk before the freeblks is allowed to complete. + */ +static void +complete_trunc_indir(freework) + struct freework *freework; +{ + struct freework *fwn; + struct indirdep *indirdep; + struct buf *bp; + uintptr_t start; + int count; + + indirdep = freework->fw_indir; + for (;;) { + bp = indirdep->ir_bp; + /* See if the block was discarded. */ + if (bp == NULL) + break; + /* Inline part of getdirtybuf(). We dont want bremfree. */ + if (BUF_LOCK(bp, LK_EXCLUSIVE | LK_NOWAIT, NULL) == 0) + break; + if (BUF_LOCK(bp, + LK_EXCLUSIVE | LK_SLEEPFAIL | LK_INTERLOCK, &lk) == 0) + BUF_UNLOCK(bp); + ACQUIRE_LOCK(&lk); + } + mtx_assert(&lk, MA_OWNED); + freework->fw_state |= DEPCOMPLETE; + TAILQ_REMOVE(&indirdep->ir_trunc, freework, fw_next); + /* + * Zero the pointers in the saved copy. + */ + if (indirdep->ir_state & UFS1FMT) + start = sizeof(ufs1_daddr_t); + else + start = sizeof(ufs2_daddr_t); + start *= freework->fw_start; + count = indirdep->ir_savebp->b_bcount - start; + start += (uintptr_t)indirdep->ir_savebp->b_data; + bzero((char *)start, count); + /* + * We need to start the next truncation in the list if it has not + * been started yet. + */ + fwn = TAILQ_FIRST(&indirdep->ir_trunc); + if (fwn != NULL) { + if (fwn->fw_freeblks == indirdep->ir_freeblks) + TAILQ_REMOVE(&indirdep->ir_trunc, fwn, fw_next); + if ((fwn->fw_state & ONWORKLIST) == 0) + freework_enqueue(fwn); + } + /* + * If bp is NULL the block was fully truncated, restore + * the saved block list otherwise free it if it is no + * longer needed. + */ + if (TAILQ_EMPTY(&indirdep->ir_trunc)) { + if (bp == NULL) + bcopy(indirdep->ir_saveddata, + indirdep->ir_savebp->b_data, + indirdep->ir_savebp->b_bcount); + free(indirdep->ir_saveddata, M_INDIRDEP); + indirdep->ir_saveddata = NULL; + } + /* + * When bp is NULL there is a full truncation pending. We + * must wait for this full truncation to be journaled before + * we can release this freework because the disk pointers will + * never be written as zero. + */ + if (bp == NULL) { + if (LIST_EMPTY(&indirdep->ir_freeblks->fb_jblkdephd)) + handle_written_freework(freework, 0); + else + WORKLIST_INSERT(&indirdep->ir_freeblks->fb_freeworkhd, + &freework->fw_list); + } else { + /* Complete when the real copy is written. */ + WORKLIST_INSERT(&bp->b_dep, &freework->fw_list); + BUF_UNLOCK(bp); + } +} + +/* + * Calculate the number of blocks we are going to release where datablocks + * is the current total and length is the new file size. + */ +ufs2_daddr_t +blkcount(fs, datablocks, length) + struct fs *fs; + ufs2_daddr_t datablocks; + off_t length; +{ + off_t totblks, numblks; + + totblks = 0; + numblks = howmany(length, fs->fs_bsize); + if (numblks <= NDADDR) { + totblks = howmany(length, fs->fs_fsize); + goto out; + } + totblks = blkstofrags(fs, numblks); + numblks -= NDADDR; + /* + * Count all single, then double, then triple indirects required. + * Subtracting one indirects worth of blocks for each pass + * acknowledges one of each pointed to by the inode. + */ + for (;;) { + totblks += blkstofrags(fs, howmany(numblks, NINDIR(fs))); + numblks -= NINDIR(fs); + if (numblks <= 0) + break; + numblks = howmany(numblks, NINDIR(fs)); + } +out: + totblks = fsbtodb(fs, totblks); + /* + * Handle sparse files. We can't reclaim more blocks than the inode + * references. We will correct it later in handle_complete_freeblks() + * when we know the real count. + */ + if (totblks > datablocks) + return (0); + return (totblks - datablocks); +} + +/* + * Handle freeblocks for journaled softupdate filesystems. + * + * Contrary to normal softupdates, we must preserve the block pointers in + * indirects until their subordinates are free. This is to avoid journaling + * every block that is freed which may consume more space than the journal + * itself. The recovery program will see the free block journals at the + * base of the truncated area and traverse them to reclaim space. The + * pointers in the inode may be cleared immediately after the journal + * records are written because each direct and indirect pointer in the + * inode is recorded in a journal. This permits full truncation to proceed + * asynchronously. The write order is journal -> inode -> cgs -> indirects. + * + * The algorithm is as follows: + * 1) Traverse the in-memory state and create journal entries to release + * the relevant blocks and full indirect trees. + * 2) Traverse the indirect block chain adding partial truncation freework + * records to indirects in the path to lastlbn. The freework will + * prevent new allocation dependencies from being satisfied in this + * indirect until the truncation completes. + * 3) Read and lock the inode block, performing an update with the new size + * and pointers. This prevents truncated data from becoming valid on + * disk through step 4. + * 4) Reap unsatisfied dependencies that are beyond the truncated area, + * eliminate journal work for those records that do not require it. + * 5) Schedule the journal records to be written followed by the inode block. + * 6) Allocate any necessary frags for the end of file. + * 7) Zero any partially truncated blocks. + * + * From this truncation proceeds asynchronously using the freework and + * indir_trunc machinery. The file will not be extended again into a + * partially truncated indirect block until all work is completed but + * the normal dependency mechanism ensures that it is rolled back/forward + * as appropriate. Further truncation may occur without delay and is + * serialized in indir_trunc(). + */ +void +softdep_journal_freeblocks(ip, cred, length, flags) + struct inode *ip; /* The inode whose length is to be reduced */ + struct ucred *cred; + off_t length; /* The new length for the file */ + int flags; /* IO_EXT and/or IO_NORMAL */ +{ + struct freeblks *freeblks, *fbn; + struct inodedep *inodedep; + struct jblkdep *jblkdep; + struct allocdirect *adp, *adpn; + struct fs *fs; + struct buf *bp; + struct vnode *vp; + struct mount *mp; + ufs2_daddr_t extblocks, datablocks; + ufs_lbn_t tmpval, lbn, lastlbn; + int frags; + int lastoff, iboff; + int allocblock; + int error, i; + int needj; + + fs = ip->i_fs; + mp = UFSTOVFS(ip->i_ump); + vp = ITOV(ip); + needj = 1; + iboff = -1; + allocblock = 0; + extblocks = 0; + datablocks = 0; + frags = 0; + freeblks = newfreeblks(mp, ip); + ACQUIRE_LOCK(&lk); + /* + * If we're truncating a removed file that will never be written + * we don't need to journal the block frees. The canceled journals + * for the allocations will suffice. + */ + inodedep_lookup(mp, ip->i_number, DEPALLOC, &inodedep); + if ((inodedep->id_state & (UNLINKED | DEPCOMPLETE)) == UNLINKED && + length == 0) + needj = 0; + FREE_LOCK(&lk); + /* + * Calculate the lbn that we are truncating to. This results in -1 + * if we're truncating the 0 bytes. So it is the last lbn we want + * to keep, not the first lbn we want to truncate. + */ + lastlbn = lblkno(fs, length + fs->fs_bsize - 1) - 1; + lastoff = blkoff(fs, length); + /* + * Compute frags we are keeping in lastlbn. 0 means all. + */ + if (lastlbn >= 0 && lastlbn < NDADDR) { + frags = fragroundup(fs, lastoff); + /* adp offset of last valid allocdirect. */ + iboff = lastlbn; + } else if (lastlbn > 0) + iboff = NDADDR; + if (fs->fs_magic == FS_UFS2_MAGIC) + extblocks = btodb(fragroundup(fs, ip->i_din2->di_extsize)); + /* + * Handle normal data blocks and indirects. This section saves + * values used after the inode update to complete frag and indirect + * truncation. + */ + if ((flags & IO_NORMAL) != 0) { + /* + * Handle truncation of whole direct and indirect blocks. + */ + for (i = iboff + 1; i < NDADDR; i++) + setup_freedirect(freeblks, ip, i, needj); + for (i = 0, tmpval = NINDIR(fs), lbn = NDADDR; i < NIADDR; + i++, lbn += tmpval, tmpval *= NINDIR(fs)) { + /* Release a whole indirect tree. */ + if (lbn > lastlbn) { + setup_freeindir(freeblks, ip, i, -lbn -i, + needj); + continue; + } + iboff = i + NDADDR; + /* + * Traverse partially truncated indirect tree. + */ + if (lbn <= lastlbn && lbn + tmpval - 1 > lastlbn) + setup_trunc_indir(freeblks, ip, -lbn - i, + lastlbn, DIP(ip, i_ib[i])); + } + /* + * Handle partial truncation to a frag boundary. + */ + if (frags) { + ufs2_daddr_t blkno; + long oldfrags; + + oldfrags = blksize(fs, ip, lastlbn); + blkno = DIP(ip, i_db[lastlbn]); + if (blkno && oldfrags != frags) { + oldfrags -= frags; + oldfrags = numfrags(ip->i_fs, oldfrags); + blkno += numfrags(ip->i_fs, frags); + newfreework(ip->i_ump, freeblks, NULL, lastlbn, + blkno, oldfrags, 0, needj); + } else if (blkno == 0) + allocblock = 1; + } + /* + * Add a journal record for partial truncate if we are + * handling indirect blocks. Non-indirects need no extra + * journaling. + */ + if (length != 0 && lastlbn >= NDADDR) { + ip->i_flag |= IN_TRUNCATED; + newjtrunc(freeblks, length, 0); + } + ip->i_size = length; + DIP_SET(ip, i_size, ip->i_size); + datablocks = DIP(ip, i_blocks) - extblocks; + if (length != 0) + datablocks = blkcount(ip->i_fs, datablocks, length); + freeblks->fb_len = length; + } + if ((flags & IO_EXT) != 0) { + for (i = 0; i < NXADDR; i++) + setup_freeext(freeblks, ip, i, needj); + ip->i_din2->di_extsize = 0; + datablocks += extblocks; + } +#ifdef QUOTA + /* Reference the quotas in case the block count is wrong in the end. */ + quotaref(vp, freeblks->fb_quota); + (void) chkdq(ip, -datablocks, NOCRED, 0); +#endif + freeblks->fb_chkcnt = datablocks; + UFS_LOCK(ip->i_ump); + fs->fs_pendingblocks += datablocks; + UFS_UNLOCK(ip->i_ump); + DIP_SET(ip, i_blocks, DIP(ip, i_blocks) - datablocks); + /* + * Handle truncation of incomplete alloc direct dependencies. We + * hold the inode block locked to prevent incomplete dependencies + * from reaching the disk while we are eliminating those that + * have been truncated. This is a partially inlined ffs_update(). + */ + ufs_itimes(vp); + ip->i_flag &= ~(IN_LAZYACCESS | IN_LAZYMOD | IN_MODIFIED); + error = bread(ip->i_devvp, fsbtodb(fs, ino_to_fsba(fs, ip->i_number)), + (int)fs->fs_bsize, cred, &bp); + if (error) { + brelse(bp); + softdep_error("softdep_journal_freeblocks", error); + return; + } + if (bp->b_bufsize == fs->fs_bsize) + bp->b_flags |= B_CLUSTEROK; + softdep_update_inodeblock(ip, bp, 0); + if (ip->i_ump->um_fstype == UFS1) + *((struct ufs1_dinode *)bp->b_data + + ino_to_fsbo(fs, ip->i_number)) = *ip->i_din1; + else + *((struct ufs2_dinode *)bp->b_data + + ino_to_fsbo(fs, ip->i_number)) = *ip->i_din2; + ACQUIRE_LOCK(&lk); + (void) inodedep_lookup(mp, ip->i_number, DEPALLOC, &inodedep); + if ((inodedep->id_state & IOSTARTED) != 0) + panic("softdep_setup_freeblocks: inode busy"); + /* + * Add the freeblks structure to the list of operations that + * must await the zero'ed inode being written to disk. If we + * still have a bitmap dependency (needj), then the inode + * has never been written to disk, so we can process the + * freeblks below once we have deleted the dependencies. + */ + if (needj) + WORKLIST_INSERT(&bp->b_dep, &freeblks->fb_list); + else + freeblks->fb_state |= COMPLETE; + if ((flags & IO_NORMAL) != 0) { + TAILQ_FOREACH_SAFE(adp, &inodedep->id_inoupdt, ad_next, adpn) { + if (adp->ad_offset > iboff) + cancel_allocdirect(&inodedep->id_inoupdt, adp, + freeblks); + /* + * Truncate the allocdirect. We could eliminate + * or modify journal records as well. + */ + else if (adp->ad_offset == iboff && frags) + adp->ad_newsize = frags; + } + } + if ((flags & IO_EXT) != 0) + while ((adp = TAILQ_FIRST(&inodedep->id_extupdt)) != 0) + cancel_allocdirect(&inodedep->id_extupdt, adp, + freeblks); + /* + * Add journal work. + */ + LIST_FOREACH(jblkdep, &freeblks->fb_jblkdephd, jb_deps) + add_to_journal(&jblkdep->jb_list); + FREE_LOCK(&lk); + bdwrite(bp); + /* + * Truncate dependency structures beyond length. + */ + trunc_dependencies(ip, freeblks, lastlbn, frags, flags); + /* + * This is only set when we need to allocate a fragment because + * none existed at the end of a frag-sized file. It handles only + * allocating a new, zero filled block. + */ + if (allocblock) { + ip->i_size = length - lastoff; + DIP_SET(ip, i_size, ip->i_size); + error = UFS_BALLOC(vp, length - 1, 1, cred, BA_CLRBUF, &bp); + if (error != 0) { + softdep_error("softdep_journal_freeblks", error); + return; + } + ip->i_size = length; + DIP_SET(ip, i_size, length); + ip->i_flag |= IN_CHANGE | IN_UPDATE; + allocbuf(bp, frags); + ffs_update(vp, MNT_NOWAIT); + bawrite(bp); + } else if (lastoff != 0 && vp->v_type != VDIR) { + int size; + + /* + * Zero the end of a truncated frag or block. + */ + size = sblksize(fs, length, lastlbn); + error = bread(vp, lastlbn, size, cred, &bp); + if (error) { + softdep_error("softdep_journal_freeblks", error); + return; + } + bzero((char *)bp->b_data + lastoff, size - lastoff); + bawrite(bp); + + } + ACQUIRE_LOCK(&lk); + inodedep_lookup(mp, ip->i_number, DEPALLOC, &inodedep); + TAILQ_INSERT_TAIL(&inodedep->id_freeblklst, freeblks, fb_next); + freeblks->fb_state |= DEPCOMPLETE | ONDEPLIST; + /* + * We zero earlier truncations so they don't erroneously + * update i_blocks. + */ + if (freeblks->fb_len == 0 && (flags & IO_NORMAL) != 0) + TAILQ_FOREACH(fbn, &inodedep->id_freeblklst, fb_next) + fbn->fb_len = 0; + if ((freeblks->fb_state & ALLCOMPLETE) == ALLCOMPLETE && + LIST_EMPTY(&freeblks->fb_jblkdephd)) + freeblks->fb_state |= INPROGRESS; + else + freeblks = NULL; + FREE_LOCK(&lk); + if (freeblks) + handle_workitem_freeblocks(freeblks, 0); + trunc_pages(ip, length, extblocks, flags); + +} + +/* + * Flush a JOP_SYNC to the journal. + */ +void +softdep_journal_fsync(ip) + struct inode *ip; +{ + struct jfsync *jfsync; + + if ((ip->i_flag & IN_TRUNCATED) == 0) + return; + ip->i_flag &= ~IN_TRUNCATED; + jfsync = malloc(sizeof(*jfsync), M_JFSYNC, M_SOFTDEP_FLAGS | M_ZERO); + workitem_alloc(&jfsync->jfs_list, D_JFSYNC, UFSTOVFS(ip->i_ump)); + jfsync->jfs_size = ip->i_size; + jfsync->jfs_ino = ip->i_number; + ACQUIRE_LOCK(&lk); + add_to_journal(&jfsync->jfs_list); + jwait(&jfsync->jfs_list, MNT_WAIT); + FREE_LOCK(&lk); +} + /* * Block de-allocation dependencies. * @@ -5464,7 +6332,6 @@ softdep_setup_freeblocks(ip, length, flags) struct freeblks *freeblks; struct inodedep *inodedep; struct allocdirect *adp; - struct jfreeblk *jfreeblk; struct buf *bp; struct fs *fs; ufs2_daddr_t extblocks, datablocks; @@ -5472,52 +6339,42 @@ softdep_setup_freeblocks(ip, length, flags) int i, delay, error; ufs_lbn_t tmpval; ufs_lbn_t lbn; - int needj; fs = ip->i_fs; mp = UFSTOVFS(ip->i_ump); if (length != 0) panic("softdep_setup_freeblocks: non-zero length"); freeblks = newfreeblks(mp, ip); - ACQUIRE_LOCK(&lk); - /* - * If we're truncating a removed file that will never be written - * we don't need to journal the block frees. The canceled journals - * for the allocations will suffice. - */ - inodedep_lookup(mp, ip->i_number, DEPALLOC, &inodedep); - if ((inodedep->id_state & (UNLINKED | DEPCOMPLETE)) == UNLINKED || - (fs->fs_flags & FS_SUJ) == 0) - needj = 0; - else - needj = 1; - FREE_LOCK(&lk); extblocks = 0; + datablocks = 0; if (fs->fs_magic == FS_UFS2_MAGIC) extblocks = btodb(fragroundup(fs, ip->i_din2->di_extsize)); - datablocks = DIP(ip, i_blocks) - extblocks; if ((flags & IO_NORMAL) != 0) { for (i = 0; i < NDADDR; i++) - setup_freedirect(freeblks, ip, i, needj); + setup_freedirect(freeblks, ip, i, 0); for (i = 0, tmpval = NINDIR(fs), lbn = NDADDR; i < NIADDR; i++, lbn += tmpval, tmpval *= NINDIR(fs)) - setup_freeindir(freeblks, ip, i, -lbn -i, needj); + setup_freeindir(freeblks, ip, i, -lbn -i, 0); ip->i_size = 0; DIP_SET(ip, i_size, 0); - freeblks->fb_chkcnt = datablocks; - UFS_LOCK(ip->i_ump); - fs->fs_pendingblocks += datablocks; - UFS_UNLOCK(ip->i_ump); + datablocks = DIP(ip, i_blocks) - extblocks; } if ((flags & IO_EXT) != 0) { for (i = 0; i < NXADDR; i++) - setup_freeext(freeblks, ip, i, needj); + setup_freeext(freeblks, ip, i, 0); ip->i_din2->di_extsize = 0; - freeblks->fb_chkcnt += extblocks; + datablocks += extblocks; } - if (LIST_EMPTY(&freeblks->fb_jfreeblkhd)) - needj = 0; - DIP_SET(ip, i_blocks, DIP(ip, i_blocks) - freeblks->fb_chkcnt); +#ifdef QUOTA + /* Reference the quotas in case the block count is wrong in the end. */ + quotaref(vp, freeblks->fb_quota); + (void) chkdq(ip, -datablocks, NOCRED, 0); +#endif + freeblks->fb_chkcnt = datablocks; + UFS_LOCK(ip->i_ump); + fs->fs_pendingblocks += datablocks; + UFS_UNLOCK(ip->i_ump); + DIP_SET(ip, i_blocks, DIP(ip, i_blocks) - datablocks); /* * Push the zero'ed inode to to its disk buffer so that we are free * to delete its dependencies below. Once the dependencies are gone @@ -5557,7 +6414,7 @@ softdep_setup_freeblocks(ip, length, flags) delay = (inodedep->id_state & DEPCOMPLETE); if (delay) WORKLIST_INSERT(&bp->b_dep, &freeblks->fb_list); - else if (needj) + else freeblks->fb_state |= COMPLETE; /* * Because the file length has been truncated to zero, any @@ -5573,67 +6430,145 @@ softdep_setup_freeblocks(ip, length, flags) &inodedep->id_inoupdt); while ((adp = TAILQ_FIRST(&inodedep->id_inoupdt)) != 0) cancel_allocdirect(&inodedep->id_inoupdt, adp, - freeblks, delay); + freeblks); } if (flags & IO_EXT) { merge_inode_lists(&inodedep->id_newextupdt, &inodedep->id_extupdt); while ((adp = TAILQ_FIRST(&inodedep->id_extupdt)) != 0) cancel_allocdirect(&inodedep->id_extupdt, adp, - freeblks, delay); + freeblks); } - LIST_FOREACH(jfreeblk, &freeblks->fb_jfreeblkhd, jf_deps) - add_to_journal(&jfreeblk->jf_list); - FREE_LOCK(&lk); bdwrite(bp); - softdep_trunc_deps(ITOV(ip), freeblks, 0, 0, flags); + trunc_dependencies(ip, freeblks, -1, 0, flags); ACQUIRE_LOCK(&lk); if (inodedep_lookup(mp, ip->i_number, 0, &inodedep) != 0) (void) free_inodedep(inodedep); + freeblks->fb_state |= DEPCOMPLETE; + /* + * If the inode with zeroed block pointers is now on disk + * we can start freeing blocks. + */ + if ((freeblks->fb_state & ALLCOMPLETE) == ALLCOMPLETE) + freeblks->fb_state |= INPROGRESS; + else + freeblks = NULL; + FREE_LOCK(&lk); + if (freeblks) + handle_workitem_freeblocks(freeblks, 0); + trunc_pages(ip, length, extblocks, flags); +} - if (delay || needj) - freeblks->fb_state |= DEPCOMPLETE; - if (delay) { - /* - * If the inode with zeroed block pointers is now on disk - * we can start freeing blocks. Add freeblks to the worklist - * instead of calling handle_workitem_freeblocks directly as - * it is more likely that additional IO is needed to complete - * the request here than in the !delay case. - */ - if ((freeblks->fb_state & ALLCOMPLETE) == ALLCOMPLETE) - add_to_worklist(&freeblks->fb_list, 1); - } - if (needj && LIST_EMPTY(&freeblks->fb_jfreeblkhd)) - needj = 0; +/* + * Eliminate pages from the page cache that back parts of this inode and + * adjust the vnode pager's idea of our size. This prevents stale data + * from hanging around in the page cache. + */ +static void +trunc_pages(ip, length, extblocks, flags) + struct inode *ip; + off_t length; + ufs2_daddr_t extblocks; + int flags; +{ + struct vnode *vp; + struct fs *fs; + ufs_lbn_t lbn; + off_t end, extend; - FREE_LOCK(&lk); + vp = ITOV(ip); + fs = ip->i_fs; + extend = OFF_TO_IDX(lblktosize(fs, -extblocks)); + if ((flags & IO_EXT) != 0) + ffs_pages_remove(vp, extend, 0); + if ((flags & IO_NORMAL) == 0) + return; + BO_LOCK(&vp->v_bufobj); + drain_output(vp); + BO_UNLOCK(&vp->v_bufobj); /* - * If the inode has never been written to disk (delay == 0) and - * we're not waiting on any journal writes, then we can process the - * freeblks now that we have deleted the dependencies. + * The vnode pager eliminates file pages we eliminate indirects + * below. */ - if (!delay && !needj) - handle_workitem_freeblocks(freeblks, 0); + vnode_pager_setsize(vp, length); + /* + * Calculate the end based on the last indirect we want to keep. If + * the block extends into indirects we can just use the negative of + * its lbn. Doubles and triples exist at lower numbers so we must + * be careful not to remove those, if they exist. double and triple + * indirect lbns do not overlap with others so it is not important + * to verify how many levels are required. + */ + lbn = lblkno(fs, length); + if (lbn >= NDADDR) { + /* Calculate the virtual lbn of the triple indirect. */ + lbn = -lbn - (NIADDR - 1); + end = OFF_TO_IDX(lblktosize(fs, lbn)); + } else + end = extend; + ffs_pages_remove(vp, OFF_TO_IDX(OFF_MAX), end); +} + +/* + * See if the buf bp is in the range eliminated by truncation. + */ +static int +trunc_check_buf(bp, blkoffp, lastlbn, lastoff, flags) + struct buf *bp; + int *blkoffp; + ufs_lbn_t lastlbn; + int lastoff; + int flags; +{ + ufs_lbn_t lbn; + + *blkoffp = 0; + /* Only match ext/normal blocks as appropriate. */ + if (((flags & IO_EXT) == 0 && (bp->b_xflags & BX_ALTDATA)) || + ((flags & IO_NORMAL) == 0 && (bp->b_xflags & BX_ALTDATA) == 0)) + return (0); + /* ALTDATA is always a full truncation. */ + if ((bp->b_xflags & BX_ALTDATA) != 0) + return (1); + /* -1 is full truncation. */ + if (lastlbn == -1) + return (1); + /* + * If this is a partial truncate we only want those + * blocks and indirect blocks that cover the range + * we're after. + */ + lbn = bp->b_lblkno; + if (lbn < 0) + lbn = -(lbn + lbn_level(lbn)); + if (lbn < lastlbn) + return (0); + /* Here we only truncate lblkno if it's partial. */ + if (lbn == lastlbn) { + if (lastoff == 0) + return (0); + *blkoffp = lastoff; + } + return (1); } /* * Eliminate any dependencies that exist in memory beyond lblkno:off */ static void -softdep_trunc_deps(vp, freeblks, lblkno, off, flags) - struct vnode *vp; +trunc_dependencies(ip, freeblks, lastlbn, lastoff, flags) + struct inode *ip; struct freeblks *freeblks; - ufs_lbn_t lblkno; - int off; + ufs_lbn_t lastlbn; + int lastoff; int flags; { - struct inodedep *inodedep; struct bufobj *bo; + struct vnode *vp; struct buf *bp; - struct mount *mp; - ino_t ino; + struct fs *fs; + int blkoff; /* * We must wait for any I/O in progress to finish so that @@ -5641,96 +6576,140 @@ softdep_trunc_deps(vp, freeblks, lblkno, off, flags) * Once they are all there, walk the list and get rid of * any dependencies. */ - ino = VTOI(vp)->i_number; - mp = vp->v_mount; + fs = ip->i_fs; + vp = ITOV(ip); bo = &vp->v_bufobj; BO_LOCK(bo); drain_output(vp); + TAILQ_FOREACH(bp, &bo->bo_dirty.bv_hd, b_bobufs) + bp->b_vflags &= ~BV_SCANNED; restart: TAILQ_FOREACH(bp, &bo->bo_dirty.bv_hd, b_bobufs) { - if (((flags & IO_EXT) == 0 && (bp->b_xflags & BX_ALTDATA)) || - ((flags & IO_NORMAL) == 0 && - (bp->b_xflags & BX_ALTDATA) == 0)) + if (bp->b_vflags & BV_SCANNED) + continue; + if (!trunc_check_buf(bp, &blkoff, lastlbn, lastoff, flags)) { + bp->b_vflags |= BV_SCANNED; continue; + } if ((bp = getdirtybuf(bp, BO_MTX(bo), MNT_WAIT)) == NULL) goto restart; BO_UNLOCK(bo); - ACQUIRE_LOCK(&lk); - (void) inodedep_lookup(mp, ino, 0, &inodedep); - if (deallocate_dependencies(bp, inodedep, freeblks, 0)) - bp->b_flags |= B_INVAL | B_NOCACHE; - FREE_LOCK(&lk); - brelse(bp); + if (deallocate_dependencies(bp, freeblks, blkoff)) + bqrelse(bp); + else + brelse(bp); BO_LOCK(bo); goto restart; } + /* + * Now do the work of vtruncbuf while also matching indirect blocks. + */ + TAILQ_FOREACH(bp, &bo->bo_clean.bv_hd, b_bobufs) + bp->b_vflags &= ~BV_SCANNED; +cleanrestart: + TAILQ_FOREACH(bp, &bo->bo_clean.bv_hd, b_bobufs) { + if (bp->b_vflags & BV_SCANNED) + continue; + if (!trunc_check_buf(bp, &blkoff, lastlbn, lastoff, flags)) { + bp->b_vflags |= BV_SCANNED; + continue; + } + if (BUF_LOCK(bp, + LK_EXCLUSIVE | LK_SLEEPFAIL | LK_INTERLOCK, + BO_MTX(bo)) == ENOLCK) { + BO_LOCK(bo); + goto cleanrestart; + } + bp->b_vflags |= BV_SCANNED; + BO_LOCK(bo); + bremfree(bp); + BO_UNLOCK(bo); + if (blkoff != 0) { + allocbuf(bp, blkoff); + bqrelse(bp); + } else { + bp->b_flags |= B_INVAL | B_NOCACHE | B_RELBUF; + brelse(bp); + } + BO_LOCK(bo); + goto cleanrestart; + } + drain_output(vp); BO_UNLOCK(bo); } static int -cancel_pagedep(pagedep, inodedep, freeblks) +cancel_pagedep(pagedep, freeblks, blkoff) struct pagedep *pagedep; - struct inodedep *inodedep; struct freeblks *freeblks; + int blkoff; { - struct newdirblk *newdirblk; struct jremref *jremref; struct jmvref *jmvref; - struct dirrem *dirrem; + struct dirrem *dirrem, *tmp; int i; /* - * There should be no directory add dependencies present - * as the directory could not be truncated until all - * children were removed. - */ - KASSERT(LIST_FIRST(&pagedep->pd_pendinghd) == NULL, - ("deallocate_dependencies: pendinghd != NULL")); - for (i = 0; i < DAHASHSZ; i++) - KASSERT(LIST_FIRST(&pagedep->pd_diraddhd[i]) == NULL, - ("deallocate_dependencies: diraddhd != NULL")); - /* * Copy any directory remove dependencies to the list - * to be processed after the zero'ed inode is written. - * If the inode has already been written, then they + * to be processed after the freeblks proceeds. If + * directory entry never made it to disk they * can be dumped directly onto the work list. */ - LIST_FOREACH(dirrem, &pagedep->pd_dirremhd, dm_next) { + LIST_FOREACH_SAFE(dirrem, &pagedep->pd_dirremhd, dm_next, tmp) { + /* Skip this directory removal if it is intended to remain. */ + if (dirrem->dm_offset < blkoff) + continue; /* - * If there are any dirrems we wait for - * the journal write to complete and - * then restart the buf scan as the lock + * If there are any dirrems we wait for the journal write + * to complete and then restart the buf scan as the lock * has been dropped. */ - while ((jremref = LIST_FIRST(&dirrem->dm_jremrefhd)) - != NULL) { - stat_jwait_filepage++; - jwait(&jremref->jr_list); + while ((jremref = LIST_FIRST(&dirrem->dm_jremrefhd)) != NULL) { + jwait(&jremref->jr_list, MNT_WAIT); return (ERESTART); } LIST_REMOVE(dirrem, dm_next); dirrem->dm_dirinum = pagedep->pd_ino; - if (inodedep == NULL || - (inodedep->id_state & ALLCOMPLETE) == ALLCOMPLETE) { - dirrem->dm_state |= COMPLETE; - add_to_worklist(&dirrem->dm_list, 0); - } else - WORKLIST_INSERT(&inodedep->id_bufwait, - &dirrem->dm_list); - } - if ((pagedep->pd_state & NEWBLOCK) != 0) { - newdirblk = pagedep->pd_newdirblk; - WORKLIST_REMOVE(&newdirblk->db_list); - free_newdirblk(newdirblk); + WORKLIST_INSERT(&freeblks->fb_freeworkhd, &dirrem->dm_list); } while ((jmvref = LIST_FIRST(&pagedep->pd_jmvrefhd)) != NULL) { - stat_jwait_filepage++; - jwait(&jmvref->jm_list); + jwait(&jmvref->jm_list, MNT_WAIT); return (ERESTART); } - WORKLIST_REMOVE(&pagedep->pd_list); - LIST_REMOVE(pagedep, pd_hash); - WORKITEM_FREE(pagedep, D_PAGEDEP); + /* + * When we're partially truncating a pagedep we just want to flush + * journal entries and return. There can not be any adds in the + * truncated portion of the directory and newblk must remain if + * part of the block remains. + */ + if (blkoff != 0) { + struct diradd *dap; + + LIST_FOREACH(dap, &pagedep->pd_pendinghd, da_pdlist) + if (dap->da_offset > blkoff) + panic("cancel_pagedep: diradd %p off %d > %d", + dap, dap->da_offset, blkoff); + for (i = 0; i < DAHASHSZ; i++) + LIST_FOREACH(dap, &pagedep->pd_diraddhd[i], da_pdlist) + if (dap->da_offset > blkoff) + panic("cancel_pagedep: diradd %p off %d > %d", + dap, dap->da_offset, blkoff); + return (0); + } + /* + * There should be no directory add dependencies present + * as the directory could not be truncated until all + * children were removed. + */ + KASSERT(LIST_FIRST(&pagedep->pd_pendinghd) == NULL, + ("deallocate_dependencies: pendinghd != NULL")); + for (i = 0; i < DAHASHSZ; i++) + KASSERT(LIST_FIRST(&pagedep->pd_diraddhd[i]) == NULL, + ("deallocate_dependencies: diraddhd != NULL")); + if ((pagedep->pd_state & NEWBLOCK) != 0) + free_newdirblk(pagedep->pd_newdirblk); + if (free_pagedep(pagedep) == 0) + panic("Failed to free pagedep %p", pagedep); return (0); } @@ -5739,58 +6718,82 @@ cancel_pagedep(pagedep, inodedep, freeblks) * be reallocated to a new vnode. The buffer must be locked, thus, * no I/O completion operations can occur while we are manipulating * its associated dependencies. The mutex is held so that other I/O's - * associated with related dependencies do not occur. Returns 1 if - * all dependencies were cleared, 0 otherwise. + * associated with related dependencies do not occur. */ static int -deallocate_dependencies(bp, inodedep, freeblks, off) +deallocate_dependencies(bp, freeblks, off) struct buf *bp; - struct inodedep *inodedep; struct freeblks *freeblks; int off; { - struct worklist *wk; struct indirdep *indirdep; - struct allocindir *aip; struct pagedep *pagedep; + struct allocdirect *adp; + struct worklist *wk, *wkn; - mtx_assert(&lk, MA_OWNED); - while ((wk = LIST_FIRST(&bp->b_dep)) != NULL) { + ACQUIRE_LOCK(&lk); + LIST_FOREACH_SAFE(wk, &bp->b_dep, wk_list, wkn) { switch (wk->wk_type) { - case D_INDIRDEP: indirdep = WK_INDIRDEP(wk); if (bp->b_lblkno >= 0 || bp->b_blkno != indirdep->ir_savebp->b_lblkno) panic("deallocate_dependencies: not indir"); - cancel_indirdep(indirdep, bp, inodedep, freeblks); + cancel_indirdep(indirdep, bp, freeblks); continue; case D_PAGEDEP: pagedep = WK_PAGEDEP(wk); - if (cancel_pagedep(pagedep, inodedep, freeblks)) - return (0); + if (cancel_pagedep(pagedep, freeblks, off)) { + FREE_LOCK(&lk); + return (ERESTART); + } continue; case D_ALLOCINDIR: - aip = WK_ALLOCINDIR(wk); - cancel_allocindir(aip, inodedep, freeblks); + /* + * Simply remove the allocindir, we'll find it via + * the indirdep where we can clear pointers if + * needed. + */ + WORKLIST_REMOVE(wk); continue; - case D_ALLOCDIRECT: - case D_INODEDEP: - panic("deallocate_dependencies: Unexpected type %s", - TYPENAME(wk->wk_type)); - /* NOTREACHED */ + case D_FREEWORK: + /* + * A truncation is waiting for the zero'd pointers + * to be written. It can be freed when the freeblks + * is journaled. + */ + WORKLIST_REMOVE(wk); + wk->wk_state |= ONDEPLIST; + WORKLIST_INSERT(&freeblks->fb_freeworkhd, wk); + break; + case D_ALLOCDIRECT: + adp = WK_ALLOCDIRECT(wk); + if (off != 0) + continue; + /* FALLTHROUGH */ default: - panic("deallocate_dependencies: Unknown type %s", + panic("deallocate_dependencies: Unexpected type %s", TYPENAME(wk->wk_type)); /* NOTREACHED */ } } + FREE_LOCK(&lk); + /* + * Don't throw away this buf, we were partially truncating and + * some deps may always remain. + */ + if (off) { + allocbuf(bp, off); + bp->b_vflags |= BV_SCANNED; + return (EBUSY); + } + bp->b_flags |= B_INVAL | B_NOCACHE; - return (1); + return (0); } /* @@ -5800,19 +6803,35 @@ deallocate_dependencies(bp, inodedep, freeblks, off) * space is no longer pointed to by the inode or in the bitmap. */ static void -cancel_allocdirect(adphead, adp, freeblks, delay) +cancel_allocdirect(adphead, adp, freeblks) struct allocdirectlst *adphead; struct allocdirect *adp; struct freeblks *freeblks; - int delay; { struct freework *freework; struct newblk *newblk; struct worklist *wk; - ufs_lbn_t lbn; TAILQ_REMOVE(adphead, adp, ad_next); newblk = (struct newblk *)adp; + freework = NULL; + /* + * Find the correct freework structure. + */ + LIST_FOREACH(wk, &freeblks->fb_freeworkhd, wk_list) { + if (wk->wk_type != D_FREEWORK) + continue; + freework = WK_FREEWORK(wk); + if (freework->fw_blkno == newblk->nb_newblkno) + break; + } + if (freework == NULL) + panic("cancel_allocdirect: Freework not found"); + /* + * If a newblk exists at all we still have the journal entry that + * initiated the allocation so we do not need to journal the free. + */ + cancel_jfreeblk(freeblks, freework->fw_blkno); /* * If the journal hasn't been written the jnewblk must be passed * to the call to ffs_blkfree that reclaims the space. We accomplish @@ -5821,33 +6840,9 @@ cancel_allocdirect(adphead, adp, freeblks, delay) * been written we can simply reclaim the journal space when the * freeblks work is complete. */ - if (newblk->nb_jnewblk == NULL) { - if (cancel_newblk(newblk, NULL, &freeblks->fb_jwork) != NULL) - panic("cancel_allocdirect: Unexpected dependency"); - goto found; - } - lbn = newblk->nb_jnewblk->jn_lbn; - /* - * Find the correct freework structure so it releases the canceled - * journal when the bitmap is cleared. This preserves rollback - * until the allocation is reverted. - */ - LIST_FOREACH(wk, &freeblks->fb_freeworkhd, wk_list) { - freework = WK_FREEWORK(wk); - if (freework->fw_lbn != lbn) - continue; - freework->fw_jnewblk = cancel_newblk(newblk, &freework->fw_list, - &freework->fw_jwork); - goto found; - } - panic("cancel_allocdirect: Freework not found for lbn %jd\n", lbn); -found: - if (delay) - WORKLIST_INSERT(&adp->ad_inodedep->id_bufwait, - &newblk->nb_list); - else - free_newblk(newblk); - return; + freework->fw_jnewblk = cancel_newblk(newblk, &freework->fw_list, + &freeblks->fb_jwork); + WORKLIST_INSERT(&freeblks->fb_freeworkhd, &newblk->nb_list); } @@ -5865,33 +6860,18 @@ cancel_newblk(newblk, wk, wkhd) struct worklist *wk; struct workhead *wkhd; { - struct indirdep *indirdep; - struct allocindir *aip; struct jnewblk *jnewblk; - while ((indirdep = LIST_FIRST(&newblk->nb_indirdeps)) != NULL) { - indirdep->ir_state &= ~ONDEPLIST; - LIST_REMOVE(indirdep, ir_next); - /* - * If an indirdep is not on the buf worklist we need to - * free it here as deallocate_dependencies() will never - * find it. These pointers were never visible on disk and - * can be discarded immediately. - */ - while ((aip = LIST_FIRST(&indirdep->ir_completehd)) != NULL) { - LIST_REMOVE(aip, ai_next); - if (cancel_newblk(&aip->ai_block, NULL, wkhd) != NULL) - panic("cancel_newblk: aip has journal entry"); - free_newblk(&aip->ai_block); - } - /* - * If this indirdep is not attached to a buf it was simply - * waiting on completion to clear completehd. free_indirdep() - * asserts that nothing is dangling. - */ - if ((indirdep->ir_state & ONWORKLIST) == 0) - free_indirdep(indirdep); - } + newblk->nb_state |= GOINGAWAY; + /* + * Previously we traversed the completedhd on each indirdep + * attached to this newblk to cancel them and gather journal + * work. Since we need only the oldest journal segment and + * the lowest point on the tree will always have the oldest + * journal segment we are free to release the segments + * of any subordinates and may leave the indirdep list to + * indirdep_complete() when this newblk is freed. + */ if (newblk->nb_state & ONDEPLIST) { newblk->nb_state &= ~ONDEPLIST; LIST_REMOVE(newblk, nb_deps); @@ -5904,17 +6884,44 @@ cancel_newblk(newblk, wk, wkhd) * superseding operation completes. */ jnewblk = newblk->nb_jnewblk; - if (jnewblk != NULL) { + if (jnewblk != NULL && wk != NULL) { newblk->nb_jnewblk = NULL; jnewblk->jn_dep = wk; } if (!LIST_EMPTY(&newblk->nb_jwork)) jwork_move(wkhd, &newblk->nb_jwork); + /* + * When truncating we must free the newdirblk early to remove + * the pagedep from the hash before returning. + */ + if ((wk = LIST_FIRST(&newblk->nb_newdirblk)) != NULL) + free_newdirblk(WK_NEWDIRBLK(wk)); + if (!LIST_EMPTY(&newblk->nb_newdirblk)) + panic("cancel_newblk: extra newdirblk"); return (jnewblk); } /* + * Schedule the freefrag associated with a newblk to be released once + * the pointers are written and the previous block is no longer needed. + */ +static void +newblk_freefrag(newblk) + struct newblk *newblk; +{ + struct freefrag *freefrag; + + if (newblk->nb_freefrag == NULL) + return; + freefrag = newblk->nb_freefrag; + newblk->nb_freefrag = NULL; + freefrag->ff_state |= COMPLETE; + if ((freefrag->ff_state & ALLCOMPLETE) == ALLCOMPLETE) + add_to_worklist(&freefrag->ff_list, 0); +} + +/* * Free a newblk. Generate a new freefrag work request if appropriate. * This must be called after the inode pointer and any direct block pointers * are valid or fully removed via truncate or frag extension. @@ -5924,34 +6931,23 @@ free_newblk(newblk) struct newblk *newblk; { struct indirdep *indirdep; - struct newdirblk *newdirblk; - struct freefrag *freefrag; struct worklist *wk; + KASSERT(newblk->nb_jnewblk == NULL, + ("free_newblk; jnewblk %p still attached", newblk->nb_jnewblk)); mtx_assert(&lk, MA_OWNED); + newblk_freefrag(newblk); if (newblk->nb_state & ONDEPLIST) LIST_REMOVE(newblk, nb_deps); if (newblk->nb_state & ONWORKLIST) WORKLIST_REMOVE(&newblk->nb_list); LIST_REMOVE(newblk, nb_hash); - if ((freefrag = newblk->nb_freefrag) != NULL) { - freefrag->ff_state |= COMPLETE; - if ((freefrag->ff_state & ALLCOMPLETE) == ALLCOMPLETE) - add_to_worklist(&freefrag->ff_list, 0); - } - if ((wk = LIST_FIRST(&newblk->nb_newdirblk)) != NULL) { - newdirblk = WK_NEWDIRBLK(wk); - WORKLIST_REMOVE(&newdirblk->db_list); - if (!LIST_EMPTY(&newblk->nb_newdirblk)) - panic("free_newblk: extra newdirblk"); - free_newdirblk(newdirblk); - } - while ((indirdep = LIST_FIRST(&newblk->nb_indirdeps)) != NULL) { - indirdep->ir_state |= DEPCOMPLETE; + if ((wk = LIST_FIRST(&newblk->nb_newdirblk)) != NULL) + free_newdirblk(WK_NEWDIRBLK(wk)); + if (!LIST_EMPTY(&newblk->nb_newdirblk)) + panic("free_newblk: extra newdirblk"); + while ((indirdep = LIST_FIRST(&newblk->nb_indirdeps)) != NULL) indirdep_complete(indirdep); - } - KASSERT(newblk->nb_jnewblk == NULL, - ("free_newblk; jnewblk %p still attached", newblk->nb_jnewblk)); handle_jwork(&newblk->nb_jwork); newblk->nb_list.wk_type = D_NEWBLK; WORKITEM_FREE(newblk, D_NEWBLK); @@ -5968,9 +6964,9 @@ free_newdirblk(newdirblk) struct pagedep *pagedep; struct diradd *dap; struct worklist *wk; - int i; mtx_assert(&lk, MA_OWNED); + WORKLIST_REMOVE(&newdirblk->db_list); /* * If the pagedep is still linked onto the directory buffer * dependency chain, then some of the entries on the @@ -5983,21 +6979,13 @@ free_newdirblk(newdirblk) */ pagedep = newdirblk->db_pagedep; pagedep->pd_state &= ~NEWBLOCK; - if ((pagedep->pd_state & ONWORKLIST) == 0) + if ((pagedep->pd_state & ONWORKLIST) == 0) { while ((dap = LIST_FIRST(&pagedep->pd_pendinghd)) != NULL) free_diradd(dap, NULL); - /* - * If no dependencies remain, the pagedep will be freed. - */ - for (i = 0; i < DAHASHSZ; i++) - if (!LIST_EMPTY(&pagedep->pd_diraddhd[i])) - break; - if (i == DAHASHSZ && (pagedep->pd_state & ONWORKLIST) == 0 && - LIST_EMPTY(&pagedep->pd_jmvrefhd)) { - KASSERT(LIST_FIRST(&pagedep->pd_dirremhd) == NULL, - ("free_newdirblk: Freeing non-free pagedep %p", pagedep)); - LIST_REMOVE(pagedep, pd_hash); - WORKITEM_FREE(pagedep, D_PAGEDEP); + /* + * If no dependencies remain, the pagedep will be freed. + */ + free_pagedep(pagedep); } /* Should only ever be one item in the list. */ while ((wk = LIST_FIRST(&newdirblk->db_mkdir)) != NULL) { @@ -6020,6 +7008,7 @@ softdep_freefile(pvp, ino, mode) struct inode *ip = VTOI(pvp); struct inodedep *inodedep; struct freefile *freefile; + struct freeblks *freeblks; /* * This sets up the inode de-allocation dependency. @@ -6048,28 +7037,38 @@ softdep_freefile(pvp, ino, mode) */ ACQUIRE_LOCK(&lk); inodedep_lookup(pvp->v_mount, ino, 0, &inodedep); - /* - * Remove this inode from the unlinked list and set - * GOINGAWAY as appropriate to indicate that this inode - * will never be written. - */ - if (inodedep && inodedep->id_state & UNLINKED) { + if (inodedep) { /* - * Save the journal work to be freed with the bitmap - * before we clear UNLINKED. Otherwise it can be lost - * if the inode block is written. + * Clear out freeblks that no longer need to reference + * this inode. */ - handle_bufwait(inodedep, &freefile->fx_jwork); - clear_unlinked_inodedep(inodedep); - /* Re-acquire inodedep as we've dropped lk. */ - inodedep_lookup(pvp->v_mount, ino, 0, &inodedep); + while ((freeblks = + TAILQ_FIRST(&inodedep->id_freeblklst)) != NULL) { + TAILQ_REMOVE(&inodedep->id_freeblklst, freeblks, + fb_next); + freeblks->fb_state &= ~ONDEPLIST; + } + /* + * Remove this inode from the unlinked list. + */ + if (inodedep->id_state & UNLINKED) { + /* + * Save the journal work to be freed with the bitmap + * before we clear UNLINKED. Otherwise it can be lost + * if the inode block is written. + */ + handle_bufwait(inodedep, &freefile->fx_jwork); + clear_unlinked_inodedep(inodedep); + /* Re-acquire inodedep as we've dropped lk. */ + inodedep_lookup(pvp->v_mount, ino, 0, &inodedep); + } } if (inodedep == NULL || check_inode_unwritten(inodedep)) { FREE_LOCK(&lk); handle_workitem_freefile(freefile); return; } - if (inodedep && (inodedep->id_state & DEPCOMPLETE) == 0) + if ((inodedep->id_state & DEPCOMPLETE) == 0) inodedep->id_state |= GOINGAWAY; WORKLIST_INSERT(&inodedep->id_inowait, &freefile->fx_list); FREE_LOCK(&lk); @@ -6154,6 +7153,7 @@ free_inodedep(inodedep) !TAILQ_EMPTY(&inodedep->id_newinoupdt) || !TAILQ_EMPTY(&inodedep->id_extupdt) || !TAILQ_EMPTY(&inodedep->id_newextupdt) || + !TAILQ_EMPTY(&inodedep->id_freeblklst) || inodedep->id_mkdiradd != NULL || inodedep->id_nlinkdelta != 0 || inodedep->id_savedino1 != NULL) @@ -6181,54 +7181,79 @@ freework_freeblock(freework) struct ufsmount *ump; struct workhead wkhd; struct fs *fs; - int pending; int bsize; int needj; + mtx_assert(&lk, MA_OWNED); + /* + * Handle partial truncate separately. + */ + if (freework->fw_indir) { + complete_trunc_indir(freework); + return; + } freeblks = freework->fw_freeblks; ump = VFSTOUFS(freeblks->fb_list.wk_mp); fs = ump->um_fs; needj = freeblks->fb_list.wk_mp->mnt_kern_flag & MNTK_SUJ; bsize = lfragtosize(fs, freework->fw_frags); - pending = btodb(bsize); LIST_INIT(&wkhd); /* + * DEPCOMPLETE is cleared in indirblk_insert() if the block lives + * on the indirblk hashtable and prevents premature freeing. + */ + freework->fw_state |= DEPCOMPLETE; + /* + * SUJ needs to wait for the segment referencing freed indirect + * blocks to expire so that we know the checker will not confuse + * a re-allocated indirect block with its old contents. + */ + if (needj && freework->fw_lbn <= -NDADDR) + indirblk_insert(freework); + /* * If we are canceling an existing jnewblk pass it to the free * routine, otherwise pass the freeblk which will ultimately * release the freeblks. If we're not journaling, we can just * free the freeblks immediately. */ - ACQUIRE_LOCK(&lk); - LIST_SWAP(&wkhd, &freework->fw_jwork, worklist, wk_list); jnewblk = freework->fw_jnewblk; if (jnewblk != NULL) { - /* Could've already been canceled in indir_trunc(). */ - if ((jnewblk->jn_state & GOINGAWAY) == 0) - cancel_jnewblk(jnewblk, &wkhd); + cancel_jnewblk(jnewblk, &wkhd); needj = 0; - } else if (needj) + } else if (needj) { + freeblks->fb_cgwait++; WORKLIST_INSERT(&wkhd, &freework->fw_list); - freeblks->fb_chkcnt -= pending; - FREE_LOCK(&lk); - /* - * extattr blocks don't show up in pending blocks. XXX why? - */ - if (freework->fw_lbn >= 0 || freework->fw_lbn <= -NDADDR) { - UFS_LOCK(ump); - fs->fs_pendingblocks -= pending; - UFS_UNLOCK(ump); } - ffs_blkfree(ump, fs, freeblks->fb_devvp, freework->fw_blkno, - bsize, freeblks->fb_previousinum, &wkhd); - if (needj) - return; + freeblks->fb_freecnt += btodb(bsize); + FREE_LOCK(&lk); + ffs_blkfree(ump, fs, freeblks->fb_devvp, freework->fw_blkno, bsize, + freeblks->fb_inum, &wkhd); + ACQUIRE_LOCK(&lk); /* * The jnewblk will be discarded and the bits in the map never * made it to disk. We can immediately free the freeblk. */ - ACQUIRE_LOCK(&lk); - handle_written_freework(freework); - FREE_LOCK(&lk); + if (needj == 0) + handle_written_freework(freework, 0); +} + +/* + * We enqueue freework items that need processing back on the freeblks and + * add the freeblks to the worklist. This makes it easier to find all work + * required to flush a truncation in process_truncates(). + */ +static void +freework_enqueue(freework) + struct freework *freework; +{ + struct freeblks *freeblks; + + freeblks = freework->fw_freeblks; + WORKLIST_INSERT(&freeblks->fb_freeworkhd, &freework->fw_list); + if ((freeblks->fb_state & + (ONWORKLIST | INPROGRESS | ALLCOMPLETE)) == ALLCOMPLETE && + LIST_EMPTY(&freeblks->fb_jblkdephd)) + add_to_worklist(&freeblks->fb_list, WK_NODELAY); } /* @@ -6246,70 +7271,52 @@ handle_workitem_indirblk(freework) struct ufsmount *ump; struct fs *fs; - freeblks = freework->fw_freeblks; ump = VFSTOUFS(freeblks->fb_list.wk_mp); fs = ump->um_fs; - if (freework->fw_off == NINDIR(fs)) + if (freework->fw_state & DEPCOMPLETE) { + handle_written_freework(freework, 0); + return; + } + if (freework->fw_off == NINDIR(fs)) { freework_freeblock(freework); - else - indir_trunc(freework, fsbtodb(fs, freework->fw_blkno), - freework->fw_lbn); + return; + } + FREE_LOCK(&lk); + indir_trunc(freework, fsbtodb(fs, freework->fw_blkno), + freework->fw_lbn); + ACQUIRE_LOCK(&lk); } /* * Called when a freework structure attached to a cg buf is written. The * ref on either the parent or the freeblks structure is released and - * either may be added to the worklist if it is the final ref. + * the freeblks is added back to the worklist if there is more work to do. */ static void -handle_written_freework(freework) +handle_written_freework(freework, cgwrite) struct freework *freework; + int cgwrite; { struct freeblks *freeblks; struct freework *parent; - struct jsegdep *jsegdep; - struct worklist *wk; - int needj; - needj = 0; freeblks = freework->fw_freeblks; parent = freework->fw_parent; - /* - * SUJ needs to wait for the segment referencing freed indirect - * blocks to expire so that we know the checker will not confuse - * a re-allocated indirect block with its old contents. - */ - if (freework->fw_lbn <= -NDADDR && - freework->fw_list.wk_mp->mnt_kern_flag & MNTK_SUJ) { - LIST_FOREACH(wk, &freeblks->fb_jwork, wk_list) - if (wk->wk_type == D_JSEGDEP) - break; - if (wk) { - jsegdep = WK_JSEGDEP(wk); - LIST_INSERT_HEAD(&jsegdep->jd_seg->js_indirs, - freework, fw_next); - WORKLIST_INSERT(INDIR_HASH(freework->fw_list.wk_mp, - freework->fw_blkno), &freework->fw_list); - needj = 1; - } - } - if (parent) { - if (--parent->fw_ref != 0) - parent = NULL; - freeblks = NULL; - } else if (--freeblks->fb_ref != 0) - freeblks = NULL; - if (needj == 0) + freeblks->fb_cgwait -= cgwrite; + freework->fw_state |= COMPLETE; + if ((freework->fw_state & ALLCOMPLETE) == ALLCOMPLETE) WORKITEM_FREE(freework, D_FREEWORK); - /* - * Don't delay these block frees or it takes an intolerable amount - * of time to process truncates and free their journal entries. - */ - if (freeblks) - add_to_worklist(&freeblks->fb_list, 1); - if (parent) - add_to_worklist(&parent->fw_list, 1); + if (parent) { + if (--parent->fw_ref == 0) + freework_enqueue(parent); + return; + } + if (--freeblks->fb_ref != 0) + return; + if ((freeblks->fb_state & (ALLCOMPLETE | ONWORKLIST | INPROGRESS)) == + ALLCOMPLETE && LIST_EMPTY(&freeblks->fb_jblkdephd)) + add_to_worklist(&freeblks->fb_list, WK_NODELAY); } /* @@ -6320,38 +7327,73 @@ handle_written_freework(freework) * to the number of blocks allocated for the file) are also * performed in this function. */ -static void +static int handle_workitem_freeblocks(freeblks, flags) struct freeblks *freeblks; int flags; { struct freework *freework; + struct newblk *newblk; + struct allocindir *aip; + struct ufsmount *ump; struct worklist *wk; - KASSERT(LIST_EMPTY(&freeblks->fb_jfreeblkhd), + KASSERT(LIST_EMPTY(&freeblks->fb_jblkdephd), ("handle_workitem_freeblocks: Journal entries not written.")); - if (LIST_EMPTY(&freeblks->fb_freeworkhd)) { - handle_complete_freeblocks(freeblks); - return; - } - freeblks->fb_ref++; + ump = VFSTOUFS(freeblks->fb_list.wk_mp); + ACQUIRE_LOCK(&lk); while ((wk = LIST_FIRST(&freeblks->fb_freeworkhd)) != NULL) { - KASSERT(wk->wk_type == D_FREEWORK, - ("handle_workitem_freeblocks: Unknown type %s", - TYPENAME(wk->wk_type))); - WORKLIST_REMOVE_UNLOCKED(wk); - freework = WK_FREEWORK(wk); - if (freework->fw_lbn <= -NDADDR) - handle_workitem_indirblk(freework); - else - freework_freeblock(freework); + WORKLIST_REMOVE(wk); + switch (wk->wk_type) { + case D_DIRREM: + wk->wk_state |= COMPLETE; + add_to_worklist(wk, 0); + continue; + + case D_ALLOCDIRECT: + free_newblk(WK_NEWBLK(wk)); + continue; + + case D_ALLOCINDIR: + aip = WK_ALLOCINDIR(wk); + freework = NULL; + if (aip->ai_state & DELAYEDFREE) { + FREE_LOCK(&lk); + freework = newfreework(ump, freeblks, NULL, + aip->ai_lbn, aip->ai_newblkno, + ump->um_fs->fs_frag, 0, 0); + ACQUIRE_LOCK(&lk); + } + newblk = WK_NEWBLK(wk); + if (newblk->nb_jnewblk) { + freework->fw_jnewblk = newblk->nb_jnewblk; + newblk->nb_jnewblk->jn_dep = &freework->fw_list; + newblk->nb_jnewblk = NULL; + } + free_newblk(newblk); + continue; + + case D_FREEWORK: + freework = WK_FREEWORK(wk); + if (freework->fw_lbn <= -NDADDR) + handle_workitem_indirblk(freework); + else + freework_freeblock(freework); + continue; + default: + panic("handle_workitem_freeblocks: Unknown type %s", + TYPENAME(wk->wk_type)); + } } - ACQUIRE_LOCK(&lk); - if (--freeblks->fb_ref != 0) + if (freeblks->fb_ref != 0) { + freeblks->fb_state &= ~INPROGRESS; + wake_worklist(&freeblks->fb_list); freeblks = NULL; + } FREE_LOCK(&lk); if (freeblks) - handle_complete_freeblocks(freeblks); + return handle_complete_freeblocks(freeblks, flags); + return (0); } /* @@ -6359,41 +7401,64 @@ handle_workitem_freeblocks(freeblks, flags) * freeblocks dependency and any journal work awaiting completion. This * can not be called until all other dependencies are stable on disk. */ -static void -handle_complete_freeblocks(freeblks) +static int +handle_complete_freeblocks(freeblks, flags) struct freeblks *freeblks; + int flags; { + struct inodedep *inodedep; struct inode *ip; struct vnode *vp; struct fs *fs; struct ufsmount *ump; - int flags; + ufs2_daddr_t spare; ump = VFSTOUFS(freeblks->fb_list.wk_mp); fs = ump->um_fs; - flags = LK_NOWAIT; + flags = LK_EXCLUSIVE | flags; + spare = freeblks->fb_freecnt - freeblks->fb_chkcnt; /* - * If we still have not finished background cleanup, then check - * to see if the block count needs to be adjusted. + * If we did not release the expected number of blocks we may have + * to adjust the inode block count here. Only do so if it wasn't + * a truncation to zero and the modrev still matches. */ - if (freeblks->fb_chkcnt != 0 && (fs->fs_flags & FS_UNCLEAN) != 0 && - ffs_vgetf(freeblks->fb_list.wk_mp, freeblks->fb_previousinum, - (flags & LK_NOWAIT) | LK_EXCLUSIVE, &vp, FFSV_FORCEINSMQ) == 0) { + if (spare && freeblks->fb_len != 0) { + if (ffs_vgetf(freeblks->fb_list.wk_mp, freeblks->fb_inum, + flags, &vp, FFSV_FORCEINSMQ) != 0) + return (EBUSY); ip = VTOI(vp); - DIP_SET(ip, i_blocks, DIP(ip, i_blocks) + freeblks->fb_chkcnt); - ip->i_flag |= IN_CHANGE; + if (DIP(ip, i_modrev) == freeblks->fb_modrev) { + DIP_SET(ip, i_blocks, DIP(ip, i_blocks) - spare); + ip->i_flag |= IN_CHANGE; + /* + * We must wait so this happens before the + * journal is reclaimed. + */ + ffs_update(vp, 1); + } vput(vp); } - - if (!(freeblks->fb_chkcnt == 0 || - ((fs->fs_flags & FS_UNCLEAN) != 0 && (flags & LK_NOWAIT) == 0))) - printf( - "handle_workitem_freeblocks: inode %ju block count %jd\n", - (uintmax_t)freeblks->fb_previousinum, - (intmax_t)freeblks->fb_chkcnt); - + if (freeblks->fb_chkcnt) { + UFS_LOCK(ump); + fs->fs_pendingblocks -= freeblks->fb_chkcnt; + UFS_UNLOCK(ump); + } +#ifdef QUOTA + /* Handle spare. */ + if (spare) + quotaadj(freeblks->fb_quota, ump, -spare); + quotarele(freeblks->fb_quota); +#endif ACQUIRE_LOCK(&lk); + if (freeblks->fb_state & ONDEPLIST) { + inodedep_lookup(freeblks->fb_list.wk_mp, freeblks->fb_inum, + 0, &inodedep); + TAILQ_REMOVE(&inodedep->id_freeblklst, freeblks, fb_next); + freeblks->fb_state &= ~ONDEPLIST; + if (TAILQ_EMPTY(&inodedep->id_freeblklst)) + free_inodedep(inodedep); + } /* * All of the freeblock deps must be complete prior to this call * so it's now safe to complete earlier outstanding journal entries. @@ -6401,13 +7466,19 @@ handle_complete_freeblocks(freeblks) handle_jwork(&freeblks->fb_jwork); WORKITEM_FREE(freeblks, D_FREEBLKS); FREE_LOCK(&lk); + return (0); } /* - * Release blocks associated with the inode ip and stored in the indirect + * Release blocks associated with the freeblks and stored in the indirect * block dbn. If level is greater than SINGLE, the block is an indirect block * and recursive calls to indirtrunc must be used to cleanse other indirect * blocks. + * + * This handles partial and complete truncation of blocks. Partial is noted + * with goingaway == 0. In this case the freework is completed after the + * zero'd indirects are written to disk. For full truncation the freework + * is completed after the block is freed. */ static void indir_trunc(freework, dbn, lbn) @@ -6417,165 +7488,111 @@ indir_trunc(freework, dbn, lbn) { struct freework *nfreework; struct workhead wkhd; - struct jnewblk *jnewblkn; - struct jnewblk *jnewblk; struct freeblks *freeblks; struct buf *bp; struct fs *fs; - struct worklist *wkn; - struct worklist *wk; struct indirdep *indirdep; struct ufsmount *ump; ufs1_daddr_t *bap1 = 0; ufs2_daddr_t nb, nnb, *bap2 = 0; - ufs_lbn_t lbnadd; + ufs_lbn_t lbnadd, nlbn; int i, nblocks, ufs1fmt; int fs_pendingblocks; + int goingaway; int freedeps; int needj; int level; int cnt; - LIST_INIT(&wkhd); - level = lbn_level(lbn); - if (level == -1) - panic("indir_trunc: Invalid lbn %jd\n", lbn); freeblks = freework->fw_freeblks; ump = VFSTOUFS(freeblks->fb_list.wk_mp); fs = ump->um_fs; - fs_pendingblocks = 0; - freedeps = 0; - needj = UFSTOVFS(ump)->mnt_kern_flag & MNTK_SUJ; - lbnadd = lbn_offset(fs, level); /* - * Get buffer of block pointers to be freed. This routine is not - * called until the zero'ed inode has been written, so it is safe - * to free blocks as they are encountered. Because the inode has - * been zero'ed, calls to bmap on these blocks will fail. So, we - * have to use the on-disk address and the block device for the - * filesystem to look them up. If the file was deleted before its - * indirect blocks were all written to disk, the routine that set - * us up (deallocate_dependencies) will have arranged to leave - * a complete copy of the indirect block in memory for our use. - * Otherwise we have to read the blocks in from the disk. - */ -#ifdef notyet - bp = getblk(freeblks->fb_devvp, dbn, (int)fs->fs_bsize, 0, 0, - GB_NOCREAT); -#else - bp = incore(&freeblks->fb_devvp->v_bufobj, dbn); -#endif + * Get buffer of block pointers to be freed. There are three cases: + * + * 1) Partial truncate caches the indirdep pointer in the freework + * which provides us a back copy to the save bp which holds the + * pointers we want to clear. When this completes the zero + * pointers are written to the real copy. + * 2) The indirect is being completely truncated, cancel_indirdep() + * eliminated the real copy and placed the indirdep on the saved + * copy. The indirdep and buf are discarded when this completes. + * 3) The indirect was not in memory, we read a copy off of the disk + * using the devvp and drop and invalidate the buffer when we're + * done. + */ + goingaway = 1; + indirdep = NULL; + if (freework->fw_indir != NULL) { + goingaway = 0; + indirdep = freework->fw_indir; + bp = indirdep->ir_savebp; + if (bp == NULL || bp->b_blkno != dbn) + panic("indir_trunc: Bad saved buf %p blkno %jd", + bp, (intmax_t)dbn); + } else if ((bp = incore(&freeblks->fb_devvp->v_bufobj, dbn)) != NULL) { + /* + * The lock prevents the buf dep list from changing and + * indirects on devvp should only ever have one dependency. + */ + indirdep = WK_INDIRDEP(LIST_FIRST(&bp->b_dep)); + if (indirdep == NULL || (indirdep->ir_state & GOINGAWAY) == 0) + panic("indir_trunc: Bad indirdep %p from buf %p", + indirdep, bp); + } else if (bread(freeblks->fb_devvp, dbn, (int)fs->fs_bsize, + NOCRED, &bp) != 0) { + brelse(bp); + return; + } ACQUIRE_LOCK(&lk); - if (bp != NULL && (wk = LIST_FIRST(&bp->b_dep)) != NULL) { - if (wk->wk_type != D_INDIRDEP || - (wk->wk_state & GOINGAWAY) == 0) - panic("indir_trunc: lost indirdep %p", wk); - indirdep = WK_INDIRDEP(wk); - LIST_SWAP(&wkhd, &indirdep->ir_jwork, worklist, wk_list); - LIST_FOREACH_SAFE(jnewblk, &indirdep->ir_jnewblkhd, - jn_indirdeps, jnewblkn) { + /* + * If we have an indirdep we need to enforce the truncation order + * and discard it when it is complete. + */ + if (indirdep) { + if (freework != TAILQ_FIRST(&indirdep->ir_trunc) && + !TAILQ_EMPTY(&indirdep->ir_trunc)) { /* - * XXX This cancel may cause some lengthy delay - * before the record is reclaimed below. + * Add the complete truncate to the list on the + * indirdep to enforce in-order processing. */ - LIST_REMOVE(jnewblk, jn_indirdeps); - cancel_jnewblk(jnewblk, &wkhd); - } - - free_indirdep(indirdep); - if (!LIST_EMPTY(&bp->b_dep)) - panic("indir_trunc: dangling dep %p", - LIST_FIRST(&bp->b_dep)); - ump->um_numindirdeps -= 1; - FREE_LOCK(&lk); - } else { -#ifdef notyet - if (bp) - brelse(bp); -#endif - FREE_LOCK(&lk); - if (bread(freeblks->fb_devvp, dbn, (int)fs->fs_bsize, - NOCRED, &bp) != 0) { - brelse(bp); + if (freework->fw_indir == NULL) + TAILQ_INSERT_TAIL(&indirdep->ir_trunc, + freework, fw_next); + FREE_LOCK(&lk); return; } + /* + * If we're goingaway, free the indirdep. Otherwise it will + * linger until the write completes. + */ + if (goingaway) { + free_indirdep(indirdep); + ump->um_numindirdeps -= 1; + } } - /* - * Recursively free indirect blocks. - */ + FREE_LOCK(&lk); + /* Initialize pointers depending on block size. */ if (ump->um_fstype == UFS1) { - ufs1fmt = 1; bap1 = (ufs1_daddr_t *)bp->b_data; + nb = bap1[freework->fw_off]; + ufs1fmt = 1; } else { - ufs1fmt = 0; bap2 = (ufs2_daddr_t *)bp->b_data; + nb = bap2[freework->fw_off]; + ufs1fmt = 0; } - - /* - * Reclaim indirect blocks which never made it to disk. - */ - cnt = 0; - LIST_FOREACH_SAFE(wk, &wkhd, wk_list, wkn) { - if (wk->wk_type != D_JNEWBLK) - continue; - /* XXX Is the lock necessary here for more than an assert? */ - ACQUIRE_LOCK(&lk); - WORKLIST_REMOVE(wk); - FREE_LOCK(&lk); - jnewblk = WK_JNEWBLK(wk); - if (jnewblk->jn_lbn > 0) - i = (jnewblk->jn_lbn - -lbn) / lbnadd; - else - i = (-(jnewblk->jn_lbn + level - 1) - -(lbn + level)) / - lbnadd; - KASSERT(i >= 0 && i < NINDIR(fs), - ("indir_trunc: Index out of range %d parent %jd lbn %jd level %d", - i, lbn, jnewblk->jn_lbn, level)); - /* Clear the pointer so it isn't found below. */ - if (ufs1fmt) { - nb = bap1[i]; - bap1[i] = 0; - } else { - nb = bap2[i]; - bap2[i] = 0; - } - KASSERT(nb == jnewblk->jn_blkno, - ("indir_trunc: Block mismatch %jd != %jd", - nb, jnewblk->jn_blkno)); - if (level != 0) { - ufs_lbn_t nlbn; - - nlbn = (lbn + 1) - (i * lbnadd); - nfreework = newfreework(ump, freeblks, freework, - nlbn, nb, fs->fs_frag, 0); - nfreework->fw_jnewblk = jnewblk; - freedeps++; - indir_trunc(nfreework, fsbtodb(fs, nb), nlbn); - } else { - struct workhead freewk; - - LIST_INIT(&freewk); - ACQUIRE_LOCK(&lk); - WORKLIST_INSERT(&freewk, wk); - FREE_LOCK(&lk); - ffs_blkfree(ump, fs, freeblks->fb_devvp, - jnewblk->jn_blkno, fs->fs_bsize, - freeblks->fb_previousinum, &freewk); - } - cnt++; - } - ACQUIRE_LOCK(&lk); - /* Any remaining journal work can be completed with freeblks. */ - jwork_move(&freeblks->fb_jwork, &wkhd); - FREE_LOCK(&lk); + level = lbn_level(lbn); + needj = UFSTOVFS(ump)->mnt_kern_flag & MNTK_SUJ; + lbnadd = lbn_offset(fs, level); nblocks = btodb(fs->fs_bsize); - if (ufs1fmt) - nb = bap1[0]; - else - nb = bap2[0]; nfreework = freework; + freedeps = 0; + cnt = 0; /* - * Reclaim on disk blocks. + * Reclaim blocks. Traverses into nested indirect levels and + * arranges for the current level to be freed when subordinates + * are free when journaling. */ for (i = freework->fw_off; i < NINDIR(fs); i++, nb = nnb) { if (i != NINDIR(fs) - 1) { @@ -6589,12 +7606,10 @@ indir_trunc(freework, dbn, lbn) continue; cnt++; if (level != 0) { - ufs_lbn_t nlbn; - nlbn = (lbn + 1) - (i * lbnadd); if (needj != 0) { nfreework = newfreework(ump, freeblks, freework, - nlbn, nb, fs->fs_frag, 0); + nlbn, nb, fs->fs_frag, 0, 0); freedeps++; } indir_trunc(nfreework, fsbtodb(fs, nb), nlbn); @@ -6614,85 +7629,105 @@ indir_trunc(freework, dbn, lbn) freedeps++; } ffs_blkfree(ump, fs, freeblks->fb_devvp, nb, - fs->fs_bsize, freeblks->fb_previousinum, &wkhd); + fs->fs_bsize, freeblks->fb_inum, &wkhd); } } + if (goingaway) { + bp->b_flags |= B_INVAL | B_NOCACHE; + brelse(bp); + } + fs_pendingblocks = 0; if (level == 0) fs_pendingblocks = (nblocks * cnt); /* - * If we're not journaling we can free the indirect now. Otherwise - * setup the ref counts and offset so this indirect can be completed - * when its children are free. + * If we are journaling set up the ref counts and offset so this + * indirect can be completed when its children are free. */ - if (needj == 0) { - fs_pendingblocks += nblocks; - dbn = dbtofsb(fs, dbn); - ffs_blkfree(ump, fs, freeblks->fb_devvp, dbn, fs->fs_bsize, - freeblks->fb_previousinum, NULL); - ACQUIRE_LOCK(&lk); - freeblks->fb_chkcnt -= fs_pendingblocks; - if (freework->fw_blkno == dbn) - handle_written_freework(freework); - FREE_LOCK(&lk); - freework = NULL; - } else { + if (needj) { ACQUIRE_LOCK(&lk); + freeblks->fb_freecnt += fs_pendingblocks; freework->fw_off = i; freework->fw_ref += freedeps; freework->fw_ref -= NINDIR(fs) + 1; - if (freework->fw_ref != 0) - freework = NULL; - freeblks->fb_chkcnt -= fs_pendingblocks; + if (level == 0) + freeblks->fb_cgwait += freedeps; + if (freework->fw_ref == 0) + freework_freeblock(freework); FREE_LOCK(&lk); + return; } - if (fs_pendingblocks) { - UFS_LOCK(ump); - fs->fs_pendingblocks -= fs_pendingblocks; - UFS_UNLOCK(ump); + /* + * If we're not journaling we can free the indirect now. + */ + fs_pendingblocks += nblocks; + dbn = dbtofsb(fs, dbn); + ffs_blkfree(ump, fs, freeblks->fb_devvp, dbn, fs->fs_bsize, + freeblks->fb_inum, NULL); + /* Non SUJ softdep does single-threaded truncations. */ + freeblks->fb_freecnt += fs_pendingblocks; + if (freework->fw_blkno == dbn) { + freework->fw_state |= ALLCOMPLETE; + ACQUIRE_LOCK(&lk); + handle_written_freework(freework, 0); + FREE_LOCK(&lk); } - bp->b_flags |= B_INVAL | B_NOCACHE; - brelse(bp); - if (freework) - handle_workitem_indirblk(freework); return; } /* - * Cancel an allocindir when it is removed via truncation. + * Cancel an allocindir when it is removed via truncation. When bp is not + * NULL the indirect never appeared on disk and is scheduled to be freed + * independently of the indir so we can more easily track journal work. */ static void -cancel_allocindir(aip, inodedep, freeblks) +cancel_allocindir(aip, bp, freeblks, trunc) struct allocindir *aip; - struct inodedep *inodedep; + struct buf *bp; struct freeblks *freeblks; + int trunc; { - struct jnewblk *jnewblk; + struct indirdep *indirdep; + struct freefrag *freefrag; struct newblk *newblk; + newblk = (struct newblk *)aip; + LIST_REMOVE(aip, ai_next); + /* + * We must eliminate the pointer in bp if it must be freed on its + * own due to partial truncate or pending journal work. + */ + if (bp && (trunc || newblk->nb_jnewblk)) { + /* + * Clear the pointer and mark the aip to be freed + * directly if it never existed on disk. + */ + aip->ai_state |= DELAYEDFREE; + indirdep = aip->ai_indirdep; + if (indirdep->ir_state & UFS1FMT) + ((ufs1_daddr_t *)bp->b_data)[aip->ai_offset] = 0; + else + ((ufs2_daddr_t *)bp->b_data)[aip->ai_offset] = 0; + } + /* + * When truncating the previous pointer will be freed via + * savedbp. Eliminate the freefrag which would dup free. + */ + if (trunc && (freefrag = newblk->nb_freefrag) != NULL) { + newblk->nb_freefrag = NULL; + if (freefrag->ff_jdep) + cancel_jfreefrag( + WK_JFREEFRAG(freefrag->ff_jdep)); + jwork_move(&freeblks->fb_jwork, &freefrag->ff_jwork); + WORKITEM_FREE(freefrag, D_FREEFRAG); + } /* * If the journal hasn't been written the jnewblk must be passed * to the call to ffs_blkfree that reclaims the space. We accomplish - * this by linking the journal dependency into the indirdep to be - * freed when indir_trunc() is called. If the journal has already - * been written we can simply reclaim the journal space when the - * freeblks work is complete. + * this by leaving the journal dependency on the newblk to be freed + * when a freework is created in handle_workitem_freeblocks(). */ - LIST_REMOVE(aip, ai_next); - newblk = (struct newblk *)aip; - if (newblk->nb_jnewblk == NULL) { - if (cancel_newblk(newblk, NULL, &freeblks->fb_jwork)) - panic("cancel_allocindir: Unexpected dependency."); - } else { - jnewblk = cancel_newblk(newblk, &aip->ai_indirdep->ir_list, - &aip->ai_indirdep->ir_jwork); - if (jnewblk) - LIST_INSERT_HEAD(&aip->ai_indirdep->ir_jnewblkhd, - jnewblk, jn_indirdeps); - } - if (inodedep && inodedep->id_state & DEPCOMPLETE) - WORKLIST_INSERT(&inodedep->id_bufwait, &newblk->nb_list); - else - free_newblk(newblk); + cancel_newblk(newblk, NULL, &freeblks->fb_jwork); + WORKLIST_INSERT(&freeblks->fb_freeworkhd, &newblk->nb_list); } /* @@ -6750,13 +7785,15 @@ setup_newdir(dap, newinum, dinum, newdirbp, mkdirp) * any subsequent additions are not marked live until the * block is reachable via the inode. */ - if (pagedep_lookup(mp, newinum, 0, 0, &pagedep) == 0) + if (pagedep_lookup(mp, newdirbp, newinum, 0, 0, &pagedep) == 0) panic("setup_newdir: lost pagedep"); LIST_FOREACH(wk, &newdirbp->b_dep, wk_list) if (wk->wk_type == D_ALLOCDIRECT) break; if (wk == NULL) panic("setup_newdir: lost allocdirect"); + if (pagedep->pd_state & NEWBLOCK) + panic("setup_newdir: NEWBLOCK already set"); newblk = WK_NEWBLK(wk); pagedep->pd_state |= NEWBLOCK; pagedep->pd_newdirblk = newdirblk; @@ -6788,7 +7825,7 @@ setup_newdir(dap, newinum, dinum, newdirbp, mkdirp) WORKITEM_FREE(mkdir2, D_MKDIR); } else { LIST_INSERT_HEAD(&mkdirlisthd, mkdir2, md_mkdirs); - WORKLIST_INSERT(&inodedep->id_bufwait,&mkdir2->md_list); + WORKLIST_INSERT(&inodedep->id_bufwait, &mkdir2->md_list); } *mkdirp = mkdir2; @@ -6885,8 +7922,7 @@ softdep_setup_directory_add(bp, dp, diroffset, newinum, newdirbp, isnewblk) /* * Link into parent directory pagedep to await its being written. */ - if (pagedep_lookup(mp, dp->i_number, lbn, DEPALLOC, &pagedep) == 0) - WORKLIST_INSERT(&bp->b_dep, &pagedep->pd_list); + pagedep_lookup(mp, bp, dp->i_number, lbn, DEPALLOC, &pagedep); #ifdef DEBUG if (diradd_lookup(pagedep, offset) != NULL) panic("softdep_setup_directory_add: %p already at off %d\n", @@ -7027,11 +8063,8 @@ softdep_change_directoryentry_offset(bp, dp, base, oldloc, newloc, entrysize) oldoffset = offset + (oldloc - base); newoffset = offset + (newloc - base); ACQUIRE_LOCK(&lk); - if (pagedep_lookup(mp, dp->i_number, lbn, flags, &pagedep) == 0) { - if (pagedep) - WORKLIST_INSERT(&bp->b_dep, &pagedep->pd_list); + if (pagedep_lookup(mp, bp, dp->i_number, lbn, flags, &pagedep) == 0) goto done; - } dap = diradd_lookup(pagedep, oldoffset); if (dap) { dap->da_offset = newoffset; @@ -7327,7 +8360,7 @@ softdep_setup_remove(bp, dp, ip, isrmdir) direct = LIST_EMPTY(&dirrem->dm_jremrefhd); FREE_LOCK(&lk); if (direct) - handle_workitem_remove(dirrem, NULL); + handle_workitem_remove(dirrem, 0); } } @@ -7367,7 +8400,7 @@ cancel_diradd_dotdot(ip, dirrem, jremref) struct diradd *dap; struct worklist *wk; - if (pagedep_lookup(UFSTOVFS(ip->i_ump), ip->i_number, 0, 0, + if (pagedep_lookup(UFSTOVFS(ip->i_ump), NULL, ip->i_number, 0, 0, &pagedep) == 0) return (jremref); dap = diradd_lookup(pagedep, DOTDOT_OFFSET); @@ -7536,10 +8569,10 @@ newdirrem(bp, dp, ip, isrmdir, prevdirremp) ACQUIRE_LOCK(&lk); lbn = lblkno(dp->i_fs, dp->i_offset); offset = blkoff(dp->i_fs, dp->i_offset); - if (pagedep_lookup(UFSTOVFS(dp->i_ump), dp->i_number, lbn, DEPALLOC, - &pagedep) == 0) - WORKLIST_INSERT(&bp->b_dep, &pagedep->pd_list); + pagedep_lookup(UFSTOVFS(dp->i_ump), bp, dp->i_number, lbn, DEPALLOC, + &pagedep); dirrem->dm_pagedep = pagedep; + dirrem->dm_offset = offset; /* * If we're renaming a .. link to a new directory, cancel any * existing MKDIR_PARENT mkdir. If it has already been canceled @@ -8092,10 +9125,10 @@ clear_unlinked_inodedep(inodedep) * This workitem decrements the inode's link count. * If the link count reaches zero, the file is removed. */ -static void -handle_workitem_remove(dirrem, xp) +static int +handle_workitem_remove(dirrem, flags) struct dirrem *dirrem; - struct vnode *xp; + int flags; { struct inodedep *inodedep; struct workhead dotdotwk; @@ -8105,7 +9138,6 @@ handle_workitem_remove(dirrem, xp) struct vnode *vp; struct inode *ip; ino_t oldinum; - int error; if (dirrem->dm_state & ONWORKLIST) panic("handle_workitem_remove: dirrem %p still on worklist", @@ -8113,12 +9145,9 @@ handle_workitem_remove(dirrem, xp) oldinum = dirrem->dm_oldinum; mp = dirrem->dm_list.wk_mp; ump = VFSTOUFS(mp); - if ((vp = xp) == NULL && - (error = ffs_vgetf(mp, oldinum, LK_EXCLUSIVE, &vp, - FFSV_FORCEINSMQ)) != 0) { - softdep_error("handle_workitem_remove: vget", error); - return; - } + flags |= LK_EXCLUSIVE; + if (ffs_vgetf(mp, oldinum, flags, &vp, FFSV_FORCEINSMQ) != 0) + return (EBUSY); ip = VTOI(vp); ACQUIRE_LOCK(&lk); if ((inodedep_lookup(mp, oldinum, 0, &inodedep)) == 0) @@ -8209,22 +9238,17 @@ handle_workitem_remove(dirrem, xp) if (inodedep == NULL || (inodedep->id_state & (DEPCOMPLETE | UNLINKED)) == UNLINKED || check_inode_unwritten(inodedep)) { - if (xp != NULL) - add_to_worklist(&dirrem->dm_list, 0); FREE_LOCK(&lk); - if (xp == NULL) { - vput(vp); - handle_workitem_remove(dirrem, NULL); - } - return; + vput(vp); + return handle_workitem_remove(dirrem, flags); } WORKLIST_INSERT(&inodedep->id_inowait, &dirrem->dm_list); FREE_LOCK(&lk); ip->i_flag |= IN_CHANGE; out: ffs_update(vp, 0); - if (xp == NULL) - vput(vp); + vput(vp); + return (0); } /* @@ -8318,7 +9342,7 @@ softdep_disk_io_initiation(bp) struct worklist marker; struct inodedep *inodedep; struct freeblks *freeblks; - struct jfreeblk *jfreeblk; + struct jblkdep *jblkdep; struct newblk *newblk; /* @@ -8370,19 +9394,18 @@ softdep_disk_io_initiation(bp) case D_FREEBLKS: freeblks = WK_FREEBLKS(wk); - jfreeblk = LIST_FIRST(&freeblks->fb_jfreeblkhd); + jblkdep = LIST_FIRST(&freeblks->fb_jblkdephd); /* - * We have to wait for the jfreeblks to be journaled + * We have to wait for the freeblks to be journaled * before we can write an inodeblock with updated * pointers. Be careful to arrange the marker so - * we revisit the jfreeblk if it's not removed by + * we revisit the freeblks if it's not removed by * the first jwait(). */ - if (jfreeblk != NULL) { + if (jblkdep != NULL) { LIST_REMOVE(&marker, wk_list); LIST_INSERT_BEFORE(wk, &marker, wk_list); - stat_jwait_freeblks++; - jwait(&jfreeblk->jf_list); + jwait(&jblkdep->jb_list, MNT_WAIT); } continue; case D_ALLOCDIRECT: @@ -8396,12 +9419,11 @@ softdep_disk_io_initiation(bp) */ newblk = WK_NEWBLK(wk); if (newblk->nb_jnewblk != NULL && - indirblk_inseg(newblk->nb_list.wk_mp, + indirblk_lookup(newblk->nb_list.wk_mp, newblk->nb_newblkno)) { LIST_REMOVE(&marker, wk_list); LIST_INSERT_BEFORE(wk, &marker, wk_list); - stat_jwait_newblk++; - jwait(&newblk->nb_jnewblk->jn_list); + jwait(&newblk->nb_jnewblk->jn_list, MNT_WAIT); } continue; @@ -8461,14 +9483,10 @@ initiate_write_filepage(pagedep, bp) * locked so the dependency can not go away. */ LIST_FOREACH(dirrem, &pagedep->pd_dirremhd, dm_next) - while ((jremref = LIST_FIRST(&dirrem->dm_jremrefhd)) != NULL) { - stat_jwait_filepage++; - jwait(&jremref->jr_list); - } - while ((jmvref = LIST_FIRST(&pagedep->pd_jmvrefhd)) != NULL) { - stat_jwait_filepage++; - jwait(&jmvref->jm_list); - } + while ((jremref = LIST_FIRST(&dirrem->dm_jremrefhd)) != NULL) + jwait(&jremref->jr_list, MNT_WAIT); + while ((jmvref = LIST_FIRST(&pagedep->pd_jmvrefhd)) != NULL) + jwait(&jmvref->jm_list, MNT_WAIT); for (i = 0; i < DAHASHSZ; i++) { LIST_FOREACH(dap, &pagedep->pd_diraddhd[i], da_pdlist) { ep = (struct direct *) @@ -8811,6 +9829,8 @@ initiate_write_inodeblock_ufs2(inodedep, bp) #ifdef INVARIANTS if (deplist != 0 && prevlbn >= adp->ad_offset) panic("softdep_write_inodeblock: lbn order"); + if ((adp->ad_state & ATTACHED) == 0) + panic("inodedep %p and adp %p not attached", inodedep, adp); prevlbn = adp->ad_offset; if (adp->ad_offset < NDADDR && dp->di_db[adp->ad_offset] != adp->ad_newblkno) @@ -8900,10 +9920,9 @@ initiate_write_inodeblock_ufs2(inodedep, bp) * list. */ static void -cancel_indirdep(indirdep, bp, inodedep, freeblks) +cancel_indirdep(indirdep, bp, freeblks) struct indirdep *indirdep; struct buf *bp; - struct inodedep *inodedep; struct freeblks *freeblks; { struct allocindir *aip; @@ -8924,24 +9943,38 @@ cancel_indirdep(indirdep, bp, inodedep, freeblks) */ if (indirdep->ir_state & GOINGAWAY) panic("cancel_indirdep: already gone"); - if (indirdep->ir_state & ONDEPLIST) { - indirdep->ir_state &= ~ONDEPLIST; + if ((indirdep->ir_state & DEPCOMPLETE) == 0) { + indirdep->ir_state |= DEPCOMPLETE; LIST_REMOVE(indirdep, ir_next); } indirdep->ir_state |= GOINGAWAY; VFSTOUFS(indirdep->ir_list.wk_mp)->um_numindirdeps += 1; + /* + * Pass in bp for blocks still have journal writes + * pending so we can cancel them on their own. + */ while ((aip = LIST_FIRST(&indirdep->ir_deplisthd)) != 0) - cancel_allocindir(aip, inodedep, freeblks); + cancel_allocindir(aip, bp, freeblks, 0); while ((aip = LIST_FIRST(&indirdep->ir_donehd)) != 0) - cancel_allocindir(aip, inodedep, freeblks); + cancel_allocindir(aip, NULL, freeblks, 0); while ((aip = LIST_FIRST(&indirdep->ir_writehd)) != 0) - cancel_allocindir(aip, inodedep, freeblks); + cancel_allocindir(aip, NULL, freeblks, 0); while ((aip = LIST_FIRST(&indirdep->ir_completehd)) != 0) - cancel_allocindir(aip, inodedep, freeblks); - bcopy(bp->b_data, indirdep->ir_savebp->b_data, bp->b_bcount); + cancel_allocindir(aip, NULL, freeblks, 0); + /* + * If there are pending partial truncations we need to keep the + * old block copy around until they complete. This is because + * the current b_data is not a perfect superset of the available + * blocks. + */ + if (TAILQ_EMPTY(&indirdep->ir_trunc)) + bcopy(bp->b_data, indirdep->ir_savebp->b_data, bp->b_bcount); + else + bcopy(bp->b_data, indirdep->ir_saveddata, bp->b_bcount); WORKLIST_REMOVE(&indirdep->ir_list); WORKLIST_INSERT(&indirdep->ir_savebp->b_dep, &indirdep->ir_list); - indirdep->ir_savebp = NULL; + indirdep->ir_bp = NULL; + indirdep->ir_freeblks = freeblks; } /* @@ -8952,10 +9985,8 @@ free_indirdep(indirdep) struct indirdep *indirdep; { - KASSERT(LIST_EMPTY(&indirdep->ir_jwork), - ("free_indirdep: Journal work not empty.")); - KASSERT(LIST_EMPTY(&indirdep->ir_jnewblkhd), - ("free_indirdep: Journal new block list not empty.")); + KASSERT(TAILQ_EMPTY(&indirdep->ir_trunc), + ("free_indirdep: Indir trunc list not empty.")); KASSERT(LIST_EMPTY(&indirdep->ir_completehd), ("free_indirdep: Complete head not empty.")); KASSERT(LIST_EMPTY(&indirdep->ir_writehd), @@ -8964,10 +9995,10 @@ free_indirdep(indirdep) ("free_indirdep: done head not empty.")); KASSERT(LIST_EMPTY(&indirdep->ir_deplisthd), ("free_indirdep: deplist head not empty.")); - KASSERT(indirdep->ir_savebp == NULL, - ("free_indirdep: %p ir_savebp != NULL", indirdep)); - KASSERT((indirdep->ir_state & ONDEPLIST) == 0, - ("free_indirdep: %p still on deplist.", indirdep)); + KASSERT((indirdep->ir_state & DEPCOMPLETE), + ("free_indirdep: %p still on newblk list.", indirdep)); + KASSERT(indirdep->ir_saveddata == NULL, + ("free_indirdep: %p still has saved data.", indirdep)); if (indirdep->ir_state & ONWORKLIST) WORKLIST_REMOVE(&indirdep->ir_list); WORKITEM_FREE(indirdep, D_INDIRDEP); @@ -8984,22 +10015,25 @@ initiate_write_indirdep(indirdep, bp) struct buf *bp; { + indirdep->ir_state |= IOSTARTED; if (indirdep->ir_state & GOINGAWAY) panic("disk_io_initiation: indirdep gone"); - /* * If there are no remaining dependencies, this will be writing * the real pointers. */ - if (LIST_EMPTY(&indirdep->ir_deplisthd)) + if (LIST_EMPTY(&indirdep->ir_deplisthd) && + TAILQ_EMPTY(&indirdep->ir_trunc)) return; /* * Replace up-to-date version with safe version. */ - FREE_LOCK(&lk); - indirdep->ir_saveddata = malloc(bp->b_bcount, M_INDIRDEP, - M_SOFTDEP_FLAGS); - ACQUIRE_LOCK(&lk); + if (indirdep->ir_saveddata == NULL) { + FREE_LOCK(&lk); + indirdep->ir_saveddata = malloc(bp->b_bcount, M_INDIRDEP, + M_SOFTDEP_FLAGS); + ACQUIRE_LOCK(&lk); + } indirdep->ir_state &= ~ATTACHED; indirdep->ir_state |= UNDONE; bcopy(bp->b_data, indirdep->ir_saveddata, bp->b_bcount); @@ -9066,11 +10100,11 @@ softdep_setup_blkfree(mp, bp, blkno, frags, wkhd) int frags; struct workhead *wkhd; { - struct jnewblk *jnewblk; - struct worklist *wk, *wkn; -#ifdef SUJ_DEBUG struct bmsafemap *bmsafemap; + struct jnewblk *jnewblk; + struct worklist *wk; struct fs *fs; +#ifdef SUJ_DEBUG uint8_t *blksfree; struct cg *cgp; ufs2_daddr_t jstart; @@ -9081,25 +10115,29 @@ softdep_setup_blkfree(mp, bp, blkno, frags, wkhd) #endif ACQUIRE_LOCK(&lk); + /* Lookup the bmsafemap so we track when it is dirty. */ + fs = VFSTOUFS(mp)->um_fs; + bmsafemap = bmsafemap_lookup(mp, bp, dtog(fs, blkno)); /* * Detach any jnewblks which have been canceled. They must linger * until the bitmap is cleared again by ffs_blkfree() to prevent * an unjournaled allocation from hitting the disk. */ if (wkhd) { - LIST_FOREACH_SAFE(wk, wkhd, wk_list, wkn) { - if (wk->wk_type != D_JNEWBLK) + while ((wk = LIST_FIRST(wkhd)) != NULL) { + WORKLIST_REMOVE(wk); + if (wk->wk_type != D_JNEWBLK) { + WORKLIST_INSERT(&bmsafemap->sm_freehd, wk); continue; + } jnewblk = WK_JNEWBLK(wk); KASSERT(jnewblk->jn_state & GOINGAWAY, ("softdep_setup_blkfree: jnewblk not canceled.")); - WORKLIST_REMOVE(wk); #ifdef SUJ_DEBUG /* * Assert that this block is free in the bitmap * before we discard the jnewblk. */ - fs = VFSTOUFS(mp)->um_fs; cgp = (struct cg *)bp->b_data; blksfree = cg_blksfree(cgp); bno = dtogd(fs, jnewblk->jn_blkno); @@ -9117,12 +10155,6 @@ softdep_setup_blkfree(mp, bp, blkno, frags, wkhd) wk->wk_state |= COMPLETE | ATTACHED; free_jnewblk(jnewblk); } - /* - * The buf must be locked by the caller otherwise these could - * be added while it's being written and the write would - * complete them before they made it to disk. - */ - jwork_move(&bp->b_dep, wkhd); } #ifdef SUJ_DEBUG @@ -9242,6 +10274,8 @@ initiate_write_bmsafemap(bmsafemap, bp) inodedep, id_deps); LIST_SWAP(&bmsafemap->sm_newblkhd, &bmsafemap->sm_newblkwr, newblk, nb_deps); + LIST_SWAP(&bmsafemap->sm_freehd, &bmsafemap->sm_freewr, worklist, + wk_list); } /* @@ -9260,6 +10294,7 @@ softdep_disk_write_complete(bp) struct worklist *wk; struct worklist *owk; struct workhead reattach; + struct freeblks *freeblks; struct buf *sbp; /* @@ -9277,6 +10312,7 @@ softdep_disk_write_complete(bp) ACQUIRE_LOCK(&lk); while ((wk = LIST_FIRST(&bp->b_dep)) != NULL) { WORKLIST_REMOVE(wk); + dep_write[wk->wk_type]++; if (wk == owk) panic("duplicate worklist: %p\n", wk); owk = wk; @@ -9318,18 +10354,17 @@ softdep_disk_write_complete(bp) case D_FREEBLKS: wk->wk_state |= COMPLETE; - if ((wk->wk_state & ALLCOMPLETE) == ALLCOMPLETE) - add_to_worklist(wk, 1); + freeblks = WK_FREEBLKS(wk); + if ((wk->wk_state & ALLCOMPLETE) == ALLCOMPLETE && + LIST_EMPTY(&freeblks->fb_jblkdephd)) + add_to_worklist(wk, WK_NODELAY); continue; case D_FREEWORK: - handle_written_freework(WK_FREEWORK(wk)); + /* Freework on an indirect block, not bmsafemap. */ + handle_written_freework(WK_FREEWORK(wk), 0); break; - case D_FREEDEP: - free_freedep(WK_FREEDEP(wk)); - continue; - case D_JSEGDEP: free_jsegdep(WK_JSEGDEP(wk)); continue; @@ -9459,7 +10494,11 @@ handle_allocindir_partdone(aip) return; indirdep = aip->ai_indirdep; LIST_REMOVE(aip, ai_next); - if (indirdep->ir_state & UNDONE) { + /* + * Don't set a pointer while the buffer is undergoing IO or while + * we have active truncations. + */ + if (indirdep->ir_state & UNDONE || !TAILQ_EMPTY(&indirdep->ir_trunc)) { LIST_INSERT_HEAD(&indirdep->ir_donehd, aip, ai_next); return; } @@ -9490,6 +10529,12 @@ handle_jwork(wkhd) case D_JSEGDEP: free_jsegdep(WK_JSEGDEP(wk)); continue; + case D_FREEDEP: + free_freedep(WK_FREEDEP(wk)); + continue; + case D_FREEWORK: + handle_written_freework(WK_FREEWORK(wk), 1); + continue; default: panic("handle_jwork: Unknown type %s\n", TYPENAME(wk->wk_type)); @@ -9852,21 +10897,26 @@ handle_written_indirdep(indirdep, bp, bpp) struct buf **bpp; { struct allocindir *aip; + struct buf *sbp; int chgs; if (indirdep->ir_state & GOINGAWAY) - panic("disk_write_complete: indirdep gone"); + panic("handle_written_indirdep: indirdep gone"); + if ((indirdep->ir_state & IOSTARTED) == 0) + panic("handle_written_indirdep: IO not started"); chgs = 0; /* * If there were rollbacks revert them here. */ if (indirdep->ir_saveddata) { bcopy(indirdep->ir_saveddata, bp->b_data, bp->b_bcount); - free(indirdep->ir_saveddata, M_INDIRDEP); - indirdep->ir_saveddata = 0; + if (TAILQ_EMPTY(&indirdep->ir_trunc)) { + free(indirdep->ir_saveddata, M_INDIRDEP); + indirdep->ir_saveddata = NULL; + } chgs = 1; } - indirdep->ir_state &= ~UNDONE; + indirdep->ir_state &= ~(UNDONE | IOSTARTED); indirdep->ir_state |= ATTACHED; /* * Move allocindirs with written pointers to the completehd if @@ -9878,6 +10928,7 @@ handle_written_indirdep(indirdep, bp, bpp) if ((indirdep->ir_state & DEPCOMPLETE) == 0) { LIST_INSERT_HEAD(&indirdep->ir_completehd, aip, ai_next); + newblk_freefrag(&aip->ai_block); continue; } free_newblk(&aip->ai_block); @@ -9886,50 +10937,42 @@ handle_written_indirdep(indirdep, bp, bpp) * Move allocindirs that have finished dependency processing from * the done list to the write list after updating the pointers. */ - while ((aip = LIST_FIRST(&indirdep->ir_donehd)) != 0) { - handle_allocindir_partdone(aip); - if (aip == LIST_FIRST(&indirdep->ir_donehd)) - panic("disk_write_complete: not gone"); - chgs = 1; + if (TAILQ_EMPTY(&indirdep->ir_trunc)) { + while ((aip = LIST_FIRST(&indirdep->ir_donehd)) != 0) { + handle_allocindir_partdone(aip); + if (aip == LIST_FIRST(&indirdep->ir_donehd)) + panic("disk_write_complete: not gone"); + chgs = 1; + } } /* - * If this indirdep has been detached from its newblk during - * I/O we need to keep this dep attached to the buffer so - * deallocate_dependencies can find it and properly resolve - * any outstanding dependencies. + * Preserve the indirdep if there were any changes or if it is not + * yet valid on disk. */ - if ((indirdep->ir_state & (ONDEPLIST | DEPCOMPLETE)) == 0) - chgs = 1; - if ((bp->b_flags & B_DELWRI) == 0) + if (chgs) { stat_indir_blk_ptrs++; + bdirty(bp); + return (1); + } /* * If there were no changes we can discard the savedbp and detach * ourselves from the buf. We are only carrying completed pointers * in this case. */ - if (chgs == 0) { - struct buf *sbp; - - sbp = indirdep->ir_savebp; - sbp->b_flags |= B_INVAL | B_NOCACHE; - indirdep->ir_savebp = NULL; - if (*bpp != NULL) - panic("handle_written_indirdep: bp already exists."); - *bpp = sbp; - } else - bdirty(bp); + sbp = indirdep->ir_savebp; + sbp->b_flags |= B_INVAL | B_NOCACHE; + indirdep->ir_savebp = NULL; + indirdep->ir_bp = NULL; + if (*bpp != NULL) + panic("handle_written_indirdep: bp already exists."); + *bpp = sbp; /* - * If there are no fresh dependencies and none waiting on writes - * we can free the indirdep. + * The indirdep may not be freed until its parent points at it. */ - if ((indirdep->ir_state & DEPCOMPLETE) && chgs == 0) { - if (indirdep->ir_state & ONDEPLIST) - LIST_REMOVE(indirdep, ir_next); + if (indirdep->ir_state & DEPCOMPLETE) free_indirdep(indirdep); - return (0); - } - return (chgs); + return (0); } /* @@ -9974,6 +11017,7 @@ handle_written_bmsafemap(bmsafemap, bp) struct inodedep *inodedep; struct jaddref *jaddref, *jatmp; struct jnewblk *jnewblk, *jntmp; + struct ufsmount *ump; uint8_t *inosused; uint8_t *blksfree; struct cg *cgp; @@ -9985,9 +11029,15 @@ handle_written_bmsafemap(bmsafemap, bp) if ((bmsafemap->sm_state & IOSTARTED) == 0) panic("initiate_write_bmsafemap: Not started\n"); + ump = VFSTOUFS(bmsafemap->sm_list.wk_mp); chgs = 0; bmsafemap->sm_state &= ~IOSTARTED; /* + * Release journal work that was waiting on the write. + */ + handle_jwork(&bmsafemap->sm_freewr); + + /* * Restore unwritten inode allocation pending jaddref writes. */ if (!LIST_EMPTY(&bmsafemap->sm_jaddrefhd)) { @@ -10063,16 +11113,17 @@ handle_written_bmsafemap(bmsafemap, bp) LIST_REMOVE(inodedep, id_deps); inodedep->id_bmsafemap = NULL; } - if (LIST_EMPTY(&bmsafemap->sm_jaddrefhd) && + LIST_REMOVE(bmsafemap, sm_next); + if (chgs == 0 && LIST_EMPTY(&bmsafemap->sm_jaddrefhd) && LIST_EMPTY(&bmsafemap->sm_jnewblkhd) && LIST_EMPTY(&bmsafemap->sm_newblkhd) && - LIST_EMPTY(&bmsafemap->sm_inodedephd)) { - if (chgs) - bdirty(bp); + LIST_EMPTY(&bmsafemap->sm_inodedephd) && + LIST_EMPTY(&bmsafemap->sm_freehd)) { LIST_REMOVE(bmsafemap, sm_hash); WORKITEM_FREE(bmsafemap, D_BMSAFEMAP); return (0); } + LIST_INSERT_HEAD(&ump->softdep_dirtycg, bmsafemap, sm_next); bdirty(bp); return (1); } @@ -10113,25 +11164,29 @@ handle_written_mkdir(mkdir, type) complete_mkdir(mkdir); } -static void +static int free_pagedep(pagedep) struct pagedep *pagedep; { int i; - if (pagedep->pd_state & (NEWBLOCK | ONWORKLIST)) - return; + if (pagedep->pd_state & NEWBLOCK) + return (0); + if (!LIST_EMPTY(&pagedep->pd_dirremhd)) + return (0); for (i = 0; i < DAHASHSZ; i++) if (!LIST_EMPTY(&pagedep->pd_diraddhd[i])) - return; - if (!LIST_EMPTY(&pagedep->pd_jmvrefhd)) - return; - if (!LIST_EMPTY(&pagedep->pd_dirremhd)) - return; + return (0); if (!LIST_EMPTY(&pagedep->pd_pendinghd)) - return; + return (0); + if (!LIST_EMPTY(&pagedep->pd_jmvrefhd)) + return (0); + if (pagedep->pd_state & ONWORKLIST) + WORKLIST_REMOVE(&pagedep->pd_list); LIST_REMOVE(pagedep, pd_hash); WORKITEM_FREE(pagedep, D_PAGEDEP); + + return (1); } /* @@ -10217,11 +11272,7 @@ handle_written_filepage(pagedep, bp) * Otherwise it will remain to track any new entries on * the page in case they are fsync'ed. */ - if ((pagedep->pd_state & NEWBLOCK) == 0 && - LIST_EMPTY(&pagedep->pd_jmvrefhd)) { - LIST_REMOVE(pagedep, pd_hash); - WORKITEM_FREE(pagedep, D_PAGEDEP); - } + free_pagedep(pagedep); return (0); } @@ -10324,8 +11375,7 @@ again: TAILQ_FOREACH(inoref, &inodedep->id_inoreflst, if_deps) { if ((inoref->if_state & (DEPCOMPLETE | GOINGAWAY)) == DEPCOMPLETE) { - stat_jwait_inode++; - jwait(&inoref->if_list); + jwait(&inoref->if_list, MNT_WAIT); goto again; } } @@ -10463,8 +11513,7 @@ restart: TAILQ_FOREACH(inoref, &inodedep->id_inoreflst, if_deps) { if ((inoref->if_state & (DEPCOMPLETE | GOINGAWAY)) == DEPCOMPLETE) { - stat_jwait_inode++; - jwait(&inoref->if_list); + jwait(&inoref->if_list, MNT_WAIT); goto restart; } } @@ -10610,6 +11659,8 @@ restart: * Flush all the dirty bitmaps associated with the block device * before flushing the rest of the dirty blocks so as to reduce * the number of dependencies that will have to be rolled back. + * + * XXX Unused? */ void softdep_fsync_mountdev(vp) @@ -10656,76 +11707,124 @@ restart: } /* + * Sync all cylinder groups that were dirty at the time this function is + * called. Newly dirtied cgs will be inserted before the sintenel. This + * is used to flush freedep activity that may be holding up writes to a + * indirect block. + */ +static int +sync_cgs(mp, waitfor) + struct mount *mp; + int waitfor; +{ + struct bmsafemap *bmsafemap; + struct bmsafemap *sintenel; + struct ufsmount *ump; + struct buf *bp; + int error; + + sintenel = malloc(sizeof(*sintenel), M_BMSAFEMAP, M_ZERO | M_WAITOK); + sintenel->sm_cg = -1; + ump = VFSTOUFS(mp); + error = 0; + ACQUIRE_LOCK(&lk); + LIST_INSERT_HEAD(&ump->softdep_dirtycg, sintenel, sm_next); + for (bmsafemap = LIST_NEXT(sintenel, sm_next); bmsafemap != NULL; + bmsafemap = LIST_NEXT(sintenel, sm_next)) { + /* Skip sintenels and cgs with no work to release. */ + if (bmsafemap->sm_cg == -1 || + (LIST_EMPTY(&bmsafemap->sm_freehd) && + LIST_EMPTY(&bmsafemap->sm_freewr))) { + LIST_REMOVE(sintenel, sm_next); + LIST_INSERT_AFTER(bmsafemap, sintenel, sm_next); + continue; + } + /* + * If we don't get the lock and we're waiting try again, if + * not move on to the next buf and try to sync it. + */ + bp = getdirtybuf(bmsafemap->sm_buf, &lk, waitfor); + if (bp == NULL && waitfor == MNT_WAIT) + continue; + LIST_REMOVE(sintenel, sm_next); + LIST_INSERT_AFTER(bmsafemap, sintenel, sm_next); + if (bp == NULL) + continue; + FREE_LOCK(&lk); + if (waitfor == MNT_NOWAIT) + bawrite(bp); + else + error = bwrite(bp); + ACQUIRE_LOCK(&lk); + if (error) + break; + } + LIST_REMOVE(sintenel, sm_next); + FREE_LOCK(&lk); + free(sintenel, M_BMSAFEMAP); + return (error); +} + +/* * This routine is called when we are trying to synchronously flush a * file. This routine must eliminate any filesystem metadata dependencies - * so that the syncing routine can succeed by pushing the dirty blocks - * associated with the file. If any I/O errors occur, they are returned. + * so that the syncing routine can succeed. */ int softdep_sync_metadata(struct vnode *vp) { - struct pagedep *pagedep; - struct allocindir *aip; - struct newblk *newblk; - struct buf *bp, *nbp; - struct worklist *wk; - struct bufobj *bo; - int i, error, waitfor; + int error; - if (!DOINGSOFTDEP(vp)) - return (0); /* - * Ensure that any direct block dependencies have been cleared. + * Ensure that any direct block dependencies have been cleared, + * truncations are started, and inode references are journaled. */ ACQUIRE_LOCK(&lk); - if ((error = flush_inodedep_deps(vp->v_mount, VTOI(vp)->i_number))) { - FREE_LOCK(&lk); - return (error); - } - FREE_LOCK(&lk); + error = flush_inodedep_deps(vp, vp->v_mount, VTOI(vp)->i_number); /* - * For most files, the only metadata dependencies are the - * cylinder group maps that allocate their inode or blocks. - * The block allocation dependencies can be found by traversing - * the dependency lists for any buffers that remain on their - * dirty buffer list. The inode allocation dependency will - * be resolved when the inode is updated with MNT_WAIT. - * This work is done in two passes. The first pass grabs most - * of the buffers and begins asynchronously writing them. The - * only way to wait for these asynchronous writes is to sleep - * on the filesystem vnode which may stay busy for a long time - * if the filesystem is active. So, instead, we make a second - * pass over the dependencies blocking on each write. In the - * usual case we will be blocking against a write that we - * initiated, so when it is done the dependency will have been - * resolved. Thus the second pass is expected to end quickly. + * Ensure that all truncates are written so we won't find deps on + * indirect blocks. */ - waitfor = MNT_NOWAIT; - bo = &vp->v_bufobj; + process_truncates(vp); + FREE_LOCK(&lk); + + return (error); +} + +/* + * This routine is called when we are attempting to sync a buf with + * dependencies. If waitfor is MNT_NOWAIT it attempts to schedule any + * other IO it can but returns EBUSY if the buffer is not yet able to + * be written. Dependencies which will not cause rollbacks will always + * return 0. + */ +int +softdep_sync_buf(struct vnode *vp, struct buf *bp, int waitfor) +{ + struct indirdep *indirdep; + struct pagedep *pagedep; + struct allocindir *aip; + struct newblk *newblk; + struct buf *nbp; + struct worklist *wk; + int i, error; -top: /* - * We must wait for any I/O in progress to finish so that - * all potential buffers on the dirty list will be visible. + * For VCHR we just don't want to force flush any dependencies that + * will cause rollbacks. */ - BO_LOCK(bo); - drain_output(vp); - while ((bp = TAILQ_FIRST(&bo->bo_dirty.bv_hd)) != NULL) { - bp = getdirtybuf(bp, BO_MTX(bo), MNT_WAIT); - if (bp) - break; - } - BO_UNLOCK(bo); - if (bp == NULL) + if (vp->v_type == VCHR) { + if (waitfor == MNT_NOWAIT && softdep_count_dependencies(bp, 0)) + return (EBUSY); return (0); -loop: - /* While syncing snapshots, we must allow recursive lookups */ - BUF_AREC(bp); + } ACQUIRE_LOCK(&lk); /* * As we hold the buffer locked, none of its dependencies * will disappear. */ + error = 0; +top: LIST_FOREACH(wk, &bp->b_dep, wk_list) { switch (wk->wk_type) { @@ -10733,46 +11832,54 @@ loop: case D_ALLOCINDIR: newblk = WK_NEWBLK(wk); if (newblk->nb_jnewblk != NULL) { - stat_jwait_newblk++; - jwait(&newblk->nb_jnewblk->jn_list); - goto restart; + if (waitfor == MNT_NOWAIT) { + error = EBUSY; + goto out_unlock; + } + jwait(&newblk->nb_jnewblk->jn_list, waitfor); + goto top; } - if (newblk->nb_state & DEPCOMPLETE) + if (newblk->nb_state & DEPCOMPLETE || + waitfor == MNT_NOWAIT) continue; nbp = newblk->nb_bmsafemap->sm_buf; nbp = getdirtybuf(nbp, &lk, waitfor); if (nbp == NULL) - continue; + goto top; FREE_LOCK(&lk); - if (waitfor == MNT_NOWAIT) { - bawrite(nbp); - } else if ((error = bwrite(nbp)) != 0) { - break; - } + if ((error = bwrite(nbp)) != 0) + goto out; ACQUIRE_LOCK(&lk); continue; case D_INDIRDEP: + indirdep = WK_INDIRDEP(wk); + if (waitfor == MNT_NOWAIT) { + if (!TAILQ_EMPTY(&indirdep->ir_trunc) || + !LIST_EMPTY(&indirdep->ir_deplisthd)) { + error = EBUSY; + goto out_unlock; + } + } + if (!TAILQ_EMPTY(&indirdep->ir_trunc)) + panic("softdep_sync_buf: truncation pending."); restart: - - LIST_FOREACH(aip, - &WK_INDIRDEP(wk)->ir_deplisthd, ai_next) { + LIST_FOREACH(aip, &indirdep->ir_deplisthd, ai_next) { newblk = (struct newblk *)aip; if (newblk->nb_jnewblk != NULL) { - stat_jwait_newblk++; - jwait(&newblk->nb_jnewblk->jn_list); + jwait(&newblk->nb_jnewblk->jn_list, + waitfor); goto restart; } if (newblk->nb_state & DEPCOMPLETE) continue; nbp = newblk->nb_bmsafemap->sm_buf; - nbp = getdirtybuf(nbp, &lk, MNT_WAIT); + nbp = getdirtybuf(nbp, &lk, waitfor); if (nbp == NULL) goto restart; FREE_LOCK(&lk); - if ((error = bwrite(nbp)) != 0) { - goto loop_end; - } + if ((error = bwrite(nbp)) != 0) + goto out; ACQUIRE_LOCK(&lk); goto restart; } @@ -10780,6 +11887,18 @@ loop: case D_PAGEDEP: /* + * Only flush directory entries in synchronous passes. + */ + if (waitfor != MNT_WAIT) { + error = EBUSY; + goto out_unlock; + } + /* + * While syncing snapshots, we must allow recursive + * lookups. + */ + BUF_AREC(bp); + /* * We are trying to sync a directory that may * have dependencies on both its own metadata * and/or dependencies on the inodes of any @@ -10790,64 +11909,28 @@ loop: for (i = 0; i < DAHASHSZ; i++) { if (LIST_FIRST(&pagedep->pd_diraddhd[i]) == 0) continue; - if ((error = - flush_pagedep_deps(vp, wk->wk_mp, - &pagedep->pd_diraddhd[i]))) { - FREE_LOCK(&lk); - goto loop_end; + if ((error = flush_pagedep_deps(vp, wk->wk_mp, + &pagedep->pd_diraddhd[i]))) { + BUF_NOREC(bp); + goto out_unlock; } } + BUF_NOREC(bp); + continue; + + case D_FREEWORK: continue; default: - panic("softdep_sync_metadata: Unknown type %s", + panic("softdep_sync_buf: Unknown type %s", TYPENAME(wk->wk_type)); /* NOTREACHED */ } - loop_end: - /* We reach here only in error and unlocked */ - if (error == 0) - panic("softdep_sync_metadata: zero error"); - BUF_NOREC(bp); - bawrite(bp); - return (error); } +out_unlock: FREE_LOCK(&lk); - BO_LOCK(bo); - while ((nbp = TAILQ_NEXT(bp, b_bobufs)) != NULL) { - nbp = getdirtybuf(nbp, BO_MTX(bo), MNT_WAIT); - if (nbp) - break; - } - BO_UNLOCK(bo); - BUF_NOREC(bp); - bawrite(bp); - if (nbp != NULL) { - bp = nbp; - goto loop; - } - /* - * The brief unlock is to allow any pent up dependency - * processing to be done. Then proceed with the second pass. - */ - if (waitfor == MNT_NOWAIT) { - waitfor = MNT_WAIT; - goto top; - } - - /* - * If we have managed to get rid of all the dirty buffers, - * then we are done. For certain directories and block - * devices, we may need to do further work. - * - * We must wait for any I/O in progress to finish so that - * all potential buffers on the dirty list will be visible. - */ - BO_LOCK(bo); - drain_output(vp); - BO_UNLOCK(bo); - return ffs_update(vp, 1); - /* return (0); */ +out: + return (error); } /* @@ -10855,7 +11938,8 @@ loop: * Called with splbio blocked. */ static int -flush_inodedep_deps(mp, ino) +flush_inodedep_deps(vp, mp, ino) + struct vnode *vp; struct mount *mp; ino_t ino; { @@ -10887,8 +11971,7 @@ restart: TAILQ_FOREACH(inoref, &inodedep->id_inoreflst, if_deps) { if ((inoref->if_state & (DEPCOMPLETE | GOINGAWAY)) == DEPCOMPLETE) { - stat_jwait_inode++; - jwait(&inoref->if_list); + jwait(&inoref->if_list, MNT_WAIT); goto restart; } } @@ -10930,8 +12013,7 @@ flush_deplist(listhead, waitfor, errorp) TAILQ_FOREACH(adp, listhead, ad_next) { newblk = (struct newblk *)adp; if (newblk->nb_jnewblk != NULL) { - stat_jwait_newblk++; - jwait(&newblk->nb_jnewblk->jn_list); + jwait(&newblk->nb_jnewblk->jn_list, MNT_WAIT); return (1); } if (newblk->nb_state & DEPCOMPLETE) @@ -10944,12 +12026,10 @@ flush_deplist(listhead, waitfor, errorp) return (1); } FREE_LOCK(&lk); - if (waitfor == MNT_NOWAIT) { + if (waitfor == MNT_NOWAIT) bawrite(bp); - } else if ((*errorp = bwrite(bp)) != 0) { - ACQUIRE_LOCK(&lk); - return (1); - } + else + *errorp = bwrite(bp); ACQUIRE_LOCK(&lk); return (1); } @@ -10995,8 +12075,7 @@ flush_newblk_dep(vp, mp, lbn) * Flush the journal. */ if (newblk->nb_jnewblk != NULL) { - stat_jwait_newblk++; - jwait(&newblk->nb_jnewblk->jn_list); + jwait(&newblk->nb_jnewblk->jn_list, MNT_WAIT); continue; } /* @@ -11105,8 +12184,7 @@ restart: TAILQ_FOREACH(inoref, &inodedep->id_inoreflst, if_deps) { if ((inoref->if_state & (DEPCOMPLETE | GOINGAWAY)) == DEPCOMPLETE) { - stat_jwait_inode++; - jwait(&inoref->if_list); + jwait(&inoref->if_list, MNT_WAIT); goto restart; } } @@ -11237,6 +12315,8 @@ softdep_slowdown(vp) softdep_speedup(); stat_sync_limit_hit += 1; FREE_LOCK(&lk); + if (DOINGSUJ(vp)) + return (0); return (1); } @@ -11338,8 +12418,9 @@ retry: UFS_UNLOCK(ump); ACQUIRE_LOCK(&lk); process_removes(vp); + process_truncates(vp); if (ump->softdep_on_worklist > 0 && - process_worklist_item(UFSTOVFS(ump), LK_NOWAIT) != -1) { + process_worklist_item(UFSTOVFS(ump), 1, LK_NOWAIT) != 0) { stat_worklist_push += 1; FREE_LOCK(&lk); UFS_LOCK(ump); @@ -11363,24 +12444,14 @@ retry: UFS_UNLOCK(ump); MNT_ILOCK(mp); MNT_VNODE_FOREACH(lvp, mp, mvp) { - UFS_LOCK(ump); - if (ump->softdep_on_worklist > 0) { - UFS_UNLOCK(ump); - MNT_VNODE_FOREACH_ABORT_ILOCKED(mp, mvp); - MNT_IUNLOCK(mp); - UFS_LOCK(ump); - stat_cleanup_retries += 1; - goto retry; - } - UFS_UNLOCK(ump); VI_LOCK(lvp); - if (TAILQ_FIRST(&lvp->v_bufobj.bo_dirty.bv_hd) == 0 || - VOP_ISLOCKED(lvp) != 0) { + if (TAILQ_FIRST(&lvp->v_bufobj.bo_dirty.bv_hd) == 0) { VI_UNLOCK(lvp); continue; } MNT_IUNLOCK(mp); - if (vget(lvp, LK_EXCLUSIVE | LK_INTERLOCK, curthread)) { + if (vget(lvp, LK_EXCLUSIVE | LK_INTERLOCK | LK_NOWAIT, + curthread)) { MNT_ILOCK(mp); continue; } @@ -11394,8 +12465,17 @@ retry: MNT_ILOCK(mp); } MNT_IUNLOCK(mp); - stat_cleanup_failures += 1; + lvp = ump->um_devvp; + if (vn_lock(lvp, LK_EXCLUSIVE | LK_NOWAIT) == 0) { + VOP_FSYNC(lvp, MNT_NOWAIT, curthread); + VOP_UNLOCK(lvp, 0); + } UFS_LOCK(ump); + if (ump->softdep_on_worklist > 0) { + stat_cleanup_retries += 1; + goto retry; + } + stat_cleanup_failures += 1; } if (time_second - starttime > stat_cleanup_high_delay) stat_cleanup_high_delay = time_second - starttime; @@ -11432,8 +12512,7 @@ request_cleanup(mp, resource) */ if (ump->softdep_on_worklist > max_softdeps / 10) { td->td_pflags |= TDP_SOFTDEP; - process_worklist_item(mp, LK_NOWAIT); - process_worklist_item(mp, LK_NOWAIT); + process_worklist_item(mp, 2, LK_NOWAIT); td->td_pflags &= ~TDP_SOFTDEP; stat_worklist_push += 2; return(1); @@ -11664,6 +12743,7 @@ softdep_count_dependencies(bp, wantcount) { struct worklist *wk; struct bmsafemap *bmsafemap; + struct freework *freework; struct inodedep *inodedep; struct indirdep *indirdep; struct freeblks *freeblks; @@ -11711,6 +12791,13 @@ softdep_count_dependencies(bp, wantcount) case D_INDIRDEP: indirdep = WK_INDIRDEP(wk); + TAILQ_FOREACH(freework, &indirdep->ir_trunc, fw_next) { + /* indirect truncation dependency */ + retval += 1; + if (!wantcount) + goto out; + } + LIST_FOREACH(aip, &indirdep->ir_deplisthd, ai_next) { /* indirect block pointer dependency */ retval += 1; @@ -11758,7 +12845,7 @@ softdep_count_dependencies(bp, wantcount) case D_FREEBLKS: freeblks = WK_FREEBLKS(wk); - if (LIST_FIRST(&freeblks->fb_jfreeblkhd)) { + if (LIST_FIRST(&freeblks->fb_jblkdephd)) { /* Freeblk journal dependency. */ retval += 1; if (!wantcount) diff --git a/sys/ufs/ffs/ffs_vfsops.c b/sys/ufs/ffs/ffs_vfsops.c index 68b9619..c7e0bd1 100644 --- a/sys/ufs/ffs/ffs_vfsops.c +++ b/sys/ufs/ffs/ffs_vfsops.c @@ -2034,12 +2034,10 @@ ffs_geom_strategy(struct bufobj *bo, struct buf *bp) static void db_print_ffs(struct ufsmount *ump) { - db_printf("mp %p %s devvp %p fs %p su_wl %d su_wl_in %d su_deps %d " - "su_req %d\n", + db_printf("mp %p %s devvp %p fs %p su_wl %d su_deps %d su_req %d\n", ump->um_mountp, ump->um_mountp->mnt_stat.f_mntonname, ump->um_devvp, ump->um_fs, ump->softdep_on_worklist, - ump->softdep_on_worklist_inprogress, ump->softdep_deps, - ump->softdep_req); + ump->softdep_deps, ump->softdep_req); } DB_SHOW_COMMAND(ffs, db_show_ffs) diff --git a/sys/ufs/ffs/ffs_vnops.c b/sys/ufs/ffs/ffs_vnops.c index cf6a5a8..9f528da 100644 --- a/sys/ufs/ffs/ffs_vnops.c +++ b/sys/ufs/ffs/ffs_vnops.c @@ -212,26 +212,32 @@ retry: int ffs_syncvnode(struct vnode *vp, int waitfor) { - struct inode *ip = VTOI(vp); + struct inode *ip; struct bufobj *bo; struct buf *bp; struct buf *nbp; - int s, error, wait, passes, skipmeta; ufs_lbn_t lbn; + int error, wait, passes; - wait = (waitfor == MNT_WAIT); - lbn = lblkno(ip->i_fs, (ip->i_size + ip->i_fs->fs_bsize - 1)); - bo = &vp->v_bufobj; + ip = VTOI(vp); ip->i_flag &= ~IN_NEEDSYNC; + bo = &vp->v_bufobj; + + /* + * When doing MNT_WAIT we must first flush all dependencies + * on the inode. + */ + if (DOINGSOFTDEP(vp) && waitfor == MNT_WAIT && + (error = softdep_sync_metadata(vp)) != 0) + return (error); /* * Flush all dirty buffers associated with a vnode. */ - passes = NIADDR + 1; - skipmeta = 0; - if (wait) - skipmeta = 1; - s = splbio(); + error = 0; + passes = 0; + wait = 0; /* Always do an async pass first. */ + lbn = lblkno(ip->i_fs, (ip->i_size + ip->i_fs->fs_bsize - 1)); BO_LOCK(bo); loop: TAILQ_FOREACH(bp, &bo->bo_dirty.bv_hd, b_bobufs) @@ -239,70 +245,53 @@ loop: TAILQ_FOREACH_SAFE(bp, &bo->bo_dirty.bv_hd, b_bobufs, nbp) { /* * Reasons to skip this buffer: it has already been considered - * on this pass, this pass is the first time through on a - * synchronous flush request and the buffer being considered - * is metadata, the buffer has dependencies that will cause + * on this pass, the buffer has dependencies that will cause * it to be redirtied and it has not already been deferred, * or it is already being written. */ if ((bp->b_vflags & BV_SCANNED) != 0) continue; bp->b_vflags |= BV_SCANNED; - if ((skipmeta == 1 && bp->b_lblkno < 0)) + /* Flush indirects in order. */ + if (waitfor == MNT_WAIT && bp->b_lblkno <= -NDADDR && + lbn_level(bp->b_lblkno) >= passes) continue; + if (bp->b_lblkno > lbn) + panic("ffs_syncvnode: syncing truncated data."); if (BUF_LOCK(bp, LK_EXCLUSIVE | LK_NOWAIT, NULL)) continue; BO_UNLOCK(bo); - if (!wait && !LIST_EMPTY(&bp->b_dep) && - (bp->b_flags & B_DEFERRED) == 0 && - buf_countdeps(bp, 0)) { - bp->b_flags |= B_DEFERRED; - BUF_UNLOCK(bp); - BO_LOCK(bo); - continue; - } if ((bp->b_flags & B_DELWRI) == 0) panic("ffs_fsync: not dirty"); /* - * If this is a synchronous flush request, or it is not a - * file or device, start the write on this buffer immediately. + * Check for dependencies and potentially complete them. */ - if (wait || (vp->v_type != VREG && vp->v_type != VBLK)) { - - /* - * On our final pass through, do all I/O synchronously - * so that we can find out if our flush is failing - * because of write errors. - */ - if (passes > 0 || !wait) { - if ((bp->b_flags & B_CLUSTEROK) && !wait) { - (void) vfs_bio_awrite(bp); - } else { - bremfree(bp); - splx(s); - (void) bawrite(bp); - s = splbio(); - } - } else { - bremfree(bp); - splx(s); - if ((error = bwrite(bp)) != 0) - return (error); - s = splbio(); + if (!LIST_EMPTY(&bp->b_dep) && + (error = softdep_sync_buf(vp, bp, + wait ? MNT_WAIT : MNT_NOWAIT)) != 0) { + /* I/O error. */ + if (error != EBUSY) { + BUF_UNLOCK(bp); + return (error); } - } else if ((vp->v_type == VREG) && (bp->b_lblkno >= lbn)) { - /* - * If the buffer is for data that has been truncated - * off the file, then throw it away. - */ + /* If we deferred once, don't defer again. */ + if ((bp->b_flags & B_DEFERRED) == 0) { + bp->b_flags |= B_DEFERRED; + BUF_UNLOCK(bp); + goto next; + } + } + if (wait) { bremfree(bp); - bp->b_flags |= B_INVAL | B_NOCACHE; - splx(s); - brelse(bp); - s = splbio(); - } else - vfs_bio_awrite(bp); - + if ((error = bwrite(bp)) != 0) + return (error); + } else if ((bp->b_flags & B_CLUSTEROK)) { + (void) vfs_bio_awrite(bp); + } else { + bremfree(bp); + (void) bawrite(bp); + } +next: /* * Since we may have slept during the I/O, we need * to start from a known point. @@ -310,51 +299,44 @@ loop: BO_LOCK(bo); nbp = TAILQ_FIRST(&bo->bo_dirty.bv_hd); } + if (waitfor != MNT_WAIT) { + BO_UNLOCK(bo); + return (ffs_update(vp, waitfor)); + } + /* Drain IO to see if we're done. */ + bufobj_wwait(bo, 0, 0); /* - * If we were asked to do this synchronously, then go back for - * another pass, this time doing the metadata. + * Block devices associated with filesystems may have new I/O + * requests posted for them even if the vnode is locked, so no + * amount of trying will get them clean. We make several passes + * as a best effort. + * + * Regular files may need multiple passes to flush all dependency + * work as it is possible that we must write once per indirect + * level, once for the leaf, and once for the inode and each of + * these will be done with one sync and one async pass. */ - if (skipmeta) { - skipmeta = 0; - goto loop; - } - - if (wait) { - bufobj_wwait(bo, 3, 0); - BO_UNLOCK(bo); - - /* - * Ensure that any filesystem metatdata associated - * with the vnode has been written. - */ - splx(s); - if ((error = softdep_sync_metadata(vp)) != 0) - return (error); - s = splbio(); - - BO_LOCK(bo); - if (bo->bo_dirty.bv_cnt > 0) { - /* - * Block devices associated with filesystems may - * have new I/O requests posted for them even if - * the vnode is locked, so no amount of trying will - * get them clean. Thus we give block devices a - * good effort, then just give up. For all other file - * types, go around and try again until it is clean. - */ - if (passes > 0) { - passes -= 1; - goto loop; - } + if (bo->bo_dirty.bv_cnt > 0) { + /* Write the inode after sync passes to flush deps. */ + if (wait && DOINGSOFTDEP(vp)) { + BO_UNLOCK(bo); + ffs_update(vp, MNT_WAIT); + BO_LOCK(bo); + } + /* switch between sync/async. */ + wait = !wait; + if (wait == 1 || ++passes < NIADDR + 2) + goto loop; #ifdef INVARIANTS - if (!vn_isdisk(vp, NULL)) - vprint("ffs_fsync: dirty", vp); + if (!vn_isdisk(vp, NULL)) + vprint("ffs_fsync: dirty", vp); #endif - } } BO_UNLOCK(bo); - splx(s); - return (ffs_update(vp, wait)); + error = ffs_update(vp, MNT_WAIT); + if (DOINGSUJ(vp)) + softdep_journal_fsync(VTOI(vp)); + return (error); } static int diff --git a/sys/ufs/ffs/fs.h b/sys/ufs/ffs/fs.h index 0b7e908..a0b8e5b 100644 --- a/sys/ufs/ffs/fs.h +++ b/sys/ufs/ffs/fs.h @@ -664,6 +664,7 @@ lbn_offset(struct fs *fs, int level) #define JOP_FREEBLK 4 /* Free a block or a tree of blocks. */ #define JOP_MVREF 5 /* Move a reference from one off to another. */ #define JOP_TRUNC 6 /* Partial truncation record. */ +#define JOP_SYNC 7 /* fsync() complete record. */ #define JREC_SIZE 32 /* Record and segment header size. */ @@ -729,7 +730,7 @@ struct jblkrec { /* * Truncation record. Records a partial truncation so that it may be - * completed later. + * completed at check time. Also used for sync records. */ struct jtrncrec { uint32_t jt_op; diff --git a/sys/ufs/ffs/softdep.h b/sys/ufs/ffs/softdep.h index d864a4a..9be175c 100644 --- a/sys/ufs/ffs/softdep.h +++ b/sys/ufs/ffs/softdep.h @@ -127,7 +127,7 @@ #define DIRCHG 0x000080 /* diradd, dirrem only */ #define GOINGAWAY 0x000100 /* indirdep, jremref only */ #define IOSTARTED 0x000200 /* inodedep, pagedep, bmsafemap only */ -#define UNUSED400 0x000400 /* currently available. */ +#define DELAYEDFREE 0x000400 /* allocindirect free delayed. */ #define NEWBLOCK 0x000800 /* pagedep, jaddref only */ #define INPROGRESS 0x001000 /* dirrem, freeblks, freefrag, freefile only */ #define UFS1FMT 0x002000 /* indirdep only */ @@ -195,8 +195,9 @@ struct worklist { #define WK_JFREEBLK(wk) ((struct jfreeblk *)(wk)) #define WK_FREEDEP(wk) ((struct freedep *)(wk)) #define WK_JFREEFRAG(wk) ((struct jfreefrag *)(wk)) -#define WK_SBDEP(wk) ((struct sbdep *)wk) +#define WK_SBDEP(wk) ((struct sbdep *)(wk)) #define WK_JTRUNC(wk) ((struct jtrunc *)(wk)) +#define WK_JFSYNC(wk) ((struct jfsync *)(wk)) /* * Various types of lists @@ -213,10 +214,12 @@ LIST_HEAD(jaddrefhd, jaddref); LIST_HEAD(jremrefhd, jremref); LIST_HEAD(jmvrefhd, jmvref); LIST_HEAD(jnewblkhd, jnewblk); -LIST_HEAD(jfreeblkhd, jfreeblk); +LIST_HEAD(jblkdephd, jblkdep); LIST_HEAD(freeworkhd, freework); +TAILQ_HEAD(freeworklst, freework); TAILQ_HEAD(jseglst, jseg); TAILQ_HEAD(inoreflst, inoref); +TAILQ_HEAD(freeblklst, freeblks); /* * The "pagedep" structure tracks the various dependencies related to @@ -321,6 +324,7 @@ struct inodedep { struct allocdirectlst id_newinoupdt; /* updates when inode written */ struct allocdirectlst id_extupdt; /* extdata updates pre-inode write */ struct allocdirectlst id_newextupdt; /* extdata updates at ino write */ + struct freeblklst id_freeblklst; /* List of partial truncates. */ union { struct ufs1_dinode *idu_savedino1; /* saved ufs1_dinode contents */ struct ufs2_dinode *idu_savedino2; /* saved ufs2_dinode contents */ @@ -342,8 +346,9 @@ struct inodedep { struct bmsafemap { struct worklist sm_list; /* cylgrp buffer */ # define sm_state sm_list.wk_state - int sm_cg; LIST_ENTRY(bmsafemap) sm_hash; /* Hash links. */ + LIST_ENTRY(bmsafemap) sm_next; /* Mount list. */ + int sm_cg; struct buf *sm_buf; /* associated buffer */ struct allocdirecthd sm_allocdirecthd; /* allocdirect deps */ struct allocdirecthd sm_allocdirectwr; /* writing allocdirect deps */ @@ -355,6 +360,8 @@ struct bmsafemap { struct newblkhd sm_newblkwr; /* writing newblk deps */ struct jaddrefhd sm_jaddrefhd; /* Pending inode allocations. */ struct jnewblkhd sm_jnewblkhd; /* Pending block allocations. */ + struct workhead sm_freehd; /* Freedep deps. */ + struct workhead sm_freewr; /* Written freedeps. */ }; /* @@ -442,14 +449,15 @@ struct indirdep { struct worklist ir_list; /* buffer holding indirect block */ # define ir_state ir_list.wk_state /* indirect block pointer state */ LIST_ENTRY(indirdep) ir_next; /* alloc{direct,indir} list */ + TAILQ_HEAD(, freework) ir_trunc; /* List of truncations. */ caddr_t ir_saveddata; /* buffer cache contents */ struct buf *ir_savebp; /* buffer holding safe copy */ + struct buf *ir_bp; /* buffer holding live copy */ struct allocindirhd ir_completehd; /* waiting for indirdep complete */ struct allocindirhd ir_writehd; /* Waiting for the pointer write. */ struct allocindirhd ir_donehd; /* done waiting to update safecopy */ struct allocindirhd ir_deplisthd; /* allocindir deps for this block */ - struct jnewblkhd ir_jnewblkhd; /* Canceled block allocations. */ - struct workhead ir_jwork; /* Journal work pending. */ + struct freeblks *ir_freeblks; /* Freeblks that frees this indir. */ }; /* @@ -471,6 +479,7 @@ struct allocindir { LIST_ENTRY(allocindir) ai_next; /* indirdep's list of allocindir's */ struct indirdep *ai_indirdep; /* address of associated indirdep */ ufs2_daddr_t ai_oldblkno; /* old value of block pointer */ + ufs_lbn_t ai_lbn; /* Logical block number. */ int ai_offset; /* Pointer offset in parent. */ }; #define ai_newblkno ai_block.nb_newblkno @@ -516,14 +525,22 @@ struct freefrag { struct freeblks { struct worklist fb_list; /* id_inowait or delayed worklist */ # define fb_state fb_list.wk_state /* inode and dirty block state */ - struct jfreeblkhd fb_jfreeblkhd; /* Journal entries pending */ + TAILQ_ENTRY(freeblks) fb_next; /* List of inode truncates. */ + struct jblkdephd fb_jblkdephd; /* Journal entries pending */ struct workhead fb_freeworkhd; /* Work items pending */ struct workhead fb_jwork; /* Journal work pending */ - ino_t fb_previousinum; /* inode of previous owner of blocks */ - uid_t fb_uid; /* uid of previous owner of blocks */ struct vnode *fb_devvp; /* filesystem device vnode */ - ufs2_daddr_t fb_chkcnt; /* used to check cnt of blks released */ +#ifdef QUOTA + struct dquot *fb_quota[MAXQUOTAS]; /* quotas to be adjusted */ +#endif + uint64_t fb_modrev; /* Inode revision at start of trunc. */ + off_t fb_len; /* Length we're truncating to. */ + ufs2_daddr_t fb_chkcnt; /* Expected blks released. */ + ufs2_daddr_t fb_freecnt; /* Actual blocks released. */ + ino_t fb_inum; /* inode owner of blocks */ + uid_t fb_uid; /* uid of previous owner of blocks */ int fb_ref; /* Children outstanding. */ + int fb_cgwait; /* cg writes outstanding. */ }; /* @@ -538,16 +555,18 @@ struct freeblks { struct freework { struct worklist fw_list; /* Delayed worklist. */ # define fw_state fw_list.wk_state - LIST_ENTRY(freework) fw_next; /* For seg journal list. */ - struct jnewblk *fw_jnewblk; /* Journal entry to cancel. */ + LIST_ENTRY(freework) fw_segs; /* Seg list. */ + TAILQ_ENTRY(freework) fw_next; /* Hash/Trunc list. */ + struct jnewblk *fw_jnewblk; /* Journal entry to cancel. */ struct freeblks *fw_freeblks; /* Root of operation. */ struct freework *fw_parent; /* Parent indirect. */ + struct indirdep *fw_indir; /* indirect block. */ ufs2_daddr_t fw_blkno; /* Our block #. */ ufs_lbn_t fw_lbn; /* Original lbn before free. */ - int fw_frags; /* Number of frags. */ - int fw_ref; /* Number of children out. */ - int fw_off; /* Current working position. */ - struct workhead fw_jwork; /* Journal work pending. */ + uint16_t fw_frags; /* Number of frags. */ + uint16_t fw_ref; /* Number of children out. */ + uint16_t fw_off; /* Current working position. */ + uint16_t fw_start; /* Start of partial truncate. */ }; /* @@ -674,6 +693,7 @@ struct dirrem { LIST_ENTRY(dirrem) dm_inonext; /* inodedep's list of dirrem's */ struct jremrefhd dm_jremrefhd; /* Pending remove reference deps. */ ino_t dm_oldinum; /* inum of the removed dir entry */ + doff_t dm_offset; /* offset of removed dir entry in blk */ union { struct pagedep *dmu_pagedep; /* pagedep dependency for remove */ ino_t dmu_dirinum; /* parent inode number (for rmdir) */ @@ -707,7 +727,7 @@ struct dirrem { */ struct newdirblk { struct worklist db_list; /* id_inowait or pg_newdirblk */ -# define db_state db_list.wk_state /* unused */ +# define db_state db_list.wk_state struct pagedep *db_pagedep; /* associated pagedep */ struct workhead db_mkdir; }; @@ -807,29 +827,36 @@ struct jnewblk { # define jn_state jn_list.wk_state struct jsegdep *jn_jsegdep; /* Will track our journal record. */ LIST_ENTRY(jnewblk) jn_deps; /* Jnewblks on sm_jnewblkhd. */ - LIST_ENTRY(jnewblk) jn_indirdeps; /* Jnewblks on ir_jnewblkhd. */ struct worklist *jn_dep; /* Dependency to ref completed seg. */ - ino_t jn_ino; /* Ino to which allocated. */ ufs_lbn_t jn_lbn; /* Lbn to which allocated. */ ufs2_daddr_t jn_blkno; /* Blkno allocated */ + ino_t jn_ino; /* Ino to which allocated. */ int jn_oldfrags; /* Previous fragments when extended. */ int jn_frags; /* Number of fragments. */ }; /* + * A "jblkdep" structure tracks jfreeblk and jtrunc records attached to a + * freeblks structure. + */ +struct jblkdep { + struct worklist jb_list; /* For softdep journal pending. */ + struct jsegdep *jb_jsegdep; /* Reference to the jseg. */ + struct freeblks *jb_freeblks; /* Back pointer to freeblks. */ + LIST_ENTRY(jblkdep) jb_deps; /* Dep list on freeblks. */ + +}; + +/* * A "jfreeblk" structure tracks the journal write for freeing a block * or tree of blocks. The block pointer must not be cleared in the inode * or indirect prior to the jfreeblk being written to the journal. */ struct jfreeblk { - struct worklist jf_list; /* Linked to softdep_journal_pending. */ -# define jf_state jf_list.wk_state - struct jsegdep *jf_jsegdep; /* Will track our journal record. */ - struct freeblks *jf_freeblks; /* Back pointer to freeblks. */ - LIST_ENTRY(jfreeblk) jf_deps; /* Jfreeblk on fb_jfreeblkhd. */ - ino_t jf_ino; /* Ino from which blocks freed. */ + struct jblkdep jf_dep; /* freeblks linkage. */ ufs_lbn_t jf_lbn; /* Lbn from which blocks freed. */ ufs2_daddr_t jf_blkno; /* Blkno being freed. */ + ino_t jf_ino; /* Ino from which blocks freed. */ int jf_frags; /* Number of frags being freed. */ }; @@ -843,24 +870,31 @@ struct jfreefrag { # define fr_state fr_list.wk_state struct jsegdep *fr_jsegdep; /* Will track our journal record. */ struct freefrag *fr_freefrag; /* Back pointer to freefrag. */ - ino_t fr_ino; /* Ino from which frag freed. */ ufs_lbn_t fr_lbn; /* Lbn from which frag freed. */ ufs2_daddr_t fr_blkno; /* Blkno being freed. */ + ino_t fr_ino; /* Ino from which frag freed. */ int fr_frags; /* Size of frag being freed. */ }; /* - * A "jtrunc" journals the intent to truncate an inode to a non-zero - * value. This is done synchronously prior to the synchronous partial - * truncation process. The jsegdep is not released until the truncation - * is complete and the truncated inode is fsync'd. + * A "jtrunc" journals the intent to truncate an inode's data or extent area. */ struct jtrunc { - struct worklist jt_list; /* Linked to softdep_journal_pending. */ - struct jsegdep *jt_jsegdep; /* Will track our journal record. */ - ino_t jt_ino; /* Ino being truncated. */ - off_t jt_size; /* Final file size. */ - int jt_extsize; /* Final extent size. */ + struct jblkdep jt_dep; /* freeblks linkage. */ + off_t jt_size; /* Final file size. */ + int jt_extsize; /* Final extent size. */ + ino_t jt_ino; /* Ino being truncated. */ +}; + +/* + * A "jfsync" journals the completion of an fsync which invalidates earlier + * jtrunc records in the journal. + */ +struct jfsync { + struct worklist jfs_list; /* For softdep journal pending. */ + off_t jfs_size; /* Sync file size. */ + int jfs_extsize; /* Sync extent size. */ + ino_t jfs_ino; /* ino being synced. */ }; /* diff --git a/sys/ufs/ufs/inode.h b/sys/ufs/ufs/inode.h index f6c4bb5..7adcc73 100644 --- a/sys/ufs/ufs/inode.h +++ b/sys/ufs/ufs/inode.h @@ -127,6 +127,8 @@ struct inode { #define IN_EA_LOCKED 0x0200 #define IN_EA_LOCKWAIT 0x0400 +#define IN_TRUNCATED 0x0800 /* Journaled truncation pending. */ + #define i_devvp i_ump->um_devvp #define i_umbufobj i_ump->um_bo #define i_dirhash i_un.dirhash diff --git a/sys/ufs/ufs/quota.h b/sys/ufs/ufs/quota.h index ca0dcce..3dfcf26 100644 --- a/sys/ufs/ufs/quota.h +++ b/sys/ufs/ufs/quota.h @@ -239,6 +239,12 @@ int setuse(struct thread *, struct mount *, u_long, int, void *); int getquotasize(struct thread *, struct mount *, u_long, int, void *); vfs_quotactl_t ufs_quotactl; +#ifdef SOFTUPDATES +int quotaref(struct vnode *, struct dquot **); +void quotarele(struct dquot **); +void quotaadj(struct dquot **, struct ufsmount *, int64_t); +#endif /* SOFTUPDATES */ + #else /* !_KERNEL */ #include <sys/cdefs.h> diff --git a/sys/ufs/ufs/ufs_lookup.c b/sys/ufs/ufs/ufs_lookup.c index 45ebea1..391b3e9 100644 --- a/sys/ufs/ufs/ufs_lookup.c +++ b/sys/ufs/ufs/ufs_lookup.c @@ -967,7 +967,7 @@ ufs_direnter(dvp, tvp, dirp, cnp, newdirbp, isrename) return (0); if (tvp != NULL) VOP_UNLOCK(tvp, 0); - error = VOP_FSYNC(dvp, MNT_WAIT, td); + (void) VOP_FSYNC(dvp, MNT_WAIT, td); if (tvp != NULL) vn_lock(tvp, LK_EXCLUSIVE | LK_RETRY); return (error); diff --git a/sys/ufs/ufs/ufs_quota.c b/sys/ufs/ufs/ufs_quota.c index be82b8f..59e89f9 100644 --- a/sys/ufs/ufs/ufs_quota.c +++ b/sys/ufs/ufs/ufs_quota.c @@ -1613,6 +1613,101 @@ dqflush(struct vnode *vp) } /* + * The following three functions are provided for the adjustment of + * quotas by the soft updates code. + */ +#ifdef SOFTUPDATES +/* + * Acquire a reference to the quota structures associated with a vnode. + * Return count of number of quota structures found. + */ +int +quotaref(vp, qrp) + struct vnode *vp; + struct dquot **qrp; +{ + struct inode *ip; + struct dquot *dq; + int i, found; + + for (i = 0; i < MAXQUOTAS; i++) + qrp[i] = NODQUOT; + /* + * Disk quotas must be turned off for system files. Currently + * snapshot and quota files. + */ + if ((vp->v_vflag & VV_SYSTEM) != 0) + return (0); + /* + * Iterate through and copy active quotas. + */ + found = 0; + ip = VTOI(vp); + for (i = 0; i < MAXQUOTAS; i++) { + if ((dq = ip->i_dquot[i]) == NODQUOT) + continue; + DQREF(dq); + qrp[i] = dq; + found++; + } + return (found); +} + +/* + * Release a set of quota structures obtained from a vnode. + */ +void +quotarele(qrp) + struct dquot **qrp; +{ + struct dquot *dq; + int i; + + for (i = 0; i < MAXQUOTAS; i++) { + if ((dq = qrp[i]) == NODQUOT) + continue; + dqrele(NULL, dq); + } +} + +/* + * Adjust the number of blocks associated with a quota. + * Positive numbers when adding blocks; negative numbers when freeing blocks. + */ +void +quotaadj(qrp, ump, blkcount) + struct dquot **qrp; + struct ufsmount *ump; + int64_t blkcount; +{ + struct dquot *dq; + ufs2_daddr_t ncurblocks; + int i; + + if (blkcount == 0) + return; + for (i = 0; i < MAXQUOTAS; i++) { + if ((dq = qrp[i]) == NODQUOT) + continue; + DQI_LOCK(dq); + DQI_WAIT(dq, PINOD+1, "adjqta"); + ncurblocks = dq->dq_curblocks + blkcount; + if (ncurblocks >= 0) + dq->dq_curblocks = ncurblocks; + else + dq->dq_curblocks = 0; + if (blkcount < 0) + dq->dq_flags &= ~DQ_BLKS; + else if (dq->dq_curblocks + blkcount >= dq->dq_bsoftlimit && + dq->dq_curblocks < dq->dq_bsoftlimit) + dq->dq_btime = time_second + ump->um_btime[i]; + dq->dq_flags |= DQ_MOD; + DQI_UNLOCK(dq); + } +} +#endif /* SOFTUPDATES */ + +/* * 32-bit / 64-bit conversion functions. * * 32-bit quota records are stored in native byte order. Attention must diff --git a/sys/ufs/ufs/ufsmount.h b/sys/ufs/ufs/ufsmount.h index c2cfcfb..7874105 100644 --- a/sys/ufs/ufs/ufsmount.h +++ b/sys/ufs/ufs/ufsmount.h @@ -61,6 +61,7 @@ struct jblocks; struct inodedep; TAILQ_HEAD(inodedeplst, inodedep); +LIST_HEAD(bmsafemaphd, bmsafemap); /* This structure describes the UFS specific mount structure data. */ struct ufsmount { @@ -82,10 +83,10 @@ struct ufsmount { struct workhead softdep_journal_pending; /* journal work queue */ struct worklist *softdep_journal_tail; /* Tail pointer for above */ struct jblocks *softdep_jblocks; /* Journal block information */ - struct inodedeplst softdep_unlinked; /* Unlinked inodes */ + struct inodedeplst softdep_unlinked; /* Unlinked inodes */ + struct bmsafemaphd softdep_dirtycg; /* Dirty CGs */ int softdep_on_journal; /* Items on the journal list */ int softdep_on_worklist; /* Items on the worklist */ - int softdep_on_worklist_inprogress; /* Busy items on worklist */ int softdep_deps; /* Total dependency count */ int softdep_accdeps; /* accumulated dep count */ int softdep_req; /* Wakeup when deps hits 0. */ diff --git a/sys/x86/x86/tsc.c b/sys/x86/x86/tsc.c index d82bd73..70c176a 100644 --- a/sys/x86/x86/tsc.c +++ b/sys/x86/x86/tsc.c @@ -79,7 +79,8 @@ static void tsc_freq_changed(void *arg, const struct cf_level *level, int status); static void tsc_freq_changing(void *arg, const struct cf_level *level, int *status); -static unsigned tsc_get_timecount(struct timecounter *tc); +static unsigned tsc_get_timecount(struct timecounter *tc); +static unsigned tsc_get_timecount_low(struct timecounter *tc); static void tsc_levels_changed(void *arg, int unit); static struct timecounter tsc_timecounter = { @@ -166,9 +167,6 @@ tsc_freq_vmware(void) tsc_freq = regs[0] | ((uint64_t)regs[1] << 32); } tsc_is_invariant = 1; -#ifdef SMP - smp_tsc = 1; /* XXX */ -#endif return (1); } @@ -385,7 +383,29 @@ test_smp_tsc(void) if (bootverbose) printf("SMP: %sed TSC synchronization test\n", smp_tsc ? "pass" : "fail"); - return (smp_tsc ? 800 : -100); + if (smp_tsc && tsc_is_invariant) { + switch (cpu_vendor_id) { + case CPU_VENDOR_AMD: + /* + * Starting with Family 15h processors, TSC clock + * source is in the north bridge. Check whether + * we have a single-socket/multi-core platform. + * XXX Need more work for complex cases. + */ + if (CPUID_TO_FAMILY(cpu_id) < 0x15 || + (amd_feature2 & AMDID2_CMP) == 0 || + smp_cpus > (cpu_procinfo2 & AMDID_CMP_CORES) + 1) + break; + return (1000); + case CPU_VENDOR_INTEL: + /* + * XXX Assume Intel platforms have synchronized TSCs. + */ + return (1000); + } + return (800); + } + return (-100); } #undef N @@ -395,11 +415,19 @@ test_smp_tsc(void) static void init_TSC_tc(void) { + uint64_t max_freq; + int shift; if ((cpu_feature & CPUID_TSC) == 0 || tsc_disabled) return; /* + * Limit timecounter frequency to fit in an int and prevent it from + * overflowing too fast. + */ + max_freq = UINT_MAX; + + /* * We can not use the TSC if we support APM. Precise timekeeping * on an APM'ed machine is at best a fools pursuit, since * any and all of the time spent in various SMM code can't @@ -421,13 +449,30 @@ init_TSC_tc(void) * We can not use the TSC in SMP mode unless the TSCs on all CPUs are * synchronized. If the user is sure that the system has synchronized * TSCs, set kern.timecounter.smp_tsc tunable to a non-zero value. + * We also limit the frequency even lower to avoid "temporal anomalies" + * as much as possible. */ - if (smp_cpus > 1) + if (smp_cpus > 1) { tsc_timecounter.tc_quality = test_smp_tsc(); + max_freq >>= 8; + } else #endif + if (tsc_is_invariant) + tsc_timecounter.tc_quality = 1000; + init: + for (shift = 0; shift < 32 && (tsc_freq >> shift) > max_freq; shift++) + ; + if (shift > 0) { + tsc_timecounter.tc_get_timecount = tsc_get_timecount_low; + tsc_timecounter.tc_name = "TSC-low"; + if (bootverbose) + printf("TSC timecounter discards lower %d bit(s)\n", + shift); + } if (tsc_freq != 0) { - tsc_timecounter.tc_frequency = tsc_freq; + tsc_timecounter.tc_frequency = tsc_freq >> shift; + tsc_timecounter.tc_priv = (void *)(intptr_t)shift; tc_init(&tsc_timecounter); } } @@ -499,7 +544,8 @@ tsc_freq_changed(void *arg, const struct cf_level *level, int status) /* Total setting for this level gives the new frequency in MHz. */ freq = (uint64_t)level->total_set.freq * 1000000; atomic_store_rel_64(&tsc_freq, freq); - atomic_store_rel_64(&tsc_timecounter.tc_frequency, freq); + tsc_timecounter.tc_frequency = + freq >> (int)(intptr_t)tsc_timecounter.tc_priv; } static int @@ -514,7 +560,8 @@ sysctl_machdep_tsc_freq(SYSCTL_HANDLER_ARGS) error = sysctl_handle_64(oidp, &freq, 0, req); if (error == 0 && req->newptr != NULL) { atomic_store_rel_64(&tsc_freq, freq); - atomic_store_rel_64(&tsc_timecounter.tc_frequency, freq); + atomic_store_rel_64(&tsc_timecounter.tc_frequency, + freq >> (int)(intptr_t)tsc_timecounter.tc_priv); } return (error); } @@ -523,8 +570,15 @@ SYSCTL_PROC(_machdep, OID_AUTO, tsc_freq, CTLTYPE_U64 | CTLFLAG_RW, 0, 0, sysctl_machdep_tsc_freq, "QU", "Time Stamp Counter frequency"); static u_int -tsc_get_timecount(struct timecounter *tc) +tsc_get_timecount(struct timecounter *tc __unused) { return (rdtsc32()); } + +static u_int +tsc_get_timecount_low(struct timecounter *tc) +{ + + return (rdtsc() >> (int)(intptr_t)tc->tc_priv); +} diff --git a/sys/xen/interface/io/xenbus.h b/sys/xen/interface/io/xenbus.h index 5e24f31..672c7d4 100644 --- a/sys/xen/interface/io/xenbus.h +++ b/sys/xen/interface/io/xenbus.h @@ -64,6 +64,15 @@ enum xenbus_state { /* * Closed: No connection exists between front and back end. + * + * For backend devices with the "online" attribute, the front can + * request a reconnect at any time. To handle this transition + * gracefully, backend devices must reinitialize any XenStore data + * used to negotiate features with a peer before transitioning to + * the closed state. When a reconnect request occurs, the + * XenBus backend support code will automatically transition the + * backend device from Closed to InitWait, kicking off the ring + * and feature negotiation process. */ XenbusStateClosed = 6, diff --git a/sys/xen/xenbus/xenbus.c b/sys/xen/xenbus/xenbus.c index c3e5fee..8887066 100644 --- a/sys/xen/xenbus/xenbus.c +++ b/sys/xen/xenbus/xenbus.c @@ -103,12 +103,13 @@ xenbus_strstate(XenbusState state) int xenbus_watch_path(device_t dev, char *path, struct xs_watch *watch, - xs_watch_cb_t *callback) + xs_watch_cb_t *callback, uintptr_t callback_data) { int error; watch->node = path; watch->callback = callback; + watch->callback_data = callback_data; error = xs_register_watch(watch); @@ -124,7 +125,7 @@ xenbus_watch_path(device_t dev, char *path, struct xs_watch *watch, int xenbus_watch_path2(device_t dev, const char *path, const char *path2, struct xs_watch *watch, - xs_watch_cb_t *callback) + xs_watch_cb_t *callback, uintptr_t callback_data) { int error; char *state = malloc(strlen(path) + 1 + strlen(path2) + 1, @@ -134,7 +135,7 @@ xenbus_watch_path2(device_t dev, const char *path, strcat(state, "/"); strcat(state, path2); - error = xenbus_watch_path(dev, state, watch, callback); + error = xenbus_watch_path(dev, state, watch, callback, callback_data); if (error) { free(state,M_XENBUS); } @@ -286,3 +287,8 @@ xenbus_dev_is_online(device_t dev) return (value); } + +void +xenbus_localend_changed(device_t dev, const char *path) +{ +} diff --git a/sys/xen/xenbus/xenbus_if.m b/sys/xen/xenbus/xenbus_if.m index d671418..87d7c7f 100644 --- a/sys/xen/xenbus/xenbus_if.m +++ b/sys/xen/xenbus/xenbus_if.m @@ -27,7 +27,11 @@ # #include <sys/bus.h> -#include <xen/interface/io/xenbus.h> + +#include <machine/atomic.h> +#include <machine/xen/xen-os.h> +#include <xen/evtchn.h> +#include <xen/xenbus/xenbusvar.h> INTERFACE xenbus; @@ -39,7 +43,21 @@ INTERFACE xenbus; * state has changed.. * \param _newstate The new state of the otherend device. */ -METHOD int otherend_changed { +METHOD void otherend_changed { device_t _dev; enum xenbus_state _newstate; }; + +/** + * \brief Callback triggered when the XenStore tree of the local end + * of a split device changes. + * + * \param _dev NewBus device_t for this XenBus device whose otherend's + * state has changed.. + * \param _path The tree relative sub-path to the modified node. The empty + * string indicates the root of the tree was destroyed. + */ +METHOD void localend_changed { + device_t _dev; + const char * _path; +} DEFAULT xenbus_localend_changed; diff --git a/sys/xen/xenbus/xenbusb.c b/sys/xen/xenbus/xenbusb.c index 4bc86aa..cc519c5 100644 --- a/sys/xen/xenbus/xenbusb.c +++ b/sys/xen/xenbus/xenbusb.c @@ -90,10 +90,16 @@ xenbusb_free_child_ivars(struct xenbus_device_ivars *ivars) ivars->xd_otherend_watch.node = NULL; } + if (ivars->xd_local_watch.node != NULL) { + xs_unregister_watch(&ivars->xd_local_watch); + ivars->xd_local_watch.node = NULL; + } + if (ivars->xd_node != NULL) { free(ivars->xd_node, M_XENBUS); ivars->xd_node = NULL; } + ivars->xd_node_len = 0; if (ivars->xd_type != NULL) { free(ivars->xd_type, M_XENBUS); @@ -104,6 +110,7 @@ xenbusb_free_child_ivars(struct xenbus_device_ivars *ivars) free(ivars->xd_otherend_path, M_XENBUS); ivars->xd_otherend_path = NULL; } + ivars->xd_otherend_path_len = 0; free(ivars, M_XENBUS); } @@ -121,30 +128,64 @@ xenbusb_free_child_ivars(struct xenbus_device_ivars *ivars) * watch event data. The vector should be indexed via the * xs_watch_type enum in xs_wire.h. * \param vec_size The number of elements in vec. - * - * \return The device_t of the found device if any, or NULL. - * - * \note device_t is a pointer type, so it can be compared against - * NULL for validity. */ static void -xenbusb_otherend_changed(struct xs_watch *watch, const char **vec, +xenbusb_otherend_watch_cb(struct xs_watch *watch, const char **vec, unsigned int vec_size __unused) { struct xenbus_device_ivars *ivars; - device_t dev; + device_t child; + device_t bus; + const char *path; enum xenbus_state newstate; - ivars = (struct xenbus_device_ivars *) watch; - dev = ivars->xd_dev; + ivars = (struct xenbus_device_ivars *)watch->callback_data; + child = ivars->xd_dev; + bus = device_get_parent(child); - if (!ivars->xd_otherend_path - || strncmp(ivars->xd_otherend_path, vec[XS_WATCH_PATH], - strlen(ivars->xd_otherend_path))) + path = vec[XS_WATCH_PATH]; + if (ivars->xd_otherend_path == NULL + || strncmp(ivars->xd_otherend_path, path, ivars->xd_otherend_path_len)) return; newstate = xenbus_read_driver_state(ivars->xd_otherend_path); - XENBUS_OTHEREND_CHANGED(dev, newstate); + XENBUSB_OTHEREND_CHANGED(bus, child, newstate); +} + +/** + * XenBus watch callback registered against the XenStore sub-tree + * represnting the local half of a split device connection. + * + * This callback is invoked whenever any XenStore data in the subtree + * is modified, either by us or another privledged domain. + * + * \param watch The xs_watch object used to register this callback + * function. + * \param vec An array of pointers to NUL terminated strings containing + * watch event data. The vector should be indexed via the + * xs_watch_type enum in xs_wire.h. + * \param vec_size The number of elements in vec. + * + */ +static void +xenbusb_local_watch_cb(struct xs_watch *watch, const char **vec, + unsigned int vec_size __unused) +{ + struct xenbus_device_ivars *ivars; + device_t child; + device_t bus; + const char *path; + + ivars = (struct xenbus_device_ivars *)watch->callback_data; + child = ivars->xd_dev; + bus = device_get_parent(child); + + path = vec[XS_WATCH_PATH]; + if (ivars->xd_node == NULL + || strncmp(ivars->xd_node, path, ivars->xd_node_len)) + return; + + XENBUSB_LOCALEND_CHANGED(bus, child, &path[ivars->xd_node_len]); } /** @@ -193,12 +234,14 @@ xenbusb_delete_child(device_t dev, device_t child) /* * We no longer care about the otherend of the - * connection. Cancel the watch now so that we + * connection. Cancel the watches now so that we * don't try to handle an event for a partially * detached child. */ if (ivars->xd_otherend_watch.node != NULL) xs_unregister_watch(&ivars->xd_otherend_watch); + if (ivars->xd_local_watch.node != NULL) + xs_unregister_watch(&ivars->xd_local_watch); device_delete_child(dev, child); xenbusb_free_child_ivars(ivars); @@ -421,6 +464,7 @@ xenbusb_probe_children(device_t dev) */ ivars = device_get_ivars(kids[i]); xs_register_watch(&ivars->xd_otherend_watch); + xs_register_watch(&ivars->xd_local_watch); } free(kids, M_TEMP); } @@ -475,7 +519,7 @@ xenbusb_devices_changed(struct xs_watch *watch, const char **vec, char *p; u_int component; - xbs = (struct xenbusb_softc *)watch; + xbs = (struct xenbusb_softc *)watch->callback_data; dev = xbs->xbs_dev; if (len <= XS_WATCH_PATH) { @@ -620,6 +664,7 @@ xenbusb_add_device(device_t dev, const char *type, const char *id) sx_init(&ivars->xd_lock, "xdlock"); ivars->xd_flags = XDF_CONNECTING; ivars->xd_node = strdup(devpath, M_XENBUS); + ivars->xd_node_len = strlen(devpath); ivars->xd_type = strdup(type, M_XENBUS); ivars->xd_state = XenbusStateInitialising; @@ -630,12 +675,16 @@ xenbusb_add_device(device_t dev, const char *type, const char *id) goto out; } - statepath = malloc(strlen(ivars->xd_otherend_path) + statepath = malloc(ivars->xd_otherend_path_len + strlen("/state") + 1, M_XENBUS, M_WAITOK); sprintf(statepath, "%s/state", ivars->xd_otherend_path); - ivars->xd_otherend_watch.node = statepath; - ivars->xd_otherend_watch.callback = xenbusb_otherend_changed; + ivars->xd_otherend_watch.callback = xenbusb_otherend_watch_cb; + ivars->xd_otherend_watch.callback_data = (uintptr_t)ivars; + + ivars->xd_local_watch.node = ivars->xd_node; + ivars->xd_local_watch.callback = xenbusb_local_watch_cb; + ivars->xd_local_watch.callback_data = (uintptr_t)ivars; mtx_lock(&xbs->xbs_lock); xbs->xbs_connecting_children++; @@ -693,6 +742,7 @@ xenbusb_attach(device_t dev, char *bus_node, u_int id_components) xbs->xbs_device_watch.node = bus_node; xbs->xbs_device_watch.callback = xenbusb_devices_changed; + xbs->xbs_device_watch.callback_data = (uintptr_t)xbs; TASK_INIT(&xbs->xbs_probe_children, 0, xenbusb_probe_children_cb, dev); @@ -735,7 +785,7 @@ xenbusb_resume(device_t dev) DEVICE_RESUME(kids[i]); - statepath = malloc(strlen(ivars->xd_otherend_path) + statepath = malloc(ivars->xd_otherend_path_len + strlen("/state") + 1, M_XENBUS, M_WAITOK); sprintf(statepath, "%s/state", ivars->xd_otherend_path); @@ -819,7 +869,7 @@ xenbusb_write_ivar(device_t dev, device_t child, int index, uintptr_t value) { int error; - newstate = (enum xenbus_state) value; + newstate = (enum xenbus_state)value; sx_xlock(&ivars->xd_lock); if (ivars->xd_state == newstate) { error = 0; @@ -876,3 +926,24 @@ xenbusb_write_ivar(device_t dev, device_t child, int index, uintptr_t value) return (ENOENT); } + +void +xenbusb_otherend_changed(device_t bus, device_t child, enum xenbus_state state) +{ + XENBUS_OTHEREND_CHANGED(child, state); +} + +void +xenbusb_localend_changed(device_t bus, device_t child, const char *path) +{ + + if (strcmp(path, "/state") != 0) { + struct xenbus_device_ivars *ivars; + + ivars = device_get_ivars(child); + sx_xlock(&ivars->xd_lock); + ivars->xd_state = xenbus_read_driver_state(ivars->xd_node); + sx_xunlock(&ivars->xd_lock); + } + XENBUS_LOCALEND_CHANGED(child, path); +} diff --git a/sys/xen/xenbus/xenbusb.h b/sys/xen/xenbus/xenbusb.h index 75abb98..33008f7 100644 --- a/sys/xen/xenbus/xenbusb.h +++ b/sys/xen/xenbus/xenbusb.h @@ -41,7 +41,6 @@ * Datastructures and function declarations for use in implementing * bus attachements (e.g. frontend and backend device busses) for XenBus. */ -#include "xenbusb_if.h" /** * Enumeration of state flag values for the xbs_flags field of @@ -61,10 +60,6 @@ struct xenbusb_softc { * XenStore watch used to monitor the subtree of the * XenStore where devices for this bus attachment arrive * and depart. - * - * \note This field must be the first in the softc structure - * so that a simple cast can be used to retrieve the - * softc from within a XenStore watch event callback. */ struct xs_watch xbs_device_watch; @@ -129,14 +124,17 @@ struct xenbus_device_ivars { * XenStore watch used to monitor the subtree of the * XenStore where information about the otherend of * the split Xen device this device instance represents. - * - * \note This field must be the first in the instance - * variable structure so that a simple cast can be - * used to retrieve ivar data from within a XenStore - * watch event callback. */ struct xs_watch xd_otherend_watch; + /** + * XenStore watch used to monitor the XenStore sub-tree + * associated with this device. This watch will fire + * for modifications that we make from our domain as + * well as for those made by the control domain. + */ + struct xs_watch xd_local_watch; + /** Sleepable lock used to protect instance data. */ struct sx xd_lock; @@ -152,6 +150,9 @@ struct xenbus_device_ivars { */ char *xd_node; + /** The length of xd_node. */ + int xd_node_len; + /** XenBus device type ("vbd", "vif", etc.). */ char *xd_type; @@ -168,6 +169,9 @@ struct xenbus_device_ivars { * about the otherend of this split device instance. */ char *xd_otherend_path; + + /** The length of xd_otherend_path. */ + int xd_otherend_path_len; }; /** @@ -247,6 +251,26 @@ int xenbusb_write_ivar(device_t dev, device_t child, int index, uintptr_t value); /** + * \brief Common XenBus method implementing responses to peer state changes. + * + * \param bus The XenBus bus parent of child. + * \param child The XenBus child whose peer stat has changed. + * \param state The current state of the peer. + */ +void xenbusb_otherend_changed(device_t bus, device_t child, + enum xenbus_state state); + +/** + * \brief Common XenBus method implementing responses to local XenStore changes. + * + * \param bus The XenBus bus parent of child. + * \param child The XenBus child whose peer stat has changed. + * \param path The tree relative sub-path to the modified node. The empty + * string indicates the root of the tree was destroyed. + */ +void xenbusb_localend_changed(device_t bus, device_t child, const char *path); + +/** * \brief Attempt to add a XenBus device instance to this XenBus bus. * * \param dev The NewBus device representing this XenBus bus. @@ -269,4 +293,6 @@ int xenbusb_write_ivar(device_t dev, device_t child, int index, */ int xenbusb_add_device(device_t dev, const char *type, const char *id); +#include "xenbusb_if.h" + #endif /* _XEN_XENBUS_XENBUSB_H */ diff --git a/sys/xen/xenbus/xenbusb_back.c b/sys/xen/xenbus/xenbusb_back.c index 32bbc04..1252abe 100644 --- a/sys/xen/xenbus/xenbusb_back.c +++ b/sys/xen/xenbus/xenbusb_back.c @@ -208,57 +208,79 @@ xenbusb_back_get_otherend_node(device_t dev, struct xenbus_device_ivars *ivars) if (error == 0) { ivars->xd_otherend_path = strdup(otherend_path, M_XENBUS); + ivars->xd_otherend_path_len = strlen(otherend_path); free(otherend_path, M_XENSTORE); } return (error); } /** - * \brief Backend XenBus child instance variable write access method. - * - * \param dev The NewBus device representing this XenBus bus. - * \param child The NewBus device representing a child of dev%'s XenBus bus. - * \param index The index of the instance variable to access. - * \param value The new value to set in the instance variable accessed. - * - * \return On success, 0. Otherwise an errno value indicating the - * type of failure. - * - * Xenbus_back overrides this method so that it can trap state transitions - * of local backend devices and clean up their XenStore entries as necessary - * during device instance teardown. + * \brief Backend XenBus method implementing responses to peer state changes. + * + * \param bus The XenBus bus parent of child. + * \param child The XenBus child whose peer stat has changed. + * \param state The current state of the peer. */ -static int -xenbusb_back_write_ivar(device_t dev, device_t child, int index, - uintptr_t value) +static void +xenbusb_back_otherend_changed(device_t bus, device_t child, + enum xenbus_state peer_state) { - int error; + /* Perform default processing of state. */ + xenbusb_otherend_changed(bus, child, peer_state); - error = xenbusb_write_ivar(dev, child, index, value); + /* + * "Online" devices are never fully detached in the + * newbus sense. Only the front<->back connection is + * torn down. If the front returns to the initialising + * state after closing a previous connection, signal + * our willingness to reconnect and that all necessary + * XenStore data for feature negotiation is present. + */ + if (peer_state == XenbusStateInitialising + && xenbus_dev_is_online(child) != 0 + && xenbus_get_state(child) == XenbusStateClosed) + xenbus_set_state(child, XenbusStateInitWait); +} - if (index == XENBUS_IVAR_STATE - && (enum xenbus_state)value == XenbusStateClosed - && xenbus_dev_is_online(child) == 0) { +/** + * \brief Backend XenBus method implementing responses to local + * XenStore changes. + * + * \param bus The XenBus bus parent of child. + * \param child The XenBus child whose peer stat has changed. + * \param_path The tree relative sub-path to the modified node. The empty + * string indicates the root of the tree was destroyed. + */ +static void +xenbusb_back_localend_changed(device_t bus, device_t child, const char *path) +{ - /* - * Cleanup the hotplug entry in the XenStore if - * present. The control domain expects any userland - * component associated with this device to destroy - * this node in order to signify it is safe to - * teardown the device. However, not all backends - * rely on userland components, and those that - * do should either use a communication channel - * other than the XenStore, or ensure the hotplug - * data is already cleaned up. - * - * This removal ensures that no matter what path - * is taken to mark a back-end closed, the control - * domain will understand that it is closed. - */ - xs_rm(XST_NIL, xenbus_get_node(child), "hotplug-status"); - } + xenbusb_localend_changed(bus, child, path); - return (error); + if (strcmp(path, "/state") != 0 + && strcmp(path, "/online") != 0) + return; + + if (xenbus_get_state(child) != XenbusStateClosed + || xenbus_dev_is_online(child) != 0) + return; + + /* + * Cleanup the hotplug entry in the XenStore if + * present. The control domain expects any userland + * component associated with this device to destroy + * this node in order to signify it is safe to + * teardown the device. However, not all backends + * rely on userland components, and those that + * do should either use a communication channel + * other than the XenStore, or ensure the hotplug + * data is already cleaned up. + * + * This removal ensures that no matter what path + * is taken to mark a back-end closed, the control + * domain will understand that it is closed. + */ + xs_rm(XST_NIL, xenbus_get_node(child), "hotplug-status"); } /*-------------------- Private Device Attachment Data -----------------------*/ @@ -275,7 +297,7 @@ static device_method_t xenbusb_back_methods[] = { /* Bus Interface */ DEVMETHOD(bus_print_child, xenbusb_print_child), DEVMETHOD(bus_read_ivar, xenbusb_read_ivar), - DEVMETHOD(bus_write_ivar, xenbusb_back_write_ivar), + DEVMETHOD(bus_write_ivar, xenbusb_write_ivar), DEVMETHOD(bus_alloc_resource, bus_generic_alloc_resource), DEVMETHOD(bus_release_resource, bus_generic_release_resource), DEVMETHOD(bus_activate_resource, bus_generic_activate_resource), @@ -284,6 +306,8 @@ static device_method_t xenbusb_back_methods[] = { /* XenBus Bus Interface */ DEVMETHOD(xenbusb_enumerate_type, xenbusb_back_enumerate_type), DEVMETHOD(xenbusb_get_otherend_node, xenbusb_back_get_otherend_node), + DEVMETHOD(xenbusb_otherend_changed, xenbusb_back_otherend_changed), + DEVMETHOD(xenbusb_localend_changed, xenbusb_back_localend_changed), { 0, 0 } }; diff --git a/sys/xen/xenbus/xenbusb_front.c b/sys/xen/xenbus/xenbusb_front.c index 0bc06a4..b4e470e 100644 --- a/sys/xen/xenbus/xenbusb_front.c +++ b/sys/xen/xenbus/xenbusb_front.c @@ -156,6 +156,7 @@ xenbusb_front_get_otherend_node(device_t dev, struct xenbus_device_ivars *ivars) if (error == 0) { ivars->xd_otherend_path = strdup(otherend_path, M_XENBUS); + ivars->xd_otherend_path_len = strlen(otherend_path); free(otherend_path, M_XENSTORE); } return (error); diff --git a/sys/xen/xenbus/xenbusb_if.m b/sys/xen/xenbus/xenbusb_if.m index a32e3f6..c49f333 100644 --- a/sys/xen/xenbus/xenbusb_if.m +++ b/sys/xen/xenbus/xenbusb_if.m @@ -31,10 +31,12 @@ # #include <sys/bus.h> +#include <sys/lock.h> +#include <sys/sx.h> +#include <sys/taskqueue.h> -HEADER { -struct xenbus_device_ivars; -} +#include <xen/xenstore/xenstorevar.h> +#include <xen/xenbus/xenbusb.h> INTERFACE xenbusb; @@ -76,3 +78,34 @@ METHOD int get_otherend_node { device_t _dev; struct xenbus_device_ivars *_ivars; } + +/** + * \brief Handle a XenStore change detected in the peer tree of a child + * device of the bus. + * + * \param _bus NewBus device_t for this XenBus (front/back) bus instance. + * \param _child NewBus device_t for the child device whose peer XenStore + * tree has changed. + * \param _state The current state of the peer. + */ +METHOD void otherend_changed { + device_t _bus; + device_t _child; + enum xenbus_state _state; +} DEFAULT xenbusb_otherend_changed; + +/** + * \brief Handle a XenStore change detected in the local tree of a child + * device of the bus. + * + * \param _bus NewBus device_t for this XenBus (front/back) bus instance. + * \param _child NewBus device_t for the child device whose peer XenStore + * tree has changed. + * \param _path The tree relative sub-path to the modified node. The empty + * string indicates the root of the tree was destroyed. + */ +METHOD void localend_changed { + device_t _bus; + device_t _child; + const char * _path; +} DEFAULT xenbusb_localend_changed; diff --git a/sys/xen/xenbus/xenbusvar.h b/sys/xen/xenbus/xenbusvar.h index 55d7f29..bf2a342 100644 --- a/sys/xen/xenbus/xenbusvar.h +++ b/sys/xen/xenbus/xenbusvar.h @@ -51,8 +51,6 @@ #include <xen/xenstore/xenstorevar.h> -#include "xenbus_if.h" - /* XenBus allocations including XenStore data returned to clients. */ MALLOC_DECLARE(M_XENBUS); @@ -116,6 +114,8 @@ XenbusState xenbus_read_driver_state(const char *path); * must be stable for the lifetime of the watch. * \param callback The function to call when XenStore objects at or below * path are modified. + * \param cb_data Client data that can be retrieved from the watch object + * during the callback. * * \return On success, 0. Otherwise an errno value indicating the * type of failure. @@ -126,7 +126,8 @@ XenbusState xenbus_read_driver_state(const char *path); */ int xenbus_watch_path(device_t dev, char *path, struct xs_watch *watch, - xs_watch_cb_t *callback); + xs_watch_cb_t *callback, + uintptr_t cb_data); /** * Initialize and register a watch at path/path2 in the XenStore. @@ -138,6 +139,8 @@ int xenbus_watch_path(device_t dev, char *path, * must be stable for the lifetime of the watch. * \param callback The function to call when XenStore objects at or below * path are modified. + * \param cb_data Client data that can be retrieved from the watch object + * during the callback. * * \return On success, 0. Otherwise an errno value indicating the * type of failure. @@ -153,7 +156,8 @@ int xenbus_watch_path(device_t dev, char *path, */ int xenbus_watch_path2(device_t dev, const char *path, const char *path2, struct xs_watch *watch, - xs_watch_cb_t *callback); + xs_watch_cb_t *callback, + uintptr_t cb_data); /** * Grant access to the given ring_mfn to the peer of the given device. @@ -275,4 +279,16 @@ const char *xenbus_strstate(enum xenbus_state state); */ int xenbus_dev_is_online(device_t dev); +/** + * Default callback invoked when a change to the local XenStore sub-tree + * for a device is modified. + * + * \param dev The XenBus device whose tree was modified. + * \param path The tree relative sub-path to the modified node. The empty + * string indicates the root of the tree was destroyed. + */ +void xenbus_localend_changed(device_t dev, const char *path); + +#include "xenbus_if.h" + #endif /* _XEN_XENBUS_XENBUSVAR_H */ diff --git a/sys/xen/xenstore/xenstorevar.h b/sys/xen/xenstore/xenstorevar.h index df41e31..4a1382d 100644 --- a/sys/xen/xenstore/xenstorevar.h +++ b/sys/xen/xenstore/xenstorevar.h @@ -56,8 +56,8 @@ struct xenstore_domain_interface; struct xs_watch; extern struct xenstore_domain_interface *xen_store; -typedef void (xs_watch_cb_t)(struct xs_watch *, - const char **vec, unsigned int len); +typedef void (xs_watch_cb_t)(struct xs_watch *, const char **vec, + unsigned int len); /* Register callback to watch subtree (node) in the XenStore. */ struct xs_watch @@ -69,6 +69,9 @@ struct xs_watch /* Callback (executed in a process context with no locks held). */ xs_watch_cb_t *callback; + + /* Callback client data untouched by the XenStore watch mechanism. */ + uintptr_t callback_data; }; LIST_HEAD(xs_watch_list, xs_watch); @@ -301,7 +304,7 @@ int xs_gather(struct xs_transaction t, const char *dir, ...); * XenStore watches allow a client to be notified via a callback (embedded * within the watch object) of changes to an object in the XenStore. * - * \param watch A xenbus_watch struct with it's node and callback fields + * \param watch An xs_watch struct with it's node and callback fields * properly initialized. * * \return On success, 0. Otherwise an errno value indicating the diff --git a/tools/regression/bin/sh/execution/set-x1.0 b/tools/regression/bin/sh/execution/set-x1.0 new file mode 100644 index 0000000..7fe1dbf --- /dev/null +++ b/tools/regression/bin/sh/execution/set-x1.0 @@ -0,0 +1,8 @@ +# $FreeBSD$ + +key='must_contain_this' +{ r=`set -x; { : "$key"; } 2>&1 >/dev/null`; } 2>/dev/null +case $r in +*"$key"*) true ;; +*) false ;; +esac diff --git a/tools/regression/bin/sh/execution/set-x2.0 b/tools/regression/bin/sh/execution/set-x2.0 new file mode 100644 index 0000000..56d54e3 --- /dev/null +++ b/tools/regression/bin/sh/execution/set-x2.0 @@ -0,0 +1,9 @@ +# $FreeBSD$ + +key='must contain this' +PS4="$key+ " +{ r=`set -x; { :; } 2>&1 >/dev/null`; } 2>/dev/null +case $r in +*"$key"*) true ;; +*) false ;; +esac diff --git a/tools/regression/bin/sh/execution/set-x3.0 b/tools/regression/bin/sh/execution/set-x3.0 new file mode 100644 index 0000000..1ca57ac --- /dev/null +++ b/tools/regression/bin/sh/execution/set-x3.0 @@ -0,0 +1,9 @@ +# $FreeBSD$ + +key='must contain this' +PS4='$key+ ' +{ r=`set -x; { :; } 2>&1 >/dev/null`; } 2>/dev/null +case $r in +*"$key"*) true ;; +*) false ;; +esac diff --git a/tools/regression/bin/sh/parameters/env1.0 b/tools/regression/bin/sh/parameters/env1.0 new file mode 100644 index 0000000..c0d4a2c --- /dev/null +++ b/tools/regression/bin/sh/parameters/env1.0 @@ -0,0 +1,11 @@ +# $FreeBSD$ + +export key='must contain this' +unset x +r=$(ENV="\${x?\$key}" ${SH} -i +m 2>&1 >/dev/null <<\EOF +exit 0 +EOF +) && case $r in +*"$key"*) true ;; +*) false ;; +esac diff --git a/tools/tools/README b/tools/tools/README index ecae5de..42ea75c 100644 --- a/tools/tools/README +++ b/tools/tools/README @@ -16,6 +16,7 @@ cfi Common Flash Interface (CFI) tool commitsdb A tool for reconstructing commit history using md5 checksums of the commit logs. crypto Test and exercise tools related to the crypto framework +cxgbetool A tool for the cxgbe(4) driver. diffburst OBSOLETE: equivalent functionality is available via split -p. For example: "split -p ^diff < patchfile". See split(1). editing Editor modes and the like to help editing FreeBSD code. diff --git a/tools/tools/cxgbetool/Makefile b/tools/tools/cxgbetool/Makefile new file mode 100644 index 0000000..dc2beda --- /dev/null +++ b/tools/tools/cxgbetool/Makefile @@ -0,0 +1,9 @@ +# $FreeBSD$ + +PROG= cxgbetool +SRCS= cxgbetool.c +NO_MAN= +CFLAGS+= -I${.CURDIR}/../../../sys/dev/cxgbe -I. +BINDIR?= /usr/sbin + +.include <bsd.prog.mk> diff --git a/tools/tools/cxgbetool/cxgbetool.c b/tools/tools/cxgbetool/cxgbetool.c new file mode 100644 index 0000000..da6bfba --- /dev/null +++ b/tools/tools/cxgbetool/cxgbetool.c @@ -0,0 +1,1453 @@ +/*- + * Copyright (c) 2011 Chelsio Communications, Inc. + * All rights reserved. + * Written by: Navdeep Parhar <np@FreeBSD.org> + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the distribution. + * + * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND + * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE + * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE + * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE + * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL + * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS + * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) + * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY + * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF + * SUCH DAMAGE. + */ + +#include <sys/cdefs.h> +__FBSDID("$FreeBSD$"); + +#include <stdint.h> +#include <stdlib.h> +#include <errno.h> +#include <err.h> +#include <fcntl.h> +#include <string.h> +#include <stdio.h> +#include <sys/ioctl.h> +#include <sys/types.h> +#include <sys/socket.h> +#include <net/ethernet.h> +#include <netinet/in.h> +#include <arpa/inet.h> + +#include "t4_ioctl.h" + +#define ARRAY_SIZE(a) (sizeof(a) / sizeof((a)[0])) + +#define max(x, y) ((x) > (y) ? (x) : (y)) + +static const char *progname, *nexus; + +struct reg_info { + const char *name; + uint32_t addr; + uint32_t len; +}; + +struct mod_regs { + const char *name; + const struct reg_info *ri; +}; + +struct field_desc { + const char *name; /* Field name */ + unsigned short start; /* Start bit position */ + unsigned short end; /* End bit position */ + unsigned char shift; /* # of low order bits omitted and implicitly 0 */ + unsigned char hex; /* Print field in hex instead of decimal */ + unsigned char islog2; /* Field contains the base-2 log of the value */ +}; + +#include "reg_defs_t4.c" +#include "reg_defs_t4vf.c" + +static void +usage(FILE *fp) +{ + fprintf(fp, "Usage: %s <nexus> [operation]\n", progname); + fprintf(fp, + "\tcontext <type> <id> show an SGE context\n" + "\tfilter <idx> [<param> <val>] ... set a filter\n" + "\tfilter <idx> delete|clear delete a filter\n" + "\tfilter list list all filters\n" + "\tfilter mode [<match>] ... get/set global filter mode\n" + "\treg <address>[=<val>] read/write register\n" + "\treg64 <address>[=<val>] read/write 64 bit register\n" + "\tregdump [<module>] ... dump registers\n" + "\tstdio interactive mode\n" + ); +} + +static inline unsigned int +get_card_vers(unsigned int version) +{ + return (version & 0x3ff); +} + +static int +real_doit(unsigned long cmd, void *data, const char *cmdstr) +{ + static int fd = -1; + int rc = 0; + + if (fd == -1) { + char buf[64]; + + snprintf(buf, sizeof(buf), "/dev/%s", nexus); + if ((fd = open(buf, O_RDWR)) < 0) { + warn("open(%s)", nexus); + rc = errno; + return (rc); + } + } + + rc = ioctl(fd, cmd, data); + if (rc < 0) { + warn("%s", cmdstr); + rc = errno; + } + + return (rc); +} +#define doit(x, y) real_doit(x, y, #x) + +static char * +str_to_number(const char *s, long *val, long long *vall) +{ + char *p; + + if (vall) + *vall = strtoll(s, &p, 0); + else if (val) + *val = strtol(s, &p, 0); + else + p = NULL; + + return (p); +} + +static int +read_reg(long addr, int size, long long *val) +{ + struct t4_reg reg; + int rc; + + reg.addr = (uint32_t) addr; + reg.size = (uint32_t) size; + reg.val = 0; + + rc = doit(CHELSIO_T4_GETREG, ®); + + *val = reg.val; + + return (rc); +} + +static int +write_reg(long addr, int size, long long val) +{ + struct t4_reg reg; + + reg.addr = (uint32_t) addr; + reg.size = (uint32_t) size; + reg.val = (uint64_t) val; + + return doit(CHELSIO_T4_SETREG, ®); +} + +static int +register_io(int argc, const char *argv[], int size) +{ + char *p, *v; + long addr; + long long val; + int w = 0, rc; + + if (argc == 1) { + /* <reg> OR <reg>=<value> */ + + p = str_to_number(argv[0], &addr, NULL); + if (*p) { + if (*p != '=') { + warnx("invalid register \"%s\"", argv[0]); + return (EINVAL); + } + + w = 1; + v = p + 1; + p = str_to_number(v, NULL, &val); + + if (*p) { + warnx("invalid value \"%s\"", v); + return (EINVAL); + } + } + + } else if (argc == 2) { + /* <reg> <value> */ + + w = 1; + + p = str_to_number(argv[0], &addr, NULL); + if (*p) { + warnx("invalid register \"%s\"", argv[0]); + return (EINVAL); + } + + p = str_to_number(argv[1], NULL, &val); + if (*p) { + warnx("invalid value \"%s\"", argv[1]); + return (EINVAL); + } + } else { + warnx("reg: invalid number of arguments (%d)", argc); + return (EINVAL); + } + + if (w) + rc = write_reg(addr, size, val); + else { + rc = read_reg(addr, size, &val); + if (rc == 0) + printf("0x%llx [%llu]\n", val, val); + } + + return (rc); +} + +static inline uint32_t +xtract(uint32_t val, int shift, int len) +{ + return (val >> shift) & ((1 << len) - 1); +} + +static int +dump_block_regs(const struct reg_info *reg_array, const uint32_t *regs) +{ + uint32_t reg_val = 0; + + for ( ; reg_array->name; ++reg_array) + if (!reg_array->len) { + reg_val = regs[reg_array->addr / 4]; + printf("[%#7x] %-47s %#-10x %u\n", reg_array->addr, + reg_array->name, reg_val, reg_val); + } else { + uint32_t v = xtract(reg_val, reg_array->addr, + reg_array->len); + + printf(" %*u:%u %-47s %#-10x %u\n", + reg_array->addr < 10 ? 3 : 2, + reg_array->addr + reg_array->len - 1, + reg_array->addr, reg_array->name, v, v); + } + + return (1); +} + +static int +dump_regs_table(int argc, const char *argv[], const uint32_t *regs, + const struct mod_regs *modtab, int nmodules) +{ + int i, j, match; + + for (i = 0; i < argc; i++) { + for (j = 0; j < nmodules; j++) { + if (!strcmp(argv[i], modtab[j].name)) + break; + } + + if (j == nmodules) { + warnx("invalid register block \"%s\"", argv[i]); + fprintf(stderr, "\nAvailable blocks:"); + for ( ; nmodules; nmodules--, modtab++) + fprintf(stderr, " %s", modtab->name); + fprintf(stderr, "\n"); + return (EINVAL); + } + } + + for ( ; nmodules; nmodules--, modtab++) { + + match = argc == 0 ? 1 : 0; + for (i = 0; !match && i < argc; i++) { + if (!strcmp(argv[i], modtab->name)) + match = 1; + } + + if (match) + dump_block_regs(modtab->ri, regs); + } + + return (0); +} + +#define T4_MODREGS(name) { #name, t4_##name##_regs } +static int +dump_regs_t4(int argc, const char *argv[], const uint32_t *regs) +{ + static struct mod_regs t4_mod[] = { + T4_MODREGS(sge), + { "pci", t4_pcie_regs }, + T4_MODREGS(dbg), + T4_MODREGS(mc), + T4_MODREGS(ma), + { "edc0", t4_edc_0_regs }, + { "edc1", t4_edc_1_regs }, + T4_MODREGS(cim), + T4_MODREGS(tp), + T4_MODREGS(ulp_rx), + T4_MODREGS(ulp_tx), + { "pmrx", t4_pm_rx_regs }, + { "pmtx", t4_pm_tx_regs }, + T4_MODREGS(mps), + { "cplsw", t4_cpl_switch_regs }, + T4_MODREGS(smb), + { "i2c", t4_i2cm_regs }, + T4_MODREGS(mi), + T4_MODREGS(uart), + T4_MODREGS(pmu), + T4_MODREGS(sf), + T4_MODREGS(pl), + T4_MODREGS(le), + T4_MODREGS(ncsi), + T4_MODREGS(xgmac) + }; + + return dump_regs_table(argc, argv, regs, t4_mod, ARRAY_SIZE(t4_mod)); +} +#undef T4_MODREGS + +static int +dump_regs_t4vf(int argc, const char *argv[], const uint32_t *regs) +{ + static struct mod_regs t4vf_mod[] = { + { "sge", t4vf_sge_regs }, + { "mps", t4vf_mps_regs }, + { "pl", t4vf_pl_regs }, + { "mbdata", t4vf_mbdata_regs }, + { "cim", t4vf_cim_regs }, + }; + + return dump_regs_table(argc, argv, regs, t4vf_mod, + ARRAY_SIZE(t4vf_mod)); +} + +static int +dump_regs(int argc, const char *argv[]) +{ + int vers, revision, is_pcie, rc; + struct t4_regdump regs; + + regs.data = calloc(1, T4_REGDUMP_SIZE); + if (regs.data == NULL) { + warnc(ENOMEM, "regdump"); + return (ENOMEM); + } + + regs.len = T4_REGDUMP_SIZE; + rc = doit(CHELSIO_T4_REGDUMP, ®s); + if (rc != 0) + return (rc); + + vers = get_card_vers(regs.version); + revision = (regs.version >> 10) & 0x3f; + is_pcie = (regs.version & 0x80000000) != 0; + + if (vers == 4) { + if (revision == 0x3f) + rc = dump_regs_t4vf(argc, argv, regs.data); + else + rc = dump_regs_t4(argc, argv, regs.data); + } else { + warnx("%s (type %d, rev %d) is not a T4 card.", + nexus, vers, revision); + return (ENOTSUP); + } + + free(regs.data); + return (rc); +} + +static void +do_show_info_header(uint32_t mode) +{ + uint32_t i; + + printf ("%4s %8s", "Idx", "Hits"); + for (i = T4_FILTER_FCoE; i <= T4_FILTER_IP_FRAGMENT; i <<= 1) { + switch (mode & i) { + case T4_FILTER_FCoE: + printf (" FCoE"); + break; + + case T4_FILTER_PORT: + printf (" Port"); + break; + + case T4_FILTER_OVLAN: + printf (" vld:oVLAN"); + break; + + case T4_FILTER_IVLAN: + printf (" vld:iVLAN"); + break; + + case T4_FILTER_IP_TOS: + printf (" TOS"); + break; + + case T4_FILTER_IP_PROTO: + printf (" Prot"); + break; + + case T4_FILTER_ETH_TYPE: + printf (" EthType"); + break; + + case T4_FILTER_MAC_IDX: + printf (" MACIdx"); + break; + + case T4_FILTER_MPS_HIT_TYPE: + printf (" MPS"); + break; + + case T4_FILTER_IP_FRAGMENT: + printf (" Frag"); + break; + + default: + /* compressed filter field not enabled */ + break; + } + } + printf(" %20s %20s %9s %9s %s\n", + "DIP", "SIP", "DPORT", "SPORT", "Action"); +} + +/* + * Parse an argument sub-vector as a { <parameter name> <value>[:<mask>] } + * ordered tuple. If the parameter name in the argument sub-vector does not + * match the passed in parameter name, then a zero is returned for the + * function and no parsing is performed. If there is a match, then the value + * and optional mask are parsed and returned in the provided return value + * pointers. If no optional mask is specified, then a default mask of all 1s + * will be returned. + * + * An error in parsing the value[:mask] will result in an error message and + * program termination. + */ +static int +parse_val_mask(const char *param, const char *args[], uint32_t *val, + uint32_t *mask) +{ + char *p; + + if (strcmp(param, args[0]) != 0) + return (EINVAL); + + *val = strtoul(args[1], &p, 0); + if (p > args[1]) { + if (p[0] == 0) { + *mask = ~0; + return (0); + } + + if (p[0] == ':' && p[1] != 0) { + *mask = strtoul(p+1, &p, 0); + if (p[0] == 0) + return (0); + } + } + + warnx("parameter \"%s\" has bad \"value[:mask]\" %s", + args[0], args[1]); + + return (EINVAL); +} + +/* + * Parse an argument sub-vector as a { <parameter name> <addr>[/<mask>] } + * ordered tuple. If the parameter name in the argument sub-vector does not + * match the passed in parameter name, then a zero is returned for the + * function and no parsing is performed. If there is a match, then the value + * and optional mask are parsed and returned in the provided return value + * pointers. If no optional mask is specified, then a default mask of all 1s + * will be returned. + * + * The value return parameter "afp" is used to specify the expected address + * family -- IPv4 or IPv6 -- of the address[/mask] and return its actual + * format. A passed in value of AF_UNSPEC indicates that either IPv4 or IPv6 + * is acceptable; AF_INET means that only IPv4 addresses are acceptable; and + * AF_INET6 means that only IPv6 are acceptable. AF_INET is returned for IPv4 + * and AF_INET6 for IPv6 addresses, respectively. IPv4 address/mask pairs are + * returned in the first four bytes of the address and mask return values with + * the address A.B.C.D returned with { A, B, C, D } returned in addresses { 0, + * 1, 2, 3}, respectively. + * + * An error in parsing the value[:mask] will result in an error message and + * program termination. + */ +static int +parse_ipaddr(const char *param, const char *args[], int *afp, uint8_t addr[], + uint8_t mask[]) +{ + const char *colon, *afn; + char *slash; + uint8_t *m; + int af, ret; + unsigned int masksize; + + /* + * Is this our parameter? + */ + if (strcmp(param, args[0]) != 0) + return (EINVAL); + + /* + * Fundamental IPv4 versus IPv6 selection. + */ + colon = strchr(args[1], ':'); + if (!colon) { + afn = "IPv4"; + af = AF_INET; + masksize = 32; + } else { + afn = "IPv6"; + af = AF_INET6; + masksize = 128; + } + if (*afp == AF_UNSPEC) + *afp = af; + else if (*afp != af) { + warnx("address %s is not of expected family %s", + args[1], *afp == AF_INET ? "IP" : "IPv6"); + return (EINVAL); + } + + /* + * Parse address (temporarily stripping off any "/mask" + * specification). + */ + slash = strchr(args[1], '/'); + if (slash) + *slash = 0; + ret = inet_pton(af, args[1], addr); + if (slash) + *slash = '/'; + if (ret <= 0) { + warnx("Cannot parse %s %s address %s", param, afn, args[1]); + return (EINVAL); + } + + /* + * Parse optional mask specification. + */ + if (slash) { + char *p; + unsigned int prefix = strtoul(slash + 1, &p, 10); + + if (p == slash + 1) { + warnx("missing address prefix for %s", param); + return (EINVAL); + } + if (*p) { + warnx("%s is not a valid address prefix", slash + 1); + return (EINVAL); + } + if (prefix > masksize) { + warnx("prefix %u is too long for an %s address", + prefix, afn); + return (EINVAL); + } + memset(mask, 0, masksize / 8); + masksize = prefix; + } + + /* + * Fill in mask. + */ + for (m = mask; masksize >= 8; m++, masksize -= 8) + *m = ~0; + if (masksize) + *m = ~0 << (8 - masksize); + + return (0); +} + +/* + * Parse an argument sub-vector as a { <parameter name> <value> } ordered + * tuple. If the parameter name in the argument sub-vector does not match the + * passed in parameter name, then a zero is returned for the function and no + * parsing is performed. If there is a match, then the value is parsed and + * returned in the provided return value pointer. + */ +static int +parse_val(const char *param, const char *args[], uint32_t *val) +{ + char *p; + + if (strcmp(param, args[0]) != 0) + return (EINVAL); + + *val = strtoul(args[1], &p, 0); + if (p > args[1] && p[0] == 0) + return (0); + + warnx("parameter \"%s\" has bad \"value\" %s", args[0], args[1]); + return (EINVAL); +} + +static void +filters_show_ipaddr(int type, uint8_t *addr, uint8_t *addrm) +{ + int noctets, octet; + + printf(" "); + if (type == 0) { + noctets = 4; + printf("%3s", " "); + } else + noctets = 16; + + for (octet = 0; octet < noctets; octet++) + printf("%02x", addr[octet]); + printf("/"); + for (octet = 0; octet < noctets; octet++) + printf("%02x", addrm[octet]); +} + +static void +do_show_one_filter_info(struct t4_filter *t, uint32_t mode) +{ + uint32_t i; + + printf("%4d", t->idx); + if (t->hits == UINT64_MAX) + printf(" %8s", "-"); + else + printf(" %8ju", t->hits); + + /* + * Compressed header portion of filter. + */ + for (i = T4_FILTER_FCoE; i <= T4_FILTER_IP_FRAGMENT; i <<= 1) { + switch (mode & i) { + case T4_FILTER_FCoE: + printf(" %1d/%1d", t->fs.val.fcoe, t->fs.mask.fcoe); + break; + + case T4_FILTER_PORT: + printf(" %1d/%1d", t->fs.val.iport, t->fs.mask.iport); + break; + + case T4_FILTER_OVLAN: + printf(" %1d:%1x:%02x/%1d:%1x:%02x", + t->fs.val.ovlan_vld, (t->fs.val.ovlan >> 7) & 0x7, + t->fs.val.ovlan & 0x7f, t->fs.mask.ovlan_vld, + (t->fs.mask.ovlan >> 7) & 0x7, + t->fs.mask.ovlan & 0x7f); + break; + + case T4_FILTER_IVLAN: + printf(" %1d:%04x/%1d:%04x", + t->fs.val.ivlan_vld, t->fs.val.ivlan, + t->fs.mask.ivlan_vld, t->fs.mask.ivlan); + break; + + case T4_FILTER_IP_TOS: + printf(" %02x/%02x", t->fs.val.tos, t->fs.mask.tos); + break; + + case T4_FILTER_IP_PROTO: + printf(" %02x/%02x", t->fs.val.proto, t->fs.mask.proto); + break; + + case T4_FILTER_ETH_TYPE: + printf(" %04x/%04x", t->fs.val.ethtype, + t->fs.mask.ethtype); + break; + + case T4_FILTER_MAC_IDX: + printf(" %03x/%03x", t->fs.val.macidx, + t->fs.mask.macidx); + break; + + case T4_FILTER_MPS_HIT_TYPE: + printf(" %1x/%1x", t->fs.val.matchtype, + t->fs.mask.matchtype); + break; + + case T4_FILTER_IP_FRAGMENT: + printf(" %1d/%1d", t->fs.val.frag, t->fs.mask.frag); + break; + + default: + /* compressed filter field not enabled */ + break; + } + } + + /* + * Fixed portion of filter. + */ + filters_show_ipaddr(t->fs.type, t->fs.val.dip, t->fs.mask.dip); + filters_show_ipaddr(t->fs.type, t->fs.val.sip, t->fs.mask.sip); + printf(" %04x/%04x %04x/%04x", + t->fs.val.dport, t->fs.mask.dport, + t->fs.val.sport, t->fs.mask.sport); + + /* + * Variable length filter action. + */ + if (t->fs.action == FILTER_DROP) + printf(" Drop"); + else if (t->fs.action == FILTER_SWITCH) { + printf(" Switch: port=%d", t->fs.eport); + if (t->fs.newdmac) + printf( + ", dmac=%02x:%02x:%02x:%02x:%02x:%02x " + ", l2tidx=%d", + t->fs.dmac[0], t->fs.dmac[1], + t->fs.dmac[2], t->fs.dmac[3], + t->fs.dmac[4], t->fs.dmac[5], + t->l2tidx); + if (t->fs.newsmac) + printf( + ", smac=%02x:%02x:%02x:%02x:%02x:%02x " + ", smtidx=%d", + t->fs.smac[0], t->fs.smac[1], + t->fs.smac[2], t->fs.smac[3], + t->fs.smac[4], t->fs.smac[5], + t->smtidx); + if (t->fs.newvlan == VLAN_REMOVE) + printf(", vlan=none"); + else if (t->fs.newvlan == VLAN_INSERT) + printf(", vlan=insert(%x)", t->fs.vlan); + else if (t->fs.newvlan == VLAN_REWRITE) + printf(", vlan=rewrite(%x)", t->fs.vlan); + } else { + printf(" Pass: Q="); + if (t->fs.dirsteer == 0) { + printf("RSS"); + if (t->fs.maskhash) + printf("(TCB=hash)"); + } else { + printf("%d", t->fs.iq); + if (t->fs.dirsteerhash == 0) + printf("(QID)"); + else + printf("(hash)"); + } + } + if (t->fs.prio) + printf(" Prio"); + if (t->fs.rpttid) + printf(" RptTID"); + printf("\n"); +} + +static int +show_filters(void) +{ + uint32_t mode = 0, header = 0; + struct t4_filter t; + int rc; + + /* Get the global filter mode first */ + rc = doit(CHELSIO_T4_GET_FILTER_MODE, &mode); + if (rc != 0) + return (rc); + + t.idx = 0; + for (t.idx = 0; ; t.idx++) { + rc = doit(CHELSIO_T4_GET_FILTER, &t); + if (rc != 0 || t.idx == 0xffffffff) + break; + + if (!header) { + do_show_info_header(mode); + header = 1; + } + do_show_one_filter_info(&t, mode); + }; + + return (rc); +} + +static int +get_filter_mode(void) +{ + uint32_t mode = 0; + int rc; + + rc = doit(CHELSIO_T4_GET_FILTER_MODE, &mode); + if (rc != 0) + return (rc); + + if (mode & T4_FILTER_IPv4) + printf("ipv4 "); + + if (mode & T4_FILTER_IPv6) + printf("ipv6 "); + + if (mode & T4_FILTER_IP_SADDR) + printf("sip "); + + if (mode & T4_FILTER_IP_DADDR) + printf("dip "); + + if (mode & T4_FILTER_IP_SPORT) + printf("sport "); + + if (mode & T4_FILTER_IP_DPORT) + printf("dport "); + + if (mode & T4_FILTER_MPS_HIT_TYPE) + printf("matchtype "); + + if (mode & T4_FILTER_MAC_IDX) + printf("macidx "); + + if (mode & T4_FILTER_ETH_TYPE) + printf("ethtype "); + + if (mode & T4_FILTER_IP_PROTO) + printf("proto "); + + if (mode & T4_FILTER_IP_TOS) + printf("tos "); + + if (mode & T4_FILTER_IVLAN) + printf("ivlan "); + + if (mode & T4_FILTER_OVLAN) + printf("ovlan "); + + if (mode & T4_FILTER_PORT) + printf("iport "); + + if (mode & T4_FILTER_FCoE) + printf("fcoe "); + + printf("\n"); + + return (0); +} + +static int +set_filter_mode(int argc, const char *argv[]) +{ + uint32_t mode = 0; + + for (; argc; argc--, argv++) { + if (!strcmp(argv[0], "matchtype")) + mode |= T4_FILTER_MPS_HIT_TYPE; + + if (!strcmp(argv[0], "macidx")) + mode |= T4_FILTER_MAC_IDX; + + if (!strcmp(argv[0], "ethtype")) + mode |= T4_FILTER_ETH_TYPE; + + if (!strcmp(argv[0], "proto")) + mode |= T4_FILTER_IP_PROTO; + + if (!strcmp(argv[0], "tos")) + mode |= T4_FILTER_IP_TOS; + + if (!strcmp(argv[0], "ivlan")) + mode |= T4_FILTER_IVLAN; + + if (!strcmp(argv[0], "ovlan")) + mode |= T4_FILTER_OVLAN; + + if (!strcmp(argv[0], "iport")) + mode |= T4_FILTER_PORT; + + if (!strcmp(argv[0], "fcoe")) + mode |= T4_FILTER_FCoE; + } + + return doit(CHELSIO_T4_SET_FILTER_MODE, &mode); +} + +static int +del_filter(uint32_t idx) +{ + struct t4_filter t; + + t.idx = idx; + + return doit(CHELSIO_T4_DEL_FILTER, &t); +} + +static int +set_filter(uint32_t idx, int argc, const char *argv[]) +{ + int af = AF_UNSPEC, start_arg = 0; + struct t4_filter t; + + if (argc < 2) { + warnc(EINVAL, "%s", __func__); + return (EINVAL); + }; + bzero(&t, sizeof (t)); + t.idx = idx; + + for (start_arg = 0; start_arg + 2 <= argc; start_arg += 2) { + const char **args = &argv[start_arg]; + uint32_t val, mask; + + if (!strcmp(argv[start_arg], "type")) { + int newaf; + if (!strcasecmp(argv[start_arg + 1], "ipv4")) + newaf = AF_INET; + else if (!strcasecmp(argv[start_arg + 1], "ipv6")) + newaf = AF_INET6; + else { + warnx("invalid type \"%s\"; " + "must be one of \"ipv4\" or \"ipv6\"", + argv[start_arg + 1]); + return (EINVAL); + } + + if (af != AF_UNSPEC && af != newaf) { + warnx("conflicting IPv4/IPv6 specifications."); + return (EINVAL); + } + af = newaf; + } else if (!parse_val_mask("fcoe", args, &val, &mask)) { + t.fs.val.fcoe = val; + t.fs.mask.fcoe = mask; + } else if (!parse_val_mask("iport", args, &val, &mask)) { + t.fs.val.iport = val; + t.fs.mask.iport = mask; + } else if (!parse_val_mask("ovlan", args, &val, &mask)) { + t.fs.val.ovlan = val; + t.fs.mask.ovlan = mask; + t.fs.val.ovlan_vld = 1; + t.fs.mask.ovlan_vld = 1; + } else if (!parse_val_mask("ivlan", args, &val, &mask)) { + t.fs.val.ivlan = val; + t.fs.mask.ivlan = mask; + t.fs.val.ivlan_vld = 1; + t.fs.mask.ivlan_vld = 1; + } else if (!parse_val_mask("tos", args, &val, &mask)) { + t.fs.val.tos = val; + t.fs.mask.tos = mask; + } else if (!parse_val_mask("proto", args, &val, &mask)) { + t.fs.val.proto = val; + t.fs.mask.proto = mask; + } else if (!parse_val_mask("ethtype", args, &val, &mask)) { + t.fs.val.ethtype = val; + t.fs.mask.ethtype = mask; + } else if (!parse_val_mask("macidx", args, &val, &mask)) { + t.fs.val.macidx = val; + t.fs.mask.macidx = mask; + } else if (!parse_val_mask("matchtype", args, &val, &mask)) { + t.fs.val.matchtype = val; + t.fs.mask.matchtype = mask; + } else if (!parse_val_mask("frag", args, &val, &mask)) { + t.fs.val.frag = val; + t.fs.mask.frag = mask; + } else if (!parse_val_mask("dport", args, &val, &mask)) { + t.fs.val.dport = val; + t.fs.mask.dport = mask; + } else if (!parse_val_mask("sport", args, &val, &mask)) { + t.fs.val.sport = val; + t.fs.mask.sport = mask; + } else if (!parse_ipaddr("dip", args, &af, t.fs.val.dip, + t.fs.mask.dip)) { + /* nada */; + } else if (!parse_ipaddr("sip", args, &af, t.fs.val.sip, + t.fs.mask.sip)) { + /* nada */; + } else if (!strcmp(argv[start_arg], "action")) { + if (!strcmp(argv[start_arg + 1], "pass")) + t.fs.action = FILTER_PASS; + else if (!strcmp(argv[start_arg + 1], "drop")) + t.fs.action = FILTER_DROP; + else if (!strcmp(argv[start_arg + 1], "switch")) + t.fs.action = FILTER_SWITCH; + else { + warnx("invalid action \"%s\"; must be one of" + " \"pass\", \"drop\" or \"switch\"", + argv[start_arg + 1]); + return (EINVAL); + } + } else if (!parse_val("hitcnts", args, &val)) { + t.fs.hitcnts = val; + } else if (!parse_val("prio", args, &val)) { + t.fs.prio = val; + } else if (!parse_val("rpttid", args, &val)) { + t.fs.rpttid = 1; + } else if (!parse_val("queue", args, &val)) { + t.fs.dirsteer = 1; + t.fs.iq = val; + } else if (!parse_val("tcbhash", args, &val)) { + t.fs.maskhash = 1; + t.fs.dirsteerhash = 1; + } else if (!parse_val("eport", args, &val)) { + t.fs.eport = val; + } else if (!strcmp(argv[start_arg], "dmac")) { + struct ether_addr *daddr; + + daddr = ether_aton(argv[start_arg + 1]); + if (daddr == NULL) { + warnx("invalid dmac address \"%s\"", + argv[start_arg + 1]); + return (EINVAL); + } + memcpy(t.fs.dmac, daddr, ETHER_ADDR_LEN); + t.fs.newdmac = 1; + } else if (!strcmp(argv[start_arg], "smac")) { + struct ether_addr *saddr; + + saddr = ether_aton(argv[start_arg + 1]); + if (saddr == NULL) { + warnx("invalid smac address \"%s\"", + argv[start_arg + 1]); + return (EINVAL); + } + memcpy(t.fs.smac, saddr, ETHER_ADDR_LEN); + t.fs.newsmac = 1; + } else if (!strcmp(argv[start_arg], "vlan")) { + char *p; + if (!strcmp(argv[start_arg + 1], "none")) { + t.fs.newvlan = VLAN_REMOVE; + } else if (argv[start_arg + 1][0] == '=') { + t.fs.newvlan = VLAN_REWRITE; + } else if (argv[start_arg + 1][0] == '+') { + t.fs.newvlan = VLAN_INSERT; + } else { + warnx("unknown vlan parameter \"%s\"; must" + " be one of \"none\", \"=<vlan>\" or" + " \"+<vlan>\"", argv[start_arg + 1]); + return (EINVAL); + } + if (t.fs.newvlan == VLAN_REWRITE || + t.fs.newvlan == VLAN_INSERT) { + t.fs.vlan = strtoul(argv[start_arg + 1] + 1, + &p, 0); + if (p == argv[start_arg + 1] + 1 || p[0] != 0) { + warnx("invalid vlan \"%s\"", + argv[start_arg + 1]); + return (EINVAL); + } + } + } else { + warnx("invalid parameter \"%s\"", argv[start_arg]); + return (EINVAL); + } + } + if (start_arg != argc) { + warnx("no value for \"%s\"", argv[start_arg]); + return (EINVAL); + } + + /* + * Check basic sanity of option combinations. + */ + if (t.fs.action != FILTER_SWITCH && + (t.fs.eport || t.fs.newdmac || t.fs.newsmac || t.fs.newvlan)) { + warnx("prio, port dmac, smac and vlan only make sense with" + " \"action switch\""); + return (EINVAL); + } + if (t.fs.action != FILTER_PASS && + (t.fs.rpttid || t.fs.dirsteer || t.fs.maskhash)) { + warnx("rpttid, queue and tcbhash don't make sense with" + " action \"drop\" or \"switch\""); + return (EINVAL); + } + + t.fs.type = (af == AF_INET6 ? 1 : 0); /* default IPv4 */ + return doit(CHELSIO_T4_SET_FILTER, &t); +} + +static int +filter_cmd(int argc, const char *argv[]) +{ + long long val; + uint32_t idx; + char *s; + + if (argc == 0) { + warnx("filter: no arguments."); + return (EINVAL); + }; + + /* list */ + if (strcmp(argv[0], "list") == 0) { + if (argc != 1) + warnx("trailing arguments after \"list\" ignored."); + + return show_filters(); + } + + /* mode */ + if (argc == 1 && strcmp(argv[0], "mode") == 0) + return get_filter_mode(); + + /* mode <mode> */ + if (strcmp(argv[0], "mode") == 0) + return set_filter_mode(argc - 1, argv + 1); + + /* <idx> ... */ + s = str_to_number(argv[0], NULL, &val); + if (*s || val > 0xffffffffU) { + warnx("\"%s\" is neither an index nor a filter subcommand.", + argv[0]); + return (EINVAL); + } + idx = (uint32_t) val; + + /* <idx> delete|clear */ + if (argc == 2 && + (strcmp(argv[1], "delete") == 0 || strcmp(argv[1], "clear") == 0)) { + return del_filter(idx); + } + + /* <idx> [<param> <val>] ... */ + return set_filter(idx, argc - 1, argv + 1); +} + +/* + * Shows the fields of a multi-word structure. The structure is considered to + * consist of @nwords 32-bit words (i.e, it's an (@nwords * 32)-bit structure) + * whose fields are described by @fd. The 32-bit words are given in @words + * starting with the least significant 32-bit word. + */ +static void +show_struct(const uint32_t *words, int nwords, const struct field_desc *fd) +{ + unsigned int w = 0; + const struct field_desc *p; + + for (p = fd; p->name; p++) + w = max(w, strlen(p->name)); + + while (fd->name) { + unsigned long long data; + int first_word = fd->start / 32; + int shift = fd->start % 32; + int width = fd->end - fd->start + 1; + unsigned long long mask = (1ULL << width) - 1; + + data = (words[first_word] >> shift) | + ((uint64_t)words[first_word + 1] << (32 - shift)); + if (shift) + data |= ((uint64_t)words[first_word + 2] << (64 - shift)); + data &= mask; + if (fd->islog2) + data = 1 << data; + printf("%-*s ", w, fd->name); + printf(fd->hex ? "%#llx\n" : "%llu\n", data << fd->shift); + fd++; + } +} + +#define FIELD(name, start, end) { name, start, end, 0, 0, 0 } +#define FIELD1(name, start) FIELD(name, start, start) + +static void +show_sge_context(const struct t4_sge_context *p) +{ + static struct field_desc egress[] = { + FIELD1("StatusPgNS:", 180), + FIELD1("StatusPgRO:", 179), + FIELD1("FetchNS:", 178), + FIELD1("FetchRO:", 177), + FIELD1("Valid:", 176), + FIELD("PCIeDataChannel:", 174, 175), + FIELD1("DCAEgrQEn:", 173), + FIELD("DCACPUID:", 168, 172), + FIELD1("FCThreshOverride:", 167), + FIELD("WRLength:", 162, 166), + FIELD1("WRLengthKnown:", 161), + FIELD1("ReschedulePending:", 160), + FIELD1("OnChipQueue:", 159), + FIELD1("FetchSizeMode", 158), + { "FetchBurstMin:", 156, 157, 4, 0, 1 }, + { "FetchBurstMax:", 153, 154, 6, 0, 1 }, + FIELD("uPToken:", 133, 152), + FIELD1("uPTokenEn:", 132), + FIELD1("UserModeIO:", 131), + FIELD("uPFLCredits:", 123, 130), + FIELD1("uPFLCreditEn:", 122), + FIELD("FID:", 111, 121), + FIELD("HostFCMode:", 109, 110), + FIELD1("HostFCOwner:", 108), + { "CIDXFlushThresh:", 105, 107, 0, 0, 1 }, + FIELD("CIDX:", 89, 104), + FIELD("PIDX:", 73, 88), + { "BaseAddress:", 18, 72, 9, 1 }, + FIELD("QueueSize:", 2, 17), + FIELD1("QueueType:", 1), + FIELD1("CachePriority:", 0), + { NULL } + }; + static struct field_desc fl[] = { + FIELD1("StatusPgNS:", 180), + FIELD1("StatusPgRO:", 179), + FIELD1("FetchNS:", 178), + FIELD1("FetchRO:", 177), + FIELD1("Valid:", 176), + FIELD("PCIeDataChannel:", 174, 175), + FIELD1("DCAEgrQEn:", 173), + FIELD("DCACPUID:", 168, 172), + FIELD1("FCThreshOverride:", 167), + FIELD("WRLength:", 162, 166), + FIELD1("WRLengthKnown:", 161), + FIELD1("ReschedulePending:", 160), + FIELD1("OnChipQueue:", 159), + FIELD1("FetchSizeMode", 158), + { "FetchBurstMin:", 156, 157, 4, 0, 1 }, + { "FetchBurstMax:", 153, 154, 6, 0, 1 }, + FIELD1("FLMcongMode:", 152), + FIELD("MaxuPFLCredits:", 144, 151), + FIELD("FLMcontextID:", 133, 143), + FIELD1("uPTokenEn:", 132), + FIELD1("UserModeIO:", 131), + FIELD("uPFLCredits:", 123, 130), + FIELD1("uPFLCreditEn:", 122), + FIELD("FID:", 111, 121), + FIELD("HostFCMode:", 109, 110), + FIELD1("HostFCOwner:", 108), + { "CIDXFlushThresh:", 105, 107, 0, 0, 1 }, + FIELD("CIDX:", 89, 104), + FIELD("PIDX:", 73, 88), + { "BaseAddress:", 18, 72, 9, 1 }, + FIELD("QueueSize:", 2, 17), + FIELD1("QueueType:", 1), + FIELD1("CachePriority:", 0), + { NULL } + }; + static struct field_desc ingress[] = { + FIELD1("NoSnoop:", 145), + FIELD1("RelaxedOrdering:", 144), + FIELD1("GTSmode:", 143), + FIELD1("ISCSICoalescing:", 142), + FIELD1("Valid:", 141), + FIELD1("TimerPending:", 140), + FIELD1("DropRSS:", 139), + FIELD("PCIeChannel:", 137, 138), + FIELD1("SEInterruptArmed:", 136), + FIELD1("CongestionMgtEnable:", 135), + FIELD1("DCAIngQEnable:", 134), + FIELD("DCACPUID:", 129, 133), + FIELD1("UpdateScheduling:", 128), + FIELD("UpdateDelivery:", 126, 127), + FIELD1("InterruptSent:", 125), + FIELD("InterruptIDX:", 114, 124), + FIELD1("InterruptDestination:", 113), + FIELD1("InterruptArmed:", 112), + FIELD("RxIntCounter:", 106, 111), + FIELD("RxIntCounterThreshold:", 104, 105), + FIELD1("Generation:", 103), + { "BaseAddress:", 48, 102, 9, 1 }, + FIELD("PIDX:", 32, 47), + FIELD("CIDX:", 16, 31), + { "QueueSize:", 4, 15, 4, 0 }, + { "QueueEntrySize:", 2, 3, 4, 0, 1 }, + FIELD1("QueueEntryOverride:", 1), + FIELD1("CachePriority:", 0), + { NULL } + }; + static struct field_desc flm[] = { + FIELD1("NoSnoop:", 79), + FIELD1("RelaxedOrdering:", 78), + FIELD1("Valid:", 77), + FIELD("DCACPUID:", 72, 76), + FIELD1("DCAFLEn:", 71), + FIELD("EQid:", 54, 70), + FIELD("SplitEn:", 52, 53), + FIELD1("PadEn:", 51), + FIELD1("PackEn:", 50), + FIELD1("DBpriority:", 48), + FIELD("PackOffset:", 16, 47), + FIELD("CIDX:", 8, 15), + FIELD("PIDX:", 0, 7), + { NULL } + }; + static struct field_desc conm[] = { + FIELD1("CngDBPHdr:", 6), + FIELD1("CngDBPData:", 5), + FIELD1("CngIMSG:", 4), + FIELD("CngChMap:", 0, 3), + { NULL } + }; + + if (p->mem_id == SGE_CONTEXT_EGRESS) + show_struct(p->data, 6, (p->data[0] & 2) ? fl : egress); + else if (p->mem_id == SGE_CONTEXT_FLM) + show_struct(p->data, 3, flm); + else if (p->mem_id == SGE_CONTEXT_INGRESS) + show_struct(p->data, 5, ingress); + else if (p->mem_id == SGE_CONTEXT_CNM) + show_struct(p->data, 1, conm); +} + +#undef FIELD +#undef FIELD1 + +static int +get_sge_context(int argc, const char *argv[]) +{ + int rc; + char *p; + long cid; + struct t4_sge_context cntxt = {0}; + + if (argc != 2) { + warnx("sge_context: incorrect number of arguments."); + return (EINVAL); + } + + if (!strcmp(argv[0], "egress")) + cntxt.mem_id = SGE_CONTEXT_EGRESS; + else if (!strcmp(argv[0], "ingress")) + cntxt.mem_id = SGE_CONTEXT_INGRESS; + else if (!strcmp(argv[0], "fl")) + cntxt.mem_id = SGE_CONTEXT_FLM; + else if (!strcmp(argv[0], "cong")) + cntxt.mem_id = SGE_CONTEXT_CNM; + else { + warnx("unknown context type \"%s\"; known types are egress, " + "ingress, fl, and cong.", argv[0]); + return (EINVAL); + } + + p = str_to_number(argv[1], &cid, NULL); + if (*p) { + warnx("invalid context id \"%s\"", argv[1]); + return (EINVAL); + } + cntxt.cid = cid; + + rc = doit(CHELSIO_T4_GET_SGE_CONTEXT, &cntxt); + if (rc != 0) + return (rc); + + show_sge_context(&cntxt); + return (0); +} + +static int +run_cmd(int argc, const char *argv[]) +{ + int rc = -1; + const char *cmd = argv[0]; + + /* command */ + argc--; + argv++; + + if (!strcmp(cmd, "reg") || !strcmp(cmd, "reg32")) + rc = register_io(argc, argv, 4); + else if (!strcmp(cmd, "reg64")) + rc = register_io(argc, argv, 8); + else if (!strcmp(cmd, "regdump")) + rc = dump_regs(argc, argv); + else if (!strcmp(cmd, "filter")) + rc = filter_cmd(argc, argv); + else if (!strcmp(cmd, "context")) + rc = get_sge_context(argc, argv); + else { + rc = EINVAL; + warnx("invalid command \"%s\"", cmd); + } + + return (rc); +} + +#define MAX_ARGS 15 +static int +run_cmd_loop(void) +{ + int i, rc = 0; + char buffer[128], *buf; + const char *args[MAX_ARGS + 1]; + + /* + * Simple loop: displays a "> " prompt and processes any input as a + * cxgbetool command. You're supposed to enter only the part after + * "cxgbetool t4nexX". Use "quit" or "exit" to exit. + */ + for (;;) { + fprintf(stdout, "> "); + fflush(stdout); + buf = fgets(buffer, sizeof(buffer), stdin); + if (buf == NULL) { + if (ferror(stdin)) { + warn("stdin error"); + rc = errno; /* errno from fgets */ + } + break; + } + + i = 0; + while ((args[i] = strsep(&buf, " \t\n")) != NULL) { + if (args[i][0] != 0 && ++i == MAX_ARGS) + break; + } + args[i] = 0; + + if (i == 0) + continue; /* skip empty line */ + + if (!strcmp(args[0], "quit") || !strcmp(args[0], "exit")) + break; + + rc = run_cmd(i, args); + } + + /* rc normally comes from the last command (not including quit/exit) */ + return (rc); +} + +int +main(int argc, const char *argv[]) +{ + int rc = -1; + + progname = argv[0]; + + if (argc == 2) { + if (!strcmp(argv[1], "-h") || !strcmp(argv[1], "--help")) { + usage(stdout); + exit(0); + } + } + + if (argc < 3) { + usage(stderr); + exit(EINVAL); + } + + nexus = argv[1]; + + /* progname and nexus */ + argc -= 2; + argv += 2; + + if (argc == 1 && !strcmp(argv[0], "stdio")) + rc = run_cmd_loop(); + else + rc = run_cmd(argc, argv); + + return (rc); +} diff --git a/tools/tools/cxgbetool/reg_defs_t4.c b/tools/tools/cxgbetool/reg_defs_t4.c new file mode 100644 index 0000000..d838fe5 --- /dev/null +++ b/tools/tools/cxgbetool/reg_defs_t4.c @@ -0,0 +1,40394 @@ +/* This file is automatically generated --- changes will be lost */ +__FBSDID("$FreeBSD$"); + +struct reg_info t4_sge_regs[] = { + { "SGE_PF_KDOORBELL", 0x1e000, 0 }, + { "QID", 15, 17 }, + { "Priority", 14, 1 }, + { "PIDX", 0, 14 }, + { "SGE_PF_GTS", 0x1e004, 0 }, + { "IngressQID", 16, 16 }, + { "TimerReg", 13, 3 }, + { "SEIntArm", 12, 1 }, + { "CIDXInc", 0, 12 }, + { "SGE_PF_KDOORBELL", 0x1e400, 0 }, + { "QID", 15, 17 }, + { "Priority", 14, 1 }, + { "PIDX", 0, 14 }, + { "SGE_PF_GTS", 0x1e404, 0 }, + { "IngressQID", 16, 16 }, + { "TimerReg", 13, 3 }, + { "SEIntArm", 12, 1 }, + { "CIDXInc", 0, 12 }, + { "SGE_PF_KDOORBELL", 0x1e800, 0 }, + { "QID", 15, 17 }, + { "Priority", 14, 1 }, + { "PIDX", 0, 14 }, + { "SGE_PF_GTS", 0x1e804, 0 }, + { "IngressQID", 16, 16 }, + { "TimerReg", 13, 3 }, + { "SEIntArm", 12, 1 }, + { "CIDXInc", 0, 12 }, + { "SGE_PF_KDOORBELL", 0x1ec00, 0 }, + { "QID", 15, 17 }, + { "Priority", 14, 1 }, + { "PIDX", 0, 14 }, + { "SGE_PF_GTS", 0x1ec04, 0 }, + { "IngressQID", 16, 16 }, + { "TimerReg", 13, 3 }, + { "SEIntArm", 12, 1 }, + { "CIDXInc", 0, 12 }, + { "SGE_PF_KDOORBELL", 0x1f000, 0 }, + { "QID", 15, 17 }, + { "Priority", 14, 1 }, + { "PIDX", 0, 14 }, + { "SGE_PF_GTS", 0x1f004, 0 }, + { "IngressQID", 16, 16 }, + { "TimerReg", 13, 3 }, + { "SEIntArm", 12, 1 }, + { "CIDXInc", 0, 12 }, + { "SGE_PF_KDOORBELL", 0x1f400, 0 }, + { "QID", 15, 17 }, + { "Priority", 14, 1 }, + { "PIDX", 0, 14 }, + { "SGE_PF_GTS", 0x1f404, 0 }, + { "IngressQID", 16, 16 }, + { "TimerReg", 13, 3 }, + { "SEIntArm", 12, 1 }, + { "CIDXInc", 0, 12 }, + { "SGE_PF_KDOORBELL", 0x1f800, 0 }, + { "QID", 15, 17 }, + { "Priority", 14, 1 }, + { "PIDX", 0, 14 }, + { "SGE_PF_GTS", 0x1f804, 0 }, + { "IngressQID", 16, 16 }, + { "TimerReg", 13, 3 }, + { "SEIntArm", 12, 1 }, + { "CIDXInc", 0, 12 }, + { "SGE_PF_KDOORBELL", 0x1fc00, 0 }, + { "QID", 15, 17 }, + { "Priority", 14, 1 }, + { "PIDX", 0, 14 }, + { "SGE_PF_GTS", 0x1fc04, 0 }, + { "IngressQID", 16, 16 }, + { "TimerReg", 13, 3 }, + { "SEIntArm", 12, 1 }, + { "CIDXInc", 0, 12 }, + { "SGE_CONTROL", 0x1008, 0 }, + { "IgrAllCPLtoFL", 31, 1 }, + { "FLSplitMin", 22, 9 }, + { "FLSplitMode", 20, 2 }, + { "DCASysType", 19, 1 }, + { "RxPktCPLMode", 18, 1 }, + { "EgrStatusPageSize", 17, 1 }, + { "IngHintEnable1", 15, 1 }, + { "IngHintEnable0", 14, 1 }, + { "IngIntCompareIDX", 13, 1 }, + { "PktShift", 10, 3 }, + { "IngPCIeBoundary", 7, 3 }, + { "IngPadBoundary", 4, 3 }, + { "EgrPCIeBoundary", 1, 3 }, + { "GlobalEnable", 0, 1 }, + { "SGE_HOST_PAGE_SIZE", 0x100c, 0 }, + { "HostPageSizePF7", 28, 4 }, + { "HostPageSizePF6", 24, 4 }, + { "HostPageSizePF5", 20, 4 }, + { "HostPageSizePF4", 16, 4 }, + { "HostPageSizePF3", 12, 4 }, + { "HostPageSizePF2", 8, 4 }, + { "HostPageSizePF1", 4, 4 }, + { "HostPageSizePF0", 0, 4 }, + { "SGE_EGRESS_QUEUES_PER_PAGE_PF", 0x1010, 0 }, + { "QueuesPerPagePF7", 28, 4 }, + { "QueuesPerPagePF6", 24, 4 }, + { "QueuesPerPagePF5", 20, 4 }, + { "QueuesPerPagePF4", 16, 4 }, + { "QueuesPerPagePF3", 12, 4 }, + { "QueuesPerPagePF2", 8, 4 }, + { "QueuesPerPagePF1", 4, 4 }, + { "QueuesPerPagePF0", 0, 4 }, + { "SGE_EGRESS_QUEUES_PER_PAGE_VF", 0x1014, 0 }, + { "QueuesPerPageVFPF7", 28, 4 }, + { "QueuesPerPageVFPF6", 24, 4 }, + { "QueuesPerPageVFPF5", 20, 4 }, + { "QueuesPerPageVFPF4", 16, 4 }, + { "QueuesPerPageVFPF3", 12, 4 }, + { "QueuesPerPageVFPF2", 8, 4 }, + { "QueuesPerPageVFPF1", 4, 4 }, + { "QueuesPerPageVFPF0", 0, 4 }, + { "SGE_USER_MODE_LIMITS", 0x1018, 0 }, + { "Opcode_Min", 24, 8 }, + { "Opcode_Max", 16, 8 }, + { "Length_Min", 8, 8 }, + { "Length_Max", 0, 8 }, + { "SGE_WR_ERROR", 0x101c, 0 }, + { "SGE_PERR_INJECT", 0x1020, 0 }, + { "MemSel", 1, 5 }, + { "InjectDataErr", 0, 1 }, + { "SGE_INT_CAUSE1", 0x1024, 0 }, + { "perr_flm_CreditFifo", 30, 1 }, + { "perr_imsg_hint_fifo", 29, 1 }, + { "perr_mc_pc", 28, 1 }, + { "perr_mc_igr_ctxt", 27, 1 }, + { "perr_mc_egr_ctxt", 26, 1 }, + { "perr_mc_flm", 25, 1 }, + { "perr_pc_mctag", 24, 1 }, + { "perr_pc_chpi_rsp1", 23, 1 }, + { "perr_pc_chpi_rsp0", 22, 1 }, + { "perr_dbp_pc_rsp_fifo3", 21, 1 }, + { "perr_dbp_pc_rsp_fifo2", 20, 1 }, + { "perr_dbp_pc_rsp_fifo1", 19, 1 }, + { "perr_dbp_pc_rsp_fifo0", 18, 1 }, + { "perr_dmarbt", 17, 1 }, + { "perr_flm_DbpFifo", 16, 1 }, + { "perr_flm_MCReq_fifo", 15, 1 }, + { "perr_flm_HintFifo", 14, 1 }, + { "perr_align_ctl_fifo3", 13, 1 }, + { "perr_align_ctl_fifo2", 12, 1 }, + { "perr_align_ctl_fifo1", 11, 1 }, + { "perr_align_ctl_fifo0", 10, 1 }, + { "perr_edma_fifo3", 9, 1 }, + { "perr_edma_fifo2", 8, 1 }, + { "perr_edma_fifo1", 7, 1 }, + { "perr_edma_fifo0", 6, 1 }, + { "perr_pd_fifo3", 5, 1 }, + { "perr_pd_fifo2", 4, 1 }, + { "perr_pd_fifo1", 3, 1 }, + { "perr_pd_fifo0", 2, 1 }, + { "perr_ing_ctxt_mifrsp", 1, 1 }, + { "perr_egr_ctxt_mifrsp", 0, 1 }, + { "SGE_INT_ENABLE1", 0x1028, 0 }, + { "perr_flm_CreditFifo", 30, 1 }, + { "perr_imsg_hint_fifo", 29, 1 }, + { "perr_mc_pc", 28, 1 }, + { "perr_mc_igr_ctxt", 27, 1 }, + { "perr_mc_egr_ctxt", 26, 1 }, + { "perr_mc_flm", 25, 1 }, + { "perr_pc_mctag", 24, 1 }, + { "perr_pc_chpi_rsp1", 23, 1 }, + { "perr_pc_chpi_rsp0", 22, 1 }, + { "perr_dbp_pc_rsp_fifo3", 21, 1 }, + { "perr_dbp_pc_rsp_fifo2", 20, 1 }, + { "perr_dbp_pc_rsp_fifo1", 19, 1 }, + { "perr_dbp_pc_rsp_fifo0", 18, 1 }, + { "perr_dmarbt", 17, 1 }, + { "perr_flm_DbpFifo", 16, 1 }, + { "perr_flm_MCReq_fifo", 15, 1 }, + { "perr_flm_HintFifo", 14, 1 }, + { "perr_align_ctl_fifo3", 13, 1 }, + { "perr_align_ctl_fifo2", 12, 1 }, + { "perr_align_ctl_fifo1", 11, 1 }, + { "perr_align_ctl_fifo0", 10, 1 }, + { "perr_edma_fifo3", 9, 1 }, + { "perr_edma_fifo2", 8, 1 }, + { "perr_edma_fifo1", 7, 1 }, + { "perr_edma_fifo0", 6, 1 }, + { "perr_pd_fifo3", 5, 1 }, + { "perr_pd_fifo2", 4, 1 }, + { "perr_pd_fifo1", 3, 1 }, + { "perr_pd_fifo0", 2, 1 }, + { "perr_ing_ctxt_mifrsp", 1, 1 }, + { "perr_egr_ctxt_mifrsp", 0, 1 }, + { "SGE_PERR_ENABLE1", 0x102c, 0 }, + { "perr_flm_CreditFifo", 30, 1 }, + { "perr_imsg_hint_fifo", 29, 1 }, + { "perr_mc_pc", 28, 1 }, + { "perr_mc_igr_ctxt", 27, 1 }, + { "perr_mc_egr_ctxt", 26, 1 }, + { "perr_mc_flm", 25, 1 }, + { "perr_pc_mctag", 24, 1 }, + { "perr_pc_chpi_rsp1", 23, 1 }, + { "perr_pc_chpi_rsp0", 22, 1 }, + { "perr_dbp_pc_rsp_fifo3", 21, 1 }, + { "perr_dbp_pc_rsp_fifo2", 20, 1 }, + { "perr_dbp_pc_rsp_fifo1", 19, 1 }, + { "perr_dbp_pc_rsp_fifo0", 18, 1 }, + { "perr_dmarbt", 17, 1 }, + { "perr_flm_DbpFifo", 16, 1 }, + { "perr_flm_MCReq_fifo", 15, 1 }, + { "perr_flm_HintFifo", 14, 1 }, + { "perr_align_ctl_fifo3", 13, 1 }, + { "perr_align_ctl_fifo2", 12, 1 }, + { "perr_align_ctl_fifo1", 11, 1 }, + { "perr_align_ctl_fifo0", 10, 1 }, + { "perr_edma_fifo3", 9, 1 }, + { "perr_edma_fifo2", 8, 1 }, + { "perr_edma_fifo1", 7, 1 }, + { "perr_edma_fifo0", 6, 1 }, + { "perr_pd_fifo3", 5, 1 }, + { "perr_pd_fifo2", 4, 1 }, + { "perr_pd_fifo1", 3, 1 }, + { "perr_pd_fifo0", 2, 1 }, + { "perr_ing_ctxt_mifrsp", 1, 1 }, + { "perr_egr_ctxt_mifrsp", 0, 1 }, + { "SGE_INT_CAUSE2", 0x1030, 0 }, + { "perr_hint_delay_fifo1", 30, 1 }, + { "perr_hint_delay_fifo0", 29, 1 }, + { "perr_imsg_pd_fifo", 28, 1 }, + { "perr_ulptx_fifo1", 27, 1 }, + { "perr_ulptx_fifo0", 26, 1 }, + { "perr_idma2imsg_fifo1", 25, 1 }, + { "perr_idma2imsg_fifo0", 24, 1 }, + { "perr_headersplit_fifo1", 23, 1 }, + { "perr_headersplit_fifo0", 22, 1 }, + { "perr_eswitch_fifo3", 21, 1 }, + { "perr_eswitch_fifo2", 20, 1 }, + { "perr_eswitch_fifo1", 19, 1 }, + { "perr_eswitch_fifo0", 18, 1 }, + { "perr_pc_dbp1", 17, 1 }, + { "perr_pc_dbp0", 16, 1 }, + { "perr_imsg_ob_fifo", 15, 1 }, + { "perr_conm_sram", 14, 1 }, + { "perr_pc_mc_rsp", 13, 1 }, + { "perr_isw_idma0_fifo", 12, 1 }, + { "perr_isw_idma1_fifo", 11, 1 }, + { "perr_isw_dbp_fifo", 10, 1 }, + { "perr_isw_gts_fifo", 9, 1 }, + { "perr_itp_evr", 8, 1 }, + { "perr_flm_cntxmem", 7, 1 }, + { "perr_flm_l1Cache", 6, 1 }, + { "perr_dbp_hint_fifo", 5, 1 }, + { "perr_dbp_hp_fifo", 4, 1 }, + { "perr_dbp_lp_fifo", 3, 1 }, + { "perr_ing_ctxt_cache", 2, 1 }, + { "perr_egr_ctxt_cache", 1, 1 }, + { "perr_base_size", 0, 1 }, + { "SGE_INT_ENABLE2", 0x1034, 0 }, + { "perr_hint_delay_fifo1", 30, 1 }, + { "perr_hint_delay_fifo0", 29, 1 }, + { "perr_imsg_pd_fifo", 28, 1 }, + { "perr_ulptx_fifo1", 27, 1 }, + { "perr_ulptx_fifo0", 26, 1 }, + { "perr_idma2imsg_fifo1", 25, 1 }, + { "perr_idma2imsg_fifo0", 24, 1 }, + { "perr_headersplit_fifo1", 23, 1 }, + { "perr_headersplit_fifo0", 22, 1 }, + { "perr_eswitch_fifo3", 21, 1 }, + { "perr_eswitch_fifo2", 20, 1 }, + { "perr_eswitch_fifo1", 19, 1 }, + { "perr_eswitch_fifo0", 18, 1 }, + { "perr_pc_dbp1", 17, 1 }, + { "perr_pc_dbp0", 16, 1 }, + { "perr_imsg_ob_fifo", 15, 1 }, + { "perr_conm_sram", 14, 1 }, + { "perr_pc_mc_rsp", 13, 1 }, + { "perr_isw_idma0_fifo", 12, 1 }, + { "perr_isw_idma1_fifo", 11, 1 }, + { "perr_isw_dbp_fifo", 10, 1 }, + { "perr_isw_gts_fifo", 9, 1 }, + { "perr_itp_evr", 8, 1 }, + { "perr_flm_cntxmem", 7, 1 }, + { "perr_flm_l1Cache", 6, 1 }, + { "perr_dbp_hint_fifo", 5, 1 }, + { "perr_dbp_hp_fifo", 4, 1 }, + { "perr_dbp_lp_fifo", 3, 1 }, + { "perr_ing_ctxt_cache", 2, 1 }, + { "perr_egr_ctxt_cache", 1, 1 }, + { "perr_base_size", 0, 1 }, + { "SGE_PERR_ENABLE2", 0x1038, 0 }, + { "perr_hint_delay_fifo1", 30, 1 }, + { "perr_hint_delay_fifo0", 29, 1 }, + { "perr_imsg_pd_fifo", 28, 1 }, + { "perr_ulptx_fifo1", 27, 1 }, + { "perr_ulptx_fifo0", 26, 1 }, + { "perr_idma2imsg_fifo1", 25, 1 }, + { "perr_idma2imsg_fifo0", 24, 1 }, + { "perr_headersplit_fifo1", 23, 1 }, + { "perr_headersplit_fifo0", 22, 1 }, + { "perr_eswitch_fifo3", 21, 1 }, + { "perr_eswitch_fifo2", 20, 1 }, + { "perr_eswitch_fifo1", 19, 1 }, + { "perr_eswitch_fifo0", 18, 1 }, + { "perr_pc_dbp1", 17, 1 }, + { "perr_pc_dbp0", 16, 1 }, + { "perr_imsg_ob_fifo", 15, 1 }, + { "perr_conm_sram", 14, 1 }, + { "perr_pc_mc_rsp", 13, 1 }, + { "perr_isw_idma0_fifo", 12, 1 }, + { "perr_isw_idma1_fifo", 11, 1 }, + { "perr_isw_dbp_fifo", 10, 1 }, + { "perr_isw_gts_fifo", 9, 1 }, + { "perr_itp_evr", 8, 1 }, + { "perr_flm_cntxmem", 7, 1 }, + { "perr_flm_l1Cache", 6, 1 }, + { "perr_dbp_hint_fifo", 5, 1 }, + { "perr_dbp_hp_fifo", 4, 1 }, + { "perr_dbp_lp_fifo", 3, 1 }, + { "perr_ing_ctxt_cache", 2, 1 }, + { "perr_egr_ctxt_cache", 1, 1 }, + { "perr_base_size", 0, 1 }, + { "SGE_INT_CAUSE3", 0x103c, 0 }, + { "err_flm_dbp", 31, 1 }, + { "err_flm_idma1", 30, 1 }, + { "err_flm_idma0", 29, 1 }, + { "err_flm_hint", 28, 1 }, + { "err_pcie_error3", 27, 1 }, + { "err_pcie_error2", 26, 1 }, + { "err_pcie_error1", 25, 1 }, + { "err_pcie_error0", 24, 1 }, + { "err_timer_above_max_qid", 23, 1 }, + { "err_cpl_exceed_iqe_size", 22, 1 }, + { "err_invalid_cidx_inc", 21, 1 }, + { "err_itp_time_paused", 20, 1 }, + { "err_cpl_opcode_0", 19, 1 }, + { "err_dropped_db", 18, 1 }, + { "err_data_cpl_on_high_qid1", 17, 1 }, + { "err_data_cpl_on_high_qid0", 16, 1 }, + { "err_bad_db_pidx3", 15, 1 }, + { "err_bad_db_pidx2", 14, 1 }, + { "err_bad_db_pidx1", 13, 1 }, + { "err_bad_db_pidx0", 12, 1 }, + { "err_ing_pcie_chan", 11, 1 }, + { "err_ing_ctxt_prio", 10, 1 }, + { "err_egr_ctxt_prio", 9, 1 }, + { "dbfifo_hp_int", 8, 1 }, + { "dbfifo_lp_int", 7, 1 }, + { "reg_address_err", 6, 1 }, + { "ingress_size_err", 5, 1 }, + { "egress_size_err", 4, 1 }, + { "err_inv_ctxt3", 3, 1 }, + { "err_inv_ctxt2", 2, 1 }, + { "err_inv_ctxt1", 1, 1 }, + { "err_inv_ctxt0", 0, 1 }, + { "SGE_INT_ENABLE3", 0x1040, 0 }, + { "err_flm_dbp", 31, 1 }, + { "err_flm_idma1", 30, 1 }, + { "err_flm_idma0", 29, 1 }, + { "err_flm_hint", 28, 1 }, + { "err_pcie_error3", 27, 1 }, + { "err_pcie_error2", 26, 1 }, + { "err_pcie_error1", 25, 1 }, + { "err_pcie_error0", 24, 1 }, + { "err_timer_above_max_qid", 23, 1 }, + { "err_cpl_exceed_iqe_size", 22, 1 }, + { "err_invalid_cidx_inc", 21, 1 }, + { "err_itp_time_paused", 20, 1 }, + { "err_cpl_opcode_0", 19, 1 }, + { "err_dropped_db", 18, 1 }, + { "err_data_cpl_on_high_qid1", 17, 1 }, + { "err_data_cpl_on_high_qid0", 16, 1 }, + { "err_bad_db_pidx3", 15, 1 }, + { "err_bad_db_pidx2", 14, 1 }, + { "err_bad_db_pidx1", 13, 1 }, + { "err_bad_db_pidx0", 12, 1 }, + { "err_ing_pcie_chan", 11, 1 }, + { "err_ing_ctxt_prio", 10, 1 }, + { "err_egr_ctxt_prio", 9, 1 }, + { "dbfifo_hp_int", 8, 1 }, + { "dbfifo_lp_int", 7, 1 }, + { "reg_address_err", 6, 1 }, + { "ingress_size_err", 5, 1 }, + { "egress_size_err", 4, 1 }, + { "err_inv_ctxt3", 3, 1 }, + { "err_inv_ctxt2", 2, 1 }, + { "err_inv_ctxt1", 1, 1 }, + { "err_inv_ctxt0", 0, 1 }, + { "SGE_FL_BUFFER_SIZE0", 0x1044, 0 }, + { "Size", 4, 28 }, + { "SGE_FL_BUFFER_SIZE1", 0x1048, 0 }, + { "Size", 4, 28 }, + { "SGE_FL_BUFFER_SIZE2", 0x104c, 0 }, + { "Size", 4, 28 }, + { "SGE_FL_BUFFER_SIZE3", 0x1050, 0 }, + { "Size", 4, 28 }, + { "SGE_FL_BUFFER_SIZE4", 0x1054, 0 }, + { "Size", 4, 28 }, + { "SGE_FL_BUFFER_SIZE5", 0x1058, 0 }, + { "Size", 4, 28 }, + { "SGE_FL_BUFFER_SIZE6", 0x105c, 0 }, + { "Size", 4, 28 }, + { "SGE_FL_BUFFER_SIZE7", 0x1060, 0 }, + { "Size", 4, 28 }, + { "SGE_FL_BUFFER_SIZE8", 0x1064, 0 }, + { "Size", 4, 28 }, + { "SGE_FL_BUFFER_SIZE9", 0x1068, 0 }, + { "Size", 4, 28 }, + { "SGE_FL_BUFFER_SIZE10", 0x106c, 0 }, + { "Size", 4, 28 }, + { "SGE_FL_BUFFER_SIZE11", 0x1070, 0 }, + { "Size", 4, 28 }, + { "SGE_FL_BUFFER_SIZE12", 0x1074, 0 }, + { "Size", 4, 28 }, + { "SGE_FL_BUFFER_SIZE13", 0x1078, 0 }, + { "Size", 4, 28 }, + { "SGE_FL_BUFFER_SIZE14", 0x107c, 0 }, + { "Size", 4, 28 }, + { "SGE_FL_BUFFER_SIZE15", 0x1080, 0 }, + { "Size", 4, 28 }, + { "SGE_DBQ_CTXT_BADDR", 0x1084, 0 }, + { "BaseAddr", 3, 29 }, + { "SGE_IMSG_CTXT_BADDR", 0x1088, 0 }, + { "BaseAddr", 3, 29 }, + { "SGE_FLM_CACHE_BADDR", 0x108c, 0 }, + { "BaseAddr", 3, 29 }, + { "SGE_FLM_CFG", 0x1090, 0 }, + { "OpMode", 26, 6 }, + { "NoHdr", 18, 1 }, + { "CachePtrCnt", 16, 2 }, + { "EDRAMPtrCnt", 14, 2 }, + { "HdrStartFLQ", 11, 3 }, + { "FetchThresh", 6, 5 }, + { "CreditCnt", 4, 2 }, + { "NoEDRAM", 0, 1 }, + { "SGE_CONM_CTRL", 0x1094, 0 }, + { "EgrThreshold", 8, 6 }, + { "IngThreshold", 2, 6 }, + { "MPS_Enable", 1, 1 }, + { "TP_Enable", 0, 1 }, + { "SGE_TIMESTAMP_LO", 0x1098, 0 }, + { "SGE_TIMESTAMP_HI", 0x109c, 0 }, + { "Opcode", 28, 2 }, + { "Value", 0, 28 }, + { "SGE_INGRESS_RX_THRESHOLD", 0x10a0, 0 }, + { "Threshold_0", 24, 6 }, + { "Threshold_1", 16, 6 }, + { "Threshold_2", 8, 6 }, + { "Threshold_3", 0, 6 }, + { "SGE_DBFIFO_STATUS", 0x10a4, 0 }, + { "HP_Int_Thresh", 28, 4 }, + { "HP_Count", 16, 11 }, + { "LP_Int_Thresh", 12, 4 }, + { "LP_Count", 0, 11 }, + { "SGE_DOORBELL_CONTROL", 0x10a8, 0 }, + { "HintDepthCtl", 27, 5 }, + { "NoCoalesce", 26, 1 }, + { "HP_Weight", 24, 2 }, + { "HP_Disable", 23, 1 }, + { "ForceUserDBtoLP", 22, 1 }, + { "ForceVFPF0DBtoLP", 21, 1 }, + { "ForceVFPF1DBtoLP", 20, 1 }, + { "ForceVFPF2DBtoLP", 19, 1 }, + { "ForceVFPF3DBtoLP", 18, 1 }, + { "ForceVFPF4DBtoLP", 17, 1 }, + { "ForceVFPF5DBtoLP", 16, 1 }, + { "ForceVFPF6DBtoLP", 15, 1 }, + { "ForceVFPF7DBtoLP", 14, 1 }, + { "Enable_Drop", 13, 1 }, + { "Drop_Timeout", 1, 12 }, + { "Dropped_DB", 0, 1 }, + { "SGE_DROPPED_DOORBELL", 0x10ac, 0 }, + { "SGE_DOORBELL_THROTTLE_CONTROL", 0x10b0, 0 }, + { "Throttle_Count", 1, 12 }, + { "Throttle_Enable", 0, 1 }, + { "SGE_ITP_CONTROL", 0x10b4, 0 }, + { "Critical_Time", 10, 15 }, + { "LL_Empty", 4, 6 }, + { "LL_Read_Wait_Disable", 0, 1 }, + { "SGE_TIMER_VALUE_0_AND_1", 0x10b8, 0 }, + { "TimerValue0", 16, 16 }, + { "TimerValue1", 0, 16 }, + { "SGE_TIMER_VALUE_2_AND_3", 0x10bc, 0 }, + { "TimerValue2", 16, 16 }, + { "TimerValue3", 0, 16 }, + { "SGE_TIMER_VALUE_4_AND_5", 0x10c0, 0 }, + { "TimerValue4", 16, 16 }, + { "TimerValue5", 0, 16 }, + { "SGE_PD_RSP_CREDIT01", 0x10c4, 0 }, + { "RspCreditEn0", 31, 1 }, + { "MaxTag0", 24, 7 }, + { "MaxRspCnt0", 16, 8 }, + { "RspCreditEn1", 15, 1 }, + { "MaxTag1", 8, 7 }, + { "MaxRspCnt1", 0, 8 }, + { "SGE_PD_RSP_CREDIT23", 0x10c8, 0 }, + { "RspCreditEn2", 31, 1 }, + { "MaxTag2", 24, 7 }, + { "MaxRspCnt2", 16, 8 }, + { "RspCreditEn3", 15, 1 }, + { "MaxTag3", 8, 7 }, + { "MaxRspCnt3", 0, 8 }, + { "SGE_DEBUG_INDEX", 0x10cc, 0 }, + { "SGE_DEBUG_DATA_HIGH", 0x10d0, 0 }, + { "SGE_DEBUG_DATA_LOW", 0x10d4, 0 }, + { "SGE_REVISION", 0x10d8, 0 }, + { "SGE_INT_CAUSE4", 0x10dc, 0 }, + { "err_bad_upfl_inc_credit3", 8, 1 }, + { "err_bad_upfl_inc_credit2", 7, 1 }, + { "err_bad_upfl_inc_credit1", 6, 1 }, + { "err_bad_upfl_inc_credit0", 5, 1 }, + { "err_physaddr_len0_idma1", 4, 1 }, + { "err_physaddr_len0_idma0", 3, 1 }, + { "err_flm_invalid_pkt_drop1", 2, 1 }, + { "err_flm_invalid_pkt_drop0", 1, 1 }, + { "err_unexpected_timer", 0, 1 }, + { "SGE_INT_ENABLE4", 0x10e0, 0 }, + { "err_bad_upfl_inc_credit3", 8, 1 }, + { "err_bad_upfl_inc_credit2", 7, 1 }, + { "err_bad_upfl_inc_credit1", 6, 1 }, + { "err_bad_upfl_inc_credit0", 5, 1 }, + { "err_physaddr_len0_idma1", 4, 1 }, + { "err_physaddr_len0_idma0", 3, 1 }, + { "err_flm_invalid_pkt_drop1", 2, 1 }, + { "err_flm_invalid_pkt_drop0", 1, 1 }, + { "err_unexpected_timer", 0, 1 }, + { "SGE_STAT_TOTAL", 0x10e4, 0 }, + { "SGE_STAT_MATCH", 0x10e8, 0 }, + { "SGE_STAT_CFG", 0x10ec, 0 }, + { "ITPOpMode", 8, 1 }, + { "EgrCtxtOpMode", 6, 2 }, + { "IngCtxtOpMode", 4, 2 }, + { "StatMode", 2, 2 }, + { "StatSource", 0, 2 }, + { "SGE_HINT_CFG", 0x10f0, 0 }, + { "HintsAllowedNoHdr", 6, 6 }, + { "HintsAllowedHdr", 0, 6 }, + { "SGE_INGRESS_QUEUES_PER_PAGE_PF", 0x10f4, 0 }, + { "QueuesPerPagePF7", 28, 4 }, + { "QueuesPerPagePF6", 24, 4 }, + { "QueuesPerPagePF5", 20, 4 }, + { "QueuesPerPagePF4", 16, 4 }, + { "QueuesPerPagePF3", 12, 4 }, + { "QueuesPerPagePF2", 8, 4 }, + { "QueuesPerPagePF1", 4, 4 }, + { "QueuesPerPagePF0", 0, 4 }, + { "SGE_INGRESS_QUEUES_PER_PAGE_VF", 0x10f8, 0 }, + { "QueuesPerPageVFPF7", 28, 4 }, + { "QueuesPerPageVFPF6", 24, 4 }, + { "QueuesPerPageVFPF5", 20, 4 }, + { "QueuesPerPageVFPF4", 16, 4 }, + { "QueuesPerPageVFPF3", 12, 4 }, + { "QueuesPerPageVFPF2", 8, 4 }, + { "QueuesPerPageVFPF1", 4, 4 }, + { "QueuesPerPageVFPF0", 0, 4 }, + { "SGE_PD_WRR_CONFIG", 0x10fc, 0 }, + { "SGE_ERROR_STATS", 0x1100, 0 }, + { "Uncaptured_Error", 18, 1 }, + { "Error_QID_Valid", 17, 1 }, + { "Error_QID", 0, 17 }, + { "SGE_SHARED_TAG_CHAN_CFG", 0x1104, 0 }, + { "MinTag3", 24, 8 }, + { "MinTag2", 16, 8 }, + { "MinTag1", 8, 8 }, + { "MinTag0", 0, 8 }, + { "SGE_SHARED_TAG_POOL_CFG", 0x1108, 0 }, + { "SGE_PC0_REQ_BIST_CMD", 0x1180, 0 }, + { "SGE_PC0_REQ_BIST_ERROR_CNT", 0x1184, 0 }, + { "SGE_PC1_REQ_BIST_CMD", 0x1190, 0 }, + { "SGE_PC1_REQ_BIST_ERROR_CNT", 0x1194, 0 }, + { "SGE_PC0_RSP_BIST_CMD", 0x11a0, 0 }, + { "SGE_PC0_RSP_BIST_ERROR_CNT", 0x11a4, 0 }, + { "SGE_PC1_RSP_BIST_CMD", 0x11b0, 0 }, + { "SGE_PC1_RSP_BIST_ERROR_CNT", 0x11b4, 0 }, + { "SGE_CTXT_CMD", 0x11fc, 0 }, + { "Busy", 31, 1 }, + { "Opcode", 28, 2 }, + { "CtxtType", 24, 2 }, + { "QID", 0, 17 }, + { "SGE_CTXT_DATA0", 0x1200, 0 }, + { "SGE_CTXT_DATA1", 0x1204, 0 }, + { "SGE_CTXT_DATA2", 0x1208, 0 }, + { "SGE_CTXT_DATA3", 0x120c, 0 }, + { "SGE_CTXT_DATA4", 0x1210, 0 }, + { "SGE_CTXT_DATA5", 0x1214, 0 }, + { "SGE_CTXT_DATA6", 0x1218, 0 }, + { "SGE_CTXT_DATA7", 0x121c, 0 }, + { "SGE_CTXT_MASK0", 0x1220, 0 }, + { "SGE_CTXT_MASK1", 0x1224, 0 }, + { "SGE_CTXT_MASK2", 0x1228, 0 }, + { "SGE_CTXT_MASK3", 0x122c, 0 }, + { "SGE_CTXT_MASK4", 0x1230, 0 }, + { "SGE_CTXT_MASK5", 0x1234, 0 }, + { "SGE_CTXT_MASK6", 0x1238, 0 }, + { "SGE_CTXT_MASK7", 0x123c, 0 }, + { "SGE_QUEUE_BASE_MAP_HIGH", 0x1300, 0 }, + { "Egress_Log2Size", 27, 5 }, + { "Egress_Base", 10, 17 }, + { "Ingress2_Log2Size", 5, 5 }, + { "Ingress1_Log2Size", 0, 5 }, + { "SGE_QUEUE_BASE_MAP_HIGH", 0x1308, 0 }, + { "Egress_Log2Size", 27, 5 }, + { "Egress_Base", 10, 17 }, + { "Ingress2_Log2Size", 5, 5 }, + { "Ingress1_Log2Size", 0, 5 }, + { "SGE_QUEUE_BASE_MAP_HIGH", 0x1310, 0 }, + { "Egress_Log2Size", 27, 5 }, + { "Egress_Base", 10, 17 }, + { "Ingress2_Log2Size", 5, 5 }, + { "Ingress1_Log2Size", 0, 5 }, + { "SGE_QUEUE_BASE_MAP_HIGH", 0x1318, 0 }, + { "Egress_Log2Size", 27, 5 }, + { "Egress_Base", 10, 17 }, + { "Ingress2_Log2Size", 5, 5 }, + { "Ingress1_Log2Size", 0, 5 }, + { "SGE_QUEUE_BASE_MAP_HIGH", 0x1320, 0 }, + { "Egress_Log2Size", 27, 5 }, + { "Egress_Base", 10, 17 }, + { "Ingress2_Log2Size", 5, 5 }, + { "Ingress1_Log2Size", 0, 5 }, + { "SGE_QUEUE_BASE_MAP_HIGH", 0x1328, 0 }, + { "Egress_Log2Size", 27, 5 }, + { "Egress_Base", 10, 17 }, + { "Ingress2_Log2Size", 5, 5 }, + { "Ingress1_Log2Size", 0, 5 }, + { "SGE_QUEUE_BASE_MAP_HIGH", 0x1330, 0 }, + { "Egress_Log2Size", 27, 5 }, + { "Egress_Base", 10, 17 }, + { "Ingress2_Log2Size", 5, 5 }, + { "Ingress1_Log2Size", 0, 5 }, + { "SGE_QUEUE_BASE_MAP_HIGH", 0x1338, 0 }, + { "Egress_Log2Size", 27, 5 }, + { "Egress_Base", 10, 17 }, + { "Ingress2_Log2Size", 5, 5 }, + { "Ingress1_Log2Size", 0, 5 }, + { "SGE_QUEUE_BASE_MAP_HIGH", 0x1340, 0 }, + { "Egress_Log2Size", 27, 5 }, + { "Egress_Base", 10, 17 }, + { "Ingress2_Log2Size", 5, 5 }, + { "Ingress1_Log2Size", 0, 5 }, + { "SGE_QUEUE_BASE_MAP_HIGH", 0x1348, 0 }, + { "Egress_Log2Size", 27, 5 }, + { "Egress_Base", 10, 17 }, + { "Ingress2_Log2Size", 5, 5 }, + { "Ingress1_Log2Size", 0, 5 }, + { "SGE_QUEUE_BASE_MAP_HIGH", 0x1350, 0 }, + { "Egress_Log2Size", 27, 5 }, + { "Egress_Base", 10, 17 }, + { "Ingress2_Log2Size", 5, 5 }, + { "Ingress1_Log2Size", 0, 5 }, + { "SGE_QUEUE_BASE_MAP_HIGH", 0x1358, 0 }, + { "Egress_Log2Size", 27, 5 }, + { "Egress_Base", 10, 17 }, + { "Ingress2_Log2Size", 5, 5 }, + { "Ingress1_Log2Size", 0, 5 }, + { "SGE_QUEUE_BASE_MAP_HIGH", 0x1360, 0 }, + { "Egress_Log2Size", 27, 5 }, + { "Egress_Base", 10, 17 }, + { "Ingress2_Log2Size", 5, 5 }, + { "Ingress1_Log2Size", 0, 5 }, + { "SGE_QUEUE_BASE_MAP_HIGH", 0x1368, 0 }, + { "Egress_Log2Size", 27, 5 }, + { "Egress_Base", 10, 17 }, + { "Ingress2_Log2Size", 5, 5 }, + { "Ingress1_Log2Size", 0, 5 }, + { "SGE_QUEUE_BASE_MAP_HIGH", 0x1370, 0 }, + { "Egress_Log2Size", 27, 5 }, + { "Egress_Base", 10, 17 }, + { "Ingress2_Log2Size", 5, 5 }, + { "Ingress1_Log2Size", 0, 5 }, + { "SGE_QUEUE_BASE_MAP_HIGH", 0x1378, 0 }, + { "Egress_Log2Size", 27, 5 }, + { "Egress_Base", 10, 17 }, + { "Ingress2_Log2Size", 5, 5 }, + { "Ingress1_Log2Size", 0, 5 }, + { "SGE_QUEUE_BASE_MAP_HIGH", 0x1380, 0 }, + { "Egress_Log2Size", 27, 5 }, + { "Egress_Base", 10, 17 }, + { "Ingress2_Log2Size", 5, 5 }, + { "Ingress1_Log2Size", 0, 5 }, + { "SGE_QUEUE_BASE_MAP_HIGH", 0x1388, 0 }, + { "Egress_Log2Size", 27, 5 }, + { "Egress_Base", 10, 17 }, + { "Ingress2_Log2Size", 5, 5 }, + { "Ingress1_Log2Size", 0, 5 }, + { "SGE_QUEUE_BASE_MAP_HIGH", 0x1390, 0 }, + { "Egress_Log2Size", 27, 5 }, + { "Egress_Base", 10, 17 }, + { "Ingress2_Log2Size", 5, 5 }, + { "Ingress1_Log2Size", 0, 5 }, + { "SGE_QUEUE_BASE_MAP_HIGH", 0x1398, 0 }, + { "Egress_Log2Size", 27, 5 }, + { "Egress_Base", 10, 17 }, + { "Ingress2_Log2Size", 5, 5 }, + { "Ingress1_Log2Size", 0, 5 }, + { "SGE_QUEUE_BASE_MAP_HIGH", 0x13a0, 0 }, + { "Egress_Log2Size", 27, 5 }, + { "Egress_Base", 10, 17 }, + { "Ingress2_Log2Size", 5, 5 }, + { "Ingress1_Log2Size", 0, 5 }, + { "SGE_QUEUE_BASE_MAP_HIGH", 0x13a8, 0 }, + { "Egress_Log2Size", 27, 5 }, + { "Egress_Base", 10, 17 }, + { "Ingress2_Log2Size", 5, 5 }, + { "Ingress1_Log2Size", 0, 5 }, + { "SGE_QUEUE_BASE_MAP_HIGH", 0x13b0, 0 }, + { "Egress_Log2Size", 27, 5 }, + { "Egress_Base", 10, 17 }, + { "Ingress2_Log2Size", 5, 5 }, + { "Ingress1_Log2Size", 0, 5 }, + { "SGE_QUEUE_BASE_MAP_HIGH", 0x13b8, 0 }, + { "Egress_Log2Size", 27, 5 }, + { "Egress_Base", 10, 17 }, + { "Ingress2_Log2Size", 5, 5 }, + { "Ingress1_Log2Size", 0, 5 }, + { "SGE_QUEUE_BASE_MAP_HIGH", 0x13c0, 0 }, + { "Egress_Log2Size", 27, 5 }, + { "Egress_Base", 10, 17 }, + { "Ingress2_Log2Size", 5, 5 }, + { "Ingress1_Log2Size", 0, 5 }, + { "SGE_QUEUE_BASE_MAP_HIGH", 0x13c8, 0 }, + { "Egress_Log2Size", 27, 5 }, + { "Egress_Base", 10, 17 }, + { "Ingress2_Log2Size", 5, 5 }, + { "Ingress1_Log2Size", 0, 5 }, + { "SGE_QUEUE_BASE_MAP_HIGH", 0x13d0, 0 }, + { "Egress_Log2Size", 27, 5 }, + { "Egress_Base", 10, 17 }, + { "Ingress2_Log2Size", 5, 5 }, + { "Ingress1_Log2Size", 0, 5 }, + { "SGE_QUEUE_BASE_MAP_HIGH", 0x13d8, 0 }, + { "Egress_Log2Size", 27, 5 }, + { "Egress_Base", 10, 17 }, + { "Ingress2_Log2Size", 5, 5 }, + { "Ingress1_Log2Size", 0, 5 }, + { "SGE_QUEUE_BASE_MAP_HIGH", 0x13e0, 0 }, + { "Egress_Log2Size", 27, 5 }, + { "Egress_Base", 10, 17 }, + { "Ingress2_Log2Size", 5, 5 }, + { "Ingress1_Log2Size", 0, 5 }, + { "SGE_QUEUE_BASE_MAP_HIGH", 0x13e8, 0 }, + { "Egress_Log2Size", 27, 5 }, + { "Egress_Base", 10, 17 }, + { "Ingress2_Log2Size", 5, 5 }, + { "Ingress1_Log2Size", 0, 5 }, + { "SGE_QUEUE_BASE_MAP_HIGH", 0x13f0, 0 }, + { "Egress_Log2Size", 27, 5 }, + { "Egress_Base", 10, 17 }, + { "Ingress2_Log2Size", 5, 5 }, + { "Ingress1_Log2Size", 0, 5 }, + { "SGE_QUEUE_BASE_MAP_HIGH", 0x13f8, 0 }, + { "Egress_Log2Size", 27, 5 }, + { "Egress_Base", 10, 17 }, + { "Ingress2_Log2Size", 5, 5 }, + { "Ingress1_Log2Size", 0, 5 }, + { "SGE_QUEUE_BASE_MAP_HIGH", 0x1400, 0 }, + { "Egress_Log2Size", 27, 5 }, + { "Egress_Base", 10, 17 }, + { "Ingress2_Log2Size", 5, 5 }, + { "Ingress1_Log2Size", 0, 5 }, + { "SGE_QUEUE_BASE_MAP_HIGH", 0x1408, 0 }, + { "Egress_Log2Size", 27, 5 }, + { "Egress_Base", 10, 17 }, + { "Ingress2_Log2Size", 5, 5 }, + { "Ingress1_Log2Size", 0, 5 }, + { "SGE_QUEUE_BASE_MAP_HIGH", 0x1410, 0 }, + { "Egress_Log2Size", 27, 5 }, + { "Egress_Base", 10, 17 }, + { "Ingress2_Log2Size", 5, 5 }, + { "Ingress1_Log2Size", 0, 5 }, + { "SGE_QUEUE_BASE_MAP_HIGH", 0x1418, 0 }, + { "Egress_Log2Size", 27, 5 }, + { "Egress_Base", 10, 17 }, + { "Ingress2_Log2Size", 5, 5 }, + { "Ingress1_Log2Size", 0, 5 }, + { "SGE_QUEUE_BASE_MAP_HIGH", 0x1420, 0 }, + { "Egress_Log2Size", 27, 5 }, + { "Egress_Base", 10, 17 }, + { "Ingress2_Log2Size", 5, 5 }, + { "Ingress1_Log2Size", 0, 5 }, + { "SGE_QUEUE_BASE_MAP_HIGH", 0x1428, 0 }, + { "Egress_Log2Size", 27, 5 }, + { "Egress_Base", 10, 17 }, + { "Ingress2_Log2Size", 5, 5 }, + { "Ingress1_Log2Size", 0, 5 }, + { "SGE_QUEUE_BASE_MAP_HIGH", 0x1430, 0 }, + { "Egress_Log2Size", 27, 5 }, + { "Egress_Base", 10, 17 }, + { "Ingress2_Log2Size", 5, 5 }, + { "Ingress1_Log2Size", 0, 5 }, + { "SGE_QUEUE_BASE_MAP_HIGH", 0x1438, 0 }, + { "Egress_Log2Size", 27, 5 }, + { "Egress_Base", 10, 17 }, + { "Ingress2_Log2Size", 5, 5 }, + { "Ingress1_Log2Size", 0, 5 }, + { "SGE_QUEUE_BASE_MAP_HIGH", 0x1440, 0 }, + { "Egress_Log2Size", 27, 5 }, + { "Egress_Base", 10, 17 }, + { "Ingress2_Log2Size", 5, 5 }, + { "Ingress1_Log2Size", 0, 5 }, + { "SGE_QUEUE_BASE_MAP_HIGH", 0x1448, 0 }, + { "Egress_Log2Size", 27, 5 }, + { "Egress_Base", 10, 17 }, + { "Ingress2_Log2Size", 5, 5 }, + { "Ingress1_Log2Size", 0, 5 }, + { "SGE_QUEUE_BASE_MAP_HIGH", 0x1450, 0 }, + { "Egress_Log2Size", 27, 5 }, + { "Egress_Base", 10, 17 }, + { "Ingress2_Log2Size", 5, 5 }, + { "Ingress1_Log2Size", 0, 5 }, + { "SGE_QUEUE_BASE_MAP_HIGH", 0x1458, 0 }, + { "Egress_Log2Size", 27, 5 }, + { "Egress_Base", 10, 17 }, + { "Ingress2_Log2Size", 5, 5 }, + { "Ingress1_Log2Size", 0, 5 }, + { "SGE_QUEUE_BASE_MAP_HIGH", 0x1460, 0 }, + { "Egress_Log2Size", 27, 5 }, + { "Egress_Base", 10, 17 }, + { "Ingress2_Log2Size", 5, 5 }, + { "Ingress1_Log2Size", 0, 5 }, + { "SGE_QUEUE_BASE_MAP_HIGH", 0x1468, 0 }, + { "Egress_Log2Size", 27, 5 }, + { "Egress_Base", 10, 17 }, + { "Ingress2_Log2Size", 5, 5 }, + { "Ingress1_Log2Size", 0, 5 }, + { "SGE_QUEUE_BASE_MAP_HIGH", 0x1470, 0 }, + { "Egress_Log2Size", 27, 5 }, + { "Egress_Base", 10, 17 }, + { "Ingress2_Log2Size", 5, 5 }, + { "Ingress1_Log2Size", 0, 5 }, + { "SGE_QUEUE_BASE_MAP_HIGH", 0x1478, 0 }, + { "Egress_Log2Size", 27, 5 }, + { "Egress_Base", 10, 17 }, + { "Ingress2_Log2Size", 5, 5 }, + { "Ingress1_Log2Size", 0, 5 }, + { "SGE_QUEUE_BASE_MAP_HIGH", 0x1480, 0 }, + { "Egress_Log2Size", 27, 5 }, + { "Egress_Base", 10, 17 }, + { "Ingress2_Log2Size", 5, 5 }, + { "Ingress1_Log2Size", 0, 5 }, + { "SGE_QUEUE_BASE_MAP_HIGH", 0x1488, 0 }, + { "Egress_Log2Size", 27, 5 }, + { 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}, + { "SGE_QUEUE_BASE_MAP_LOW", 0x13a4, 0 }, + { "Ingress2_Base", 16, 16 }, + { "Ingress1_Base", 0, 16 }, + { "SGE_QUEUE_BASE_MAP_LOW", 0x13ac, 0 }, + { "Ingress2_Base", 16, 16 }, + { "Ingress1_Base", 0, 16 }, + { "SGE_QUEUE_BASE_MAP_LOW", 0x13b4, 0 }, + { "Ingress2_Base", 16, 16 }, + { "Ingress1_Base", 0, 16 }, + { "SGE_QUEUE_BASE_MAP_LOW", 0x13bc, 0 }, + { "Ingress2_Base", 16, 16 }, + { "Ingress1_Base", 0, 16 }, + { "SGE_QUEUE_BASE_MAP_LOW", 0x13c4, 0 }, + { "Ingress2_Base", 16, 16 }, + { "Ingress1_Base", 0, 16 }, + { "SGE_QUEUE_BASE_MAP_LOW", 0x13cc, 0 }, + { "Ingress2_Base", 16, 16 }, + { "Ingress1_Base", 0, 16 }, + { "SGE_QUEUE_BASE_MAP_LOW", 0x13d4, 0 }, + { "Ingress2_Base", 16, 16 }, + { "Ingress1_Base", 0, 16 }, + { "SGE_QUEUE_BASE_MAP_LOW", 0x13dc, 0 }, + { "Ingress2_Base", 16, 16 }, + { "Ingress1_Base", 0, 16 }, + { "SGE_QUEUE_BASE_MAP_LOW", 0x13e4, 0 }, + { "Ingress2_Base", 16, 16 }, + { "Ingress1_Base", 0, 16 }, + { "SGE_QUEUE_BASE_MAP_LOW", 0x13ec, 0 }, + { "Ingress2_Base", 16, 16 }, + { "Ingress1_Base", 0, 16 }, + { "SGE_QUEUE_BASE_MAP_LOW", 0x13f4, 0 }, + { "Ingress2_Base", 16, 16 }, + { "Ingress1_Base", 0, 16 }, + { "SGE_QUEUE_BASE_MAP_LOW", 0x13fc, 0 }, + { "Ingress2_Base", 16, 16 }, + { "Ingress1_Base", 0, 16 }, + { "SGE_QUEUE_BASE_MAP_LOW", 0x1404, 0 }, + { "Ingress2_Base", 16, 16 }, + { "Ingress1_Base", 0, 16 }, + { "SGE_QUEUE_BASE_MAP_LOW", 0x140c, 0 }, + { "Ingress2_Base", 16, 16 }, + { "Ingress1_Base", 0, 16 }, + { "SGE_QUEUE_BASE_MAP_LOW", 0x1414, 0 }, + { "Ingress2_Base", 16, 16 }, + { "Ingress1_Base", 0, 16 }, + { "SGE_QUEUE_BASE_MAP_LOW", 0x141c, 0 }, + { "Ingress2_Base", 16, 16 }, + { "Ingress1_Base", 0, 16 }, + { "SGE_QUEUE_BASE_MAP_LOW", 0x1424, 0 }, + { "Ingress2_Base", 16, 16 }, + { "Ingress1_Base", 0, 16 }, + { "SGE_QUEUE_BASE_MAP_LOW", 0x142c, 0 }, + { "Ingress2_Base", 16, 16 }, + { "Ingress1_Base", 0, 16 }, + { "SGE_QUEUE_BASE_MAP_LOW", 0x1434, 0 }, + { "Ingress2_Base", 16, 16 }, + { "Ingress1_Base", 0, 16 }, + { "SGE_QUEUE_BASE_MAP_LOW", 0x143c, 0 }, + { "Ingress2_Base", 16, 16 }, + { "Ingress1_Base", 0, 16 }, + { "SGE_QUEUE_BASE_MAP_LOW", 0x1444, 0 }, + { "Ingress2_Base", 16, 16 }, + { "Ingress1_Base", 0, 16 }, + { "SGE_QUEUE_BASE_MAP_LOW", 0x144c, 0 }, + { "Ingress2_Base", 16, 16 }, + { "Ingress1_Base", 0, 16 }, + { "SGE_QUEUE_BASE_MAP_LOW", 0x1454, 0 }, + { "Ingress2_Base", 16, 16 }, + { "Ingress1_Base", 0, 16 }, + { "SGE_QUEUE_BASE_MAP_LOW", 0x145c, 0 }, + { "Ingress2_Base", 16, 16 }, + { "Ingress1_Base", 0, 16 }, + { "SGE_QUEUE_BASE_MAP_LOW", 0x1464, 0 }, + { "Ingress2_Base", 16, 16 }, + { "Ingress1_Base", 0, 16 }, + { "SGE_QUEUE_BASE_MAP_LOW", 0x146c, 0 }, + { "Ingress2_Base", 16, 16 }, + { "Ingress1_Base", 0, 16 }, + { "SGE_QUEUE_BASE_MAP_LOW", 0x1474, 0 }, + { "Ingress2_Base", 16, 16 }, + { "Ingress1_Base", 0, 16 }, + { "SGE_QUEUE_BASE_MAP_LOW", 0x147c, 0 }, + { "Ingress2_Base", 16, 16 }, + { "Ingress1_Base", 0, 16 }, + { "SGE_QUEUE_BASE_MAP_LOW", 0x1484, 0 }, + { "Ingress2_Base", 16, 16 }, + { "Ingress1_Base", 0, 16 }, + { "SGE_QUEUE_BASE_MAP_LOW", 0x148c, 0 }, + { "Ingress2_Base", 16, 16 }, + { "Ingress1_Base", 0, 16 }, + { "SGE_QUEUE_BASE_MAP_LOW", 0x1494, 0 }, + { "Ingress2_Base", 16, 16 }, + { "Ingress1_Base", 0, 16 }, + { "SGE_QUEUE_BASE_MAP_LOW", 0x149c, 0 }, + { "Ingress2_Base", 16, 16 }, + { "Ingress1_Base", 0, 16 }, + { "SGE_QUEUE_BASE_MAP_LOW", 0x14a4, 0 }, + { "Ingress2_Base", 16, 16 }, + { "Ingress1_Base", 0, 16 }, + { "SGE_QUEUE_BASE_MAP_LOW", 0x14ac, 0 }, + { "Ingress2_Base", 16, 16 }, + { "Ingress1_Base", 0, 16 }, + { "SGE_QUEUE_BASE_MAP_LOW", 0x14b4, 0 }, + { "Ingress2_Base", 16, 16 }, + { "Ingress1_Base", 0, 16 }, + { "SGE_QUEUE_BASE_MAP_LOW", 0x14bc, 0 }, + { "Ingress2_Base", 16, 16 }, + { "Ingress1_Base", 0, 16 }, + { "SGE_QUEUE_BASE_MAP_LOW", 0x14c4, 0 }, + { "Ingress2_Base", 16, 16 }, + { "Ingress1_Base", 0, 16 }, + { "SGE_QUEUE_BASE_MAP_LOW", 0x14cc, 0 }, + { "Ingress2_Base", 16, 16 }, + { "Ingress1_Base", 0, 16 }, + { "SGE_QUEUE_BASE_MAP_LOW", 0x14d4, 0 }, + { "Ingress2_Base", 16, 16 }, + { "Ingress1_Base", 0, 16 }, + { "SGE_QUEUE_BASE_MAP_LOW", 0x14dc, 0 }, + { "Ingress2_Base", 16, 16 }, + { "Ingress1_Base", 0, 16 }, + { "SGE_QUEUE_BASE_MAP_LOW", 0x14e4, 0 }, + { "Ingress2_Base", 16, 16 }, + { "Ingress1_Base", 0, 16 }, + { "SGE_QUEUE_BASE_MAP_LOW", 0x14ec, 0 }, + { "Ingress2_Base", 16, 16 }, + { "Ingress1_Base", 0, 16 }, + { "SGE_QUEUE_BASE_MAP_LOW", 0x14f4, 0 }, + { "Ingress2_Base", 16, 16 }, + { "Ingress1_Base", 0, 16 }, + { "SGE_QUEUE_BASE_MAP_LOW", 0x14fc, 0 }, + { "Ingress2_Base", 16, 16 }, + { "Ingress1_Base", 0, 16 }, + { "SGE_QUEUE_BASE_MAP_LOW", 0x1504, 0 }, + { "Ingress2_Base", 16, 16 }, + { "Ingress1_Base", 0, 16 }, + { "SGE_QUEUE_BASE_MAP_LOW", 0x150c, 0 }, + { "Ingress2_Base", 16, 16 }, + { "Ingress1_Base", 0, 16 }, + { "SGE_QUEUE_BASE_MAP_LOW", 0x1514, 0 }, + { "Ingress2_Base", 16, 16 }, + { "Ingress1_Base", 0, 16 }, + { "SGE_QUEUE_BASE_MAP_LOW", 0x151c, 0 }, + { "Ingress2_Base", 16, 16 }, + { "Ingress1_Base", 0, 16 }, + { "SGE_QUEUE_BASE_MAP_LOW", 0x1524, 0 }, + { "Ingress2_Base", 16, 16 }, + { "Ingress1_Base", 0, 16 }, + { "SGE_QUEUE_BASE_MAP_LOW", 0x152c, 0 }, + { "Ingress2_Base", 16, 16 }, + { "Ingress1_Base", 0, 16 }, + { "SGE_QUEUE_BASE_MAP_LOW", 0x1534, 0 }, + { "Ingress2_Base", 16, 16 }, + { "Ingress1_Base", 0, 16 }, + { "SGE_QUEUE_BASE_MAP_LOW", 0x153c, 0 }, + { "Ingress2_Base", 16, 16 }, + { "Ingress1_Base", 0, 16 }, + { "SGE_QUEUE_BASE_MAP_LOW", 0x1544, 0 }, + { "Ingress2_Base", 16, 16 }, + { "Ingress1_Base", 0, 16 }, + { "SGE_QUEUE_BASE_MAP_LOW", 0x154c, 0 }, + { "Ingress2_Base", 16, 16 }, + { "Ingress1_Base", 0, 16 }, + { "SGE_QUEUE_BASE_MAP_LOW", 0x1554, 0 }, + { "Ingress2_Base", 16, 16 }, + { "Ingress1_Base", 0, 16 }, + { "SGE_QUEUE_BASE_MAP_LOW", 0x155c, 0 }, + { "Ingress2_Base", 16, 16 }, + { "Ingress1_Base", 0, 16 }, + { "SGE_QUEUE_BASE_MAP_LOW", 0x1564, 0 }, + { "Ingress2_Base", 16, 16 }, + { "Ingress1_Base", 0, 16 }, + { "SGE_QUEUE_BASE_MAP_LOW", 0x156c, 0 }, + { "Ingress2_Base", 16, 16 }, + { "Ingress1_Base", 0, 16 }, + { "SGE_QUEUE_BASE_MAP_LOW", 0x1574, 0 }, + { "Ingress2_Base", 16, 16 }, + { "Ingress1_Base", 0, 16 }, + { "SGE_QUEUE_BASE_MAP_LOW", 0x157c, 0 }, + { "Ingress2_Base", 16, 16 }, + { "Ingress1_Base", 0, 16 }, + { "SGE_QUEUE_BASE_MAP_LOW", 0x1584, 0 }, + { "Ingress2_Base", 16, 16 }, + { "Ingress1_Base", 0, 16 }, + { "SGE_QUEUE_BASE_MAP_LOW", 0x158c, 0 }, + { "Ingress2_Base", 16, 16 }, + { "Ingress1_Base", 0, 16 }, + { "SGE_QUEUE_BASE_MAP_LOW", 0x1594, 0 }, + { "Ingress2_Base", 16, 16 }, + { "Ingress1_Base", 0, 16 }, + { "SGE_QUEUE_BASE_MAP_LOW", 0x159c, 0 }, + { "Ingress2_Base", 16, 16 }, + { "Ingress1_Base", 0, 16 }, + { "SGE_QUEUE_BASE_MAP_LOW", 0x15a4, 0 }, + { "Ingress2_Base", 16, 16 }, + { "Ingress1_Base", 0, 16 }, + { "SGE_QUEUE_BASE_MAP_LOW", 0x15ac, 0 }, + { "Ingress2_Base", 16, 16 }, + { "Ingress1_Base", 0, 16 }, + { "SGE_QUEUE_BASE_MAP_LOW", 0x15b4, 0 }, + { "Ingress2_Base", 16, 16 }, + { "Ingress1_Base", 0, 16 }, + { "SGE_QUEUE_BASE_MAP_LOW", 0x15bc, 0 }, + { "Ingress2_Base", 16, 16 }, + { "Ingress1_Base", 0, 16 }, + { "SGE_QUEUE_BASE_MAP_LOW", 0x15c4, 0 }, + { "Ingress2_Base", 16, 16 }, + { "Ingress1_Base", 0, 16 }, + { "SGE_QUEUE_BASE_MAP_LOW", 0x15cc, 0 }, + { "Ingress2_Base", 16, 16 }, + { "Ingress1_Base", 0, 16 }, + { "SGE_QUEUE_BASE_MAP_LOW", 0x15d4, 0 }, + { "Ingress2_Base", 16, 16 }, + { "Ingress1_Base", 0, 16 }, + { "SGE_QUEUE_BASE_MAP_LOW", 0x15dc, 0 }, + { "Ingress2_Base", 16, 16 }, + { "Ingress1_Base", 0, 16 }, + { "SGE_QUEUE_BASE_MAP_LOW", 0x15e4, 0 }, + { "Ingress2_Base", 16, 16 }, + { "Ingress1_Base", 0, 16 }, + { "SGE_QUEUE_BASE_MAP_LOW", 0x15ec, 0 }, + { "Ingress2_Base", 16, 16 }, + { "Ingress1_Base", 0, 16 }, + { "SGE_QUEUE_BASE_MAP_LOW", 0x15f4, 0 }, + { "Ingress2_Base", 16, 16 }, + { "Ingress1_Base", 0, 16 }, + { "SGE_QUEUE_BASE_MAP_LOW", 0x15fc, 0 }, + { "Ingress2_Base", 16, 16 }, + { "Ingress1_Base", 0, 16 }, + { "SGE_QUEUE_BASE_MAP_LOW", 0x1604, 0 }, + { "Ingress2_Base", 16, 16 }, + { "Ingress1_Base", 0, 16 }, + { "SGE_QUEUE_BASE_MAP_LOW", 0x160c, 0 }, + { "Ingress2_Base", 16, 16 }, + { "Ingress1_Base", 0, 16 }, + { "SGE_QUEUE_BASE_MAP_LOW", 0x1614, 0 }, + { "Ingress2_Base", 16, 16 }, + { "Ingress1_Base", 0, 16 }, + { "SGE_QUEUE_BASE_MAP_LOW", 0x161c, 0 }, + { "Ingress2_Base", 16, 16 }, + { "Ingress1_Base", 0, 16 }, + { "SGE_QUEUE_BASE_MAP_LOW", 0x1624, 0 }, + { "Ingress2_Base", 16, 16 }, + { "Ingress1_Base", 0, 16 }, + { "SGE_QUEUE_BASE_MAP_LOW", 0x162c, 0 }, + { "Ingress2_Base", 16, 16 }, + { "Ingress1_Base", 0, 16 }, + { "SGE_QUEUE_BASE_MAP_LOW", 0x1634, 0 }, + { "Ingress2_Base", 16, 16 }, + { "Ingress1_Base", 0, 16 }, + { "SGE_QUEUE_BASE_MAP_LOW", 0x163c, 0 }, + { "Ingress2_Base", 16, 16 }, + { "Ingress1_Base", 0, 16 }, + { "SGE_QUEUE_BASE_MAP_LOW", 0x1644, 0 }, + { "Ingress2_Base", 16, 16 }, + { "Ingress1_Base", 0, 16 }, + { "SGE_QUEUE_BASE_MAP_LOW", 0x164c, 0 }, + { "Ingress2_Base", 16, 16 }, + { "Ingress1_Base", 0, 16 }, + { "SGE_QUEUE_BASE_MAP_LOW", 0x1654, 0 }, + { "Ingress2_Base", 16, 16 }, + { "Ingress1_Base", 0, 16 }, + { "SGE_QUEUE_BASE_MAP_LOW", 0x165c, 0 }, + { "Ingress2_Base", 16, 16 }, + { "Ingress1_Base", 0, 16 }, + { "SGE_QUEUE_BASE_MAP_LOW", 0x1664, 0 }, + { "Ingress2_Base", 16, 16 }, + { "Ingress1_Base", 0, 16 }, + { "SGE_QUEUE_BASE_MAP_LOW", 0x166c, 0 }, + { "Ingress2_Base", 16, 16 }, + { "Ingress1_Base", 0, 16 }, + { "SGE_QUEUE_BASE_MAP_LOW", 0x1674, 0 }, + { "Ingress2_Base", 16, 16 }, + { "Ingress1_Base", 0, 16 }, + { "SGE_QUEUE_BASE_MAP_LOW", 0x167c, 0 }, + { "Ingress2_Base", 16, 16 }, + { "Ingress1_Base", 0, 16 }, + { "SGE_QUEUE_BASE_MAP_LOW", 0x1684, 0 }, + { "Ingress2_Base", 16, 16 }, + { "Ingress1_Base", 0, 16 }, + { "SGE_QUEUE_BASE_MAP_LOW", 0x168c, 0 }, + { "Ingress2_Base", 16, 16 }, + { "Ingress1_Base", 0, 16 }, + { "SGE_QUEUE_BASE_MAP_LOW", 0x1694, 0 }, + { "Ingress2_Base", 16, 16 }, + { "Ingress1_Base", 0, 16 }, + { "SGE_QUEUE_BASE_MAP_LOW", 0x169c, 0 }, + { "Ingress2_Base", 16, 16 }, + { "Ingress1_Base", 0, 16 }, + { "SGE_QUEUE_BASE_MAP_LOW", 0x16a4, 0 }, + { "Ingress2_Base", 16, 16 }, + { "Ingress1_Base", 0, 16 }, + { "SGE_QUEUE_BASE_MAP_LOW", 0x16ac, 0 }, + { "Ingress2_Base", 16, 16 }, + { "Ingress1_Base", 0, 16 }, + { "SGE_QUEUE_BASE_MAP_LOW", 0x16b4, 0 }, + { "Ingress2_Base", 16, 16 }, + { "Ingress1_Base", 0, 16 }, + { "SGE_QUEUE_BASE_MAP_LOW", 0x16bc, 0 }, + { "Ingress2_Base", 16, 16 }, + { "Ingress1_Base", 0, 16 }, + { "SGE_QUEUE_BASE_MAP_LOW", 0x16c4, 0 }, + { "Ingress2_Base", 16, 16 }, + { "Ingress1_Base", 0, 16 }, + { "SGE_QUEUE_BASE_MAP_LOW", 0x16cc, 0 }, + { "Ingress2_Base", 16, 16 }, + { "Ingress1_Base", 0, 16 }, + { "SGE_QUEUE_BASE_MAP_LOW", 0x16d4, 0 }, + { "Ingress2_Base", 16, 16 }, + { "Ingress1_Base", 0, 16 }, + { "SGE_QUEUE_BASE_MAP_LOW", 0x16dc, 0 }, + { "Ingress2_Base", 16, 16 }, + { "Ingress1_Base", 0, 16 }, + { "SGE_QUEUE_BASE_MAP_LOW", 0x16e4, 0 }, + { "Ingress2_Base", 16, 16 }, + { "Ingress1_Base", 0, 16 }, + { "SGE_QUEUE_BASE_MAP_LOW", 0x16ec, 0 }, + { "Ingress2_Base", 16, 16 }, + { "Ingress1_Base", 0, 16 }, + { "SGE_QUEUE_BASE_MAP_LOW", 0x16f4, 0 }, + { "Ingress2_Base", 16, 16 }, + { "Ingress1_Base", 0, 16 }, + { "SGE_QUEUE_BASE_MAP_LOW", 0x16fc, 0 }, + { "Ingress2_Base", 16, 16 }, + { "Ingress1_Base", 0, 16 }, + { "SGE_QUEUE_BASE_MAP_LOW", 0x1704, 0 }, + { "Ingress2_Base", 16, 16 }, + { "Ingress1_Base", 0, 16 }, + { "SGE_QUEUE_BASE_MAP_LOW", 0x170c, 0 }, + { "Ingress2_Base", 16, 16 }, + { "Ingress1_Base", 0, 16 }, + { "SGE_QUEUE_BASE_MAP_LOW", 0x1714, 0 }, + { "Ingress2_Base", 16, 16 }, + { "Ingress1_Base", 0, 16 }, + { "SGE_QUEUE_BASE_MAP_LOW", 0x171c, 0 }, + { "Ingress2_Base", 16, 16 }, + { "Ingress1_Base", 0, 16 }, + { "SGE_QUEUE_BASE_MAP_LOW", 0x1724, 0 }, + { "Ingress2_Base", 16, 16 }, + { "Ingress1_Base", 0, 16 }, + { "SGE_QUEUE_BASE_MAP_LOW", 0x172c, 0 }, + { "Ingress2_Base", 16, 16 }, + { "Ingress1_Base", 0, 16 }, + { "SGE_QUEUE_BASE_MAP_LOW", 0x1734, 0 }, + { "Ingress2_Base", 16, 16 }, + { "Ingress1_Base", 0, 16 }, + { "SGE_QUEUE_BASE_MAP_LOW", 0x173c, 0 }, + { "Ingress2_Base", 16, 16 }, + { "Ingress1_Base", 0, 16 }, + { "SGE_LA_RDPTR_0", 0x1800, 0 }, + { "SGE_LA_RDDATA_0", 0x1804, 0 }, + { "SGE_LA_WRPTR_0", 0x1808, 0 }, + { "SGE_LA_RESERVED_0", 0x180c, 0 }, + { "SGE_LA_RDPTR_1", 0x1810, 0 }, + { "SGE_LA_RDDATA_1", 0x1814, 0 }, + { "SGE_LA_WRPTR_1", 0x1818, 0 }, + { "SGE_LA_RESERVED_1", 0x181c, 0 }, + { "SGE_LA_RDPTR_2", 0x1820, 0 }, + { "SGE_LA_RDDATA_2", 0x1824, 0 }, + { "SGE_LA_WRPTR_2", 0x1828, 0 }, + { "SGE_LA_RESERVED_2", 0x182c, 0 }, + { "SGE_LA_RDPTR_3", 0x1830, 0 }, + { "SGE_LA_RDDATA_3", 0x1834, 0 }, + { "SGE_LA_WRPTR_3", 0x1838, 0 }, + { "SGE_LA_RESERVED_3", 0x183c, 0 }, + { "SGE_LA_RDPTR_4", 0x1840, 0 }, + { "SGE_LA_RDDATA_4", 0x1844, 0 }, + { "SGE_LA_WRPTR_4", 0x1848, 0 }, + { "SGE_LA_RESERVED_4", 0x184c, 0 }, + { "SGE_LA_RDPTR_5", 0x1850, 0 }, + { "SGE_LA_RDDATA_5", 0x1854, 0 }, + { "SGE_LA_WRPTR_5", 0x1858, 0 }, + { "SGE_LA_RESERVED_5", 0x185c, 0 }, + { "SGE_LA_RDPTR_6", 0x1860, 0 }, + { "SGE_LA_RDDATA_6", 0x1864, 0 }, + { "SGE_LA_WRPTR_6", 0x1868, 0 }, + { "SGE_LA_RESERVED_6", 0x186c, 0 }, + { "SGE_LA_RDPTR_7", 0x1870, 0 }, + { "SGE_LA_RDDATA_7", 0x1874, 0 }, + { "SGE_LA_WRPTR_7", 0x1878, 0 }, + { "SGE_LA_RESERVED_7", 0x187c, 0 }, + { "SGE_LA_RDPTR_8", 0x1880, 0 }, + { "SGE_LA_RDDATA_8", 0x1884, 0 }, + { "SGE_LA_WRPTR_8", 0x1888, 0 }, + { "SGE_LA_RESERVED_8", 0x188c, 0 }, + { "SGE_LA_RDPTR_9", 0x1890, 0 }, + { "SGE_LA_RDDATA_9", 0x1894, 0 }, + { "SGE_LA_WRPTR_9", 0x1898, 0 }, + { "SGE_LA_RESERVED_9", 0x189c, 0 }, + { "SGE_LA_RDPTR_10", 0x18a0, 0 }, + { "SGE_LA_RDDATA_10", 0x18a4, 0 }, + { "SGE_LA_WRPTR_10", 0x18a8, 0 }, + { "SGE_LA_RESERVED_10", 0x18ac, 0 }, + { "SGE_LA_RDPTR_11", 0x18b0, 0 }, + { "SGE_LA_RDDATA_11", 0x18b4, 0 }, + { "SGE_LA_WRPTR_11", 0x18b8, 0 }, + { "SGE_LA_RESERVED_11", 0x18bc, 0 }, + { "SGE_LA_RDPTR_12", 0x18c0, 0 }, + { "SGE_LA_RDDATA_12", 0x18c4, 0 }, + { "SGE_LA_WRPTR_12", 0x18c8, 0 }, + { "SGE_LA_RESERVED_12", 0x18cc, 0 }, + { "SGE_LA_RDPTR_13", 0x18d0, 0 }, + { "SGE_LA_RDDATA_13", 0x18d4, 0 }, + { "SGE_LA_WRPTR_13", 0x18d8, 0 }, + { "SGE_LA_RESERVED_13", 0x18dc, 0 }, + { "SGE_LA_RDPTR_14", 0x18e0, 0 }, + { "SGE_LA_RDDATA_14", 0x18e4, 0 }, + { "SGE_LA_WRPTR_14", 0x18e8, 0 }, + { "SGE_LA_RESERVED_14", 0x18ec, 0 }, + { "SGE_LA_RDPTR_15", 0x18f0, 0 }, + { "SGE_LA_RDDATA_15", 0x18f4, 0 }, + { "SGE_LA_WRPTR_15", 0x18f8, 0 }, + { "SGE_LA_RESERVED_15", 0x18fc, 0 }, + { NULL, 0, 0 } +}; + +struct reg_info t4_pcie_regs[] = { + { "PCIE_INT_ENABLE", 0x3000, 0 }, + { "NonFatalErr", 30, 1 }, + { "UnxSplCplErr", 29, 1 }, + { "PCIEPINT", 28, 1 }, + { "PCIESINT", 27, 1 }, + { "RPLPerr", 26, 1 }, + { "RxWrPerr", 25, 1 }, + { "RxCplPerr", 24, 1 }, + { "PIOTagPerr", 23, 1 }, + { "MATagPerr", 22, 1 }, + { "INTXClrPerr", 21, 1 }, + { "FIDPerr", 20, 1 }, + { "CfgSnpPerr", 19, 1 }, + { "HRspPerr", 18, 1 }, + { "HReqPerr", 17, 1 }, + { "HCntPerr", 16, 1 }, + { "DRspPerr", 15, 1 }, + { "DReqPerr", 14, 1 }, + { "DCntPerr", 13, 1 }, + { "CRspPerr", 12, 1 }, + { "CReqPerr", 11, 1 }, + { "CCntPerr", 10, 1 }, + { "TARTagPerr", 9, 1 }, + { "PIOReqPerr", 8, 1 }, + { "PIOCplPerr", 7, 1 }, + { "MSIXDIPerr", 6, 1 }, + { "MSIXDataPerr", 5, 1 }, + { "MSIXAddrHPerr", 4, 1 }, + { "MSIXAddrLPerr", 3, 1 }, + { "MSIDataPerr", 2, 1 }, + { "MSIAddrHPerr", 1, 1 }, + { "MSIAddrLPerr", 0, 1 }, + { "PCIE_INT_CAUSE", 0x3004, 0 }, + { "NonFatalErr", 30, 1 }, + { "UnxSplCplErr", 29, 1 }, + { "PCIEPINT", 28, 1 }, + { "PCIESINT", 27, 1 }, + { "RPLPerr", 26, 1 }, + { "RxWrPerr", 25, 1 }, + { "RxCplPerr", 24, 1 }, + { "PIOTagPerr", 23, 1 }, + { "MATagPerr", 22, 1 }, + { "INTXClrPerr", 21, 1 }, + { "FIDPerr", 20, 1 }, + { "CfgSnpPerr", 19, 1 }, + { "HRspPerr", 18, 1 }, + { "HReqPerr", 17, 1 }, + { "HCntPerr", 16, 1 }, + { "DRspPerr", 15, 1 }, + { "DReqPerr", 14, 1 }, + { "DCntPerr", 13, 1 }, + { "CRspPerr", 12, 1 }, + { "CReqPerr", 11, 1 }, + { "CCntPerr", 10, 1 }, + { "TARTagPerr", 9, 1 }, + { "PIOReqPerr", 8, 1 }, + { "PIOCplPerr", 7, 1 }, + { "MSIXDIPerr", 6, 1 }, + { "MSIXDataPerr", 5, 1 }, + { "MSIXAddrHPerr", 4, 1 }, + { "MSIXAddrLPerr", 3, 1 }, + { "MSIDataPerr", 2, 1 }, + { "MSIAddrHPerr", 1, 1 }, + { "MSIAddrLPerr", 0, 1 }, + { "PCIE_PERR_ENABLE", 0x3008, 0 }, + { "RPLPerr", 26, 1 }, + { "RxWrPerr", 25, 1 }, + { "RxCplPerr", 24, 1 }, + { "PIOTagPerr", 23, 1 }, + { "MATagPerr", 22, 1 }, + { "INTXClrPerr", 21, 1 }, + { "FIDPerr", 20, 1 }, + { "CfgSnpPerr", 19, 1 }, + { "HRspPerr", 18, 1 }, + { "HReqPerr", 17, 1 }, + { "HCntPerr", 16, 1 }, + { "DRspPerr", 15, 1 }, + { "DReqPerr", 14, 1 }, + { "DCntPerr", 13, 1 }, + { "CRspPerr", 12, 1 }, + { "CReqPerr", 11, 1 }, + { "CCntPerr", 10, 1 }, + { "TARTagPerr", 9, 1 }, + { "PIOReqPerr", 8, 1 }, + { "PIOCplPerr", 7, 1 }, + { "MSIXDIPerr", 6, 1 }, + { "MSIXDataPerr", 5, 1 }, + { "MSIXAddrHPerr", 4, 1 }, + { "MSIXAddrLPerr", 3, 1 }, + { "MSIDataPerr", 2, 1 }, + { "MSIAddrHPerr", 1, 1 }, + { "MSIAddrLPerr", 0, 1 }, + { "PCIE_PERR_INJECT", 0x300c, 0 }, + { "MemSel", 1, 5 }, + { "IDE", 0, 1 }, + { "PCIE_NONFAT_ERR", 0x3010, 0 }, + { "RdRspErr", 9, 1 }, + { "VPDRspErr", 8, 1 }, + { "PopD", 7, 1 }, + { "PopH", 6, 1 }, + { "PopC", 5, 1 }, + { "MemReq", 4, 1 }, + { "PIOReq", 3, 1 }, + { "TagDrop", 2, 1 }, + { "TagCpl", 1, 1 }, + { "CfgSnp", 0, 1 }, + { "PCIE_CFG", 0x3014, 0 }, + { "CfgdMaxPyldSzRx", 26, 3 }, + { "CfgdMaxPyldSzTx", 23, 3 }, + { "CfgdMaxRdReqSz", 20, 3 }, + { "MASyncEn", 19, 1 }, + { "DCAEnDMA", 18, 1 }, + { "DCAEnCMD", 17, 1 }, + { "VFMSIPndEn", 16, 1 }, + { "ForceTxError", 15, 1 }, + { "VPDReqProtect", 14, 1 }, + { "FIDTableInvalid", 13, 1 }, + { "BypassMSIXCache", 12, 1 }, + { "BypassMSICache", 11, 1 }, + { "SimSpeed", 10, 1 }, + { "TC0_Stamp", 9, 1 }, + { "AI_TCVal", 6, 3 }, + { "DMAStopEn", 5, 1 }, + { "DevStateRstMode", 4, 1 }, + { "HotRstPCIeCRstMode", 3, 1 }, + { "DLDnPCIeCRstMode", 2, 1 }, + { "DLDnPCIePreCRstMode", 1, 1 }, + { "LinkDnRstEn", 0, 1 }, + { "PCIE_DMA_CTRL", 0x3018, 0 }, + { "LittleEndian", 7, 1 }, + { "PCIE_DMA_CFG", 0x301c, 0 }, + { "MaxPyldSize", 28, 3 }, + { "MaxRdReqSize", 25, 3 }, + { "MaxRspCnt", 16, 9 }, + { "MaxReqCnt", 8, 8 }, + { "MaxTag", 0, 7 }, + { "PCIE_DMA_STAT", 0x3020, 0 }, + { "StateReq", 28, 4 }, + { "RspCnt", 16, 12 }, + { "StateAReq", 13, 3 }, + { "TagFree", 12, 1 }, + { "ReqCnt", 0, 11 }, + { "PCIE_DMA_CFG", 0x3024, 0 }, + { "MaxPyldSize", 28, 3 }, + { "MaxRdReqSize", 25, 3 }, + { "MaxRspCnt", 16, 9 }, + { "MaxReqCnt", 8, 8 }, + { "MaxTag", 0, 7 }, + { "PCIE_DMA_STAT", 0x3028, 0 }, + { "StateReq", 28, 4 }, + { "RspCnt", 16, 12 }, + { "StateAReq", 13, 3 }, + { "TagFree", 12, 1 }, + { "ReqCnt", 0, 11 }, + { "PCIE_DMA_CFG", 0x302c, 0 }, + { "MaxPyldSize", 28, 3 }, + { "MaxRdReqSize", 25, 3 }, + { "MaxRspCnt", 16, 9 }, + { "MaxReqCnt", 8, 8 }, + { "MaxTag", 0, 7 }, + { "PCIE_DMA_STAT", 0x3030, 0 }, + { "StateReq", 28, 4 }, + { "RspCnt", 16, 12 }, + { "StateAReq", 13, 3 }, + { "TagFree", 12, 1 }, + { "ReqCnt", 0, 11 }, + { "PCIE_DMA_CFG", 0x3034, 0 }, + { "MaxPyldSize", 28, 3 }, + { "MaxRdReqSize", 25, 3 }, + { "MaxRspCnt", 16, 9 }, + { "MaxReqCnt", 8, 8 }, + { "MaxTag", 0, 7 }, + { "PCIE_DMA_STAT", 0x3038, 0 }, + { "StateReq", 28, 4 }, + { "RspCnt", 16, 12 }, + { "StateAReq", 13, 3 }, + { "TagFree", 12, 1 }, + { "ReqCnt", 0, 11 }, + { "PCIE_CMD_CTRL", 0x303c, 0 }, + { "LittleEndian", 7, 1 }, + { "PCIE_CMD_CFG", 0x3040, 0 }, + { "MaxPyldSize", 28, 3 }, + { "MaxRdReqSize", 25, 3 }, + { "MaxRspCnt", 16, 4 }, + { "MaxReqCnt", 8, 5 }, + { "MaxTag", 0, 7 }, + { "PCIE_CMD_STAT", 0x3044, 0 }, + { "StateReq", 28, 4 }, + { "RspCnt", 16, 7 }, + { "StateAReq", 13, 3 }, + { "TagFree", 12, 1 }, + { "ReqCnt", 0, 8 }, + { "PCIE_CMD_CFG", 0x3048, 0 }, + { "MaxPyldSize", 28, 3 }, + { "MaxRdReqSize", 25, 3 }, + { "MaxRspCnt", 16, 4 }, + { "MaxReqCnt", 8, 5 }, + { "MaxTag", 0, 7 }, + { "PCIE_CMD_STAT", 0x304c, 0 }, + { "StateReq", 28, 4 }, + { "RspCnt", 16, 7 }, + { "StateAReq", 13, 3 }, + { "TagFree", 12, 1 }, + { "ReqCnt", 0, 8 }, + { "PCIE_HMA_CTRL", 0x3050, 0 }, + { "IPLTSSM", 12, 4 }, + { "IPConfigDown", 8, 3 }, + { "LittleEndian", 7, 1 }, + { "PCIE_HMA_CFG", 0x3054, 0 }, + { "MaxPyldSize", 28, 3 }, + { "MaxRdReqSize", 25, 3 }, + { "MaxRspCnt", 16, 5 }, + { "MaxReqCnt", 8, 5 }, + { "MaxTag", 0, 7 }, + { "PCIE_HMA_STAT", 0x3058, 0 }, + { "StateReq", 28, 4 }, + { "RspCnt", 16, 8 }, + { "StateAReq", 13, 3 }, + { "TagFree", 12, 1 }, + { "ReqCnt", 0, 8 }, + { "PCIE_PIO_FIFO_CFG", 0x305c, 0 }, + { "CplConfig", 16, 16 }, + { "PIOStopEn", 12, 1 }, + { "IPLaneSwap", 11, 1 }, + { "ForceStrictTS1", 10, 1 }, + { "ForceProgressCnt", 0, 10 }, + { "PCIE_CFG_SPACE_REQ", 0x3060, 0 }, + { "Enable", 30, 1 }, + { "AI", 29, 1 }, + { "LocalCfg", 28, 1 }, + { "Bus", 20, 8 }, + { "Device", 15, 5 }, + { "Function", 12, 3 }, + { "ExtRegister", 8, 4 }, + { "Register", 0, 8 }, + { "PCIE_CFG_SPACE_DATA", 0x3064, 0 }, + { "PCIE_MEM_ACCESS_BASE_WIN", 0x3068, 0 }, + { "PCIEOfst", 10, 22 }, + { "BIR", 8, 2 }, + { "Window", 0, 8 }, + { "PCIE_MEM_ACCESS_OFFSET", 0x306c, 0 }, + { "PCIE_MEM_ACCESS_BASE_WIN", 0x3070, 0 }, + { "PCIEOfst", 10, 22 }, + { "BIR", 8, 2 }, + { "Window", 0, 8 }, + { "PCIE_MEM_ACCESS_OFFSET", 0x3074, 0 }, + { "PCIE_MEM_ACCESS_BASE_WIN", 0x3078, 0 }, + { "PCIEOfst", 10, 22 }, + { "BIR", 8, 2 }, + { "Window", 0, 8 }, + { "PCIE_MEM_ACCESS_OFFSET", 0x307c, 0 }, + { "PCIE_MEM_ACCESS_BASE_WIN", 0x3080, 0 }, + { "PCIEOfst", 10, 22 }, + { "BIR", 8, 2 }, + { "Window", 0, 8 }, + { "PCIE_MEM_ACCESS_OFFSET", 0x3084, 0 }, + { "PCIE_MEM_ACCESS_BASE_WIN", 0x3088, 0 }, + { "PCIEOfst", 10, 22 }, + { "BIR", 8, 2 }, + { "Window", 0, 8 }, + { "PCIE_MEM_ACCESS_OFFSET", 0x308c, 0 }, + { "PCIE_MEM_ACCESS_BASE_WIN", 0x3090, 0 }, + { "PCIEOfst", 10, 22 }, + { "BIR", 8, 2 }, + { "Window", 0, 8 }, + { "PCIE_MEM_ACCESS_OFFSET", 0x3094, 0 }, + { "PCIE_MEM_ACCESS_BASE_WIN", 0x3098, 0 }, + { "PCIEOfst", 10, 22 }, + { "BIR", 8, 2 }, + { "Window", 0, 8 }, + { "PCIE_MEM_ACCESS_OFFSET", 0x309c, 0 }, + { "PCIE_MEM_ACCESS_BASE_WIN", 0x30a0, 0 }, + { "PCIEOfst", 10, 22 }, + { "BIR", 8, 2 }, + { "Window", 0, 8 }, + { "PCIE_MEM_ACCESS_OFFSET", 0x30a4, 0 }, + { "PCIE_MAILBOX_BASE_WIN", 0x30a8, 0 }, + { "PCIEOfst", 6, 26 }, + { "BIR", 4, 2 }, + { "Window", 0, 2 }, + { "PCIE_MAILBOX_OFFSET", 0x30ac, 0 }, + { "PCIE_MA_CTRL", 0x30b0, 0 }, + { "TagFree", 29, 1 }, + { "MaxRspCnt", 24, 5 }, + { "MaxReqCnt", 16, 5 }, + { "LittleEndian", 15, 1 }, + { "MaxPyldSize", 12, 3 }, + { "MaxRdReqSize", 8, 3 }, + { "MaxTag", 0, 5 }, + { "PCIE_MA_SYNC", 0x30b4, 0 }, + { "PCIE_FW", 0x30b8, 0 }, + { "PCIE_FW_PF", 0x30bc, 0 }, + { "PCIE_FW_PF", 0x30c0, 0 }, + { "PCIE_FW_PF", 0x30c4, 0 }, + { "PCIE_FW_PF", 0x30c8, 0 }, + { "PCIE_FW_PF", 0x30cc, 0 }, + { "PCIE_FW_PF", 0x30d0, 0 }, + { "PCIE_FW_PF", 0x30d4, 0 }, + { "PCIE_FW_PF", 0x30d8, 0 }, + { "PCIE_PIO_PAUSE", 0x30dc, 0 }, + { "PIOPauseDone", 31, 1 }, + { "PauseTime", 4, 24 }, + { "PIOPause", 0, 1 }, + { "PCIE_SYS_CFG_READY", 0x30e0, 0 }, + { "PCIE_STATIC_CFG1", 0x30e4, 0 }, + { "LINKDOWN_RESET_EN", 26, 1 }, + { "IN_WR_DISCONTIG", 25, 1 }, + { "IN_RD_CPLSIZE", 22, 3 }, + { "IN_RD_BUFMODE", 20, 2 }, + { "GBIF_NPTRANS_TOT", 18, 2 }, + { "IN_PDAT_TOT", 15, 3 }, + { "PCIE_NPTRANS_TOT", 12, 3 }, + { "OUT_PDAT_TOT", 9, 3 }, + { "GBIF_MAX_WRSIZE", 6, 3 }, + { "GBIF_MAX_RDSIZE", 3, 3 }, + { "PCIE_MAX_RDSIZE", 0, 3 }, + { "PCIE_DBG_INDIR_REQ", 0x30ec, 0 }, + { "Enable", 31, 1 }, + { "AI", 30, 1 }, + { "Pointer", 8, 16 }, + { "Select", 0, 4 }, + { "PCIE_DBG_INDIR_DATA_0", 0x30f0, 0 }, + { "PCIE_DBG_INDIR_DATA_1", 0x30f4, 0 }, + { "PCIE_DBG_INDIR_DATA_2", 0x30f8, 0 }, + { "PCIE_DBG_INDIR_DATA_3", 0x30fc, 0 }, + { "PCIE_FUNC_INT_CFG", 0x3100, 0 }, + { "PBAOfst", 28, 4 }, + { "TABOfst", 24, 4 }, + { "VecNum", 12, 10 }, + { "VecBase", 0, 11 }, + { "PCIE_FUNC_CTL_STAT", 0x3104, 0 }, + { "SendFLRRsp", 31, 1 }, + { "ImmFLRRsp", 24, 1 }, + { "TxnDisable", 20, 1 }, + { "PndTxns", 8, 10 }, + { "VFVld", 3, 1 }, + { "PFNum", 0, 3 }, + { "PCIE_FUNC_INT_CFG", 0x3108, 0 }, + { "PBAOfst", 28, 4 }, + { "TABOfst", 24, 4 }, + { "VecNum", 12, 10 }, + { "VecBase", 0, 11 }, + { "PCIE_FUNC_CTL_STAT", 0x310c, 0 }, + { "SendFLRRsp", 31, 1 }, + { "ImmFLRRsp", 24, 1 }, + { "TxnDisable", 20, 1 }, + { "PndTxns", 8, 10 }, + { "VFVld", 3, 1 }, + { "PFNum", 0, 3 }, + { "PCIE_FUNC_INT_CFG", 0x3110, 0 }, + { "PBAOfst", 28, 4 }, + { "TABOfst", 24, 4 }, + { "VecNum", 12, 10 }, + { "VecBase", 0, 11 }, + { "PCIE_FUNC_CTL_STAT", 0x3114, 0 }, + { "SendFLRRsp", 31, 1 }, + { "ImmFLRRsp", 24, 1 }, + { "TxnDisable", 20, 1 }, + { "PndTxns", 8, 10 }, + { "VFVld", 3, 1 }, + { "PFNum", 0, 3 }, + { "PCIE_FUNC_INT_CFG", 0x3118, 0 }, + { "PBAOfst", 28, 4 }, + { "TABOfst", 24, 4 }, + { "VecNum", 12, 10 }, + { "VecBase", 0, 11 }, + { "PCIE_FUNC_CTL_STAT", 0x311c, 0 }, + { "SendFLRRsp", 31, 1 }, + { "ImmFLRRsp", 24, 1 }, + { "TxnDisable", 20, 1 }, + { "PndTxns", 8, 10 }, + { "VFVld", 3, 1 }, + { "PFNum", 0, 3 }, + { "PCIE_FUNC_INT_CFG", 0x3120, 0 }, + { "PBAOfst", 28, 4 }, + { "TABOfst", 24, 4 }, + { "VecNum", 12, 10 }, + { "VecBase", 0, 11 }, + { "PCIE_FUNC_CTL_STAT", 0x3124, 0 }, + { "SendFLRRsp", 31, 1 }, + { "ImmFLRRsp", 24, 1 }, + { "TxnDisable", 20, 1 }, + { "PndTxns", 8, 10 }, + { "VFVld", 3, 1 }, + { "PFNum", 0, 3 }, + { "PCIE_FUNC_INT_CFG", 0x3128, 0 }, + { "PBAOfst", 28, 4 }, + { "TABOfst", 24, 4 }, + { "VecNum", 12, 10 }, + { "VecBase", 0, 11 }, + { "PCIE_FUNC_CTL_STAT", 0x312c, 0 }, + { "SendFLRRsp", 31, 1 }, + { "ImmFLRRsp", 24, 1 }, + { "TxnDisable", 20, 1 }, + { "PndTxns", 8, 10 }, + { "VFVld", 3, 1 }, + { "PFNum", 0, 3 }, + { "PCIE_FUNC_INT_CFG", 0x3130, 0 }, + { "PBAOfst", 28, 4 }, + { "TABOfst", 24, 4 }, + { "VecNum", 12, 10 }, + { "VecBase", 0, 11 }, + { "PCIE_FUNC_CTL_STAT", 0x3134, 0 }, + { "SendFLRRsp", 31, 1 }, + { "ImmFLRRsp", 24, 1 }, + { "TxnDisable", 20, 1 }, + { "PndTxns", 8, 10 }, + { "VFVld", 3, 1 }, + { "PFNum", 0, 3 }, + { "PCIE_FUNC_INT_CFG", 0x3138, 0 }, + { "PBAOfst", 28, 4 }, + { "TABOfst", 24, 4 }, + { "VecNum", 12, 10 }, + { "VecBase", 0, 11 }, + { "PCIE_FUNC_CTL_STAT", 0x313c, 0 }, + { "SendFLRRsp", 31, 1 }, + { "ImmFLRRsp", 24, 1 }, + { "TxnDisable", 20, 1 }, + { "PndTxns", 8, 10 }, + { "VFVld", 3, 1 }, + { "PFNum", 0, 3 }, + { "PCIE_FUNC_INT_CFG", 0x3140, 0 }, + { "PBAOfst", 28, 4 }, + { "TABOfst", 24, 4 }, + { "VecNum", 12, 10 }, + { "VecBase", 0, 11 }, + { "PCIE_FUNC_CTL_STAT", 0x3144, 0 }, + { "SendFLRRsp", 31, 1 }, + { "ImmFLRRsp", 24, 1 }, + { "TxnDisable", 20, 1 }, + { "PndTxns", 8, 10 }, + { "VFVld", 3, 1 }, + { "PFNum", 0, 3 }, + { "PCIE_FUNC_INT_CFG", 0x3148, 0 }, + { "PBAOfst", 28, 4 }, + { "TABOfst", 24, 4 }, + { "VecNum", 12, 10 }, + { "VecBase", 0, 11 }, + { "PCIE_FUNC_CTL_STAT", 0x314c, 0 }, + { "SendFLRRsp", 31, 1 }, + { "ImmFLRRsp", 24, 1 }, + { "TxnDisable", 20, 1 }, + { "PndTxns", 8, 10 }, + { "VFVld", 3, 1 }, + { "PFNum", 0, 3 }, + { "PCIE_FUNC_INT_CFG", 0x3150, 0 }, + { "PBAOfst", 28, 4 }, + { "TABOfst", 24, 4 }, + { "VecNum", 12, 10 }, + { "VecBase", 0, 11 }, + { "PCIE_FUNC_CTL_STAT", 0x3154, 0 }, + { "SendFLRRsp", 31, 1 }, + { "ImmFLRRsp", 24, 1 }, + { "TxnDisable", 20, 1 }, + { "PndTxns", 8, 10 }, + { "VFVld", 3, 1 }, + { "PFNum", 0, 3 }, + { "PCIE_FUNC_INT_CFG", 0x3158, 0 }, + { "PBAOfst", 28, 4 }, + { "TABOfst", 24, 4 }, + { "VecNum", 12, 10 }, + { "VecBase", 0, 11 }, + { "PCIE_FUNC_CTL_STAT", 0x315c, 0 }, + { "SendFLRRsp", 31, 1 }, + { "ImmFLRRsp", 24, 1 }, + { "TxnDisable", 20, 1 }, + { "PndTxns", 8, 10 }, + { "VFVld", 3, 1 }, + { "PFNum", 0, 3 }, + { "PCIE_FUNC_INT_CFG", 0x3160, 0 }, + { "PBAOfst", 28, 4 }, + { "TABOfst", 24, 4 }, + { "VecNum", 12, 10 }, + { "VecBase", 0, 11 }, + { "PCIE_FUNC_CTL_STAT", 0x3164, 0 }, + { "SendFLRRsp", 31, 1 }, + { "ImmFLRRsp", 24, 1 }, + { "TxnDisable", 20, 1 }, + { "PndTxns", 8, 10 }, + { "VFVld", 3, 1 }, + { "PFNum", 0, 3 }, + { "PCIE_FUNC_INT_CFG", 0x3168, 0 }, + { "PBAOfst", 28, 4 }, + { "TABOfst", 24, 4 }, + { "VecNum", 12, 10 }, + { "VecBase", 0, 11 }, + { "PCIE_FUNC_CTL_STAT", 0x316c, 0 }, + { "SendFLRRsp", 31, 1 }, + { "ImmFLRRsp", 24, 1 }, + { "TxnDisable", 20, 1 }, + { "PndTxns", 8, 10 }, + { "VFVld", 3, 1 }, + { "PFNum", 0, 3 }, + { "PCIE_FUNC_INT_CFG", 0x3170, 0 }, + { "PBAOfst", 28, 4 }, + { "TABOfst", 24, 4 }, + { "VecNum", 12, 10 }, + { "VecBase", 0, 11 }, + { "PCIE_FUNC_CTL_STAT", 0x3174, 0 }, + { "SendFLRRsp", 31, 1 }, + { "ImmFLRRsp", 24, 1 }, + { "TxnDisable", 20, 1 }, + { "PndTxns", 8, 10 }, + { "VFVld", 3, 1 }, + { "PFNum", 0, 3 }, + { "PCIE_FUNC_INT_CFG", 0x3178, 0 }, + { "PBAOfst", 28, 4 }, + { "TABOfst", 24, 4 }, + { "VecNum", 12, 10 }, + { "VecBase", 0, 11 }, + { "PCIE_FUNC_CTL_STAT", 0x317c, 0 }, + { "SendFLRRsp", 31, 1 }, + { "ImmFLRRsp", 24, 1 }, + { "TxnDisable", 20, 1 }, + { "PndTxns", 8, 10 }, + { "VFVld", 3, 1 }, + { "PFNum", 0, 3 }, + { "PCIE_FUNC_INT_CFG", 0x3180, 0 }, + { "PBAOfst", 28, 4 }, + { "TABOfst", 24, 4 }, + { "VecNum", 12, 10 }, + { "VecBase", 0, 11 }, + { "PCIE_FUNC_CTL_STAT", 0x3184, 0 }, + { "SendFLRRsp", 31, 1 }, + { "ImmFLRRsp", 24, 1 }, + { "TxnDisable", 20, 1 }, + { "PndTxns", 8, 10 }, + { "VFVld", 3, 1 }, + { "PFNum", 0, 3 }, + { "PCIE_FUNC_INT_CFG", 0x3188, 0 }, + { "PBAOfst", 28, 4 }, + { "TABOfst", 24, 4 }, + { "VecNum", 12, 10 }, + { "VecBase", 0, 11 }, + { "PCIE_FUNC_CTL_STAT", 0x318c, 0 }, + { "SendFLRRsp", 31, 1 }, + { "ImmFLRRsp", 24, 1 }, + { "TxnDisable", 20, 1 }, + { "PndTxns", 8, 10 }, + { "VFVld", 3, 1 }, + { "PFNum", 0, 3 }, + { "PCIE_FUNC_INT_CFG", 0x3190, 0 }, + { "PBAOfst", 28, 4 }, + { "TABOfst", 24, 4 }, + { "VecNum", 12, 10 }, + { "VecBase", 0, 11 }, + { "PCIE_FUNC_CTL_STAT", 0x3194, 0 }, + { "SendFLRRsp", 31, 1 }, + { "ImmFLRRsp", 24, 1 }, + { "TxnDisable", 20, 1 }, + { "PndTxns", 8, 10 }, + { "VFVld", 3, 1 }, + { "PFNum", 0, 3 }, + { "PCIE_FUNC_INT_CFG", 0x3198, 0 }, + { "PBAOfst", 28, 4 }, + { "TABOfst", 24, 4 }, + { "VecNum", 12, 10 }, + { "VecBase", 0, 11 }, + { "PCIE_FUNC_CTL_STAT", 0x319c, 0 }, + { "SendFLRRsp", 31, 1 }, + { "ImmFLRRsp", 24, 1 }, + { "TxnDisable", 20, 1 }, + { "PndTxns", 8, 10 }, + { "VFVld", 3, 1 }, + { "PFNum", 0, 3 }, + { "PCIE_FUNC_INT_CFG", 0x31a0, 0 }, + { "PBAOfst", 28, 4 }, + { "TABOfst", 24, 4 }, + { "VecNum", 12, 10 }, + { "VecBase", 0, 11 }, + { "PCIE_FUNC_CTL_STAT", 0x31a4, 0 }, + { "SendFLRRsp", 31, 1 }, + { "ImmFLRRsp", 24, 1 }, + { "TxnDisable", 20, 1 }, + { "PndTxns", 8, 10 }, + { "VFVld", 3, 1 }, + { "PFNum", 0, 3 }, + { "PCIE_FUNC_INT_CFG", 0x31a8, 0 }, + { "PBAOfst", 28, 4 }, + { "TABOfst", 24, 4 }, + { "VecNum", 12, 10 }, + { "VecBase", 0, 11 }, + { "PCIE_FUNC_CTL_STAT", 0x31ac, 0 }, + { "SendFLRRsp", 31, 1 }, + { "ImmFLRRsp", 24, 1 }, + { "TxnDisable", 20, 1 }, + { "PndTxns", 8, 10 }, + { "VFVld", 3, 1 }, + { "PFNum", 0, 3 }, + { "PCIE_FUNC_INT_CFG", 0x31b0, 0 }, + { "PBAOfst", 28, 4 }, + { "TABOfst", 24, 4 }, + { "VecNum", 12, 10 }, + { "VecBase", 0, 11 }, + { "PCIE_FUNC_CTL_STAT", 0x31b4, 0 }, + { "SendFLRRsp", 31, 1 }, + { "ImmFLRRsp", 24, 1 }, + { "TxnDisable", 20, 1 }, + { "PndTxns", 8, 10 }, + { "VFVld", 3, 1 }, + { "PFNum", 0, 3 }, + { "PCIE_FUNC_INT_CFG", 0x31b8, 0 }, + { "PBAOfst", 28, 4 }, + { "TABOfst", 24, 4 }, + { "VecNum", 12, 10 }, + { "VecBase", 0, 11 }, + { "PCIE_FUNC_CTL_STAT", 0x31bc, 0 }, + { "SendFLRRsp", 31, 1 }, + { "ImmFLRRsp", 24, 1 }, + { "TxnDisable", 20, 1 }, + { "PndTxns", 8, 10 }, + { "VFVld", 3, 1 }, + { "PFNum", 0, 3 }, + { "PCIE_FUNC_INT_CFG", 0x31c0, 0 }, + { "PBAOfst", 28, 4 }, + { "TABOfst", 24, 4 }, + { "VecNum", 12, 10 }, + { "VecBase", 0, 11 }, + { "PCIE_FUNC_CTL_STAT", 0x31c4, 0 }, + { "SendFLRRsp", 31, 1 }, + { "ImmFLRRsp", 24, 1 }, + { "TxnDisable", 20, 1 }, + { "PndTxns", 8, 10 }, + { "VFVld", 3, 1 }, + { "PFNum", 0, 3 }, + { "PCIE_FUNC_INT_CFG", 0x31c8, 0 }, + { "PBAOfst", 28, 4 }, + { "TABOfst", 24, 4 }, + { "VecNum", 12, 10 }, + { "VecBase", 0, 11 }, + { "PCIE_FUNC_CTL_STAT", 0x31cc, 0 }, + { "SendFLRRsp", 31, 1 }, + { "ImmFLRRsp", 24, 1 }, + { "TxnDisable", 20, 1 }, + { "PndTxns", 8, 10 }, + { "VFVld", 3, 1 }, + { "PFNum", 0, 3 }, + { "PCIE_FUNC_INT_CFG", 0x31d0, 0 }, + { "PBAOfst", 28, 4 }, + { "TABOfst", 24, 4 }, + { "VecNum", 12, 10 }, + { "VecBase", 0, 11 }, + { "PCIE_FUNC_CTL_STAT", 0x31d4, 0 }, + { "SendFLRRsp", 31, 1 }, + { "ImmFLRRsp", 24, 1 }, + { "TxnDisable", 20, 1 }, + { "PndTxns", 8, 10 }, + { "VFVld", 3, 1 }, + { "PFNum", 0, 3 }, + { "PCIE_FUNC_INT_CFG", 0x31d8, 0 }, + { "PBAOfst", 28, 4 }, + { "TABOfst", 24, 4 }, + { "VecNum", 12, 10 }, + { "VecBase", 0, 11 }, + { "PCIE_FUNC_CTL_STAT", 0x31dc, 0 }, + { "SendFLRRsp", 31, 1 }, + { "ImmFLRRsp", 24, 1 }, + { "TxnDisable", 20, 1 }, + { "PndTxns", 8, 10 }, + { "VFVld", 3, 1 }, + { "PFNum", 0, 3 }, + { "PCIE_FUNC_INT_CFG", 0x31e0, 0 }, + { "PBAOfst", 28, 4 }, + { "TABOfst", 24, 4 }, + { "VecNum", 12, 10 }, + { "VecBase", 0, 11 }, + { "PCIE_FUNC_CTL_STAT", 0x31e4, 0 }, + { "SendFLRRsp", 31, 1 }, + { "ImmFLRRsp", 24, 1 }, + { "TxnDisable", 20, 1 }, + { "PndTxns", 8, 10 }, + { "VFVld", 3, 1 }, + { "PFNum", 0, 3 }, + { "PCIE_FUNC_INT_CFG", 0x31e8, 0 }, + { "PBAOfst", 28, 4 }, + { "TABOfst", 24, 4 }, + { "VecNum", 12, 10 }, + { "VecBase", 0, 11 }, + { "PCIE_FUNC_CTL_STAT", 0x31ec, 0 }, + { "SendFLRRsp", 31, 1 }, + { "ImmFLRRsp", 24, 1 }, + { "TxnDisable", 20, 1 }, + { "PndTxns", 8, 10 }, + { "VFVld", 3, 1 }, + { "PFNum", 0, 3 }, + { "PCIE_FUNC_INT_CFG", 0x31f0, 0 }, + { "PBAOfst", 28, 4 }, + { "TABOfst", 24, 4 }, + { "VecNum", 12, 10 }, + { "VecBase", 0, 11 }, + { "PCIE_FUNC_CTL_STAT", 0x31f4, 0 }, + { "SendFLRRsp", 31, 1 }, + { "ImmFLRRsp", 24, 1 }, + { "TxnDisable", 20, 1 }, + { "PndTxns", 8, 10 }, + { "VFVld", 3, 1 }, + { "PFNum", 0, 3 }, + { "PCIE_FUNC_INT_CFG", 0x31f8, 0 }, + { "PBAOfst", 28, 4 }, + { "TABOfst", 24, 4 }, + { "VecNum", 12, 10 }, + { "VecBase", 0, 11 }, + { "PCIE_FUNC_CTL_STAT", 0x31fc, 0 }, + { "SendFLRRsp", 31, 1 }, + { "ImmFLRRsp", 24, 1 }, + { "TxnDisable", 20, 1 }, + { "PndTxns", 8, 10 }, + { "VFVld", 3, 1 }, + { "PFNum", 0, 3 }, + { "PCIE_FUNC_INT_CFG", 0x3200, 0 }, + { "PBAOfst", 28, 4 }, + { "TABOfst", 24, 4 }, + { "VecNum", 12, 10 }, + { "VecBase", 0, 11 }, + { "PCIE_FUNC_CTL_STAT", 0x3204, 0 }, + { "SendFLRRsp", 31, 1 }, + { "ImmFLRRsp", 24, 1 }, + { "TxnDisable", 20, 1 }, + { "PndTxns", 8, 10 }, + { "VFVld", 3, 1 }, + { "PFNum", 0, 3 }, + { "PCIE_FUNC_INT_CFG", 0x3208, 0 }, + { "PBAOfst", 28, 4 }, + { "TABOfst", 24, 4 }, + { "VecNum", 12, 10 }, + { "VecBase", 0, 11 }, + { "PCIE_FUNC_CTL_STAT", 0x320c, 0 }, + { "SendFLRRsp", 31, 1 }, + { "ImmFLRRsp", 24, 1 }, + { "TxnDisable", 20, 1 }, + { "PndTxns", 8, 10 }, + { "VFVld", 3, 1 }, + { "PFNum", 0, 3 }, + { "PCIE_FUNC_INT_CFG", 0x3210, 0 }, + { "PBAOfst", 28, 4 }, + { "TABOfst", 24, 4 }, + { "VecNum", 12, 10 }, + { "VecBase", 0, 11 }, + { "PCIE_FUNC_CTL_STAT", 0x3214, 0 }, + { "SendFLRRsp", 31, 1 }, + { "ImmFLRRsp", 24, 1 }, + { "TxnDisable", 20, 1 }, + { "PndTxns", 8, 10 }, + { "VFVld", 3, 1 }, + { "PFNum", 0, 3 }, + { "PCIE_FUNC_INT_CFG", 0x3218, 0 }, + { "PBAOfst", 28, 4 }, + { "TABOfst", 24, 4 }, + { "VecNum", 12, 10 }, + { "VecBase", 0, 11 }, + { "PCIE_FUNC_CTL_STAT", 0x321c, 0 }, + { "SendFLRRsp", 31, 1 }, + { "ImmFLRRsp", 24, 1 }, + { "TxnDisable", 20, 1 }, + { "PndTxns", 8, 10 }, + { "VFVld", 3, 1 }, + { "PFNum", 0, 3 }, + { "PCIE_FUNC_INT_CFG", 0x3220, 0 }, + { "PBAOfst", 28, 4 }, + { "TABOfst", 24, 4 }, + { "VecNum", 12, 10 }, + { "VecBase", 0, 11 }, + { "PCIE_FUNC_CTL_STAT", 0x3224, 0 }, + { "SendFLRRsp", 31, 1 }, + { "ImmFLRRsp", 24, 1 }, + { "TxnDisable", 20, 1 }, + { "PndTxns", 8, 10 }, + { "VFVld", 3, 1 }, + { "PFNum", 0, 3 }, + { "PCIE_FUNC_INT_CFG", 0x3228, 0 }, + { "PBAOfst", 28, 4 }, + { "TABOfst", 24, 4 }, + { "VecNum", 12, 10 }, + { "VecBase", 0, 11 }, + { "PCIE_FUNC_CTL_STAT", 0x322c, 0 }, + { "SendFLRRsp", 31, 1 }, + { "ImmFLRRsp", 24, 1 }, + { "TxnDisable", 20, 1 }, + { "PndTxns", 8, 10 }, + { "VFVld", 3, 1 }, + { "PFNum", 0, 3 }, + { "PCIE_FUNC_INT_CFG", 0x3230, 0 }, + { "PBAOfst", 28, 4 }, + { "TABOfst", 24, 4 }, + { "VecNum", 12, 10 }, + { "VecBase", 0, 11 }, + { "PCIE_FUNC_CTL_STAT", 0x3234, 0 }, + { "SendFLRRsp", 31, 1 }, + { "ImmFLRRsp", 24, 1 }, + { "TxnDisable", 20, 1 }, + { "PndTxns", 8, 10 }, + { "VFVld", 3, 1 }, + { "PFNum", 0, 3 }, + { "PCIE_FUNC_INT_CFG", 0x3238, 0 }, + { "PBAOfst", 28, 4 }, + { "TABOfst", 24, 4 }, + { "VecNum", 12, 10 }, + { "VecBase", 0, 11 }, + { "PCIE_FUNC_CTL_STAT", 0x323c, 0 }, + { "SendFLRRsp", 31, 1 }, + { "ImmFLRRsp", 24, 1 }, + { "TxnDisable", 20, 1 }, + { "PndTxns", 8, 10 }, + { "VFVld", 3, 1 }, + { "PFNum", 0, 3 }, + { "PCIE_FUNC_INT_CFG", 0x3240, 0 }, + { "PBAOfst", 28, 4 }, + { "TABOfst", 24, 4 }, + { "VecNum", 12, 10 }, + { "VecBase", 0, 11 }, + { "PCIE_FUNC_CTL_STAT", 0x3244, 0 }, + { "SendFLRRsp", 31, 1 }, + { "ImmFLRRsp", 24, 1 }, + { "TxnDisable", 20, 1 }, + { "PndTxns", 8, 10 }, + { "VFVld", 3, 1 }, + { "PFNum", 0, 3 }, + { "PCIE_FUNC_INT_CFG", 0x3248, 0 }, + { "PBAOfst", 28, 4 }, + { "TABOfst", 24, 4 }, + { "VecNum", 12, 10 }, + { "VecBase", 0, 11 }, + { "PCIE_FUNC_CTL_STAT", 0x324c, 0 }, + { "SendFLRRsp", 31, 1 }, + { "ImmFLRRsp", 24, 1 }, + { "TxnDisable", 20, 1 }, + { "PndTxns", 8, 10 }, + { "VFVld", 3, 1 }, + { "PFNum", 0, 3 }, + { "PCIE_FUNC_INT_CFG", 0x3250, 0 }, + { "PBAOfst", 28, 4 }, + { "TABOfst", 24, 4 }, + { "VecNum", 12, 10 }, + { "VecBase", 0, 11 }, + { "PCIE_FUNC_CTL_STAT", 0x3254, 0 }, + { "SendFLRRsp", 31, 1 }, + { "ImmFLRRsp", 24, 1 }, + { "TxnDisable", 20, 1 }, + { "PndTxns", 8, 10 }, + { "VFVld", 3, 1 }, + { "PFNum", 0, 3 }, + { "PCIE_FUNC_INT_CFG", 0x3258, 0 }, + { "PBAOfst", 28, 4 }, + { "TABOfst", 24, 4 }, + { "VecNum", 12, 10 }, + { "VecBase", 0, 11 }, + { "PCIE_FUNC_CTL_STAT", 0x325c, 0 }, + { "SendFLRRsp", 31, 1 }, + { "ImmFLRRsp", 24, 1 }, + { "TxnDisable", 20, 1 }, + { "PndTxns", 8, 10 }, + { "VFVld", 3, 1 }, + { "PFNum", 0, 3 }, + { "PCIE_FUNC_INT_CFG", 0x3260, 0 }, + { "PBAOfst", 28, 4 }, + { "TABOfst", 24, 4 }, + { "VecNum", 12, 10 }, + { "VecBase", 0, 11 }, + { "PCIE_FUNC_CTL_STAT", 0x3264, 0 }, + { "SendFLRRsp", 31, 1 }, + { "ImmFLRRsp", 24, 1 }, + { "TxnDisable", 20, 1 }, + { "PndTxns", 8, 10 }, + { "VFVld", 3, 1 }, + { "PFNum", 0, 3 }, + { "PCIE_FUNC_INT_CFG", 0x3268, 0 }, + { "PBAOfst", 28, 4 }, + { "TABOfst", 24, 4 }, + { "VecNum", 12, 10 }, + { "VecBase", 0, 11 }, + { "PCIE_FUNC_CTL_STAT", 0x326c, 0 }, + { "SendFLRRsp", 31, 1 }, + { "ImmFLRRsp", 24, 1 }, + { "TxnDisable", 20, 1 }, + { "PndTxns", 8, 10 }, + { "VFVld", 3, 1 }, + { "PFNum", 0, 3 }, + { "PCIE_FUNC_INT_CFG", 0x3270, 0 }, + { "PBAOfst", 28, 4 }, + { "TABOfst", 24, 4 }, + { "VecNum", 12, 10 }, + { "VecBase", 0, 11 }, + { "PCIE_FUNC_CTL_STAT", 0x3274, 0 }, + { "SendFLRRsp", 31, 1 }, + { "ImmFLRRsp", 24, 1 }, + { "TxnDisable", 20, 1 }, + { "PndTxns", 8, 10 }, + { "VFVld", 3, 1 }, + { "PFNum", 0, 3 }, + { "PCIE_FUNC_INT_CFG", 0x3278, 0 }, + { "PBAOfst", 28, 4 }, + { "TABOfst", 24, 4 }, + { "VecNum", 12, 10 }, + { "VecBase", 0, 11 }, + { "PCIE_FUNC_CTL_STAT", 0x327c, 0 }, + { "SendFLRRsp", 31, 1 }, + { "ImmFLRRsp", 24, 1 }, + { "TxnDisable", 20, 1 }, + { "PndTxns", 8, 10 }, + { "VFVld", 3, 1 }, + { "PFNum", 0, 3 }, + { "PCIE_FUNC_INT_CFG", 0x3280, 0 }, + { "PBAOfst", 28, 4 }, + { "TABOfst", 24, 4 }, + { "VecNum", 12, 10 }, + { "VecBase", 0, 11 }, + { "PCIE_FUNC_CTL_STAT", 0x3284, 0 }, + { "SendFLRRsp", 31, 1 }, + { "ImmFLRRsp", 24, 1 }, + { "TxnDisable", 20, 1 }, + { "PndTxns", 8, 10 }, + { "VFVld", 3, 1 }, + { "PFNum", 0, 3 }, + { "PCIE_FUNC_INT_CFG", 0x3288, 0 }, + { "PBAOfst", 28, 4 }, + { "TABOfst", 24, 4 }, + { "VecNum", 12, 10 }, + { "VecBase", 0, 11 }, + { "PCIE_FUNC_CTL_STAT", 0x328c, 0 }, + { "SendFLRRsp", 31, 1 }, + { "ImmFLRRsp", 24, 1 }, + { "TxnDisable", 20, 1 }, + { "PndTxns", 8, 10 }, + { "VFVld", 3, 1 }, + { "PFNum", 0, 3 }, + { "PCIE_FUNC_INT_CFG", 0x3290, 0 }, + { "PBAOfst", 28, 4 }, + { "TABOfst", 24, 4 }, + { "VecNum", 12, 10 }, + { "VecBase", 0, 11 }, + { "PCIE_FUNC_CTL_STAT", 0x3294, 0 }, + { "SendFLRRsp", 31, 1 }, + { "ImmFLRRsp", 24, 1 }, + { "TxnDisable", 20, 1 }, + { "PndTxns", 8, 10 }, + { "VFVld", 3, 1 }, + { "PFNum", 0, 3 }, + { "PCIE_FUNC_INT_CFG", 0x3298, 0 }, + { "PBAOfst", 28, 4 }, + { "TABOfst", 24, 4 }, + { "VecNum", 12, 10 }, + { "VecBase", 0, 11 }, + { "PCIE_FUNC_CTL_STAT", 0x329c, 0 }, + { "SendFLRRsp", 31, 1 }, + { "ImmFLRRsp", 24, 1 }, + { "TxnDisable", 20, 1 }, + { "PndTxns", 8, 10 }, + { "VFVld", 3, 1 }, + { "PFNum", 0, 3 }, + { "PCIE_FUNC_INT_CFG", 0x32a0, 0 }, + { "PBAOfst", 28, 4 }, + { "TABOfst", 24, 4 }, + { "VecNum", 12, 10 }, + { "VecBase", 0, 11 }, + { "PCIE_FUNC_CTL_STAT", 0x32a4, 0 }, + { "SendFLRRsp", 31, 1 }, + { "ImmFLRRsp", 24, 1 }, + { "TxnDisable", 20, 1 }, + { "PndTxns", 8, 10 }, + { "VFVld", 3, 1 }, + { "PFNum", 0, 3 }, + { "PCIE_FUNC_INT_CFG", 0x32a8, 0 }, + { "PBAOfst", 28, 4 }, + { "TABOfst", 24, 4 }, + { "VecNum", 12, 10 }, + { "VecBase", 0, 11 }, + { "PCIE_FUNC_CTL_STAT", 0x32ac, 0 }, + { "SendFLRRsp", 31, 1 }, + { "ImmFLRRsp", 24, 1 }, + { "TxnDisable", 20, 1 }, + { "PndTxns", 8, 10 }, + { "VFVld", 3, 1 }, + { "PFNum", 0, 3 }, + { "PCIE_FUNC_INT_CFG", 0x32b0, 0 }, + { "PBAOfst", 28, 4 }, + { "TABOfst", 24, 4 }, + { "VecNum", 12, 10 }, + { "VecBase", 0, 11 }, + { "PCIE_FUNC_CTL_STAT", 0x32b4, 0 }, + { "SendFLRRsp", 31, 1 }, + { "ImmFLRRsp", 24, 1 }, + { "TxnDisable", 20, 1 }, + { "PndTxns", 8, 10 }, + { "VFVld", 3, 1 }, + { "PFNum", 0, 3 }, + { "PCIE_FUNC_INT_CFG", 0x32b8, 0 }, + { "PBAOfst", 28, 4 }, + { "TABOfst", 24, 4 }, + { "VecNum", 12, 10 }, + { "VecBase", 0, 11 }, + { "PCIE_FUNC_CTL_STAT", 0x32bc, 0 }, + { "SendFLRRsp", 31, 1 }, + { "ImmFLRRsp", 24, 1 }, + { "TxnDisable", 20, 1 }, + { "PndTxns", 8, 10 }, + { "VFVld", 3, 1 }, + { "PFNum", 0, 3 }, + { "PCIE_FUNC_INT_CFG", 0x32c0, 0 }, + { "PBAOfst", 28, 4 }, + { "TABOfst", 24, 4 }, + { "VecNum", 12, 10 }, + { "VecBase", 0, 11 }, + { "PCIE_FUNC_CTL_STAT", 0x32c4, 0 }, + { "SendFLRRsp", 31, 1 }, + { "ImmFLRRsp", 24, 1 }, + { "TxnDisable", 20, 1 }, + { "PndTxns", 8, 10 }, + { "VFVld", 3, 1 }, + { "PFNum", 0, 3 }, + { "PCIE_FUNC_INT_CFG", 0x32c8, 0 }, + { "PBAOfst", 28, 4 }, + { "TABOfst", 24, 4 }, + { "VecNum", 12, 10 }, + { "VecBase", 0, 11 }, + { "PCIE_FUNC_CTL_STAT", 0x32cc, 0 }, + { "SendFLRRsp", 31, 1 }, + { "ImmFLRRsp", 24, 1 }, + { "TxnDisable", 20, 1 }, + { "PndTxns", 8, 10 }, + { "VFVld", 3, 1 }, + { "PFNum", 0, 3 }, + { "PCIE_FUNC_INT_CFG", 0x32d0, 0 }, + { "PBAOfst", 28, 4 }, + { "TABOfst", 24, 4 }, + { "VecNum", 12, 10 }, + { "VecBase", 0, 11 }, + { "PCIE_FUNC_CTL_STAT", 0x32d4, 0 }, + { "SendFLRRsp", 31, 1 }, + { "ImmFLRRsp", 24, 1 }, + { "TxnDisable", 20, 1 }, + { "PndTxns", 8, 10 }, + { "VFVld", 3, 1 }, + { "PFNum", 0, 3 }, + { "PCIE_FUNC_INT_CFG", 0x32d8, 0 }, + { "PBAOfst", 28, 4 }, + { "TABOfst", 24, 4 }, + { "VecNum", 12, 10 }, + { "VecBase", 0, 11 }, + { "PCIE_FUNC_CTL_STAT", 0x32dc, 0 }, + { "SendFLRRsp", 31, 1 }, + { "ImmFLRRsp", 24, 1 }, + { "TxnDisable", 20, 1 }, + { "PndTxns", 8, 10 }, + { "VFVld", 3, 1 }, + { "PFNum", 0, 3 }, + { "PCIE_FUNC_INT_CFG", 0x32e0, 0 }, + { "PBAOfst", 28, 4 }, + { "TABOfst", 24, 4 }, + { "VecNum", 12, 10 }, + { "VecBase", 0, 11 }, + { "PCIE_FUNC_CTL_STAT", 0x32e4, 0 }, + { "SendFLRRsp", 31, 1 }, + { "ImmFLRRsp", 24, 1 }, + { "TxnDisable", 20, 1 }, + { "PndTxns", 8, 10 }, + { "VFVld", 3, 1 }, + { "PFNum", 0, 3 }, + { "PCIE_FUNC_INT_CFG", 0x32e8, 0 }, + { "PBAOfst", 28, 4 }, + { "TABOfst", 24, 4 }, + { "VecNum", 12, 10 }, + { "VecBase", 0, 11 }, + { "PCIE_FUNC_CTL_STAT", 0x32ec, 0 }, + { "SendFLRRsp", 31, 1 }, + { "ImmFLRRsp", 24, 1 }, + { "TxnDisable", 20, 1 }, + { "PndTxns", 8, 10 }, + { "VFVld", 3, 1 }, + { "PFNum", 0, 3 }, + { "PCIE_FUNC_INT_CFG", 0x32f0, 0 }, + { "PBAOfst", 28, 4 }, + { "TABOfst", 24, 4 }, + { "VecNum", 12, 10 }, + { "VecBase", 0, 11 }, + { "PCIE_FUNC_CTL_STAT", 0x32f4, 0 }, + { "SendFLRRsp", 31, 1 }, + { "ImmFLRRsp", 24, 1 }, + { "TxnDisable", 20, 1 }, + { "PndTxns", 8, 10 }, + { "VFVld", 3, 1 }, + { "PFNum", 0, 3 }, + { "PCIE_FUNC_INT_CFG", 0x32f8, 0 }, + { "PBAOfst", 28, 4 }, + { "TABOfst", 24, 4 }, + { "VecNum", 12, 10 }, + { "VecBase", 0, 11 }, + { "PCIE_FUNC_CTL_STAT", 0x32fc, 0 }, + { "SendFLRRsp", 31, 1 }, + { "ImmFLRRsp", 24, 1 }, + { "TxnDisable", 20, 1 }, + { "PndTxns", 8, 10 }, + { "VFVld", 3, 1 }, + { "PFNum", 0, 3 }, + { "PCIE_FUNC_INT_CFG", 0x3300, 0 }, + { "PBAOfst", 28, 4 }, + { "TABOfst", 24, 4 }, + { "VecNum", 12, 10 }, + { "VecBase", 0, 11 }, + { "PCIE_FUNC_CTL_STAT", 0x3304, 0 }, + { "SendFLRRsp", 31, 1 }, + { "ImmFLRRsp", 24, 1 }, + { "TxnDisable", 20, 1 }, + { "PndTxns", 8, 10 }, + { "VFVld", 3, 1 }, + { "PFNum", 0, 3 }, + { "PCIE_FUNC_INT_CFG", 0x3308, 0 }, + { "PBAOfst", 28, 4 }, + { "TABOfst", 24, 4 }, + { "VecNum", 12, 10 }, + { "VecBase", 0, 11 }, + { "PCIE_FUNC_CTL_STAT", 0x330c, 0 }, + { "SendFLRRsp", 31, 1 }, + { "ImmFLRRsp", 24, 1 }, + { "TxnDisable", 20, 1 }, + { "PndTxns", 8, 10 }, + { "VFVld", 3, 1 }, + { "PFNum", 0, 3 }, + { "PCIE_FUNC_INT_CFG", 0x3310, 0 }, + { "PBAOfst", 28, 4 }, + { "TABOfst", 24, 4 }, + { "VecNum", 12, 10 }, + { "VecBase", 0, 11 }, + { "PCIE_FUNC_CTL_STAT", 0x3314, 0 }, + { "SendFLRRsp", 31, 1 }, + { "ImmFLRRsp", 24, 1 }, + { "TxnDisable", 20, 1 }, + { "PndTxns", 8, 10 }, + { "VFVld", 3, 1 }, + { "PFNum", 0, 3 }, + { "PCIE_FUNC_INT_CFG", 0x3318, 0 }, + { "PBAOfst", 28, 4 }, + { "TABOfst", 24, 4 }, + { "VecNum", 12, 10 }, + { "VecBase", 0, 11 }, + { "PCIE_FUNC_CTL_STAT", 0x331c, 0 }, + { "SendFLRRsp", 31, 1 }, + { "ImmFLRRsp", 24, 1 }, + { "TxnDisable", 20, 1 }, + { "PndTxns", 8, 10 }, + { "VFVld", 3, 1 }, + { "PFNum", 0, 3 }, + { "PCIE_FUNC_INT_CFG", 0x3320, 0 }, + { "PBAOfst", 28, 4 }, + { "TABOfst", 24, 4 }, + { "VecNum", 12, 10 }, + { "VecBase", 0, 11 }, + { "PCIE_FUNC_CTL_STAT", 0x3324, 0 }, + { "SendFLRRsp", 31, 1 }, + { "ImmFLRRsp", 24, 1 }, + { "TxnDisable", 20, 1 }, + { "PndTxns", 8, 10 }, + { "VFVld", 3, 1 }, + { "PFNum", 0, 3 }, + { "PCIE_FUNC_INT_CFG", 0x3328, 0 }, + { "PBAOfst", 28, 4 }, + { "TABOfst", 24, 4 }, + { "VecNum", 12, 10 }, + { "VecBase", 0, 11 }, + { "PCIE_FUNC_CTL_STAT", 0x332c, 0 }, + { "SendFLRRsp", 31, 1 }, + { "ImmFLRRsp", 24, 1 }, + { "TxnDisable", 20, 1 }, + { "PndTxns", 8, 10 }, + { "VFVld", 3, 1 }, + { "PFNum", 0, 3 }, + { "PCIE_FUNC_INT_CFG", 0x3330, 0 }, + { "PBAOfst", 28, 4 }, + { "TABOfst", 24, 4 }, + { "VecNum", 12, 10 }, + { "VecBase", 0, 11 }, + { "PCIE_FUNC_CTL_STAT", 0x3334, 0 }, + { "SendFLRRsp", 31, 1 }, + { "ImmFLRRsp", 24, 1 }, + { "TxnDisable", 20, 1 }, + { "PndTxns", 8, 10 }, + { "VFVld", 3, 1 }, + { "PFNum", 0, 3 }, + { "PCIE_FUNC_INT_CFG", 0x3338, 0 }, + { "PBAOfst", 28, 4 }, + { "TABOfst", 24, 4 }, + { "VecNum", 12, 10 }, + { "VecBase", 0, 11 }, + { "PCIE_FUNC_CTL_STAT", 0x333c, 0 }, + { "SendFLRRsp", 31, 1 }, + { "ImmFLRRsp", 24, 1 }, + { "TxnDisable", 20, 1 }, + { "PndTxns", 8, 10 }, + { "VFVld", 3, 1 }, + { "PFNum", 0, 3 }, + { "PCIE_FUNC_INT_CFG", 0x3340, 0 }, + { "PBAOfst", 28, 4 }, + { "TABOfst", 24, 4 }, + { "VecNum", 12, 10 }, + { "VecBase", 0, 11 }, + { "PCIE_FUNC_CTL_STAT", 0x3344, 0 }, + { "SendFLRRsp", 31, 1 }, + { "ImmFLRRsp", 24, 1 }, + { "TxnDisable", 20, 1 }, + { "PndTxns", 8, 10 }, + { "VFVld", 3, 1 }, + { "PFNum", 0, 3 }, + { "PCIE_FUNC_INT_CFG", 0x3348, 0 }, + { "PBAOfst", 28, 4 }, + { "TABOfst", 24, 4 }, + { "VecNum", 12, 10 }, + { "VecBase", 0, 11 }, + { "PCIE_FUNC_CTL_STAT", 0x334c, 0 }, + { "SendFLRRsp", 31, 1 }, + { "ImmFLRRsp", 24, 1 }, + { "TxnDisable", 20, 1 }, + { "PndTxns", 8, 10 }, + { "VFVld", 3, 1 }, + { "PFNum", 0, 3 }, + { "PCIE_FUNC_INT_CFG", 0x3350, 0 }, + { "PBAOfst", 28, 4 }, + { "TABOfst", 24, 4 }, + { "VecNum", 12, 10 }, + { "VecBase", 0, 11 }, + { "PCIE_FUNC_CTL_STAT", 0x3354, 0 }, + { "SendFLRRsp", 31, 1 }, + { "ImmFLRRsp", 24, 1 }, + { "TxnDisable", 20, 1 }, + { "PndTxns", 8, 10 }, + { "VFVld", 3, 1 }, + { "PFNum", 0, 3 }, + { "PCIE_FUNC_INT_CFG", 0x3358, 0 }, + { "PBAOfst", 28, 4 }, + { "TABOfst", 24, 4 }, + { "VecNum", 12, 10 }, + { "VecBase", 0, 11 }, + { "PCIE_FUNC_CTL_STAT", 0x335c, 0 }, + { "SendFLRRsp", 31, 1 }, + { "ImmFLRRsp", 24, 1 }, + { "TxnDisable", 20, 1 }, + { "PndTxns", 8, 10 }, + { "VFVld", 3, 1 }, + { "PFNum", 0, 3 }, + { "PCIE_FUNC_INT_CFG", 0x3360, 0 }, + { "PBAOfst", 28, 4 }, + { "TABOfst", 24, 4 }, + { "VecNum", 12, 10 }, + { "VecBase", 0, 11 }, + { "PCIE_FUNC_CTL_STAT", 0x3364, 0 }, + { "SendFLRRsp", 31, 1 }, + { "ImmFLRRsp", 24, 1 }, + { "TxnDisable", 20, 1 }, + { "PndTxns", 8, 10 }, + { "VFVld", 3, 1 }, + { "PFNum", 0, 3 }, + { "PCIE_FUNC_INT_CFG", 0x3368, 0 }, + { "PBAOfst", 28, 4 }, + { "TABOfst", 24, 4 }, + { "VecNum", 12, 10 }, + { "VecBase", 0, 11 }, + { "PCIE_FUNC_CTL_STAT", 0x336c, 0 }, + { "SendFLRRsp", 31, 1 }, + { "ImmFLRRsp", 24, 1 }, + { "TxnDisable", 20, 1 }, + { "PndTxns", 8, 10 }, + { "VFVld", 3, 1 }, + { "PFNum", 0, 3 }, + { "PCIE_FUNC_INT_CFG", 0x3370, 0 }, + { "PBAOfst", 28, 4 }, + { "TABOfst", 24, 4 }, + { "VecNum", 12, 10 }, + { "VecBase", 0, 11 }, + { "PCIE_FUNC_CTL_STAT", 0x3374, 0 }, + { "SendFLRRsp", 31, 1 }, + { "ImmFLRRsp", 24, 1 }, + { "TxnDisable", 20, 1 }, + { "PndTxns", 8, 10 }, + { "VFVld", 3, 1 }, + { "PFNum", 0, 3 }, + { "PCIE_FUNC_INT_CFG", 0x3378, 0 }, + { "PBAOfst", 28, 4 }, + { "TABOfst", 24, 4 }, + { "VecNum", 12, 10 }, + { "VecBase", 0, 11 }, + { "PCIE_FUNC_CTL_STAT", 0x337c, 0 }, + { "SendFLRRsp", 31, 1 }, + { "ImmFLRRsp", 24, 1 }, + { "TxnDisable", 20, 1 }, + { "PndTxns", 8, 10 }, + { "VFVld", 3, 1 }, + { "PFNum", 0, 3 }, + { "PCIE_FUNC_INT_CFG", 0x3380, 0 }, + { "PBAOfst", 28, 4 }, + { "TABOfst", 24, 4 }, + { "VecNum", 12, 10 }, + { "VecBase", 0, 11 }, + { "PCIE_FUNC_CTL_STAT", 0x3384, 0 }, + { "SendFLRRsp", 31, 1 }, + { "ImmFLRRsp", 24, 1 }, + { "TxnDisable", 20, 1 }, + { "PndTxns", 8, 10 }, + { "VFVld", 3, 1 }, + { "PFNum", 0, 3 }, + { "PCIE_FUNC_INT_CFG", 0x3388, 0 }, + { "PBAOfst", 28, 4 }, + { "TABOfst", 24, 4 }, + { "VecNum", 12, 10 }, + { "VecBase", 0, 11 }, + { "PCIE_FUNC_CTL_STAT", 0x338c, 0 }, + { "SendFLRRsp", 31, 1 }, + { "ImmFLRRsp", 24, 1 }, + { "TxnDisable", 20, 1 }, + { "PndTxns", 8, 10 }, + { "VFVld", 3, 1 }, + { "PFNum", 0, 3 }, + { "PCIE_FUNC_INT_CFG", 0x3390, 0 }, + { "PBAOfst", 28, 4 }, + { "TABOfst", 24, 4 }, + { "VecNum", 12, 10 }, + { "VecBase", 0, 11 }, + { "PCIE_FUNC_CTL_STAT", 0x3394, 0 }, + { "SendFLRRsp", 31, 1 }, + { "ImmFLRRsp", 24, 1 }, + { "TxnDisable", 20, 1 }, + { "PndTxns", 8, 10 }, + { "VFVld", 3, 1 }, + { "PFNum", 0, 3 }, + { "PCIE_FUNC_INT_CFG", 0x3398, 0 }, + { "PBAOfst", 28, 4 }, + { "TABOfst", 24, 4 }, + { "VecNum", 12, 10 }, + { "VecBase", 0, 11 }, + { "PCIE_FUNC_CTL_STAT", 0x339c, 0 }, + { "SendFLRRsp", 31, 1 }, + { "ImmFLRRsp", 24, 1 }, + { "TxnDisable", 20, 1 }, + { "PndTxns", 8, 10 }, + { "VFVld", 3, 1 }, + { "PFNum", 0, 3 }, + { "PCIE_FUNC_INT_CFG", 0x33a0, 0 }, + { "PBAOfst", 28, 4 }, + { "TABOfst", 24, 4 }, + { "VecNum", 12, 10 }, + { "VecBase", 0, 11 }, + { "PCIE_FUNC_CTL_STAT", 0x33a4, 0 }, + { "SendFLRRsp", 31, 1 }, + { "ImmFLRRsp", 24, 1 }, + { "TxnDisable", 20, 1 }, + { "PndTxns", 8, 10 }, + { "VFVld", 3, 1 }, + { "PFNum", 0, 3 }, + { "PCIE_FUNC_INT_CFG", 0x33a8, 0 }, + { "PBAOfst", 28, 4 }, + { "TABOfst", 24, 4 }, + { "VecNum", 12, 10 }, + { "VecBase", 0, 11 }, + { "PCIE_FUNC_CTL_STAT", 0x33ac, 0 }, + { "SendFLRRsp", 31, 1 }, + { "ImmFLRRsp", 24, 1 }, + { "TxnDisable", 20, 1 }, + { "PndTxns", 8, 10 }, + { "VFVld", 3, 1 }, + { "PFNum", 0, 3 }, + { "PCIE_FUNC_INT_CFG", 0x33b0, 0 }, + { "PBAOfst", 28, 4 }, + { "TABOfst", 24, 4 }, + { "VecNum", 12, 10 }, + { "VecBase", 0, 11 }, + { "PCIE_FUNC_CTL_STAT", 0x33b4, 0 }, + { "SendFLRRsp", 31, 1 }, + { "ImmFLRRsp", 24, 1 }, + { "TxnDisable", 20, 1 }, + { "PndTxns", 8, 10 }, + { "VFVld", 3, 1 }, + { "PFNum", 0, 3 }, + { "PCIE_FUNC_INT_CFG", 0x33b8, 0 }, + { "PBAOfst", 28, 4 }, + { "TABOfst", 24, 4 }, + { "VecNum", 12, 10 }, + { "VecBase", 0, 11 }, + { "PCIE_FUNC_CTL_STAT", 0x33bc, 0 }, + { "SendFLRRsp", 31, 1 }, + { "ImmFLRRsp", 24, 1 }, + { "TxnDisable", 20, 1 }, + { "PndTxns", 8, 10 }, + { "VFVld", 3, 1 }, + { "PFNum", 0, 3 }, + { "PCIE_FUNC_INT_CFG", 0x33c0, 0 }, + { "PBAOfst", 28, 4 }, + { "TABOfst", 24, 4 }, + { "VecNum", 12, 10 }, + { "VecBase", 0, 11 }, + { "PCIE_FUNC_CTL_STAT", 0x33c4, 0 }, + { "SendFLRRsp", 31, 1 }, + { "ImmFLRRsp", 24, 1 }, + { "TxnDisable", 20, 1 }, + { "PndTxns", 8, 10 }, + { "VFVld", 3, 1 }, + { "PFNum", 0, 3 }, + { "PCIE_FUNC_INT_CFG", 0x33c8, 0 }, + { "PBAOfst", 28, 4 }, + { "TABOfst", 24, 4 }, + { "VecNum", 12, 10 }, + { "VecBase", 0, 11 }, + { "PCIE_FUNC_CTL_STAT", 0x33cc, 0 }, + { "SendFLRRsp", 31, 1 }, + { "ImmFLRRsp", 24, 1 }, + { "TxnDisable", 20, 1 }, + { "PndTxns", 8, 10 }, + { "VFVld", 3, 1 }, + { "PFNum", 0, 3 }, + { "PCIE_FUNC_INT_CFG", 0x33d0, 0 }, + { "PBAOfst", 28, 4 }, + { "TABOfst", 24, 4 }, + { "VecNum", 12, 10 }, + { "VecBase", 0, 11 }, + { "PCIE_FUNC_CTL_STAT", 0x33d4, 0 }, + { "SendFLRRsp", 31, 1 }, + { "ImmFLRRsp", 24, 1 }, + { "TxnDisable", 20, 1 }, + { "PndTxns", 8, 10 }, + { "VFVld", 3, 1 }, + { "PFNum", 0, 3 }, + { "PCIE_FUNC_INT_CFG", 0x33d8, 0 }, + { "PBAOfst", 28, 4 }, + { "TABOfst", 24, 4 }, + { "VecNum", 12, 10 }, + { "VecBase", 0, 11 }, + { "PCIE_FUNC_CTL_STAT", 0x33dc, 0 }, + { "SendFLRRsp", 31, 1 }, + { "ImmFLRRsp", 24, 1 }, + { "TxnDisable", 20, 1 }, + { "PndTxns", 8, 10 }, + { "VFVld", 3, 1 }, + { "PFNum", 0, 3 }, + { "PCIE_FUNC_INT_CFG", 0x33e0, 0 }, + { "PBAOfst", 28, 4 }, + { "TABOfst", 24, 4 }, + { "VecNum", 12, 10 }, + { "VecBase", 0, 11 }, + { "PCIE_FUNC_CTL_STAT", 0x33e4, 0 }, + { "SendFLRRsp", 31, 1 }, + { "ImmFLRRsp", 24, 1 }, + { "TxnDisable", 20, 1 }, + { "PndTxns", 8, 10 }, + { "VFVld", 3, 1 }, + { "PFNum", 0, 3 }, + { "PCIE_FUNC_INT_CFG", 0x33e8, 0 }, + { "PBAOfst", 28, 4 }, + { "TABOfst", 24, 4 }, + { "VecNum", 12, 10 }, + { "VecBase", 0, 11 }, + { "PCIE_FUNC_CTL_STAT", 0x33ec, 0 }, + { "SendFLRRsp", 31, 1 }, + { "ImmFLRRsp", 24, 1 }, + { "TxnDisable", 20, 1 }, + { "PndTxns", 8, 10 }, + { "VFVld", 3, 1 }, + { "PFNum", 0, 3 }, + { "PCIE_FUNC_INT_CFG", 0x33f0, 0 }, + { "PBAOfst", 28, 4 }, + { "TABOfst", 24, 4 }, + { "VecNum", 12, 10 }, + { "VecBase", 0, 11 }, + { "PCIE_FUNC_CTL_STAT", 0x33f4, 0 }, + { "SendFLRRsp", 31, 1 }, + { "ImmFLRRsp", 24, 1 }, + { "TxnDisable", 20, 1 }, + { "PndTxns", 8, 10 }, + { "VFVld", 3, 1 }, + { "PFNum", 0, 3 }, + { "PCIE_FUNC_INT_CFG", 0x33f8, 0 }, + { "PBAOfst", 28, 4 }, + { "TABOfst", 24, 4 }, + { "VecNum", 12, 10 }, + { "VecBase", 0, 11 }, + { "PCIE_FUNC_CTL_STAT", 0x33fc, 0 }, + { "SendFLRRsp", 31, 1 }, + { "ImmFLRRsp", 24, 1 }, + { "TxnDisable", 20, 1 }, + { "PndTxns", 8, 10 }, + { "VFVld", 3, 1 }, + { "PFNum", 0, 3 }, + { "PCIE_FUNC_INT_CFG", 0x3400, 0 }, + { "PBAOfst", 28, 4 }, + { "TABOfst", 24, 4 }, + { "VecNum", 12, 10 }, + { "VecBase", 0, 11 }, + { "PCIE_FUNC_CTL_STAT", 0x3404, 0 }, + { "SendFLRRsp", 31, 1 }, + { "ImmFLRRsp", 24, 1 }, + { "TxnDisable", 20, 1 }, + { "PndTxns", 8, 10 }, + { "VFVld", 3, 1 }, + { "PFNum", 0, 3 }, + { "PCIE_FUNC_INT_CFG", 0x3408, 0 }, + { "PBAOfst", 28, 4 }, + { "TABOfst", 24, 4 }, + { "VecNum", 12, 10 }, + { "VecBase", 0, 11 }, + { "PCIE_FUNC_CTL_STAT", 0x340c, 0 }, + { "SendFLRRsp", 31, 1 }, + { "ImmFLRRsp", 24, 1 }, + { "TxnDisable", 20, 1 }, + { "PndTxns", 8, 10 }, + { "VFVld", 3, 1 }, + { "PFNum", 0, 3 }, + { "PCIE_FUNC_INT_CFG", 0x3410, 0 }, + { "PBAOfst", 28, 4 }, + { "TABOfst", 24, 4 }, + { "VecNum", 12, 10 }, + { "VecBase", 0, 11 }, + { "PCIE_FUNC_CTL_STAT", 0x3414, 0 }, + { "SendFLRRsp", 31, 1 }, + { "ImmFLRRsp", 24, 1 }, + { "TxnDisable", 20, 1 }, + { "PndTxns", 8, 10 }, + { "VFVld", 3, 1 }, + { "PFNum", 0, 3 }, + { "PCIE_FUNC_INT_CFG", 0x3418, 0 }, + { "PBAOfst", 28, 4 }, + { "TABOfst", 24, 4 }, + { "VecNum", 12, 10 }, + { "VecBase", 0, 11 }, + { "PCIE_FUNC_CTL_STAT", 0x341c, 0 }, + { "SendFLRRsp", 31, 1 }, + { "ImmFLRRsp", 24, 1 }, + { "TxnDisable", 20, 1 }, + { "PndTxns", 8, 10 }, + { "VFVld", 3, 1 }, + { "PFNum", 0, 3 }, + { "PCIE_FUNC_INT_CFG", 0x3420, 0 }, + { "PBAOfst", 28, 4 }, + { "TABOfst", 24, 4 }, + { "VecNum", 12, 10 }, + { "VecBase", 0, 11 }, + { "PCIE_FUNC_CTL_STAT", 0x3424, 0 }, + { "SendFLRRsp", 31, 1 }, + { "ImmFLRRsp", 24, 1 }, + { "TxnDisable", 20, 1 }, + { "PndTxns", 8, 10 }, + { "VFVld", 3, 1 }, + { "PFNum", 0, 3 }, + { "PCIE_FUNC_INT_CFG", 0x3428, 0 }, + { "PBAOfst", 28, 4 }, + { "TABOfst", 24, 4 }, + { "VecNum", 12, 10 }, + { "VecBase", 0, 11 }, + { "PCIE_FUNC_CTL_STAT", 0x342c, 0 }, + { "SendFLRRsp", 31, 1 }, + { "ImmFLRRsp", 24, 1 }, + { "TxnDisable", 20, 1 }, + { "PndTxns", 8, 10 }, + { "VFVld", 3, 1 }, + { "PFNum", 0, 3 }, + { "PCIE_FUNC_INT_CFG", 0x3430, 0 }, + { "PBAOfst", 28, 4 }, + { "TABOfst", 24, 4 }, + { "VecNum", 12, 10 }, + { "VecBase", 0, 11 }, + { "PCIE_FUNC_CTL_STAT", 0x3434, 0 }, + { "SendFLRRsp", 31, 1 }, + { "ImmFLRRsp", 24, 1 }, + { "TxnDisable", 20, 1 }, + { "PndTxns", 8, 10 }, + { "VFVld", 3, 1 }, + { "PFNum", 0, 3 }, + { "PCIE_FUNC_INT_CFG", 0x3438, 0 }, + { "PBAOfst", 28, 4 }, + { "TABOfst", 24, 4 }, + { "VecNum", 12, 10 }, + { "VecBase", 0, 11 }, + { "PCIE_FUNC_CTL_STAT", 0x343c, 0 }, + { "SendFLRRsp", 31, 1 }, + { "ImmFLRRsp", 24, 1 }, + { "TxnDisable", 20, 1 }, + { "PndTxns", 8, 10 }, + { "VFVld", 3, 1 }, + { "PFNum", 0, 3 }, + { "PCIE_FUNC_INT_CFG", 0x3440, 0 }, + { "PBAOfst", 28, 4 }, + { "TABOfst", 24, 4 }, + { "VecNum", 12, 10 }, + { "VecBase", 0, 11 }, + { "PCIE_FUNC_CTL_STAT", 0x3444, 0 }, + { "SendFLRRsp", 31, 1 }, + { "ImmFLRRsp", 24, 1 }, + { "TxnDisable", 20, 1 }, + { "PndTxns", 8, 10 }, + { "VFVld", 3, 1 }, + { "PFNum", 0, 3 }, + { "PCIE_FUNC_INT_CFG", 0x3448, 0 }, + { "PBAOfst", 28, 4 }, + { "TABOfst", 24, 4 }, + { "VecNum", 12, 10 }, + { "VecBase", 0, 11 }, + { "PCIE_FUNC_CTL_STAT", 0x344c, 0 }, + { "SendFLRRsp", 31, 1 }, + { "ImmFLRRsp", 24, 1 }, + { "TxnDisable", 20, 1 }, + { "PndTxns", 8, 10 }, + { "VFVld", 3, 1 }, + { "PFNum", 0, 3 }, + { "PCIE_FUNC_INT_CFG", 0x3450, 0 }, + { "PBAOfst", 28, 4 }, + { "TABOfst", 24, 4 }, + { "VecNum", 12, 10 }, + { "VecBase", 0, 11 }, + { "PCIE_FUNC_CTL_STAT", 0x3454, 0 }, + { "SendFLRRsp", 31, 1 }, + { "ImmFLRRsp", 24, 1 }, + { "TxnDisable", 20, 1 }, + { "PndTxns", 8, 10 }, + { "VFVld", 3, 1 }, + { "PFNum", 0, 3 }, + { "PCIE_FUNC_INT_CFG", 0x3458, 0 }, + { "PBAOfst", 28, 4 }, + { "TABOfst", 24, 4 }, + { "VecNum", 12, 10 }, + { "VecBase", 0, 11 }, + { "PCIE_FUNC_CTL_STAT", 0x345c, 0 }, + { "SendFLRRsp", 31, 1 }, + { "ImmFLRRsp", 24, 1 }, + { "TxnDisable", 20, 1 }, + { "PndTxns", 8, 10 }, + { "VFVld", 3, 1 }, + { "PFNum", 0, 3 }, + { "PCIE_FUNC_INT_CFG", 0x3460, 0 }, + { "PBAOfst", 28, 4 }, + { "TABOfst", 24, 4 }, + { "VecNum", 12, 10 }, + { "VecBase", 0, 11 }, + { "PCIE_FUNC_CTL_STAT", 0x3464, 0 }, + { "SendFLRRsp", 31, 1 }, + { "ImmFLRRsp", 24, 1 }, + { "TxnDisable", 20, 1 }, + { "PndTxns", 8, 10 }, + { "VFVld", 3, 1 }, + { "PFNum", 0, 3 }, + { "PCIE_FUNC_INT_CFG", 0x3468, 0 }, + { "PBAOfst", 28, 4 }, + { "TABOfst", 24, 4 }, + { "VecNum", 12, 10 }, + { "VecBase", 0, 11 }, + { "PCIE_FUNC_CTL_STAT", 0x346c, 0 }, + { "SendFLRRsp", 31, 1 }, + { "ImmFLRRsp", 24, 1 }, + { "TxnDisable", 20, 1 }, + { "PndTxns", 8, 10 }, + { "VFVld", 3, 1 }, + { "PFNum", 0, 3 }, + { "PCIE_FUNC_INT_CFG", 0x3470, 0 }, + { "PBAOfst", 28, 4 }, + { "TABOfst", 24, 4 }, + { "VecNum", 12, 10 }, + { "VecBase", 0, 11 }, + { "PCIE_FUNC_CTL_STAT", 0x3474, 0 }, + { "SendFLRRsp", 31, 1 }, + { "ImmFLRRsp", 24, 1 }, + { "TxnDisable", 20, 1 }, + { "PndTxns", 8, 10 }, + { "VFVld", 3, 1 }, + { "PFNum", 0, 3 }, + { "PCIE_FUNC_INT_CFG", 0x3478, 0 }, + { "PBAOfst", 28, 4 }, + { "TABOfst", 24, 4 }, + { "VecNum", 12, 10 }, + { "VecBase", 0, 11 }, + { "PCIE_FUNC_CTL_STAT", 0x347c, 0 }, + { "SendFLRRsp", 31, 1 }, + { "ImmFLRRsp", 24, 1 }, + { "TxnDisable", 20, 1 }, + { "PndTxns", 8, 10 }, + { "VFVld", 3, 1 }, + { "PFNum", 0, 3 }, + { "PCIE_FUNC_INT_CFG", 0x3480, 0 }, + { "PBAOfst", 28, 4 }, + { "TABOfst", 24, 4 }, + { "VecNum", 12, 10 }, + { "VecBase", 0, 11 }, + { "PCIE_FUNC_CTL_STAT", 0x3484, 0 }, + { "SendFLRRsp", 31, 1 }, + { "ImmFLRRsp", 24, 1 }, + { "TxnDisable", 20, 1 }, + { "PndTxns", 8, 10 }, + { "VFVld", 3, 1 }, + { "PFNum", 0, 3 }, + { "PCIE_FUNC_INT_CFG", 0x3488, 0 }, + { "PBAOfst", 28, 4 }, + { "TABOfst", 24, 4 }, + { "VecNum", 12, 10 }, + { "VecBase", 0, 11 }, + { "PCIE_FUNC_CTL_STAT", 0x348c, 0 }, + { "SendFLRRsp", 31, 1 }, + { "ImmFLRRsp", 24, 1 }, + { "TxnDisable", 20, 1 }, + { "PndTxns", 8, 10 }, + { "VFVld", 3, 1 }, + { "PFNum", 0, 3 }, + { "PCIE_FUNC_INT_CFG", 0x3490, 0 }, + { "PBAOfst", 28, 4 }, + { "TABOfst", 24, 4 }, + { "VecNum", 12, 10 }, + { "VecBase", 0, 11 }, + { "PCIE_FUNC_CTL_STAT", 0x3494, 0 }, + { "SendFLRRsp", 31, 1 }, + { "ImmFLRRsp", 24, 1 }, + { "TxnDisable", 20, 1 }, + { "PndTxns", 8, 10 }, + { "VFVld", 3, 1 }, + { "PFNum", 0, 3 }, + { "PCIE_FUNC_INT_CFG", 0x3498, 0 }, + { "PBAOfst", 28, 4 }, + { "TABOfst", 24, 4 }, + { "VecNum", 12, 10 }, + { "VecBase", 0, 11 }, + { "PCIE_FUNC_CTL_STAT", 0x349c, 0 }, + { "SendFLRRsp", 31, 1 }, + { "ImmFLRRsp", 24, 1 }, + { "TxnDisable", 20, 1 }, + { "PndTxns", 8, 10 }, + { "VFVld", 3, 1 }, + { "PFNum", 0, 3 }, + { "PCIE_FUNC_INT_CFG", 0x34a0, 0 }, + { "PBAOfst", 28, 4 }, + { "TABOfst", 24, 4 }, + { "VecNum", 12, 10 }, + { "VecBase", 0, 11 }, + { "PCIE_FUNC_CTL_STAT", 0x34a4, 0 }, + { "SendFLRRsp", 31, 1 }, + { "ImmFLRRsp", 24, 1 }, + { "TxnDisable", 20, 1 }, + { "PndTxns", 8, 10 }, + { "VFVld", 3, 1 }, + { "PFNum", 0, 3 }, + { "PCIE_FUNC_INT_CFG", 0x34a8, 0 }, + { "PBAOfst", 28, 4 }, + { "TABOfst", 24, 4 }, + { "VecNum", 12, 10 }, + { "VecBase", 0, 11 }, + { "PCIE_FUNC_CTL_STAT", 0x34ac, 0 }, + { "SendFLRRsp", 31, 1 }, + { "ImmFLRRsp", 24, 1 }, + { "TxnDisable", 20, 1 }, + { "PndTxns", 8, 10 }, + { "VFVld", 3, 1 }, + { "PFNum", 0, 3 }, + { "PCIE_FUNC_INT_CFG", 0x34b0, 0 }, + { "PBAOfst", 28, 4 }, + { "TABOfst", 24, 4 }, + { "VecNum", 12, 10 }, + { "VecBase", 0, 11 }, + { "PCIE_FUNC_CTL_STAT", 0x34b4, 0 }, + { "SendFLRRsp", 31, 1 }, + { "ImmFLRRsp", 24, 1 }, + { "TxnDisable", 20, 1 }, + { "PndTxns", 8, 10 }, + { "VFVld", 3, 1 }, + { "PFNum", 0, 3 }, + { "PCIE_FUNC_INT_CFG", 0x34b8, 0 }, + { "PBAOfst", 28, 4 }, + { "TABOfst", 24, 4 }, + { "VecNum", 12, 10 }, + { "VecBase", 0, 11 }, + { "PCIE_FUNC_CTL_STAT", 0x34bc, 0 }, + { "SendFLRRsp", 31, 1 }, + { "ImmFLRRsp", 24, 1 }, + { "TxnDisable", 20, 1 }, + { "PndTxns", 8, 10 }, + { "VFVld", 3, 1 }, + { "PFNum", 0, 3 }, + { "PCIE_FUNC_INT_CFG", 0x34c0, 0 }, + { "PBAOfst", 28, 4 }, + { "TABOfst", 24, 4 }, + { "VecNum", 12, 10 }, + { "VecBase", 0, 11 }, + { "PCIE_FUNC_CTL_STAT", 0x34c4, 0 }, + { "SendFLRRsp", 31, 1 }, + { "ImmFLRRsp", 24, 1 }, + { "TxnDisable", 20, 1 }, + { "PndTxns", 8, 10 }, + { "VFVld", 3, 1 }, + { "PFNum", 0, 3 }, + { "PCIE_FUNC_INT_CFG", 0x34c8, 0 }, + { "PBAOfst", 28, 4 }, + { "TABOfst", 24, 4 }, + { "VecNum", 12, 10 }, + { "VecBase", 0, 11 }, + { "PCIE_FUNC_CTL_STAT", 0x34cc, 0 }, + { "SendFLRRsp", 31, 1 }, + { "ImmFLRRsp", 24, 1 }, + { "TxnDisable", 20, 1 }, + { "PndTxns", 8, 10 }, + { "VFVld", 3, 1 }, + { "PFNum", 0, 3 }, + { "PCIE_FUNC_INT_CFG", 0x34d0, 0 }, + { "PBAOfst", 28, 4 }, + { "TABOfst", 24, 4 }, + { "VecNum", 12, 10 }, + { "VecBase", 0, 11 }, + { "PCIE_FUNC_CTL_STAT", 0x34d4, 0 }, + { "SendFLRRsp", 31, 1 }, + { "ImmFLRRsp", 24, 1 }, + { "TxnDisable", 20, 1 }, + { "PndTxns", 8, 10 }, + { "VFVld", 3, 1 }, + { "PFNum", 0, 3 }, + { "PCIE_FUNC_INT_CFG", 0x34d8, 0 }, + { "PBAOfst", 28, 4 }, + { "TABOfst", 24, 4 }, + { "VecNum", 12, 10 }, + { "VecBase", 0, 11 }, + { "PCIE_FUNC_CTL_STAT", 0x34dc, 0 }, + { "SendFLRRsp", 31, 1 }, + { "ImmFLRRsp", 24, 1 }, + { "TxnDisable", 20, 1 }, + { "PndTxns", 8, 10 }, + { "VFVld", 3, 1 }, + { "PFNum", 0, 3 }, + { "PCIE_FUNC_INT_CFG", 0x34e0, 0 }, + { "PBAOfst", 28, 4 }, + { "TABOfst", 24, 4 }, + { "VecNum", 12, 10 }, + { "VecBase", 0, 11 }, + { "PCIE_FUNC_CTL_STAT", 0x34e4, 0 }, + { "SendFLRRsp", 31, 1 }, + { "ImmFLRRsp", 24, 1 }, + { "TxnDisable", 20, 1 }, + { "PndTxns", 8, 10 }, + { "VFVld", 3, 1 }, + { "PFNum", 0, 3 }, + { "PCIE_FUNC_INT_CFG", 0x34e8, 0 }, + { "PBAOfst", 28, 4 }, + { "TABOfst", 24, 4 }, + { "VecNum", 12, 10 }, + { "VecBase", 0, 11 }, + { "PCIE_FUNC_CTL_STAT", 0x34ec, 0 }, + { "SendFLRRsp", 31, 1 }, + { "ImmFLRRsp", 24, 1 }, + { "TxnDisable", 20, 1 }, + { "PndTxns", 8, 10 }, + { "VFVld", 3, 1 }, + { "PFNum", 0, 3 }, + { "PCIE_FUNC_INT_CFG", 0x34f0, 0 }, + { "PBAOfst", 28, 4 }, + { "TABOfst", 24, 4 }, + { "VecNum", 12, 10 }, + { "VecBase", 0, 11 }, + { "PCIE_FUNC_CTL_STAT", 0x34f4, 0 }, + { "SendFLRRsp", 31, 1 }, + { "ImmFLRRsp", 24, 1 }, + { "TxnDisable", 20, 1 }, + { "PndTxns", 8, 10 }, + { "VFVld", 3, 1 }, + { "PFNum", 0, 3 }, + { "PCIE_FUNC_INT_CFG", 0x34f8, 0 }, + { "PBAOfst", 28, 4 }, + { "TABOfst", 24, 4 }, + { "VecNum", 12, 10 }, + { "VecBase", 0, 11 }, + { "PCIE_FUNC_CTL_STAT", 0x34fc, 0 }, + { "SendFLRRsp", 31, 1 }, + { "ImmFLRRsp", 24, 1 }, + { "TxnDisable", 20, 1 }, + { "PndTxns", 8, 10 }, + { "VFVld", 3, 1 }, + { "PFNum", 0, 3 }, + { "PCIE_FUNC_INT_CFG", 0x3500, 0 }, + { "PBAOfst", 28, 4 }, + { "TABOfst", 24, 4 }, + { "VecNum", 12, 10 }, + { "VecBase", 0, 11 }, + { "PCIE_FUNC_CTL_STAT", 0x3504, 0 }, + { "SendFLRRsp", 31, 1 }, + { "ImmFLRRsp", 24, 1 }, + { "TxnDisable", 20, 1 }, + { "PndTxns", 8, 10 }, + { "VFVld", 3, 1 }, + { "PFNum", 0, 3 }, + { "PCIE_FUNC_INT_CFG", 0x3508, 0 }, + { "PBAOfst", 28, 4 }, + { "TABOfst", 24, 4 }, + { "VecNum", 12, 10 }, + { "VecBase", 0, 11 }, + { "PCIE_FUNC_CTL_STAT", 0x350c, 0 }, + { "SendFLRRsp", 31, 1 }, + { "ImmFLRRsp", 24, 1 }, + { "TxnDisable", 20, 1 }, + { "PndTxns", 8, 10 }, + { "VFVld", 3, 1 }, + { "PFNum", 0, 3 }, + { "PCIE_FUNC_INT_CFG", 0x3510, 0 }, + { "PBAOfst", 28, 4 }, + { "TABOfst", 24, 4 }, + { "VecNum", 12, 10 }, + { "VecBase", 0, 11 }, + { "PCIE_FUNC_CTL_STAT", 0x3514, 0 }, + { "SendFLRRsp", 31, 1 }, + { "ImmFLRRsp", 24, 1 }, + { "TxnDisable", 20, 1 }, + { "PndTxns", 8, 10 }, + { "VFVld", 3, 1 }, + { "PFNum", 0, 3 }, + { "PCIE_FUNC_INT_CFG", 0x3518, 0 }, + { "PBAOfst", 28, 4 }, + { "TABOfst", 24, 4 }, + { "VecNum", 12, 10 }, + { "VecBase", 0, 11 }, + { "PCIE_FUNC_CTL_STAT", 0x351c, 0 }, + { "SendFLRRsp", 31, 1 }, + { "ImmFLRRsp", 24, 1 }, + { "TxnDisable", 20, 1 }, + { "PndTxns", 8, 10 }, + { "VFVld", 3, 1 }, + { "PFNum", 0, 3 }, + { "PCIE_FUNC_INT_CFG", 0x3520, 0 }, + { "PBAOfst", 28, 4 }, + { "TABOfst", 24, 4 }, + { "VecNum", 12, 10 }, + { "VecBase", 0, 11 }, + { "PCIE_FUNC_CTL_STAT", 0x3524, 0 }, + { "SendFLRRsp", 31, 1 }, + { "ImmFLRRsp", 24, 1 }, + { "TxnDisable", 20, 1 }, + { "PndTxns", 8, 10 }, + { "VFVld", 3, 1 }, + { "PFNum", 0, 3 }, + { "PCIE_FUNC_INT_CFG", 0x3528, 0 }, + { "PBAOfst", 28, 4 }, + { "TABOfst", 24, 4 }, + { "VecNum", 12, 10 }, + { "VecBase", 0, 11 }, + { "PCIE_FUNC_CTL_STAT", 0x352c, 0 }, + { "SendFLRRsp", 31, 1 }, + { "ImmFLRRsp", 24, 1 }, + { "TxnDisable", 20, 1 }, + { "PndTxns", 8, 10 }, + { "VFVld", 3, 1 }, + { "PFNum", 0, 3 }, + { "PCIE_FUNC_INT_CFG", 0x3530, 0 }, + { "PBAOfst", 28, 4 }, + { "TABOfst", 24, 4 }, + { "VecNum", 12, 10 }, + { "VecBase", 0, 11 }, + { "PCIE_FUNC_CTL_STAT", 0x3534, 0 }, + { "SendFLRRsp", 31, 1 }, + { "ImmFLRRsp", 24, 1 }, + { "TxnDisable", 20, 1 }, + { "PndTxns", 8, 10 }, + { "VFVld", 3, 1 }, + { "PFNum", 0, 3 }, + { "PCIE_FUNC_INT_CFG", 0x3538, 0 }, + { "PBAOfst", 28, 4 }, + { "TABOfst", 24, 4 }, + { "VecNum", 12, 10 }, + { "VecBase", 0, 11 }, + { "PCIE_FUNC_CTL_STAT", 0x353c, 0 }, + { "SendFLRRsp", 31, 1 }, + { "ImmFLRRsp", 24, 1 }, + { "TxnDisable", 20, 1 }, + { "PndTxns", 8, 10 }, + { "VFVld", 3, 1 }, + { "PFNum", 0, 3 }, + { "PCIE_FUNC_INT_CFG", 0x3540, 0 }, + { "PBAOfst", 28, 4 }, + { "TABOfst", 24, 4 }, + { "VecNum", 12, 10 }, + { "VecBase", 0, 11 }, + { "PCIE_FUNC_CTL_STAT", 0x3544, 0 }, + { "SendFLRRsp", 31, 1 }, + { "ImmFLRRsp", 24, 1 }, + { "TxnDisable", 20, 1 }, + { "PndTxns", 8, 10 }, + { "VFVld", 3, 1 }, + { "PFNum", 0, 3 }, + { "PCIE_FUNC_INT_CFG", 0x3548, 0 }, + { "PBAOfst", 28, 4 }, + { "TABOfst", 24, 4 }, + { "VecNum", 12, 10 }, + { "VecBase", 0, 11 }, + { "PCIE_FUNC_CTL_STAT", 0x354c, 0 }, + { "SendFLRRsp", 31, 1 }, + { "ImmFLRRsp", 24, 1 }, + { "TxnDisable", 20, 1 }, + { "PndTxns", 8, 10 }, + { "VFVld", 3, 1 }, + { "PFNum", 0, 3 }, + { "PCIE_FUNC_INT_CFG", 0x3550, 0 }, + { "PBAOfst", 28, 4 }, + { "TABOfst", 24, 4 }, + { "VecNum", 12, 10 }, + { "VecBase", 0, 11 }, + { "PCIE_FUNC_CTL_STAT", 0x3554, 0 }, + { "SendFLRRsp", 31, 1 }, + { "ImmFLRRsp", 24, 1 }, + { "TxnDisable", 20, 1 }, + { "PndTxns", 8, 10 }, + { "VFVld", 3, 1 }, + { "PFNum", 0, 3 }, + { "PCIE_FUNC_INT_CFG", 0x3558, 0 }, + { "PBAOfst", 28, 4 }, + { "TABOfst", 24, 4 }, + { "VecNum", 12, 10 }, + { "VecBase", 0, 11 }, + { "PCIE_FUNC_CTL_STAT", 0x355c, 0 }, + { "SendFLRRsp", 31, 1 }, + { "ImmFLRRsp", 24, 1 }, + { "TxnDisable", 20, 1 }, + { "PndTxns", 8, 10 }, + { "VFVld", 3, 1 }, + { "PFNum", 0, 3 }, + { "PCIE_FUNC_INT_CFG", 0x3560, 0 }, + { "PBAOfst", 28, 4 }, + { "TABOfst", 24, 4 }, + { "VecNum", 12, 10 }, + { "VecBase", 0, 11 }, + { "PCIE_FUNC_CTL_STAT", 0x3564, 0 }, + { "SendFLRRsp", 31, 1 }, + { "ImmFLRRsp", 24, 1 }, + { "TxnDisable", 20, 1 }, + { "PndTxns", 8, 10 }, + { "VFVld", 3, 1 }, + { "PFNum", 0, 3 }, + { "PCIE_FUNC_INT_CFG", 0x3568, 0 }, + { "PBAOfst", 28, 4 }, + { "TABOfst", 24, 4 }, + { "VecNum", 12, 10 }, + { "VecBase", 0, 11 }, + { "PCIE_FUNC_CTL_STAT", 0x356c, 0 }, + { "SendFLRRsp", 31, 1 }, + { "ImmFLRRsp", 24, 1 }, + { "TxnDisable", 20, 1 }, + { "PndTxns", 8, 10 }, + { "VFVld", 3, 1 }, + { "PFNum", 0, 3 }, + { "PCIE_FUNC_INT_CFG", 0x3570, 0 }, + { "PBAOfst", 28, 4 }, + { "TABOfst", 24, 4 }, + { "VecNum", 12, 10 }, + { "VecBase", 0, 11 }, + { "PCIE_FUNC_CTL_STAT", 0x3574, 0 }, + { "SendFLRRsp", 31, 1 }, + { "ImmFLRRsp", 24, 1 }, + { "TxnDisable", 20, 1 }, + { "PndTxns", 8, 10 }, + { "VFVld", 3, 1 }, + { "PFNum", 0, 3 }, + { "PCIE_FUNC_INT_CFG", 0x3578, 0 }, + { "PBAOfst", 28, 4 }, + { "TABOfst", 24, 4 }, + { "VecNum", 12, 10 }, + { "VecBase", 0, 11 }, + { "PCIE_FUNC_CTL_STAT", 0x357c, 0 }, + { "SendFLRRsp", 31, 1 }, + { "ImmFLRRsp", 24, 1 }, + { "TxnDisable", 20, 1 }, + { "PndTxns", 8, 10 }, + { "VFVld", 3, 1 }, + { "PFNum", 0, 3 }, + { "PCIE_FUNC_INT_CFG", 0x3580, 0 }, + { "PBAOfst", 28, 4 }, + { "TABOfst", 24, 4 }, + { "VecNum", 12, 10 }, + { "VecBase", 0, 11 }, + { "PCIE_FUNC_CTL_STAT", 0x3584, 0 }, + { "SendFLRRsp", 31, 1 }, + { "ImmFLRRsp", 24, 1 }, + { "TxnDisable", 20, 1 }, + { "PndTxns", 8, 10 }, + { "VFVld", 3, 1 }, + { "PFNum", 0, 3 }, + { "PCIE_FUNC_INT_CFG", 0x3588, 0 }, + { "PBAOfst", 28, 4 }, + { "TABOfst", 24, 4 }, + { "VecNum", 12, 10 }, + { "VecBase", 0, 11 }, + { "PCIE_FUNC_CTL_STAT", 0x358c, 0 }, + { "SendFLRRsp", 31, 1 }, + { "ImmFLRRsp", 24, 1 }, + { "TxnDisable", 20, 1 }, + { "PndTxns", 8, 10 }, + { "VFVld", 3, 1 }, + { "PFNum", 0, 3 }, + { "PCIE_FUNC_INT_CFG", 0x3590, 0 }, + { "PBAOfst", 28, 4 }, + { "TABOfst", 24, 4 }, + { "VecNum", 12, 10 }, + { "VecBase", 0, 11 }, + { "PCIE_FUNC_CTL_STAT", 0x3594, 0 }, + { "SendFLRRsp", 31, 1 }, + { "ImmFLRRsp", 24, 1 }, + { "TxnDisable", 20, 1 }, + { "PndTxns", 8, 10 }, + { "VFVld", 3, 1 }, + { "PFNum", 0, 3 }, + { "PCIE_FUNC_INT_CFG", 0x3598, 0 }, + { "PBAOfst", 28, 4 }, + { "TABOfst", 24, 4 }, + { "VecNum", 12, 10 }, + { "VecBase", 0, 11 }, + { "PCIE_FUNC_CTL_STAT", 0x359c, 0 }, + { "SendFLRRsp", 31, 1 }, + { "ImmFLRRsp", 24, 1 }, + { "TxnDisable", 20, 1 }, + { "PndTxns", 8, 10 }, + { "VFVld", 3, 1 }, + { "PFNum", 0, 3 }, + { "PCIE_FUNC_INT_CFG", 0x35a0, 0 }, + { "PBAOfst", 28, 4 }, + { "TABOfst", 24, 4 }, + { "VecNum", 12, 10 }, + { "VecBase", 0, 11 }, + { "PCIE_FUNC_CTL_STAT", 0x35a4, 0 }, + { "SendFLRRsp", 31, 1 }, + { "ImmFLRRsp", 24, 1 }, + { "TxnDisable", 20, 1 }, + { "PndTxns", 8, 10 }, + { "VFVld", 3, 1 }, + { "PFNum", 0, 3 }, + { "PCIE_FUNC_INT_CFG", 0x35a8, 0 }, + { "PBAOfst", 28, 4 }, + { "TABOfst", 24, 4 }, + { "VecNum", 12, 10 }, + { "VecBase", 0, 11 }, + { "PCIE_FUNC_CTL_STAT", 0x35ac, 0 }, + { "SendFLRRsp", 31, 1 }, + { "ImmFLRRsp", 24, 1 }, + { "TxnDisable", 20, 1 }, + { "PndTxns", 8, 10 }, + { "VFVld", 3, 1 }, + { "PFNum", 0, 3 }, + { "PCIE_FUNC_INT_CFG", 0x35b0, 0 }, + { "PBAOfst", 28, 4 }, + { "TABOfst", 24, 4 }, + { "VecNum", 12, 10 }, + { "VecBase", 0, 11 }, + { "PCIE_FUNC_CTL_STAT", 0x35b4, 0 }, + { "SendFLRRsp", 31, 1 }, + { "ImmFLRRsp", 24, 1 }, + { "TxnDisable", 20, 1 }, + { "PndTxns", 8, 10 }, + { "VFVld", 3, 1 }, + { "PFNum", 0, 3 }, + { "PCIE_FUNC_INT_CFG", 0x35b8, 0 }, + { "PBAOfst", 28, 4 }, + { "TABOfst", 24, 4 }, + { "VecNum", 12, 10 }, + { "VecBase", 0, 11 }, + { "PCIE_FUNC_CTL_STAT", 0x35bc, 0 }, + { "SendFLRRsp", 31, 1 }, + { "ImmFLRRsp", 24, 1 }, + { "TxnDisable", 20, 1 }, + { "PndTxns", 8, 10 }, + { "VFVld", 3, 1 }, + { "PFNum", 0, 3 }, + { "PCIE_FUNC_INT_CFG", 0x35c0, 0 }, + { "PBAOfst", 28, 4 }, + { "TABOfst", 24, 4 }, + { "VecNum", 12, 10 }, + { "VecBase", 0, 11 }, + { "PCIE_FUNC_CTL_STAT", 0x35c4, 0 }, + { "SendFLRRsp", 31, 1 }, + { "ImmFLRRsp", 24, 1 }, + { "TxnDisable", 20, 1 }, + { "PndTxns", 8, 10 }, + { "VFVld", 3, 1 }, + { "PFNum", 0, 3 }, + { "PCIE_FUNC_INT_CFG", 0x35c8, 0 }, + { "PBAOfst", 28, 4 }, + { "TABOfst", 24, 4 }, + { "VecNum", 12, 10 }, + { "VecBase", 0, 11 }, + { "PCIE_FUNC_CTL_STAT", 0x35cc, 0 }, + { "SendFLRRsp", 31, 1 }, + { "ImmFLRRsp", 24, 1 }, + { "TxnDisable", 20, 1 }, + { "PndTxns", 8, 10 }, + { "VFVld", 3, 1 }, + { "PFNum", 0, 3 }, + { "PCIE_FUNC_INT_CFG", 0x35d0, 0 }, + { "PBAOfst", 28, 4 }, + { "TABOfst", 24, 4 }, + { "VecNum", 12, 10 }, + { "VecBase", 0, 11 }, + { "PCIE_FUNC_CTL_STAT", 0x35d4, 0 }, + { "SendFLRRsp", 31, 1 }, + { "ImmFLRRsp", 24, 1 }, + { "TxnDisable", 20, 1 }, + { "PndTxns", 8, 10 }, + { "VFVld", 3, 1 }, + { "PFNum", 0, 3 }, + { "PCIE_FUNC_INT_CFG", 0x35d8, 0 }, + { "PBAOfst", 28, 4 }, + { "TABOfst", 24, 4 }, + { "VecNum", 12, 10 }, + { "VecBase", 0, 11 }, + { "PCIE_FUNC_CTL_STAT", 0x35dc, 0 }, + { "SendFLRRsp", 31, 1 }, + { "ImmFLRRsp", 24, 1 }, + { "TxnDisable", 20, 1 }, + { "PndTxns", 8, 10 }, + { "VFVld", 3, 1 }, + { "PFNum", 0, 3 }, + { "PCIE_FUNC_INT_CFG", 0x35e0, 0 }, + { "PBAOfst", 28, 4 }, + { "TABOfst", 24, 4 }, + { "VecNum", 12, 10 }, + { "VecBase", 0, 11 }, + { "PCIE_FUNC_CTL_STAT", 0x35e4, 0 }, + { "SendFLRRsp", 31, 1 }, + { "ImmFLRRsp", 24, 1 }, + { "TxnDisable", 20, 1 }, + { "PndTxns", 8, 10 }, + { "VFVld", 3, 1 }, + { "PFNum", 0, 3 }, + { "PCIE_FUNC_INT_CFG", 0x35e8, 0 }, + { "PBAOfst", 28, 4 }, + { "TABOfst", 24, 4 }, + { "VecNum", 12, 10 }, + { "VecBase", 0, 11 }, + { "PCIE_FUNC_CTL_STAT", 0x35ec, 0 }, + { "SendFLRRsp", 31, 1 }, + { "ImmFLRRsp", 24, 1 }, + { "TxnDisable", 20, 1 }, + { "PndTxns", 8, 10 }, + { "VFVld", 3, 1 }, + { "PFNum", 0, 3 }, + { "PCIE_FUNC_INT_CFG", 0x35f0, 0 }, + { "PBAOfst", 28, 4 }, + { "TABOfst", 24, 4 }, + { "VecNum", 12, 10 }, + { "VecBase", 0, 11 }, + { "PCIE_FUNC_CTL_STAT", 0x35f4, 0 }, + { "SendFLRRsp", 31, 1 }, + { "ImmFLRRsp", 24, 1 }, + { "TxnDisable", 20, 1 }, + { "PndTxns", 8, 10 }, + { "VFVld", 3, 1 }, + { "PFNum", 0, 3 }, + { "PCIE_FUNC_INT_CFG", 0x35f8, 0 }, + { "PBAOfst", 28, 4 }, + { "TABOfst", 24, 4 }, + { "VecNum", 12, 10 }, + { "VecBase", 0, 11 }, + { "PCIE_FUNC_CTL_STAT", 0x35fc, 0 }, + { "SendFLRRsp", 31, 1 }, + { "ImmFLRRsp", 24, 1 }, + { "TxnDisable", 20, 1 }, + { "PndTxns", 8, 10 }, + { "VFVld", 3, 1 }, + { "PFNum", 0, 3 }, + { "PCIE_FUNC_INT_CFG", 0x3600, 0 }, + { "PBAOfst", 28, 4 }, + { "TABOfst", 24, 4 }, + { "VecNum", 12, 10 }, + { "VecBase", 0, 11 }, + { "PCIE_FUNC_CTL_STAT", 0x3604, 0 }, + { "SendFLRRsp", 31, 1 }, + { "ImmFLRRsp", 24, 1 }, + { "TxnDisable", 20, 1 }, + { "PndTxns", 8, 10 }, + { "VFVld", 3, 1 }, + { "PFNum", 0, 3 }, + { "PCIE_FUNC_INT_CFG", 0x3608, 0 }, + { "PBAOfst", 28, 4 }, + { "TABOfst", 24, 4 }, + { "VecNum", 12, 10 }, + { "VecBase", 0, 11 }, + { "PCIE_FUNC_CTL_STAT", 0x360c, 0 }, + { "SendFLRRsp", 31, 1 }, + { "ImmFLRRsp", 24, 1 }, + { "TxnDisable", 20, 1 }, + { "PndTxns", 8, 10 }, + { "VFVld", 3, 1 }, + { "PFNum", 0, 3 }, + { "PCIE_FUNC_INT_CFG", 0x3610, 0 }, + { "PBAOfst", 28, 4 }, + { "TABOfst", 24, 4 }, + { "VecNum", 12, 10 }, + { "VecBase", 0, 11 }, + { "PCIE_FUNC_CTL_STAT", 0x3614, 0 }, + { "SendFLRRsp", 31, 1 }, + { "ImmFLRRsp", 24, 1 }, + { "TxnDisable", 20, 1 }, + { "PndTxns", 8, 10 }, + { "VFVld", 3, 1 }, + { "PFNum", 0, 3 }, + { "PCIE_FUNC_INT_CFG", 0x3618, 0 }, + { "PBAOfst", 28, 4 }, + { "TABOfst", 24, 4 }, + { "VecNum", 12, 10 }, + { "VecBase", 0, 11 }, + { "PCIE_FUNC_CTL_STAT", 0x361c, 0 }, + { "SendFLRRsp", 31, 1 }, + { "ImmFLRRsp", 24, 1 }, + { "TxnDisable", 20, 1 }, + { "PndTxns", 8, 10 }, + { "VFVld", 3, 1 }, + { "PFNum", 0, 3 }, + { "PCIE_FUNC_INT_CFG", 0x3620, 0 }, + { "PBAOfst", 28, 4 }, + { "TABOfst", 24, 4 }, + { "VecNum", 12, 10 }, + { "VecBase", 0, 11 }, + { "PCIE_FUNC_CTL_STAT", 0x3624, 0 }, + { "SendFLRRsp", 31, 1 }, + { "ImmFLRRsp", 24, 1 }, + { "TxnDisable", 20, 1 }, + { "PndTxns", 8, 10 }, + { "VFVld", 3, 1 }, + { "PFNum", 0, 3 }, + { "PCIE_FUNC_INT_CFG", 0x3628, 0 }, + { "PBAOfst", 28, 4 }, + { "TABOfst", 24, 4 }, + { "VecNum", 12, 10 }, + { "VecBase", 0, 11 }, + { "PCIE_FUNC_CTL_STAT", 0x362c, 0 }, + { "SendFLRRsp", 31, 1 }, + { "ImmFLRRsp", 24, 1 }, + { "TxnDisable", 20, 1 }, + { "PndTxns", 8, 10 }, + { "VFVld", 3, 1 }, + { "PFNum", 0, 3 }, + { "PCIE_FUNC_INT_CFG", 0x3630, 0 }, + { "PBAOfst", 28, 4 }, + { "TABOfst", 24, 4 }, + { "VecNum", 12, 10 }, + { "VecBase", 0, 11 }, + { "PCIE_FUNC_CTL_STAT", 0x3634, 0 }, + { "SendFLRRsp", 31, 1 }, + { "ImmFLRRsp", 24, 1 }, + { "TxnDisable", 20, 1 }, + { "PndTxns", 8, 10 }, + { "VFVld", 3, 1 }, + { "PFNum", 0, 3 }, + { "PCIE_FUNC_INT_CFG", 0x3638, 0 }, + { "PBAOfst", 28, 4 }, + { "TABOfst", 24, 4 }, + { "VecNum", 12, 10 }, + { "VecBase", 0, 11 }, + { "PCIE_FUNC_CTL_STAT", 0x363c, 0 }, + { "SendFLRRsp", 31, 1 }, + { "ImmFLRRsp", 24, 1 }, + { "TxnDisable", 20, 1 }, + { "PndTxns", 8, 10 }, + { "VFVld", 3, 1 }, + { "PFNum", 0, 3 }, + { "PCIE_FUNC_INT_CFG", 0x3640, 0 }, + { "PBAOfst", 28, 4 }, + { "TABOfst", 24, 4 }, + { "VecNum", 12, 10 }, + { "VecBase", 0, 11 }, + { "PCIE_FUNC_CTL_STAT", 0x3644, 0 }, + { "SendFLRRsp", 31, 1 }, + { "ImmFLRRsp", 24, 1 }, + { "TxnDisable", 20, 1 }, + { "PndTxns", 8, 10 }, + { "VFVld", 3, 1 }, + { "PFNum", 0, 3 }, + { "PCIE_FUNC_INT_CFG", 0x3648, 0 }, + { "PBAOfst", 28, 4 }, + { "TABOfst", 24, 4 }, + { "VecNum", 12, 10 }, + { "VecBase", 0, 11 }, + { "PCIE_FUNC_CTL_STAT", 0x364c, 0 }, + { "SendFLRRsp", 31, 1 }, + { "ImmFLRRsp", 24, 1 }, + { "TxnDisable", 20, 1 }, + { "PndTxns", 8, 10 }, + { "VFVld", 3, 1 }, + { "PFNum", 0, 3 }, + { "PCIE_FUNC_INT_CFG", 0x3650, 0 }, + { "PBAOfst", 28, 4 }, + { "TABOfst", 24, 4 }, + { "VecNum", 12, 10 }, + { "VecBase", 0, 11 }, + { "PCIE_FUNC_CTL_STAT", 0x3654, 0 }, + { "SendFLRRsp", 31, 1 }, + { "ImmFLRRsp", 24, 1 }, + { "TxnDisable", 20, 1 }, + { "PndTxns", 8, 10 }, + { "VFVld", 3, 1 }, + { "PFNum", 0, 3 }, + { "PCIE_FUNC_INT_CFG", 0x3658, 0 }, + { "PBAOfst", 28, 4 }, + { "TABOfst", 24, 4 }, + { "VecNum", 12, 10 }, + { "VecBase", 0, 11 }, + { "PCIE_FUNC_CTL_STAT", 0x365c, 0 }, + { "SendFLRRsp", 31, 1 }, + { "ImmFLRRsp", 24, 1 }, + { "TxnDisable", 20, 1 }, + { "PndTxns", 8, 10 }, + { "VFVld", 3, 1 }, + { "PFNum", 0, 3 }, + { "PCIE_FUNC_INT_CFG", 0x3660, 0 }, + { "PBAOfst", 28, 4 }, + { "TABOfst", 24, 4 }, + { "VecNum", 12, 10 }, + { "VecBase", 0, 11 }, + { "PCIE_FUNC_CTL_STAT", 0x3664, 0 }, + { "SendFLRRsp", 31, 1 }, + { "ImmFLRRsp", 24, 1 }, + { "TxnDisable", 20, 1 }, + { "PndTxns", 8, 10 }, + { "VFVld", 3, 1 }, + { "PFNum", 0, 3 }, + { "PCIE_FUNC_INT_CFG", 0x3668, 0 }, + { "PBAOfst", 28, 4 }, + { "TABOfst", 24, 4 }, + { "VecNum", 12, 10 }, + { "VecBase", 0, 11 }, + { "PCIE_FUNC_CTL_STAT", 0x366c, 0 }, + { "SendFLRRsp", 31, 1 }, + { "ImmFLRRsp", 24, 1 }, + { "TxnDisable", 20, 1 }, + { "PndTxns", 8, 10 }, + { "VFVld", 3, 1 }, + { "PFNum", 0, 3 }, + { "PCIE_FUNC_INT_CFG", 0x3670, 0 }, + { "PBAOfst", 28, 4 }, + { "TABOfst", 24, 4 }, + { "VecNum", 12, 10 }, + { "VecBase", 0, 11 }, + { "PCIE_FUNC_CTL_STAT", 0x3674, 0 }, + { "SendFLRRsp", 31, 1 }, + { "ImmFLRRsp", 24, 1 }, + { "TxnDisable", 20, 1 }, + { "PndTxns", 8, 10 }, + { "VFVld", 3, 1 }, + { "PFNum", 0, 3 }, + { "PCIE_FUNC_INT_CFG", 0x3678, 0 }, + { "PBAOfst", 28, 4 }, + { "TABOfst", 24, 4 }, + { "VecNum", 12, 10 }, + { "VecBase", 0, 11 }, + { "PCIE_FUNC_CTL_STAT", 0x367c, 0 }, + { "SendFLRRsp", 31, 1 }, + { "ImmFLRRsp", 24, 1 }, + { "TxnDisable", 20, 1 }, + { "PndTxns", 8, 10 }, + { "VFVld", 3, 1 }, + { "PFNum", 0, 3 }, + { "PCIE_FUNC_INT_CFG", 0x3680, 0 }, + { "PBAOfst", 28, 4 }, + { "TABOfst", 24, 4 }, + { "VecNum", 12, 10 }, + { "VecBase", 0, 11 }, + { "PCIE_FUNC_CTL_STAT", 0x3684, 0 }, + { "SendFLRRsp", 31, 1 }, + { "ImmFLRRsp", 24, 1 }, + { "TxnDisable", 20, 1 }, + { "PndTxns", 8, 10 }, + { "VFVld", 3, 1 }, + { "PFNum", 0, 3 }, + { "PCIE_FUNC_INT_CFG", 0x3688, 0 }, + { "PBAOfst", 28, 4 }, + { "TABOfst", 24, 4 }, + { "VecNum", 12, 10 }, + { "VecBase", 0, 11 }, + { "PCIE_FUNC_CTL_STAT", 0x368c, 0 }, + { "SendFLRRsp", 31, 1 }, + { "ImmFLRRsp", 24, 1 }, + { "TxnDisable", 20, 1 }, + { "PndTxns", 8, 10 }, + { "VFVld", 3, 1 }, + { "PFNum", 0, 3 }, + { "PCIE_FUNC_INT_CFG", 0x3690, 0 }, + { "PBAOfst", 28, 4 }, + { "TABOfst", 24, 4 }, + { "VecNum", 12, 10 }, + { "VecBase", 0, 11 }, + { "PCIE_FUNC_CTL_STAT", 0x3694, 0 }, + { "SendFLRRsp", 31, 1 }, + { "ImmFLRRsp", 24, 1 }, + { "TxnDisable", 20, 1 }, + { "PndTxns", 8, 10 }, + { "VFVld", 3, 1 }, + { "PFNum", 0, 3 }, + { "PCIE_FUNC_INT_CFG", 0x3698, 0 }, + { "PBAOfst", 28, 4 }, + { "TABOfst", 24, 4 }, + { "VecNum", 12, 10 }, + { "VecBase", 0, 11 }, + { "PCIE_FUNC_CTL_STAT", 0x369c, 0 }, + { "SendFLRRsp", 31, 1 }, + { "ImmFLRRsp", 24, 1 }, + { "TxnDisable", 20, 1 }, + { "PndTxns", 8, 10 }, + { "VFVld", 3, 1 }, + { "PFNum", 0, 3 }, + { "PCIE_FUNC_INT_CFG", 0x36a0, 0 }, + { "PBAOfst", 28, 4 }, + { "TABOfst", 24, 4 }, + { "VecNum", 12, 10 }, + { "VecBase", 0, 11 }, + { "PCIE_FUNC_CTL_STAT", 0x36a4, 0 }, + { "SendFLRRsp", 31, 1 }, + { "ImmFLRRsp", 24, 1 }, + { "TxnDisable", 20, 1 }, + { "PndTxns", 8, 10 }, + { "VFVld", 3, 1 }, + { "PFNum", 0, 3 }, + { "PCIE_FUNC_INT_CFG", 0x36a8, 0 }, + { "PBAOfst", 28, 4 }, + { "TABOfst", 24, 4 }, + { "VecNum", 12, 10 }, + { "VecBase", 0, 11 }, + { "PCIE_FUNC_CTL_STAT", 0x36ac, 0 }, + { "SendFLRRsp", 31, 1 }, + { "ImmFLRRsp", 24, 1 }, + { "TxnDisable", 20, 1 }, + { "PndTxns", 8, 10 }, + { "VFVld", 3, 1 }, + { "PFNum", 0, 3 }, + { "PCIE_FUNC_INT_CFG", 0x36b0, 0 }, + { "PBAOfst", 28, 4 }, + { "TABOfst", 24, 4 }, + { "VecNum", 12, 10 }, + { "VecBase", 0, 11 }, + { "PCIE_FUNC_CTL_STAT", 0x36b4, 0 }, + { "SendFLRRsp", 31, 1 }, + { "ImmFLRRsp", 24, 1 }, + { "TxnDisable", 20, 1 }, + { "PndTxns", 8, 10 }, + { "VFVld", 3, 1 }, + { "PFNum", 0, 3 }, + { "PCIE_FUNC_INT_CFG", 0x36b8, 0 }, + { "PBAOfst", 28, 4 }, + { "TABOfst", 24, 4 }, + { "VecNum", 12, 10 }, + { "VecBase", 0, 11 }, + { "PCIE_FUNC_CTL_STAT", 0x36bc, 0 }, + { "SendFLRRsp", 31, 1 }, + { "ImmFLRRsp", 24, 1 }, + { "TxnDisable", 20, 1 }, + { "PndTxns", 8, 10 }, + { "VFVld", 3, 1 }, + { "PFNum", 0, 3 }, + { "PCIE_FUNC_INT_CFG", 0x36c0, 0 }, + { "PBAOfst", 28, 4 }, + { "TABOfst", 24, 4 }, + { "VecNum", 12, 10 }, + { "VecBase", 0, 11 }, + { "PCIE_FUNC_CTL_STAT", 0x36c4, 0 }, + { "SendFLRRsp", 31, 1 }, + { "ImmFLRRsp", 24, 1 }, + { "TxnDisable", 20, 1 }, + { "PndTxns", 8, 10 }, + { "VFVld", 3, 1 }, + { "PFNum", 0, 3 }, + { "PCIE_FUNC_INT_CFG", 0x36c8, 0 }, + { "PBAOfst", 28, 4 }, + { "TABOfst", 24, 4 }, + { "VecNum", 12, 10 }, + { "VecBase", 0, 11 }, + { "PCIE_FUNC_CTL_STAT", 0x36cc, 0 }, + { "SendFLRRsp", 31, 1 }, + { "ImmFLRRsp", 24, 1 }, + { "TxnDisable", 20, 1 }, + { "PndTxns", 8, 10 }, + { "VFVld", 3, 1 }, + { "PFNum", 0, 3 }, + { "PCIE_FUNC_INT_CFG", 0x36d0, 0 }, + { "PBAOfst", 28, 4 }, + { "TABOfst", 24, 4 }, + { "VecNum", 12, 10 }, + { "VecBase", 0, 11 }, + { "PCIE_FUNC_CTL_STAT", 0x36d4, 0 }, + { "SendFLRRsp", 31, 1 }, + { "ImmFLRRsp", 24, 1 }, + { "TxnDisable", 20, 1 }, + { "PndTxns", 8, 10 }, + { "VFVld", 3, 1 }, + { "PFNum", 0, 3 }, + { "PCIE_FUNC_INT_CFG", 0x36d8, 0 }, + { "PBAOfst", 28, 4 }, + { "TABOfst", 24, 4 }, + { "VecNum", 12, 10 }, + { "VecBase", 0, 11 }, + { "PCIE_FUNC_CTL_STAT", 0x36dc, 0 }, + { "SendFLRRsp", 31, 1 }, + { "ImmFLRRsp", 24, 1 }, + { "TxnDisable", 20, 1 }, + { "PndTxns", 8, 10 }, + { "VFVld", 3, 1 }, + { "PFNum", 0, 3 }, + { "PCIE_FUNC_INT_CFG", 0x36e0, 0 }, + { "PBAOfst", 28, 4 }, + { "TABOfst", 24, 4 }, + { "VecNum", 12, 10 }, + { "VecBase", 0, 11 }, + { "PCIE_FUNC_CTL_STAT", 0x36e4, 0 }, + { "SendFLRRsp", 31, 1 }, + { "ImmFLRRsp", 24, 1 }, + { "TxnDisable", 20, 1 }, + { "PndTxns", 8, 10 }, + { "VFVld", 3, 1 }, + { "PFNum", 0, 3 }, + { "PCIE_FUNC_INT_CFG", 0x36e8, 0 }, + { "PBAOfst", 28, 4 }, + { "TABOfst", 24, 4 }, + { "VecNum", 12, 10 }, + { "VecBase", 0, 11 }, + { "PCIE_FUNC_CTL_STAT", 0x36ec, 0 }, + { "SendFLRRsp", 31, 1 }, + { "ImmFLRRsp", 24, 1 }, + { "TxnDisable", 20, 1 }, + { "PndTxns", 8, 10 }, + { "VFVld", 3, 1 }, + { "PFNum", 0, 3 }, + { "PCIE_FUNC_INT_CFG", 0x36f0, 0 }, + { "PBAOfst", 28, 4 }, + { "TABOfst", 24, 4 }, + { "VecNum", 12, 10 }, + { "VecBase", 0, 11 }, + { "PCIE_FUNC_CTL_STAT", 0x36f4, 0 }, + { "SendFLRRsp", 31, 1 }, + { "ImmFLRRsp", 24, 1 }, + { "TxnDisable", 20, 1 }, + { "PndTxns", 8, 10 }, + { "VFVld", 3, 1 }, + { "PFNum", 0, 3 }, + { "PCIE_FUNC_INT_CFG", 0x36f8, 0 }, + { "PBAOfst", 28, 4 }, + { "TABOfst", 24, 4 }, + { "VecNum", 12, 10 }, + { "VecBase", 0, 11 }, + { "PCIE_FUNC_CTL_STAT", 0x36fc, 0 }, + { "SendFLRRsp", 31, 1 }, + { "ImmFLRRsp", 24, 1 }, + { "TxnDisable", 20, 1 }, + { "PndTxns", 8, 10 }, + { "VFVld", 3, 1 }, + { "PFNum", 0, 3 }, + { "PCIE_FUNC_INT_CFG", 0x3700, 0 }, + { "PBAOfst", 28, 4 }, + { "TABOfst", 24, 4 }, + { "VecNum", 12, 10 }, + { "VecBase", 0, 11 }, + { "PCIE_FUNC_CTL_STAT", 0x3704, 0 }, + { "SendFLRRsp", 31, 1 }, + { "ImmFLRRsp", 24, 1 }, + { "TxnDisable", 20, 1 }, + { "PndTxns", 8, 10 }, + { "VFVld", 3, 1 }, + { "PFNum", 0, 3 }, + { "PCIE_FUNC_INT_CFG", 0x3708, 0 }, + { "PBAOfst", 28, 4 }, + { "TABOfst", 24, 4 }, + { "VecNum", 12, 10 }, + { "VecBase", 0, 11 }, + { "PCIE_FUNC_CTL_STAT", 0x370c, 0 }, + { "SendFLRRsp", 31, 1 }, + { "ImmFLRRsp", 24, 1 }, + { "TxnDisable", 20, 1 }, + { "PndTxns", 8, 10 }, + { "VFVld", 3, 1 }, + { "PFNum", 0, 3 }, + { "PCIE_FUNC_INT_CFG", 0x3710, 0 }, + { "PBAOfst", 28, 4 }, + { "TABOfst", 24, 4 }, + { "VecNum", 12, 10 }, + { "VecBase", 0, 11 }, + { "PCIE_FUNC_CTL_STAT", 0x3714, 0 }, + { "SendFLRRsp", 31, 1 }, + { "ImmFLRRsp", 24, 1 }, + { "TxnDisable", 20, 1 }, + { "PndTxns", 8, 10 }, + { "VFVld", 3, 1 }, + { "PFNum", 0, 3 }, + { "PCIE_FUNC_INT_CFG", 0x3718, 0 }, + { "PBAOfst", 28, 4 }, + { "TABOfst", 24, 4 }, + { "VecNum", 12, 10 }, + { "VecBase", 0, 11 }, + { "PCIE_FUNC_CTL_STAT", 0x371c, 0 }, + { "SendFLRRsp", 31, 1 }, + { "ImmFLRRsp", 24, 1 }, + { "TxnDisable", 20, 1 }, + { "PndTxns", 8, 10 }, + { "VFVld", 3, 1 }, + { "PFNum", 0, 3 }, + { "PCIE_FUNC_INT_CFG", 0x3720, 0 }, + { "PBAOfst", 28, 4 }, + { "TABOfst", 24, 4 }, + { "VecNum", 12, 10 }, + { "VecBase", 0, 11 }, + { "PCIE_FUNC_CTL_STAT", 0x3724, 0 }, + { "SendFLRRsp", 31, 1 }, + { "ImmFLRRsp", 24, 1 }, + { "TxnDisable", 20, 1 }, + { "PndTxns", 8, 10 }, + { "VFVld", 3, 1 }, + { "PFNum", 0, 3 }, + { "PCIE_FUNC_INT_CFG", 0x3728, 0 }, + { "PBAOfst", 28, 4 }, + { "TABOfst", 24, 4 }, + { "VecNum", 12, 10 }, + { "VecBase", 0, 11 }, + { "PCIE_FUNC_CTL_STAT", 0x372c, 0 }, + { "SendFLRRsp", 31, 1 }, + { "ImmFLRRsp", 24, 1 }, + { "TxnDisable", 20, 1 }, + { "PndTxns", 8, 10 }, + { "VFVld", 3, 1 }, + { "PFNum", 0, 3 }, + { "PCIE_FUNC_INT_CFG", 0x3730, 0 }, + { "PBAOfst", 28, 4 }, + { "TABOfst", 24, 4 }, + { "VecNum", 12, 10 }, + { "VecBase", 0, 11 }, + { "PCIE_FUNC_CTL_STAT", 0x3734, 0 }, + { "SendFLRRsp", 31, 1 }, + { "ImmFLRRsp", 24, 1 }, + { "TxnDisable", 20, 1 }, + { "PndTxns", 8, 10 }, + { "VFVld", 3, 1 }, + { "PFNum", 0, 3 }, + { "PCIE_FUNC_INT_CFG", 0x3738, 0 }, + { "PBAOfst", 28, 4 }, + { "TABOfst", 24, 4 }, + { "VecNum", 12, 10 }, + { "VecBase", 0, 11 }, + { "PCIE_FUNC_CTL_STAT", 0x373c, 0 }, + { "SendFLRRsp", 31, 1 }, + { "ImmFLRRsp", 24, 1 }, + { "TxnDisable", 20, 1 }, + { "PndTxns", 8, 10 }, + { "VFVld", 3, 1 }, + { "PFNum", 0, 3 }, + { "PCIE_FUNC_INT_CFG", 0x3740, 0 }, + { "PBAOfst", 28, 4 }, + { "TABOfst", 24, 4 }, + { "VecNum", 12, 10 }, + { "VecBase", 0, 11 }, + { "PCIE_FUNC_CTL_STAT", 0x3744, 0 }, + { "SendFLRRsp", 31, 1 }, + { "ImmFLRRsp", 24, 1 }, + { "TxnDisable", 20, 1 }, + { "PndTxns", 8, 10 }, + { "VFVld", 3, 1 }, + { "PFNum", 0, 3 }, + { "PCIE_FUNC_INT_CFG", 0x3748, 0 }, + { "PBAOfst", 28, 4 }, + { "TABOfst", 24, 4 }, + { "VecNum", 12, 10 }, + { "VecBase", 0, 11 }, + { "PCIE_FUNC_CTL_STAT", 0x374c, 0 }, + { "SendFLRRsp", 31, 1 }, + { "ImmFLRRsp", 24, 1 }, + { "TxnDisable", 20, 1 }, + { "PndTxns", 8, 10 }, + { "VFVld", 3, 1 }, + { "PFNum", 0, 3 }, + { "PCIE_FUNC_INT_CFG", 0x3750, 0 }, + { "PBAOfst", 28, 4 }, + { "TABOfst", 24, 4 }, + { "VecNum", 12, 10 }, + { "VecBase", 0, 11 }, + { "PCIE_FUNC_CTL_STAT", 0x3754, 0 }, + { "SendFLRRsp", 31, 1 }, + { "ImmFLRRsp", 24, 1 }, + { "TxnDisable", 20, 1 }, + { "PndTxns", 8, 10 }, + { "VFVld", 3, 1 }, + { "PFNum", 0, 3 }, + { "PCIE_FUNC_INT_CFG", 0x3758, 0 }, + { "PBAOfst", 28, 4 }, + { "TABOfst", 24, 4 }, + { "VecNum", 12, 10 }, + { "VecBase", 0, 11 }, + { "PCIE_FUNC_CTL_STAT", 0x375c, 0 }, + { "SendFLRRsp", 31, 1 }, + { "ImmFLRRsp", 24, 1 }, + { "TxnDisable", 20, 1 }, + { "PndTxns", 8, 10 }, + { "VFVld", 3, 1 }, + { "PFNum", 0, 3 }, + { "PCIE_FUNC_INT_CFG", 0x3760, 0 }, + { "PBAOfst", 28, 4 }, + { "TABOfst", 24, 4 }, + { "VecNum", 12, 10 }, + { "VecBase", 0, 11 }, + { "PCIE_FUNC_CTL_STAT", 0x3764, 0 }, + { "SendFLRRsp", 31, 1 }, + { "ImmFLRRsp", 24, 1 }, + { "TxnDisable", 20, 1 }, + { "PndTxns", 8, 10 }, + { "VFVld", 3, 1 }, + { "PFNum", 0, 3 }, + { "PCIE_FUNC_INT_CFG", 0x3768, 0 }, + { "PBAOfst", 28, 4 }, + { "TABOfst", 24, 4 }, + { "VecNum", 12, 10 }, + { "VecBase", 0, 11 }, + { "PCIE_FUNC_CTL_STAT", 0x376c, 0 }, + { "SendFLRRsp", 31, 1 }, + { "ImmFLRRsp", 24, 1 }, + { "TxnDisable", 20, 1 }, + { "PndTxns", 8, 10 }, + { "VFVld", 3, 1 }, + { "PFNum", 0, 3 }, + { "PCIE_FUNC_INT_CFG", 0x3770, 0 }, + { "PBAOfst", 28, 4 }, + { "TABOfst", 24, 4 }, + { "VecNum", 12, 10 }, + { "VecBase", 0, 11 }, + { "PCIE_FUNC_CTL_STAT", 0x3774, 0 }, + { "SendFLRRsp", 31, 1 }, + { "ImmFLRRsp", 24, 1 }, + { "TxnDisable", 20, 1 }, + { "PndTxns", 8, 10 }, + { "VFVld", 3, 1 }, + { "PFNum", 0, 3 }, + { "PCIE_FUNC_INT_CFG", 0x3778, 0 }, + { "PBAOfst", 28, 4 }, + { "TABOfst", 24, 4 }, + { "VecNum", 12, 10 }, + { "VecBase", 0, 11 }, + { "PCIE_FUNC_CTL_STAT", 0x377c, 0 }, + { "SendFLRRsp", 31, 1 }, + { "ImmFLRRsp", 24, 1 }, + { "TxnDisable", 20, 1 }, + { "PndTxns", 8, 10 }, + { "VFVld", 3, 1 }, + { "PFNum", 0, 3 }, + { "PCIE_FUNC_INT_CFG", 0x3780, 0 }, + { "PBAOfst", 28, 4 }, + { "TABOfst", 24, 4 }, + { "VecNum", 12, 10 }, + { "VecBase", 0, 11 }, + { "PCIE_FUNC_CTL_STAT", 0x3784, 0 }, + { "SendFLRRsp", 31, 1 }, + { "ImmFLRRsp", 24, 1 }, + { "TxnDisable", 20, 1 }, + { "PndTxns", 8, 10 }, + { "VFVld", 3, 1 }, + { "PFNum", 0, 3 }, + { "PCIE_FUNC_INT_CFG", 0x3788, 0 }, + { "PBAOfst", 28, 4 }, + { "TABOfst", 24, 4 }, + { "VecNum", 12, 10 }, + { "VecBase", 0, 11 }, + { "PCIE_FUNC_CTL_STAT", 0x378c, 0 }, + { "SendFLRRsp", 31, 1 }, + { "ImmFLRRsp", 24, 1 }, + { "TxnDisable", 20, 1 }, + { "PndTxns", 8, 10 }, + { "VFVld", 3, 1 }, + { "PFNum", 0, 3 }, + { "PCIE_FUNC_INT_CFG", 0x3790, 0 }, + { "PBAOfst", 28, 4 }, + { "TABOfst", 24, 4 }, + { "VecNum", 12, 10 }, + { "VecBase", 0, 11 }, + { "PCIE_FUNC_CTL_STAT", 0x3794, 0 }, + { "SendFLRRsp", 31, 1 }, + { "ImmFLRRsp", 24, 1 }, + { "TxnDisable", 20, 1 }, + { "PndTxns", 8, 10 }, + { "VFVld", 3, 1 }, + { "PFNum", 0, 3 }, + { "PCIE_FUNC_INT_CFG", 0x3798, 0 }, + { "PBAOfst", 28, 4 }, + { "TABOfst", 24, 4 }, + { "VecNum", 12, 10 }, + { "VecBase", 0, 11 }, + { "PCIE_FUNC_CTL_STAT", 0x379c, 0 }, + { "SendFLRRsp", 31, 1 }, + { "ImmFLRRsp", 24, 1 }, + { "TxnDisable", 20, 1 }, + { "PndTxns", 8, 10 }, + { "VFVld", 3, 1 }, + { "PFNum", 0, 3 }, + { "PCIE_FUNC_INT_CFG", 0x37a0, 0 }, + { "PBAOfst", 28, 4 }, + { "TABOfst", 24, 4 }, + { "VecNum", 12, 10 }, + { "VecBase", 0, 11 }, + { "PCIE_FUNC_CTL_STAT", 0x37a4, 0 }, + { "SendFLRRsp", 31, 1 }, + { "ImmFLRRsp", 24, 1 }, + { "TxnDisable", 20, 1 }, + { "PndTxns", 8, 10 }, + { "VFVld", 3, 1 }, + { "PFNum", 0, 3 }, + { "PCIE_FUNC_INT_CFG", 0x37a8, 0 }, + { "PBAOfst", 28, 4 }, + { "TABOfst", 24, 4 }, + { "VecNum", 12, 10 }, + { "VecBase", 0, 11 }, + { "PCIE_FUNC_CTL_STAT", 0x37ac, 0 }, + { "SendFLRRsp", 31, 1 }, + { "ImmFLRRsp", 24, 1 }, + { "TxnDisable", 20, 1 }, + { "PndTxns", 8, 10 }, + { "VFVld", 3, 1 }, + { "PFNum", 0, 3 }, + { "PCIE_FUNC_INT_CFG", 0x37b0, 0 }, + { "PBAOfst", 28, 4 }, + { "TABOfst", 24, 4 }, + { "VecNum", 12, 10 }, + { "VecBase", 0, 11 }, + { "PCIE_FUNC_CTL_STAT", 0x37b4, 0 }, + { "SendFLRRsp", 31, 1 }, + { "ImmFLRRsp", 24, 1 }, + { "TxnDisable", 20, 1 }, + { "PndTxns", 8, 10 }, + { "VFVld", 3, 1 }, + { "PFNum", 0, 3 }, + { "PCIE_FUNC_INT_CFG", 0x37b8, 0 }, + { "PBAOfst", 28, 4 }, + { "TABOfst", 24, 4 }, + { "VecNum", 12, 10 }, + { "VecBase", 0, 11 }, + { "PCIE_FUNC_CTL_STAT", 0x37bc, 0 }, + { "SendFLRRsp", 31, 1 }, + { "ImmFLRRsp", 24, 1 }, + { "TxnDisable", 20, 1 }, + { "PndTxns", 8, 10 }, + { "VFVld", 3, 1 }, + { "PFNum", 0, 3 }, + { "PCIE_FUNC_INT_CFG", 0x37c0, 0 }, + { "PBAOfst", 28, 4 }, + { "TABOfst", 24, 4 }, + { "VecNum", 12, 10 }, + { "VecBase", 0, 11 }, + { "PCIE_FUNC_CTL_STAT", 0x37c4, 0 }, + { "SendFLRRsp", 31, 1 }, + { "ImmFLRRsp", 24, 1 }, + { "TxnDisable", 20, 1 }, + { "PndTxns", 8, 10 }, + { "VFVld", 3, 1 }, + { "PFNum", 0, 3 }, + { "PCIE_FUNC_INT_CFG", 0x37c8, 0 }, + { "PBAOfst", 28, 4 }, + { "TABOfst", 24, 4 }, + { "VecNum", 12, 10 }, + { "VecBase", 0, 11 }, + { "PCIE_FUNC_CTL_STAT", 0x37cc, 0 }, + { "SendFLRRsp", 31, 1 }, + { "ImmFLRRsp", 24, 1 }, + { "TxnDisable", 20, 1 }, + { "PndTxns", 8, 10 }, + { "VFVld", 3, 1 }, + { "PFNum", 0, 3 }, + { "PCIE_FUNC_INT_CFG", 0x37d0, 0 }, + { "PBAOfst", 28, 4 }, + { "TABOfst", 24, 4 }, + { "VecNum", 12, 10 }, + { "VecBase", 0, 11 }, + { "PCIE_FUNC_CTL_STAT", 0x37d4, 0 }, + { "SendFLRRsp", 31, 1 }, + { "ImmFLRRsp", 24, 1 }, + { "TxnDisable", 20, 1 }, + { "PndTxns", 8, 10 }, + { "VFVld", 3, 1 }, + { "PFNum", 0, 3 }, + { "PCIE_FUNC_INT_CFG", 0x37d8, 0 }, + { "PBAOfst", 28, 4 }, + { "TABOfst", 24, 4 }, + { "VecNum", 12, 10 }, + { "VecBase", 0, 11 }, + { "PCIE_FUNC_CTL_STAT", 0x37dc, 0 }, + { "SendFLRRsp", 31, 1 }, + { "ImmFLRRsp", 24, 1 }, + { "TxnDisable", 20, 1 }, + { "PndTxns", 8, 10 }, + { "VFVld", 3, 1 }, + { "PFNum", 0, 3 }, + { "PCIE_FUNC_INT_CFG", 0x37e0, 0 }, + { "PBAOfst", 28, 4 }, + { "TABOfst", 24, 4 }, + { "VecNum", 12, 10 }, + { "VecBase", 0, 11 }, + { "PCIE_FUNC_CTL_STAT", 0x37e4, 0 }, + { "SendFLRRsp", 31, 1 }, + { "ImmFLRRsp", 24, 1 }, + { "TxnDisable", 20, 1 }, + { "PndTxns", 8, 10 }, + { "VFVld", 3, 1 }, + { "PFNum", 0, 3 }, + { "PCIE_FUNC_INT_CFG", 0x37e8, 0 }, + { "PBAOfst", 28, 4 }, + { "TABOfst", 24, 4 }, + { "VecNum", 12, 10 }, + { "VecBase", 0, 11 }, + { "PCIE_FUNC_CTL_STAT", 0x37ec, 0 }, + { "SendFLRRsp", 31, 1 }, + { "ImmFLRRsp", 24, 1 }, + { "TxnDisable", 20, 1 }, + { "PndTxns", 8, 10 }, + { "VFVld", 3, 1 }, + { "PFNum", 0, 3 }, + { "PCIE_FUNC_INT_CFG", 0x37f0, 0 }, + { "PBAOfst", 28, 4 }, + { "TABOfst", 24, 4 }, + { "VecNum", 12, 10 }, + { "VecBase", 0, 11 }, + { "PCIE_FUNC_CTL_STAT", 0x37f4, 0 }, + { "SendFLRRsp", 31, 1 }, + { "ImmFLRRsp", 24, 1 }, + { "TxnDisable", 20, 1 }, + { "PndTxns", 8, 10 }, + { "VFVld", 3, 1 }, + { "PFNum", 0, 3 }, + { "PCIE_FUNC_INT_CFG", 0x37f8, 0 }, + { "PBAOfst", 28, 4 }, + { "TABOfst", 24, 4 }, + { "VecNum", 12, 10 }, + { "VecBase", 0, 11 }, + { "PCIE_FUNC_CTL_STAT", 0x37fc, 0 }, + { "SendFLRRsp", 31, 1 }, + { "ImmFLRRsp", 24, 1 }, + { "TxnDisable", 20, 1 }, + { "PndTxns", 8, 10 }, + { "VFVld", 3, 1 }, + { "PFNum", 0, 3 }, + { "PCIE_FUNC_INT_CFG", 0x3800, 0 }, + { "PBAOfst", 28, 4 }, + { "TABOfst", 24, 4 }, + { "VecNum", 12, 10 }, + { "VecBase", 0, 11 }, + { "PCIE_FUNC_CTL_STAT", 0x3804, 0 }, + { "SendFLRRsp", 31, 1 }, + { "ImmFLRRsp", 24, 1 }, + { "TxnDisable", 20, 1 }, + { "PndTxns", 8, 10 }, + { "VFVld", 3, 1 }, + { "PFNum", 0, 3 }, + { "PCIE_FUNC_INT_CFG", 0x3808, 0 }, + { "PBAOfst", 28, 4 }, + { "TABOfst", 24, 4 }, + { "VecNum", 12, 10 }, + { "VecBase", 0, 11 }, + { "PCIE_FUNC_CTL_STAT", 0x380c, 0 }, + { "SendFLRRsp", 31, 1 }, + { "ImmFLRRsp", 24, 1 }, + { "TxnDisable", 20, 1 }, + { "PndTxns", 8, 10 }, + { "VFVld", 3, 1 }, + { "PFNum", 0, 3 }, + { "PCIE_FUNC_INT_CFG", 0x3810, 0 }, + { "PBAOfst", 28, 4 }, + { "TABOfst", 24, 4 }, + { "VecNum", 12, 10 }, + { "VecBase", 0, 11 }, + { "PCIE_FUNC_CTL_STAT", 0x3814, 0 }, + { "SendFLRRsp", 31, 1 }, + { "ImmFLRRsp", 24, 1 }, + { "TxnDisable", 20, 1 }, + { "PndTxns", 8, 10 }, + { "VFVld", 3, 1 }, + { "PFNum", 0, 3 }, + { "PCIE_FUNC_INT_CFG", 0x3818, 0 }, + { "PBAOfst", 28, 4 }, + { "TABOfst", 24, 4 }, + { "VecNum", 12, 10 }, + { "VecBase", 0, 11 }, + { "PCIE_FUNC_CTL_STAT", 0x381c, 0 }, + { "SendFLRRsp", 31, 1 }, + { "ImmFLRRsp", 24, 1 }, + { "TxnDisable", 20, 1 }, + { "PndTxns", 8, 10 }, + { "VFVld", 3, 1 }, + { "PFNum", 0, 3 }, + { "PCIE_FUNC_INT_CFG", 0x3820, 0 }, + { "PBAOfst", 28, 4 }, + { "TABOfst", 24, 4 }, + { "VecNum", 12, 10 }, + { "VecBase", 0, 11 }, + { "PCIE_FUNC_CTL_STAT", 0x3824, 0 }, + { "SendFLRRsp", 31, 1 }, + { "ImmFLRRsp", 24, 1 }, + { "TxnDisable", 20, 1 }, + { "PndTxns", 8, 10 }, + { "VFVld", 3, 1 }, + { "PFNum", 0, 3 }, + { "PCIE_FUNC_INT_CFG", 0x3828, 0 }, + { "PBAOfst", 28, 4 }, + { "TABOfst", 24, 4 }, + { "VecNum", 12, 10 }, + { "VecBase", 0, 11 }, + { "PCIE_FUNC_CTL_STAT", 0x382c, 0 }, + { "SendFLRRsp", 31, 1 }, + { "ImmFLRRsp", 24, 1 }, + { "TxnDisable", 20, 1 }, + { "PndTxns", 8, 10 }, + { "VFVld", 3, 1 }, + { "PFNum", 0, 3 }, + { "PCIE_FUNC_INT_CFG", 0x3830, 0 }, + { "PBAOfst", 28, 4 }, + { "TABOfst", 24, 4 }, + { "VecNum", 12, 10 }, + { "VecBase", 0, 11 }, + { "PCIE_FUNC_CTL_STAT", 0x3834, 0 }, + { "SendFLRRsp", 31, 1 }, + { "ImmFLRRsp", 24, 1 }, + { "TxnDisable", 20, 1 }, + { "PndTxns", 8, 10 }, + { "VFVld", 3, 1 }, + { "PFNum", 0, 3 }, + { "PCIE_FUNC_INT_CFG", 0x3838, 0 }, + { "PBAOfst", 28, 4 }, + { "TABOfst", 24, 4 }, + { "VecNum", 12, 10 }, + { "VecBase", 0, 11 }, + { "PCIE_FUNC_CTL_STAT", 0x383c, 0 }, + { "SendFLRRsp", 31, 1 }, + { "ImmFLRRsp", 24, 1 }, + { "TxnDisable", 20, 1 }, + { "PndTxns", 8, 10 }, + { "VFVld", 3, 1 }, + { "PFNum", 0, 3 }, + { "PCIE_FUNC_INT_CFG", 0x3840, 0 }, + { "PBAOfst", 28, 4 }, + { "TABOfst", 24, 4 }, + { "VecNum", 12, 10 }, + { "VecBase", 0, 11 }, + { "PCIE_FUNC_CTL_STAT", 0x3844, 0 }, + { "SendFLRRsp", 31, 1 }, + { "ImmFLRRsp", 24, 1 }, + { "TxnDisable", 20, 1 }, + { "PndTxns", 8, 10 }, + { "VFVld", 3, 1 }, + { "PFNum", 0, 3 }, + { "PCIE_FUNC_INT_CFG", 0x3848, 0 }, + { "PBAOfst", 28, 4 }, + { "TABOfst", 24, 4 }, + { "VecNum", 12, 10 }, + { "VecBase", 0, 11 }, + { "PCIE_FUNC_CTL_STAT", 0x384c, 0 }, + { "SendFLRRsp", 31, 1 }, + { "ImmFLRRsp", 24, 1 }, + { "TxnDisable", 20, 1 }, + { "PndTxns", 8, 10 }, + { "VFVld", 3, 1 }, + { "PFNum", 0, 3 }, + { "PCIE_FUNC_INT_CFG", 0x3850, 0 }, + { "PBAOfst", 28, 4 }, + { "TABOfst", 24, 4 }, + { "VecNum", 12, 10 }, + { "VecBase", 0, 11 }, + { "PCIE_FUNC_CTL_STAT", 0x3854, 0 }, + { "SendFLRRsp", 31, 1 }, + { "ImmFLRRsp", 24, 1 }, + { "TxnDisable", 20, 1 }, + { "PndTxns", 8, 10 }, + { "VFVld", 3, 1 }, + { "PFNum", 0, 3 }, + { "PCIE_FUNC_INT_CFG", 0x3858, 0 }, + { "PBAOfst", 28, 4 }, + { "TABOfst", 24, 4 }, + { "VecNum", 12, 10 }, + { "VecBase", 0, 11 }, + { "PCIE_FUNC_CTL_STAT", 0x385c, 0 }, + { "SendFLRRsp", 31, 1 }, + { "ImmFLRRsp", 24, 1 }, + { "TxnDisable", 20, 1 }, + { "PndTxns", 8, 10 }, + { "VFVld", 3, 1 }, + { "PFNum", 0, 3 }, + { "PCIE_FUNC_INT_CFG", 0x3860, 0 }, + { "PBAOfst", 28, 4 }, + { "TABOfst", 24, 4 }, + { "VecNum", 12, 10 }, + { "VecBase", 0, 11 }, + { "PCIE_FUNC_CTL_STAT", 0x3864, 0 }, + { "SendFLRRsp", 31, 1 }, + { "ImmFLRRsp", 24, 1 }, + { "TxnDisable", 20, 1 }, + { "PndTxns", 8, 10 }, + { "VFVld", 3, 1 }, + { "PFNum", 0, 3 }, + { "PCIE_FUNC_INT_CFG", 0x3868, 0 }, + { "PBAOfst", 28, 4 }, + { "TABOfst", 24, 4 }, + { "VecNum", 12, 10 }, + { "VecBase", 0, 11 }, + { "PCIE_FUNC_CTL_STAT", 0x386c, 0 }, + { "SendFLRRsp", 31, 1 }, + { "ImmFLRRsp", 24, 1 }, + { "TxnDisable", 20, 1 }, + { "PndTxns", 8, 10 }, + { "VFVld", 3, 1 }, + { "PFNum", 0, 3 }, + { "PCIE_FUNC_INT_CFG", 0x3870, 0 }, + { "PBAOfst", 28, 4 }, + { "TABOfst", 24, 4 }, + { "VecNum", 12, 10 }, + { "VecBase", 0, 11 }, + { "PCIE_FUNC_CTL_STAT", 0x3874, 0 }, + { "SendFLRRsp", 31, 1 }, + { "ImmFLRRsp", 24, 1 }, + { "TxnDisable", 20, 1 }, + { "PndTxns", 8, 10 }, + { "VFVld", 3, 1 }, + { "PFNum", 0, 3 }, + { "PCIE_FUNC_INT_CFG", 0x3878, 0 }, + { "PBAOfst", 28, 4 }, + { "TABOfst", 24, 4 }, + { "VecNum", 12, 10 }, + { "VecBase", 0, 11 }, + { "PCIE_FUNC_CTL_STAT", 0x387c, 0 }, + { "SendFLRRsp", 31, 1 }, + { "ImmFLRRsp", 24, 1 }, + { "TxnDisable", 20, 1 }, + { "PndTxns", 8, 10 }, + { "VFVld", 3, 1 }, + { "PFNum", 0, 3 }, + { "PCIE_FUNC_INT_CFG", 0x3880, 0 }, + { "PBAOfst", 28, 4 }, + { "TABOfst", 24, 4 }, + { "VecNum", 12, 10 }, + { "VecBase", 0, 11 }, + { "PCIE_FUNC_CTL_STAT", 0x3884, 0 }, + { "SendFLRRsp", 31, 1 }, + { "ImmFLRRsp", 24, 1 }, + { "TxnDisable", 20, 1 }, + { "PndTxns", 8, 10 }, + { "VFVld", 3, 1 }, + { "PFNum", 0, 3 }, + { "PCIE_FUNC_INT_CFG", 0x3888, 0 }, + { "PBAOfst", 28, 4 }, + { "TABOfst", 24, 4 }, + { "VecNum", 12, 10 }, + { "VecBase", 0, 11 }, + { "PCIE_FUNC_CTL_STAT", 0x388c, 0 }, + { "SendFLRRsp", 31, 1 }, + { "ImmFLRRsp", 24, 1 }, + { "TxnDisable", 20, 1 }, + { "PndTxns", 8, 10 }, + { "VFVld", 3, 1 }, + { "PFNum", 0, 3 }, + { "PCIE_FUNC_INT_CFG", 0x3890, 0 }, + { "PBAOfst", 28, 4 }, + { "TABOfst", 24, 4 }, + { "VecNum", 12, 10 }, + { "VecBase", 0, 11 }, + { "PCIE_FUNC_CTL_STAT", 0x3894, 0 }, + { "SendFLRRsp", 31, 1 }, + { "ImmFLRRsp", 24, 1 }, + { "TxnDisable", 20, 1 }, + { "PndTxns", 8, 10 }, + { "VFVld", 3, 1 }, + { "PFNum", 0, 3 }, + { "PCIE_FUNC_INT_CFG", 0x3898, 0 }, + { "PBAOfst", 28, 4 }, + { "TABOfst", 24, 4 }, + { "VecNum", 12, 10 }, + { "VecBase", 0, 11 }, + { "PCIE_FUNC_CTL_STAT", 0x389c, 0 }, + { "SendFLRRsp", 31, 1 }, + { "ImmFLRRsp", 24, 1 }, + { "TxnDisable", 20, 1 }, + { "PndTxns", 8, 10 }, + { "VFVld", 3, 1 }, + { "PFNum", 0, 3 }, + { "PCIE_FUNC_INT_CFG", 0x38a0, 0 }, + { "PBAOfst", 28, 4 }, + { "TABOfst", 24, 4 }, + { "VecNum", 12, 10 }, + { "VecBase", 0, 11 }, + { "PCIE_FUNC_CTL_STAT", 0x38a4, 0 }, + { "SendFLRRsp", 31, 1 }, + { "ImmFLRRsp", 24, 1 }, + { "TxnDisable", 20, 1 }, + { "PndTxns", 8, 10 }, + { "VFVld", 3, 1 }, + { "PFNum", 0, 3 }, + { "PCIE_FUNC_INT_CFG", 0x38a8, 0 }, + { "PBAOfst", 28, 4 }, + { "TABOfst", 24, 4 }, + { "VecNum", 12, 10 }, + { "VecBase", 0, 11 }, + { "PCIE_FUNC_CTL_STAT", 0x38ac, 0 }, + { "SendFLRRsp", 31, 1 }, + { "ImmFLRRsp", 24, 1 }, + { "TxnDisable", 20, 1 }, + { "PndTxns", 8, 10 }, + { "VFVld", 3, 1 }, + { "PFNum", 0, 3 }, + { "PCIE_FUNC_INT_CFG", 0x38b0, 0 }, + { "PBAOfst", 28, 4 }, + { "TABOfst", 24, 4 }, + { "VecNum", 12, 10 }, + { "VecBase", 0, 11 }, + { "PCIE_FUNC_CTL_STAT", 0x38b4, 0 }, + { "SendFLRRsp", 31, 1 }, + { "ImmFLRRsp", 24, 1 }, + { "TxnDisable", 20, 1 }, + { "PndTxns", 8, 10 }, + { "VFVld", 3, 1 }, + { "PFNum", 0, 3 }, + { "PCIE_FUNC_INT_CFG", 0x38b8, 0 }, + { "PBAOfst", 28, 4 }, + { "TABOfst", 24, 4 }, + { "VecNum", 12, 10 }, + { "VecBase", 0, 11 }, + { "PCIE_FUNC_CTL_STAT", 0x38bc, 0 }, + { "SendFLRRsp", 31, 1 }, + { "ImmFLRRsp", 24, 1 }, + { "TxnDisable", 20, 1 }, + { "PndTxns", 8, 10 }, + { "VFVld", 3, 1 }, + { "PFNum", 0, 3 }, + { "PCIE_FUNC_INT_CFG", 0x38c0, 0 }, + { "PBAOfst", 28, 4 }, + { "TABOfst", 24, 4 }, + { "VecNum", 12, 10 }, + { "VecBase", 0, 11 }, + { "PCIE_FUNC_CTL_STAT", 0x38c4, 0 }, + { "SendFLRRsp", 31, 1 }, + { "ImmFLRRsp", 24, 1 }, + { "TxnDisable", 20, 1 }, + { "PndTxns", 8, 10 }, + { "VFVld", 3, 1 }, + { "PFNum", 0, 3 }, + { "PCIE_FUNC_INT_CFG", 0x38c8, 0 }, + { "PBAOfst", 28, 4 }, + { "TABOfst", 24, 4 }, + { "VecNum", 12, 10 }, + { "VecBase", 0, 11 }, + { "PCIE_FUNC_CTL_STAT", 0x38cc, 0 }, + { "SendFLRRsp", 31, 1 }, + { "ImmFLRRsp", 24, 1 }, + { "TxnDisable", 20, 1 }, + { "PndTxns", 8, 10 }, + { "VFVld", 3, 1 }, + { "PFNum", 0, 3 }, + { "PCIE_FUNC_INT_CFG", 0x38d0, 0 }, + { "PBAOfst", 28, 4 }, + { "TABOfst", 24, 4 }, + { "VecNum", 12, 10 }, + { "VecBase", 0, 11 }, + { "PCIE_FUNC_CTL_STAT", 0x38d4, 0 }, + { "SendFLRRsp", 31, 1 }, + { "ImmFLRRsp", 24, 1 }, + { "TxnDisable", 20, 1 }, + { "PndTxns", 8, 10 }, + { "VFVld", 3, 1 }, + { "PFNum", 0, 3 }, + { "PCIE_FUNC_INT_CFG", 0x38d8, 0 }, + { "PBAOfst", 28, 4 }, + { "TABOfst", 24, 4 }, + { "VecNum", 12, 10 }, + { "VecBase", 0, 11 }, + { "PCIE_FUNC_CTL_STAT", 0x38dc, 0 }, + { "SendFLRRsp", 31, 1 }, + { "ImmFLRRsp", 24, 1 }, + { "TxnDisable", 20, 1 }, + { "PndTxns", 8, 10 }, + { "VFVld", 3, 1 }, + { "PFNum", 0, 3 }, + { "PCIE_FUNC_INT_CFG", 0x38e0, 0 }, + { "PBAOfst", 28, 4 }, + { "TABOfst", 24, 4 }, + { "VecNum", 12, 10 }, + { "VecBase", 0, 11 }, + { "PCIE_FUNC_CTL_STAT", 0x38e4, 0 }, + { "SendFLRRsp", 31, 1 }, + { "ImmFLRRsp", 24, 1 }, + { "TxnDisable", 20, 1 }, + { "PndTxns", 8, 10 }, + { "VFVld", 3, 1 }, + { "PFNum", 0, 3 }, + { "PCIE_FUNC_INT_CFG", 0x38e8, 0 }, + { "PBAOfst", 28, 4 }, + { "TABOfst", 24, 4 }, + { "VecNum", 12, 10 }, + { "VecBase", 0, 11 }, + { "PCIE_FUNC_CTL_STAT", 0x38ec, 0 }, + { "SendFLRRsp", 31, 1 }, + { "ImmFLRRsp", 24, 1 }, + { "TxnDisable", 20, 1 }, + { "PndTxns", 8, 10 }, + { "VFVld", 3, 1 }, + { "PFNum", 0, 3 }, + { "PCIE_FUNC_INT_CFG", 0x38f0, 0 }, + { "PBAOfst", 28, 4 }, + { "TABOfst", 24, 4 }, + { "VecNum", 12, 10 }, + { "VecBase", 0, 11 }, + { "PCIE_FUNC_CTL_STAT", 0x38f4, 0 }, + { "SendFLRRsp", 31, 1 }, + { "ImmFLRRsp", 24, 1 }, + { "TxnDisable", 20, 1 }, + { "PndTxns", 8, 10 }, + { "VFVld", 3, 1 }, + { "PFNum", 0, 3 }, + { "PCIE_FUNC_INT_CFG", 0x38f8, 0 }, + { "PBAOfst", 28, 4 }, + { "TABOfst", 24, 4 }, + { "VecNum", 12, 10 }, + { "VecBase", 0, 11 }, + { "PCIE_FUNC_CTL_STAT", 0x38fc, 0 }, + { "SendFLRRsp", 31, 1 }, + { "ImmFLRRsp", 24, 1 }, + { "TxnDisable", 20, 1 }, + { "PndTxns", 8, 10 }, + { "VFVld", 3, 1 }, + { "PFNum", 0, 3 }, + { "PCIE_FID", 0x3900, 0 }, + { "Pad", 11, 1 }, + { "TC", 8, 3 }, + { "Function", 0, 8 }, + { "PCIE_FID", 0x3904, 0 }, + { "Pad", 11, 1 }, + { "TC", 8, 3 }, + { "Function", 0, 8 }, + { "PCIE_FID", 0x3908, 0 }, + { "Pad", 11, 1 }, + { "TC", 8, 3 }, + { "Function", 0, 8 }, + { "PCIE_FID", 0x390c, 0 }, + { "Pad", 11, 1 }, + { "TC", 8, 3 }, + { "Function", 0, 8 }, + { "PCIE_FID", 0x3910, 0 }, + { "Pad", 11, 1 }, + { "TC", 8, 3 }, + { "Function", 0, 8 }, + { "PCIE_FID", 0x3914, 0 }, + { "Pad", 11, 1 }, + { "TC", 8, 3 }, + { "Function", 0, 8 }, + { "PCIE_FID", 0x3918, 0 }, + { "Pad", 11, 1 }, + { "TC", 8, 3 }, + { "Function", 0, 8 }, + { "PCIE_FID", 0x391c, 0 }, + { "Pad", 11, 1 }, + { "TC", 8, 3 }, + { "Function", 0, 8 }, + { "PCIE_FID", 0x3920, 0 }, + { "Pad", 11, 1 }, + { "TC", 8, 3 }, + { "Function", 0, 8 }, + { "PCIE_FID", 0x3924, 0 }, + { "Pad", 11, 1 }, + { "TC", 8, 3 }, + { "Function", 0, 8 }, + { "PCIE_FID", 0x3928, 0 }, + { "Pad", 11, 1 }, + { "TC", 8, 3 }, + { "Function", 0, 8 }, + { "PCIE_FID", 0x392c, 0 }, + { "Pad", 11, 1 }, + { "TC", 8, 3 }, + { "Function", 0, 8 }, + { "PCIE_FID", 0x3930, 0 }, + { "Pad", 11, 1 }, + { "TC", 8, 3 }, + { "Function", 0, 8 }, + { "PCIE_FID", 0x3934, 0 }, + { "Pad", 11, 1 }, + { "TC", 8, 3 }, + { "Function", 0, 8 }, + { "PCIE_FID", 0x3938, 0 }, + { "Pad", 11, 1 }, + { "TC", 8, 3 }, + { "Function", 0, 8 }, + { "PCIE_FID", 0x393c, 0 }, + { "Pad", 11, 1 }, + { "TC", 8, 3 }, + { "Function", 0, 8 }, + { "PCIE_FID", 0x3940, 0 }, + { "Pad", 11, 1 }, + { "TC", 8, 3 }, + { "Function", 0, 8 }, + { "PCIE_FID", 0x3944, 0 }, + { "Pad", 11, 1 }, + { "TC", 8, 3 }, + { "Function", 0, 8 }, + { "PCIE_FID", 0x3948, 0 }, + { "Pad", 11, 1 }, + { "TC", 8, 3 }, + { "Function", 0, 8 }, + { "PCIE_FID", 0x394c, 0 }, + { "Pad", 11, 1 }, + { "TC", 8, 3 }, + { "Function", 0, 8 }, + { "PCIE_FID", 0x3950, 0 }, + { "Pad", 11, 1 }, + { "TC", 8, 3 }, + { "Function", 0, 8 }, + { "PCIE_FID", 0x3954, 0 }, + { "Pad", 11, 1 }, + { "TC", 8, 3 }, + { "Function", 0, 8 }, + { "PCIE_FID", 0x3958, 0 }, + { "Pad", 11, 1 }, + { "TC", 8, 3 }, + { "Function", 0, 8 }, + { "PCIE_FID", 0x395c, 0 }, + { "Pad", 11, 1 }, + { "TC", 8, 3 }, + { "Function", 0, 8 }, + { "PCIE_FID", 0x3960, 0 }, + { "Pad", 11, 1 }, + { "TC", 8, 3 }, + { "Function", 0, 8 }, + { "PCIE_FID", 0x3964, 0 }, + { "Pad", 11, 1 }, + { "TC", 8, 3 }, + { "Function", 0, 8 }, + { "PCIE_FID", 0x3968, 0 }, + { "Pad", 11, 1 }, + { "TC", 8, 3 }, + { "Function", 0, 8 }, + { "PCIE_FID", 0x396c, 0 }, + { "Pad", 11, 1 }, + { "TC", 8, 3 }, + { "Function", 0, 8 }, + { "PCIE_FID", 0x3970, 0 }, + { "Pad", 11, 1 }, + { "TC", 8, 3 }, + { "Function", 0, 8 }, + { "PCIE_FID", 0x3974, 0 }, + { "Pad", 11, 1 }, + { "TC", 8, 3 }, + { "Function", 0, 8 }, + { "PCIE_FID", 0x3978, 0 }, + { "Pad", 11, 1 }, + { "TC", 8, 3 }, + { "Function", 0, 8 }, + { "PCIE_FID", 0x397c, 0 }, + { "Pad", 11, 1 }, + { "TC", 8, 3 }, + { "Function", 0, 8 }, + { "PCIE_FID", 0x3980, 0 }, + { "Pad", 11, 1 }, + { "TC", 8, 3 }, + { "Function", 0, 8 }, + { "PCIE_FID", 0x3984, 0 }, + { "Pad", 11, 1 }, + { "TC", 8, 3 }, + { "Function", 0, 8 }, + { "PCIE_FID", 0x3988, 0 }, + { "Pad", 11, 1 }, + { "TC", 8, 3 }, + { "Function", 0, 8 }, + { "PCIE_FID", 0x398c, 0 }, + { "Pad", 11, 1 }, + { "TC", 8, 3 }, + { "Function", 0, 8 }, + { "PCIE_FID", 0x3990, 0 }, + { "Pad", 11, 1 }, + { "TC", 8, 3 }, + { "Function", 0, 8 }, + { "PCIE_FID", 0x3994, 0 }, + { "Pad", 11, 1 }, + { "TC", 8, 3 }, + { "Function", 0, 8 }, + { "PCIE_FID", 0x3998, 0 }, + { "Pad", 11, 1 }, + { "TC", 8, 3 }, + { "Function", 0, 8 }, + { "PCIE_FID", 0x399c, 0 }, + { "Pad", 11, 1 }, + { "TC", 8, 3 }, + { "Function", 0, 8 }, + { "PCIE_FID", 0x39a0, 0 }, + { "Pad", 11, 1 }, + { "TC", 8, 3 }, + { "Function", 0, 8 }, + { "PCIE_FID", 0x39a4, 0 }, + { "Pad", 11, 1 }, + { "TC", 8, 3 }, + { "Function", 0, 8 }, + { "PCIE_FID", 0x39a8, 0 }, + { "Pad", 11, 1 }, + { "TC", 8, 3 }, + { "Function", 0, 8 }, + { "PCIE_FID", 0x39ac, 0 }, + { "Pad", 11, 1 }, + { "TC", 8, 3 }, + { "Function", 0, 8 }, + { "PCIE_FID", 0x39b0, 0 }, + { "Pad", 11, 1 }, + { "TC", 8, 3 }, + { "Function", 0, 8 }, + { "PCIE_FID", 0x39b4, 0 }, + { "Pad", 11, 1 }, + { "TC", 8, 3 }, + { "Function", 0, 8 }, + { "PCIE_FID", 0x39b8, 0 }, + { "Pad", 11, 1 }, + { "TC", 8, 3 }, + { "Function", 0, 8 }, + { "PCIE_FID", 0x39bc, 0 }, + { "Pad", 11, 1 }, + { "TC", 8, 3 }, + { "Function", 0, 8 }, + { "PCIE_FID", 0x39c0, 0 }, + { "Pad", 11, 1 }, + { "TC", 8, 3 }, + { "Function", 0, 8 }, + { "PCIE_FID", 0x39c4, 0 }, + { "Pad", 11, 1 }, + { "TC", 8, 3 }, + { "Function", 0, 8 }, + { "PCIE_FID", 0x39c8, 0 }, + { "Pad", 11, 1 }, + { "TC", 8, 3 }, + { "Function", 0, 8 }, + { "PCIE_FID", 0x39cc, 0 }, + { "Pad", 11, 1 }, + { "TC", 8, 3 }, + { "Function", 0, 8 }, + { "PCIE_FID", 0x39d0, 0 }, + { "Pad", 11, 1 }, + { "TC", 8, 3 }, + { "Function", 0, 8 }, + { "PCIE_FID", 0x39d4, 0 }, + { "Pad", 11, 1 }, + { "TC", 8, 3 }, + { "Function", 0, 8 }, + { "PCIE_FID", 0x39d8, 0 }, + { "Pad", 11, 1 }, + { "TC", 8, 3 }, + { "Function", 0, 8 }, + { "PCIE_FID", 0x39dc, 0 }, + { "Pad", 11, 1 }, + { "TC", 8, 3 }, + { "Function", 0, 8 }, + { "PCIE_FID", 0x39e0, 0 }, + { "Pad", 11, 1 }, + { "TC", 8, 3 }, + { "Function", 0, 8 }, + { "PCIE_FID", 0x39e4, 0 }, + { "Pad", 11, 1 }, + { "TC", 8, 3 }, + { "Function", 0, 8 }, + { "PCIE_FID", 0x39e8, 0 }, + { "Pad", 11, 1 }, + { "TC", 8, 3 }, + { "Function", 0, 8 }, + { "PCIE_FID", 0x39ec, 0 }, + { "Pad", 11, 1 }, + { "TC", 8, 3 }, + { "Function", 0, 8 }, + { "PCIE_FID", 0x39f0, 0 }, + { "Pad", 11, 1 }, + { "TC", 8, 3 }, + { "Function", 0, 8 }, + { "PCIE_FID", 0x39f4, 0 }, + { "Pad", 11, 1 }, + { "TC", 8, 3 }, + { "Function", 0, 8 }, + { "PCIE_FID", 0x39f8, 0 }, + { "Pad", 11, 1 }, + { "TC", 8, 3 }, + { "Function", 0, 8 }, + { "PCIE_FID", 0x39fc, 0 }, + { "Pad", 11, 1 }, + { "TC", 8, 3 }, + { "Function", 0, 8 }, + { "PCIE_FID", 0x3a00, 0 }, + { "Pad", 11, 1 }, + { "TC", 8, 3 }, + { "Function", 0, 8 }, + { "PCIE_FID", 0x3a04, 0 }, + { "Pad", 11, 1 }, + { "TC", 8, 3 }, + { "Function", 0, 8 }, + { "PCIE_FID", 0x3a08, 0 }, + { "Pad", 11, 1 }, + { "TC", 8, 3 }, + { "Function", 0, 8 }, + { "PCIE_FID", 0x3a0c, 0 }, + { "Pad", 11, 1 }, + { "TC", 8, 3 }, + { "Function", 0, 8 }, + { "PCIE_FID", 0x3a10, 0 }, + { "Pad", 11, 1 }, + { "TC", 8, 3 }, + { "Function", 0, 8 }, + { "PCIE_FID", 0x3a14, 0 }, + { "Pad", 11, 1 }, + { "TC", 8, 3 }, + { "Function", 0, 8 }, + { "PCIE_FID", 0x3a18, 0 }, + { "Pad", 11, 1 }, + { "TC", 8, 3 }, + { "Function", 0, 8 }, + { "PCIE_FID", 0x3a1c, 0 }, + { "Pad", 11, 1 }, + { "TC", 8, 3 }, + { "Function", 0, 8 }, + { "PCIE_FID", 0x3a20, 0 }, + { "Pad", 11, 1 }, + { "TC", 8, 3 }, + { "Function", 0, 8 }, + { "PCIE_FID", 0x3a24, 0 }, + { "Pad", 11, 1 }, + { "TC", 8, 3 }, + { "Function", 0, 8 }, + { "PCIE_FID", 0x3a28, 0 }, + { "Pad", 11, 1 }, + { "TC", 8, 3 }, + { "Function", 0, 8 }, + { "PCIE_FID", 0x3a2c, 0 }, + { "Pad", 11, 1 }, + { "TC", 8, 3 }, + { "Function", 0, 8 }, + { "PCIE_FID", 0x3a30, 0 }, + { "Pad", 11, 1 }, + { "TC", 8, 3 }, + { "Function", 0, 8 }, + { "PCIE_FID", 0x3a34, 0 }, + { "Pad", 11, 1 }, + { "TC", 8, 3 }, + { "Function", 0, 8 }, + { "PCIE_FID", 0x3a38, 0 }, + { "Pad", 11, 1 }, + { "TC", 8, 3 }, + { "Function", 0, 8 }, + { "PCIE_FID", 0x3a3c, 0 }, + { "Pad", 11, 1 }, + { "TC", 8, 3 }, + { "Function", 0, 8 }, + { "PCIE_FID", 0x3a40, 0 }, + { "Pad", 11, 1 }, + { "TC", 8, 3 }, + { "Function", 0, 8 }, + { "PCIE_FID", 0x3a44, 0 }, + { "Pad", 11, 1 }, + { "TC", 8, 3 }, + { "Function", 0, 8 }, + { "PCIE_FID", 0x3a48, 0 }, + { "Pad", 11, 1 }, + { "TC", 8, 3 }, + { "Function", 0, 8 }, + { "PCIE_FID", 0x3a4c, 0 }, + { "Pad", 11, 1 }, + { "TC", 8, 3 }, + { "Function", 0, 8 }, + { "PCIE_FID", 0x3a50, 0 }, + { "Pad", 11, 1 }, + { "TC", 8, 3 }, + { "Function", 0, 8 }, + { "PCIE_FID", 0x3a54, 0 }, + { "Pad", 11, 1 }, + { "TC", 8, 3 }, + { "Function", 0, 8 }, + { "PCIE_FID", 0x3a58, 0 }, + { "Pad", 11, 1 }, + { "TC", 8, 3 }, + { "Function", 0, 8 }, + { "PCIE_FID", 0x3a5c, 0 }, + { "Pad", 11, 1 }, + { "TC", 8, 3 }, + { "Function", 0, 8 }, + { "PCIE_FID", 0x3a60, 0 }, + { "Pad", 11, 1 }, + { "TC", 8, 3 }, + { "Function", 0, 8 }, + { "PCIE_FID", 0x3a64, 0 }, + { "Pad", 11, 1 }, + { "TC", 8, 3 }, + { "Function", 0, 8 }, + { "PCIE_FID", 0x3a68, 0 }, + { "Pad", 11, 1 }, + { "TC", 8, 3 }, + { "Function", 0, 8 }, + { "PCIE_FID", 0x3a6c, 0 }, + { "Pad", 11, 1 }, + { "TC", 8, 3 }, + { "Function", 0, 8 }, + { "PCIE_FID", 0x3a70, 0 }, + { "Pad", 11, 1 }, + { "TC", 8, 3 }, + { "Function", 0, 8 }, + { "PCIE_FID", 0x3a74, 0 }, + { "Pad", 11, 1 }, + { "TC", 8, 3 }, + { "Function", 0, 8 }, + { "PCIE_FID", 0x3a78, 0 }, + { "Pad", 11, 1 }, + { "TC", 8, 3 }, + { "Function", 0, 8 }, + { "PCIE_FID", 0x3a7c, 0 }, + { "Pad", 11, 1 }, + { "TC", 8, 3 }, + { "Function", 0, 8 }, + { "PCIE_FID", 0x3a80, 0 }, + { "Pad", 11, 1 }, + { "TC", 8, 3 }, + { "Function", 0, 8 }, + { "PCIE_FID", 0x3a84, 0 }, + { "Pad", 11, 1 }, + { "TC", 8, 3 }, + { "Function", 0, 8 }, + { "PCIE_FID", 0x3a88, 0 }, + { "Pad", 11, 1 }, + { "TC", 8, 3 }, + { "Function", 0, 8 }, + { "PCIE_FID", 0x3a8c, 0 }, + { "Pad", 11, 1 }, + { "TC", 8, 3 }, + { "Function", 0, 8 }, + { "PCIE_FID", 0x3a90, 0 }, + { "Pad", 11, 1 }, + { "TC", 8, 3 }, + { "Function", 0, 8 }, + { "PCIE_FID", 0x3a94, 0 }, + { "Pad", 11, 1 }, + { "TC", 8, 3 }, + { "Function", 0, 8 }, + { "PCIE_FID", 0x3a98, 0 }, + { "Pad", 11, 1 }, + { "TC", 8, 3 }, + { "Function", 0, 8 }, + { "PCIE_FID", 0x3a9c, 0 }, + { "Pad", 11, 1 }, + { "TC", 8, 3 }, + { "Function", 0, 8 }, + { "PCIE_FID", 0x3aa0, 0 }, + { "Pad", 11, 1 }, + { "TC", 8, 3 }, + { "Function", 0, 8 }, + { "PCIE_FID", 0x3aa4, 0 }, + { "Pad", 11, 1 }, + { "TC", 8, 3 }, + { "Function", 0, 8 }, + { "PCIE_FID", 0x3aa8, 0 }, + { "Pad", 11, 1 }, + { "TC", 8, 3 }, + { "Function", 0, 8 }, + { "PCIE_FID", 0x3aac, 0 }, + { "Pad", 11, 1 }, + { "TC", 8, 3 }, + { "Function", 0, 8 }, + { "PCIE_FID", 0x3ab0, 0 }, + { "Pad", 11, 1 }, + { "TC", 8, 3 }, + { "Function", 0, 8 }, + { "PCIE_FID", 0x3ab4, 0 }, + { "Pad", 11, 1 }, + { "TC", 8, 3 }, + { "Function", 0, 8 }, + { "PCIE_FID", 0x3ab8, 0 }, + { "Pad", 11, 1 }, + { "TC", 8, 3 }, + { "Function", 0, 8 }, + { "PCIE_FID", 0x3abc, 0 }, + { "Pad", 11, 1 }, + { "TC", 8, 3 }, + { "Function", 0, 8 }, + { "PCIE_FID", 0x3ac0, 0 }, + { "Pad", 11, 1 }, + { "TC", 8, 3 }, + { "Function", 0, 8 }, + { "PCIE_FID", 0x3ac4, 0 }, + { "Pad", 11, 1 }, + { "TC", 8, 3 }, + { "Function", 0, 8 }, + { "PCIE_FID", 0x3ac8, 0 }, + { "Pad", 11, 1 }, + { "TC", 8, 3 }, + { "Function", 0, 8 }, + { "PCIE_FID", 0x3acc, 0 }, + { "Pad", 11, 1 }, + { "TC", 8, 3 }, + { "Function", 0, 8 }, + { "PCIE_FID", 0x3ad0, 0 }, + { "Pad", 11, 1 }, + { "TC", 8, 3 }, + { "Function", 0, 8 }, + { "PCIE_FID", 0x3ad4, 0 }, + { "Pad", 11, 1 }, + { "TC", 8, 3 }, + { "Function", 0, 8 }, + { "PCIE_FID", 0x3ad8, 0 }, + { "Pad", 11, 1 }, + { "TC", 8, 3 }, + { "Function", 0, 8 }, + { "PCIE_FID", 0x3adc, 0 }, + { "Pad", 11, 1 }, + { "TC", 8, 3 }, + { "Function", 0, 8 }, + { "PCIE_FID", 0x3ae0, 0 }, + { "Pad", 11, 1 }, + { "TC", 8, 3 }, + { "Function", 0, 8 }, + { "PCIE_FID", 0x3ae4, 0 }, + { "Pad", 11, 1 }, + { "TC", 8, 3 }, + { "Function", 0, 8 }, + { "PCIE_FID", 0x3ae8, 0 }, + { "Pad", 11, 1 }, + { "TC", 8, 3 }, + { "Function", 0, 8 }, + { "PCIE_FID", 0x3aec, 0 }, + { "Pad", 11, 1 }, + { "TC", 8, 3 }, + { "Function", 0, 8 }, + { "PCIE_FID", 0x3af0, 0 }, + { "Pad", 11, 1 }, + { "TC", 8, 3 }, + { "Function", 0, 8 }, + { "PCIE_FID", 0x3af4, 0 }, + { "Pad", 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11, 1 }, + { "TC", 8, 3 }, + { "Function", 0, 8 }, + { "PCIE_FID", 0x56fc, 0 }, + { "Pad", 11, 1 }, + { "TC", 8, 3 }, + { "Function", 0, 8 }, + { "PCIE_FID", 0x5700, 0 }, + { "Pad", 11, 1 }, + { "TC", 8, 3 }, + { "Function", 0, 8 }, + { "PCIE_FID", 0x5704, 0 }, + { "Pad", 11, 1 }, + { "TC", 8, 3 }, + { "Function", 0, 8 }, + { "PCIE_FID", 0x5708, 0 }, + { "Pad", 11, 1 }, + { "TC", 8, 3 }, + { "Function", 0, 8 }, + { "PCIE_FID", 0x570c, 0 }, + { "Pad", 11, 1 }, + { "TC", 8, 3 }, + { "Function", 0, 8 }, + { "PCIE_FID", 0x5710, 0 }, + { "Pad", 11, 1 }, + { "TC", 8, 3 }, + { "Function", 0, 8 }, + { "PCIE_FID", 0x5714, 0 }, + { "Pad", 11, 1 }, + { "TC", 8, 3 }, + { "Function", 0, 8 }, + { "PCIE_FID", 0x5718, 0 }, + { "Pad", 11, 1 }, + { "TC", 8, 3 }, + { "Function", 0, 8 }, + { "PCIE_FID", 0x571c, 0 }, + { "Pad", 11, 1 }, + { "TC", 8, 3 }, + { "Function", 0, 8 }, + { "PCIE_FID", 0x5720, 0 }, + { "Pad", 11, 1 }, + { "TC", 8, 3 }, + { "Function", 0, 8 }, + { "PCIE_FID", 0x5724, 0 }, + { "Pad", 11, 1 }, + { "TC", 8, 3 }, + { "Function", 0, 8 }, + { "PCIE_FID", 0x5728, 0 }, + { "Pad", 11, 1 }, + { "TC", 8, 3 }, + { "Function", 0, 8 }, + { "PCIE_FID", 0x572c, 0 }, + { "Pad", 11, 1 }, + { "TC", 8, 3 }, + { "Function", 0, 8 }, + { "PCIE_FID", 0x5730, 0 }, + { "Pad", 11, 1 }, + { "TC", 8, 3 }, + { "Function", 0, 8 }, + { "PCIE_FID", 0x5734, 0 }, + { "Pad", 11, 1 }, + { "TC", 8, 3 }, + { "Function", 0, 8 }, + { "PCIE_FID", 0x5738, 0 }, + { "Pad", 11, 1 }, + { "TC", 8, 3 }, + { "Function", 0, 8 }, + { "PCIE_FID", 0x573c, 0 }, + { "Pad", 11, 1 }, + { "TC", 8, 3 }, + { "Function", 0, 8 }, + { "PCIE_FID", 0x5740, 0 }, + { "Pad", 11, 1 }, + { "TC", 8, 3 }, + { "Function", 0, 8 }, + { "PCIE_FID", 0x5744, 0 }, + { "Pad", 11, 1 }, + { "TC", 8, 3 }, + { "Function", 0, 8 }, + { "PCIE_FID", 0x5748, 0 }, + { "Pad", 11, 1 }, + { "TC", 8, 3 }, + { "Function", 0, 8 }, + { "PCIE_FID", 0x574c, 0 }, + { "Pad", 11, 1 }, + { "TC", 8, 3 }, + { "Function", 0, 8 }, + { "PCIE_FID", 0x5750, 0 }, + { "Pad", 11, 1 }, + { "TC", 8, 3 }, + { "Function", 0, 8 }, + { "PCIE_FID", 0x5754, 0 }, + { "Pad", 11, 1 }, + { "TC", 8, 3 }, + { "Function", 0, 8 }, + { "PCIE_FID", 0x5758, 0 }, + { "Pad", 11, 1 }, + { "TC", 8, 3 }, + { "Function", 0, 8 }, + { "PCIE_FID", 0x575c, 0 }, + { "Pad", 11, 1 }, + { "TC", 8, 3 }, + { "Function", 0, 8 }, + { "PCIE_FID", 0x5760, 0 }, + { "Pad", 11, 1 }, + { "TC", 8, 3 }, + { "Function", 0, 8 }, + { "PCIE_FID", 0x5764, 0 }, + { "Pad", 11, 1 }, + { "TC", 8, 3 }, + { "Function", 0, 8 }, + { "PCIE_FID", 0x5768, 0 }, + { "Pad", 11, 1 }, + { "TC", 8, 3 }, + { "Function", 0, 8 }, + { "PCIE_FID", 0x576c, 0 }, + { "Pad", 11, 1 }, + { "TC", 8, 3 }, + { "Function", 0, 8 }, + { "PCIE_FID", 0x5770, 0 }, + { "Pad", 11, 1 }, + { "TC", 8, 3 }, + { "Function", 0, 8 }, + { "PCIE_FID", 0x5774, 0 }, + { "Pad", 11, 1 }, + { "TC", 8, 3 }, + { "Function", 0, 8 }, + { "PCIE_FID", 0x5778, 0 }, + { "Pad", 11, 1 }, + { "TC", 8, 3 }, + { "Function", 0, 8 }, + { "PCIE_FID", 0x577c, 0 }, + { "Pad", 11, 1 }, + { "TC", 8, 3 }, + { "Function", 0, 8 }, + { "PCIE_FID", 0x5780, 0 }, + { "Pad", 11, 1 }, + { "TC", 8, 3 }, + { "Function", 0, 8 }, + { "PCIE_FID", 0x5784, 0 }, + { "Pad", 11, 1 }, + { "TC", 8, 3 }, + { "Function", 0, 8 }, + { "PCIE_FID", 0x5788, 0 }, + { "Pad", 11, 1 }, + { "TC", 8, 3 }, + { "Function", 0, 8 }, + { "PCIE_FID", 0x578c, 0 }, + { "Pad", 11, 1 }, + { "TC", 8, 3 }, + { "Function", 0, 8 }, + { "PCIE_FID", 0x5790, 0 }, + { "Pad", 11, 1 }, + { "TC", 8, 3 }, + { "Function", 0, 8 }, + { "PCIE_FID", 0x5794, 0 }, + { "Pad", 11, 1 }, + { "TC", 8, 3 }, + { "Function", 0, 8 }, + { "PCIE_FID", 0x5798, 0 }, + { "Pad", 11, 1 }, + { "TC", 8, 3 }, + { "Function", 0, 8 }, + { "PCIE_FID", 0x579c, 0 }, + { "Pad", 11, 1 }, + { "TC", 8, 3 }, + { "Function", 0, 8 }, + { "PCIE_FID", 0x57a0, 0 }, + { "Pad", 11, 1 }, + { "TC", 8, 3 }, + { "Function", 0, 8 }, + { "PCIE_FID", 0x57a4, 0 }, + { "Pad", 11, 1 }, + { "TC", 8, 3 }, + { "Function", 0, 8 }, + { "PCIE_FID", 0x57a8, 0 }, + { "Pad", 11, 1 }, + { "TC", 8, 3 }, + { "Function", 0, 8 }, + { "PCIE_FID", 0x57ac, 0 }, + { "Pad", 11, 1 }, + { "TC", 8, 3 }, + { "Function", 0, 8 }, + { "PCIE_FID", 0x57b0, 0 }, + { "Pad", 11, 1 }, + { "TC", 8, 3 }, + { "Function", 0, 8 }, + { "PCIE_FID", 0x57b4, 0 }, + { "Pad", 11, 1 }, + { "TC", 8, 3 }, + { "Function", 0, 8 }, + { "PCIE_FID", 0x57b8, 0 }, + { "Pad", 11, 1 }, + { "TC", 8, 3 }, + { "Function", 0, 8 }, + { "PCIE_FID", 0x57bc, 0 }, + { "Pad", 11, 1 }, + { "TC", 8, 3 }, + { "Function", 0, 8 }, + { "PCIE_FID", 0x57c0, 0 }, + { "Pad", 11, 1 }, + { "TC", 8, 3 }, + { "Function", 0, 8 }, + { "PCIE_FID", 0x57c4, 0 }, + { "Pad", 11, 1 }, + { "TC", 8, 3 }, + { "Function", 0, 8 }, + { "PCIE_FID", 0x57c8, 0 }, + { "Pad", 11, 1 }, + { "TC", 8, 3 }, + { "Function", 0, 8 }, + { "PCIE_FID", 0x57cc, 0 }, + { "Pad", 11, 1 }, + { "TC", 8, 3 }, + { "Function", 0, 8 }, + { "PCIE_FID", 0x57d0, 0 }, + { "Pad", 11, 1 }, + { "TC", 8, 3 }, + { "Function", 0, 8 }, + { "PCIE_FID", 0x57d4, 0 }, + { "Pad", 11, 1 }, + { "TC", 8, 3 }, + { "Function", 0, 8 }, + { "PCIE_FID", 0x57d8, 0 }, + { "Pad", 11, 1 }, + { "TC", 8, 3 }, + { "Function", 0, 8 }, + { "PCIE_FID", 0x57dc, 0 }, + { "Pad", 11, 1 }, + { "TC", 8, 3 }, + { "Function", 0, 8 }, + { "PCIE_FID", 0x57e0, 0 }, + { "Pad", 11, 1 }, + { "TC", 8, 3 }, + { "Function", 0, 8 }, + { "PCIE_FID", 0x57e4, 0 }, + { "Pad", 11, 1 }, + { "TC", 8, 3 }, + { "Function", 0, 8 }, + { "PCIE_FID", 0x57e8, 0 }, + { "Pad", 11, 1 }, + { "TC", 8, 3 }, + { "Function", 0, 8 }, + { "PCIE_FID", 0x57ec, 0 }, + { "Pad", 11, 1 }, + { "TC", 8, 3 }, + { "Function", 0, 8 }, + { "PCIE_FID", 0x57f0, 0 }, + { "Pad", 11, 1 }, + { "TC", 8, 3 }, + { "Function", 0, 8 }, + { "PCIE_FID", 0x57f4, 0 }, + { "Pad", 11, 1 }, + { "TC", 8, 3 }, + { "Function", 0, 8 }, + { "PCIE_FID", 0x57f8, 0 }, + { "Pad", 11, 1 }, + { "TC", 8, 3 }, + { "Function", 0, 8 }, + { "PCIE_FID", 0x57fc, 0 }, + { "Pad", 11, 1 }, + { "TC", 8, 3 }, + { "Function", 0, 8 }, + { "PCIE_FID", 0x5800, 0 }, + { "Pad", 11, 1 }, + { "TC", 8, 3 }, + { "Function", 0, 8 }, + { "PCIE_FID", 0x5804, 0 }, + { "Pad", 11, 1 }, + { "TC", 8, 3 }, + { "Function", 0, 8 }, + { "PCIE_FID", 0x5808, 0 }, + { "Pad", 11, 1 }, + { "TC", 8, 3 }, + { "Function", 0, 8 }, + { "PCIE_FID", 0x580c, 0 }, + { "Pad", 11, 1 }, + { "TC", 8, 3 }, + { "Function", 0, 8 }, + { "PCIE_FID", 0x5810, 0 }, + { "Pad", 11, 1 }, + { "TC", 8, 3 }, + { "Function", 0, 8 }, + { "PCIE_FID", 0x5814, 0 }, + { "Pad", 11, 1 }, + { "TC", 8, 3 }, + { "Function", 0, 8 }, + { "PCIE_FID", 0x5818, 0 }, + { "Pad", 11, 1 }, + { "TC", 8, 3 }, + { "Function", 0, 8 }, + { "PCIE_FID", 0x581c, 0 }, + { "Pad", 11, 1 }, + { "TC", 8, 3 }, + { "Function", 0, 8 }, + { "PCIE_FID", 0x5820, 0 }, + { "Pad", 11, 1 }, + { "TC", 8, 3 }, + { "Function", 0, 8 }, + { "PCIE_FID", 0x5824, 0 }, + { "Pad", 11, 1 }, + { "TC", 8, 3 }, + { "Function", 0, 8 }, + { "PCIE_FID", 0x5828, 0 }, + { "Pad", 11, 1 }, + { "TC", 8, 3 }, + { "Function", 0, 8 }, + { "PCIE_FID", 0x582c, 0 }, + { "Pad", 11, 1 }, + { "TC", 8, 3 }, + { "Function", 0, 8 }, + { "PCIE_FID", 0x5830, 0 }, + { "Pad", 11, 1 }, + { "TC", 8, 3 }, + { "Function", 0, 8 }, + { "PCIE_FID", 0x5834, 0 }, + { "Pad", 11, 1 }, + { "TC", 8, 3 }, + { "Function", 0, 8 }, + { "PCIE_FID", 0x5838, 0 }, + { "Pad", 11, 1 }, + { "TC", 8, 3 }, + { "Function", 0, 8 }, + { "PCIE_FID", 0x583c, 0 }, + { "Pad", 11, 1 }, + { "TC", 8, 3 }, + { "Function", 0, 8 }, + { "PCIE_FID", 0x5840, 0 }, + { "Pad", 11, 1 }, + { "TC", 8, 3 }, + { "Function", 0, 8 }, + { "PCIE_FID", 0x5844, 0 }, + { "Pad", 11, 1 }, + { "TC", 8, 3 }, + { "Function", 0, 8 }, + { "PCIE_FID", 0x5848, 0 }, + { "Pad", 11, 1 }, + { "TC", 8, 3 }, + { "Function", 0, 8 }, + { "PCIE_FID", 0x584c, 0 }, + { "Pad", 11, 1 }, + { "TC", 8, 3 }, + { "Function", 0, 8 }, + { "PCIE_FID", 0x5850, 0 }, + { "Pad", 11, 1 }, + { "TC", 8, 3 }, + { "Function", 0, 8 }, + { "PCIE_FID", 0x5854, 0 }, + { "Pad", 11, 1 }, + { "TC", 8, 3 }, + { "Function", 0, 8 }, + { "PCIE_FID", 0x5858, 0 }, + { "Pad", 11, 1 }, + { "TC", 8, 3 }, + { "Function", 0, 8 }, + { "PCIE_FID", 0x585c, 0 }, + { "Pad", 11, 1 }, + { "TC", 8, 3 }, + { "Function", 0, 8 }, + { "PCIE_FID", 0x5860, 0 }, + { "Pad", 11, 1 }, + { "TC", 8, 3 }, + { "Function", 0, 8 }, + { "PCIE_FID", 0x5864, 0 }, + { "Pad", 11, 1 }, + { "TC", 8, 3 }, + { "Function", 0, 8 }, + { "PCIE_FID", 0x5868, 0 }, + { "Pad", 11, 1 }, + { "TC", 8, 3 }, + { "Function", 0, 8 }, + { "PCIE_FID", 0x586c, 0 }, + { "Pad", 11, 1 }, + { "TC", 8, 3 }, + { "Function", 0, 8 }, + { "PCIE_FID", 0x5870, 0 }, + { "Pad", 11, 1 }, + { "TC", 8, 3 }, + { "Function", 0, 8 }, + { "PCIE_FID", 0x5874, 0 }, + { "Pad", 11, 1 }, + { "TC", 8, 3 }, + { "Function", 0, 8 }, + { "PCIE_FID", 0x5878, 0 }, + { "Pad", 11, 1 }, + { "TC", 8, 3 }, + { "Function", 0, 8 }, + { "PCIE_FID", 0x587c, 0 }, + { "Pad", 11, 1 }, + { "TC", 8, 3 }, + { "Function", 0, 8 }, + { "PCIE_FID", 0x5880, 0 }, + { "Pad", 11, 1 }, + { "TC", 8, 3 }, + { "Function", 0, 8 }, + { "PCIE_FID", 0x5884, 0 }, + { "Pad", 11, 1 }, + { "TC", 8, 3 }, + { "Function", 0, 8 }, + { "PCIE_FID", 0x5888, 0 }, + { "Pad", 11, 1 }, + { "TC", 8, 3 }, + { "Function", 0, 8 }, + { "PCIE_FID", 0x588c, 0 }, + { "Pad", 11, 1 }, + { "TC", 8, 3 }, + { "Function", 0, 8 }, + { "PCIE_FID", 0x5890, 0 }, + { "Pad", 11, 1 }, + { "TC", 8, 3 }, + { "Function", 0, 8 }, + { "PCIE_FID", 0x5894, 0 }, + { "Pad", 11, 1 }, + { "TC", 8, 3 }, + { "Function", 0, 8 }, + { "PCIE_FID", 0x5898, 0 }, + { "Pad", 11, 1 }, + { "TC", 8, 3 }, + { "Function", 0, 8 }, + { "PCIE_FID", 0x589c, 0 }, + { "Pad", 11, 1 }, + { "TC", 8, 3 }, + { "Function", 0, 8 }, + { "PCIE_FID", 0x58a0, 0 }, + { "Pad", 11, 1 }, + { "TC", 8, 3 }, + { "Function", 0, 8 }, + { "PCIE_FID", 0x58a4, 0 }, + { "Pad", 11, 1 }, + { "TC", 8, 3 }, + { "Function", 0, 8 }, + { "PCIE_FID", 0x58a8, 0 }, + { "Pad", 11, 1 }, + { "TC", 8, 3 }, + { "Function", 0, 8 }, + { "PCIE_FID", 0x58ac, 0 }, + { "Pad", 11, 1 }, + { "TC", 8, 3 }, + { "Function", 0, 8 }, + { "PCIE_FID", 0x58b0, 0 }, + { "Pad", 11, 1 }, + { "TC", 8, 3 }, + { "Function", 0, 8 }, + { "PCIE_FID", 0x58b4, 0 }, + { "Pad", 11, 1 }, + { "TC", 8, 3 }, + { "Function", 0, 8 }, + { "PCIE_FID", 0x58b8, 0 }, + { "Pad", 11, 1 }, + { "TC", 8, 3 }, + { "Function", 0, 8 }, + { "PCIE_FID", 0x58bc, 0 }, + { "Pad", 11, 1 }, + { "TC", 8, 3 }, + { "Function", 0, 8 }, + { "PCIE_FID", 0x58c0, 0 }, + { "Pad", 11, 1 }, + { "TC", 8, 3 }, + { "Function", 0, 8 }, + { "PCIE_FID", 0x58c4, 0 }, + { "Pad", 11, 1 }, + { "TC", 8, 3 }, + { "Function", 0, 8 }, + { "PCIE_FID", 0x58c8, 0 }, + { "Pad", 11, 1 }, + { "TC", 8, 3 }, + { "Function", 0, 8 }, + { "PCIE_FID", 0x58cc, 0 }, + { "Pad", 11, 1 }, + { "TC", 8, 3 }, + { "Function", 0, 8 }, + { "PCIE_FID", 0x58d0, 0 }, + { "Pad", 11, 1 }, + { "TC", 8, 3 }, + { "Function", 0, 8 }, + { "PCIE_FID", 0x58d4, 0 }, + { "Pad", 11, 1 }, + { "TC", 8, 3 }, + { "Function", 0, 8 }, + { "PCIE_FID", 0x58d8, 0 }, + { "Pad", 11, 1 }, + { "TC", 8, 3 }, + { "Function", 0, 8 }, + { "PCIE_FID", 0x58dc, 0 }, + { "Pad", 11, 1 }, + { "TC", 8, 3 }, + { "Function", 0, 8 }, + { "PCIE_FID", 0x58e0, 0 }, + { "Pad", 11, 1 }, + { "TC", 8, 3 }, + { "Function", 0, 8 }, + { "PCIE_FID", 0x58e4, 0 }, + { "Pad", 11, 1 }, + { "TC", 8, 3 }, + { "Function", 0, 8 }, + { "PCIE_FID", 0x58e8, 0 }, + { "Pad", 11, 1 }, + { "TC", 8, 3 }, + { "Function", 0, 8 }, + { "PCIE_FID", 0x58ec, 0 }, + { "Pad", 11, 1 }, + { "TC", 8, 3 }, + { "Function", 0, 8 }, + { "PCIE_FID", 0x58f0, 0 }, + { "Pad", 11, 1 }, + { "TC", 8, 3 }, + { "Function", 0, 8 }, + { "PCIE_FID", 0x58f4, 0 }, + { "Pad", 11, 1 }, + { "TC", 8, 3 }, + { "Function", 0, 8 }, + { "PCIE_FID", 0x58f8, 0 }, + { "Pad", 11, 1 }, + { "TC", 8, 3 }, + { "Function", 0, 8 }, + { "PCIE_FID", 0x58fc, 0 }, + { "Pad", 11, 1 }, + { "TC", 8, 3 }, + { "Function", 0, 8 }, + { "PCIE_REVISION", 0x5a00, 0 }, + { "PCIE_PDEBUG_INDEX", 0x5a04, 0 }, + { "PDEBUGSelH", 16, 6 }, + { "PDEBUGSelL", 0, 6 }, + { "PCIE_PDEBUG_DATA_HIGH", 0x5a08, 0 }, + { "PCIE_PDEBUG_DATA_LOW", 0x5a0c, 0 }, + { "PCIE_CDEBUG_INDEX", 0x5a10, 0 }, + { "CDEBUGSelH", 16, 8 }, + { "CDEBUGSelL", 0, 8 }, + { "PCIE_CDEBUG_DATA_HIGH", 0x5a14, 0 }, + { "PCIE_CDEBUG_DATA_LOW", 0x5a18, 0 }, + { "PCIE_DMAW_SOP_CNT", 0x5a1c, 0 }, + { "CH3", 24, 8 }, + { "CH2", 16, 8 }, + { "CH1", 8, 8 }, + { "CH0", 0, 8 }, + { "PCIE_DMAW_EOP_CNT", 0x5a20, 0 }, + { "CH3", 24, 8 }, + { "CH2", 16, 8 }, + { "CH1", 8, 8 }, + { "CH0", 0, 8 }, + { "PCIE_DMAR_REQ_CNT", 0x5a24, 0 }, + { "CH3", 24, 8 }, + { "CH2", 16, 8 }, + { "CH1", 8, 8 }, + { "CH0", 0, 8 }, + { "PCIE_DMAR_RSP_SOP_CNT", 0x5a28, 0 }, + { "CH3", 24, 8 }, + { "CH2", 16, 8 }, + { "CH1", 8, 8 }, + { "CH0", 0, 8 }, + { "PCIE_DMAR_RSP_EOP_CNT", 0x5a2c, 0 }, + { "CH3", 24, 8 }, + { "CH2", 16, 8 }, + { "CH1", 8, 8 }, + { "CH0", 0, 8 }, + { "PCIE_DMAR_RSP_ERR_CNT", 0x5a30, 0 }, + { "CH3", 24, 8 }, + { "CH2", 16, 8 }, + { "CH1", 8, 8 }, + { "CH0", 0, 8 }, + { "PCIE_DMAI_CNT", 0x5a34, 0 }, + { "CH3", 24, 8 }, + { "CH2", 16, 8 }, + { "CH1", 8, 8 }, + { "CH0", 0, 8 }, + { "PCIE_CMDW_CNT", 0x5a38, 0 }, + { "CH1_EOP", 24, 8 }, + { "CH1_SOP", 16, 8 }, + { "CH0_EOP", 8, 8 }, + { "CH0_SOP", 0, 8 }, + { "PCIE_CMDR_REQ_CNT", 0x5a3c, 0 }, + { "CH1", 8, 8 }, + { "CH0", 0, 8 }, + { "PCIE_CMDR_RSP_CNT", 0x5a40, 0 }, + { "CH1_EOP", 24, 8 }, + { "CH1_SOP", 16, 8 }, + { "CH0_EOP", 8, 8 }, + { "CH0_SOP", 0, 8 }, + { "PCIE_CMDR_RSP_ERR_CNT", 0x5a44, 0 }, + { "CH1", 8, 8 }, + { "CH0", 0, 8 }, + { "PCIE_HMA_REQ_CNT", 0x5a48, 0 }, + { "CH0_READ", 16, 8 }, + { "CH0_WEOP", 8, 8 }, + { "CH0_WSOP", 0, 8 }, + { "PCIE_HMA_RSP_CNT", 0x5a4c, 0 }, + { "CH0_EOP", 8, 8 }, + { "CH0_SOP", 0, 8 }, + { "PCIE_DMA10_RSP_FREE", 0x5a50, 0 }, + { "CH1", 16, 12 }, + { "CH0", 0, 12 }, + { "PCIE_DMA32_RSP_FREE", 0x5a54, 0 }, + { "CH3", 16, 12 }, + { "CH2", 0, 12 }, + { "PCIE_CMD_RSP_FREE", 0x5a58, 0 }, + { "CH1", 16, 7 }, + { "CH0", 0, 7 }, + { "PCIE_HMA_RSP_FREE", 0x5a5c, 0 }, + { "PCIE_BUS_MST_STAT_0", 0x5a60, 0 }, + { "PCIE_BUS_MST_STAT_1", 0x5a64, 0 }, + { "PCIE_BUS_MST_STAT_2", 0x5a68, 0 }, + { "PCIE_BUS_MST_STAT_3", 0x5a6c, 0 }, + { "PCIE_BUS_MST_STAT_4", 0x5a70, 0 }, + { "PCIE_BUS_MST_STAT_5", 0x5a74, 0 }, + { "PCIE_BUS_MST_STAT_6", 0x5a78, 0 }, + { "PCIE_BUS_MST_STAT_7", 0x5a7c, 0 }, + { "PCIE_RSP_ERR_STAT_0", 0x5a80, 0 }, + { "PCIE_RSP_ERR_STAT_1", 0x5a84, 0 }, + { "PCIE_RSP_ERR_STAT_2", 0x5a88, 0 }, + { "PCIE_RSP_ERR_STAT_3", 0x5a8c, 0 }, + { "PCIE_RSP_ERR_STAT_4", 0x5a90, 0 }, + { "PCIE_RSP_ERR_STAT_5", 0x5a94, 0 }, + { "PCIE_RSP_ERR_STAT_6", 0x5a98, 0 }, + { "PCIE_RSP_ERR_STAT_7", 0x5a9c, 0 }, + { "PCIE_MSI_EN_0", 0x5aa0, 0 }, + { "PCIE_MSI_EN_1", 0x5aa4, 0 }, + { "PCIE_MSI_EN_2", 0x5aa8, 0 }, + { "PCIE_MSI_EN_3", 0x5aac, 0 }, + { "PCIE_MSI_EN_4", 0x5ab0, 0 }, + { "PCIE_MSI_EN_5", 0x5ab4, 0 }, + { "PCIE_MSI_EN_6", 0x5ab8, 0 }, + { "PCIE_MSI_EN_7", 0x5abc, 0 }, + { "PCIE_MSIX_EN_0", 0x5ac0, 0 }, + { "PCIE_MSIX_EN_1", 0x5ac4, 0 }, + { "PCIE_MSIX_EN_2", 0x5ac8, 0 }, + { "PCIE_MSIX_EN_3", 0x5acc, 0 }, + { "PCIE_MSIX_EN_4", 0x5ad0, 0 }, + { "PCIE_MSIX_EN_5", 0x5ad4, 0 }, + { "PCIE_MSIX_EN_6", 0x5ad8, 0 }, + { "PCIE_MSIX_EN_7", 0x5adc, 0 }, + { "PCIE_DMA_BUF_CTL", 0x5ae0, 0 }, + { "BufRdCnt", 18, 14 }, + { "BufWrCnt", 9, 9 }, + { "MaxBufWrReq", 0, 9 }, + { "PCIE_DMA_BUF_CTL", 0x5ae8, 0 }, + { "BufRdCnt", 18, 14 }, + { "BufWrCnt", 9, 9 }, + { "MaxBufWrReq", 0, 9 }, + { "PCIE_DMA_BUF_CTL", 0x5af0, 0 }, + { "BufRdCnt", 18, 14 }, + { "BufWrCnt", 9, 9 }, + { "MaxBufWrReq", 0, 9 }, + { "PCIE_DMA_BUF_CTL", 0x5af8, 0 }, + { "BufRdCnt", 18, 14 }, + { "BufWrCnt", 9, 9 }, + { "MaxBufWrReq", 0, 9 }, + { "PCIE_CORE_UTL_SYSTEM_BUS_CONTROL", 0x5900, 0 }, + { "SMTD", 27, 1 }, + { "SSTD", 26, 1 }, + { "SWD0", 23, 1 }, + { "SWD1", 22, 1 }, + { "SWD2", 21, 1 }, + { "SWD3", 20, 1 }, + { "SWD4", 19, 1 }, + { "SWD5", 18, 1 }, + { "SWD6", 17, 1 }, + { "SWD7", 16, 1 }, + { "SWD8", 15, 1 }, + { "SRD0", 13, 1 }, + { "SRD1", 12, 1 }, + { "SRD2", 11, 1 }, + { "SRD3", 10, 1 }, + { "SRD4", 9, 1 }, + { "SRD5", 8, 1 }, + { "SRD6", 7, 1 }, + { "SRD7", 6, 1 }, + { "SRD8", 5, 1 }, + { "CRRE", 3, 1 }, + { "CRMC", 0, 3 }, + { "PCIE_CORE_UTL_STATUS", 0x5904, 0 }, + { "USBP", 31, 1 }, + { "UPEP", 30, 1 }, + { "RCEP", 29, 1 }, + { "EPEP", 28, 1 }, + { "USBS", 27, 1 }, + { "UPES", 26, 1 }, + { "RCES", 25, 1 }, + { "EPES", 24, 1 }, + { "PCIE_CORE_UTL_SYSTEM_BUS_AGENT_STATUS", 0x5908, 0 }, + { "RNPP", 31, 1 }, + { "RPCP", 29, 1 }, + { "RCIP", 27, 1 }, + { "RCCP", 26, 1 }, + { "RFTP", 23, 1 }, + { "PTRP", 20, 1 }, + { "PCIE_CORE_UTL_SYSTEM_BUS_AGENT_ERROR_SEVERITY", 0x590c, 0 }, + { "RNPS", 31, 1 }, + { "RPCS", 29, 1 }, + { "RCIS", 27, 1 }, + { "RCCS", 26, 1 }, + { "RFTS", 23, 1 }, + { "PCIE_CORE_UTL_SYSTEM_BUS_AGENT_INTERRUPT_ENABLE", 0x5910, 0 }, + { "RNPI", 31, 1 }, + { "RPCI", 29, 1 }, + { "RCII", 27, 1 }, + { "RCCI", 26, 1 }, + { "RFTI", 23, 1 }, + { "PCIE_CORE_SYSTEM_BUS_BURST_SIZE_CONFIGURATION", 0x5920, 0 }, + { "SBRS", 28, 3 }, + { "OTWS", 20, 3 }, + { "PCIE_CORE_REVISION_ID", 0x5924, 0 }, + { "RVID", 20, 12 }, + { "BRVN", 12, 8 }, + { "PCIE_CORE_OUTBOUND_POSTED_HEADER_BUFFER_ALLOCATION", 0x5960, 0 }, + { "OP0H", 24, 4 }, + { "OP1H", 16, 4 }, + { "OP2H", 8, 4 }, + { "OP3H", 0, 4 }, + { "PCIE_CORE_OUTBOUND_POSTED_DATA_BUFFER_ALLOCATION", 0x5968, 0 }, + { "OP0D", 24, 7 }, + { "OP1D", 16, 7 }, + { "OP2D", 8, 7 }, + { "OP3D", 0, 7 }, + { "PCIE_CORE_INBOUND_POSTED_HEADER_BUFFER_ALLOCATION", 0x5970, 0 }, + { "IP0H", 24, 6 }, + { "IP1H", 16, 6 }, + { "IP2H", 8, 6 }, + { "IP3H", 0, 6 }, + { "PCIE_CORE_INBOUND_POSTED_DATA_BUFFER_ALLOCATION", 0x5978, 0 }, + { "IP0D", 24, 8 }, + { "IP1D", 16, 8 }, + { "IP2D", 8, 8 }, + { "IP3D", 0, 8 }, + { "PCIE_CORE_OUTBOUND_NON_POSTED_BUFFER_ALLOCATION", 0x5980, 0 }, + { "ON0H", 24, 4 }, + { "ON1H", 16, 4 }, + { "ON2H", 8, 4 }, + { "ON3H", 0, 4 }, + { "PCIE_CORE_INBOUND_NON_POSTED_REQUESTS_BUFFER_ALLOCATION", 0x5988, 0 }, + { "IN0H", 24, 6 }, + { "IN1H", 16, 6 }, + { "IN2H", 8, 6 }, + { "IN3H", 0, 6 }, + { "PCIE_CORE_PCI_EXPRESS_TAGS_ALLOCATION", 0x5990, 0 }, + { "OC0T", 24, 8 }, + { "OC1T", 16, 8 }, + { "OC2T", 8, 8 }, + { "OC3T", 0, 8 }, + { "PCIE_CORE_GBIF_READ_TAGS_ALLOCATION", 0x5998, 0 }, + { "IC0T", 24, 6 }, + { "IC1T", 16, 6 }, + { "IC2T", 8, 6 }, + { "IC3T", 0, 6 }, + { "PCIE_CORE_UTL_PCI_EXPRESS_PORT_CONTROL", 0x59a0, 0 }, + { "VRB0", 31, 1 }, + { "VRB1", 30, 1 }, + { "VRB2", 29, 1 }, + { "VRB3", 28, 1 }, + { "PSFE", 26, 1 }, + { "RVDE", 25, 1 }, + { "TXE0", 23, 1 }, + { "TXE1", 22, 1 }, + { "TXE2", 21, 1 }, + { "TXE3", 20, 1 }, + { "RPAM", 13, 1 }, + { "RTOS", 4, 4 }, + { "PCIE_CORE_UTL_PCI_EXPRESS_PORT_STATUS", 0x59a4, 0 }, + { "TPCP", 30, 1 }, + { "TNPP", 29, 1 }, + { "TFTP", 28, 1 }, + { "TCAP", 27, 1 }, + { "TCIP", 26, 1 }, + { "RCAP", 25, 1 }, + { "PLUP", 23, 1 }, + { "PLDN", 22, 1 }, + { "OTDD", 21, 1 }, + { "GTRP", 20, 1 }, + { "RDPE", 18, 1 }, + { "TDCE", 17, 1 }, + { "TDUE", 16, 1 }, + { "PCIE_CORE_UTL_PCI_EXPRESS_PORT_ERROR_SEVERITY", 0x59a8, 0 }, + { "TPCS", 30, 1 }, + { "TNPS", 29, 1 }, + { "TFTS", 28, 1 }, + { "TCAS", 27, 1 }, + { "TCIS", 26, 1 }, + { "RCAS", 25, 1 }, + { "PLUS", 23, 1 }, + { "PLDS", 22, 1 }, + { "OTDS", 21, 1 }, + { "RDPS", 18, 1 }, + { "TDCS", 17, 1 }, + { "TDUS", 16, 1 }, + { "PCIE_CORE_UTL_PCI_EXPRESS_PORT_INTERRUPT_ENABLE", 0x59ac, 0 }, + { "TPCI", 30, 1 }, + { "TNPI", 29, 1 }, + { "TFTI", 28, 1 }, + { "TCAI", 27, 1 }, + { "TCII", 26, 1 }, + { "RCAI", 25, 1 }, + { "PLUI", 23, 1 }, + { "PLDI", 22, 1 }, + { "OTDI", 21, 1 }, + { "RDPS", 18, 1 }, + { "TDCS", 17, 1 }, + { "TDUS", 16, 1 }, + { "PCIE_CORE_ROOT_COMPLEX_STATUS", 0x59b0, 0 }, + { "RLCE", 31, 1 }, + { "RLNE", 30, 1 }, + { "RLFE", 29, 1 }, + { "RCPE", 25, 1 }, + { "RCTO", 24, 1 }, + { "PINA", 23, 1 }, + { "PINB", 22, 1 }, + { "PINC", 21, 1 }, + { "PIND", 20, 1 }, + { "ALER", 19, 1 }, + { "CRSE", 18, 1 }, + { "PCIE_CORE_ROOT_COMPLEX_ERROR_SEVERITY", 0x59b4, 0 }, + { "RLCS", 31, 1 }, + { "RLNS", 30, 1 }, + { "RLFS", 29, 1 }, + { "RCPS", 25, 1 }, + { "RCTS", 24, 1 }, + { "PAAS", 23, 1 }, + { "PABS", 22, 1 }, + { "PACS", 21, 1 }, + { "PADS", 20, 1 }, + { "ALES", 19, 1 }, + { "CRSS", 18, 1 }, + { "PCIE_CORE_ROOT_COMPLEX_INTERRUPT_ENABLE", 0x59b8, 0 }, + { "RLCI", 31, 1 }, + { "RLNI", 30, 1 }, + { "RLFI", 29, 1 }, + { "RCPI", 25, 1 }, + { "RCTI", 24, 1 }, + { "PAAI", 23, 1 }, + { "PABI", 22, 1 }, + { "PACI", 21, 1 }, + { "PADI", 20, 1 }, + { "ALEI", 19, 1 }, + { "CRSI", 18, 1 }, + { "PCIE_CORE_ENDPOINT_STATUS", 0x59bc, 0 }, + { "PTOM", 31, 1 }, + { "ALEA", 29, 1 }, + { "PMC0", 23, 1 }, + { "PMC1", 22, 1 }, + { "PMC2", 21, 1 }, + { "PMC3", 20, 1 }, + { "PMC4", 19, 1 }, + { "PMC5", 18, 1 }, + { "PMC6", 17, 1 }, + { "PMC7", 16, 1 }, + { "PCIE_CORE_ENDPOINT_ERROR_SEVERITY", 0x59c0, 0 }, + { "PTOS", 31, 1 }, + { "AENS", 29, 1 }, + { "PC0S", 23, 1 }, + { "PC1S", 22, 1 }, + { "PC2S", 21, 1 }, + { "PC3S", 20, 1 }, + { "PC4S", 19, 1 }, + { "PC5S", 18, 1 }, + { "PC6S", 17, 1 }, + { "PC7S", 16, 1 }, + { "PME0", 15, 1 }, + { "PME1", 14, 1 }, + { "PME2", 13, 1 }, + { "PME3", 12, 1 }, + { "PME4", 11, 1 }, + { "PME5", 10, 1 }, + { "PME6", 9, 1 }, + { "PME7", 8, 1 }, + { "PCIE_CORE_ENDPOINT_INTERRUPT_ENABLE", 0x59c4, 0 }, + { "PTOI", 31, 1 }, + { "AENI", 29, 1 }, + { "PC0I", 23, 1 }, + { "PC1I", 22, 1 }, + { "PC2I", 21, 1 }, + { "PC3I", 20, 1 }, + { "PC4I", 19, 1 }, + { "PC5I", 18, 1 }, + { "PC6I", 17, 1 }, + { "PC7I", 16, 1 }, + { "PCIE_CORE_PCI_POWER_MANAGEMENT_CONTROL_1", 0x59c8, 0 }, + { "TOAK", 31, 1 }, + { "L1RS", 23, 1 }, + { "L23S", 22, 1 }, + { "AL1S", 21, 1 }, + { "ALET", 19, 1 }, + { "PCIE_CORE_PCI_POWER_MANAGEMENT_CONTROL_2", 0x59cc, 0 }, + { "CPM0", 30, 2 }, + { "CPM1", 28, 2 }, + { "CPM2", 26, 2 }, + { "CPM3", 24, 2 }, + { "CPM4", 22, 2 }, + { "CPM5", 20, 2 }, + { "CPM6", 18, 2 }, + { "CPM7", 16, 2 }, + { "OPM0", 14, 2 }, + { "OPM1", 12, 2 }, + { "OPM2", 10, 2 }, + { "OPM3", 8, 2 }, + { "OPM4", 6, 2 }, + { "OPM5", 4, 2 }, + { "OPM6", 2, 2 }, + { "OPM7", 0, 2 }, + { "PCIE_CORE_GENERAL_PURPOSE_CONTROL_1", 0x59d0, 0 }, + { "PCIE_CORE_GENERAL_PURPOSE_CONTROL_2", 0x59d4, 0 }, + { "PCIE_PF_CFG", 0x1e040, 0 }, + { "INTXStat", 16, 1 }, + { "AuxPwrPMEn", 15, 1 }, + { "NoSoftReset", 14, 1 }, + { "AIVec", 4, 10 }, + { "INTXType", 2, 2 }, + { "D3HotEn", 1, 1 }, + { "CLIDecEn", 0, 1 }, + { "PCIE_PF_CLI", 0x1e044, 0 }, + { "PCIE_PF_GEN_MSG", 0x1e048, 0 }, + { "PCIE_PF_EXPROM_OFST", 0x1e04c, 0 }, + { "Offset", 10, 14 }, + { "PCIE_PF_CFG", 0x1e440, 0 }, + { "INTXStat", 16, 1 }, + { "AuxPwrPMEn", 15, 1 }, + { "NoSoftReset", 14, 1 }, + { "AIVec", 4, 10 }, + { "INTXType", 2, 2 }, + { "D3HotEn", 1, 1 }, + { "CLIDecEn", 0, 1 }, + { "PCIE_PF_CLI", 0x1e444, 0 }, + { "PCIE_PF_GEN_MSG", 0x1e448, 0 }, + { "PCIE_PF_EXPROM_OFST", 0x1e44c, 0 }, + { "Offset", 10, 14 }, + { "PCIE_PF_CFG", 0x1e840, 0 }, + { "INTXStat", 16, 1 }, + { "AuxPwrPMEn", 15, 1 }, + { "NoSoftReset", 14, 1 }, + { "AIVec", 4, 10 }, + { "INTXType", 2, 2 }, + { "D3HotEn", 1, 1 }, + { "CLIDecEn", 0, 1 }, + { "PCIE_PF_CLI", 0x1e844, 0 }, + { "PCIE_PF_GEN_MSG", 0x1e848, 0 }, + { "PCIE_PF_EXPROM_OFST", 0x1e84c, 0 }, + { "Offset", 10, 14 }, + { "PCIE_PF_CFG", 0x1ec40, 0 }, + { "INTXStat", 16, 1 }, + { "AuxPwrPMEn", 15, 1 }, + { "NoSoftReset", 14, 1 }, + { "AIVec", 4, 10 }, + { "INTXType", 2, 2 }, + { "D3HotEn", 1, 1 }, + { "CLIDecEn", 0, 1 }, + { "PCIE_PF_CLI", 0x1ec44, 0 }, + { "PCIE_PF_GEN_MSG", 0x1ec48, 0 }, + { "PCIE_PF_EXPROM_OFST", 0x1ec4c, 0 }, + { "Offset", 10, 14 }, + { "PCIE_PF_CFG", 0x1f040, 0 }, + { "INTXStat", 16, 1 }, + { "AuxPwrPMEn", 15, 1 }, + { "NoSoftReset", 14, 1 }, + { "AIVec", 4, 10 }, + { "INTXType", 2, 2 }, + { "D3HotEn", 1, 1 }, + { "CLIDecEn", 0, 1 }, + { "PCIE_PF_CLI", 0x1f044, 0 }, + { "PCIE_PF_GEN_MSG", 0x1f048, 0 }, + { "PCIE_PF_EXPROM_OFST", 0x1f04c, 0 }, + { "Offset", 10, 14 }, + { "PCIE_PF_CFG", 0x1f440, 0 }, + { "INTXStat", 16, 1 }, + { "AuxPwrPMEn", 15, 1 }, + { "NoSoftReset", 14, 1 }, + { "AIVec", 4, 10 }, + { "INTXType", 2, 2 }, + { "D3HotEn", 1, 1 }, + { "CLIDecEn", 0, 1 }, + { "PCIE_PF_CLI", 0x1f444, 0 }, + { "PCIE_PF_GEN_MSG", 0x1f448, 0 }, + { "PCIE_PF_EXPROM_OFST", 0x1f44c, 0 }, + { "Offset", 10, 14 }, + { "PCIE_PF_CFG", 0x1f840, 0 }, + { "INTXStat", 16, 1 }, + { "AuxPwrPMEn", 15, 1 }, + { "NoSoftReset", 14, 1 }, + { "AIVec", 4, 10 }, + { "INTXType", 2, 2 }, + { "D3HotEn", 1, 1 }, + { "CLIDecEn", 0, 1 }, + { "PCIE_PF_CLI", 0x1f844, 0 }, + { "PCIE_PF_GEN_MSG", 0x1f848, 0 }, + { "PCIE_PF_EXPROM_OFST", 0x1f84c, 0 }, + { "Offset", 10, 14 }, + { "PCIE_PF_CFG", 0x1fc40, 0 }, + { "INTXStat", 16, 1 }, + { "AuxPwrPMEn", 15, 1 }, + { "NoSoftReset", 14, 1 }, + { "AIVec", 4, 10 }, + { "INTXType", 2, 2 }, + { "D3HotEn", 1, 1 }, + { "CLIDecEn", 0, 1 }, + { "PCIE_PF_CLI", 0x1fc44, 0 }, + { "PCIE_PF_GEN_MSG", 0x1fc48, 0 }, + { "PCIE_PF_EXPROM_OFST", 0x1fc4c, 0 }, + { "Offset", 10, 14 }, + { NULL, 0, 0 } +}; + +struct reg_info t4_dbg_regs[] = { + { "DBG_DBG0_CFG", 0x6000, 0 }, + { "ModuleSelect", 12, 8 }, + { "RegSelect", 4, 8 }, + { "ClkSelect", 0, 4 }, + { "DBG_DBG0_EN", 0x6004, 0 }, + { "PortEn_PONR", 16, 1 }, + { "PortEn_POND", 12, 1 }, + { "SDRHalfWord0", 8, 1 }, + { "DDREn", 4, 1 }, + { "PortEn", 0, 1 }, + { "DBG_DBG1_CFG", 0x6008, 0 }, + { "ModuleSelect", 12, 8 }, + { "RegSelect", 4, 8 }, + { "ClkSelect", 0, 4 }, + { "DBG_DBG1_EN", 0x600c, 0 }, + { "PortEn_PONR", 16, 1 }, + { "PortEn_POND", 12, 1 }, + { "SDRHalfWord0", 8, 1 }, + { "DDREn", 4, 1 }, + { "PortEn", 0, 1 }, + { "DBG_GPIO_EN", 0x6010, 0 }, + { "GPIO15_OEn", 31, 1 }, + { "GPIO14_OEn", 30, 1 }, + { "GPIO13_OEn", 29, 1 }, + { "GPIO12_OEn", 28, 1 }, + { "GPIO11_OEn", 27, 1 }, + { "GPIO10_OEn", 26, 1 }, + { "GPIO9_OEn", 25, 1 }, + { "GPIO8_OEn", 24, 1 }, + { "GPIO7_OEn", 23, 1 }, + { "GPIO6_OEn", 22, 1 }, + { "GPIO5_OEn", 21, 1 }, + { "GPIO4_OEn", 20, 1 }, + { "GPIO3_OEn", 19, 1 }, + { "GPIO2_OEn", 18, 1 }, + { "GPIO1_OEn", 17, 1 }, + { "GPIO0_OEn", 16, 1 }, + { "GPIO15_Out_Val", 15, 1 }, + { "GPIO14_Out_Val", 14, 1 }, + { "GPIO13_Out_Val", 13, 1 }, + { "GPIO12_Out_Val", 12, 1 }, + { "GPIO11_Out_Val", 11, 1 }, + { "GPIO10_Out_Val", 10, 1 }, + { "GPIO9_Out_Val", 9, 1 }, + { "GPIO8_Out_Val", 8, 1 }, + { "GPIO7_Out_Val", 7, 1 }, + { "GPIO6_Out_Val", 6, 1 }, + { "GPIO5_Out_Val", 5, 1 }, + { "GPIO4_Out_Val", 4, 1 }, + { "GPIO3_Out_Val", 3, 1 }, + { "GPIO2_Out_Val", 2, 1 }, + { "GPIO1_Out_Val", 1, 1 }, + { "GPIO0_Out_Val", 0, 1 }, + { "DBG_GPIO_IN", 0x6014, 0 }, + { "GPIO15_CHG_DET", 31, 1 }, + { "GPIO14_CHG_DET", 30, 1 }, + { "GPIO13_CHG_DET", 29, 1 }, + { "GPIO12_CHG_DET", 28, 1 }, + { "GPIO11_CHG_DET", 27, 1 }, + { "GPIO10_CHG_DET", 26, 1 }, + { "GPIO9_CHG_DET", 25, 1 }, + { "GPIO8_CHG_DET", 24, 1 }, + { "GPIO7_CHG_DET", 23, 1 }, + { "GPIO6_CHG_DET", 22, 1 }, + { "GPIO5_CHG_DET", 21, 1 }, + { "GPIO4_CHG_DET", 20, 1 }, + { "GPIO3_CHG_DET", 19, 1 }, + { "GPIO2_CHG_DET", 18, 1 }, + { "GPIO1_CHG_DET", 17, 1 }, + { "GPIO0_CHG_DET", 16, 1 }, + { "GPIO15_IN", 15, 1 }, + { "GPIO14_IN", 14, 1 }, + { "GPIO13_IN", 13, 1 }, + { "GPIO12_IN", 12, 1 }, + { "GPIO11_IN", 11, 1 }, + { "GPIO10_IN", 10, 1 }, + { "GPIO9_IN", 9, 1 }, + { "GPIO8_IN", 8, 1 }, + { "GPIO7_IN", 7, 1 }, + { "GPIO6_IN", 6, 1 }, + { "GPIO5_IN", 5, 1 }, + { "GPIO4_IN", 4, 1 }, + { "GPIO3_IN", 3, 1 }, + { "GPIO2_IN", 2, 1 }, + { "GPIO1_IN", 1, 1 }, + { "GPIO0_IN", 0, 1 }, + { "DBG_INT_ENABLE", 0x6018, 0 }, + { "IBM_FDL_FAIL_int_enbl", 25, 1 }, + { "ARM_FAIL_int_enbl", 24, 1 }, + { "ARM_ERROR_OUT_int_enbl", 23, 1 }, + { "pll_lock_lost_int_enbl", 22, 1 }, + { "C_LOCK", 21, 1 }, + { "M_LOCK", 20, 1 }, + { "U_LOCK", 19, 1 }, + { "PCIe_LOCK", 18, 1 }, + { "KX_LOCK", 17, 1 }, + { "KR_LOCK", 16, 1 }, + { "GPIO15", 15, 1 }, + { "GPIO14", 14, 1 }, + { "GPIO13", 13, 1 }, + { "GPIO12", 12, 1 }, + { "GPIO11", 11, 1 }, + { "GPIO10", 10, 1 }, + { "GPIO9", 9, 1 }, + { "GPIO8", 8, 1 }, + { "GPIO7", 7, 1 }, + { "GPIO6", 6, 1 }, + { "GPIO5", 5, 1 }, + { "GPIO4", 4, 1 }, + { "GPIO3", 3, 1 }, + { "GPIO2", 2, 1 }, + { "GPIO1", 1, 1 }, + { "GPIO0", 0, 1 }, + { "DBG_INT_CAUSE", 0x601c, 0 }, + { "IBM_FDL_FAIL_int_cause", 25, 1 }, + { "ARM_FAIL_int_cause", 24, 1 }, + { "ARM_ERROR_OUT_int_cause", 23, 1 }, + { "pll_lock_lost_int_cause", 22, 1 }, + { "C_LOCK", 21, 1 }, + { "M_LOCK", 20, 1 }, + { "U_LOCK", 19, 1 }, + { "PCIe_LOCK", 18, 1 }, + { "KX_LOCK", 17, 1 }, + { "KR_LOCK", 16, 1 }, + { "GPIO15", 15, 1 }, + { "GPIO14", 14, 1 }, + { "GPIO13", 13, 1 }, + { "GPIO12", 12, 1 }, + { "GPIO11", 11, 1 }, + { "GPIO10", 10, 1 }, + { "GPIO9", 9, 1 }, + { "GPIO8", 8, 1 }, + { "GPIO7", 7, 1 }, + { "GPIO6", 6, 1 }, + { "GPIO5", 5, 1 }, + { "GPIO4", 4, 1 }, + { "GPIO3", 3, 1 }, + { "GPIO2", 2, 1 }, + { "GPIO1", 1, 1 }, + { "GPIO0", 0, 1 }, + { "DBG_DBG0_RST_VALUE", 0x6020, 0 }, + { "DBG_OVERWRSERCFG_EN", 0x6024, 0 }, + { "DBG_PLL_OCLK_PAD_EN", 0x6028, 0 }, + { "PCIE_OCLK_En", 20, 1 }, + { "KX_OCLK_En", 16, 1 }, + { "U_OCLK_En", 12, 1 }, + { "KR_OCLK_En", 8, 1 }, + { "M_OCLK_En", 4, 1 }, + { "C_OCLK_En", 0, 1 }, + { "DBG_PLL_LOCK", 0x602c, 0 }, + { "P_LOCK", 20, 1 }, + { "KX_LOCK", 16, 1 }, + { "U_LOCK", 12, 1 }, + { "KR_LOCK", 8, 1 }, + { "M_LOCK", 4, 1 }, + { "C_LOCK", 0, 1 }, + { "DBG_GPIO_ACT_LOW", 0x6030, 0 }, + { "P_LOCK_ACT_LOW", 21, 1 }, + { "C_LOCK_ACT_LOW", 20, 1 }, + { "M_LOCK_ACT_LOW", 19, 1 }, + { "U_LOCK_ACT_LOW", 18, 1 }, + { "KR_LOCK_ACT_LOW", 17, 1 }, + { "KX_LOCK_ACT_LOW", 16, 1 }, + { "GPIO15_ACT_LOW", 15, 1 }, + { "GPIO14_ACT_LOW", 14, 1 }, + { "GPIO13_ACT_LOW", 13, 1 }, + { "GPIO12_ACT_LOW", 12, 1 }, + { "GPIO11_ACT_LOW", 11, 1 }, + { "GPIO10_ACT_LOW", 10, 1 }, + { "GPIO9_ACT_LOW", 9, 1 }, + { "GPIO8_ACT_LOW", 8, 1 }, + { "GPIO7_ACT_LOW", 7, 1 }, + { "GPIO6_ACT_LOW", 6, 1 }, + { "GPIO5_ACT_LOW", 5, 1 }, + { "GPIO4_ACT_LOW", 4, 1 }, + { "GPIO3_ACT_LOW", 3, 1 }, + { "GPIO2_ACT_LOW", 2, 1 }, + { "GPIO1_ACT_LOW", 1, 1 }, + { "GPIO0_ACT_LOW", 0, 1 }, + { "DBG_EFUSE_BYTE0_3", 0x6034, 0 }, + { "DBG_EFUSE_BYTE4_7", 0x6038, 0 }, + { "DBG_EFUSE_BYTE8_11", 0x603c, 0 }, + { "DBG_EFUSE_BYTE12_15", 0x6040, 0 }, + { "DBG_STATIC_U_PLL_CONF", 0x6044, 0 }, + { "STATIC_U_PLL_MULT", 23, 9 }, + { "STATIC_U_PLL_PREDIV", 18, 5 }, + { "STATIC_U_PLL_RANGEA", 14, 4 }, + { "STATIC_U_PLL_RANGEB", 10, 4 }, + { "STATIC_U_PLL_TUNE", 0, 10 }, + { "DBG_STATIC_C_PLL_CONF", 0x6048, 0 }, + { "STATIC_C_PLL_MULT", 23, 9 }, + { "STATIC_C_PLL_PREDIV", 18, 5 }, + { "STATIC_C_PLL_RANGEA", 14, 4 }, + { "STATIC_C_PLL_RANGEB", 10, 4 }, + { "STATIC_C_PLL_TUNE", 0, 10 }, + { "DBG_STATIC_M_PLL_CONF", 0x604c, 0 }, + { "STATIC_M_PLL_MULT", 23, 9 }, + { "STATIC_M_PLL_PREDIV", 18, 5 }, + { "STATIC_M_PLL_RANGEA", 14, 4 }, + { "STATIC_M_PLL_RANGEB", 10, 4 }, + { "STATIC_M_PLL_TUNE", 0, 10 }, + { "DBG_STATIC_KX_PLL_CONF", 0x6050, 0 }, + { "STATIC_KX_PLL_C", 21, 8 }, + { "STATIC_KX_PLL_M", 15, 6 }, + { "STATIC_KX_PLL_N1", 11, 4 }, + { "STATIC_KX_PLL_N2", 7, 4 }, + { "STATIC_KX_PLL_N3", 3, 4 }, + { "STATIC_KX_PLL_P", 0, 3 }, + { "DBG_STATIC_KR_PLL_CONF", 0x6054, 0 }, + { "STATIC_KR_PLL_C", 21, 8 }, + { "STATIC_KR_PLL_M", 15, 6 }, + { "STATIC_KR_PLL_N1", 11, 4 }, + { "STATIC_KR_PLL_N2", 7, 4 }, + { "STATIC_KR_PLL_N3", 3, 4 }, + { "STATIC_KR_PLL_P", 0, 3 }, + { "DBG_EXTRA_STATIC_BITS_CONF", 0x6058, 0 }, + { "STATIC_M_PLL_RESET", 30, 1 }, + { "STATIC_M_PLL_SLEEP", 29, 1 }, + { "STATIC_M_PLL_BYPASS", 28, 1 }, + { "STATIC_MPLL_CLK_SEL", 27, 1 }, + { "STATIC_U_PLL_SLEEP", 26, 1 }, + { "STATIC_C_PLL_SLEEP", 25, 1 }, + { "STATIC_LVDS_CLKOUT_SEL", 23, 2 }, + { "STATIC_LVDS_CLKOUT_EN", 22, 1 }, + { "STATIC_CCLK_FREQ_SEL", 20, 2 }, + { "STATIC_UCLK_FREQ_SEL", 18, 2 }, + { "ExPHYClk_sel_en", 17, 1 }, + { "ExPHYClk_sel", 15, 2 }, + { "STATIC_U_PLL_BYPASS", 14, 1 }, + { "STATIC_C_PLL_BYPASS", 13, 1 }, + { "STATIC_KR_PLL_BYPASS", 12, 1 }, + { "STATIC_KX_PLL_BYPASS", 11, 1 }, + { "STATIC_KX_PLL_V", 7, 4 }, + { "STATIC_KR_PLL_V", 3, 4 }, + { "PSRO_sel", 0, 3 }, + { "DBG_STATIC_OCLK_MUXSEL_CONF", 0x605c, 0 }, + { "M_OCLK_MUXSEL", 12, 1 }, + { "C_OCLK_MUXSEL", 10, 2 }, + { "U_OCLK_MUXSEL", 8, 2 }, + { "P_OCLK_MUXSEL", 6, 2 }, + { "KX_OCLK_MUXSEL", 3, 3 }, + { "KR_OCLK_MUXSEL", 0, 3 }, + { "DBG_TRACE0_CONF_COMPREG0", 0x6060, 0 }, + { "DBG_TRACE0_CONF_COMPREG1", 0x6064, 0 }, + { "DBG_TRACE1_CONF_COMPREG0", 0x6068, 0 }, + { "DBG_TRACE1_CONF_COMPREG1", 0x606c, 0 }, + { "DBG_TRACE0_CONF_MASKREG0", 0x6070, 0 }, + { "DBG_TRACE0_CONF_MASKREG1", 0x6074, 0 }, + { "DBG_TRACE1_CONF_MASKREG0", 0x6078, 0 }, + { "DBG_TRACE1_CONF_MASKREG1", 0x607c, 0 }, + { "DBG_TRACE_COUNTER", 0x6080, 0 }, + { "Counter1", 16, 16 }, + { "Counter0", 0, 16 }, + { "DBG_STATIC_REFCLK_PERIOD", 0x6084, 0 }, + { "DBG_TRACE_CONF", 0x6088, 0 }, + { "dbg_trace_operate_with_trg", 5, 1 }, + { "dbg_trace_operate_en", 4, 1 }, + { "dbg_operate_indv_combined", 3, 1 }, + { "dbg_operate_order_of_trigger", 2, 1 }, + { "dbg_operate_sgl_dbl_trigger", 1, 1 }, + { "dbg_operate0_or_1", 0, 1 }, + { "DBG_TRACE_RDEN", 0x608c, 0 }, + { "RD_ADDR1", 10, 8 }, + { "RD_ADDR0", 2, 8 }, + { "Rd_en1", 1, 1 }, + { "Rd_en0", 0, 1 }, + { "DBG_TRACE_WRADDR", 0x6090, 0 }, + { "Wr_pointer_addr1", 16, 8 }, + { "Wr_pointer_addr0", 0, 8 }, + { "DBG_TRACE0_DATA_OUT", 0x6094, 0 }, + { "DBG_TRACE1_DATA_OUT", 0x6098, 0 }, + { "DBG_PVT_REG_CALIBRATE_CTL", 0x6100, 0 }, + { "HALT_CALIBRATE", 1, 1 }, + { "RESET_CALIBRATE", 0, 1 }, + { "DBG_PVT_REG_UPDATE_CTL", 0x6104, 0 }, + { "FAST_UPDATe", 8, 1 }, + { "FORCE_REG_IN_VALUE", 2, 1 }, + { "HALT_UPDATe", 1, 1 }, + { "DBG_PVT_REG_LAST_MEASUREMENT", 0x6108, 0 }, + { "LAST_MEASUREMENT_SELECT", 8, 2 }, + { "LAST_MEASUREMENT_RESULT_BANK_B", 4, 4 }, + { "LAST_MEASUREMENT_RESULT_BANK_A", 0, 4 }, + { "DBG_PVT_REG_DRVN", 0x610c, 0 }, + { "PVT_REG_DRVN_EN", 8, 1 }, + { "PVT_REG_DRVN_B", 4, 4 }, + { "PVT_REG_DRVN_A", 0, 4 }, + { "DBG_PVT_REG_DRVP", 0x6110, 0 }, + { "PVT_REG_DRVP_EN", 8, 1 }, + { "PVT_REG_DRVP_B", 4, 4 }, + { "PVT_REG_DRVP_A", 0, 4 }, + { "DBG_PVT_REG_TERMN", 0x6114, 0 }, + { "PVT_REG_TERMN_EN", 8, 1 }, + { "PVT_REG_TERMN_B", 4, 4 }, + { "PVT_REG_TERMN_A", 0, 4 }, + { "DBG_PVT_REG_TERMP", 0x6118, 0 }, + { "PVT_REG_TERMP_EN", 8, 1 }, + { "PVT_REG_TERMP_B", 4, 4 }, + { "PVT_REG_TERMP_A", 0, 4 }, + { "DBG_PVT_REG_THRESHOLD", 0x611c, 0 }, + { "PVT_CALIBRATION_DONE", 8, 1 }, + { "THRESHOLD_TERMP_MAX_SYNC", 7, 1 }, + { "THRESHOLD_TERMP_MIN_SYNC", 6, 1 }, + { "THRESHOLD_TERMN_MAX_SYNC", 5, 1 }, + { "THRESHOLD_TERMN_MIN_SYNC", 4, 1 }, + { "THRESHOLD_DRVP_MAX_SYNC", 3, 1 }, + { "THRESHOLD_DRVP_MIN_SYNC", 2, 1 }, + { "THRESHOLD_DRVN_MAX_SYNC", 1, 1 }, + { "THRESHOLD_DRVN_MIN_SYNC", 0, 1 }, + { "DBG_PVT_REG_IN_TERMP", 0x6120, 0 }, + { "REG_IN_TERMP_B", 4, 4 }, + { "REG_IN_TERMP_A", 0, 4 }, + { "DBG_PVT_REG_IN_TERMN", 0x6124, 0 }, + { "REG_IN_TERMN_B", 4, 4 }, + { "REG_IN_TERMN_A", 0, 4 }, + { "DBG_PVT_REG_IN_DRVP", 0x6128, 0 }, + { "REG_IN_DRVP_B", 4, 4 }, + { "REG_IN_DRVP_A", 0, 4 }, + { "DBG_PVT_REG_IN_DRVN", 0x612c, 0 }, + { "REG_IN_DRVN_B", 4, 4 }, + { "REG_IN_DRVN_A", 0, 4 }, + { "DBG_PVT_REG_OUT_TERMP", 0x6130, 0 }, + { "REG_OUT_TERMP_B", 4, 4 }, + { "REG_OUT_TERMP_A", 0, 4 }, + { "DBG_PVT_REG_OUT_TERMN", 0x6134, 0 }, + { "REG_OUT_TERMN_B", 4, 4 }, + { "REG_OUT_TERMN_A", 0, 4 }, + { "DBG_PVT_REG_OUT_DRVP", 0x6138, 0 }, + { "REG_OUT_DRVP_B", 4, 4 }, + { "REG_OUT_DRVP_A", 0, 4 }, + { "DBG_PVT_REG_OUT_DRVN", 0x613c, 0 }, + { "REG_OUT_DRVN_B", 4, 4 }, + { "REG_OUT_DRVN_A", 0, 4 }, + { "DBG_PVT_REG_HISTORY_TERMP", 0x6140, 0 }, + { "termp_b_history", 4, 4 }, + { "termp_a_history", 0, 4 }, + { "DBG_PVT_REG_HISTORY_TERMN", 0x6144, 0 }, + { "TERMN_B_HISTORY", 4, 4 }, + { "TERMN_A_HISTORY", 0, 4 }, + { "DBG_PVT_REG_HISTORY_DRVP", 0x6148, 0 }, + { "DRVP_B_HISTORY", 4, 4 }, + { "DRVP_A_HISTORY", 0, 4 }, + { "DBG_PVT_REG_HISTORY_DRVN", 0x614c, 0 }, + { "DRVN_B_HISTORY", 4, 4 }, + { "DRVN_A_HISTORY", 0, 4 }, + { "DBG_PVT_REG_SAMPLE_WAIT_CLKS", 0x6150, 0 }, + { NULL, 0, 0 } +}; + +struct reg_info t4_mc_regs[] = { + { "MC_PCTL_SCFG", 0x6200, 0 }, + { "rkinf_en", 5, 1 }, + { "dual_pctl_en", 4, 1 }, + { "slave_mode", 3, 1 }, + { "loopback_en", 1, 1 }, + { "hw_low_power_en", 0, 1 }, + { "MC_PCTL_SCTL", 0x6204, 0 }, + { "MC_PCTL_STAT", 0x6208, 0 }, + { "MC_PCTL_MCMD", 0x6240, 0 }, + { "start_cmd", 31, 1 }, + { "cmd_add_del", 24, 4 }, + { "rank_sel", 20, 4 }, + { "bank_addr", 17, 3 }, + { "cmd_addr", 4, 13 }, + { "cmd_opcode", 0, 3 }, + { "MC_PCTL_POWCTL", 0x6244, 0 }, + { "MC_PCTL_POWSTAT", 0x6248, 0 }, + { "phy_calibdone", 1, 1 }, + { "power_up_done", 0, 1 }, + { "MC_PCTL_MCFG", 0x6280, 0 }, + { "tfaw_cfg", 18, 2 }, + { "pd_exit_mode", 17, 1 }, + { "pd_type", 16, 1 }, + { "pd_idle", 8, 8 }, + { "page_policy", 6, 2 }, + { "ddr3_en", 5, 1 }, + { "two_t_en", 3, 1 }, + { "bl8int_en", 2, 1 }, + { "mem_bl", 0, 1 }, + { "MC_PCTL_PPCFG", 0x6284, 0 }, + { "rpmem_dis", 1, 8 }, + { "ppmem_en", 0, 1 }, + { "MC_PCTL_MSTAT", 0x6288, 0 }, + { "MC_PCTL_ODTCFG", 0x628c, 0 }, + { "rank3_odt_default", 28, 1 }, + { "rank3_odt_write_sel", 27, 1 }, + { "rank3_odt_write_nse", 26, 1 }, + { "rank3_odt_read_sel", 25, 1 }, + { "rank3_odt_read_nsel", 24, 1 }, + { "rank2_odt_default", 20, 1 }, + { "rank2_odt_write_sel", 19, 1 }, + { "rank2_odt_write_nsel", 18, 1 }, + { "rank2_odt_read_sel", 17, 1 }, + { "rank2_odt_read_nsel", 16, 1 }, + { "rank1_odt_default", 12, 1 }, + { "rank1_odt_write_sel", 11, 1 }, + { "rank1_odt_write_nsel", 10, 1 }, + { "rank1_odt_read_sel", 9, 1 }, + { "rank1_odt_read_nsel", 8, 1 }, + { "rank0_odt_default", 4, 1 }, + { "rank0_odt_write_sel", 3, 1 }, + { "rank0_odt_write_nsel", 2, 1 }, + { "rank0_odt_read_sel", 1, 1 }, + { "rank0_odt_read_nsel", 0, 1 }, + { "MC_PCTL_DQSECFG", 0x6290, 0 }, + { "dv_alat", 20, 4 }, + { "dv_alen", 16, 2 }, + { "dse_alat", 12, 4 }, + { "dse_alen", 8, 2 }, + { "qse_alat", 4, 4 }, + { "qse_alen", 0, 2 }, + { "MC_PCTL_DTUPDES", 0x6294, 0 }, + { "dtu_rd_missing", 13, 1 }, + { "dtu_eaffl", 9, 4 }, + { "dtu_random_error", 8, 1 }, + { "dtu_error_b7", 7, 1 }, + { "dtu_err_b6", 6, 1 }, + { "dtu_err_b5", 5, 1 }, + { "dtu_err_b4", 4, 1 }, + { "dtu_err_b3", 3, 1 }, + { "dtu_err_b2", 2, 1 }, + { "dtu_err_b1", 1, 1 }, + { "dtu_err_b0", 0, 1 }, + { "MC_PCTL_DTUNA", 0x6298, 0 }, + { "MC_PCTL_DTUNE", 0x629c, 0 }, + { "MC_PCTL_DTUPRDO", 0x62a0, 0 }, + { "dtu_allbits_1", 16, 16 }, + { "dtu_allbits_0", 0, 16 }, + { "MC_PCTL_DTUPRD1", 0x62a4, 0 }, + { "dtu_allbits_3", 16, 16 }, + { "dtu_allbits_2", 0, 16 }, + { "MC_PCTL_DTUPRD2", 0x62a8, 0 }, + { "dtu_allbits_5", 16, 16 }, + { "dtu_allbits_4", 0, 16 }, + { "MC_PCTL_DTUPRD3", 0x62ac, 0 }, + { "dtu_allbits_7", 16, 16 }, + { "dtu_allbits_6", 0, 16 }, + { "MC_PCTL_DTUAWDT", 0x62b0, 0 }, + { "number_ranks", 9, 2 }, + { "row_addr_width", 6, 2 }, + { "bank_addr_width", 3, 2 }, + { "column_addr_width", 0, 2 }, + { "MC_PCTL_TOGCNT1U", 0x62c0, 0 }, + { "MC_PCTL_TINIT", 0x62c4, 0 }, + { "MC_PCTL_TRSTH", 0x62c8, 0 }, + { "MC_PCTL_TOGCNT100N", 0x62cc, 0 }, + { "MC_PCTL_TREFI", 0x62d0, 0 }, + { "MC_PCTL_TMRD", 0x62d4, 0 }, + { "MC_PCTL_TRFC", 0x62d8, 0 }, + { "MC_PCTL_TRP", 0x62dc, 0 }, + { "MC_PCTL_TRTW", 0x62e0, 0 }, + { "MC_PCTL_TAL", 0x62e4, 0 }, + { "MC_PCTL_TCL", 0x62e8, 0 }, + { "MC_PCTL_TCWL", 0x62ec, 0 }, + { "MC_PCTL_TRAS", 0x62f0, 0 }, + { "MC_PCTL_TRC", 0x62f4, 0 }, + { "MC_PCTL_TRCD", 0x62f8, 0 }, + { "MC_PCTL_TRRD", 0x62fc, 0 }, + { "MC_PCTL_TRTP", 0x6300, 0 }, + { "MC_PCTL_TWR", 0x6304, 0 }, + { "MC_PCTL_TWTR", 0x6308, 0 }, + { "MC_PCTL_TEXSR", 0x630c, 0 }, + { "MC_PCTL_TXP", 0x6310, 0 }, + { "MC_PCTL_TXPDLL", 0x6314, 0 }, + { "MC_PCTL_TZQCS", 0x6318, 0 }, + { "MC_PCTL_TZQCSI", 0x631c, 0 }, + { "MC_PCTL_TDQS", 0x6320, 0 }, + { "MC_PCTL_TCKSRE", 0x6324, 0 }, + { "MC_PCTL_TCKSRX", 0x6328, 0 }, + { "MC_PCTL_TCKE", 0x632c, 0 }, + { "MC_PCTL_TMOD", 0x6330, 0 }, + { "MC_PCTL_TRSTL", 0x6334, 0 }, + { "MC_PCTL_TZQCL", 0x6338, 0 }, + { "MC_PCTL_DWLCFG0", 0x6370, 0 }, + { "MC_PCTL_DWLCFG1", 0x6374, 0 }, + { "MC_PCTL_DWLCFG2", 0x6378, 0 }, + { "MC_PCTL_DWLCFG3", 0x637c, 0 }, + { "MC_PCTL_ECCCFG", 0x6380, 0 }, + { "inline_syn_en", 4, 1 }, + { "ecc_en", 3, 1 }, + { "ecc_intr_en", 2, 1 }, + { "MC_PCTL_ECCTST", 0x6384, 0 }, + { "MC_PCTL_ECCCLR", 0x6388, 0 }, + { "clr_ecc_log", 1, 1 }, + { "clr_ecc_intr", 0, 1 }, + { "MC_PCTL_ECCLOG", 0x638c, 0 }, + { "MC_PCTL_DTUWACTL", 0x6400, 0 }, + { "dtu_wr_rank", 30, 2 }, + { "dtu_wr_row", 13, 17 }, + { "dtu_wr_bank", 10, 3 }, + { "dtu_wr_col", 0, 10 }, + { "MC_PCTL_DTURACTL", 0x6404, 0 }, + { "dtu_rd_rank", 30, 2 }, + { "dtu_rd_row", 13, 17 }, + { "dtu_rd_bank", 10, 3 }, + { "dtu_rd_col", 0, 10 }, + { "MC_PCTL_DTUCFG", 0x6408, 0 }, + { "dtu_row_increments", 16, 7 }, + { "dtu_wr_multi_rd", 15, 1 }, + { "dtu_data_mask_en", 14, 1 }, + { "dtu_target_lane", 10, 4 }, + { "dtu_generate_random", 9, 1 }, + { "dtu_incr_banks", 8, 1 }, + { "dtu_incr_cols", 7, 1 }, + { "dtu_nalen", 1, 6 }, + { "dtu_enable", 0, 1 }, + { "MC_PCTL_DTUECTL", 0x640c, 0 }, + { "wr_multi_rd_rst", 2, 1 }, + { "run_error_reports", 1, 1 }, + { "run_dtu", 0, 1 }, + { "MC_PCTL_DTUWD0", 0x6410, 0 }, + { "dtu_wr_byte3", 24, 8 }, + { "dtu_wr_byte2", 16, 8 }, + { "dtu_wr_byte1", 8, 8 }, + { "dtu_wr_byte0", 0, 8 }, + { "MC_PCTL_DTUWD1", 0x6414, 0 }, + { "dtu_wr_byte7", 24, 8 }, + { "dtu_wr_byte6", 16, 8 }, + { "dtu_wr_byte5", 8, 8 }, + { "dtu_wr_byte4", 0, 8 }, + { "MC_PCTL_DTUWD2", 0x6418, 0 }, + { "dtu_wr_byte11", 24, 8 }, + { "dtu_wr_byte10", 16, 8 }, + { "dtu_wr_byte9", 8, 8 }, + { "dtu_wr_byte8", 0, 8 }, + { "MC_PCTL_DTUWD3", 0x641c, 0 }, + { "dtu_wr_byte15", 24, 8 }, + { "dtu_wr_byte14", 16, 8 }, + { "dtu_wr_byte13", 8, 8 }, + { "dtu_wr_byte12", 0, 8 }, + { "MC_PCTL_DTUWDM", 0x6420, 0 }, + { "MC_PCTL_DTURD0", 0x6424, 0 }, + { "dtu_rd_byte3", 24, 8 }, + { "dtu_rd_byte2", 16, 8 }, + { "dtu_rd_byte1", 8, 8 }, + { "dtu_rd_byte0", 0, 8 }, + { "MC_PCTL_DTURD1", 0x6428, 0 }, + { "dtu_rd_byte7", 24, 8 }, + { "dtu_rd_byte6", 16, 8 }, + { "dtu_rd_byte5", 8, 8 }, + { "dtu_rd_byte4", 0, 8 }, + { "MC_PCTL_DTURD2", 0x642c, 0 }, + { "dtu_rd_byte11", 24, 8 }, + { "dtu_rd_byte10", 16, 8 }, + { "dtu_rd_byte9", 8, 8 }, + { "dtu_rd_byte8", 0, 8 }, + { "MC_PCTL_DTURD3", 0x6430, 0 }, + { "dtu_rd_byte15", 24, 8 }, + { "dtu_rd_byte14", 16, 8 }, + { "dtu_rd_byte13", 8, 8 }, + { "dtu_rd_byte12", 0, 8 }, + { "MC_DTULFSRWD", 0x6434, 0 }, + { "MC_PCTL_DTULFSRRD", 0x6438, 0 }, + { "MC_PCTL_DTUEAF", 0x643c, 0 }, + { "ea_rank", 30, 2 }, + { "ea_row", 13, 17 }, + { "ea_bank", 10, 3 }, + { "ea_column", 0, 10 }, + { "MC_PCTL_PHYPVTCFG", 0x6500, 0 }, + { "pvt_upd_req_en", 15, 1 }, + { "pvt_upd_trig_pol", 14, 1 }, + { "pvt_upd_trig_type", 12, 1 }, + { "pvt_upd_done_pol", 10, 1 }, + { "pvt_upd_done_type", 8, 2 }, + { "phy_upd_req_en", 7, 1 }, + { "phy_upd_trig_pol", 6, 1 }, + { "phy_upd_trig_type", 4, 1 }, + { "phy_upd_done_pol", 2, 1 }, + { "phy_upd_done_type", 0, 2 }, + { "MC_PCTL_PHYPVTSTAT", 0x6504, 0 }, + { "i_pvt_upd_trig", 5, 1 }, + { "i_pvt_upd_done", 4, 1 }, + { "i_phy_upd_trig", 1, 1 }, + { "i_phy_upd_done", 0, 1 }, + { "MC_PCTL_PHYTUPDON", 0x6508, 0 }, + { "MC_PCTL_PHYTUPDDLY", 0x650c, 0 }, + { "MC_PCTL_PVTTUPON", 0x6510, 0 }, + { "MC_PCTL_PVTTUPDDLY", 0x6514, 0 }, + { "MC_PCTL_PHYPVTUPDI", 0x6518, 0 }, + { "MC_PCTL_PHYIOCRV1", 0x651c, 0 }, + { "byte_oe_ctl", 16, 2 }, + { "dyn_soc_odt_alat", 12, 4 }, + { "dyn_soc_odt_aten", 8, 2 }, + { "dyn_soc_odt", 2, 1 }, + { "soc_odt_en", 0, 1 }, + { "MC_PCTL_PHYTUPDWAIT", 0x6520, 0 }, + { "MC_PCTL_PVTTUPDWAIT", 0x6524, 0 }, + { "MC_DDR3PHYAC_GCR", 0x6a00, 0 }, + { "WLRANK", 8, 2 }, + { "FDEPTH", 6, 2 }, + { "LPFDEPTH", 4, 2 }, + { "LPFEN", 3, 1 }, + { "WL", 2, 1 }, + { "CAL", 1, 1 }, + { "MDLEN", 0, 1 }, + { "MC_DDR3PHYAC_RCR0", 0x6a04, 0 }, + { "OCPONR", 8, 1 }, + { "OCPOND", 7, 1 }, + { "OCOEN", 6, 1 }, + { "CKEPONR", 5, 1 }, + { "CKEPOND", 4, 1 }, + { "CKEOEN", 3, 1 }, + { "CKPONR", 2, 1 }, + { "CKPOND", 1, 1 }, + { "CKOEN", 0, 1 }, + { "MC_DDR3PHYAC_ACCR", 0x6a14, 0 }, + { "ACPONR", 8, 1 }, + { "ACPOND", 7, 1 }, + { "ACOEN", 6, 1 }, + { "CK5PONR", 5, 1 }, + { "CK5POND", 4, 1 }, + { "CK5OEN", 3, 1 }, + { "CK4PONR", 2, 1 }, + { "CK4POND", 1, 1 }, + { "CK4OEN", 0, 1 }, + { "MC_DDR3PHYAC_GSR", 0x6a18, 0 }, + { "WLERR", 4, 1 }, + { "INIT", 3, 1 }, + { "WL", 2, 1 }, + { "CAL", 1, 1 }, + { "ACCAL", 0, 1 }, + { "MC_DDR3PHYAC_ECSR", 0x6a1c, 0 }, + { "WLDEC", 1, 1 }, + { "WLINC", 0, 1 }, + { "MC_DDR3PHYAC_OCSR", 0x6a20, 0 }, + { "WLDEC", 1, 1 }, + { "WLINC", 0, 1 }, + { "MC_DDR3PHYAC_MDIPR", 0x6a24, 0 }, + { "MC_DDR3PHYAC_MDTPR", 0x6a28, 0 }, + { "MC_DDR3PHYAC_MDPPR0", 0x6a2c, 0 }, + { "MC_DDR3PHYAC_MDPPR1", 0x6a30, 0 }, + { "MC_DDR3PHYAC_PMBDR0", 0x6a34, 0 }, + { "MC_DDR3PHYAC_PMBDR1", 0x6a38, 0 }, + { "MC_DDR3PHYAC_ACR", 0x6a60, 0 }, + { "TSEL", 9, 1 }, + { "ISEL", 7, 2 }, + { "CALBYP", 2, 1 }, + { "SDRSELINV", 1, 1 }, + { "CKINV", 0, 1 }, + { "MC_DDR3PHYAC_PSCR", 0x6a64, 0 }, + { "MC_DDR3PHYAC_PRCR", 0x6a68, 0 }, + { "PHYINIT", 9, 1 }, + { "PHYHRST", 7, 1 }, + { "RSTCLKS", 3, 4 }, + { "PLLPD", 2, 1 }, + { "PLLRST", 1, 1 }, + { "PHYRST", 0, 1 }, + { "MC_DDR3PHYAC_PLLCR0", 0x6a6c, 0 }, + { "RSTCXKS", 4, 5 }, + { "ICPSEL", 3, 1 }, + { "TESTA", 0, 3 }, + { "MC_DDR3PHYAC_PLLCR1", 0x6a70, 0 }, + { "BYPASS", 9, 1 }, + { "BDIV", 3, 2 }, + { "TESTD", 0, 3 }, + { "MC_DDR3PHYAC_CLKENR", 0x6a78, 0 }, + { "CKCLKEN", 3, 6 }, + { "HDRCLKEN", 2, 1 }, + { "SDRCLKEN", 1, 1 }, + { "DDRCLKEN", 0, 1 }, + { "MC_DDR3PHYDATX8_GCR", 0x6b00, 0 }, + { "PONR", 6, 1 }, + { "POND", 5, 1 }, + { "RDBDVT", 4, 1 }, + { "WDBDVT", 3, 1 }, + { "RDSDVT", 2, 1 }, + { "WDSDVT", 1, 1 }, + { "WLSDVT", 0, 1 }, + { "MC_DDR3PHYDATX8_WDSDR", 0x6b04, 0 }, + { "MC_DDR3PHYDATX8_WLDPR", 0x6b08, 0 }, + { "MC_DDR3PHYDATX8_WLDR", 0x6b0c, 0 }, + { "MC_DDR3PHYDATX8_WDBDR0", 0x6b1c, 0 }, + { "MC_DDR3PHYDATX8_WDBDR1", 0x6b20, 0 }, + { "MC_DDR3PHYDATX8_WDBDR2", 0x6b24, 0 }, + { "MC_DDR3PHYDATX8_WDBDR3", 0x6b28, 0 }, + { "MC_DDR3PHYDATX8_WDBDR4", 0x6b2c, 0 }, + { "MC_DDR3PHYDATX8_WDBDR5", 0x6b30, 0 }, + { "MC_DDR3PHYDATX8_WDBDR6", 0x6b34, 0 }, + { "MC_DDR3PHYDATX8_WDBDR7", 0x6b38, 0 }, + { "MC_DDR3PHYDATX8_WDBDR8", 0x6b3c, 0 }, + { "MC_DDR3PHYDATX8_WDBDMR", 0x6b40, 0 }, + { "MC_DDR3PHYDATX8_RDSDR", 0x6b44, 0 }, + { "MC_DDR3PHYDATX8_RDBDR0", 0x6b48, 0 }, + { "MC_DDR3PHYDATX8_RDBDR1", 0x6b4c, 0 }, + { "MC_DDR3PHYDATX8_RDBDR2", 0x6b50, 0 }, + { "MC_DDR3PHYDATX8_RDBDR3", 0x6b54, 0 }, + { "MC_DDR3PHYDATX8_RDBDR4", 0x6b58, 0 }, + { "MC_DDR3PHYDATX8_RDBDR5", 0x6b5c, 0 }, + { "MC_DDR3PHYDATX8_RDBDR6", 0x6b60, 0 }, + { "MC_DDR3PHYDATX8_RDBDR7", 0x6b64, 0 }, + { "MC_DDR3PHYDATX8_RDBDMR", 0x6b68, 0 }, + { "MC_DDR3PHYDATX8_PMBDR0", 0x6b6c, 0 }, + { "MC_DDR3PHYDATX8_PMBDR1", 0x6b70, 0 }, + { "MC_DDR3PHYDATX8_PMBDR2", 0x6b74, 0 }, + { "MC_DDR3PHYDATX8_PMBDR3", 0x6b78, 0 }, + { "MC_DDR3PHYDATX8_WDBDPR", 0x6b7c, 0 }, + { "MC_DDR3PHYDATX8_RDBDPR", 0x6b80, 0 }, + { "MC_DDR3PHYDATX8_GSR", 0x6b84, 0 }, + { "WLERR", 4, 1 }, + { "WLDONE", 3, 1 }, + { "WLCAL", 2, 1 }, + { "Read", 1, 1 }, + { "RDQSCAL", 0, 1 }, + { "MC_DDR3PHYDATX8_ACR", 0x6bf0, 0 }, + { "PHYHRST", 9, 1 }, + { "WLSTEP", 8, 1 }, + { "SDRSELINV", 2, 1 }, + { "DDRSELINV", 1, 1 }, + { "DSINV", 0, 1 }, + { "MC_DDR3PHYDATX8_RSR", 0x6bf4, 0 }, + { "WLRANK", 9, 1 }, + { "RANK", 0, 2 }, + { "MC_DDR3PHYDATX8_CLKENR", 0x6bf8, 0 }, + { "DTOSEL", 8, 2 }, + { "HDRCLKEN", 2, 1 }, + { "SDRCLKEN", 1, 1 }, + { "DDRCLKEN", 0, 1 }, + { "MC_DDR3PHYDATX8_GCR", 0x6c00, 0 }, + { "PONR", 6, 1 }, + { "POND", 5, 1 }, + { "RDBDVT", 4, 1 }, + { "WDBDVT", 3, 1 }, + { "RDSDVT", 2, 1 }, + { "WDSDVT", 1, 1 }, + { "WLSDVT", 0, 1 }, + { "MC_DDR3PHYDATX8_WDSDR", 0x6c04, 0 }, + { "MC_DDR3PHYDATX8_WLDPR", 0x6c08, 0 }, + { "MC_DDR3PHYDATX8_WLDR", 0x6c0c, 0 }, + { "MC_DDR3PHYDATX8_WDBDR0", 0x6c1c, 0 }, + { "MC_DDR3PHYDATX8_WDBDR1", 0x6c20, 0 }, + { "MC_DDR3PHYDATX8_WDBDR2", 0x6c24, 0 }, + { "MC_DDR3PHYDATX8_WDBDR3", 0x6c28, 0 }, + { "MC_DDR3PHYDATX8_WDBDR4", 0x6c2c, 0 }, + { "MC_DDR3PHYDATX8_WDBDR5", 0x6c30, 0 }, + { "MC_DDR3PHYDATX8_WDBDR6", 0x6c34, 0 }, + { "MC_DDR3PHYDATX8_WDBDR7", 0x6c38, 0 }, + { "MC_DDR3PHYDATX8_WDBDR8", 0x6c3c, 0 }, + { "MC_DDR3PHYDATX8_WDBDMR", 0x6c40, 0 }, + { "MC_DDR3PHYDATX8_RDSDR", 0x6c44, 0 }, + { "MC_DDR3PHYDATX8_RDBDR0", 0x6c48, 0 }, + { "MC_DDR3PHYDATX8_RDBDR1", 0x6c4c, 0 }, + { "MC_DDR3PHYDATX8_RDBDR2", 0x6c50, 0 }, + { "MC_DDR3PHYDATX8_RDBDR3", 0x6c54, 0 }, + { "MC_DDR3PHYDATX8_RDBDR4", 0x6c58, 0 }, + { "MC_DDR3PHYDATX8_RDBDR5", 0x6c5c, 0 }, + { "MC_DDR3PHYDATX8_RDBDR6", 0x6c60, 0 }, + { "MC_DDR3PHYDATX8_RDBDR7", 0x6c64, 0 }, + { "MC_DDR3PHYDATX8_RDBDMR", 0x6c68, 0 }, + { "MC_DDR3PHYDATX8_PMBDR0", 0x6c6c, 0 }, + { "MC_DDR3PHYDATX8_PMBDR1", 0x6c70, 0 }, + { "MC_DDR3PHYDATX8_PMBDR2", 0x6c74, 0 }, + { "MC_DDR3PHYDATX8_PMBDR3", 0x6c78, 0 }, + { "MC_DDR3PHYDATX8_WDBDPR", 0x6c7c, 0 }, + { "MC_DDR3PHYDATX8_RDBDPR", 0x6c80, 0 }, + { "MC_DDR3PHYDATX8_GSR", 0x6c84, 0 }, + { "WLERR", 4, 1 }, + { "WLDONE", 3, 1 }, + { "WLCAL", 2, 1 }, + { "Read", 1, 1 }, + { "RDQSCAL", 0, 1 }, + { "MC_DDR3PHYDATX8_ACR", 0x6cf0, 0 }, + { "PHYHRST", 9, 1 }, + { "WLSTEP", 8, 1 }, + { "SDRSELINV", 2, 1 }, + { "DDRSELINV", 1, 1 }, + { "DSINV", 0, 1 }, + { "MC_DDR3PHYDATX8_RSR", 0x6cf4, 0 }, + { "WLRANK", 9, 1 }, + { "RANK", 0, 2 }, + { "MC_DDR3PHYDATX8_CLKENR", 0x6cf8, 0 }, + { "DTOSEL", 8, 2 }, + { "HDRCLKEN", 2, 1 }, + { "SDRCLKEN", 1, 1 }, + { "DDRCLKEN", 0, 1 }, + { "MC_DDR3PHYDATX8_GCR", 0x6d00, 0 }, + { "PONR", 6, 1 }, + { "POND", 5, 1 }, + { "RDBDVT", 4, 1 }, + { "WDBDVT", 3, 1 }, + { "RDSDVT", 2, 1 }, + { "WDSDVT", 1, 1 }, + { "WLSDVT", 0, 1 }, + { "MC_DDR3PHYDATX8_WDSDR", 0x6d04, 0 }, + { "MC_DDR3PHYDATX8_WLDPR", 0x6d08, 0 }, + { "MC_DDR3PHYDATX8_WLDR", 0x6d0c, 0 }, + { "MC_DDR3PHYDATX8_WDBDR0", 0x6d1c, 0 }, + { "MC_DDR3PHYDATX8_WDBDR1", 0x6d20, 0 }, + { "MC_DDR3PHYDATX8_WDBDR2", 0x6d24, 0 }, + { "MC_DDR3PHYDATX8_WDBDR3", 0x6d28, 0 }, + { "MC_DDR3PHYDATX8_WDBDR4", 0x6d2c, 0 }, + { "MC_DDR3PHYDATX8_WDBDR5", 0x6d30, 0 }, + { "MC_DDR3PHYDATX8_WDBDR6", 0x6d34, 0 }, + { "MC_DDR3PHYDATX8_WDBDR7", 0x6d38, 0 }, + { "MC_DDR3PHYDATX8_WDBDR8", 0x6d3c, 0 }, + { "MC_DDR3PHYDATX8_WDBDMR", 0x6d40, 0 }, + { "MC_DDR3PHYDATX8_RDSDR", 0x6d44, 0 }, + { "MC_DDR3PHYDATX8_RDBDR0", 0x6d48, 0 }, + { "MC_DDR3PHYDATX8_RDBDR1", 0x6d4c, 0 }, + { "MC_DDR3PHYDATX8_RDBDR2", 0x6d50, 0 }, + { "MC_DDR3PHYDATX8_RDBDR3", 0x6d54, 0 }, + { "MC_DDR3PHYDATX8_RDBDR4", 0x6d58, 0 }, + { "MC_DDR3PHYDATX8_RDBDR5", 0x6d5c, 0 }, + { "MC_DDR3PHYDATX8_RDBDR6", 0x6d60, 0 }, + { "MC_DDR3PHYDATX8_RDBDR7", 0x6d64, 0 }, + { "MC_DDR3PHYDATX8_RDBDMR", 0x6d68, 0 }, + { "MC_DDR3PHYDATX8_PMBDR0", 0x6d6c, 0 }, + { "MC_DDR3PHYDATX8_PMBDR1", 0x6d70, 0 }, + { "MC_DDR3PHYDATX8_PMBDR2", 0x6d74, 0 }, + { "MC_DDR3PHYDATX8_PMBDR3", 0x6d78, 0 }, + { "MC_DDR3PHYDATX8_WDBDPR", 0x6d7c, 0 }, + { "MC_DDR3PHYDATX8_RDBDPR", 0x6d80, 0 }, + { "MC_DDR3PHYDATX8_GSR", 0x6d84, 0 }, + { "WLERR", 4, 1 }, + { "WLDONE", 3, 1 }, + { "WLCAL", 2, 1 }, + { "Read", 1, 1 }, + { "RDQSCAL", 0, 1 }, + { "MC_DDR3PHYDATX8_ACR", 0x6df0, 0 }, + { "PHYHRST", 9, 1 }, + { "WLSTEP", 8, 1 }, + { "SDRSELINV", 2, 1 }, + { "DDRSELINV", 1, 1 }, + { "DSINV", 0, 1 }, + { "MC_DDR3PHYDATX8_RSR", 0x6df4, 0 }, + { "WLRANK", 9, 1 }, + { "RANK", 0, 2 }, + { "MC_DDR3PHYDATX8_CLKENR", 0x6df8, 0 }, + { "DTOSEL", 8, 2 }, + { "HDRCLKEN", 2, 1 }, + { "SDRCLKEN", 1, 1 }, + { "DDRCLKEN", 0, 1 }, + { "MC_DDR3PHYDATX8_GCR", 0x6e00, 0 }, + { "PONR", 6, 1 }, + { "POND", 5, 1 }, + { "RDBDVT", 4, 1 }, + { "WDBDVT", 3, 1 }, + { "RDSDVT", 2, 1 }, + { "WDSDVT", 1, 1 }, + { "WLSDVT", 0, 1 }, + { "MC_DDR3PHYDATX8_WDSDR", 0x6e04, 0 }, + { "MC_DDR3PHYDATX8_WLDPR", 0x6e08, 0 }, + { "MC_DDR3PHYDATX8_WLDR", 0x6e0c, 0 }, + { "MC_DDR3PHYDATX8_WDBDR0", 0x6e1c, 0 }, + { "MC_DDR3PHYDATX8_WDBDR1", 0x6e20, 0 }, + { "MC_DDR3PHYDATX8_WDBDR2", 0x6e24, 0 }, + { "MC_DDR3PHYDATX8_WDBDR3", 0x6e28, 0 }, + { "MC_DDR3PHYDATX8_WDBDR4", 0x6e2c, 0 }, + { "MC_DDR3PHYDATX8_WDBDR5", 0x6e30, 0 }, + { "MC_DDR3PHYDATX8_WDBDR6", 0x6e34, 0 }, + { "MC_DDR3PHYDATX8_WDBDR7", 0x6e38, 0 }, + { "MC_DDR3PHYDATX8_WDBDR8", 0x6e3c, 0 }, + { "MC_DDR3PHYDATX8_WDBDMR", 0x6e40, 0 }, + { "MC_DDR3PHYDATX8_RDSDR", 0x6e44, 0 }, + { "MC_DDR3PHYDATX8_RDBDR0", 0x6e48, 0 }, + { "MC_DDR3PHYDATX8_RDBDR1", 0x6e4c, 0 }, + { "MC_DDR3PHYDATX8_RDBDR2", 0x6e50, 0 }, + { "MC_DDR3PHYDATX8_RDBDR3", 0x6e54, 0 }, + { "MC_DDR3PHYDATX8_RDBDR4", 0x6e58, 0 }, + { "MC_DDR3PHYDATX8_RDBDR5", 0x6e5c, 0 }, + { "MC_DDR3PHYDATX8_RDBDR6", 0x6e60, 0 }, + { "MC_DDR3PHYDATX8_RDBDR7", 0x6e64, 0 }, + { "MC_DDR3PHYDATX8_RDBDMR", 0x6e68, 0 }, + { "MC_DDR3PHYDATX8_PMBDR0", 0x6e6c, 0 }, + { "MC_DDR3PHYDATX8_PMBDR1", 0x6e70, 0 }, + { "MC_DDR3PHYDATX8_PMBDR2", 0x6e74, 0 }, + { "MC_DDR3PHYDATX8_PMBDR3", 0x6e78, 0 }, + { "MC_DDR3PHYDATX8_WDBDPR", 0x6e7c, 0 }, + { "MC_DDR3PHYDATX8_RDBDPR", 0x6e80, 0 }, + { "MC_DDR3PHYDATX8_GSR", 0x6e84, 0 }, + { "WLERR", 4, 1 }, + { "WLDONE", 3, 1 }, + { "WLCAL", 2, 1 }, + { "Read", 1, 1 }, + { "RDQSCAL", 0, 1 }, + { "MC_DDR3PHYDATX8_ACR", 0x6ef0, 0 }, + { "PHYHRST", 9, 1 }, + { "WLSTEP", 8, 1 }, + { "SDRSELINV", 2, 1 }, + { "DDRSELINV", 1, 1 }, + { "DSINV", 0, 1 }, + { "MC_DDR3PHYDATX8_RSR", 0x6ef4, 0 }, + { "WLRANK", 9, 1 }, + { "RANK", 0, 2 }, + { "MC_DDR3PHYDATX8_CLKENR", 0x6ef8, 0 }, + { "DTOSEL", 8, 2 }, + { "HDRCLKEN", 2, 1 }, + { "SDRCLKEN", 1, 1 }, + { "DDRCLKEN", 0, 1 }, + { "MC_DDR3PHYDATX8_GCR", 0x6f00, 0 }, + { "PONR", 6, 1 }, + { "POND", 5, 1 }, + { "RDBDVT", 4, 1 }, + { "WDBDVT", 3, 1 }, + { "RDSDVT", 2, 1 }, + { "WDSDVT", 1, 1 }, + { "WLSDVT", 0, 1 }, + { "MC_DDR3PHYDATX8_WDSDR", 0x6f04, 0 }, + { "MC_DDR3PHYDATX8_WLDPR", 0x6f08, 0 }, + { "MC_DDR3PHYDATX8_WLDR", 0x6f0c, 0 }, + { "MC_DDR3PHYDATX8_WDBDR0", 0x6f1c, 0 }, + { "MC_DDR3PHYDATX8_WDBDR1", 0x6f20, 0 }, + { "MC_DDR3PHYDATX8_WDBDR2", 0x6f24, 0 }, + { "MC_DDR3PHYDATX8_WDBDR3", 0x6f28, 0 }, + { "MC_DDR3PHYDATX8_WDBDR4", 0x6f2c, 0 }, + { "MC_DDR3PHYDATX8_WDBDR5", 0x6f30, 0 }, + { "MC_DDR3PHYDATX8_WDBDR6", 0x6f34, 0 }, + { "MC_DDR3PHYDATX8_WDBDR7", 0x6f38, 0 }, + { "MC_DDR3PHYDATX8_WDBDR8", 0x6f3c, 0 }, + { "MC_DDR3PHYDATX8_WDBDMR", 0x6f40, 0 }, + { "MC_DDR3PHYDATX8_RDSDR", 0x6f44, 0 }, + { "MC_DDR3PHYDATX8_RDBDR0", 0x6f48, 0 }, + { "MC_DDR3PHYDATX8_RDBDR1", 0x6f4c, 0 }, + { "MC_DDR3PHYDATX8_RDBDR2", 0x6f50, 0 }, + { "MC_DDR3PHYDATX8_RDBDR3", 0x6f54, 0 }, + { "MC_DDR3PHYDATX8_RDBDR4", 0x6f58, 0 }, + { "MC_DDR3PHYDATX8_RDBDR5", 0x6f5c, 0 }, + { "MC_DDR3PHYDATX8_RDBDR6", 0x6f60, 0 }, + { "MC_DDR3PHYDATX8_RDBDR7", 0x6f64, 0 }, + { "MC_DDR3PHYDATX8_RDBDMR", 0x6f68, 0 }, + { "MC_DDR3PHYDATX8_PMBDR0", 0x6f6c, 0 }, + { "MC_DDR3PHYDATX8_PMBDR1", 0x6f70, 0 }, + { "MC_DDR3PHYDATX8_PMBDR2", 0x6f74, 0 }, + { "MC_DDR3PHYDATX8_PMBDR3", 0x6f78, 0 }, + { "MC_DDR3PHYDATX8_WDBDPR", 0x6f7c, 0 }, + { "MC_DDR3PHYDATX8_RDBDPR", 0x6f80, 0 }, + { "MC_DDR3PHYDATX8_GSR", 0x6f84, 0 }, + { "WLERR", 4, 1 }, + { "WLDONE", 3, 1 }, + { "WLCAL", 2, 1 }, + { "Read", 1, 1 }, + { "RDQSCAL", 0, 1 }, + { "MC_DDR3PHYDATX8_ACR", 0x6ff0, 0 }, + { "PHYHRST", 9, 1 }, + { "WLSTEP", 8, 1 }, + { "SDRSELINV", 2, 1 }, + { "DDRSELINV", 1, 1 }, + { "DSINV", 0, 1 }, + { "MC_DDR3PHYDATX8_RSR", 0x6ff4, 0 }, + { "WLRANK", 9, 1 }, + { "RANK", 0, 2 }, + { "MC_DDR3PHYDATX8_CLKENR", 0x6ff8, 0 }, + { "DTOSEL", 8, 2 }, + { "HDRCLKEN", 2, 1 }, + { "SDRCLKEN", 1, 1 }, + { "DDRCLKEN", 0, 1 }, + { "MC_DDR3PHYDATX8_GCR", 0x7000, 0 }, + { "PONR", 6, 1 }, + { "POND", 5, 1 }, + { "RDBDVT", 4, 1 }, + { "WDBDVT", 3, 1 }, + { "RDSDVT", 2, 1 }, + { "WDSDVT", 1, 1 }, + { "WLSDVT", 0, 1 }, + { "MC_DDR3PHYDATX8_WDSDR", 0x7004, 0 }, + { "MC_DDR3PHYDATX8_WLDPR", 0x7008, 0 }, + { "MC_DDR3PHYDATX8_WLDR", 0x700c, 0 }, + { "MC_DDR3PHYDATX8_WDBDR0", 0x701c, 0 }, + { "MC_DDR3PHYDATX8_WDBDR1", 0x7020, 0 }, + { "MC_DDR3PHYDATX8_WDBDR2", 0x7024, 0 }, + { "MC_DDR3PHYDATX8_WDBDR3", 0x7028, 0 }, + { "MC_DDR3PHYDATX8_WDBDR4", 0x702c, 0 }, + { "MC_DDR3PHYDATX8_WDBDR5", 0x7030, 0 }, + { "MC_DDR3PHYDATX8_WDBDR6", 0x7034, 0 }, + { "MC_DDR3PHYDATX8_WDBDR7", 0x7038, 0 }, + { "MC_DDR3PHYDATX8_WDBDR8", 0x703c, 0 }, + { "MC_DDR3PHYDATX8_WDBDMR", 0x7040, 0 }, + { "MC_DDR3PHYDATX8_RDSDR", 0x7044, 0 }, + { "MC_DDR3PHYDATX8_RDBDR0", 0x7048, 0 }, + { "MC_DDR3PHYDATX8_RDBDR1", 0x704c, 0 }, + { "MC_DDR3PHYDATX8_RDBDR2", 0x7050, 0 }, + { "MC_DDR3PHYDATX8_RDBDR3", 0x7054, 0 }, + { "MC_DDR3PHYDATX8_RDBDR4", 0x7058, 0 }, + { "MC_DDR3PHYDATX8_RDBDR5", 0x705c, 0 }, + { "MC_DDR3PHYDATX8_RDBDR6", 0x7060, 0 }, + { "MC_DDR3PHYDATX8_RDBDR7", 0x7064, 0 }, + { "MC_DDR3PHYDATX8_RDBDMR", 0x7068, 0 }, + { "MC_DDR3PHYDATX8_PMBDR0", 0x706c, 0 }, + { "MC_DDR3PHYDATX8_PMBDR1", 0x7070, 0 }, + { "MC_DDR3PHYDATX8_PMBDR2", 0x7074, 0 }, + { "MC_DDR3PHYDATX8_PMBDR3", 0x7078, 0 }, + { "MC_DDR3PHYDATX8_WDBDPR", 0x707c, 0 }, + { "MC_DDR3PHYDATX8_RDBDPR", 0x7080, 0 }, + { "MC_DDR3PHYDATX8_GSR", 0x7084, 0 }, + { "WLERR", 4, 1 }, + { "WLDONE", 3, 1 }, + { "WLCAL", 2, 1 }, + { "Read", 1, 1 }, + { "RDQSCAL", 0, 1 }, + { "MC_DDR3PHYDATX8_ACR", 0x70f0, 0 }, + { "PHYHRST", 9, 1 }, + { "WLSTEP", 8, 1 }, + { "SDRSELINV", 2, 1 }, + { "DDRSELINV", 1, 1 }, + { "DSINV", 0, 1 }, + { "MC_DDR3PHYDATX8_RSR", 0x70f4, 0 }, + { "WLRANK", 9, 1 }, + { "RANK", 0, 2 }, + { "MC_DDR3PHYDATX8_CLKENR", 0x70f8, 0 }, + { "DTOSEL", 8, 2 }, + { "HDRCLKEN", 2, 1 }, + { "SDRCLKEN", 1, 1 }, + { "DDRCLKEN", 0, 1 }, + { "MC_DDR3PHYDATX8_GCR", 0x7100, 0 }, + { "PONR", 6, 1 }, + { "POND", 5, 1 }, + { "RDBDVT", 4, 1 }, + { "WDBDVT", 3, 1 }, + { "RDSDVT", 2, 1 }, + { "WDSDVT", 1, 1 }, + { "WLSDVT", 0, 1 }, + { "MC_DDR3PHYDATX8_WDSDR", 0x7104, 0 }, + { "MC_DDR3PHYDATX8_WLDPR", 0x7108, 0 }, + { "MC_DDR3PHYDATX8_WLDR", 0x710c, 0 }, + { "MC_DDR3PHYDATX8_WDBDR0", 0x711c, 0 }, + { "MC_DDR3PHYDATX8_WDBDR1", 0x7120, 0 }, + { "MC_DDR3PHYDATX8_WDBDR2", 0x7124, 0 }, + { "MC_DDR3PHYDATX8_WDBDR3", 0x7128, 0 }, + { "MC_DDR3PHYDATX8_WDBDR4", 0x712c, 0 }, + { "MC_DDR3PHYDATX8_WDBDR5", 0x7130, 0 }, + { "MC_DDR3PHYDATX8_WDBDR6", 0x7134, 0 }, + { "MC_DDR3PHYDATX8_WDBDR7", 0x7138, 0 }, + { "MC_DDR3PHYDATX8_WDBDR8", 0x713c, 0 }, + { "MC_DDR3PHYDATX8_WDBDMR", 0x7140, 0 }, + { "MC_DDR3PHYDATX8_RDSDR", 0x7144, 0 }, + { "MC_DDR3PHYDATX8_RDBDR0", 0x7148, 0 }, + { "MC_DDR3PHYDATX8_RDBDR1", 0x714c, 0 }, + { "MC_DDR3PHYDATX8_RDBDR2", 0x7150, 0 }, + { "MC_DDR3PHYDATX8_RDBDR3", 0x7154, 0 }, + { "MC_DDR3PHYDATX8_RDBDR4", 0x7158, 0 }, + { "MC_DDR3PHYDATX8_RDBDR5", 0x715c, 0 }, + { "MC_DDR3PHYDATX8_RDBDR6", 0x7160, 0 }, + { "MC_DDR3PHYDATX8_RDBDR7", 0x7164, 0 }, + { "MC_DDR3PHYDATX8_RDBDMR", 0x7168, 0 }, + { "MC_DDR3PHYDATX8_PMBDR0", 0x716c, 0 }, + { "MC_DDR3PHYDATX8_PMBDR1", 0x7170, 0 }, + { "MC_DDR3PHYDATX8_PMBDR2", 0x7174, 0 }, + { "MC_DDR3PHYDATX8_PMBDR3", 0x7178, 0 }, + { "MC_DDR3PHYDATX8_WDBDPR", 0x717c, 0 }, + { "MC_DDR3PHYDATX8_RDBDPR", 0x7180, 0 }, + { "MC_DDR3PHYDATX8_GSR", 0x7184, 0 }, + { "WLERR", 4, 1 }, + { "WLDONE", 3, 1 }, + { "WLCAL", 2, 1 }, + { "Read", 1, 1 }, + { "RDQSCAL", 0, 1 }, + { "MC_DDR3PHYDATX8_ACR", 0x71f0, 0 }, + { "PHYHRST", 9, 1 }, + { "WLSTEP", 8, 1 }, + { "SDRSELINV", 2, 1 }, + { "DDRSELINV", 1, 1 }, + { "DSINV", 0, 1 }, + { "MC_DDR3PHYDATX8_RSR", 0x71f4, 0 }, + { "WLRANK", 9, 1 }, + { "RANK", 0, 2 }, + { "MC_DDR3PHYDATX8_CLKENR", 0x71f8, 0 }, + { "DTOSEL", 8, 2 }, + { "HDRCLKEN", 2, 1 }, + { "SDRCLKEN", 1, 1 }, + { "DDRCLKEN", 0, 1 }, + { "MC_DDR3PHYDATX8_GCR", 0x7200, 0 }, + { "PONR", 6, 1 }, + { "POND", 5, 1 }, + { "RDBDVT", 4, 1 }, + { "WDBDVT", 3, 1 }, + { "RDSDVT", 2, 1 }, + { "WDSDVT", 1, 1 }, + { "WLSDVT", 0, 1 }, + { "MC_DDR3PHYDATX8_WDSDR", 0x7204, 0 }, + { "MC_DDR3PHYDATX8_WLDPR", 0x7208, 0 }, + { "MC_DDR3PHYDATX8_WLDR", 0x720c, 0 }, + { "MC_DDR3PHYDATX8_WDBDR0", 0x721c, 0 }, + { "MC_DDR3PHYDATX8_WDBDR1", 0x7220, 0 }, + { "MC_DDR3PHYDATX8_WDBDR2", 0x7224, 0 }, + { "MC_DDR3PHYDATX8_WDBDR3", 0x7228, 0 }, + { "MC_DDR3PHYDATX8_WDBDR4", 0x722c, 0 }, + { "MC_DDR3PHYDATX8_WDBDR5", 0x7230, 0 }, + { "MC_DDR3PHYDATX8_WDBDR6", 0x7234, 0 }, + { "MC_DDR3PHYDATX8_WDBDR7", 0x7238, 0 }, + { "MC_DDR3PHYDATX8_WDBDR8", 0x723c, 0 }, + { "MC_DDR3PHYDATX8_WDBDMR", 0x7240, 0 }, + { "MC_DDR3PHYDATX8_RDSDR", 0x7244, 0 }, + { "MC_DDR3PHYDATX8_RDBDR0", 0x7248, 0 }, + { "MC_DDR3PHYDATX8_RDBDR1", 0x724c, 0 }, + { "MC_DDR3PHYDATX8_RDBDR2", 0x7250, 0 }, + { "MC_DDR3PHYDATX8_RDBDR3", 0x7254, 0 }, + { "MC_DDR3PHYDATX8_RDBDR4", 0x7258, 0 }, + { "MC_DDR3PHYDATX8_RDBDR5", 0x725c, 0 }, + { "MC_DDR3PHYDATX8_RDBDR6", 0x7260, 0 }, + { "MC_DDR3PHYDATX8_RDBDR7", 0x7264, 0 }, + { "MC_DDR3PHYDATX8_RDBDMR", 0x7268, 0 }, + { "MC_DDR3PHYDATX8_PMBDR0", 0x726c, 0 }, + { "MC_DDR3PHYDATX8_PMBDR1", 0x7270, 0 }, + { "MC_DDR3PHYDATX8_PMBDR2", 0x7274, 0 }, + { "MC_DDR3PHYDATX8_PMBDR3", 0x7278, 0 }, + { "MC_DDR3PHYDATX8_WDBDPR", 0x727c, 0 }, + { "MC_DDR3PHYDATX8_RDBDPR", 0x7280, 0 }, + { "MC_DDR3PHYDATX8_GSR", 0x7284, 0 }, + { "WLERR", 4, 1 }, + { "WLDONE", 3, 1 }, + { "WLCAL", 2, 1 }, + { "Read", 1, 1 }, + { "RDQSCAL", 0, 1 }, + { "MC_DDR3PHYDATX8_ACR", 0x72f0, 0 }, + { "PHYHRST", 9, 1 }, + { "WLSTEP", 8, 1 }, + { "SDRSELINV", 2, 1 }, + { "DDRSELINV", 1, 1 }, + { "DSINV", 0, 1 }, + { "MC_DDR3PHYDATX8_RSR", 0x72f4, 0 }, + { "WLRANK", 9, 1 }, + { "RANK", 0, 2 }, + { "MC_DDR3PHYDATX8_CLKENR", 0x72f8, 0 }, + { "DTOSEL", 8, 2 }, + { "HDRCLKEN", 2, 1 }, + { "SDRCLKEN", 1, 1 }, + { "DDRCLKEN", 0, 1 }, + { "MC_DDR3PHYDATX8_GCR", 0x7300, 0 }, + { "PONR", 6, 1 }, + { "POND", 5, 1 }, + { "RDBDVT", 4, 1 }, + { "WDBDVT", 3, 1 }, + { "RDSDVT", 2, 1 }, + { "WDSDVT", 1, 1 }, + { "WLSDVT", 0, 1 }, + { "MC_DDR3PHYDATX8_WDSDR", 0x7304, 0 }, + { "MC_DDR3PHYDATX8_WLDPR", 0x7308, 0 }, + { "MC_DDR3PHYDATX8_WLDR", 0x730c, 0 }, + { "MC_DDR3PHYDATX8_WDBDR0", 0x731c, 0 }, + { "MC_DDR3PHYDATX8_WDBDR1", 0x7320, 0 }, + { "MC_DDR3PHYDATX8_WDBDR2", 0x7324, 0 }, + { "MC_DDR3PHYDATX8_WDBDR3", 0x7328, 0 }, + { "MC_DDR3PHYDATX8_WDBDR4", 0x732c, 0 }, + { "MC_DDR3PHYDATX8_WDBDR5", 0x7330, 0 }, + { "MC_DDR3PHYDATX8_WDBDR6", 0x7334, 0 }, + { "MC_DDR3PHYDATX8_WDBDR7", 0x7338, 0 }, + { "MC_DDR3PHYDATX8_WDBDR8", 0x733c, 0 }, + { "MC_DDR3PHYDATX8_WDBDMR", 0x7340, 0 }, + { "MC_DDR3PHYDATX8_RDSDR", 0x7344, 0 }, + { "MC_DDR3PHYDATX8_RDBDR0", 0x7348, 0 }, + { "MC_DDR3PHYDATX8_RDBDR1", 0x734c, 0 }, + { "MC_DDR3PHYDATX8_RDBDR2", 0x7350, 0 }, + { "MC_DDR3PHYDATX8_RDBDR3", 0x7354, 0 }, + { "MC_DDR3PHYDATX8_RDBDR4", 0x7358, 0 }, + { "MC_DDR3PHYDATX8_RDBDR5", 0x735c, 0 }, + { "MC_DDR3PHYDATX8_RDBDR6", 0x7360, 0 }, + { "MC_DDR3PHYDATX8_RDBDR7", 0x7364, 0 }, + { "MC_DDR3PHYDATX8_RDBDMR", 0x7368, 0 }, + { "MC_DDR3PHYDATX8_PMBDR0", 0x736c, 0 }, + { "MC_DDR3PHYDATX8_PMBDR1", 0x7370, 0 }, + { "MC_DDR3PHYDATX8_PMBDR2", 0x7374, 0 }, + { "MC_DDR3PHYDATX8_PMBDR3", 0x7378, 0 }, + { "MC_DDR3PHYDATX8_WDBDPR", 0x737c, 0 }, + { "MC_DDR3PHYDATX8_RDBDPR", 0x7380, 0 }, + { "MC_DDR3PHYDATX8_GSR", 0x7384, 0 }, + { "WLERR", 4, 1 }, + { "WLDONE", 3, 1 }, + { "WLCAL", 2, 1 }, + { "Read", 1, 1 }, + { "RDQSCAL", 0, 1 }, + { "MC_DDR3PHYDATX8_ACR", 0x73f0, 0 }, + { "PHYHRST", 9, 1 }, + { "WLSTEP", 8, 1 }, + { "SDRSELINV", 2, 1 }, + { "DDRSELINV", 1, 1 }, + { "DSINV", 0, 1 }, + { "MC_DDR3PHYDATX8_RSR", 0x73f4, 0 }, + { "WLRANK", 9, 1 }, + { "RANK", 0, 2 }, + { "MC_DDR3PHYDATX8_CLKENR", 0x73f8, 0 }, + { "DTOSEL", 8, 2 }, + { "HDRCLKEN", 2, 1 }, + { "SDRCLKEN", 1, 1 }, + { "DDRCLKEN", 0, 1 }, + { "MC_PVT_REG_CALIBRATE_CTL", 0x7400, 0 }, + { "HALT_CALIBRATE", 1, 1 }, + { "RESET_CALIBRATE", 0, 1 }, + { "MC_PVT_REG_UPDATE_CTL", 0x7404, 0 }, + { "FAST_UPDATe", 8, 1 }, + { "FORCE_REG_IN_VALUE", 2, 1 }, + { "HALT_UPDATe", 1, 1 }, + { "MC_PVT_REG_LAST_MEASUREMENT", 0x7408, 0 }, + { "LAST_MEASUREMENT_SELECT", 8, 2 }, + { "LAST_MEASUREMENT_RESULT_BANK_B", 4, 4 }, + { "LAST_MEASUREMENT_RESULT_BANK_A", 0, 4 }, + { "MC_PVT_REG_DRVN", 0x740c, 0 }, + { "PVT_REG_DRVN_EN", 8, 1 }, + { "PVT_REG_DRVN_B", 4, 4 }, + { "PVT_REG_DRVN_A", 0, 4 }, + { "MC_PVT_REG_DRVP", 0x7410, 0 }, + { "PVT_REG_DRVP_EN", 8, 1 }, + { "PVT_REG_DRVP_B", 4, 4 }, + { "PVT_REG_DRVP_A", 0, 4 }, + { "MC_PVT_REG_TERMN", 0x7414, 0 }, + { "PVT_REG_TERMN_EN", 8, 1 }, + { "PVT_REG_TERMN_B", 4, 4 }, + { "PVT_REG_TERMN_A", 0, 4 }, + { "MC_PVT_REG_TERMP", 0x7418, 0 }, + { "PVT_REG_TERMP_EN", 8, 1 }, + { "PVT_REG_TERMP_B", 4, 4 }, + { "PVT_REG_TERMP_A", 0, 4 }, + { "MC_PVT_REG_THRESHOLD", 0x741c, 0 }, + { "PVT_CALIBRATION_DONE", 8, 1 }, + { "THRESHOLD_TERMP_MAX_SYNC", 7, 1 }, + { "THRESHOLD_TERMP_MIN_SYNC", 6, 1 }, + { "THRESHOLD_TERMN_MAX_SYNC", 5, 1 }, + { "THRESHOLD_TERMN_MIN_SYNC", 4, 1 }, + { "THRESHOLD_DRVP_MAX_SYNC", 3, 1 }, + { "THRESHOLD_DRVP_MIN_SYNC", 2, 1 }, + { "THRESHOLD_DRVN_MAX_SYNC", 1, 1 }, + { "THRESHOLD_DRVN_MIN_SYNC", 0, 1 }, + { "MC_PVT_REG_IN_TERMP", 0x7420, 0 }, + { "REG_IN_TERMP_B", 4, 4 }, + { "REG_IN_TERMP_A", 0, 4 }, + { "MC_PVT_REG_IN_TERMN", 0x7424, 0 }, + { "REG_IN_TERMN_B", 4, 4 }, + { "REG_IN_TERMN_A", 0, 4 }, + { "MC_PVT_REG_IN_DRVP", 0x7428, 0 }, + { "REG_IN_DRVP_B", 4, 4 }, + { "REG_IN_DRVP_A", 0, 4 }, + { "MC_PVT_REG_IN_DRVN", 0x742c, 0 }, + { "REG_IN_DRVN_B", 4, 4 }, + { "REG_IN_DRVN_A", 0, 4 }, + { "MC_PVT_REG_OUT_TERMP", 0x7430, 0 }, + { "REG_OUT_TERMP_B", 4, 4 }, + { "REG_OUT_TERMP_A", 0, 4 }, + { "MC_PVT_REG_OUT_TERMN", 0x7434, 0 }, + { "REG_OUT_TERMN_B", 4, 4 }, + { "REG_OUT_TERMN_A", 0, 4 }, + { "MC_PVT_REG_OUT_DRVP", 0x7438, 0 }, + { "REG_OUT_DRVP_B", 4, 4 }, + { "REG_OUT_DRVP_A", 0, 4 }, + { "MC_PVT_REG_OUT_DRVN", 0x743c, 0 }, + { "REG_OUT_DRVN_B", 4, 4 }, + { "REG_OUT_DRVN_A", 0, 4 }, + { "MC_PVT_REG_HISTORY_TERMP", 0x7440, 0 }, + { "termp_b_history", 4, 4 }, + { "termp_a_history", 0, 4 }, + { "MC_PVT_REG_HISTORY_TERMN", 0x7444, 0 }, + { "TERMN_B_HISTORY", 4, 4 }, + { "TERMN_A_HISTORY", 0, 4 }, + { "MC_PVT_REG_HISTORY_DRVP", 0x7448, 0 }, + { "DRVP_B_HISTORY", 4, 4 }, + { "DRVP_A_HISTORY", 0, 4 }, + { "MC_PVT_REG_HISTORY_DRVN", 0x744c, 0 }, + { "DRVN_B_HISTORY", 4, 4 }, + { "DRVN_A_HISTORY", 0, 4 }, + { "MC_PVT_REG_SAMPLE_WAIT_CLKS", 0x7450, 0 }, + { "MC_DDRPHY_RST_CTRL", 0x7500, 0 }, + { "DDRIO_ENABLE", 1, 1 }, + { "PHY_RST_N", 0, 1 }, + { "MC_PERFORMANCE_CTRL", 0x7504, 0 }, + { "STALL_CHK_BIT", 2, 1 }, + { "DDR3_BRC_MODE", 1, 1 }, + { "RMW_PERF_CTRL", 0, 1 }, + { "MC_ECC_CTRL", 0x7508, 0 }, + { "ECC_BYPASS_BIST", 1, 1 }, + { "ECC_DISABLE", 0, 1 }, + { "MC_PAR_ENABLE", 0x750c, 0 }, + { "ECC_UE_PAR_ENABLE", 3, 1 }, + { "ECC_CE_PAR_ENABLE", 2, 1 }, + { "PERR_REG_INT_ENABLE", 1, 1 }, + { "PERR_BLK_INT_ENABLE", 0, 1 }, + { "MC_PAR_CAUSE", 0x7510, 0 }, + { "ECC_UE_PAR_CAUSE", 3, 1 }, + { "ECC_CE_PAR_CAUSE", 2, 1 }, + { "FIFOR_PAR_CAUSE", 1, 1 }, + { "RDATA_FIFOR_PAR_CAUSE", 0, 1 }, + { "MC_INT_ENABLE", 0x7514, 0 }, + { "ECC_UE_INT_ENABLE", 2, 1 }, + { "ECC_CE_INT_ENABLE", 1, 1 }, + { "PERR_INT_ENABLE", 0, 1 }, + { "MC_INT_CAUSE", 0x7518, 0 }, + { "ECC_UE_INT_CAUSE", 2, 1 }, + { "ECC_CE_INT_CAUSE", 1, 1 }, + { "PERR_INT_CAUSE", 0, 1 }, + { "MC_ECC_STATUS", 0x751c, 0 }, + { "ECC_CECNT", 16, 16 }, + { "ECC_UECNT", 0, 16 }, + { "MC_PHY_CTRL", 0x7520, 0 }, + { "MC_STATIC_CFG_STATUS", 0x7524, 0 }, + { "STATIC_MODE", 9, 1 }, + { "STATIC_DEN", 6, 3 }, + { "STATIC_ORG", 5, 1 }, + { "STATIC_RKS", 4, 1 }, + { "STATIC_WIDTH", 1, 3 }, + { "STATIC_SLOW", 0, 1 }, + { "MC_CORE_PCTL_STAT", 0x7528, 0 }, + { "MC_DEBUG_CNT", 0x752c, 0 }, + { "WDATA_OCNT", 8, 5 }, + { "RDATA_OCNT", 0, 5 }, + { "MC_BONUS", 0x7530, 0 }, + { "MC_BIST_CMD", 0x7600, 0 }, + { "START_BIST", 31, 1 }, + { "BIST_CMD_GAP", 8, 8 }, + { "BIST_OPCODE", 0, 2 }, + { "MC_BIST_CMD_ADDR", 0x7604, 0 }, + { "MC_BIST_CMD_LEN", 0x7608, 0 }, + { "MC_BIST_DATA_PATTERN", 0x760c, 0 }, + { "MC_BIST_USER_WDATA0", 0x7614, 0 }, + { "MC_BIST_USER_WDATA1", 0x7618, 0 }, + { "MC_BIST_USER_WDATA2", 0x761c, 0 }, + { "MC_BIST_NUM_ERR", 0x7680, 0 }, + { "MC_BIST_ERR_FIRST_ADDR", 0x7684, 0 }, + { "MC_BIST_STATUS_RDATA", 0x7688, 0 }, + { "MC_BIST_STATUS_RDATA", 0x768c, 0 }, + { "MC_BIST_STATUS_RDATA", 0x7690, 0 }, + { "MC_BIST_STATUS_RDATA", 0x7694, 0 }, + { "MC_BIST_STATUS_RDATA", 0x7698, 0 }, + { "MC_BIST_STATUS_RDATA", 0x769c, 0 }, + { "MC_BIST_STATUS_RDATA", 0x76a0, 0 }, + { "MC_BIST_STATUS_RDATA", 0x76a4, 0 }, + { "MC_BIST_STATUS_RDATA", 0x76a8, 0 }, + { "MC_BIST_STATUS_RDATA", 0x76ac, 0 }, + { "MC_BIST_STATUS_RDATA", 0x76b0, 0 }, + { "MC_BIST_STATUS_RDATA", 0x76b4, 0 }, + { "MC_BIST_STATUS_RDATA", 0x76b8, 0 }, + { "MC_BIST_STATUS_RDATA", 0x76bc, 0 }, + { "MC_BIST_STATUS_RDATA", 0x76c0, 0 }, + { "MC_BIST_STATUS_RDATA", 0x76c4, 0 }, + { "MC_BIST_STATUS_RDATA", 0x76c8, 0 }, + { "MC_BIST_STATUS_RDATA", 0x76cc, 0 }, + { NULL, 0, 0 } +}; + +struct reg_info t4_ma_regs[] = { + { "MA_CLIENT0_RD_LATENCY_THRESHOLD", 0x7700, 0 }, + { "THRESHOLD1", 17, 15 }, + { "THRESHOLD1_EN", 16, 1 }, + { "THRESHOLD0", 1, 15 }, + { "THRESHOLD0_EN", 0, 1 }, + { "MA_CLIENT0_WR_LATENCY_THRESHOLD", 0x7704, 0 }, + { "THRESHOLD1", 17, 15 }, + { "THRESHOLD1_EN", 16, 1 }, + { "THRESHOLD0", 1, 15 }, + { "THRESHOLD0_EN", 0, 1 }, + { "MA_CLIENT1_RD_LATENCY_THRESHOLD", 0x7708, 0 }, + { "THRESHOLD1", 17, 15 }, + { "THRESHOLD1_EN", 16, 1 }, + { "THRESHOLD0", 1, 15 }, + { "THRESHOLD0_EN", 0, 1 }, + { "MA_CLIENT1_WR_LATENCY_THRESHOLD", 0x770c, 0 }, + { "THRESHOLD1", 17, 15 }, + { "THRESHOLD1_EN", 16, 1 }, + { "THRESHOLD0", 1, 15 }, + { "THRESHOLD0_EN", 0, 1 }, + { "MA_CLIENT2_RD_LATENCY_THRESHOLD", 0x7710, 0 }, + { "THRESHOLD1", 17, 15 }, + { "THRESHOLD1_EN", 16, 1 }, + { "THRESHOLD0", 1, 15 }, + { "THRESHOLD0_EN", 0, 1 }, + { "MA_CLIENT2_WR_LATENCY_THRESHOLD", 0x7714, 0 }, + { "THRESHOLD1", 17, 15 }, + { "THRESHOLD1_EN", 16, 1 }, + { "THRESHOLD0", 1, 15 }, + { "THRESHOLD0_EN", 0, 1 }, + { "MA_CLIENT3_RD_LATENCY_THRESHOLD", 0x7718, 0 }, + { "THRESHOLD1", 17, 15 }, + { "THRESHOLD1_EN", 16, 1 }, + { "THRESHOLD0", 1, 15 }, + { "THRESHOLD0_EN", 0, 1 }, + { "MA_CLIENT3_WR_LATENCY_THRESHOLD", 0x771c, 0 }, + { "THRESHOLD1", 17, 15 }, + { "THRESHOLD1_EN", 16, 1 }, + { "THRESHOLD0", 1, 15 }, + { "THRESHOLD0_EN", 0, 1 }, + { "MA_CLIENT4_RD_LATENCY_THRESHOLD", 0x7720, 0 }, + { "THRESHOLD1", 17, 15 }, + { "THRESHOLD1_EN", 16, 1 }, + { "THRESHOLD0", 1, 15 }, + { "THRESHOLD0_EN", 0, 1 }, + { "MA_CLIENT4_WR_LATENCY_THRESHOLD", 0x7724, 0 }, + { "THRESHOLD1", 17, 15 }, + { "THRESHOLD1_EN", 16, 1 }, + { "THRESHOLD0", 1, 15 }, + { "THRESHOLD0_EN", 0, 1 }, + { "MA_CLIENT5_RD_LATENCY_THRESHOLD", 0x7728, 0 }, + { "THRESHOLD1", 17, 15 }, + { "THRESHOLD1_EN", 16, 1 }, + { "THRESHOLD0", 1, 15 }, + { "THRESHOLD0_EN", 0, 1 }, + { "MA_CLIENT5_WR_LATENCY_THRESHOLD", 0x772c, 0 }, + { "THRESHOLD1", 17, 15 }, + { "THRESHOLD1_EN", 16, 1 }, + { "THRESHOLD0", 1, 15 }, + { "THRESHOLD0_EN", 0, 1 }, + { "MA_CLIENT6_RD_LATENCY_THRESHOLD", 0x7730, 0 }, + { "THRESHOLD1", 17, 15 }, + { "THRESHOLD1_EN", 16, 1 }, + { "THRESHOLD0", 1, 15 }, + { "THRESHOLD0_EN", 0, 1 }, + { "MA_CLIENT6_WR_LATENCY_THRESHOLD", 0x7734, 0 }, + { "THRESHOLD1", 17, 15 }, + { "THRESHOLD1_EN", 16, 1 }, + { "THRESHOLD0", 1, 15 }, + { "THRESHOLD0_EN", 0, 1 }, + { "MA_CLIENT7_RD_LATENCY_THRESHOLD", 0x7738, 0 }, + { "THRESHOLD1", 17, 15 }, + { "THRESHOLD1_EN", 16, 1 }, + { "THRESHOLD0", 1, 15 }, + { "THRESHOLD0_EN", 0, 1 }, + { "MA_CLIENT7_WR_LATENCY_THRESHOLD", 0x773c, 0 }, + { "THRESHOLD1", 17, 15 }, + { "THRESHOLD1_EN", 16, 1 }, + { "THRESHOLD0", 1, 15 }, + { "THRESHOLD0_EN", 0, 1 }, + { "MA_CLIENT8_RD_LATENCY_THRESHOLD", 0x7740, 0 }, + { "THRESHOLD1", 17, 15 }, + { "THRESHOLD1_EN", 16, 1 }, + { "THRESHOLD0", 1, 15 }, + { "THRESHOLD0_EN", 0, 1 }, + { "MA_CLIENT8_WR_LATENCY_THRESHOLD", 0x7744, 0 }, + { "THRESHOLD1", 17, 15 }, + { "THRESHOLD1_EN", 16, 1 }, + { "THRESHOLD0", 1, 15 }, + { "THRESHOLD0_EN", 0, 1 }, + { "MA_CLIENT9_RD_LATENCY_THRESHOLD", 0x7748, 0 }, + { "THRESHOLD1", 17, 15 }, + { "THRESHOLD1_EN", 16, 1 }, + { "THRESHOLD0", 1, 15 }, + { "THRESHOLD0_EN", 0, 1 }, + { "MA_CLIENT9_WR_LATENCY_THRESHOLD", 0x774c, 0 }, + { "THRESHOLD1", 17, 15 }, + { "THRESHOLD1_EN", 16, 1 }, + { "THRESHOLD0", 1, 15 }, + { "THRESHOLD0_EN", 0, 1 }, + { "MA_CLIENT10_RD_LATENCY_THRESHOLD", 0x7750, 0 }, + { "THRESHOLD1", 17, 15 }, + { "THRESHOLD1_EN", 16, 1 }, + { "THRESHOLD0", 1, 15 }, + { "THRESHOLD0_EN", 0, 1 }, + { "MA_CLIENT10_WR_LATENCY_THRESHOLD", 0x7754, 0 }, + { "THRESHOLD1", 17, 15 }, + { "THRESHOLD1_EN", 16, 1 }, + { "THRESHOLD0", 1, 15 }, + { "THRESHOLD0_EN", 0, 1 }, + { "MA_CLIENT11_RD_LATENCY_THRESHOLD", 0x7758, 0 }, + { "THRESHOLD1", 17, 15 }, + { "THRESHOLD1_EN", 16, 1 }, + { "THRESHOLD0", 1, 15 }, + { "THRESHOLD0_EN", 0, 1 }, + { "MA_CLIENT11_WR_LATENCY_THRESHOLD", 0x775c, 0 }, + { "THRESHOLD1", 17, 15 }, + { "THRESHOLD1_EN", 16, 1 }, + { "THRESHOLD0", 1, 15 }, + { "THRESHOLD0_EN", 0, 1 }, + { "MA_CLIENT12_RD_LATENCY_THRESHOLD", 0x7760, 0 }, + { "THRESHOLD1", 17, 15 }, + { "THRESHOLD1_EN", 16, 1 }, + { "THRESHOLD0", 1, 15 }, + { "THRESHOLD0_EN", 0, 1 }, + { "MA_CLIENT12_WR_LATENCY_THRESHOLD", 0x7764, 0 }, + { "THRESHOLD1", 17, 15 }, + { "THRESHOLD1_EN", 16, 1 }, + { "THRESHOLD0", 1, 15 }, + { "THRESHOLD0_EN", 0, 1 }, + { "MA_SGE_TH0_DEBUG_CNT", 0x7768, 0 }, + { "DBG_READ_DATA_CNT", 24, 8 }, + { "DBG_READ_REQ_CNT", 16, 8 }, + { "DBG_WRITE_DATA_CNT", 8, 8 }, + { "DBG_WRITE_REQ_CNT", 0, 8 }, + { "MA_SGE_TH1_DEBUG_CNT", 0x776c, 0 }, + { "DBG_READ_DATA_CNT", 24, 8 }, + { "DBG_READ_REQ_CNT", 16, 8 }, + { "DBG_WRITE_DATA_CNT", 8, 8 }, + { "DBG_WRITE_REQ_CNT", 0, 8 }, + { "MA_ULPTX_DEBUG_CNT", 0x7770, 0 }, + { "DBG_READ_DATA_CNT", 24, 8 }, + { "DBG_READ_REQ_CNT", 16, 8 }, + { "DBG_WRITE_DATA_CNT", 8, 8 }, + { "DBG_WRITE_REQ_CNT", 0, 8 }, + { "MA_ULPRX_DEBUG_CNT", 0x7774, 0 }, + { "DBG_READ_DATA_CNT", 24, 8 }, + { "DBG_READ_REQ_CNT", 16, 8 }, + { "DBG_WRITE_DATA_CNT", 8, 8 }, + { "DBG_WRITE_REQ_CNT", 0, 8 }, + { "MA_ULPTXRX_DEBUG_CNT", 0x7778, 0 }, + { "DBG_READ_DATA_CNT", 24, 8 }, + { "DBG_READ_REQ_CNT", 16, 8 }, + { "DBG_WRITE_DATA_CNT", 8, 8 }, + { "DBG_WRITE_REQ_CNT", 0, 8 }, + { "MA_TP_TH0_DEBUG_CNT", 0x777c, 0 }, + { "DBG_READ_DATA_CNT", 24, 8 }, + { "DBG_READ_REQ_CNT", 16, 8 }, + { "DBG_WRITE_DATA_CNT", 8, 8 }, + { "DBG_WRITE_REQ_CNT", 0, 8 }, + { "MA_TP_TH1_DEBUG_CNT", 0x7780, 0 }, + { "DBG_READ_DATA_CNT", 24, 8 }, + { "DBG_READ_REQ_CNT", 16, 8 }, + { "DBG_WRITE_DATA_CNT", 8, 8 }, + { "DBG_WRITE_REQ_CNT", 0, 8 }, + { "MA_LE_DEBUG_CNT", 0x7784, 0 }, + { "DBG_READ_DATA_CNT", 24, 8 }, + { "DBG_READ_REQ_CNT", 16, 8 }, + { "DBG_WRITE_DATA_CNT", 8, 8 }, + { "DBG_WRITE_REQ_CNT", 0, 8 }, + { "MA_CIM_DEBUG_CNT", 0x7788, 0 }, + { "DBG_READ_DATA_CNT", 24, 8 }, + { "DBG_READ_REQ_CNT", 16, 8 }, + { "DBG_WRITE_DATA_CNT", 8, 8 }, + { "DBG_WRITE_REQ_CNT", 0, 8 }, + { "MA_PCIE_DEBUG_CNT", 0x778c, 0 }, + { "DBG_READ_DATA_CNT", 24, 8 }, + { "DBG_READ_REQ_CNT", 16, 8 }, + { "DBG_WRITE_DATA_CNT", 8, 8 }, + { "DBG_WRITE_REQ_CNT", 0, 8 }, + { "MA_PMTX_DEBUG_CNT", 0x7790, 0 }, + { "DBG_READ_DATA_CNT", 24, 8 }, + { "DBG_READ_REQ_CNT", 16, 8 }, + { "DBG_WRITE_DATA_CNT", 8, 8 }, + { "DBG_WRITE_REQ_CNT", 0, 8 }, + { "MA_PMRX_DEBUG_CNT", 0x7794, 0 }, + { "DBG_READ_DATA_CNT", 24, 8 }, + { "DBG_READ_REQ_CNT", 16, 8 }, + { "DBG_WRITE_DATA_CNT", 8, 8 }, + { "DBG_WRITE_REQ_CNT", 0, 8 }, + { "MA_HMA_DEBUG_CNT", 0x7798, 0 }, + { "DBG_READ_DATA_CNT", 24, 8 }, + { "DBG_READ_REQ_CNT", 16, 8 }, + { "DBG_WRITE_DATA_CNT", 8, 8 }, + { "DBG_WRITE_REQ_CNT", 0, 8 }, + { "MA_EDRAM0_BAR", 0x77c0, 0 }, + { "EDRAM0_BASE", 16, 12 }, + { "EDRAM0_SIZE", 0, 12 }, + { "MA_EDRAM1_BAR", 0x77c4, 0 }, + { "EDRAM1_BASE", 16, 12 }, + { "EDRAM1_SIZE", 0, 12 }, + { "MA_EXT_MEMORY_BAR", 0x77c8, 0 }, + { "EXT_MEM_BASE", 16, 12 }, + { "EXT_MEM_SIZE", 0, 12 }, + { "MA_HOST_MEMORY_BAR", 0x77cc, 0 }, + { "HMA_BASE", 16, 12 }, + { "HMA_SIZE", 0, 12 }, + { "MA_EXT_MEM_PAGE_SIZE", 0x77d0, 0 }, + { "BRC_MODE", 2, 1 }, + { "EXT_MEM_PAGE_SIZE", 0, 2 }, + { "MA_ARB_CTRL", 0x77d4, 0 }, + { "DIS_PAGE_HINT", 1, 1 }, + { "DIS_ADV_ARB", 0, 1 }, + { "MA_TARGET_MEM_ENABLE", 0x77d8, 0 }, + { "HMA_ENABLE", 3, 1 }, + { "EXT_MEM_ENABLE", 2, 1 }, + { "EDRAM1_ENABLE", 1, 1 }, + { "EDRAM0_ENABLE", 0, 1 }, + { "MA_INT_ENABLE", 0x77dc, 0 }, + { "MEM_PERR_INT_ENABLE", 1, 1 }, + { "MEM_WRAP_INT_ENABLE", 0, 1 }, + { "MA_INT_CAUSE", 0x77e0, 0 }, + { "MEM_PERR_INT_CAUSE", 1, 1 }, + { "MEM_WRAP_INT_CAUSE", 0, 1 }, + { "MA_INT_WRAP_STATUS", 0x77e4, 0 }, + { "MEM_WRAP_ADDRESS", 4, 28 }, + { "MEM_WRAP_CLIENT_NUM", 0, 4 }, + { "MA_TP_THREAD1_MAPPER", 0x77e8, 0 }, + { "MA_SGE_THREAD1_MAPPER", 0x77ec, 0 }, + { "MA_PARITY_ERROR_ENABLE", 0x77f0, 0 }, + { "TP_DMARBT_PAR_ERROR_EN", 31, 1 }, + { "LOGIC_FIFO_PAR_ERROR_EN", 30, 1 }, + { "ARB3_PAR_WRQUEUE_ERROR_EN", 29, 1 }, + { "ARB2_PAR_WRQUEUE_ERROR_EN", 28, 1 }, + { "ARB1_PAR_WRQUEUE_ERROR_EN", 27, 1 }, + { "ARB0_PAR_WRQUEUE_ERROR_EN", 26, 1 }, + { "ARB3_PAR_RDQUEUE_ERROR_EN", 25, 1 }, + { "ARB2_PAR_RDQUEUE_ERROR_EN", 24, 1 }, + { "ARB1_PAR_RDQUEUE_ERROR_EN", 23, 1 }, + { "ARB0_PAR_RDQUEUE_ERROR_EN", 22, 1 }, + { "CL10_PAR_WRQUEUE_ERROR_EN", 21, 1 }, + { "CL9_PAR_WRQUEUE_ERROR_EN", 20, 1 }, + { "CL8_PAR_WRQUEUE_ERROR_EN", 19, 1 }, + { "CL7_PAR_WRQUEUE_ERROR_EN", 18, 1 }, + { "CL6_PAR_WRQUEUE_ERROR_EN", 17, 1 }, + { "CL5_PAR_WRQUEUE_ERROR_EN", 16, 1 }, + { "CL4_PAR_WRQUEUE_ERROR_EN", 15, 1 }, + { "CL3_PAR_WRQUEUE_ERROR_EN", 14, 1 }, + { "CL2_PAR_WRQUEUE_ERROR_EN", 13, 1 }, + { "CL1_PAR_WRQUEUE_ERROR_EN", 12, 1 }, + { "CL0_PAR_WRQUEUE_ERROR_EN", 11, 1 }, + { "CL10_PAR_RDQUEUE_ERROR_EN", 10, 1 }, + { "CL9_PAR_RDQUEUE_ERROR_EN", 9, 1 }, + { "CL8_PAR_RDQUEUE_ERROR_EN", 8, 1 }, + { "CL7_PAR_RDQUEUE_ERROR_EN", 7, 1 }, + { "CL6_PAR_RDQUEUE_ERROR_EN", 6, 1 }, + { "CL5_PAR_RDQUEUE_ERROR_EN", 5, 1 }, + { "CL4_PAR_RDQUEUE_ERROR_EN", 4, 1 }, + { "CL3_PAR_RDQUEUE_ERROR_EN", 3, 1 }, + { "CL2_PAR_RDQUEUE_ERROR_EN", 2, 1 }, + { "CL1_PAR_RDQUEUE_ERROR_EN", 1, 1 }, + { "CL0_PAR_RDQUEUE_ERROR_EN", 0, 1 }, + { "MA_PARITY_ERROR_STATUS", 0x77f4, 0 }, + { "TP_DMARBT_PAR_ERROR", 31, 1 }, + { "LOGIC_FIFO_PAR_ERROR", 30, 1 }, + { "ARB3_PAR_WRQUEUE_ERROR", 29, 1 }, + { "ARB2_PAR_WRQUEUE_ERROR", 28, 1 }, + { "ARB1_PAR_WRQUEUE_ERROR", 27, 1 }, + { "ARB0_PAR_WRQUEUE_ERROR", 26, 1 }, + { "ARB3_PAR_RDQUEUE_ERROR", 25, 1 }, + { "ARB2_PAR_RDQUEUE_ERROR", 24, 1 }, + { "ARB1_PAR_RDQUEUE_ERROR", 23, 1 }, + { "ARB0_PAR_RDQUEUE_ERROR", 22, 1 }, + { "CL10_PAR_WRQUEUE_ERROR", 21, 1 }, + { "CL9_PAR_WRQUEUE_ERROR", 20, 1 }, + { "CL8_PAR_WRQUEUE_ERROR", 19, 1 }, + { "CL7_PAR_WRQUEUE_ERROR", 18, 1 }, + { "CL6_PAR_WRQUEUE_ERROR", 17, 1 }, + { "CL5_PAR_WRQUEUE_ERROR", 16, 1 }, + { "CL4_PAR_WRQUEUE_ERROR", 15, 1 }, + { "CL3_PAR_WRQUEUE_ERROR", 14, 1 }, + { "CL2_PAR_WRQUEUE_ERROR", 13, 1 }, + { "CL1_PAR_WRQUEUE_ERROR", 12, 1 }, + { "CL0_PAR_WRQUEUE_ERROR", 11, 1 }, + { "CL10_PAR_RDQUEUE_ERROR", 10, 1 }, + { "CL9_PAR_RDQUEUE_ERROR", 9, 1 }, + { "CL8_PAR_RDQUEUE_ERROR", 8, 1 }, + { "CL7_PAR_RDQUEUE_ERROR", 7, 1 }, + { "CL6_PAR_RDQUEUE_ERROR", 6, 1 }, + { "CL5_PAR_RDQUEUE_ERROR", 5, 1 }, + { "CL4_PAR_RDQUEUE_ERROR", 4, 1 }, + { "CL3_PAR_RDQUEUE_ERROR", 3, 1 }, + { "CL2_PAR_RDQUEUE_ERROR", 2, 1 }, + { "CL1_PAR_RDQUEUE_ERROR", 1, 1 }, + { "CL0_PAR_RDQUEUE_ERROR", 0, 1 }, + { "MA_SGE_PCIE_COHERANCY_CTRL", 0x77f8, 0 }, + { "BONUS_REG", 6, 26 }, + { "COHERANCY_CMD_TYPE", 4, 2 }, + { "COHERANCY_THREAD_NUM", 1, 3 }, + { "COHERANCY_ENABLE", 0, 1 }, + { "MA_ERROR_ENABLE", 0x77fc, 0 }, + { NULL, 0, 0 } +}; + +struct reg_info t4_edc_0_regs[] = { + { "EDC_REF", 0x7900, 0 }, + { "EDC_INST_NUM", 18, 1 }, + { "ENABLE_PERF", 17, 1 }, + { "ECC_BYPASS", 16, 1 }, + { "RefFreq", 0, 16 }, + { "EDC_BIST_CMD", 0x7904, 0 }, + { "START_BIST", 31, 1 }, + { "BIST_CMD_GAP", 8, 8 }, + { "BIST_OPCODE", 0, 2 }, + { "EDC_BIST_CMD_ADDR", 0x7908, 0 }, + { "EDC_BIST_CMD_LEN", 0x790c, 0 }, + { "EDC_BIST_DATA_PATTERN", 0x7910, 0 }, + { "EDC_BIST_USER_WDATA0", 0x7914, 0 }, + { "EDC_BIST_USER_WDATA1", 0x7918, 0 }, + { "EDC_BIST_USER_WDATA2", 0x791c, 0 }, + { "EDC_BIST_NUM_ERR", 0x7920, 0 }, + { "EDC_BIST_ERR_FIRST_ADDR", 0x7924, 0 }, + { "EDC_BIST_STATUS_RDATA", 0x7928, 0 }, + { "EDC_BIST_STATUS_RDATA", 0x792c, 0 }, + { "EDC_BIST_STATUS_RDATA", 0x7930, 0 }, + { "EDC_BIST_STATUS_RDATA", 0x7934, 0 }, + { "EDC_BIST_STATUS_RDATA", 0x7938, 0 }, + { "EDC_BIST_STATUS_RDATA", 0x793c, 0 }, + { "EDC_BIST_STATUS_RDATA", 0x7940, 0 }, + { "EDC_BIST_STATUS_RDATA", 0x7944, 0 }, + { "EDC_BIST_STATUS_RDATA", 0x7948, 0 }, + { "EDC_BIST_STATUS_RDATA", 0x794c, 0 }, + { "EDC_BIST_STATUS_RDATA", 0x7950, 0 }, + { "EDC_BIST_STATUS_RDATA", 0x7954, 0 }, + { "EDC_BIST_STATUS_RDATA", 0x7958, 0 }, + { "EDC_BIST_STATUS_RDATA", 0x795c, 0 }, + { "EDC_BIST_STATUS_RDATA", 0x7960, 0 }, + { "EDC_BIST_STATUS_RDATA", 0x7964, 0 }, + { "EDC_BIST_STATUS_RDATA", 0x7968, 0 }, + { "EDC_BIST_STATUS_RDATA", 0x796c, 0 }, + { "EDC_PAR_ENABLE", 0x7970, 0 }, + { "ECC_UE_PAR_ENABLE", 2, 1 }, + { "ECC_CE_PAR_ENABLE", 1, 1 }, + { "PERR_INT_ENABLE", 0, 1 }, + { "EDC_INT_ENABLE", 0x7974, 0 }, + { "ECC_UE_INT_ENABLE", 2, 1 }, + { "ECC_CE_INT_ENABLE", 1, 1 }, + { "PERR_INT_ENABLE", 0, 1 }, + { "EDC_INT_CAUSE", 0x7978, 0 }, + { "ECC_UE_PAR_CAUSE", 5, 1 }, + { "ECC_CE_PAR_CAUSE", 4, 1 }, + { "PERR_PAR_CAUSE", 3, 1 }, + { "ECC_UE_INT_CAUSE", 2, 1 }, + { "ECC_CE_INT_CAUSE", 1, 1 }, + { "PERR_INT_CAUSE", 0, 1 }, + { "EDC_ECC_STATUS", 0x797c, 0 }, + { "ECC_CECNT", 16, 16 }, + { "ECC_UECNT", 0, 16 }, + { NULL, 0, 0 } +}; + +struct reg_info t4_edc_1_regs[] = { + { "EDC_REF", 0x7980, 0 }, + { "EDC_INST_NUM", 18, 1 }, + { "ENABLE_PERF", 17, 1 }, + { "ECC_BYPASS", 16, 1 }, + { "RefFreq", 0, 16 }, + { "EDC_BIST_CMD", 0x7984, 0 }, + { "START_BIST", 31, 1 }, + { "BIST_CMD_GAP", 8, 8 }, + { "BIST_OPCODE", 0, 2 }, + { "EDC_BIST_CMD_ADDR", 0x7988, 0 }, + { "EDC_BIST_CMD_LEN", 0x798c, 0 }, + { "EDC_BIST_DATA_PATTERN", 0x7990, 0 }, + { "EDC_BIST_USER_WDATA0", 0x7994, 0 }, + { "EDC_BIST_USER_WDATA1", 0x7998, 0 }, + { "EDC_BIST_USER_WDATA2", 0x799c, 0 }, + { "EDC_BIST_NUM_ERR", 0x79a0, 0 }, + { "EDC_BIST_ERR_FIRST_ADDR", 0x79a4, 0 }, + { "EDC_BIST_STATUS_RDATA", 0x79a8, 0 }, + { "EDC_BIST_STATUS_RDATA", 0x79ac, 0 }, + { "EDC_BIST_STATUS_RDATA", 0x79b0, 0 }, + { "EDC_BIST_STATUS_RDATA", 0x79b4, 0 }, + { "EDC_BIST_STATUS_RDATA", 0x79b8, 0 }, + { "EDC_BIST_STATUS_RDATA", 0x79bc, 0 }, + { "EDC_BIST_STATUS_RDATA", 0x79c0, 0 }, + { "EDC_BIST_STATUS_RDATA", 0x79c4, 0 }, + { "EDC_BIST_STATUS_RDATA", 0x79c8, 0 }, + { "EDC_BIST_STATUS_RDATA", 0x79cc, 0 }, + { "EDC_BIST_STATUS_RDATA", 0x79d0, 0 }, + { "EDC_BIST_STATUS_RDATA", 0x79d4, 0 }, + { "EDC_BIST_STATUS_RDATA", 0x79d8, 0 }, + { "EDC_BIST_STATUS_RDATA", 0x79dc, 0 }, + { "EDC_BIST_STATUS_RDATA", 0x79e0, 0 }, + { "EDC_BIST_STATUS_RDATA", 0x79e4, 0 }, + { "EDC_BIST_STATUS_RDATA", 0x79e8, 0 }, + { "EDC_BIST_STATUS_RDATA", 0x79ec, 0 }, + { "EDC_PAR_ENABLE", 0x79f0, 0 }, + { "ECC_UE_PAR_ENABLE", 2, 1 }, + { "ECC_CE_PAR_ENABLE", 1, 1 }, + { "PERR_INT_ENABLE", 0, 1 }, + { "EDC_INT_ENABLE", 0x79f4, 0 }, + { "ECC_UE_INT_ENABLE", 2, 1 }, + { "ECC_CE_INT_ENABLE", 1, 1 }, + { "PERR_INT_ENABLE", 0, 1 }, + { "EDC_INT_CAUSE", 0x79f8, 0 }, + { "ECC_UE_PAR_CAUSE", 5, 1 }, + { "ECC_CE_PAR_CAUSE", 4, 1 }, + { "PERR_PAR_CAUSE", 3, 1 }, + { "ECC_UE_INT_CAUSE", 2, 1 }, + { "ECC_CE_INT_CAUSE", 1, 1 }, + { "PERR_INT_CAUSE", 0, 1 }, + { "EDC_ECC_STATUS", 0x79fc, 0 }, + { "ECC_CECNT", 16, 16 }, + { "ECC_UECNT", 0, 16 }, + { NULL, 0, 0 } +}; + +struct reg_info t4_hma_regs[] = { + { NULL, 0, 0 } +}; + +struct reg_info t4_cim_regs[] = { + { "CIM_BOOT_CFG", 0x7b00, 0 }, + { "BootAddr", 8, 24 }, + { "uPGen", 2, 6 }, + { "BootSdram", 1, 1 }, + { "uPCRst", 0, 1 }, + { "CIM_BOOT_LEN", 0x7bf0, 0 }, + { "BootLen", 4, 28 }, + { "CIM_FLASH_BASE_ADDR", 0x7b04, 0 }, + { "FlashBaseAddr", 6, 18 }, + { "CIM_FLASH_ADDR_SIZE", 0x7b08, 0 }, + { "FlashAddrSize", 4, 20 }, + { "CIM_EEPROM_BASE_ADDR", 0x7b0c, 0 }, + { "EEPROMBaseAddr", 6, 18 }, + { "CIM_EEPROM_ADDR_SIZE", 0x7b10, 0 }, + { "EEPROMAddrSize", 4, 20 }, + { "CIM_SDRAM_BASE_ADDR", 0x7b14, 0 }, + { "SdramBaseAddr", 6, 26 }, + { "CIM_SDRAM_ADDR_SIZE", 0x7b18, 0 }, + { "SdramAddrSize", 4, 28 }, + { "CIM_EXTMEM2_BASE_ADDR", 0x7b1c, 0 }, + { "ExtMem2BaseAddr", 6, 26 }, + { "CIM_EXTMEM2_ADDR_SIZE", 0x7b20, 0 }, + { "ExtMem2AddrSize", 4, 28 }, + { "CIM_UP_SPARE_INT", 0x7b24, 0 }, + { "TDebugInt", 4, 1 }, + { "BootVecSel", 3, 1 }, + { "uPSpareInt", 0, 3 }, + { "CIM_HOST_INT_ENABLE", 0x7b28, 0 }, + { "TieQOutParErrIntEn", 20, 1 }, + { "TieQInParErrIntEn", 19, 1 }, + { "MBHostParErr", 18, 1 }, + { "MBuPParErr", 17, 1 }, + { "IBQTP0ParErr", 16, 1 }, + { "IBQTP1ParErr", 15, 1 }, + { "IBQULPParErr", 14, 1 }, + { "IBQSGELOParErr", 13, 1 }, + { "IBQSGEHIParErr", 12, 1 }, + { "IBQNCSIParErr", 11, 1 }, + { "OBQULP0ParErr", 10, 1 }, + { "OBQULP1ParErr", 9, 1 }, + { "OBQULP2ParErr", 8, 1 }, + { "OBQULP3ParErr", 7, 1 }, + { "OBQSGEParErr", 6, 1 }, + { "OBQNCSIParErr", 5, 1 }, + { "Timer1IntEn", 3, 1 }, + { "Timer0IntEn", 2, 1 }, + { "PrefDropIntEn", 1, 1 }, + { "CIM_HOST_INT_CAUSE", 0x7b2c, 0 }, + { "TieQOutParErrInt", 20, 1 }, + { "TieQInParErrInt", 19, 1 }, + { "MBHostParErr", 18, 1 }, + { "MBuPParErr", 17, 1 }, + { "IBQTP0ParErr", 16, 1 }, + { "IBQTP1ParErr", 15, 1 }, + { "IBQULPParErr", 14, 1 }, + { "IBQSGELOParErr", 13, 1 }, + { "IBQSGEHIParErr", 12, 1 }, + { "IBQNCSIParErr", 11, 1 }, + { "OBQULP0ParErr", 10, 1 }, + { "OBQULP1ParErr", 9, 1 }, + { "OBQULP2ParErr", 8, 1 }, + { "OBQULP3ParErr", 7, 1 }, + { "OBQSGEParErr", 6, 1 }, + { "OBQNCSIParErr", 5, 1 }, + { "Timer1Int", 3, 1 }, + { "Timer0Int", 2, 1 }, + { "PrefDropInt", 1, 1 }, + { "uPAccNonZero", 0, 1 }, + { "CIM_HOST_UPACC_INT_ENABLE", 0x7b30, 0 }, + { "EEPROMWRIntEn", 30, 1 }, + { "TimeOutMAIntEn", 29, 1 }, + { "TimeOutIntEn", 28, 1 }, + { "RspOvrLookupIntEn", 27, 1 }, + { "ReqOvrLookupIntEn", 26, 1 }, + { "BlkWrPlIntEn", 25, 1 }, + { "BlkRdPlIntEn", 24, 1 }, + { "SglWrPlIntEn", 23, 1 }, + { "SglRdPlIntEn", 22, 1 }, + { "BlkWrCtlIntEn", 21, 1 }, + { "BlkRdCtlIntEn", 20, 1 }, + { "SglWrCtlIntEn", 19, 1 }, + { "SglRdCtlIntEn", 18, 1 }, + { "BlkWrEEPROMIntEn", 17, 1 }, + { "BlkRdEEPROMIntEn", 16, 1 }, + { "SglWrEEPROMIntEn", 15, 1 }, + { "SglRdEEPROMIntEn", 14, 1 }, + { "BlkWrFlashIntEn", 13, 1 }, + { "BlkRdFlashIntEn", 12, 1 }, + { "SglWrFlashIntEn", 11, 1 }, + { "SglRdFlashIntEn", 10, 1 }, + { "BlkWrBootIntEn", 9, 1 }, + { "BlkRdBootIntEn", 8, 1 }, + { "SglWrBootIntEn", 7, 1 }, + { "SglRdBootIntEn", 6, 1 }, + { "IllWrBEIntEn", 5, 1 }, + { "IllRdBEIntEn", 4, 1 }, + { "IllRdIntEn", 3, 1 }, + { "IllWrIntEn", 2, 1 }, + { "IllTransIntEn", 1, 1 }, + { "RsvdSpaceIntEn", 0, 1 }, + { "CIM_HOST_UPACC_INT_CAUSE", 0x7b34, 0 }, + { "EEPROMWRInt", 30, 1 }, + { "TimeOutMAInt", 29, 1 }, + { "TimeOutInt", 28, 1 }, + { "RspOvrLookupInt", 27, 1 }, + { "ReqOvrLookupInt", 26, 1 }, + { "BlkWrPlInt", 25, 1 }, + { "BlkRdPlInt", 24, 1 }, + { "SglWrPlInt", 23, 1 }, + { "SglRdPlInt", 22, 1 }, + { "BlkWrCtlInt", 21, 1 }, + { "BlkRdCtlInt", 20, 1 }, + { "SglWrCtlInt", 19, 1 }, + { "SglRdCtlInt", 18, 1 }, + { "BlkWrEEPROMInt", 17, 1 }, + { "BlkRdEEPROMInt", 16, 1 }, + { "SglWrEEPROMInt", 15, 1 }, + { "SglRdEEPROMInt", 14, 1 }, + { "BlkWrFlashInt", 13, 1 }, + { "BlkRdFlashInt", 12, 1 }, + { "SglWrFlashInt", 11, 1 }, + { "SglRdFlashInt", 10, 1 }, + { "BlkWrBootInt", 9, 1 }, + { "BlkRdBootInt", 8, 1 }, + { "SglWrBootInt", 7, 1 }, + { "SglRdBootInt", 6, 1 }, + { "IllWrBEInt", 5, 1 }, + { "IllRdBEInt", 4, 1 }, + { "IllRdInt", 3, 1 }, + { "IllWrInt", 2, 1 }, + { "IllTransInt", 1, 1 }, + { "RsvdSpaceInt", 0, 1 }, + { "CIM_UP_INT_ENABLE", 0x7b38, 0 }, + { "TieQOutParErrIntEn", 20, 1 }, + { "TieQInParErrIntEn", 19, 1 }, + { "MBHostParErr", 18, 1 }, + { "MBuPParErr", 17, 1 }, + { "IBQTP0ParErr", 16, 1 }, + { "IBQTP1ParErr", 15, 1 }, + { "IBQULPParErr", 14, 1 }, + { "IBQSGELOParErr", 13, 1 }, + { "IBQSGEHIParErr", 12, 1 }, + { "IBQNCSIParErr", 11, 1 }, + { "OBQULP0ParErr", 10, 1 }, + { "OBQULP1ParErr", 9, 1 }, + { "OBQULP2ParErr", 8, 1 }, + { "OBQULP3ParErr", 7, 1 }, + { "OBQSGEParErr", 6, 1 }, + { "OBQNCSIParErr", 5, 1 }, + { "MstPlIntEn", 4, 1 }, + { "Timer1IntEn", 3, 1 }, + { "Timer0IntEn", 2, 1 }, + { "PrefDropIntEn", 1, 1 }, + { "CIM_UP_INT_CAUSE", 0x7b3c, 0 }, + { "TieQOutParErrInt", 20, 1 }, + { "TieQInParErrInt", 19, 1 }, + { "MBHostParErr", 18, 1 }, + { "MBuPParErr", 17, 1 }, + { "IBQTP0ParErr", 16, 1 }, + { "IBQTP1ParErr", 15, 1 }, + { "IBQULPParErr", 14, 1 }, + { "IBQSGELOParErr", 13, 1 }, + { "IBQSGEHIParErr", 12, 1 }, + { "IBQNCSIParErr", 11, 1 }, + { "OBQULP0ParErr", 10, 1 }, + { "OBQULP1ParErr", 9, 1 }, + { "OBQULP2ParErr", 8, 1 }, + { "OBQULP3ParErr", 7, 1 }, + { "OBQSGEParErr", 6, 1 }, + { "OBQNCSIParErr", 5, 1 }, + { "MstPlInt", 4, 1 }, + { "Timer1Int", 3, 1 }, + { "Timer0Int", 2, 1 }, + { "PrefDropInt", 1, 1 }, + { "uPAccNonZero", 0, 1 }, + { "CIM_UP_ACC_INT_ENABLE", 0x7b40, 0 }, + { "EEPROMWRIntEn", 30, 1 }, + { "TimeOutMAIntEn", 29, 1 }, + { "TimeOutIntEn", 28, 1 }, + { "RspOvrLookupIntEn", 27, 1 }, + { "ReqOvrLookupIntEn", 26, 1 }, + { "BlkWrPlIntEn", 25, 1 }, + { "BlkRdPlIntEn", 24, 1 }, + { "SglWrPlIntEn", 23, 1 }, + { "SglRdPlIntEn", 22, 1 }, + { "BlkWrCtlIntEn", 21, 1 }, + { "BlkRdCtlIntEn", 20, 1 }, + { "SglWrCtlIntEn", 19, 1 }, + { "SglRdCtlIntEn", 18, 1 }, + { "BlkWrEEPROMIntEn", 17, 1 }, + { "BlkRdEEPROMIntEn", 16, 1 }, + { "SglWrEEPROMIntEn", 15, 1 }, + { "SglRdEEPROMIntEn", 14, 1 }, + { "BlkWrFlashIntEn", 13, 1 }, + { "BlkRdFlashIntEn", 12, 1 }, + { "SglWrFlashIntEn", 11, 1 }, + { "SglRdFlashIntEn", 10, 1 }, + { "BlkWrBootIntEn", 9, 1 }, + { "BlkRdBootIntEn", 8, 1 }, + { "SglWrBootIntEn", 7, 1 }, + { "SglRdBootIntEn", 6, 1 }, + { "IllWrBEIntEn", 5, 1 }, + { "IllRdBEIntEn", 4, 1 }, + { "IllRdIntEn", 3, 1 }, + { "IllWrIntEn", 2, 1 }, + { "IllTransIntEn", 1, 1 }, + { "RsvdSpaceIntEn", 0, 1 }, + { "CIM_UP_ACC_INT_CAUSE", 0x7b44, 0 }, + { "EEPROMWRInt", 30, 1 }, + { "TimeOutMAInt", 29, 1 }, + { "TimeOutInt", 28, 1 }, + { "RspOvrLookupInt", 27, 1 }, + { "ReqOvrLookupInt", 26, 1 }, + { "BlkWrPlInt", 25, 1 }, + { "BlkRdPlInt", 24, 1 }, + { "SglWrPlInt", 23, 1 }, + { "SglRdPlInt", 22, 1 }, + { "BlkWrCtlInt", 21, 1 }, + { "BlkRdCtlInt", 20, 1 }, + { "SglWrCtlInt", 19, 1 }, + { "SglRdCtlInt", 18, 1 }, + { "BlkWrEEPROMInt", 17, 1 }, + { "BlkRdEEPROMInt", 16, 1 }, + { "SglWrEEPROMInt", 15, 1 }, + { "SglRdEEPROMInt", 14, 1 }, + { "BlkWrFlashInt", 13, 1 }, + { "BlkRdFlashInt", 12, 1 }, + { "SglWrFlashInt", 11, 1 }, + { "SglRdFlashInt", 10, 1 }, + { "BlkWrBootInt", 9, 1 }, + { "BlkRdBootInt", 8, 1 }, + { "SglWrBootInt", 7, 1 }, + { "SglRdBootInt", 6, 1 }, + { "IllWrBEInt", 5, 1 }, + { "IllRdBEInt", 4, 1 }, + { "IllRdInt", 3, 1 }, + { "IllWrInt", 2, 1 }, + { "IllTransInt", 1, 1 }, + { "RsvdSpaceInt", 0, 1 }, + { "CIM_QUEUE_CONFIG_REF", 0x7b48, 0 }, + { "OBQSelect", 4, 1 }, + { "IBQSelect", 3, 1 }, + { "QueNumSelect", 0, 3 }, + { "CIM_QUEUE_CONFIG_CTRL", 0x7b4c, 0 }, + { "QueSize", 24, 6 }, + { "QueBase", 16, 6 }, + { "QueDbg8BEn", 9, 1 }, + { "QueFullThrsh", 0, 9 }, + { "CIM_HOST_ACC_CTRL", 0x7b50, 0 }, + { "HostBusy", 17, 1 }, + { "HostWrite", 16, 1 }, + { "HostAddr", 0, 16 }, + { "CIM_HOST_ACC_DATA", 0x7b54, 0 }, + { "CIM_CDEBUGDATA", 0x7b58, 0 }, + { "CDebugDataH", 16, 16 }, + { "CDebugDataL", 0, 16 }, + { "CIM_IBQ_DBG_CFG", 0x7b60, 0 }, + { "IbqDbgAddr", 16, 12 }, + { "IbqDbgWr", 2, 1 }, + { "IbqDbgBusy", 1, 1 }, + { "IbqDbgEn", 0, 1 }, + { "CIM_OBQ_DBG_CFG", 0x7b64, 0 }, + { "ObqDbgAddr", 16, 12 }, + { "ObqDbgWr", 2, 1 }, + { "ObqDbgBusy", 1, 1 }, + { "ObqDbgEn", 0, 1 }, + { "CIM_IBQ_DBG_DATA", 0x7b68, 0 }, + { "CIM_OBQ_DBG_DATA", 0x7b6c, 0 }, + { "CIM_DEBUGCFG", 0x7b70, 0 }, + { "POLADbgRdPtr", 23, 9 }, + { "PILADbgRdPtr", 14, 9 }, + { "LAMaskTrig", 13, 1 }, + { "LADbgEn", 12, 1 }, + { "LAFillOnce", 11, 1 }, + { "LAMaskStop", 10, 1 }, + { "DebugSelH", 5, 5 }, + { "DebugSelL", 0, 5 }, + { "CIM_DEBUGSTS", 0x7b74, 0 }, + { "LAReset", 31, 1 }, + { "POLADbgWrPtr", 16, 9 }, + { "PILADbgWrPtr", 0, 9 }, + { "CIM_PO_LA_DEBUGDATA", 0x7b78, 0 }, + { "CIM_PI_LA_DEBUGDATA", 0x7b7c, 0 }, + { "CIM_PO_LA_MADEBUGDATA", 0x7b80, 0 }, + { "CIM_PI_LA_MADEBUGDATA", 0x7b84, 0 }, + { "CIM_PO_LA_PIFSMDEBUGDATA", 0x7b8c, 0 }, + { "CIM_MEM_ZONE0_VA", 0x7b90, 0 }, + { "MEM_ZONE_VA", 4, 28 }, + { "CIM_MEM_ZONE0_BA", 0x7b94, 0 }, + { "MEM_ZONE_BA", 6, 26 }, + { "PBT_enable", 5, 1 }, + { "ZONE_DST", 0, 2 }, + { "CIM_MEM_ZONE0_LEN", 0x7b98, 0 }, + { "MEM_ZONE_LEN", 4, 28 }, + { "CIM_MEM_ZONE1_VA", 0x7b9c, 0 }, + { "MEM_ZONE_VA", 4, 28 }, + { "CIM_MEM_ZONE1_BA", 0x7ba0, 0 }, + { "MEM_ZONE_BA", 6, 26 }, + { "PBT_enable", 5, 1 }, + { "ZONE_DST", 0, 2 }, + { "CIM_MEM_ZONE1_LEN", 0x7ba4, 0 }, + { "MEM_ZONE_LEN", 4, 28 }, + { "CIM_MEM_ZONE2_VA", 0x7ba8, 0 }, + { "MEM_ZONE_VA", 4, 28 }, + { "CIM_MEM_ZONE2_BA", 0x7bac, 0 }, + { "MEM_ZONE_BA", 6, 26 }, + { "PBT_enable", 5, 1 }, + { "ZONE_DST", 0, 2 }, + { "CIM_MEM_ZONE2_LEN", 0x7bb0, 0 }, + { "MEM_ZONE_LEN", 4, 28 }, + { "CIM_MEM_ZONE3_VA", 0x7bb4, 0 }, + { "MEM_ZONE_VA", 4, 28 }, + { "CIM_MEM_ZONE3_BA", 0x7bb8, 0 }, + { "MEM_ZONE_BA", 6, 26 }, + { "PBT_enable", 5, 1 }, + { "ZONE_DST", 0, 2 }, + { "CIM_MEM_ZONE3_LEN", 0x7bbc, 0 }, + { "MEM_ZONE_LEN", 4, 28 }, + { "CIM_MEM_ZONE4_VA", 0x7bc0, 0 }, + { "MEM_ZONE_VA", 4, 28 }, + { "CIM_MEM_ZONE4_BA", 0x7bc4, 0 }, + { "MEM_ZONE_BA", 6, 26 }, + { "PBT_enable", 5, 1 }, + { "ZONE_DST", 0, 2 }, + { "CIM_MEM_ZONE4_LEN", 0x7bc8, 0 }, + { "MEM_ZONE_LEN", 4, 28 }, + { "CIM_MEM_ZONE5_VA", 0x7bcc, 0 }, + { "MEM_ZONE_VA", 4, 28 }, + { "CIM_MEM_ZONE5_BA", 0x7bd0, 0 }, + { "MEM_ZONE_BA", 6, 26 }, + { "PBT_enable", 5, 1 }, + { "ZONE_DST", 0, 2 }, + { "CIM_MEM_ZONE5_LEN", 0x7bd4, 0 }, + { "MEM_ZONE_LEN", 4, 28 }, + { "CIM_MEM_ZONE6_VA", 0x7bd8, 0 }, + { "MEM_ZONE_VA", 4, 28 }, + { "CIM_MEM_ZONE6_BA", 0x7bdc, 0 }, + { "MEM_ZONE_BA", 6, 26 }, + { "PBT_enable", 5, 1 }, + { "ZONE_DST", 0, 2 }, + { "CIM_MEM_ZONE6_LEN", 0x7be0, 0 }, + { "MEM_ZONE_LEN", 4, 28 }, + { "CIM_MEM_ZONE7_VA", 0x7be4, 0 }, + { "MEM_ZONE_VA", 4, 28 }, + { "CIM_MEM_ZONE7_BA", 0x7be8, 0 }, + { "MEM_ZONE_BA", 6, 26 }, + { "PBT_enable", 5, 1 }, + { "ZONE_DST", 0, 2 }, + { "CIM_MEM_ZONE7_LEN", 0x7bec, 0 }, + { "MEM_ZONE_LEN", 4, 28 }, + { "CIM_GLB_TIMER_CTL", 0x7bf4, 0 }, + { "Timer1En", 4, 1 }, + { "Timer0En", 3, 1 }, + { "TimerEn", 1, 1 }, + { "CIM_GLB_TIMER", 0x7bf8, 0 }, + { "CIM_GLB_TIMER_TICK", 0x7bfc, 0 }, + { "CIM_TIMER0", 0x7c00, 0 }, + { "CIM_TIMER1", 0x7c04, 0 }, + { "CIM_DEBUG_ADDR_TIMEOUT", 0x7c08, 0 }, + { "DAddrTimeOut", 2, 30 }, + { "CIM_DEBUG_ADDR_ILLEGAL", 0x7c0c, 0 }, + { "DAddrIllegal", 2, 30 }, + { "CIM_DEBUG_PIF_CAUSE_MASK", 0x7c10, 0 }, + { "CIM_DEBUG_PIF_UPACC_CAUSE_MASK", 0x7c14, 0 }, + { "CIM_DEBUG_UP_CAUSE_MASK", 0x7c18, 0 }, + { "CIM_DEBUG_UP_UPACC_CAUSE_MASK", 0x7c1c, 0 }, + { "CIM_PERR_INJECT", 0x7c20, 0 }, + { "MemSel", 1, 5 }, + { "InjectDataErr", 0, 1 }, + { "CIM_PERR_ENABLE", 0x7c24, 0 }, + { "CIM_EEPROM_BUSY_BIT", 0x7c28, 0 }, + { "CIM_MA_TIMER_EN", 0x7c2c, 0 }, + { "CIM_UP_PO_SINGLE_OUTSTANDING", 0x7c30, 0 }, + { "CIM_CIM_DEBUG_SPARE", 0x7c34, 0 }, + { "CIM_UP_OPERATION_FREQ", 0x7c38, 0 }, + { "CIM_PF_MAILBOX_DATA", 0x1e240, 0 }, + { "CIM_PF_MAILBOX_DATA", 0x1e244, 0 }, + { "CIM_PF_MAILBOX_DATA", 0x1e248, 0 }, + { "CIM_PF_MAILBOX_DATA", 0x1e24c, 0 }, + { "CIM_PF_MAILBOX_DATA", 0x1e250, 0 }, + { "CIM_PF_MAILBOX_DATA", 0x1e254, 0 }, + { "CIM_PF_MAILBOX_DATA", 0x1e258, 0 }, + { "CIM_PF_MAILBOX_DATA", 0x1e25c, 0 }, + { "CIM_PF_MAILBOX_DATA", 0x1e260, 0 }, + { "CIM_PF_MAILBOX_DATA", 0x1e264, 0 }, + { "CIM_PF_MAILBOX_DATA", 0x1e268, 0 }, + { "CIM_PF_MAILBOX_DATA", 0x1e26c, 0 }, + { "CIM_PF_MAILBOX_DATA", 0x1e270, 0 }, + { "CIM_PF_MAILBOX_DATA", 0x1e274, 0 }, + { "CIM_PF_MAILBOX_DATA", 0x1e278, 0 }, + { "CIM_PF_MAILBOX_DATA", 0x1e27c, 0 }, + { "CIM_PF_MAILBOX_CTRL", 0x1e280, 0 }, + { "MBGeneric", 4, 28 }, + { "MBMsgValid", 3, 1 }, + { "MBIntReq", 2, 1 }, + { "MBOwner", 0, 2 }, + { "CIM_PF_MAILBOX_ACC_STATUS", 0x1e284, 0 }, + { "MBWrBusy", 31, 1 }, + { "CIM_PF_HOST_INT_ENABLE", 0x1e288, 0 }, + { "MBMsgRdyIntEn", 19, 1 }, + { "CIM_PF_HOST_INT_CAUSE", 0x1e28c, 0 }, + { "MBMsgRdyInt", 19, 1 }, + { "CIM_PF_MAILBOX_DATA", 0x1e640, 0 }, + { "CIM_PF_MAILBOX_DATA", 0x1e644, 0 }, + { "CIM_PF_MAILBOX_DATA", 0x1e648, 0 }, + { "CIM_PF_MAILBOX_DATA", 0x1e64c, 0 }, + { "CIM_PF_MAILBOX_DATA", 0x1e650, 0 }, + { "CIM_PF_MAILBOX_DATA", 0x1e654, 0 }, + { "CIM_PF_MAILBOX_DATA", 0x1e658, 0 }, + { "CIM_PF_MAILBOX_DATA", 0x1e65c, 0 }, + { "CIM_PF_MAILBOX_DATA", 0x1e660, 0 }, + { "CIM_PF_MAILBOX_DATA", 0x1e664, 0 }, + { "CIM_PF_MAILBOX_DATA", 0x1e668, 0 }, + { "CIM_PF_MAILBOX_DATA", 0x1e66c, 0 }, + { "CIM_PF_MAILBOX_DATA", 0x1e670, 0 }, + { "CIM_PF_MAILBOX_DATA", 0x1e674, 0 }, + { "CIM_PF_MAILBOX_DATA", 0x1e678, 0 }, + { "CIM_PF_MAILBOX_DATA", 0x1e67c, 0 }, + { "CIM_PF_MAILBOX_CTRL", 0x1e680, 0 }, + { "MBGeneric", 4, 28 }, + { "MBMsgValid", 3, 1 }, + { "MBIntReq", 2, 1 }, + { "MBOwner", 0, 2 }, + { "CIM_PF_MAILBOX_ACC_STATUS", 0x1e684, 0 }, + { "MBWrBusy", 31, 1 }, + { "CIM_PF_HOST_INT_ENABLE", 0x1e688, 0 }, + { "MBMsgRdyIntEn", 19, 1 }, + { "CIM_PF_HOST_INT_CAUSE", 0x1e68c, 0 }, + { "MBMsgRdyInt", 19, 1 }, + { "CIM_PF_MAILBOX_DATA", 0x1ea40, 0 }, + { "CIM_PF_MAILBOX_DATA", 0x1ea44, 0 }, + { "CIM_PF_MAILBOX_DATA", 0x1ea48, 0 }, + { "CIM_PF_MAILBOX_DATA", 0x1ea4c, 0 }, + { "CIM_PF_MAILBOX_DATA", 0x1ea50, 0 }, + { "CIM_PF_MAILBOX_DATA", 0x1ea54, 0 }, + { "CIM_PF_MAILBOX_DATA", 0x1ea58, 0 }, + { "CIM_PF_MAILBOX_DATA", 0x1ea5c, 0 }, + { "CIM_PF_MAILBOX_DATA", 0x1ea60, 0 }, + { "CIM_PF_MAILBOX_DATA", 0x1ea64, 0 }, + { "CIM_PF_MAILBOX_DATA", 0x1ea68, 0 }, + { "CIM_PF_MAILBOX_DATA", 0x1ea6c, 0 }, + { "CIM_PF_MAILBOX_DATA", 0x1ea70, 0 }, + { "CIM_PF_MAILBOX_DATA", 0x1ea74, 0 }, + { "CIM_PF_MAILBOX_DATA", 0x1ea78, 0 }, + { "CIM_PF_MAILBOX_DATA", 0x1ea7c, 0 }, + { "CIM_PF_MAILBOX_CTRL", 0x1ea80, 0 }, + { "MBGeneric", 4, 28 }, + { "MBMsgValid", 3, 1 }, + { "MBIntReq", 2, 1 }, + { "MBOwner", 0, 2 }, + { "CIM_PF_MAILBOX_ACC_STATUS", 0x1ea84, 0 }, + { "MBWrBusy", 31, 1 }, + { "CIM_PF_HOST_INT_ENABLE", 0x1ea88, 0 }, + { "MBMsgRdyIntEn", 19, 1 }, + { "CIM_PF_HOST_INT_CAUSE", 0x1ea8c, 0 }, + { "MBMsgRdyInt", 19, 1 }, + { "CIM_PF_MAILBOX_DATA", 0x1ee40, 0 }, + { "CIM_PF_MAILBOX_DATA", 0x1ee44, 0 }, + { "CIM_PF_MAILBOX_DATA", 0x1ee48, 0 }, + { "CIM_PF_MAILBOX_DATA", 0x1ee4c, 0 }, + { "CIM_PF_MAILBOX_DATA", 0x1ee50, 0 }, + { "CIM_PF_MAILBOX_DATA", 0x1ee54, 0 }, + { "CIM_PF_MAILBOX_DATA", 0x1ee58, 0 }, + { "CIM_PF_MAILBOX_DATA", 0x1ee5c, 0 }, + { "CIM_PF_MAILBOX_DATA", 0x1ee60, 0 }, + { "CIM_PF_MAILBOX_DATA", 0x1ee64, 0 }, + { "CIM_PF_MAILBOX_DATA", 0x1ee68, 0 }, + { "CIM_PF_MAILBOX_DATA", 0x1ee6c, 0 }, + { "CIM_PF_MAILBOX_DATA", 0x1ee70, 0 }, + { "CIM_PF_MAILBOX_DATA", 0x1ee74, 0 }, + { "CIM_PF_MAILBOX_DATA", 0x1ee78, 0 }, + { "CIM_PF_MAILBOX_DATA", 0x1ee7c, 0 }, + { "CIM_PF_MAILBOX_CTRL", 0x1ee80, 0 }, + { "MBGeneric", 4, 28 }, + { "MBMsgValid", 3, 1 }, + { "MBIntReq", 2, 1 }, + { "MBOwner", 0, 2 }, + { "CIM_PF_MAILBOX_ACC_STATUS", 0x1ee84, 0 }, + { "MBWrBusy", 31, 1 }, + { "CIM_PF_HOST_INT_ENABLE", 0x1ee88, 0 }, + { "MBMsgRdyIntEn", 19, 1 }, + { "CIM_PF_HOST_INT_CAUSE", 0x1ee8c, 0 }, + { "MBMsgRdyInt", 19, 1 }, + { "CIM_PF_MAILBOX_DATA", 0x1f240, 0 }, + { "CIM_PF_MAILBOX_DATA", 0x1f244, 0 }, + { "CIM_PF_MAILBOX_DATA", 0x1f248, 0 }, + { "CIM_PF_MAILBOX_DATA", 0x1f24c, 0 }, + { "CIM_PF_MAILBOX_DATA", 0x1f250, 0 }, + { "CIM_PF_MAILBOX_DATA", 0x1f254, 0 }, + { "CIM_PF_MAILBOX_DATA", 0x1f258, 0 }, + { "CIM_PF_MAILBOX_DATA", 0x1f25c, 0 }, + { "CIM_PF_MAILBOX_DATA", 0x1f260, 0 }, + { "CIM_PF_MAILBOX_DATA", 0x1f264, 0 }, + { "CIM_PF_MAILBOX_DATA", 0x1f268, 0 }, + { "CIM_PF_MAILBOX_DATA", 0x1f26c, 0 }, + { "CIM_PF_MAILBOX_DATA", 0x1f270, 0 }, + { "CIM_PF_MAILBOX_DATA", 0x1f274, 0 }, + { "CIM_PF_MAILBOX_DATA", 0x1f278, 0 }, + { "CIM_PF_MAILBOX_DATA", 0x1f27c, 0 }, + { "CIM_PF_MAILBOX_CTRL", 0x1f280, 0 }, + { "MBGeneric", 4, 28 }, + { "MBMsgValid", 3, 1 }, + { "MBIntReq", 2, 1 }, + { "MBOwner", 0, 2 }, + { "CIM_PF_MAILBOX_ACC_STATUS", 0x1f284, 0 }, + { "MBWrBusy", 31, 1 }, + { "CIM_PF_HOST_INT_ENABLE", 0x1f288, 0 }, + { "MBMsgRdyIntEn", 19, 1 }, + { "CIM_PF_HOST_INT_CAUSE", 0x1f28c, 0 }, + { "MBMsgRdyInt", 19, 1 }, + { "CIM_PF_MAILBOX_DATA", 0x1f640, 0 }, + { "CIM_PF_MAILBOX_DATA", 0x1f644, 0 }, + { "CIM_PF_MAILBOX_DATA", 0x1f648, 0 }, + { "CIM_PF_MAILBOX_DATA", 0x1f64c, 0 }, + { "CIM_PF_MAILBOX_DATA", 0x1f650, 0 }, + { "CIM_PF_MAILBOX_DATA", 0x1f654, 0 }, + { "CIM_PF_MAILBOX_DATA", 0x1f658, 0 }, + { "CIM_PF_MAILBOX_DATA", 0x1f65c, 0 }, + { "CIM_PF_MAILBOX_DATA", 0x1f660, 0 }, + { "CIM_PF_MAILBOX_DATA", 0x1f664, 0 }, + { "CIM_PF_MAILBOX_DATA", 0x1f668, 0 }, + { "CIM_PF_MAILBOX_DATA", 0x1f66c, 0 }, + { "CIM_PF_MAILBOX_DATA", 0x1f670, 0 }, + { "CIM_PF_MAILBOX_DATA", 0x1f674, 0 }, + { "CIM_PF_MAILBOX_DATA", 0x1f678, 0 }, + { "CIM_PF_MAILBOX_DATA", 0x1f67c, 0 }, + { "CIM_PF_MAILBOX_CTRL", 0x1f680, 0 }, + { "MBGeneric", 4, 28 }, + { "MBMsgValid", 3, 1 }, + { "MBIntReq", 2, 1 }, + { "MBOwner", 0, 2 }, + { "CIM_PF_MAILBOX_ACC_STATUS", 0x1f684, 0 }, + { "MBWrBusy", 31, 1 }, + { "CIM_PF_HOST_INT_ENABLE", 0x1f688, 0 }, + { "MBMsgRdyIntEn", 19, 1 }, + { "CIM_PF_HOST_INT_CAUSE", 0x1f68c, 0 }, + { "MBMsgRdyInt", 19, 1 }, + { "CIM_PF_MAILBOX_DATA", 0x1fa40, 0 }, + { "CIM_PF_MAILBOX_DATA", 0x1fa44, 0 }, + { "CIM_PF_MAILBOX_DATA", 0x1fa48, 0 }, + { "CIM_PF_MAILBOX_DATA", 0x1fa4c, 0 }, + { "CIM_PF_MAILBOX_DATA", 0x1fa50, 0 }, + { "CIM_PF_MAILBOX_DATA", 0x1fa54, 0 }, + { "CIM_PF_MAILBOX_DATA", 0x1fa58, 0 }, + { "CIM_PF_MAILBOX_DATA", 0x1fa5c, 0 }, + { "CIM_PF_MAILBOX_DATA", 0x1fa60, 0 }, + { "CIM_PF_MAILBOX_DATA", 0x1fa64, 0 }, + { "CIM_PF_MAILBOX_DATA", 0x1fa68, 0 }, + { "CIM_PF_MAILBOX_DATA", 0x1fa6c, 0 }, + { "CIM_PF_MAILBOX_DATA", 0x1fa70, 0 }, + { "CIM_PF_MAILBOX_DATA", 0x1fa74, 0 }, + { "CIM_PF_MAILBOX_DATA", 0x1fa78, 0 }, + { "CIM_PF_MAILBOX_DATA", 0x1fa7c, 0 }, + { "CIM_PF_MAILBOX_CTRL", 0x1fa80, 0 }, + { "MBGeneric", 4, 28 }, + { "MBMsgValid", 3, 1 }, + { "MBIntReq", 2, 1 }, + { "MBOwner", 0, 2 }, + { "CIM_PF_MAILBOX_ACC_STATUS", 0x1fa84, 0 }, + { "MBWrBusy", 31, 1 }, + { "CIM_PF_HOST_INT_ENABLE", 0x1fa88, 0 }, + { "MBMsgRdyIntEn", 19, 1 }, + { "CIM_PF_HOST_INT_CAUSE", 0x1fa8c, 0 }, + { "MBMsgRdyInt", 19, 1 }, + { "CIM_PF_MAILBOX_DATA", 0x1fe40, 0 }, + { "CIM_PF_MAILBOX_DATA", 0x1fe44, 0 }, + { "CIM_PF_MAILBOX_DATA", 0x1fe48, 0 }, + { "CIM_PF_MAILBOX_DATA", 0x1fe4c, 0 }, + { "CIM_PF_MAILBOX_DATA", 0x1fe50, 0 }, + { "CIM_PF_MAILBOX_DATA", 0x1fe54, 0 }, + { "CIM_PF_MAILBOX_DATA", 0x1fe58, 0 }, + { "CIM_PF_MAILBOX_DATA", 0x1fe5c, 0 }, + { "CIM_PF_MAILBOX_DATA", 0x1fe60, 0 }, + { "CIM_PF_MAILBOX_DATA", 0x1fe64, 0 }, + { "CIM_PF_MAILBOX_DATA", 0x1fe68, 0 }, + { "CIM_PF_MAILBOX_DATA", 0x1fe6c, 0 }, + { "CIM_PF_MAILBOX_DATA", 0x1fe70, 0 }, + { "CIM_PF_MAILBOX_DATA", 0x1fe74, 0 }, + { "CIM_PF_MAILBOX_DATA", 0x1fe78, 0 }, + { "CIM_PF_MAILBOX_DATA", 0x1fe7c, 0 }, + { "CIM_PF_MAILBOX_CTRL", 0x1fe80, 0 }, + { "MBGeneric", 4, 28 }, + { "MBMsgValid", 3, 1 }, + { "MBIntReq", 2, 1 }, + { "MBOwner", 0, 2 }, + { "CIM_PF_MAILBOX_ACC_STATUS", 0x1fe84, 0 }, + { "MBWrBusy", 31, 1 }, + { "CIM_PF_HOST_INT_ENABLE", 0x1fe88, 0 }, + { "MBMsgRdyIntEn", 19, 1 }, + { "CIM_PF_HOST_INT_CAUSE", 0x1fe8c, 0 }, + { "MBMsgRdyInt", 19, 1 }, + { NULL, 0, 0 } +}; + +struct reg_info t4_tp_regs[] = { + { "TP_IN_CONFIG", 0x7d00, 0 }, + { "TcpOptParserDisCh3", 27, 1 }, + { "TcpOptParserDisCh2", 26, 1 }, + { "TcpOptParserDisCh1", 25, 1 }, + { "TcpOptParserDisCh0", 24, 1 }, + { "CrcPassPrt3", 23, 1 }, + { "CrcPassPrt2", 22, 1 }, + { "CrcPassPrt1", 21, 1 }, + { "CrcPassPrt0", 20, 1 }, + { "VepaMode", 19, 1 }, + { "FipUpEn", 18, 1 }, + { "FcoeUpEn", 17, 1 }, + { "FcoeEnable", 16, 1 }, + { "IPv6Enable", 15, 1 }, + { "NICMode", 14, 1 }, + { "EChecksumCheckTCP", 13, 1 }, + { "EChecksumCheckIP", 12, 1 }, + { "EReportUdpHdrLen", 11, 1 }, + { "ECPL", 10, 1 }, + { "VnTagEnable", 9, 1 }, + { "EEthernet", 8, 1 }, + { "CChecksumCheckTCP", 6, 1 }, + { "CChecksumCheckIP", 5, 1 }, + { "CTag", 4, 1 }, + { "CCPL", 3, 1 }, + { "CEthernet", 1, 1 }, + { "CTunnel", 0, 1 }, + { "TP_OUT_CONFIG", 0x7d04, 0 }, + { "PortQfcEn", 28, 4 }, + { "EPktDistChn3", 23, 1 }, + { "EPktDistChn2", 22, 1 }, + { "EPktDistChn1", 21, 1 }, + { "EPktDistChn0", 20, 1 }, + { "TtlMode", 19, 1 }, + { "EQfcDmac", 18, 1 }, + { "ELpbkIncMpsStat", 17, 1 }, + { "IPIDSplitMode", 16, 1 }, + { "VLANExtEnablePort3", 15, 1 }, + { "VLANExtEnablePort2", 14, 1 }, + { "VLANExtEnablePort1", 13, 1 }, + { "VLANExtEnablePort0", 12, 1 }, + { "EChecksumInsertTCP", 11, 1 }, + { "EChecksumInsertIP", 10, 1 }, + { "ECPL", 8, 1 }, + { "EPriority", 7, 1 }, + { "EEthernet", 6, 1 }, + { "CChecksumInsertTCP", 5, 1 }, + { "CChecksumInsertIP", 4, 1 }, + { "CCPL", 2, 1 }, + { "CEthernet", 0, 1 }, + { "TP_GLOBAL_CONFIG", 0x7d08, 0 }, + { "SYNCookieParams", 26, 6 }, + { "RXFlowControlDisable", 25, 1 }, + { "TXPacingEnable", 24, 1 }, + { "AttackFilterEnable", 23, 1 }, + { "SYNCookieNoOptions", 22, 1 }, + { "ProtectedMode", 21, 1 }, + { "PingDrop", 20, 1 }, + { "FragmentDrop", 19, 1 }, + { "FiveTupleLookup", 17, 2 }, + { "OfdMpsStats", 16, 1 }, + { "DontFragment", 15, 1 }, + { "IPIdentSplit", 14, 1 }, + { "IPChecksumOffload", 13, 1 }, + { "UDPChecksumOffload", 12, 1 }, + { "TCPChecksumOffload", 11, 1 }, + { "RssLoopbackEnable", 10, 1 }, + { "TCAMServerUse", 8, 2 }, + { "IPTTL", 0, 8 }, + { "TP_DB_CONFIG", 0x7d0c, 0 }, + { "DBMaxOpCnt", 24, 8 }, + { "CxMaxOpCntDisable", 23, 1 }, + { "CxMaxOpCnt", 16, 7 }, + { "TxMaxOpCntDisable", 15, 1 }, + { "TxMaxOpCnt", 8, 7 }, + { "RxMaxOpCntDisable", 7, 1 }, + { "RxMaxOpCnt", 0, 7 }, + { "TP_CMM_TCB_BASE", 0x7d10, 0 }, + { "TP_CMM_MM_BASE", 0x7d14, 0 }, + { "TP_CMM_TIMER_BASE", 0x7d18, 0 }, + { "TP_CMM_MM_FLST_SIZE", 0x7d1c, 0 }, + { "RxPoolSize", 16, 16 }, + { "TxPoolSize", 0, 16 }, + { "TP_PMM_TX_BASE", 0x7d20, 0 }, + { "TP_PMM_DEFRAG_BASE", 0x7d24, 0 }, + { "TP_PMM_RX_BASE", 0x7d28, 0 }, + { "TP_PMM_RX_PAGE_SIZE", 0x7d2c, 0 }, + { "TP_PMM_RX_MAX_PAGE", 0x7d30, 0 }, + { "PMRxNumChn", 31, 1 }, + { "PMRxMaxPage", 0, 21 }, + { "TP_PMM_TX_PAGE_SIZE", 0x7d34, 0 }, + { "TP_PMM_TX_MAX_PAGE", 0x7d38, 0 }, + { "PMTxNumChn", 30, 2 }, + { "PMTxMaxPage", 0, 21 }, + { "TP_TCP_OPTIONS", 0x7d40, 0 }, + { "MTUDefault", 16, 16 }, + { "MTUEnable", 10, 1 }, + { "SACKTx", 9, 1 }, + { "SACKRx", 8, 1 }, + { "SACKMode", 4, 2 }, + { "WindowScaleMode", 2, 2 }, + { "TimestampsMode", 0, 2 }, + { "TP_DACK_CONFIG", 0x7d44, 0 }, + { "AutoState3", 30, 2 }, + { "AutoState2", 28, 2 }, + { "AutoState1", 26, 2 }, + { "ByteThreshold", 8, 18 }, + { "MSSThreshold", 4, 3 }, + { "AutoCareful", 2, 1 }, + { "AutoEnable", 1, 1 }, + { "Mode", 0, 1 }, + { "TP_PC_CONFIG", 0x7d48, 0 }, + { "CMCacheDisable", 31, 1 }, + { "EnableOcspiFull", 30, 1 }, + { "EnableFLMErrorDDP", 29, 1 }, + { "LockTid", 28, 1 }, + { "DisableInvPend", 27, 1 }, + { "EnableFilterCount", 26, 1 }, + { "RddpCongEn", 25, 1 }, + { "EnableOnFlyPDU", 24, 1 }, + { "EnableMinRcvWnd", 23, 1 }, + { "EnableMaxRcvWnd", 22, 1 }, + { "TxDataAckRateEnable", 21, 1 }, + { "TxDeferEnable", 20, 1 }, + { "RxCongestionMode", 19, 1 }, + { "HearbeatOnceDACK", 18, 1 }, + { "HearbeatOnceHeap", 17, 1 }, + { "HearbeatDACK", 16, 1 }, + { "TxCongestionMode", 15, 1 }, + { "AcceptLatestRcvAdv", 14, 1 }, + { "DisableSYNData", 13, 1 }, + { "DisableWindowPSH", 12, 1 }, + { "DisableFINOldData", 11, 1 }, + { "EnableFLMError", 10, 1 }, + { "EnableOptMtu", 9, 1 }, + { "FilterPeerFIN", 8, 1 }, + { "EnableFeedbackSend", 7, 1 }, + { "EnableRDMAError", 6, 1 }, + { "EnableDDPFlowControl", 5, 1 }, + { "DisableHeldFIN", 4, 1 }, + { "EnableOfdoVLAN", 3, 1 }, + { "DisableTimeWait", 2, 1 }, + { "EnableVlanCheck", 1, 1 }, + { "TxDataAckPageEnable", 0, 1 }, + { "TP_PC_CONFIG2", 0x7d4c, 0 }, + { "EnableMtuVfMode", 31, 1 }, + { "EnableMibVfMode", 30, 1 }, + { "DisableLbkCheck", 29, 1 }, + { "EnableUrgDdpOff", 28, 1 }, + { "EnableFilterLpbk", 27, 1 }, + { "DisableTblMmgr", 26, 1 }, + { "CngRecSndNxt", 25, 1 }, + { "EnableLbkChn", 24, 1 }, + { "EnableLroEcn", 23, 1 }, + { "EnablePcmdCheck", 22, 1 }, + { "EnableELbkAFull", 21, 1 }, + { "EnableCLbkAFull", 20, 1 }, + { "EnableOespiFull", 19, 1 }, + { "DisableHitCheck", 18, 1 }, + { "EnableRssErrCheck", 17, 1 }, + { "DisableNewPshFlag", 16, 1 }, + { "EnableRddpRcvAdvClr", 15, 1 }, + { "EnableTxDataArpMiss", 14, 1 }, + { "EnableArpMiss", 13, 1 }, + { "EnableRstPaws", 12, 1 }, + { "EnableIPv6RSS", 11, 1 }, + { "EnableNonOfdHybRss", 10, 1 }, + { "EnableUDP4TupRss", 9, 1 }, + { "EnableRxPktTmstpRss", 8, 1 }, + { "EnableEPCMDAFull", 7, 1 }, + { "EnableCPCMDAFull", 6, 1 }, + { "EnableEHdrAFull", 5, 1 }, + { "EnableCHdrAFull", 4, 1 }, + { "EnableEMacAFull", 3, 1 }, + { "EnableNonOfdTidRss", 2, 1 }, + { "EnableNonOfdTcbRss", 1, 1 }, + { "EnableTnlOfdClosed", 0, 1 }, + { "TP_TCP_BACKOFF_REG0", 0x7d50, 0 }, + { "TimerBackoffIndex3", 24, 8 }, + { "TimerBackoffIndex2", 16, 8 }, + { "TimerBackoffIndex1", 8, 8 }, + { "TimerBackoffIndex0", 0, 8 }, + { "TP_TCP_BACKOFF_REG1", 0x7d54, 0 }, + { "TimerBackoffIndex7", 24, 8 }, + { "TimerBackoffIndex6", 16, 8 }, + { "TimerBackoffIndex5", 8, 8 }, + { "TimerBackoffIndex4", 0, 8 }, + { "TP_TCP_BACKOFF_REG2", 0x7d58, 0 }, + { "TimerBackoffIndex11", 24, 8 }, + { "TimerBackoffIndex10", 16, 8 }, + { "TimerBackoffIndex9", 8, 8 }, + { "TimerBackoffIndex8", 0, 8 }, + { "TP_TCP_BACKOFF_REG3", 0x7d5c, 0 }, + { "TimerBackoffIndex15", 24, 8 }, + { "TimerBackoffIndex14", 16, 8 }, + { "TimerBackoffIndex13", 8, 8 }, + { "TimerBackoffIndex12", 0, 8 }, + { "TP_PARA_REG0", 0x7d60, 0 }, + { "InitCwndIdle", 27, 1 }, + { "InitCwnd", 24, 3 }, + { "DupAckThresh", 20, 4 }, + { "CplErrEnable", 12, 1 }, + { "FastTnlCnt", 11, 1 }, + { "FastTblCnt", 10, 1 }, + { "TpTcamKey", 9, 1 }, + { "SwsMode", 8, 1 }, + { "TsmpMode", 6, 2 }, + { "ByteCountLimit", 4, 2 }, + { "SwsShove", 3, 1 }, + { "TblTimer", 2, 1 }, + { "RxtPace", 1, 1 }, + { "SwsTimer", 0, 1 }, + { "TP_PARA_REG1", 0x7d64, 0 }, + { "InitRwnd", 16, 16 }, + { "InitialSSThresh", 0, 16 }, + { "TP_PARA_REG2", 0x7d68, 0 }, + { "MaxRxData", 16, 16 }, + { "RxCoalesceSize", 0, 16 }, + { "TP_PARA_REG3", 0x7d6c, 0 }, + { "EnableTnlCngLpbk", 31, 1 }, + { "EnableTnlCngFifo", 30, 1 }, + { "EnableTnlCngHdr", 29, 1 }, + { "EnableTnlCngSge", 28, 1 }, + { "RxMacCheck", 27, 1 }, + { "RxSynFilter", 26, 1 }, + { "CngCtrlECN", 25, 1 }, + { "RxDdpOffInit", 24, 1 }, + { "TunnelCngDrop3", 23, 1 }, + { "TunnelCngDrop2", 22, 1 }, + { "TunnelCngDrop1", 21, 1 }, + { "TunnelCngDrop0", 20, 1 }, + { "TxDataAckIdx", 16, 4 }, + { "RxFragEnable", 12, 3 }, + { "TxPaceFixedStrict", 11, 1 }, + { "TxPaceAutoStrict", 10, 1 }, + { "TxPaceFixed", 9, 1 }, + { "TxPaceAuto", 8, 1 }, + { "RxChnTunnel", 7, 1 }, + { "RxUrgTunnel", 6, 1 }, + { "RxUrgMode", 5, 1 }, + { "TxUrgMode", 4, 1 }, + { "CngCtrlMode", 2, 2 }, + { "RxCoalesceEnable", 1, 1 }, + { "RxCoalescePshEn", 0, 1 }, + { "TP_PARA_REG4", 0x7d70, 0 }, + { "HighSpeedCfg", 24, 8 }, + { "NewRenoCfg", 16, 8 }, + { "TahoeCfg", 8, 8 }, + { "RenoCfg", 0, 8 }, + { "TP_PARA_REG5", 0x7d74, 0 }, + { "IndicateSize", 16, 16 }, + { "MaxProxySize", 12, 4 }, + { "EnableReadPdu", 11, 1 }, + { "EnableReadAhead", 10, 1 }, + { "EmptyRqEnable", 9, 1 }, + { "SchdEnable", 8, 1 }, + { "RearmDdpOffset", 4, 1 }, + { "ResetDdpOffset", 3, 1 }, + { "OnFlyDDPEnable", 2, 1 }, + { "DackTimerSpin", 1, 1 }, + { "PushTimerEnable", 0, 1 }, + { "TP_PARA_REG6", 0x7d78, 0 }, + { "TxPDUSizeAdj", 24, 8 }, + { "LimitedTransmit", 20, 4 }, + { "EnableCSav", 19, 1 }, + { "EnableDeferPDU", 18, 1 }, + { "EnableFlush", 17, 1 }, + { "EnableBytePersist", 16, 1 }, + { "DisableTmoCng", 15, 1 }, + { "EnableReadAhead", 14, 1 }, + { "AllowExeption", 13, 1 }, + { "EnableDeferACK", 12, 1 }, + { "EnableESnd", 11, 1 }, + { "EnableCSnd", 10, 1 }, + { "EnablePDUE", 9, 1 }, + { "EnablePDUC", 8, 1 }, + { "EnableBUFI", 7, 1 }, + { "EnableBUFE", 6, 1 }, + { "EnableDefer", 5, 1 }, + { "EnableClearRxmtOos", 4, 1 }, + { "DisablePDUCng", 3, 1 }, + { "DisablePDUTimeout", 2, 1 }, + { "DisablePDURxmt", 1, 1 }, + { "DisablePDUxmt", 0, 1 }, + { "TP_PARA_REG7", 0x7d7c, 0 }, + { "PMMaxXferLen1", 16, 16 }, + { "PMMaxXferLen0", 0, 16 }, + { "TP_ENG_CONFIG", 0x7d80, 0 }, + { "TableLatencyDone", 28, 4 }, + { "TableLatencyStart", 24, 4 }, + { "EngineLatencyDelta", 16, 4 }, + { "EngineLatencyMmgr", 12, 4 }, + { "EngineLatencyWireIp6", 8, 4 }, + { "EngineLatencyWire", 4, 4 }, + { "EngineLatencyBase", 0, 4 }, + { "TP_ERR_CONFIG", 0x7d8c, 0 }, + { "TnlErrorPing", 30, 1 }, + { "TnlErrorCsum", 29, 1 }, + { "TnlErrorCsumIP", 28, 1 }, + { "TnlErrorTcpOpt", 25, 1 }, + { "TnlErrorPktLen", 24, 1 }, + { "TnlErrorTcpHdrLen", 23, 1 }, + { "TnlErrorIpHdrLen", 22, 1 }, + { "TnlErrorEthHdrLen", 21, 1 }, + { "TnlErrorAttack", 20, 1 }, + { "TnlErrorFrag", 19, 1 }, + { "TnlErrorIpVer", 18, 1 }, + { "TnlErrorMac", 17, 1 }, + { "TnlErrorAny", 16, 1 }, + { "DropErrorPing", 14, 1 }, + { "DropErrorCsum", 13, 1 }, + { "DropErrorCsumIP", 12, 1 }, + { "DropErrorTcpOpt", 9, 1 }, + { "DropErrorPktLen", 8, 1 }, + { "DropErrorTcpHdrLen", 7, 1 }, + { "DropErrorIpHdrLen", 6, 1 }, + { "DropErrorEthHdrLen", 5, 1 }, + { "DropErrorAttack", 4, 1 }, + { "DropErrorFrag", 3, 1 }, + { "DropErrorIpVer", 2, 1 }, + { "DropErrorMac", 1, 1 }, + { "DropErrorAny", 0, 1 }, + { "TP_TIMER_RESOLUTION", 0x7d90, 0 }, + { "TimerResolution", 16, 8 }, + { "TimestampResolution", 8, 8 }, + { "DelayedACKResolution", 0, 8 }, + { "TP_MSL", 0x7d94, 0 }, + { "TP_RXT_MIN", 0x7d98, 0 }, + { "TP_RXT_MAX", 0x7d9c, 0 }, + { "TP_PERS_MIN", 0x7da0, 0 }, + { "TP_PERS_MAX", 0x7da4, 0 }, + { "TP_KEEP_IDLE", 0x7da8, 0 }, + { "TP_KEEP_INTVL", 0x7dac, 0 }, + { "TP_INIT_SRTT", 0x7db0, 0 }, + { "MaxRtt", 16, 16 }, + { "InitSrtt", 0, 16 }, + { "TP_DACK_TIMER", 0x7db4, 0 }, + { "TP_FINWAIT2_TIMER", 0x7db8, 0 }, + { "TP_FAST_FINWAIT2_TIMER", 0x7dbc, 0 }, + { "TP_SHIFT_CNT", 0x7dc0, 0 }, + { "SynShiftMax", 24, 8 }, + { "RxtShiftMaxR1", 20, 4 }, + { "RxtShiftMaxR2", 16, 4 }, + { "PerShiftBackoffMax", 12, 4 }, + { "PerShiftMax", 8, 4 }, + { "KeepaliveMaxR1", 4, 4 }, + { "KeepaliveMaxR2", 0, 4 }, + { "TP_TM_CONFIG", 0x7dc4, 0 }, + { "TP_TIME_LO", 0x7dc8, 0 }, + { "TP_TIME_HI", 0x7dcc, 0 }, + { "TP_PORT_MTU_0", 0x7dd0, 0 }, + { "Port1MTUValue", 16, 16 }, + { "Port0MTUValue", 0, 16 }, + { "TP_PORT_MTU_1", 0x7dd4, 0 }, + { "Port3MTUValue", 16, 16 }, + { "Port2MTUValue", 0, 16 }, + { "TP_PACE_TABLE", 0x7dd8, 0 }, + { "TP_CCTRL_TABLE", 0x7ddc, 0 }, + { "RowIndex", 16, 16 }, + { "RowValue", 0, 16 }, + { "TP_MTU_TABLE", 0x7de4, 0 }, + { "MTUIndex", 24, 8 }, + { "MTUWidth", 16, 4 }, + { "MTUValue", 0, 14 }, + { "TP_ULP_TABLE", 0x7de8, 0 }, + { "ULPType7Field", 28, 4 }, + { "ULPType6Field", 24, 4 }, + { "ULPType5Field", 20, 4 }, + { "ULPType4Field", 16, 4 }, + { "ULPType3Field", 12, 4 }, + { "ULPType2Field", 8, 4 }, + { "ULPType1Field", 4, 4 }, + { "ULPType0Field", 0, 4 }, + { "TP_RSS_LKP_TABLE", 0x7dec, 0 }, + { "LkpTblRowVld", 31, 1 }, + { "LkpTblRowIdx", 20, 10 }, + { "LkpTblQueue1", 10, 10 }, + { "LkpTblQueue0", 0, 10 }, + { "TP_RSS_CONFIG", 0x7df0, 0 }, + { "TNL4tupEnIpv6", 31, 1 }, + { "TNL2tupEnIpv6", 30, 1 }, + { "TNL4tupEnIpv4", 29, 1 }, + { "TNL2tupEnIpv4", 28, 1 }, + { "TNLTcpSel", 27, 1 }, + { "TNLIp6Sel", 26, 1 }, + { "TNLVrtSel", 25, 1 }, + { "TNLMapEn", 24, 1 }, + { "OFDHashSave", 19, 1 }, + { "OFDVrtSel", 18, 1 }, + { "OFDMapEn", 17, 1 }, + { "OFDLkpEn", 16, 1 }, + { "SYN4tupEnIpv6", 15, 1 }, + { "SYN2tupEnIpv6", 14, 1 }, + { "SYN4tupEnIpv4", 13, 1 }, + { "SYN2tupEnIpv4", 12, 1 }, + { "SYNIp6Sel", 11, 1 }, + { "SYNVrtSel", 10, 1 }, + { "SYNMapEn", 9, 1 }, + { "SYNLkpEn", 8, 1 }, + { "ChannelEnable", 7, 1 }, + { "PortEnable", 6, 1 }, + { "TNLAllLookup", 5, 1 }, + { "VirtEnable", 4, 1 }, + { "CongestionEnable", 3, 1 }, + { "HashToeplitz", 2, 1 }, + { "UdpEnable", 1, 1 }, + { "Disable", 0, 1 }, + { "TP_RSS_CONFIG_TNL", 0x7df4, 0 }, + { "MaskSize", 28, 4 }, + { "MaskFilter", 16, 11 }, + { "UseWireCh", 0, 1 }, + { "TP_RSS_CONFIG_OFD", 0x7df8, 0 }, + { "MaskSize", 28, 4 }, + { "RRCPLMapEn", 20, 1 }, + { "RRCPLQueWidth", 16, 4 }, + { "TP_RSS_CONFIG_SYN", 0x7dfc, 0 }, + { "MaskSize", 28, 4 }, + { "UseWireCh", 0, 1 }, + { "TP_RSS_CONFIG_VRT", 0x7e00, 0 }, + { "VfRdRg", 25, 1 }, + { "VfRdEn", 24, 1 }, + { "VfPerrEn", 23, 1 }, + { "KeyPerrEn", 22, 1 }, + { "DisableVlan", 21, 1 }, + { "EnableUp0", 20, 1 }, + { "HashDelay", 16, 4 }, + { "VfWrAddr", 8, 7 }, + { "KeyMode", 6, 2 }, + { "VfWrEn", 5, 1 }, + { "KeyWrEn", 4, 1 }, + { "KeyWrAddr", 0, 4 }, + { "TP_RSS_CONFIG_CNG", 0x7e04, 0 }, + { "ChnCount3", 31, 1 }, + { "ChnCount2", 30, 1 }, + { "ChnCount1", 29, 1 }, + { "ChnCount0", 28, 1 }, + { "ChnUndFlow3", 27, 1 }, + { "ChnUndFlow2", 26, 1 }, + { "ChnUndFlow1", 25, 1 }, + { "ChnUndFlow0", 24, 1 }, + { "ChnOvrFlow3", 23, 1 }, + { "ChnOvrFlow2", 22, 1 }, + { "ChnOvrFlow1", 21, 1 }, + { "ChnOvrFlow0", 20, 1 }, + { "RstChn3", 19, 1 }, + { "RstChn2", 18, 1 }, + { "RstChn1", 17, 1 }, + { "RstChn0", 16, 1 }, + { "UpdVld", 15, 1 }, + { "Xoff", 14, 1 }, + { "UpdChn3", 13, 1 }, + { "UpdChn2", 12, 1 }, + { "UpdChn1", 11, 1 }, + { "UpdChn0", 10, 1 }, + { "Queue", 0, 10 }, + { "TP_LA_TABLE_0", 0x7e10, 0 }, + { "VirtPort1Table", 16, 16 }, + { "VirtPort0Table", 0, 16 }, + { "TP_LA_TABLE_1", 0x7e14, 0 }, + { "VirtPort3Table", 16, 16 }, + { "VirtPort2Table", 0, 16 }, + { "TP_TM_PIO_ADDR", 0x7e18, 0 }, + { "TP_TM_PIO_DATA", 0x7e1c, 0 }, + { "TP_MOD_CONFIG", 0x7e24, 0 }, + { "RxChannelWeight1", 24, 8 }, + { "RXChannelWeight0", 16, 8 }, + { "TimerMode", 8, 8 }, + { "TxChannelXoffEn", 0, 4 }, + { "TP_TX_MOD_QUEUE_REQ_MAP", 0x7e28, 0 }, + { "RX_MOD_WEIGHT", 24, 8 }, + { "TX_MOD_WEIGHT", 16, 8 }, + { "TX_MOD_QUEUE_REQ_MAP", 0, 16 }, + { "TP_TX_MOD_QUEUE_WEIGHT1", 0x7e2c, 0 }, + { "TP_TX_MOD_QUEUE_WEIGHT7", 24, 8 }, + { "TP_TX_MOD_QUEUE_WEIGHT6", 16, 8 }, + { "TP_TX_MOD_QUEUE_WEIGHT5", 8, 8 }, + { "TP_TX_MOD_QUEUE_WEIGHT4", 0, 8 }, + { "TP_TX_MOD_QUEUE_WEIGHT0", 0x7e30, 0 }, + { "TP_TX_MOD_QUEUE_WEIGHT3", 24, 8 }, + { "TP_TX_MOD_QUEUE_WEIGHT2", 16, 8 }, + { "TP_TX_MOD_QUEUE_WEIGHT1", 8, 8 }, + { "TP_TX_MOD_QUEUE_WEIGHT0", 0, 8 }, + { "TP_TX_MOD_CHANNEL_WEIGHT", 0x7e34, 0 }, + { "CH3", 24, 8 }, + { "CH2", 16, 8 }, + { "CH1", 8, 8 }, + { "CH0", 0, 8 }, + { "TP_MOD_RATE_LIMIT", 0x7e38, 0 }, + { "RX_MOD_RATE_LIMIT_INC", 24, 8 }, + { "RX_MOD_RATE_LIMIT_TICK", 16, 8 }, + { "TX_MOD_RATE_LIMIT_INC", 8, 8 }, + { "TX_MOD_RATE_LIMIT_TICK", 0, 8 }, + { "TP_PIO_ADDR", 0x7e40, 0 }, + { "TP_PIO_DATA", 0x7e44, 0 }, + { "TP_RESET", 0x7e4c, 0 }, + { "FlstInitEnable", 1, 1 }, + { "TPReset", 0, 1 }, + { "TP_MIB_INDEX", 0x7e50, 0 }, + { "TP_MIB_DATA", 0x7e54, 0 }, + { "TP_SYNC_TIME_HI", 0x7e58, 0 }, + { "TP_SYNC_TIME_LO", 0x7e5c, 0 }, + { "TP_CMM_MM_RX_FLST_BASE", 0x7e60, 0 }, + { "TP_CMM_MM_TX_FLST_BASE", 0x7e64, 0 }, + { "TP_CMM_MM_PS_FLST_BASE", 0x7e68, 0 }, + { "TP_CMM_MM_MAX_PSTRUCT", 0x7e6c, 0 }, + { "TP_INT_ENABLE", 0x7e70, 0 }, + { "FlmTxFlstEmpty", 30, 1 }, + { "RssLkpPerr", 29, 1 }, + { "FlmPerrSet", 28, 1 }, + { "ProtocolSramPerr", 27, 1 }, + { "ArpLutPerr", 26, 1 }, + { "CmRcfOpPerr", 25, 1 }, + { "CmCachePerr", 24, 1 }, + { "CmRcfDataPerr", 23, 1 }, + { "DbL2tLutPerr", 22, 1 }, + { "DbTxTidPerr", 21, 1 }, + { "DbExtPerr", 20, 1 }, + { "DbOpPerr", 19, 1 }, + { "TmCachePerr", 18, 1 }, + { "ETpOutCplFifoPerr", 17, 1 }, + { "ETpOutTcpFifoPerr", 16, 1 }, + { "ETpOutIpFifoPerr", 15, 1 }, + { "ETpOutEthFifoPerr", 14, 1 }, + { "ETpInCplFifoPerr", 13, 1 }, + { "ETpInTcpOptFifoPerr", 12, 1 }, + { "ETpInTcpFifoPerr", 11, 1 }, + { "ETpInIpFifoPerr", 10, 1 }, + { "ETpInEthFifoPerr", 9, 1 }, + { "CTpOutCplFifoPerr", 8, 1 }, + { "CTpOutTcpFifoPerr", 7, 1 }, + { "CTpOutIpFifoPerr", 6, 1 }, + { "CTpOutEthFifoPerr", 5, 1 }, + { "CTpInCplFifoPerr", 4, 1 }, + { "CTpInTcpOpFifoPerr", 3, 1 }, + { "PduFbkFifoPerr", 2, 1 }, + { "CmOpExtFifoPerr", 1, 1 }, + { "DelInvFifoPerr", 0, 1 }, + { "TP_INT_CAUSE", 0x7e74, 0 }, + { "FlmTxFlstEmpty", 30, 1 }, + { "RssLkpPerr", 29, 1 }, + { "FlmPerrSet", 28, 1 }, + { "ProtocolSramPerr", 27, 1 }, + { "ArpLutPerr", 26, 1 }, + { "CmRcfOpPerr", 25, 1 }, + { "CmCachePerr", 24, 1 }, + { "CmRcfDataPerr", 23, 1 }, + { "DbL2tLutPerr", 22, 1 }, + { "DbTxTidPerr", 21, 1 }, + { "DbExtPerr", 20, 1 }, + { "DbOpPerr", 19, 1 }, + { "TmCachePerr", 18, 1 }, + { "ETpOutCplFifoPerr", 17, 1 }, + { "ETpOutTcpFifoPerr", 16, 1 }, + { "ETpOutIpFifoPerr", 15, 1 }, + { "ETpOutEthFifoPerr", 14, 1 }, + { "ETpInCplFifoPerr", 13, 1 }, + { "ETpInTcpOptFifoPerr", 12, 1 }, + { "ETpInTcpFifoPerr", 11, 1 }, + { "ETpInIpFifoPerr", 10, 1 }, + { "ETpInEthFifoPerr", 9, 1 }, + { "CTpOutCplFifoPerr", 8, 1 }, + { "CTpOutTcpFifoPerr", 7, 1 }, + { "CTpOutIpFifoPerr", 6, 1 }, + { "CTpOutEthFifoPerr", 5, 1 }, + { "CTpInCplFifoPerr", 4, 1 }, + { "CTpInTcpOpFifoPerr", 3, 1 }, + { "PduFbkFifoPerr", 2, 1 }, + { "CmOpExtFifoPerr", 1, 1 }, + { "DelInvFifoPerr", 0, 1 }, + { "TP_PER_ENABLE", 0x7e78, 0 }, + { "FlmTxFlstEmpty", 30, 1 }, + { "RssLkpPerr", 29, 1 }, + { "FlmPerrSet", 28, 1 }, + { "ProtocolSramPerr", 27, 1 }, + { "ArpLutPerr", 26, 1 }, + { "CmRcfOpPerr", 25, 1 }, + { "CmCachePerr", 24, 1 }, + { "CmRcfDataPerr", 23, 1 }, + { "DbL2tLutPerr", 22, 1 }, + { "DbTxTidPerr", 21, 1 }, + { "DbExtPerr", 20, 1 }, + { "DbOpPerr", 19, 1 }, + { "TmCachePerr", 18, 1 }, + { "ETpOutCplFifoPerr", 17, 1 }, + { "ETpOutTcpFifoPerr", 16, 1 }, + { "ETpOutIpFifoPerr", 15, 1 }, + { "ETpOutEthFifoPerr", 14, 1 }, + { "ETpInCplFifoPerr", 13, 1 }, + { "ETpInTcpOptFifoPerr", 12, 1 }, + { "ETpInTcpFifoPerr", 11, 1 }, + { "ETpInIpFifoPerr", 10, 1 }, + { "ETpInEthFifoPerr", 9, 1 }, + { "CTpOutCplFifoPerr", 8, 1 }, + { "CTpOutTcpFifoPerr", 7, 1 }, + { "CTpOutIpFifoPerr", 6, 1 }, + { "CTpOutEthFifoPerr", 5, 1 }, + { "CTpInCplFifoPerr", 4, 1 }, + { "CTpInTcpOpFifoPerr", 3, 1 }, + { "PduFbkFifoPerr", 2, 1 }, + { "CmOpExtFifoPerr", 1, 1 }, + { "DelInvFifoPerr", 0, 1 }, + { "TP_FLM_FREE_PS_CNT", 0x7e80, 0 }, + { "TP_FLM_FREE_RX_CNT", 0x7e84, 0 }, + { "FreeRxPageChn", 28, 1 }, + { "FreeRxPageCount", 0, 21 }, + { "TP_FLM_FREE_TX_CNT", 0x7e88, 0 }, + { "FreeTxPageChn", 28, 2 }, + { "FreeTxPageCount", 0, 21 }, + { "TP_TM_HEAP_PUSH_CNT", 0x7e8c, 0 }, + { "TP_TM_HEAP_POP_CNT", 0x7e90, 0 }, + { "TP_TM_DACK_PUSH_CNT", 0x7e94, 0 }, + { "TP_TM_DACK_POP_CNT", 0x7e98, 0 }, + { "TP_TM_MOD_PUSH_CNT", 0x7e9c, 0 }, + { "TP_MOD_POP_CNT", 0x7ea0, 0 }, + { "TP_TIMER_SEPARATOR", 0x7ea4, 0 }, + { "TimerSeparator", 16, 16 }, + { "DisableTimeFreeze", 0, 1 }, + { "TP_DEBUG_FLAGS", 0x7eac, 0 }, + { "RxTimerDackFirst", 26, 1 }, + { "RxTimerDack", 25, 1 }, + { "RxTimerHeartbeat", 24, 1 }, + { "RxPawsDrop", 23, 1 }, + { "RxUrgDataDrop", 22, 1 }, + { "RxFutureData", 21, 1 }, + { "RxRcvRxmData", 20, 1 }, + { "RxRcvOooDataFin", 19, 1 }, + { "RxRcvOooData", 18, 1 }, + { "RxRcvWndZero", 17, 1 }, + { "RxRcvWndLtMss", 16, 1 }, + { "TxDupAckInc", 11, 1 }, + { "TxRxmUrg", 10, 1 }, + { "TxRxmFin", 9, 1 }, + { "TxRxmSyn", 8, 1 }, + { "TxRxmNewReno", 7, 1 }, + { "TxRxmFast", 6, 1 }, + { "TxRxmTimer", 5, 1 }, + { "TxRxmTimerKeepalive", 4, 1 }, + { "TxRxmTimerPersist", 3, 1 }, + { "TxRcvAdvShrunk", 2, 1 }, + { "TxRcvAdvZero", 1, 1 }, + { "TxRcvAdvLtMss", 0, 1 }, + { "TP_RX_SCHED", 0x7eb0, 0 }, + { "CommitReset1", 31, 1 }, + { "CommitReset0", 30, 1 }, + { "ForceCong1", 29, 1 }, + { "ForceCong0", 28, 1 }, + { "EnableLpbkFull1", 26, 2 }, + { "EnableLpbkFull0", 24, 2 }, + { "EnableFifoFull1", 22, 2 }, + { "EnablePcmdFull1", 20, 2 }, + { "EnableHdrFull1", 18, 2 }, + { "EnableFifoFull0", 16, 2 }, + { "EnablePcmdFull0", 14, 2 }, + { "EnableHdrFull0", 12, 2 }, + { "CommitLimit1", 6, 6 }, + { "CommitLimit0", 0, 6 }, + { "TP_TX_SCHED", 0x7eb4, 0 }, + { "CommitReset3", 31, 1 }, + { "CommitReset2", 30, 1 }, + { "CommitReset1", 29, 1 }, + { "CommitReset0", 28, 1 }, + { "ForceCong3", 27, 1 }, + { "ForceCong2", 26, 1 }, + { "ForceCong1", 25, 1 }, + { "ForceCong0", 24, 1 }, + { "CommitLimit3", 18, 6 }, + { "CommitLimit2", 12, 6 }, + { "CommitLimit1", 6, 6 }, + { "CommitLimit0", 0, 6 }, + { "TP_FX_SCHED", 0x7eb8, 0 }, + { "TxChnXoff3", 19, 1 }, + { "TxChnXoff2", 18, 1 }, + { "TxChnXoff1", 17, 1 }, + { "TxChnXoff0", 16, 1 }, + { "TxModXoff7", 15, 1 }, + { "TxModXoff6", 14, 1 }, + { "TxModXoff5", 13, 1 }, + { "TxModXoff4", 12, 1 }, + { "TxModXoff3", 11, 1 }, + { "TxModXoff2", 10, 1 }, + { "TxModXoff1", 9, 1 }, + { "TxModXoff0", 8, 1 }, + { "RxChnXoff3", 7, 1 }, + { "RxChnXoff2", 6, 1 }, + { "RxChnXoff1", 5, 1 }, + { "RxChnXoff0", 4, 1 }, + { "RxModXoff1", 1, 1 }, + { "RxModXoff0", 0, 1 }, + { "TP_TX_ORATE", 0x7ebc, 0 }, + { "OfdRate3", 24, 8 }, + { "OfdRate2", 16, 8 }, + { "OfdRate1", 8, 8 }, + { "OfdRate0", 0, 8 }, + { "TP_IX_SCHED0", 0x7ec0, 0 }, + { "TP_IX_SCHED1", 0x7ec4, 0 }, + { "TP_IX_SCHED2", 0x7ec8, 0 }, + { "TP_IX_SCHED3", 0x7ecc, 0 }, + { "TP_TX_TRATE", 0x7ed0, 0 }, + { "TnlRate3", 24, 8 }, + { "TnlRate2", 16, 8 }, + { "TnlRate1", 8, 8 }, + { "TnlRate0", 0, 8 }, + { "TP_DBG_LA_CONFIG", 0x7ed4, 0 }, + { "DbgLaOpcEnable", 24, 8 }, + { "DbgLaWhlf", 23, 1 }, + { "DbgLaWptr", 16, 7 }, + { "DbgLaMode", 14, 2 }, + { "DbgLaFatalFreeze", 13, 1 }, + { "DbgLaEnable", 12, 1 }, + { "DbgLaRptr", 0, 7 }, + { "TP_DBG_LA_DATAL", 0x7ed8, 0 }, + { "TP_DBG_LA_DATAH", 0x7edc, 0 }, + { "TP_PROTOCOL_CNTRL", 0x7ee8, 0 }, + { "WriteEnable", 31, 1 }, + { "TcamEnable", 10, 1 }, + { "BlockSelect", 8, 2 }, + { "LineAddress", 1, 7 }, + { "RequestDone", 0, 1 }, + { "TP_PROTOCOL_DATA0", 0x7eec, 0 }, + { "TP_PROTOCOL_DATA1", 0x7ef0, 0 }, + { "TP_PROTOCOL_DATA2", 0x7ef4, 0 }, + { "TP_PROTOCOL_DATA3", 0x7ef8, 0 }, + { "TP_PROTOCOL_DATA4", 0x7efc, 0 }, + { NULL, 0, 0 } +}; + +struct reg_info t4_ulp_tx_regs[] = { + { "ULP_TX_CONFIG", 0x8dc0, 0 }, + { "stag_mix_enable", 2, 1 }, + { "stagf_fix_disable", 1, 1 }, + { "extra_tag_insertion_enable", 0, 1 }, + { "ULP_TX_PERR_INJECT", 0x8dc4, 0 }, + { "MemSel", 1, 5 }, + { "InjectDataErr", 0, 1 }, + { "ULP_TX_INT_ENABLE", 0x8dc8, 0 }, + { "Pbl_bound_err_ch3", 31, 1 }, + { "Pbl_bound_err_ch2", 30, 1 }, + { "Pbl_bound_err_ch1", 29, 1 }, + { "Pbl_bound_err_ch0", 28, 1 }, + { "sge2ulp_fifo_perr_set3", 27, 1 }, + { "sge2ulp_fifo_perr_set2", 26, 1 }, + { "sge2ulp_fifo_perr_set1", 25, 1 }, + { "sge2ulp_fifo_perr_set0", 24, 1 }, + { "cim2ulp_fifo_perr_set3", 23, 1 }, + { "cim2ulp_fifo_perr_set2", 22, 1 }, + { "cim2ulp_fifo_perr_set1", 21, 1 }, + { "cim2ulp_fifo_perr_set0", 20, 1 }, + { "CQE_fifo_perr_set3", 19, 1 }, + { "CQE_fifo_perr_set2", 18, 1 }, + { "CQE_fifo_perr_set1", 17, 1 }, + { "CQE_fifo_perr_set0", 16, 1 }, + { "pbl_fifo_perr_set3", 15, 1 }, + { "pbl_fifo_perr_set2", 14, 1 }, + { "pbl_fifo_perr_set1", 13, 1 }, + { "pbl_fifo_perr_set0", 12, 1 }, + { "cmd_fifo_perr_set3", 11, 1 }, + { "cmd_fifo_perr_set2", 10, 1 }, + { "cmd_fifo_perr_set1", 9, 1 }, + { "cmd_fifo_perr_set0", 8, 1 }, + { "lso_hdr_sram_perr_set3", 7, 1 }, + { "lso_hdr_sram_perr_set2", 6, 1 }, + { "lso_hdr_sram_perr_set1", 5, 1 }, + { "lso_hdr_sram_perr_set0", 4, 1 }, + { "imm_data_perr_set_ch3", 3, 1 }, + { "imm_data_perr_set_ch2", 2, 1 }, + { "imm_data_perr_set_ch1", 1, 1 }, + { "imm_data_perr_set_ch0", 0, 1 }, + { "ULP_TX_INT_CAUSE", 0x8dcc, 0 }, + { "Pbl_bound_err_ch3", 31, 1 }, + { "Pbl_bound_err_ch2", 30, 1 }, + { "Pbl_bound_err_ch1", 29, 1 }, + { "Pbl_bound_err_ch0", 28, 1 }, + { "sge2ulp_fifo_perr_set3", 27, 1 }, + { "sge2ulp_fifo_perr_set2", 26, 1 }, + { "sge2ulp_fifo_perr_set1", 25, 1 }, + { "sge2ulp_fifo_perr_set0", 24, 1 }, + { "cim2ulp_fifo_perr_set3", 23, 1 }, + { "cim2ulp_fifo_perr_set2", 22, 1 }, + { "cim2ulp_fifo_perr_set1", 21, 1 }, + { "cim2ulp_fifo_perr_set0", 20, 1 }, + { "CQE_fifo_perr_set3", 19, 1 }, + { "CQE_fifo_perr_set2", 18, 1 }, + { "CQE_fifo_perr_set1", 17, 1 }, + { "CQE_fifo_perr_set0", 16, 1 }, + { "pbl_fifo_perr_set3", 15, 1 }, + { "pbl_fifo_perr_set2", 14, 1 }, + { "pbl_fifo_perr_set1", 13, 1 }, + { "pbl_fifo_perr_set0", 12, 1 }, + { "cmd_fifo_perr_set3", 11, 1 }, + { "cmd_fifo_perr_set2", 10, 1 }, + { "cmd_fifo_perr_set1", 9, 1 }, + { "cmd_fifo_perr_set0", 8, 1 }, + { "lso_hdr_sram_perr_set3", 7, 1 }, + { "lso_hdr_sram_perr_set2", 6, 1 }, + { "lso_hdr_sram_perr_set1", 5, 1 }, + { "lso_hdr_sram_perr_set0", 4, 1 }, + { "imm_data_perr_set_ch3", 3, 1 }, + { "imm_data_perr_set_ch2", 2, 1 }, + { "imm_data_perr_set_ch1", 1, 1 }, + { "imm_data_perr_set_ch0", 0, 1 }, + { "ULP_TX_PERR_ENABLE", 0x8dd0, 0 }, + { "sge2ulp_fifo_perr_set3", 27, 1 }, + { "sge2ulp_fifo_perr_set2", 26, 1 }, + { "sge2ulp_fifo_perr_set1", 25, 1 }, + { "sge2ulp_fifo_perr_set0", 24, 1 }, + { "cim2ulp_fifo_perr_set3", 23, 1 }, + { "cim2ulp_fifo_perr_set2", 22, 1 }, + { "cim2ulp_fifo_perr_set1", 21, 1 }, + { "cim2ulp_fifo_perr_set0", 20, 1 }, + { "CQE_fifo_perr_set3", 19, 1 }, + { "CQE_fifo_perr_set2", 18, 1 }, + { "CQE_fifo_perr_set1", 17, 1 }, + { "CQE_fifo_perr_set0", 16, 1 }, + { "pbl_fifo_perr_set3", 15, 1 }, + { "pbl_fifo_perr_set2", 14, 1 }, + { "pbl_fifo_perr_set1", 13, 1 }, + { "pbl_fifo_perr_set0", 12, 1 }, + { "cmd_fifo_perr_set3", 11, 1 }, + { "cmd_fifo_perr_set2", 10, 1 }, + { "cmd_fifo_perr_set1", 9, 1 }, + { "cmd_fifo_perr_set0", 8, 1 }, + { "lso_hdr_sram_perr_set3", 7, 1 }, + { "lso_hdr_sram_perr_set2", 6, 1 }, + { "lso_hdr_sram_perr_set1", 5, 1 }, + { "lso_hdr_sram_perr_set0", 4, 1 }, + { "imm_data_perr_set_ch3", 3, 1 }, + { "imm_data_perr_set_ch2", 2, 1 }, + { "imm_data_perr_set_ch1", 1, 1 }, + { "imm_data_perr_set_ch0", 0, 1 }, + { "ULP_TX_TPT_LLIMIT", 0x8dd4, 0 }, + { "ULP_TX_TPT_ULIMIT", 0x8dd8, 0 }, + { "ULP_TX_PBL_LLIMIT", 0x8ddc, 0 }, + { "ULP_TX_PBL_ULIMIT", 0x8de0, 0 }, + { "ULP_TX_CPL_ERR_OFFSET", 0x8de4, 0 }, + { "ULP_TX_CPL_ERR_MASK_L", 0x8de8, 0 }, + { "ULP_TX_CPL_ERR_MASK_H", 0x8dec, 0 }, + { "ULP_TX_CPL_ERR_VALUE_L", 0x8df0, 0 }, + { "ULP_TX_CPL_ERR_VALUE_H", 0x8df4, 0 }, + { "ULP_TX_CPL_PACK_SIZE1", 0x8df8, 0 }, + { "Ch3Size1", 24, 8 }, + { "Ch2Size1", 16, 8 }, + { "Ch1Size1", 8, 8 }, + { "Ch0Size1", 0, 8 }, + { "ULP_TX_CPL_PACK_SIZE2", 0x8dfc, 0 }, + { "Ch3Size2", 24, 8 }, + { "Ch2Size2", 16, 8 }, + { "Ch1Size2", 8, 8 }, + { "Ch0Size2", 0, 8 }, + { "ULP_TX_ERR_MSG2CIM", 0x8e00, 0 }, + { "ULP_TX_ERR_TABLE_BASE", 0x8e04, 0 }, + { "ULP_TX_ERR_CNT_CH0", 0x8e10, 0 }, + { "ULP_TX_ERR_CNT_CH1", 0x8e14, 0 }, + { "ULP_TX_ERR_CNT_CH2", 0x8e18, 0 }, + { "ULP_TX_ERR_CNT_CH3", 0x8e1c, 0 }, + { "ULP_TX_ULP2TP_BIST_CMD", 0x8e30, 0 }, + { "ULP_TX_ULP2TP_BIST_ERROR_CNT", 0x8e34, 0 }, + { "ULP_TX_FPGA_CMD_CTRL", 0x8e38, 0 }, + { "ULP_TX_FPGA_CMD_0", 0x8e3c, 0 }, + { "ULP_TX_FPGA_CMD_1", 0x8e40, 0 }, + { "ULP_TX_FPGA_CMD_2", 0x8e44, 0 }, + { "ULP_TX_FPGA_CMD_3", 0x8e48, 0 }, + { "ULP_TX_FPGA_CMD_4", 0x8e4c, 0 }, + { "ULP_TX_FPGA_CMD_5", 0x8e50, 0 }, + { "ULP_TX_FPGA_CMD_6", 0x8e54, 0 }, + { "ULP_TX_FPGA_CMD_7", 0x8e58, 0 }, + { "ULP_TX_FPGA_CMD_8", 0x8e5c, 0 }, + { "ULP_TX_FPGA_CMD_9", 0x8e60, 0 }, + { "ULP_TX_FPGA_CMD_10", 0x8e64, 0 }, + { "ULP_TX_FPGA_CMD_11", 0x8e68, 0 }, + { "ULP_TX_FPGA_CMD_12", 0x8e6c, 0 }, + { "ULP_TX_FPGA_CMD_13", 0x8e70, 0 }, + { "ULP_TX_FPGA_CMD_14", 0x8e74, 0 }, + { "ULP_TX_FPGA_CMD_15", 0x8e78, 0 }, + { "ULP_TX_SE_CNT_ERR", 0x8ea0, 0 }, + { "ERR_CH3", 12, 4 }, + { "ERR_CH2", 8, 4 }, + { "ERR_CH1", 4, 4 }, + { "ERR_CH0", 0, 4 }, + { "ULP_TX_SE_CNT_CLR", 0x8ea4, 0 }, + { "CLR_DROP", 16, 4 }, + { "CLR_CH3", 12, 4 }, + { "CLR_CH2", 8, 4 }, + { "CLR_CH1", 4, 4 }, + { "CLR_CH0", 0, 4 }, + { "ULP_TX_SE_CNT_CH0", 0x8ea8, 0 }, + { "SOP_CNT_ULP2TP", 28, 4 }, + { "EOP_CNT_ULP2TP", 24, 4 }, + { "SOP_CNT_LSO_IN", 20, 4 }, + { "EOP_CNT_LSO_IN", 16, 4 }, + { "SOP_CNT_ALG_IN", 12, 4 }, + { "EOP_CNT_ALG_IN", 8, 4 }, + { "SOP_CNT_CIM2ULP", 4, 4 }, + { "EOP_CNT_CIM2ULP", 0, 4 }, + { "ULP_TX_SE_CNT_CH1", 0x8eac, 0 }, + { "SOP_CNT_ULP2TP", 28, 4 }, + { "EOP_CNT_ULP2TP", 24, 4 }, + { "SOP_CNT_LSO_IN", 20, 4 }, + { "EOP_CNT_LSO_IN", 16, 4 }, + { "SOP_CNT_ALG_IN", 12, 4 }, + { "EOP_CNT_ALG_IN", 8, 4 }, + { "SOP_CNT_CIM2ULP", 4, 4 }, + { "EOP_CNT_CIM2ULP", 0, 4 }, + { "ULP_TX_SE_CNT_CH2", 0x8eb0, 0 }, + { "SOP_CNT_ULP2TP", 28, 4 }, + { "EOP_CNT_ULP2TP", 24, 4 }, + { "SOP_CNT_LSO_IN", 20, 4 }, + { "EOP_CNT_LSO_IN", 16, 4 }, + { "SOP_CNT_ALG_IN", 12, 4 }, + { "EOP_CNT_ALG_IN", 8, 4 }, + { "SOP_CNT_CIM2ULP", 4, 4 }, + { "EOP_CNT_CIM2ULP", 0, 4 }, + { "ULP_TX_SE_CNT_CH3", 0x8eb4, 0 }, + { "SOP_CNT_ULP2TP", 28, 4 }, + { "EOP_CNT_ULP2TP", 24, 4 }, + { "SOP_CNT_LSO_IN", 20, 4 }, + { "EOP_CNT_LSO_IN", 16, 4 }, + { "SOP_CNT_ALG_IN", 12, 4 }, + { "EOP_CNT_ALG_IN", 8, 4 }, + { "SOP_CNT_CIM2ULP", 4, 4 }, + { "EOP_CNT_CIM2ULP", 0, 4 }, + { "ULP_TX_DROP_CNT", 0x8eb8, 0 }, + { "DROP_CH3", 12, 4 }, + { "DROP_CH2", 8, 4 }, + { "DROP_CH1", 4, 4 }, + { "DROP_CH0", 0, 4 }, + { "ULP_TX_LA_RDPTR_0", 0x8ec0, 0 }, + { "ULP_TX_LA_RDDATA_0", 0x8ec4, 0 }, + { "ULP_TX_LA_WRPTR_0", 0x8ec8, 0 }, + { "ULP_TX_LA_RESERVED_0", 0x8ecc, 0 }, + { "ULP_TX_LA_RDPTR_1", 0x8ed0, 0 }, + { "ULP_TX_LA_RDDATA_1", 0x8ed4, 0 }, + { "ULP_TX_LA_WRPTR_1", 0x8ed8, 0 }, + { "ULP_TX_LA_RESERVED_1", 0x8edc, 0 }, + { "ULP_TX_LA_RDPTR_2", 0x8ee0, 0 }, + { "ULP_TX_LA_RDDATA_2", 0x8ee4, 0 }, + { "ULP_TX_LA_WRPTR_2", 0x8ee8, 0 }, + { "ULP_TX_LA_RESERVED_2", 0x8eec, 0 }, + { "ULP_TX_LA_RDPTR_3", 0x8ef0, 0 }, + { "ULP_TX_LA_RDDATA_3", 0x8ef4, 0 }, + { "ULP_TX_LA_WRPTR_3", 0x8ef8, 0 }, + { "ULP_TX_LA_RESERVED_3", 0x8efc, 0 }, + { "ULP_TX_LA_RDPTR_4", 0x8f00, 0 }, + { "ULP_TX_LA_RDDATA_4", 0x8f04, 0 }, + { "ULP_TX_LA_WRPTR_4", 0x8f08, 0 }, + { "ULP_TX_LA_RESERVED_4", 0x8f0c, 0 }, + { "ULP_TX_LA_RDPTR_5", 0x8f10, 0 }, + { "ULP_TX_LA_RDDATA_5", 0x8f14, 0 }, + { "ULP_TX_LA_WRPTR_5", 0x8f18, 0 }, + { "ULP_TX_LA_RESERVED_5", 0x8f1c, 0 }, + { "ULP_TX_LA_RDPTR_6", 0x8f20, 0 }, + { "ULP_TX_LA_RDDATA_6", 0x8f24, 0 }, + { "ULP_TX_LA_WRPTR_6", 0x8f28, 0 }, + { "ULP_TX_LA_RESERVED_6", 0x8f2c, 0 }, + { "ULP_TX_LA_RDPTR_7", 0x8f30, 0 }, + { "ULP_TX_LA_RDDATA_7", 0x8f34, 0 }, + { "ULP_TX_LA_WRPTR_7", 0x8f38, 0 }, + { "ULP_TX_LA_RESERVED_7", 0x8f3c, 0 }, + { "ULP_TX_LA_RDPTR_8", 0x8f40, 0 }, + { "ULP_TX_LA_RDDATA_8", 0x8f44, 0 }, + { "ULP_TX_LA_WRPTR_8", 0x8f48, 0 }, + { "ULP_TX_LA_RESERVED_8", 0x8f4c, 0 }, + { "ULP_TX_LA_RDPTR_9", 0x8f50, 0 }, + { "ULP_TX_LA_RDDATA_9", 0x8f54, 0 }, + { "ULP_TX_LA_WRPTR_9", 0x8f58, 0 }, + { "ULP_TX_LA_RESERVED_9", 0x8f5c, 0 }, + { "ULP_TX_LA_RDPTR_10", 0x8f60, 0 }, + { "ULP_TX_LA_RDDATA_10", 0x8f64, 0 }, + { "ULP_TX_LA_WRPTR_10", 0x8f68, 0 }, + { "ULP_TX_LA_RESERVED_10", 0x8f6c, 0 }, + { NULL, 0, 0 } +}; + +struct reg_info t4_pm_rx_regs[] = { + { "PM_RX_CFG", 0x8fc0, 0 }, + { "ch1_output", 27, 5 }, + { "strobe1", 16, 1 }, + { "ch1_input", 11, 5 }, + { "ch2_input", 6, 5 }, + { "ch3_input", 1, 5 }, + { "strobe0", 0, 1 }, + { "PM_RX_MODE", 0x8fc4, 0 }, + { "use_bundle_len", 4, 1 }, + { "stat_to_ch", 3, 1 }, + { "stat_from_ch", 1, 2 }, + { "prefetch_enable", 0, 1 }, + { "PM_RX_STAT_CONFIG", 0x8fc8, 0 }, + { "PM_RX_STAT_COUNT", 0x8fcc, 0 }, + { "PM_RX_STAT_LSB", 0x8fd0, 0 }, + { "PM_RX_STAT_MSB", 0x8fd4, 0 }, + { "PM_RX_INT_ENABLE", 0x8fd8, 0 }, + { "zero_e_cmd_error", 22, 1 }, + { "iespi0_fifo2x_Rx_framing_error", 21, 1 }, + { "iespi1_fifo2x_Rx_framing_error", 20, 1 }, + { "iespi2_fifo2x_Rx_framing_error", 19, 1 }, + { "iespi3_fifo2x_Rx_framing_error", 18, 1 }, + { "iespi0_Rx_framing_error", 17, 1 }, + { "iespi1_Rx_framing_error", 16, 1 }, + { "iespi2_Rx_framing_error", 15, 1 }, + { "iespi3_Rx_framing_error", 14, 1 }, + { "iespi0_Tx_framing_error", 13, 1 }, + { "iespi1_Tx_framing_error", 12, 1 }, + { "iespi2_Tx_framing_error", 11, 1 }, + { "iespi3_Tx_framing_error", 10, 1 }, + { "ocspi0_Rx_framing_error", 9, 1 }, + { "ocspi1_Rx_framing_error", 8, 1 }, + { "ocspi0_Tx_framing_error", 7, 1 }, + { "ocspi1_Tx_framing_error", 6, 1 }, + { "ocspi0_ofifo2x_Tx_framing_error", 5, 1 }, + { "ocspi1_ofifo2x_Tx_framing_error", 4, 1 }, + { "ocspi_par_error", 3, 1 }, + { "db_options_par_error", 2, 1 }, + { "iespi_par_error", 1, 1 }, + { "e_pcmd_par_error", 0, 1 }, + { "PM_RX_INT_CAUSE", 0x8fdc, 0 }, + { "zero_e_cmd_error", 22, 1 }, + { "iespi0_fifo2x_Rx_framing_error", 21, 1 }, + { "iespi1_fifo2x_Rx_framing_error", 20, 1 }, + { "iespi2_fifo2x_Rx_framing_error", 19, 1 }, + { "iespi3_fifo2x_Rx_framing_error", 18, 1 }, + { "iespi0_Rx_framing_error", 17, 1 }, + { "iespi1_Rx_framing_error", 16, 1 }, + { "iespi2_Rx_framing_error", 15, 1 }, + { "iespi3_Rx_framing_error", 14, 1 }, + { "iespi0_Tx_framing_error", 13, 1 }, + { "iespi1_Tx_framing_error", 12, 1 }, + { "iespi2_Tx_framing_error", 11, 1 }, + { "iespi3_Tx_framing_error", 10, 1 }, + { "ocspi0_Rx_framing_error", 9, 1 }, + { "ocspi1_Rx_framing_error", 8, 1 }, + { "ocspi0_Tx_framing_error", 7, 1 }, + { "ocspi1_Tx_framing_error", 6, 1 }, + { "ocspi0_ofifo2x_Tx_framing_error", 5, 1 }, + { "ocspi1_ofifo2x_Tx_framing_error", 4, 1 }, + { "ocspi_par_error", 3, 1 }, + { "db_options_par_error", 2, 1 }, + { "iespi_par_error", 1, 1 }, + { "e_pcmd_par_error", 0, 1 }, + { NULL, 0, 0 } +}; + +struct reg_info t4_pm_tx_regs[] = { + { "PM_TX_CFG", 0x8fe0, 0 }, + { "ch1_output", 27, 5 }, + { "ch2_output", 22, 5 }, + { "ch3_output", 17, 5 }, + { "strobe1", 16, 1 }, + { "ch1_input", 11, 5 }, + { "ch2_input", 6, 5 }, + { "ch3_input", 1, 5 }, + { "strobe0", 0, 1 }, + { "PM_TX_MODE", 0x8fe4, 0 }, + { "cong_thresh3", 25, 7 }, + { "cong_thresh2", 18, 7 }, + { "cong_thresh1", 11, 7 }, + { "cong_thresh0", 4, 7 }, + { "use_bundle_len", 3, 1 }, + { "stat_channel", 1, 2 }, + { "prefetch_enable", 0, 1 }, + { "PM_TX_STAT_CONFIG", 0x8fe8, 0 }, + { "PM_TX_STAT_COUNT", 0x8fec, 0 }, + { "PM_TX_STAT_LSB", 0x8ff0, 0 }, + { "PM_TX_STAT_MSB", 0x8ff4, 0 }, + { "PM_TX_INT_ENABLE", 0x8ff8, 0 }, + { "pcmd_len_ovfl0", 31, 1 }, + { "pcmd_len_ovfl1", 30, 1 }, + { "pcmd_len_ovfl2", 29, 1 }, + { "zero_c_cmd_erro", 28, 1 }, + { "icspi0_fifo2x_Rx_framing_error", 27, 1 }, + { "icspi1_fifo2x_Rx_framing_error", 26, 1 }, + { "icspi2_fifo2x_Rx_framing_error", 25, 1 }, + { "icspi3_fifo2x_Rx_framing_error", 24, 1 }, + { "icspi0_Rx_framing_error", 23, 1 }, + { "icspi1_Rx_framing_error", 22, 1 }, + { "icspi2_Rx_framing_error", 21, 1 }, + { "icspi3_Rx_framing_error", 20, 1 }, + { "icspi0_Tx_framing_error", 19, 1 }, + { "icspi1_Tx_framing_error", 18, 1 }, + { "icspi2_Tx_framing_error", 17, 1 }, + { "icspi3_Tx_framing_error", 16, 1 }, + { "oespi0_Rx_framing_error", 15, 1 }, + { "oespi1_Rx_framing_error", 14, 1 }, + { "oespi2_Rx_framing_error", 13, 1 }, + { "oespi3_Rx_framing_error", 12, 1 }, + { "oespi0_Tx_framing_error", 11, 1 }, + { "oespi1_Tx_framing_error", 10, 1 }, + { "oespi2_Tx_framing_error", 9, 1 }, + { "oespi3_Tx_framing_error", 8, 1 }, + { "oespi0_ofifo2x_Tx_framing_error", 7, 1 }, + { "oespi1_ofifo2x_Tx_framing_error", 6, 1 }, + { "oespi2_ofifo2x_Tx_framing_error", 5, 1 }, + { "oespi3_ofifo2x_Tx_framing_error", 4, 1 }, + { "oespi_par_error", 3, 1 }, + { "db_options_par_error", 2, 1 }, + { "icspi_par_error", 1, 1 }, + { "c_pcmd_par_error", 0, 1 }, + { "PM_TX_INT_CAUSE", 0x8ffc, 0 }, + { "pcmd_len_ovfl0", 31, 1 }, + { "pcmd_len_ovfl1", 30, 1 }, + { "pcmd_len_ovfl2", 29, 1 }, + { "zero_c_cmd_error", 28, 1 }, + { "icspi0_fifo2x_Rx_framing_error", 27, 1 }, + { "icspi1_fifo2x_Rx_framing_error", 26, 1 }, + { "icspi2_fifo2x_Rx_framing_error", 25, 1 }, + { "icspi3_fifo2x_Rx_framing_error", 24, 1 }, + { "icspi0_Rx_framing_error", 23, 1 }, + { "icspi1_Rx_framing_error", 22, 1 }, + { "icspi2_Rx_framing_error", 21, 1 }, + { "icspi3_Rx_framing_error", 20, 1 }, + { "icspi0_Tx_framing_error", 19, 1 }, + { "icspi1_Tx_framing_error", 18, 1 }, + { "icspi2_Tx_framing_error", 17, 1 }, + { "icspi3_Tx_framing_error", 16, 1 }, + { "oespi0_Rx_framing_error", 15, 1 }, + { "oespi1_Rx_framing_error", 14, 1 }, + { "oespi2_Rx_framing_error", 13, 1 }, + { "oespi3_Rx_framing_error", 12, 1 }, + { "oespi0_Tx_framing_error", 11, 1 }, + { "oespi1_Tx_framing_error", 10, 1 }, + { "oespi2_Tx_framing_error", 9, 1 }, + { "oespi3_Tx_framing_error", 8, 1 }, + { "oespi0_ofifo2x_Tx_framing_error", 7, 1 }, + { "oespi1_ofifo2x_Tx_framing_error", 6, 1 }, + { "oespi2_ofifo2x_Tx_framing_error", 5, 1 }, + { "oespi3_ofifo2x_Tx_framing_error", 4, 1 }, + { "oespi_par_error", 3, 1 }, + { "db_options_par_error", 2, 1 }, + { "icspi_par_error", 1, 1 }, + { "c_pcmd_par_error", 0, 1 }, + { NULL, 0, 0 } +}; + +struct reg_info t4_mps_regs[] = { + { "MPS_CMN_CTL", 0x9000, 0 }, + { "Detect8023", 3, 1 }, + { "VFDirectAccess", 2, 1 }, + { "NumPorts", 0, 2 }, + { "MPS_INT_ENABLE", 0x9004, 0 }, + { "StatIntEnb", 5, 1 }, + { "TxIntEnb", 4, 1 }, + { "RxIntEnb", 3, 1 }, + { "TrcIntEnb", 2, 1 }, + { "ClsIntEnb", 1, 1 }, + { "PLIntEnb", 0, 1 }, + { "MPS_INT_CAUSE", 0x9008, 0 }, + { "StatInt", 5, 1 }, + { "TxInt", 4, 1 }, + { "RxInt", 3, 1 }, + { "TrcInt", 2, 1 }, + { "ClsInt", 1, 1 }, + { "PLInt", 0, 1 }, + { "MPS_VF_TX_CTL_31_0", 0x9010, 0 }, + { "MPS_VF_TX_CTL_63_32", 0x9014, 0 }, + { "MPS_VF_TX_CTL_95_64", 0x9018, 0 }, + { "MPS_VF_TX_CTL_127_96", 0x901c, 0 }, + { "MPS_VF_RX_CTL_31_0", 0x9020, 0 }, + { "MPS_VF_RX_CTL_63_32", 0x9024, 0 }, + { "MPS_VF_RX_CTL_95_64", 0x9028, 0 }, + { "MPS_VF_RX_CTL_127_96", 0x902c, 0 }, + { "MPS_TX_PAUSE_DURATION_BUF_GRP0", 0x9030, 0 }, + { "MPS_TX_PAUSE_DURATION_BUF_GRP1", 0x9034, 0 }, + { "MPS_TX_PAUSE_DURATION_BUF_GRP2", 0x9038, 0 }, + { "MPS_TX_PAUSE_DURATION_BUF_GRP3", 0x903c, 0 }, + { "MPS_TX_PAUSE_RETRANS_BUF_GRP0", 0x9040, 0 }, + { "MPS_TX_PAUSE_RETRANS_BUF_GRP1", 0x9044, 0 }, + { "MPS_TX_PAUSE_RETRANS_BUF_GRP2", 0x9048, 0 }, + { "MPS_TX_PAUSE_RETRANS_BUF_GRP3", 0x904c, 0 }, + { "MPS_TP_CSIDE_MUX_CTL_P0", 0x9050, 0 }, + { "MPS_TP_CSIDE_MUX_CTL_P1", 0x9054, 0 }, + { "MPS_WOL_CTL_MODE", 0x9058, 0 }, + { "MPS_FPGA_DEBUG", 0x9060, 0 }, + { "LPBK_EN", 8, 1 }, + { "CH_MAP3", 6, 2 }, + { "CH_MAP2", 4, 2 }, + { "CH_MAP1", 2, 2 }, + { "CH_MAP0", 0, 2 }, + { "MPS_DEBUG_CTL", 0x9068, 0 }, + { "DbgModeCtl_H", 11, 1 }, + { "DbgSel_H", 6, 5 }, + { "DbgModeCtl_L", 5, 1 }, + { "DbgSel_L", 0, 5 }, + { "MPS_DEBUG_DATA_REG_L", 0x906c, 0 }, + { "MPS_DEBUG_DATA_REG_H", 0x9070, 0 }, + { "MPS_TOP_SPARE", 0x9074, 0 }, + { "TopSpare", 12, 20 }, + { "Chikn_14463", 8, 4 }, + { "oVlanSelLpbk3", 7, 1 }, + { "oVlanSelLpbk2", 6, 1 }, + { "oVlanSelLpbk1", 5, 1 }, + { "oVlanSelLpbk0", 4, 1 }, + { "oVlanSelMac3", 3, 1 }, + { "oVlanSelMac2", 2, 1 }, + { "oVlanSelMac1", 1, 1 }, + { "oVlanSelMac0", 0, 1 }, + { "MPS_BUILD_REVISION", 0x90fc, 0 }, + { "MPS_PORT_CTL", 0x20000, 0 }, + { "LpbkEn", 31, 1 }, + { "TxEn", 30, 1 }, + { "RxEn", 29, 1 }, + { "PPPEn", 28, 1 }, + { "FCSStripEn", 27, 1 }, + { "PPPAndPause", 26, 1 }, + { "PrioPPPEnMap", 16, 8 }, + { "MPS_PORT_PAUSE_CTL", 0x20004, 0 }, + { "MPS_PORT_TX_PAUSE_CTL", 0x20008, 0 }, + { "RegSendOff", 24, 8 }, + { "RegSendOn", 16, 8 }, + { "SgeSendEn", 8, 8 }, + { "RxSendEn", 0, 8 }, + { "MPS_PORT_TX_PAUSE_CTL2", 0x2000c, 0 }, + { "MPS_PORT_RX_PAUSE_CTL", 0x20010, 0 }, + { "RegHaltOn", 8, 8 }, + { "RxHaltEn", 0, 8 }, + { "MPS_PORT_TX_PAUSE_STATUS", 0x20014, 0 }, + { "RegSending", 16, 8 }, + { "SgeSending", 8, 8 }, + { "RxSending", 0, 8 }, + { "MPS_PORT_RX_PAUSE_STATUS", 0x20018, 0 }, + { "RegHalted", 8, 8 }, + { "RxHalted", 0, 8 }, + { "MPS_PORT_TX_PAUSE_DEST_L", 0x2001c, 0 }, + { "MPS_PORT_TX_PAUSE_DEST_H", 0x20020, 0 }, + { "MPS_PORT_TX_PAUSE_SOURCE_L", 0x20024, 0 }, + { "MPS_PORT_TX_PAUSE_SOURCE_H", 0x20028, 0 }, + { "MPS_PORT_PRTY_BUFFER_GROUP_MAP", 0x2002c, 0 }, + { "Prty7", 14, 2 }, + { "Prty6", 12, 2 }, + { "Prty5", 10, 2 }, + { "Prty4", 8, 2 }, + { "Prty3", 6, 2 }, + { "Prty2", 4, 2 }, + { "Prty1", 2, 2 }, + { "Prty0", 0, 2 }, + { "MPS_PORT_CTL", 0x22000, 0 }, + { "LpbkEn", 31, 1 }, + { "TxEn", 30, 1 }, + { "RxEn", 29, 1 }, + { "PPPEn", 28, 1 }, + { "FCSStripEn", 27, 1 }, + { "PPPAndPause", 26, 1 }, + { "PrioPPPEnMap", 16, 8 }, + { "MPS_PORT_PAUSE_CTL", 0x22004, 0 }, + { "MPS_PORT_TX_PAUSE_CTL", 0x22008, 0 }, + { "RegSendOff", 24, 8 }, + { "RegSendOn", 16, 8 }, + { "SgeSendEn", 8, 8 }, + { "RxSendEn", 0, 8 }, + { "MPS_PORT_TX_PAUSE_CTL2", 0x2200c, 0 }, + { "MPS_PORT_RX_PAUSE_CTL", 0x22010, 0 }, + { "RegHaltOn", 8, 8 }, + { "RxHaltEn", 0, 8 }, + { "MPS_PORT_TX_PAUSE_STATUS", 0x22014, 0 }, + { "RegSending", 16, 8 }, + { "SgeSending", 8, 8 }, + { "RxSending", 0, 8 }, + { "MPS_PORT_RX_PAUSE_STATUS", 0x22018, 0 }, + { "RegHalted", 8, 8 }, + { "RxHalted", 0, 8 }, + { "MPS_PORT_TX_PAUSE_DEST_L", 0x2201c, 0 }, + { "MPS_PORT_TX_PAUSE_DEST_H", 0x22020, 0 }, + { "MPS_PORT_TX_PAUSE_SOURCE_L", 0x22024, 0 }, + { "MPS_PORT_TX_PAUSE_SOURCE_H", 0x22028, 0 }, + { "MPS_PORT_PRTY_BUFFER_GROUP_MAP", 0x2202c, 0 }, + { "Prty7", 14, 2 }, + { "Prty6", 12, 2 }, + { "Prty5", 10, 2 }, + { "Prty4", 8, 2 }, + { "Prty3", 6, 2 }, + { "Prty2", 4, 2 }, + { "Prty1", 2, 2 }, + { "Prty0", 0, 2 }, + { "MPS_PORT_CTL", 0x24000, 0 }, + { "LpbkEn", 31, 1 }, + { "TxEn", 30, 1 }, + { "RxEn", 29, 1 }, + { "PPPEn", 28, 1 }, + { "FCSStripEn", 27, 1 }, + { "PPPAndPause", 26, 1 }, + { "PrioPPPEnMap", 16, 8 }, + { "MPS_PORT_PAUSE_CTL", 0x24004, 0 }, + { "MPS_PORT_TX_PAUSE_CTL", 0x24008, 0 }, + { "RegSendOff", 24, 8 }, + { "RegSendOn", 16, 8 }, + { "SgeSendEn", 8, 8 }, + { "RxSendEn", 0, 8 }, + { "MPS_PORT_TX_PAUSE_CTL2", 0x2400c, 0 }, + { "MPS_PORT_RX_PAUSE_CTL", 0x24010, 0 }, + { "RegHaltOn", 8, 8 }, + { "RxHaltEn", 0, 8 }, + { "MPS_PORT_TX_PAUSE_STATUS", 0x24014, 0 }, + { "RegSending", 16, 8 }, + { "SgeSending", 8, 8 }, + { "RxSending", 0, 8 }, + { "MPS_PORT_RX_PAUSE_STATUS", 0x24018, 0 }, + { "RegHalted", 8, 8 }, + { "RxHalted", 0, 8 }, + { "MPS_PORT_TX_PAUSE_DEST_L", 0x2401c, 0 }, + { "MPS_PORT_TX_PAUSE_DEST_H", 0x24020, 0 }, + { "MPS_PORT_TX_PAUSE_SOURCE_L", 0x24024, 0 }, + { "MPS_PORT_TX_PAUSE_SOURCE_H", 0x24028, 0 }, + { "MPS_PORT_PRTY_BUFFER_GROUP_MAP", 0x2402c, 0 }, + { "Prty7", 14, 2 }, + { "Prty6", 12, 2 }, + { "Prty5", 10, 2 }, + { "Prty4", 8, 2 }, + { "Prty3", 6, 2 }, + { "Prty2", 4, 2 }, + { "Prty1", 2, 2 }, + { "Prty0", 0, 2 }, + { "MPS_PORT_CTL", 0x26000, 0 }, + { "LpbkEn", 31, 1 }, + { "TxEn", 30, 1 }, + { "RxEn", 29, 1 }, + { "PPPEn", 28, 1 }, + { "FCSStripEn", 27, 1 }, + { "PPPAndPause", 26, 1 }, + { "PrioPPPEnMap", 16, 8 }, + { "MPS_PORT_PAUSE_CTL", 0x26004, 0 }, + { "MPS_PORT_TX_PAUSE_CTL", 0x26008, 0 }, + { "RegSendOff", 24, 8 }, + { "RegSendOn", 16, 8 }, + { "SgeSendEn", 8, 8 }, + { "RxSendEn", 0, 8 }, + { "MPS_PORT_TX_PAUSE_CTL2", 0x2600c, 0 }, + { "MPS_PORT_RX_PAUSE_CTL", 0x26010, 0 }, + { "RegHaltOn", 8, 8 }, + { "RxHaltEn", 0, 8 }, + { "MPS_PORT_TX_PAUSE_STATUS", 0x26014, 0 }, + { "RegSending", 16, 8 }, + { "SgeSending", 8, 8 }, + { "RxSending", 0, 8 }, + { "MPS_PORT_RX_PAUSE_STATUS", 0x26018, 0 }, + { "RegHalted", 8, 8 }, + { "RxHalted", 0, 8 }, + { "MPS_PORT_TX_PAUSE_DEST_L", 0x2601c, 0 }, + { "MPS_PORT_TX_PAUSE_DEST_H", 0x26020, 0 }, + { "MPS_PORT_TX_PAUSE_SOURCE_L", 0x26024, 0 }, + { "MPS_PORT_TX_PAUSE_SOURCE_H", 0x26028, 0 }, + { "MPS_PORT_PRTY_BUFFER_GROUP_MAP", 0x2602c, 0 }, + { "Prty7", 14, 2 }, + { "Prty6", 12, 2 }, + { "Prty5", 10, 2 }, + { "Prty4", 8, 2 }, + { "Prty3", 6, 2 }, + { "Prty2", 4, 2 }, + { "Prty1", 2, 2 }, + { "Prty0", 0, 2 }, + { "MPS_PF_CTL", 0x1e2c0, 0 }, + { "TxEn", 1, 1 }, + { "RxEn", 0, 1 }, + { "MPS_PF_CTL", 0x1e6c0, 0 }, + { "TxEn", 1, 1 }, + { "RxEn", 0, 1 }, + { "MPS_PF_CTL", 0x1eac0, 0 }, + { "TxEn", 1, 1 }, + { "RxEn", 0, 1 }, + { "MPS_PF_CTL", 0x1eec0, 0 }, + { "TxEn", 1, 1 }, + { "RxEn", 0, 1 }, + { "MPS_PF_CTL", 0x1f2c0, 0 }, + { "TxEn", 1, 1 }, + { "RxEn", 0, 1 }, + { "MPS_PF_CTL", 0x1f6c0, 0 }, + { "TxEn", 1, 1 }, + { "RxEn", 0, 1 }, + { "MPS_PF_CTL", 0x1fac0, 0 }, + { "TxEn", 1, 1 }, + { "RxEn", 0, 1 }, + { "MPS_PF_CTL", 0x1fec0, 0 }, + { "TxEn", 1, 1 }, + { "RxEn", 0, 1 }, + { "MPS_RX_CTL", 0x11000, 0 }, + { "FILT_VLAN_SEL", 17, 1 }, + { "CBA_EN", 16, 1 }, + { "BLK_SNDR", 12, 4 }, + { "CMPRS", 8, 4 }, + { "SNF", 0, 8 }, + { "MPS_RX_PORT_MUX_CTL", 0x11004, 0 }, + { "CTL_P3", 12, 4 }, + { "CTL_P2", 8, 4 }, + { "CTL_P1", 4, 4 }, + { "CTL_P0", 0, 4 }, + { "MPS_RX_PG_FL", 0x11008, 0 }, + { "RST", 16, 1 }, + { "CNT", 0, 16 }, + { "MPS_RX_PKT_FL", 0x1100c, 0 }, + { "RST", 16, 1 }, + { "CNT", 0, 16 }, + { "MPS_RX_PG_RSV0", 0x11010, 0 }, + { "CLR_INTR", 31, 1 }, + { "SET_INTR", 30, 1 }, + { "USED", 16, 11 }, + { "ALLOC", 0, 11 }, + { "MPS_RX_PG_RSV1", 0x11014, 0 }, + { "CLR_INTR", 31, 1 }, + { "SET_INTR", 30, 1 }, + { "USED", 16, 11 }, + { "ALLOC", 0, 11 }, + { "MPS_RX_PG_RSV2", 0x11018, 0 }, + { "CLR_INTR", 31, 1 }, + { "SET_INTR", 30, 1 }, + { "USED", 16, 11 }, + { "ALLOC", 0, 11 }, + { "MPS_RX_PG_RSV3", 0x1101c, 0 }, + { "CLR_INTR", 31, 1 }, + { "SET_INTR", 30, 1 }, + { "USED", 16, 11 }, + { "ALLOC", 0, 11 }, + { "MPS_RX_PG_RSV4", 0x11020, 0 }, + { "CLR_INTR", 31, 1 }, + { "SET_INTR", 30, 1 }, + { "USED", 16, 11 }, + { "ALLOC", 0, 11 }, + { "MPS_RX_PG_RSV5", 0x11024, 0 }, + { "CLR_INTR", 31, 1 }, + { "SET_INTR", 30, 1 }, + { "USED", 16, 11 }, + { "ALLOC", 0, 11 }, + { "MPS_RX_PG_RSV6", 0x11028, 0 }, + { "CLR_INTR", 31, 1 }, + { "SET_INTR", 30, 1 }, + { "USED", 16, 11 }, + { "ALLOC", 0, 11 }, + { "MPS_RX_PG_RSV7", 0x1102c, 0 }, + { "CLR_INTR", 31, 1 }, + { "SET_INTR", 30, 1 }, + { "USED", 16, 11 }, + { "ALLOC", 0, 11 }, + { "MPS_RX_PG_SHR_BG0", 0x11030, 0 }, + { "EN", 31, 1 }, + { "SEL", 30, 1 }, + { "MAX", 16, 11 }, + { "BORW", 0, 11 }, + { "MPS_RX_PG_SHR_BG1", 0x11034, 0 }, + { "EN", 31, 1 }, + { "SEL", 30, 1 }, + { "MAX", 16, 11 }, + { "BORW", 0, 11 }, + { "MPS_RX_PG_SHR_BG2", 0x11038, 0 }, + { "EN", 31, 1 }, + { "SEL", 30, 1 }, + { "MAX", 16, 11 }, + { "BORW", 0, 11 }, + { "MPS_RX_PG_SHR_BG3", 0x1103c, 0 }, + { "EN", 31, 1 }, + { "SEL", 30, 1 }, + { "MAX", 16, 11 }, + { "BORW", 0, 11 }, + { "MPS_RX_PG_SHR0", 0x11040, 0 }, + { "QUOTA", 16, 11 }, + { "USED", 0, 11 }, + { "MPS_RX_PG_SHR1", 0x11044, 0 }, + { "QUOTA", 16, 11 }, + { "USED", 0, 11 }, + { "MPS_RX_PG_HYST_BG0", 0x11048, 0 }, + { "EN", 31, 1 }, + { "TH", 0, 11 }, + { "MPS_RX_PG_HYST_BG1", 0x1104c, 0 }, + { "EN", 31, 1 }, + { "TH", 0, 11 }, + { "MPS_RX_PG_HYST_BG2", 0x11050, 0 }, + { "EN", 31, 1 }, + { "TH", 0, 11 }, + { "MPS_RX_PG_HYST_BG3", 0x11054, 0 }, + { "EN", 31, 1 }, + { "TH", 0, 11 }, + { "MPS_RX_OCH_CTL", 0x11058, 0 }, + { "DROP_WT", 27, 5 }, + { "TRUNC_WT", 22, 5 }, + { "DRAIN", 13, 5 }, + { "DROP", 8, 5 }, + { "STOP", 0, 5 }, + { "MPS_RX_LPBK_BP0", 0x1105c, 0 }, + { "MPS_RX_LPBK_BP1", 0x11060, 0 }, + { "MPS_RX_LPBK_BP2", 0x11064, 0 }, + { "MPS_RX_LPBK_BP3", 0x11068, 0 }, + { "MPS_RX_PORT_GAP", 0x1106c, 0 }, + { "MPS_RX_CHMN_CNT", 0x11070, 0 }, + { "MPS_RX_PERR_INT_CAUSE", 0x11074, 0 }, + { "FF", 23, 1 }, + { "PGMO", 22, 1 }, + { "PGME", 21, 1 }, + { "CHMN", 20, 1 }, + { "RPLC", 19, 1 }, + { "ATRB", 18, 1 }, + { "PSMX", 17, 1 }, + { "PGLL", 16, 1 }, + { "PGFL", 15, 1 }, + { "PKTQ", 14, 1 }, + { "PKFL", 13, 1 }, + { "PPM3", 12, 1 }, + { "PPM2", 11, 1 }, + { "PPM1", 10, 1 }, + { "PPM0", 9, 1 }, + { "SPMX", 8, 1 }, + { "CDL3", 7, 1 }, + { "CDL2", 6, 1 }, + { "CDL1", 5, 1 }, + { "CDL0", 4, 1 }, + { "CDM3", 3, 1 }, + { "CDM2", 2, 1 }, + { "CDM1", 1, 1 }, + { "CDM0", 0, 1 }, + { "MPS_RX_PERR_INT_ENABLE", 0x11078, 0 }, + { "FF", 23, 1 }, + { "PGMO", 22, 1 }, + { "PGME", 21, 1 }, + { "CHMN", 20, 1 }, + { "RPLC", 19, 1 }, + { "ATRB", 18, 1 }, + { "PSMX", 17, 1 }, + { "PGLL", 16, 1 }, + { "PGFL", 15, 1 }, + { "PKTQ", 14, 1 }, + { "PKFL", 13, 1 }, + { "PPM3", 12, 1 }, + { "PPM2", 11, 1 }, + { "PPM1", 10, 1 }, + { "PPM0", 9, 1 }, + { "SPMX", 8, 1 }, + { "CDL3", 7, 1 }, + { "CDL2", 6, 1 }, + { "CDL1", 5, 1 }, + { "CDL0", 4, 1 }, + { "CDM3", 3, 1 }, + { "CDM2", 2, 1 }, + { "CDM1", 1, 1 }, + { "CDM0", 0, 1 }, + { "MPS_RX_PERR_ENABLE", 0x1107c, 0 }, + { "FF", 23, 1 }, + { "PGMO", 22, 1 }, + { "PGME", 21, 1 }, + { "CHMN", 20, 1 }, + { "RPLC", 19, 1 }, + { "ATRB", 18, 1 }, + { "PSMX", 17, 1 }, + { "PGLL", 16, 1 }, + { "PGFL", 15, 1 }, + { "PKTQ", 14, 1 }, + { "PKFL", 13, 1 }, + { "PPM3", 12, 1 }, + { "PPM2", 11, 1 }, + { "PPM1", 10, 1 }, + { "PPM0", 9, 1 }, + { "SPMX", 8, 1 }, + { "CDL3", 7, 1 }, + { "CDL2", 6, 1 }, + { "CDL1", 5, 1 }, + { "CDL0", 4, 1 }, + { "CDM3", 3, 1 }, + { "CDM2", 2, 1 }, + { "CDM1", 1, 1 }, + { "CDM0", 0, 1 }, + { "MPS_RX_PERR_INJECT", 0x11080, 0 }, + { "MemSel", 1, 5 }, + { "InjectDataErr", 0, 1 }, + { "MPS_RX_FUNC_INT_CAUSE", 0x11084, 0 }, + { "INT_ERR_INT", 8, 5 }, + { "PG_TH_INT7", 7, 1 }, + { "PG_TH_INT6", 6, 1 }, + { "PG_TH_INT5", 5, 1 }, + { "PG_TH_INT4", 4, 1 }, + { "PG_TH_INT3", 3, 1 }, + { "PG_TH_INT2", 2, 1 }, + { "PG_TH_INT1", 1, 1 }, + { "PG_TH_INT0", 0, 1 }, + { "MPS_RX_FUNC_INT_ENABLE", 0x11088, 0 }, + { "INT_ERR_INT", 8, 5 }, + { "PG_TH_INT7", 7, 1 }, + { "PG_TH_INT6", 6, 1 }, + { "PG_TH_INT5", 5, 1 }, + { "PG_TH_INT4", 4, 1 }, + { "PG_TH_INT3", 3, 1 }, + { "PG_TH_INT2", 2, 1 }, + { "PG_TH_INT1", 1, 1 }, + { "PG_TH_INT0", 0, 1 }, + { "MPS_RX_PAUSE_GEN_TH_0", 0x1108c, 0 }, + { "TH_HIGH", 16, 16 }, + { "TH_LOW", 0, 16 }, + { "MPS_RX_PAUSE_GEN_TH_1", 0x11090, 0 }, + { "TH_HIGH", 16, 16 }, + { "TH_LOW", 0, 16 }, + { "MPS_RX_PAUSE_GEN_TH_2", 0x11094, 0 }, + { "TH_HIGH", 16, 16 }, + { "TH_LOW", 0, 16 }, + { "MPS_RX_PAUSE_GEN_TH_3", 0x11098, 0 }, + { "TH_HIGH", 16, 16 }, + { "TH_LOW", 0, 16 }, + { "MPS_RX_PPP_ATRB", 0x1109c, 0 }, + { "ETYPE", 16, 16 }, + { "OPCODE", 0, 16 }, + { "MPS_RX_QFC0_ATRB", 0x110a0, 0 }, + { "ETYPE", 16, 16 }, + { "DA", 0, 16 }, + { "MPS_RX_QFC1_ATRB", 0x110a4, 0 }, + { "MPS_RX_PT_ARB0", 0x110a8, 0 }, + { "LPBK_WT", 16, 14 }, + { "MAC_WT", 0, 14 }, + { "MPS_RX_PT_ARB1", 0x110ac, 0 }, + { "LPBK_WT", 16, 14 }, + { "MAC_WT", 0, 14 }, + { "MPS_RX_PT_ARB2", 0x110b0, 0 }, + { "LPBK_WT", 16, 14 }, + { "MAC_WT", 0, 14 }, + { "MPS_RX_PT_ARB3", 0x110b4, 0 }, + { "LPBK_WT", 16, 14 }, + { "MAC_WT", 0, 14 }, + { "MPS_RX_PT_ARB4", 0x110b8, 0 }, + { "LPBK_WT", 16, 14 }, + { "MAC_WT", 0, 14 }, + { "MPS_PF_OUT_EN", 0x110bc, 0 }, + { "MPS_BMC_MTU", 0x110c0, 0 }, + { "MPS_BMC_PKT_CNT", 0x110c4, 0 }, + { "MPS_BMC_BYTE_CNT", 0x110c8, 0 }, + { "MPS_PFVF_ATRB_CTL", 0x110cc, 0 }, + { "RD_WRN", 31, 1 }, + { "PFVF", 0, 8 }, + { "MPS_PFVF_ATRB", 0x110d0, 0 }, + { "PF", 28, 3 }, + { "OFF", 18, 1 }, + { "NV_DROP", 17, 1 }, + { "MODE", 16, 1 }, + { "MTU", 0, 14 }, + { "MPS_PFVF_ATRB_FLTR0", 0x110d4, 0 }, + { "VLAN_EN", 16, 1 }, + { "VLAN_ID", 0, 12 }, + { "MPS_PFVF_ATRB_FLTR1", 0x110d8, 0 }, + { "VLAN_EN", 16, 1 }, + { "VLAN_ID", 0, 12 }, + { "MPS_PFVF_ATRB_FLTR2", 0x110dc, 0 }, + { "VLAN_EN", 16, 1 }, + { "VLAN_ID", 0, 12 }, + { "MPS_PFVF_ATRB_FLTR3", 0x110e0, 0 }, + { "VLAN_EN", 16, 1 }, + { "VLAN_ID", 0, 12 }, + { "MPS_PFVF_ATRB_FLTR4", 0x110e4, 0 }, + { "VLAN_EN", 16, 1 }, + { "VLAN_ID", 0, 12 }, + { "MPS_PFVF_ATRB_FLTR5", 0x110e8, 0 }, + { "VLAN_EN", 16, 1 }, + { "VLAN_ID", 0, 12 }, + { "MPS_PFVF_ATRB_FLTR6", 0x110ec, 0 }, + { "VLAN_EN", 16, 1 }, + { "VLAN_ID", 0, 12 }, + { "MPS_PFVF_ATRB_FLTR7", 0x110f0, 0 }, + { "VLAN_EN", 16, 1 }, + { "VLAN_ID", 0, 12 }, + { "MPS_PFVF_ATRB_FLTR8", 0x110f4, 0 }, + { "VLAN_EN", 16, 1 }, + { "VLAN_ID", 0, 12 }, + { "MPS_PFVF_ATRB_FLTR9", 0x110f8, 0 }, + { "VLAN_EN", 16, 1 }, + { "VLAN_ID", 0, 12 }, + { "MPS_PFVF_ATRB_FLTR10", 0x110fc, 0 }, + { "VLAN_EN", 16, 1 }, + { "VLAN_ID", 0, 12 }, + { "MPS_PFVF_ATRB_FLTR11", 0x11100, 0 }, + { "VLAN_EN", 16, 1 }, + { "VLAN_ID", 0, 12 }, + { "MPS_PFVF_ATRB_FLTR12", 0x11104, 0 }, + { "VLAN_EN", 16, 1 }, + { "VLAN_ID", 0, 12 }, + { "MPS_PFVF_ATRB_FLTR13", 0x11108, 0 }, + { "VLAN_EN", 16, 1 }, + { "VLAN_ID", 0, 12 }, + { "MPS_PFVF_ATRB_FLTR14", 0x1110c, 0 }, + { "VLAN_EN", 16, 1 }, + { "VLAN_ID", 0, 12 }, + { "MPS_PFVF_ATRB_FLTR15", 0x11110, 0 }, + { "VLAN_EN", 16, 1 }, + { "VLAN_ID", 0, 12 }, + { "MPS_RPLC_MAP_CTL", 0x11114, 0 }, + { "RD_WRN", 31, 1 }, + { "ADDR", 0, 10 }, + { "MPS_PF_RPLCT_MAP", 0x11118, 0 }, + { "MPS_VF_RPLCT_MAP0", 0x1111c, 0 }, + { "MPS_VF_RPLCT_MAP1", 0x11120, 0 }, + { "MPS_VF_RPLCT_MAP2", 0x11124, 0 }, + { "MPS_VF_RPLCT_MAP3", 0x11128, 0 }, + { "MPS_MEM_DBG_CTL", 0x1112c, 0 }, + { "PKD", 17, 1 }, + { "PGD", 16, 1 }, + { "ADDR", 0, 16 }, + { "MPS_PKD_MEM_DATA0", 0x11130, 0 }, + { "MPS_PKD_MEM_DATA1", 0x11134, 0 }, + { "MPS_PKD_MEM_DATA2", 0x11138, 0 }, + { "MPS_PGD_MEM_DATA", 0x1113c, 0 }, + { "MPS_RX_SE_CNT_ERR", 0x11140, 0 }, + { "MPS_RX_SE_CNT_CLR", 0x11144, 0 }, + { "MPS_RX_SE_CNT_IN0", 0x11148, 0 }, + { "SOP_CNT_PM", 24, 8 }, + { "EOP_CNT_PM", 16, 8 }, + { "SOP_CNT_IN", 8, 8 }, + { "EOP_CNT_IN", 0, 8 }, + { "MPS_RX_SE_CNT_IN1", 0x1114c, 0 }, + { "SOP_CNT_PM", 24, 8 }, + { "EOP_CNT_PM", 16, 8 }, + { "SOP_CNT_IN", 8, 8 }, + { "EOP_CNT_IN", 0, 8 }, + { "MPS_RX_SE_CNT_IN2", 0x11150, 0 }, + { "SOP_CNT_PM", 24, 8 }, + { "EOP_CNT_PM", 16, 8 }, + { "SOP_CNT_IN", 8, 8 }, + { "EOP_CNT_IN", 0, 8 }, + { "MPS_RX_SE_CNT_IN3", 0x11154, 0 }, + { "SOP_CNT_PM", 24, 8 }, + { "EOP_CNT_PM", 16, 8 }, + { "SOP_CNT_IN", 8, 8 }, + { "EOP_CNT_IN", 0, 8 }, + { "MPS_RX_SE_CNT_IN4", 0x11158, 0 }, + { "SOP_CNT_PM", 24, 8 }, + { "EOP_CNT_PM", 16, 8 }, + { "SOP_CNT_IN", 8, 8 }, + { "EOP_CNT_IN", 0, 8 }, + { "MPS_RX_SE_CNT_IN5", 0x1115c, 0 }, + { "SOP_CNT_PM", 24, 8 }, + { "EOP_CNT_PM", 16, 8 }, + { "SOP_CNT_IN", 8, 8 }, + { "EOP_CNT_IN", 0, 8 }, + { "MPS_RX_SE_CNT_IN6", 0x11160, 0 }, + { "SOP_CNT_PM", 24, 8 }, + { "EOP_CNT_PM", 16, 8 }, + { "SOP_CNT_IN", 8, 8 }, + { "EOP_CNT_IN", 0, 8 }, + { "MPS_RX_SE_CNT_IN7", 0x11164, 0 }, + { "SOP_CNT_PM", 24, 8 }, + { "EOP_CNT_PM", 16, 8 }, + { "SOP_CNT_IN", 8, 8 }, + { "EOP_CNT_IN", 0, 8 }, + { "MPS_RX_SE_CNT_OUT01", 0x11168, 0 }, + { "SOP_CNT_1", 24, 8 }, + { "EOP_CNT_1", 16, 8 }, + { "SOP_CNT_0", 8, 8 }, + { "EOP_CNT_0", 0, 8 }, + { "MPS_RX_SE_CNT_OUT23", 0x1116c, 0 }, + { "SOP_CNT_3", 24, 8 }, + { "EOP_CNT_3", 16, 8 }, + { "SOP_CNT_2", 8, 8 }, + { "EOP_CNT_2", 0, 8 }, + { "MPS_RX_SPI_ERR", 0x11170, 0 }, + { "LEN_ERR", 21, 4 }, + { "ERR", 0, 21 }, + { "MPS_RX_IN_BUS_STATE", 0x11174, 0 }, + { "ST3", 24, 8 }, + { "ST2", 16, 8 }, + { "ST1", 8, 8 }, + { "ST0", 0, 8 }, + { "MPS_RX_OUT_BUS_STATE", 0x11178, 0 }, + { "ST_NCSI", 23, 9 }, + { "ST_TP", 0, 23 }, + { "MPS_RX_DBG_CTL", 0x1117c, 0 }, + { "OUT_DBG_CHNL", 8, 3 }, + { "DBG_PKD_QSEL", 7, 1 }, + { "DBG_CDS_INV", 6, 1 }, + { "IN_DBG_PORT", 3, 3 }, + { "IN_DBG_CHNL", 0, 3 }, + { "MPS_RX_CLS_DROP_CNT0", 0x11180, 0 }, + { "LPBK_CNT0", 16, 16 }, + { "MAC_CNT0", 0, 16 }, + { "MPS_RX_CLS_DROP_CNT1", 0x11184, 0 }, + { "LPBK_CNT1", 16, 16 }, + { "MAC_CNT1", 0, 16 }, + { "MPS_RX_CLS_DROP_CNT2", 0x11188, 0 }, + { "LPBK_CNT2", 16, 16 }, + { "MAC_CNT2", 0, 16 }, + { "MPS_RX_CLS_DROP_CNT3", 0x1118c, 0 }, + { "LPBK_CNT3", 16, 16 }, + { "MAC_CNT3", 0, 16 }, + { "MPS_RX_SPARE", 0x11190, 0 }, + { "MPS_PORT_RX_CTL", 0x20100, 0 }, + { "NO_RPLCT_M", 20, 1 }, + { "RPLCT_SEL_L", 18, 2 }, + { "FLTR_VLAN_SEL", 17, 1 }, + { "PRIO_VLAN_SEL", 16, 1 }, + { "CHK_8023_LEN_M", 15, 1 }, + { "CHK_8023_LEN_L", 14, 1 }, + { "NIV_DROP", 13, 1 }, + { "NOV_DROP", 12, 1 }, + { "CLS_PRT", 11, 1 }, + { "RX_QFC_EN", 10, 1 }, + { "QFC_FWD_UP", 9, 1 }, + { "PPP_FWD_UP", 8, 1 }, + { "PAUSE_FWD_UP", 7, 1 }, + { "LPBK_BP", 6, 1 }, + { "PASS_NO_MATCH", 5, 1 }, + { "IVLAN_EN", 4, 1 }, + { "OVLAN_EN3", 3, 1 }, + { "OVLAN_EN2", 2, 1 }, + { "OVLAN_EN1", 1, 1 }, + { "OVLAN_EN0", 0, 1 }, + { "MPS_PORT_RX_MTU", 0x20104, 0 }, + { "MPS_PORT_RX_PF_MAP", 0x20108, 0 }, + { "MPS_PORT_RX_VF_MAP0", 0x2010c, 0 }, + { "MPS_PORT_RX_VF_MAP1", 0x20110, 0 }, + { "MPS_PORT_RX_VF_MAP2", 0x20114, 0 }, + { "MPS_PORT_RX_VF_MAP3", 0x20118, 0 }, + { "MPS_PORT_RX_IVLAN", 0x2011c, 0 }, + { "MPS_PORT_RX_OVLAN0", 0x20120, 0 }, + { "OVLAN_MASK", 16, 16 }, + { "OVLAN_ETYPE", 0, 16 }, + { "MPS_PORT_RX_OVLAN1", 0x20124, 0 }, + { "OVLAN_MASK", 16, 16 }, + { "OVLAN_ETYPE", 0, 16 }, + { "MPS_PORT_RX_OVLAN2", 0x20128, 0 }, + { "OVLAN_MASK", 16, 16 }, + { "OVLAN_ETYPE", 0, 16 }, + { "MPS_PORT_RX_OVLAN3", 0x2012c, 0 }, + { "OVLAN_MASK", 16, 16 }, + { "OVLAN_ETYPE", 0, 16 }, + { "MPS_PORT_RX_RSS_HASH", 0x20130, 0 }, + { "MPS_PORT_RX_RSS_CONTROL", 0x20134, 0 }, + { "RSS_CTRL", 16, 8 }, + { "QUE_NUM", 0, 16 }, + { "MPS_PORT_RX_CTL1", 0x20138, 0 }, + { "FIXED_PFVF_MAC", 13, 1 }, + { "FIXED_PFVF_LPBK", 12, 1 }, + { "FIXED_PFVF_LPBK_OV", 11, 1 }, + { "FIXED_PF", 8, 3 }, + { "FIXED_VF_VLD", 7, 1 }, + { "FIXED_VF", 0, 7 }, + { "MPS_PORT_RX_SPARE", 0x2013c, 0 }, + { "MPS_PORT_RX_CTL", 0x22100, 0 }, + { "NO_RPLCT_M", 20, 1 }, + { "RPLCT_SEL_L", 18, 2 }, + { "FLTR_VLAN_SEL", 17, 1 }, + { "PRIO_VLAN_SEL", 16, 1 }, + { "CHK_8023_LEN_M", 15, 1 }, + { "CHK_8023_LEN_L", 14, 1 }, + { "NIV_DROP", 13, 1 }, + { "NOV_DROP", 12, 1 }, + { "CLS_PRT", 11, 1 }, + { "RX_QFC_EN", 10, 1 }, + { "QFC_FWD_UP", 9, 1 }, + { "PPP_FWD_UP", 8, 1 }, + { "PAUSE_FWD_UP", 7, 1 }, + { "LPBK_BP", 6, 1 }, + { "PASS_NO_MATCH", 5, 1 }, + { "IVLAN_EN", 4, 1 }, + { "OVLAN_EN3", 3, 1 }, + { "OVLAN_EN2", 2, 1 }, + { "OVLAN_EN1", 1, 1 }, + { "OVLAN_EN0", 0, 1 }, + { "MPS_PORT_RX_MTU", 0x22104, 0 }, + { "MPS_PORT_RX_PF_MAP", 0x22108, 0 }, + { "MPS_PORT_RX_VF_MAP0", 0x2210c, 0 }, + { "MPS_PORT_RX_VF_MAP1", 0x22110, 0 }, + { "MPS_PORT_RX_VF_MAP2", 0x22114, 0 }, + { "MPS_PORT_RX_VF_MAP3", 0x22118, 0 }, + { "MPS_PORT_RX_IVLAN", 0x2211c, 0 }, + { "MPS_PORT_RX_OVLAN0", 0x22120, 0 }, + { "OVLAN_MASK", 16, 16 }, + { "OVLAN_ETYPE", 0, 16 }, + { "MPS_PORT_RX_OVLAN1", 0x22124, 0 }, + { "OVLAN_MASK", 16, 16 }, + { "OVLAN_ETYPE", 0, 16 }, + { "MPS_PORT_RX_OVLAN2", 0x22128, 0 }, + { "OVLAN_MASK", 16, 16 }, + { "OVLAN_ETYPE", 0, 16 }, + { "MPS_PORT_RX_OVLAN3", 0x2212c, 0 }, + { "OVLAN_MASK", 16, 16 }, + { "OVLAN_ETYPE", 0, 16 }, + { "MPS_PORT_RX_RSS_HASH", 0x22130, 0 }, + { "MPS_PORT_RX_RSS_CONTROL", 0x22134, 0 }, + { "RSS_CTRL", 16, 8 }, + { "QUE_NUM", 0, 16 }, + { "MPS_PORT_RX_CTL1", 0x22138, 0 }, + { "FIXED_PFVF_MAC", 13, 1 }, + { "FIXED_PFVF_LPBK", 12, 1 }, + { "FIXED_PFVF_LPBK_OV", 11, 1 }, + { "FIXED_PF", 8, 3 }, + { "FIXED_VF_VLD", 7, 1 }, + { "FIXED_VF", 0, 7 }, + { "MPS_PORT_RX_SPARE", 0x2213c, 0 }, + { "MPS_PORT_RX_CTL", 0x24100, 0 }, + { "NO_RPLCT_M", 20, 1 }, + { "RPLCT_SEL_L", 18, 2 }, + { "FLTR_VLAN_SEL", 17, 1 }, + { "PRIO_VLAN_SEL", 16, 1 }, + { "CHK_8023_LEN_M", 15, 1 }, + { "CHK_8023_LEN_L", 14, 1 }, + { "NIV_DROP", 13, 1 }, + { "NOV_DROP", 12, 1 }, + { "CLS_PRT", 11, 1 }, + { "RX_QFC_EN", 10, 1 }, + { "QFC_FWD_UP", 9, 1 }, + { "PPP_FWD_UP", 8, 1 }, + { "PAUSE_FWD_UP", 7, 1 }, + { "LPBK_BP", 6, 1 }, + { "PASS_NO_MATCH", 5, 1 }, + { "IVLAN_EN", 4, 1 }, + { "OVLAN_EN3", 3, 1 }, + { "OVLAN_EN2", 2, 1 }, + { "OVLAN_EN1", 1, 1 }, + { "OVLAN_EN0", 0, 1 }, + { "MPS_PORT_RX_MTU", 0x24104, 0 }, + { "MPS_PORT_RX_PF_MAP", 0x24108, 0 }, + { "MPS_PORT_RX_VF_MAP0", 0x2410c, 0 }, + { "MPS_PORT_RX_VF_MAP1", 0x24110, 0 }, + { "MPS_PORT_RX_VF_MAP2", 0x24114, 0 }, + { "MPS_PORT_RX_VF_MAP3", 0x24118, 0 }, + { "MPS_PORT_RX_IVLAN", 0x2411c, 0 }, + { "MPS_PORT_RX_OVLAN0", 0x24120, 0 }, + { "OVLAN_MASK", 16, 16 }, + { "OVLAN_ETYPE", 0, 16 }, + { "MPS_PORT_RX_OVLAN1", 0x24124, 0 }, + { "OVLAN_MASK", 16, 16 }, + { "OVLAN_ETYPE", 0, 16 }, + { "MPS_PORT_RX_OVLAN2", 0x24128, 0 }, + { "OVLAN_MASK", 16, 16 }, + { "OVLAN_ETYPE", 0, 16 }, + { "MPS_PORT_RX_OVLAN3", 0x2412c, 0 }, + { "OVLAN_MASK", 16, 16 }, + { "OVLAN_ETYPE", 0, 16 }, + { "MPS_PORT_RX_RSS_HASH", 0x24130, 0 }, + { "MPS_PORT_RX_RSS_CONTROL", 0x24134, 0 }, + { "RSS_CTRL", 16, 8 }, + { "QUE_NUM", 0, 16 }, + { "MPS_PORT_RX_CTL1", 0x24138, 0 }, + { "FIXED_PFVF_MAC", 13, 1 }, + { "FIXED_PFVF_LPBK", 12, 1 }, + { "FIXED_PFVF_LPBK_OV", 11, 1 }, + { "FIXED_PF", 8, 3 }, + { "FIXED_VF_VLD", 7, 1 }, + { "FIXED_VF", 0, 7 }, + { "MPS_PORT_RX_SPARE", 0x2413c, 0 }, + { "MPS_PORT_RX_CTL", 0x26100, 0 }, + { "NO_RPLCT_M", 20, 1 }, + { "RPLCT_SEL_L", 18, 2 }, + { "FLTR_VLAN_SEL", 17, 1 }, + { "PRIO_VLAN_SEL", 16, 1 }, + { "CHK_8023_LEN_M", 15, 1 }, + { "CHK_8023_LEN_L", 14, 1 }, + { "NIV_DROP", 13, 1 }, + { "NOV_DROP", 12, 1 }, + { "CLS_PRT", 11, 1 }, + { "RX_QFC_EN", 10, 1 }, + { "QFC_FWD_UP", 9, 1 }, + { "PPP_FWD_UP", 8, 1 }, + { "PAUSE_FWD_UP", 7, 1 }, + { "LPBK_BP", 6, 1 }, + { "PASS_NO_MATCH", 5, 1 }, + { "IVLAN_EN", 4, 1 }, + { "OVLAN_EN3", 3, 1 }, + { "OVLAN_EN2", 2, 1 }, + { "OVLAN_EN1", 1, 1 }, + { "OVLAN_EN0", 0, 1 }, + { "MPS_PORT_RX_MTU", 0x26104, 0 }, + { "MPS_PORT_RX_PF_MAP", 0x26108, 0 }, + { "MPS_PORT_RX_VF_MAP0", 0x2610c, 0 }, + { "MPS_PORT_RX_VF_MAP1", 0x26110, 0 }, + { "MPS_PORT_RX_VF_MAP2", 0x26114, 0 }, + { "MPS_PORT_RX_VF_MAP3", 0x26118, 0 }, + { "MPS_PORT_RX_IVLAN", 0x2611c, 0 }, + { "MPS_PORT_RX_OVLAN0", 0x26120, 0 }, + { "OVLAN_MASK", 16, 16 }, + { "OVLAN_ETYPE", 0, 16 }, + { "MPS_PORT_RX_OVLAN1", 0x26124, 0 }, + { "OVLAN_MASK", 16, 16 }, + { "OVLAN_ETYPE", 0, 16 }, + { "MPS_PORT_RX_OVLAN2", 0x26128, 0 }, + { "OVLAN_MASK", 16, 16 }, + { "OVLAN_ETYPE", 0, 16 }, + { "MPS_PORT_RX_OVLAN3", 0x2612c, 0 }, + { "OVLAN_MASK", 16, 16 }, + { "OVLAN_ETYPE", 0, 16 }, + { "MPS_PORT_RX_RSS_HASH", 0x26130, 0 }, + { "MPS_PORT_RX_RSS_CONTROL", 0x26134, 0 }, + { "RSS_CTRL", 16, 8 }, + { "QUE_NUM", 0, 16 }, + { "MPS_PORT_RX_CTL1", 0x26138, 0 }, + { "FIXED_PFVF_MAC", 13, 1 }, + { "FIXED_PFVF_LPBK", 12, 1 }, + { "FIXED_PFVF_LPBK_OV", 11, 1 }, + { "FIXED_PF", 8, 3 }, + { "FIXED_VF_VLD", 7, 1 }, + { "FIXED_VF", 0, 7 }, + { "MPS_PORT_RX_SPARE", 0x2613c, 0 }, + { "MPS_TX_PRTY_SEL", 0x9400, 0 }, + { "Ch4_Prty", 20, 3 }, + { "Ch3_Prty", 16, 3 }, + { "Ch2_Prty", 12, 3 }, + { "Ch1_Prty", 8, 3 }, + { "Ch0_Prty", 4, 3 }, + { "TP_Source", 2, 2 }, + { "NCSI_Source", 0, 2 }, + { "MPS_TX_INT_ENABLE", 0x9404, 0 }, + { "PortErr", 16, 1 }, + { "FRMERR", 15, 1 }, + { "SECNTERR", 14, 1 }, + { "BUBBLE", 13, 1 }, + { "TxDescFifo", 9, 4 }, + { "TxDataFifo", 5, 4 }, + { "Ncsi", 4, 1 }, + { "TP", 0, 4 }, + { "MPS_TX_INT_CAUSE", 0x9408, 0 }, + { "PortErr", 16, 1 }, + { "FRMERR", 15, 1 }, + { "SECNTERR", 14, 1 }, + { "BUBBLE", 13, 1 }, + { "TxDescFifo", 9, 4 }, + { "TxDataFifo", 5, 4 }, + { "Ncsi", 4, 1 }, + { "TP", 0, 4 }, + { "MPS_TX_PERR_ENABLE", 0x9410, 0 }, + { "TxDescFifo", 9, 4 }, + { "TxDataFifo", 5, 4 }, + { "Ncsi", 4, 1 }, + { "TP", 0, 4 }, + { "MPS_TX_PERR_INJECT", 0x9414, 0 }, + { "MemSel", 1, 5 }, + { "InjectDataErr", 0, 1 }, + { "MPS_TX_SE_CNT_TP01", 0x9418, 0 }, + { "SOP_CNT_1", 24, 8 }, + { "EOP_CNT_1", 16, 8 }, + { "SOP_CNT_0", 8, 8 }, + { "EOP_CNT_0", 0, 8 }, + { "MPS_TX_SE_CNT_TP23", 0x941c, 0 }, + { "SOP_CNT_3", 24, 8 }, + { "EOP_CNT_3", 16, 8 }, + { "SOP_CNT_2", 8, 8 }, + { "EOP_CNT_2", 0, 8 }, + { "MPS_TX_SE_CNT_MAC01", 0x9420, 0 }, + { "SOP_CNT_1", 24, 8 }, + { "EOP_CNT_1", 16, 8 }, + { "SOP_CNT_0", 8, 8 }, + { "EOP_CNT_0", 0, 8 }, + { "MPS_TX_SE_CNT_MAC23", 0x9424, 0 }, + { "SOP_CNT_3", 24, 8 }, + { "EOP_CNT_3", 16, 8 }, + { "SOP_CNT_2", 8, 8 }, + { "EOP_CNT_2", 0, 8 }, + { "MPS_TX_SECNT_SPI_BUBBLE_ERR", 0x9428, 0 }, + { "Bubble", 16, 8 }, + { "Spi", 8, 8 }, + { "SeCnt", 0, 8 }, + { "MPS_TX_SECNT_BUBBLE_CLR", 0x942c, 0 }, + { "Bubble", 8, 8 }, + { "SeCnt", 0, 8 }, + { "MPS_TX_PORT_ERR", 0x9430, 0 }, + { "Lpbkpt3", 7, 1 }, + { "Lpbkpt2", 6, 1 }, + { "Lpbkpt1", 5, 1 }, + { "Lpbkpt0", 4, 1 }, + { "pt3", 3, 1 }, + { "pt2", 2, 1 }, + { "pt1", 1, 1 }, + { "pt0", 0, 1 }, + { "MPS_TX_LPBK_DROP_BP_CTL_CH0", 0x9434, 0 }, + { "BpEn", 1, 1 }, + { "DropEn", 0, 1 }, + { "MPS_TX_LPBK_DROP_BP_CTL_CH1", 0x9438, 0 }, + { "BpEn", 1, 1 }, + { "DropEn", 0, 1 }, + { "MPS_TX_LPBK_DROP_BP_CTL_CH2", 0x943c, 0 }, + { "BpEn", 1, 1 }, + { "DropEn", 0, 1 }, + { "MPS_TX_LPBK_DROP_BP_CTL_CH3", 0x9440, 0 }, + { "BpEn", 1, 1 }, + { "DropEn", 0, 1 }, + { "MPS_TX_DEBUG_REG_TP2TX_10", 0x9444, 0 }, + { "SOPCh1", 31, 1 }, + { "EOPCh1", 30, 1 }, + { "SizeCh1", 27, 3 }, + { "ErrCh1", 26, 1 }, + { "FullCh1", 25, 1 }, + { "ValidCh1", 24, 1 }, + { "DataCh1", 16, 8 }, + { "SOPCh0", 15, 1 }, + { "EOPCh0", 14, 1 }, + { "SizeCh0", 11, 3 }, + { "ErrCh0", 10, 1 }, + { "FullCh0", 9, 1 }, + { "ValidCh0", 8, 1 }, + { "DataCh0", 0, 8 }, + { "MPS_TX_DEBUG_REG_TP2TX_32", 0x9448, 0 }, + { "SOPCh3", 31, 1 }, + { "EOPCh3", 30, 1 }, + { "SizeCh3", 27, 3 }, + { "ErrCh3", 26, 1 }, + { "FullCh3", 25, 1 }, + { "ValidCh3", 24, 1 }, + { "DataCh3", 16, 8 }, + { "SOPCh2", 15, 1 }, + { "EOPCh2", 14, 1 }, + { "SizeCh2", 11, 3 }, + { "ErrCh2", 10, 1 }, + { "FullCh2", 9, 1 }, + { "ValidCh2", 8, 1 }, + { "DataCh2", 0, 8 }, + { "MPS_TX_DEBUG_REG_TX2MAC_10", 0x944c, 0 }, + { "SOPPt1", 31, 1 }, + { "EOPPt1", 30, 1 }, + { "SizePt1", 27, 3 }, + { "ErrPt1", 26, 1 }, + { "FullPt1", 25, 1 }, + { "ValidPt1", 24, 1 }, + { "DataPt1", 16, 8 }, + { "SOPPt0", 15, 1 }, + { "EOPPt0", 14, 1 }, + { "SizePt0", 11, 3 }, + { "ErrPt0", 10, 1 }, + { "FullPt0", 9, 1 }, + { "ValidPt0", 8, 1 }, + { "DataPt0", 0, 8 }, + { "MPS_TX_DEBUG_REG_TX2MAC_32", 0x9450, 0 }, + { "SOPPt3", 31, 1 }, + { "EOPPt3", 30, 1 }, + { "SizePt3", 27, 3 }, + { "ErrPt3", 26, 1 }, + { "FullPt3", 25, 1 }, + { "ValidPt3", 24, 1 }, + { "DataPt3", 16, 8 }, + { "SOPPt2", 15, 1 }, + { "EOPPt2", 14, 1 }, + { "SizePt2", 11, 3 }, + { "ErrPt2", 10, 1 }, + { "FullPt2", 9, 1 }, + { "ValidPt2", 8, 1 }, + { "DataPt2", 0, 8 }, + { "MPS_TX_SGE_CH_PAUSE_IGNR", 0x9454, 0 }, + { "MPS_TX_DEBUG_SUBPART_SEL", 0x9458, 0 }, + { "SubPrtH", 11, 5 }, + { "PortH", 8, 3 }, + { "SubPrtL", 3, 5 }, + { "PortL", 0, 3 }, + { "MPS_PF_TX_QINQ_VLAN", 0x1e2e0, 0 }, + { "ProtocolID", 16, 16 }, + { "Priority", 13, 3 }, + { "CFI", 12, 1 }, + { "Tag", 0, 12 }, + { "MPS_PF_TX_QINQ_VLAN", 0x1e6e0, 0 }, + { "ProtocolID", 16, 16 }, + { "Priority", 13, 3 }, + { "CFI", 12, 1 }, + { "Tag", 0, 12 }, + { "MPS_PF_TX_QINQ_VLAN", 0x1eae0, 0 }, + { "ProtocolID", 16, 16 }, + { "Priority", 13, 3 }, + { "CFI", 12, 1 }, + { "Tag", 0, 12 }, + { "MPS_PF_TX_QINQ_VLAN", 0x1eee0, 0 }, + { "ProtocolID", 16, 16 }, + { "Priority", 13, 3 }, + { "CFI", 12, 1 }, + { "Tag", 0, 12 }, + { "MPS_PF_TX_QINQ_VLAN", 0x1f2e0, 0 }, + { "ProtocolID", 16, 16 }, + { "Priority", 13, 3 }, + { "CFI", 12, 1 }, + { "Tag", 0, 12 }, + { "MPS_PF_TX_QINQ_VLAN", 0x1f6e0, 0 }, + { "ProtocolID", 16, 16 }, + { "Priority", 13, 3 }, + { "CFI", 12, 1 }, + { "Tag", 0, 12 }, + { "MPS_PF_TX_QINQ_VLAN", 0x1fae0, 0 }, + { "ProtocolID", 16, 16 }, + { "Priority", 13, 3 }, + { "CFI", 12, 1 }, + { "Tag", 0, 12 }, + { "MPS_PF_TX_QINQ_VLAN", 0x1fee0, 0 }, + { "ProtocolID", 16, 16 }, + { "Priority", 13, 3 }, + { "CFI", 12, 1 }, + { "Tag", 0, 12 }, + { "MPS_PORT_TX_MAC_RELOAD_CH0", 0x20190, 0 }, + { "MPS_PORT_TX_MAC_RELOAD_CH1", 0x20194, 0 }, + { "MPS_PORT_TX_MAC_RELOAD_CH2", 0x20198, 0 }, + { "MPS_PORT_TX_MAC_RELOAD_CH3", 0x2019c, 0 }, + { "MPS_PORT_TX_MAC_RELOAD_CH4", 0x201a0, 0 }, + { "MPS_PORT_TX_LPBK_RELOAD_CH0", 0x201a8, 0 }, + { "MPS_PORT_TX_LPBK_RELOAD_CH1", 0x201ac, 0 }, + { "MPS_PORT_TX_LPBK_RELOAD_CH2", 0x201b0, 0 }, + { "MPS_PORT_TX_LPBK_RELOAD_CH3", 0x201b4, 0 }, + { "MPS_PORT_TX_LPBK_RELOAD_CH4", 0x201b8, 0 }, + { "MPS_PORT_TX_FIFO_CTL", 0x201c4, 0 }, + { "FifoTh", 5, 9 }, + { "FifoEn", 4, 1 }, + { "MaxPktCnt", 0, 4 }, + { "MPS_PORT_FPGA_PAUSE_CTL", 0x201c8, 0 }, + { "MPS_PORT_TX_MAC_RELOAD_CH0", 0x22190, 0 }, + { "MPS_PORT_TX_MAC_RELOAD_CH1", 0x22194, 0 }, + { "MPS_PORT_TX_MAC_RELOAD_CH2", 0x22198, 0 }, + { "MPS_PORT_TX_MAC_RELOAD_CH3", 0x2219c, 0 }, + { "MPS_PORT_TX_MAC_RELOAD_CH4", 0x221a0, 0 }, + { "MPS_PORT_TX_LPBK_RELOAD_CH0", 0x221a8, 0 }, + { "MPS_PORT_TX_LPBK_RELOAD_CH1", 0x221ac, 0 }, + { "MPS_PORT_TX_LPBK_RELOAD_CH2", 0x221b0, 0 }, + { "MPS_PORT_TX_LPBK_RELOAD_CH3", 0x221b4, 0 }, + { "MPS_PORT_TX_LPBK_RELOAD_CH4", 0x221b8, 0 }, + { "MPS_PORT_TX_FIFO_CTL", 0x221c4, 0 }, + { "FifoTh", 5, 9 }, + { "FifoEn", 4, 1 }, + { "MaxPktCnt", 0, 4 }, + { "MPS_PORT_FPGA_PAUSE_CTL", 0x221c8, 0 }, + { "MPS_PORT_TX_MAC_RELOAD_CH0", 0x24190, 0 }, + { "MPS_PORT_TX_MAC_RELOAD_CH1", 0x24194, 0 }, + { "MPS_PORT_TX_MAC_RELOAD_CH2", 0x24198, 0 }, + { "MPS_PORT_TX_MAC_RELOAD_CH3", 0x2419c, 0 }, + { "MPS_PORT_TX_MAC_RELOAD_CH4", 0x241a0, 0 }, + { "MPS_PORT_TX_LPBK_RELOAD_CH0", 0x241a8, 0 }, + { "MPS_PORT_TX_LPBK_RELOAD_CH1", 0x241ac, 0 }, + { "MPS_PORT_TX_LPBK_RELOAD_CH2", 0x241b0, 0 }, + { "MPS_PORT_TX_LPBK_RELOAD_CH3", 0x241b4, 0 }, + { "MPS_PORT_TX_LPBK_RELOAD_CH4", 0x241b8, 0 }, + { "MPS_PORT_TX_FIFO_CTL", 0x241c4, 0 }, + { "FifoTh", 5, 9 }, + { "FifoEn", 4, 1 }, + { "MaxPktCnt", 0, 4 }, + { "MPS_PORT_FPGA_PAUSE_CTL", 0x241c8, 0 }, + { "MPS_PORT_TX_MAC_RELOAD_CH0", 0x26190, 0 }, + { "MPS_PORT_TX_MAC_RELOAD_CH1", 0x26194, 0 }, + { "MPS_PORT_TX_MAC_RELOAD_CH2", 0x26198, 0 }, + { "MPS_PORT_TX_MAC_RELOAD_CH3", 0x2619c, 0 }, + { "MPS_PORT_TX_MAC_RELOAD_CH4", 0x261a0, 0 }, + { "MPS_PORT_TX_LPBK_RELOAD_CH0", 0x261a8, 0 }, + { "MPS_PORT_TX_LPBK_RELOAD_CH1", 0x261ac, 0 }, + { "MPS_PORT_TX_LPBK_RELOAD_CH2", 0x261b0, 0 }, + { "MPS_PORT_TX_LPBK_RELOAD_CH3", 0x261b4, 0 }, + { "MPS_PORT_TX_LPBK_RELOAD_CH4", 0x261b8, 0 }, + { "MPS_PORT_TX_FIFO_CTL", 0x261c4, 0 }, + { "FifoTh", 5, 9 }, + { "FifoEn", 4, 1 }, + { "MaxPktCnt", 0, 4 }, + { "MPS_PORT_FPGA_PAUSE_CTL", 0x261c8, 0 }, + { "MPS_TRC_CFG", 0x9800, 0 }, + { "TrcFifoEmpty", 4, 1 }, + { "TrcIgnoreDropInput", 3, 1 }, + { "TrcKeepDuplicates", 2, 1 }, + { "TrcEn", 1, 1 }, + { "TrcMultiFilter", 0, 1 }, + { "MPS_TRC_RSS_HASH", 0x9804, 0 }, + { "MPS_TRC_RSS_CONTROL", 0x9808, 0 }, + { "RssControl", 16, 8 }, + { "QueueNumber", 0, 16 }, + { "MPS_TRC_FILTER_MATCH_CTL_A", 0x9810, 0 }, + { "TfInvertMatch", 24, 1 }, + { "TfPktTooLarge", 23, 1 }, + { "TfEn", 22, 1 }, + { "TfPort", 18, 4 }, + { "TfDrop", 17, 1 }, + { "TfSopEopErr", 16, 1 }, + { "TfLength", 8, 5 }, + { "TfOffset", 0, 5 }, + { "MPS_TRC_FILTER_MATCH_CTL_A", 0x9814, 0 }, + { "TfInvertMatch", 24, 1 }, + { "TfPktTooLarge", 23, 1 }, + { "TfEn", 22, 1 }, + { "TfPort", 18, 4 }, + { "TfDrop", 17, 1 }, + { "TfSopEopErr", 16, 1 }, + { "TfLength", 8, 5 }, + { "TfOffset", 0, 5 }, + { "MPS_TRC_FILTER_MATCH_CTL_A", 0x9818, 0 }, + { "TfInvertMatch", 24, 1 }, + { "TfPktTooLarge", 23, 1 }, + { "TfEn", 22, 1 }, + { "TfPort", 18, 4 }, + { "TfDrop", 17, 1 }, + { "TfSopEopErr", 16, 1 }, + { "TfLength", 8, 5 }, + { "TfOffset", 0, 5 }, + { "MPS_TRC_FILTER_MATCH_CTL_A", 0x981c, 0 }, + { "TfInvertMatch", 24, 1 }, + { "TfPktTooLarge", 23, 1 }, + { "TfEn", 22, 1 }, + { "TfPort", 18, 4 }, + { "TfDrop", 17, 1 }, + { "TfSopEopErr", 16, 1 }, + { "TfLength", 8, 5 }, + { "TfOffset", 0, 5 }, + { "MPS_TRC_FILTER_MATCH_CTL_B", 0x9820, 0 }, + { "TfMinPktSize", 16, 9 }, + { "TfCaptureMax", 0, 14 }, + { "MPS_TRC_FILTER_MATCH_CTL_B", 0x9824, 0 }, + { "TfMinPktSize", 16, 9 }, + { "TfCaptureMax", 0, 14 }, + { "MPS_TRC_FILTER_MATCH_CTL_B", 0x9828, 0 }, + { "TfMinPktSize", 16, 9 }, + { "TfCaptureMax", 0, 14 }, + { "MPS_TRC_FILTER_MATCH_CTL_B", 0x982c, 0 }, + { "TfMinPktSize", 16, 9 }, + { "TfCaptureMax", 0, 14 }, + { "MPS_TRC_FILTER_RUNT_CTL", 0x9830, 0 }, + { "MPS_TRC_FILTER_RUNT_CTL", 0x9834, 0 }, + { "MPS_TRC_FILTER_RUNT_CTL", 0x9838, 0 }, + { "MPS_TRC_FILTER_RUNT_CTL", 0x983c, 0 }, + { "MPS_TRC_FILTER_DROP", 0x9840, 0 }, + { "TfDropInpCount", 16, 16 }, + { "TfDropBufferCount", 0, 16 }, + { "MPS_TRC_FILTER_DROP", 0x9844, 0 }, + { "TfDropInpCount", 16, 16 }, + { "TfDropBufferCount", 0, 16 }, + { "MPS_TRC_FILTER_DROP", 0x9848, 0 }, + { "TfDropInpCount", 16, 16 }, + { "TfDropBufferCount", 0, 16 }, + { "MPS_TRC_FILTER_DROP", 0x984c, 0 }, + { "TfDropInpCount", 16, 16 }, + { "TfDropBufferCount", 0, 16 }, + { "MPS_TRC_PERR_INJECT", 0x9850, 0 }, + { "MemSel", 1, 4 }, + { "InjectDataErr", 0, 1 }, + { "MPS_TRC_PERR_ENABLE", 0x9854, 0 }, + { "MiscPerr", 8, 1 }, + { "PktFifo", 4, 4 }, + { "FiltMem", 0, 4 }, + { "MPS_TRC_INT_ENABLE", 0x9858, 0 }, + { "PLErrEnb", 9, 1 }, + { "MiscPerr", 8, 1 }, + { "PktFifo", 4, 4 }, + { "FiltMem", 0, 4 }, + { "MPS_TRC_INT_CAUSE", 0x985c, 0 }, + { "PLErrEnb", 9, 1 }, + { "MiscPerr", 8, 1 }, + { "PktFifo", 4, 4 }, + { "FiltMem", 0, 4 }, + { "MPS_TRC_TIMESTAMP_L", 0x9860, 0 }, + { "MPS_TRC_TIMESTAMP_H", 0x9864, 0 }, + { "MPS_TRC_FILTER0_MATCH", 0x9c00, 0 }, + { "MPS_TRC_FILTER0_MATCH", 0x9c04, 0 }, + { "MPS_TRC_FILTER0_MATCH", 0x9c08, 0 }, + { "MPS_TRC_FILTER0_MATCH", 0x9c0c, 0 }, + { "MPS_TRC_FILTER0_MATCH", 0x9c10, 0 }, + { "MPS_TRC_FILTER0_MATCH", 0x9c14, 0 }, + { "MPS_TRC_FILTER0_MATCH", 0x9c18, 0 }, + { "MPS_TRC_FILTER0_MATCH", 0x9c1c, 0 }, + { "MPS_TRC_FILTER0_MATCH", 0x9c20, 0 }, + { "MPS_TRC_FILTER0_MATCH", 0x9c24, 0 }, + { "MPS_TRC_FILTER0_MATCH", 0x9c28, 0 }, + { "MPS_TRC_FILTER0_MATCH", 0x9c2c, 0 }, + { "MPS_TRC_FILTER0_MATCH", 0x9c30, 0 }, + { "MPS_TRC_FILTER0_MATCH", 0x9c34, 0 }, + { "MPS_TRC_FILTER0_MATCH", 0x9c38, 0 }, + { "MPS_TRC_FILTER0_MATCH", 0x9c3c, 0 }, + { "MPS_TRC_FILTER0_MATCH", 0x9c40, 0 }, + { "MPS_TRC_FILTER0_MATCH", 0x9c44, 0 }, + { "MPS_TRC_FILTER0_MATCH", 0x9c48, 0 }, + { "MPS_TRC_FILTER0_MATCH", 0x9c4c, 0 }, + { "MPS_TRC_FILTER0_MATCH", 0x9c50, 0 }, + { "MPS_TRC_FILTER0_MATCH", 0x9c54, 0 }, + { "MPS_TRC_FILTER0_MATCH", 0x9c58, 0 }, + { "MPS_TRC_FILTER0_MATCH", 0x9c5c, 0 }, + { "MPS_TRC_FILTER0_MATCH", 0x9c60, 0 }, + { "MPS_TRC_FILTER0_MATCH", 0x9c64, 0 }, + { "MPS_TRC_FILTER0_MATCH", 0x9c68, 0 }, + { "MPS_TRC_FILTER0_MATCH", 0x9c6c, 0 }, + { "MPS_TRC_FILTER0_DONT_CARE", 0x9c80, 0 }, + { "MPS_TRC_FILTER0_DONT_CARE", 0x9c84, 0 }, + { "MPS_TRC_FILTER0_DONT_CARE", 0x9c88, 0 }, + { "MPS_TRC_FILTER0_DONT_CARE", 0x9c8c, 0 }, + { "MPS_TRC_FILTER0_DONT_CARE", 0x9c90, 0 }, + { "MPS_TRC_FILTER0_DONT_CARE", 0x9c94, 0 }, + { "MPS_TRC_FILTER0_DONT_CARE", 0x9c98, 0 }, + { "MPS_TRC_FILTER0_DONT_CARE", 0x9c9c, 0 }, + { "MPS_TRC_FILTER0_DONT_CARE", 0x9ca0, 0 }, + { "MPS_TRC_FILTER0_DONT_CARE", 0x9ca4, 0 }, + { "MPS_TRC_FILTER0_DONT_CARE", 0x9ca8, 0 }, + { "MPS_TRC_FILTER0_DONT_CARE", 0x9cac, 0 }, + { "MPS_TRC_FILTER0_DONT_CARE", 0x9cb0, 0 }, + { "MPS_TRC_FILTER0_DONT_CARE", 0x9cb4, 0 }, + { "MPS_TRC_FILTER0_DONT_CARE", 0x9cb8, 0 }, + { "MPS_TRC_FILTER0_DONT_CARE", 0x9cbc, 0 }, + { "MPS_TRC_FILTER0_DONT_CARE", 0x9cc0, 0 }, + { "MPS_TRC_FILTER0_DONT_CARE", 0x9cc4, 0 }, + { "MPS_TRC_FILTER0_DONT_CARE", 0x9cc8, 0 }, + { "MPS_TRC_FILTER0_DONT_CARE", 0x9ccc, 0 }, + { "MPS_TRC_FILTER0_DONT_CARE", 0x9cd0, 0 }, + { "MPS_TRC_FILTER0_DONT_CARE", 0x9cd4, 0 }, + { "MPS_TRC_FILTER0_DONT_CARE", 0x9cd8, 0 }, + { "MPS_TRC_FILTER0_DONT_CARE", 0x9cdc, 0 }, + { "MPS_TRC_FILTER0_DONT_CARE", 0x9ce0, 0 }, + { "MPS_TRC_FILTER0_DONT_CARE", 0x9ce4, 0 }, + { "MPS_TRC_FILTER0_DONT_CARE", 0x9ce8, 0 }, + { "MPS_TRC_FILTER0_DONT_CARE", 0x9cec, 0 }, + { "MPS_TRC_FILTER1_MATCH", 0x9d00, 0 }, + { "MPS_TRC_FILTER1_MATCH", 0x9d04, 0 }, + { "MPS_TRC_FILTER1_MATCH", 0x9d08, 0 }, + { "MPS_TRC_FILTER1_MATCH", 0x9d0c, 0 }, + { "MPS_TRC_FILTER1_MATCH", 0x9d10, 0 }, + { "MPS_TRC_FILTER1_MATCH", 0x9d14, 0 }, + { "MPS_TRC_FILTER1_MATCH", 0x9d18, 0 }, + { "MPS_TRC_FILTER1_MATCH", 0x9d1c, 0 }, + { "MPS_TRC_FILTER1_MATCH", 0x9d20, 0 }, + { "MPS_TRC_FILTER1_MATCH", 0x9d24, 0 }, + { "MPS_TRC_FILTER1_MATCH", 0x9d28, 0 }, + { "MPS_TRC_FILTER1_MATCH", 0x9d2c, 0 }, + { "MPS_TRC_FILTER1_MATCH", 0x9d30, 0 }, + { "MPS_TRC_FILTER1_MATCH", 0x9d34, 0 }, + { "MPS_TRC_FILTER1_MATCH", 0x9d38, 0 }, + { "MPS_TRC_FILTER1_MATCH", 0x9d3c, 0 }, + { "MPS_TRC_FILTER1_MATCH", 0x9d40, 0 }, + { "MPS_TRC_FILTER1_MATCH", 0x9d44, 0 }, + { "MPS_TRC_FILTER1_MATCH", 0x9d48, 0 }, + { "MPS_TRC_FILTER1_MATCH", 0x9d4c, 0 }, + { "MPS_TRC_FILTER1_MATCH", 0x9d50, 0 }, + { "MPS_TRC_FILTER1_MATCH", 0x9d54, 0 }, + { "MPS_TRC_FILTER1_MATCH", 0x9d58, 0 }, + { "MPS_TRC_FILTER1_MATCH", 0x9d5c, 0 }, + { "MPS_TRC_FILTER1_MATCH", 0x9d60, 0 }, + { "MPS_TRC_FILTER1_MATCH", 0x9d64, 0 }, + { "MPS_TRC_FILTER1_MATCH", 0x9d68, 0 }, + { "MPS_TRC_FILTER1_MATCH", 0x9d6c, 0 }, + { "MPS_TRC_FILTER1_DONT_CARE", 0x9d80, 0 }, + { "MPS_TRC_FILTER1_DONT_CARE", 0x9d84, 0 }, + { "MPS_TRC_FILTER1_DONT_CARE", 0x9d88, 0 }, + { "MPS_TRC_FILTER1_DONT_CARE", 0x9d8c, 0 }, + { "MPS_TRC_FILTER1_DONT_CARE", 0x9d90, 0 }, + { "MPS_TRC_FILTER1_DONT_CARE", 0x9d94, 0 }, + { "MPS_TRC_FILTER1_DONT_CARE", 0x9d98, 0 }, + { "MPS_TRC_FILTER1_DONT_CARE", 0x9d9c, 0 }, + { "MPS_TRC_FILTER1_DONT_CARE", 0x9da0, 0 }, + { "MPS_TRC_FILTER1_DONT_CARE", 0x9da4, 0 }, + { "MPS_TRC_FILTER1_DONT_CARE", 0x9da8, 0 }, + { "MPS_TRC_FILTER1_DONT_CARE", 0x9dac, 0 }, + { "MPS_TRC_FILTER1_DONT_CARE", 0x9db0, 0 }, + { "MPS_TRC_FILTER1_DONT_CARE", 0x9db4, 0 }, + { "MPS_TRC_FILTER1_DONT_CARE", 0x9db8, 0 }, + { "MPS_TRC_FILTER1_DONT_CARE", 0x9dbc, 0 }, + { "MPS_TRC_FILTER1_DONT_CARE", 0x9dc0, 0 }, + { "MPS_TRC_FILTER1_DONT_CARE", 0x9dc4, 0 }, + { "MPS_TRC_FILTER1_DONT_CARE", 0x9dc8, 0 }, + { "MPS_TRC_FILTER1_DONT_CARE", 0x9dcc, 0 }, + { "MPS_TRC_FILTER1_DONT_CARE", 0x9dd0, 0 }, + { "MPS_TRC_FILTER1_DONT_CARE", 0x9dd4, 0 }, + { "MPS_TRC_FILTER1_DONT_CARE", 0x9dd8, 0 }, + { "MPS_TRC_FILTER1_DONT_CARE", 0x9ddc, 0 }, + { "MPS_TRC_FILTER1_DONT_CARE", 0x9de0, 0 }, + { "MPS_TRC_FILTER1_DONT_CARE", 0x9de4, 0 }, + { "MPS_TRC_FILTER1_DONT_CARE", 0x9de8, 0 }, + { "MPS_TRC_FILTER1_DONT_CARE", 0x9dec, 0 }, + { "MPS_TRC_FILTER2_MATCH", 0x9e00, 0 }, + { "MPS_TRC_FILTER2_MATCH", 0x9e04, 0 }, + { "MPS_TRC_FILTER2_MATCH", 0x9e08, 0 }, + { "MPS_TRC_FILTER2_MATCH", 0x9e0c, 0 }, + { "MPS_TRC_FILTER2_MATCH", 0x9e10, 0 }, + { "MPS_TRC_FILTER2_MATCH", 0x9e14, 0 }, + { "MPS_TRC_FILTER2_MATCH", 0x9e18, 0 }, + { "MPS_TRC_FILTER2_MATCH", 0x9e1c, 0 }, + { "MPS_TRC_FILTER2_MATCH", 0x9e20, 0 }, + { "MPS_TRC_FILTER2_MATCH", 0x9e24, 0 }, + { "MPS_TRC_FILTER2_MATCH", 0x9e28, 0 }, + { "MPS_TRC_FILTER2_MATCH", 0x9e2c, 0 }, + { "MPS_TRC_FILTER2_MATCH", 0x9e30, 0 }, + { "MPS_TRC_FILTER2_MATCH", 0x9e34, 0 }, + { "MPS_TRC_FILTER2_MATCH", 0x9e38, 0 }, + { "MPS_TRC_FILTER2_MATCH", 0x9e3c, 0 }, + { "MPS_TRC_FILTER2_MATCH", 0x9e40, 0 }, + { "MPS_TRC_FILTER2_MATCH", 0x9e44, 0 }, + { "MPS_TRC_FILTER2_MATCH", 0x9e48, 0 }, + { "MPS_TRC_FILTER2_MATCH", 0x9e4c, 0 }, + { "MPS_TRC_FILTER2_MATCH", 0x9e50, 0 }, + { "MPS_TRC_FILTER2_MATCH", 0x9e54, 0 }, + { "MPS_TRC_FILTER2_MATCH", 0x9e58, 0 }, + { "MPS_TRC_FILTER2_MATCH", 0x9e5c, 0 }, + { "MPS_TRC_FILTER2_MATCH", 0x9e60, 0 }, + { "MPS_TRC_FILTER2_MATCH", 0x9e64, 0 }, + { "MPS_TRC_FILTER2_MATCH", 0x9e68, 0 }, + { "MPS_TRC_FILTER2_MATCH", 0x9e6c, 0 }, + { "MPS_TRC_FILTER2_DONT_CARE", 0x9e80, 0 }, + { "MPS_TRC_FILTER2_DONT_CARE", 0x9e84, 0 }, + { "MPS_TRC_FILTER2_DONT_CARE", 0x9e88, 0 }, + { "MPS_TRC_FILTER2_DONT_CARE", 0x9e8c, 0 }, + { "MPS_TRC_FILTER2_DONT_CARE", 0x9e90, 0 }, + { "MPS_TRC_FILTER2_DONT_CARE", 0x9e94, 0 }, + { "MPS_TRC_FILTER2_DONT_CARE", 0x9e98, 0 }, + { "MPS_TRC_FILTER2_DONT_CARE", 0x9e9c, 0 }, + { "MPS_TRC_FILTER2_DONT_CARE", 0x9ea0, 0 }, + { "MPS_TRC_FILTER2_DONT_CARE", 0x9ea4, 0 }, + { "MPS_TRC_FILTER2_DONT_CARE", 0x9ea8, 0 }, + { "MPS_TRC_FILTER2_DONT_CARE", 0x9eac, 0 }, + { "MPS_TRC_FILTER2_DONT_CARE", 0x9eb0, 0 }, + { "MPS_TRC_FILTER2_DONT_CARE", 0x9eb4, 0 }, + { "MPS_TRC_FILTER2_DONT_CARE", 0x9eb8, 0 }, + { "MPS_TRC_FILTER2_DONT_CARE", 0x9ebc, 0 }, + { "MPS_TRC_FILTER2_DONT_CARE", 0x9ec0, 0 }, + { "MPS_TRC_FILTER2_DONT_CARE", 0x9ec4, 0 }, + { "MPS_TRC_FILTER2_DONT_CARE", 0x9ec8, 0 }, + { "MPS_TRC_FILTER2_DONT_CARE", 0x9ecc, 0 }, + { "MPS_TRC_FILTER2_DONT_CARE", 0x9ed0, 0 }, + { "MPS_TRC_FILTER2_DONT_CARE", 0x9ed4, 0 }, + { "MPS_TRC_FILTER2_DONT_CARE", 0x9ed8, 0 }, + { "MPS_TRC_FILTER2_DONT_CARE", 0x9edc, 0 }, + { "MPS_TRC_FILTER2_DONT_CARE", 0x9ee0, 0 }, + { "MPS_TRC_FILTER2_DONT_CARE", 0x9ee4, 0 }, + { "MPS_TRC_FILTER2_DONT_CARE", 0x9ee8, 0 }, + { "MPS_TRC_FILTER2_DONT_CARE", 0x9eec, 0 }, + { "MPS_TRC_FILTER3_MATCH", 0x9f00, 0 }, + { "MPS_TRC_FILTER3_MATCH", 0x9f04, 0 }, + { "MPS_TRC_FILTER3_MATCH", 0x9f08, 0 }, + { "MPS_TRC_FILTER3_MATCH", 0x9f0c, 0 }, + { "MPS_TRC_FILTER3_MATCH", 0x9f10, 0 }, + { "MPS_TRC_FILTER3_MATCH", 0x9f14, 0 }, + { "MPS_TRC_FILTER3_MATCH", 0x9f18, 0 }, + { "MPS_TRC_FILTER3_MATCH", 0x9f1c, 0 }, + { "MPS_TRC_FILTER3_MATCH", 0x9f20, 0 }, + { "MPS_TRC_FILTER3_MATCH", 0x9f24, 0 }, + { "MPS_TRC_FILTER3_MATCH", 0x9f28, 0 }, + { "MPS_TRC_FILTER3_MATCH", 0x9f2c, 0 }, + { "MPS_TRC_FILTER3_MATCH", 0x9f30, 0 }, + { "MPS_TRC_FILTER3_MATCH", 0x9f34, 0 }, + { "MPS_TRC_FILTER3_MATCH", 0x9f38, 0 }, + { "MPS_TRC_FILTER3_MATCH", 0x9f3c, 0 }, + { "MPS_TRC_FILTER3_MATCH", 0x9f40, 0 }, + { "MPS_TRC_FILTER3_MATCH", 0x9f44, 0 }, + { "MPS_TRC_FILTER3_MATCH", 0x9f48, 0 }, + { "MPS_TRC_FILTER3_MATCH", 0x9f4c, 0 }, + { "MPS_TRC_FILTER3_MATCH", 0x9f50, 0 }, + { "MPS_TRC_FILTER3_MATCH", 0x9f54, 0 }, + { "MPS_TRC_FILTER3_MATCH", 0x9f58, 0 }, + { "MPS_TRC_FILTER3_MATCH", 0x9f5c, 0 }, + { "MPS_TRC_FILTER3_MATCH", 0x9f60, 0 }, + { "MPS_TRC_FILTER3_MATCH", 0x9f64, 0 }, + { "MPS_TRC_FILTER3_MATCH", 0x9f68, 0 }, + { "MPS_TRC_FILTER3_MATCH", 0x9f6c, 0 }, + { "MPS_TRC_FILTER3_DONT_CARE", 0x9f80, 0 }, + { "MPS_TRC_FILTER3_DONT_CARE", 0x9f84, 0 }, + { "MPS_TRC_FILTER3_DONT_CARE", 0x9f88, 0 }, + { "MPS_TRC_FILTER3_DONT_CARE", 0x9f8c, 0 }, + { "MPS_TRC_FILTER3_DONT_CARE", 0x9f90, 0 }, + { "MPS_TRC_FILTER3_DONT_CARE", 0x9f94, 0 }, + { "MPS_TRC_FILTER3_DONT_CARE", 0x9f98, 0 }, + { "MPS_TRC_FILTER3_DONT_CARE", 0x9f9c, 0 }, + { "MPS_TRC_FILTER3_DONT_CARE", 0x9fa0, 0 }, + { "MPS_TRC_FILTER3_DONT_CARE", 0x9fa4, 0 }, + { "MPS_TRC_FILTER3_DONT_CARE", 0x9fa8, 0 }, + { "MPS_TRC_FILTER3_DONT_CARE", 0x9fac, 0 }, + { "MPS_TRC_FILTER3_DONT_CARE", 0x9fb0, 0 }, + { "MPS_TRC_FILTER3_DONT_CARE", 0x9fb4, 0 }, + { "MPS_TRC_FILTER3_DONT_CARE", 0x9fb8, 0 }, + { "MPS_TRC_FILTER3_DONT_CARE", 0x9fbc, 0 }, + { "MPS_TRC_FILTER3_DONT_CARE", 0x9fc0, 0 }, + { "MPS_TRC_FILTER3_DONT_CARE", 0x9fc4, 0 }, + { "MPS_TRC_FILTER3_DONT_CARE", 0x9fc8, 0 }, + { "MPS_TRC_FILTER3_DONT_CARE", 0x9fcc, 0 }, + { "MPS_TRC_FILTER3_DONT_CARE", 0x9fd0, 0 }, + { "MPS_TRC_FILTER3_DONT_CARE", 0x9fd4, 0 }, + { "MPS_TRC_FILTER3_DONT_CARE", 0x9fd8, 0 }, + { "MPS_TRC_FILTER3_DONT_CARE", 0x9fdc, 0 }, + { "MPS_TRC_FILTER3_DONT_CARE", 0x9fe0, 0 }, + { "MPS_TRC_FILTER3_DONT_CARE", 0x9fe4, 0 }, + { "MPS_TRC_FILTER3_DONT_CARE", 0x9fe8, 0 }, + { "MPS_TRC_FILTER3_DONT_CARE", 0x9fec, 0 }, + { "MPS_STAT_CTL", 0x9600, 0 }, + { "CountVFinPF", 1, 1 }, + { "LpbkErrStat", 0, 1 }, + { "MPS_STAT_INT_ENABLE", 0x9608, 0 }, + { "MPS_STAT_INT_CAUSE", 0x960c, 0 }, + { "MPS_STAT_PERR_INT_ENABLE_SRAM", 0x9610, 0 }, + { "Rxbg", 20, 1 }, + { "Rxvf", 18, 2 }, + { "Txvf", 16, 2 }, + { "Rxpf", 13, 3 }, + { "Txpf", 11, 2 }, + { "Rxport", 7, 4 }, + { "Lbport", 4, 3 }, + { "Txport", 0, 4 }, + { "MPS_STAT_PERR_INT_CAUSE_SRAM", 0x9614, 0 }, + { "Rxbg", 20, 1 }, + { "Rxvf", 18, 2 }, + { "Txvf", 16, 2 }, + { "Rxpf", 13, 3 }, + { "Txpf", 11, 2 }, + { "Rxport", 7, 4 }, + { "Lbport", 4, 3 }, + { "Txport", 0, 4 }, + { "MPS_STAT_PERR_ENABLE_SRAM", 0x9618, 0 }, + { "Rxbg", 20, 1 }, + { "Rxvf", 18, 2 }, + { "Txvf", 16, 2 }, + { "Rxpf", 13, 3 }, + { "Txpf", 11, 2 }, + { "Rxport", 7, 4 }, + { "Lbport", 4, 3 }, + { "Txport", 0, 4 }, + { "MPS_STAT_PERR_INT_ENABLE_TX_FIFO", 0x961c, 0 }, + { "Tx", 12, 8 }, + { "Pause", 8, 4 }, + { "Drop", 0, 8 }, + { "MPS_STAT_PERR_INT_CAUSE_TX_FIFO", 0x9620, 0 }, + { "Tx", 12, 8 }, + { "Pause", 8, 4 }, + { "Drop", 0, 8 }, + { "MPS_STAT_PERR_ENABLE_TX_FIFO", 0x9624, 0 }, + { "Tx", 12, 8 }, + { "Pause", 8, 4 }, + { "Drop", 0, 8 }, + { "MPS_STAT_PERR_INT_ENABLE_RX_FIFO", 0x9628, 0 }, + { "Pause", 20, 4 }, + { "Lpbk", 16, 4 }, + { "Nq", 8, 8 }, + { "PV", 4, 4 }, + { "Mac", 0, 4 }, + { "MPS_STAT_PERR_INT_CAUSE_RX_FIFO", 0x962c, 0 }, + { "Pause", 20, 4 }, + { "Lpbk", 16, 4 }, + { "Nq", 8, 8 }, + { "PV", 4, 4 }, + { "Mac", 0, 4 }, + { "MPS_STAT_PERR_ENABLE_RX_FIFO", 0x9630, 0 }, + { "Pause", 20, 4 }, + { "Lpbk", 16, 4 }, + { "Nq", 8, 8 }, + { "PV", 4, 4 }, + { "Mac", 0, 4 }, + { "MPS_STAT_PERR_INJECT", 0x9634, 0 }, + { "MemSel", 1, 7 }, + { "InjectDataErr", 0, 1 }, + { "MPS_STAT_DEBUG_SUB_SEL", 0x9638, 0 }, + { "SubPrtH", 5, 5 }, + { "SubPrtL", 0, 5 }, + { "MPS_STAT_RX_BG_0_MAC_DROP_FRAME_L", 0x9640, 0 }, + { "MPS_STAT_RX_BG_0_MAC_DROP_FRAME_H", 0x9644, 0 }, + { "MPS_STAT_RX_BG_1_MAC_DROP_FRAME_L", 0x9648, 0 }, + { "MPS_STAT_RX_BG_1_MAC_DROP_FRAME_H", 0x964c, 0 }, + { "MPS_STAT_RX_BG_2_MAC_DROP_FRAME_L", 0x9650, 0 }, + { "MPS_STAT_RX_BG_2_MAC_DROP_FRAME_H", 0x9654, 0 }, + { "MPS_STAT_RX_BG_3_MAC_DROP_FRAME_L", 0x9658, 0 }, + { "MPS_STAT_RX_BG_3_MAC_DROP_FRAME_H", 0x965c, 0 }, + { "MPS_STAT_RX_BG_0_LB_DROP_FRAME_L", 0x9660, 0 }, + { "MPS_STAT_RX_BG_0_LB_DROP_FRAME_H", 0x9664, 0 }, + { "MPS_STAT_RX_BG_1_LB_DROP_FRAME_L", 0x9668, 0 }, + { "MPS_STAT_RX_BG_1_LB_DROP_FRAME_H", 0x966c, 0 }, + { "MPS_STAT_RX_BG_2_LB_DROP_FRAME_L", 0x9670, 0 }, + { "MPS_STAT_RX_BG_2_LB_DROP_FRAME_H", 0x9674, 0 }, + { "MPS_STAT_RX_BG_3_LB_DROP_FRAME_L", 0x9678, 0 }, + { "MPS_STAT_RX_BG_3_LB_DROP_FRAME_H", 0x967c, 0 }, + { "MPS_STAT_RX_BG_0_MAC_TRUNC_FRAME_L", 0x9680, 0 }, + { "MPS_STAT_RX_BG_0_MAC_TRUNC_FRAME_H", 0x9684, 0 }, + { "MPS_STAT_RX_BG_1_MAC_TRUNC_FRAME_L", 0x9688, 0 }, + { "MPS_STAT_RX_BG_1_MAC_TRUNC_FRAME_H", 0x968c, 0 }, + { "MPS_STAT_RX_BG_2_MAC_TRUNC_FRAME_L", 0x9690, 0 }, + { "MPS_STAT_RX_BG_2_MAC_TRUNC_FRAME_H", 0x9694, 0 }, + { "MPS_STAT_RX_BG_3_MAC_TRUNC_FRAME_L", 0x9698, 0 }, + { "MPS_STAT_RX_BG_3_MAC_TRUNC_FRAME_H", 0x969c, 0 }, + { "MPS_STAT_RX_BG_0_LB_TRUNC_FRAME_L", 0x96a0, 0 }, + { "MPS_STAT_RX_BG_0_LB_TRUNC_FRAME_H", 0x96a4, 0 }, + { "MPS_STAT_RX_BG_1_LB_TRUNC_FRAME_L", 0x96a8, 0 }, + { "MPS_STAT_RX_BG_1_LB_TRUNC_FRAME_H", 0x96ac, 0 }, + { "MPS_STAT_RX_BG_2_LB_TRUNC_FRAME_L", 0x96b0, 0 }, + { "MPS_STAT_RX_BG_2_LB_TRUNC_FRAME_H", 0x96b4, 0 }, + { "MPS_STAT_RX_BG_3_LB_TRUNC_FRAME_L", 0x96b8, 0 }, + { "MPS_STAT_RX_BG_3_LB_TRUNC_FRAME_H", 0x96bc, 0 }, + { "MPS_PORT_STAT_TX_PORT_BYTES_L", 0x20400, 0 }, + { "MPS_PORT_STAT_TX_PORT_BYTES_H", 0x20404, 0 }, + { "MPS_PORT_STAT_TX_PORT_FRAMES_L", 0x20408, 0 }, + { "MPS_PORT_STAT_TX_PORT_FRAMES_H", 0x2040c, 0 }, + { "MPS_PORT_STAT_TX_PORT_BCAST_L", 0x20410, 0 }, + { "MPS_PORT_STAT_TX_PORT_BCAST_H", 0x20414, 0 }, + { "MPS_PORT_STAT_TX_PORT_MCAST_L", 0x20418, 0 }, + { "MPS_PORT_STAT_TX_PORT_MCAST_H", 0x2041c, 0 }, + { "MPS_PORT_STAT_TX_PORT_UCAST_L", 0x20420, 0 }, + { "MPS_PORT_STAT_TX_PORT_UCAST_H", 0x20424, 0 }, + { "MPS_PORT_STAT_TX_PORT_ERROR_L", 0x20428, 0 }, + { "MPS_PORT_STAT_TX_PORT_ERROR_H", 0x2042c, 0 }, + { "MPS_PORT_STAT_TX_PORT_64B_L", 0x20430, 0 }, + { "MPS_PORT_STAT_TX_PORT_64B_H", 0x20434, 0 }, + { "MPS_PORT_STAT_TX_PORT_65B_127B_L", 0x20438, 0 }, + { "MPS_PORT_STAT_TX_PORT_65B_127B_H", 0x2043c, 0 }, + { "MPS_PORT_STAT_TX_PORT_128B_255B_L", 0x20440, 0 }, + { "MPS_PORT_STAT_TX_PORT_128B_255B_H", 0x20444, 0 }, + { "MPS_PORT_STAT_TX_PORT_256B_511B_L", 0x20448, 0 }, + { "MPS_PORT_STAT_TX_PORT_256B_511B_H", 0x2044c, 0 }, + { "MPS_PORT_STAT_TX_PORT_512B_1023B_L", 0x20450, 0 }, + { "MPS_PORT_STAT_TX_PORT_512B_1023B_H", 0x20454, 0 }, + { "MPS_PORT_STAT_TX_PORT_1024B_1518B_L", 0x20458, 0 }, + { "MPS_PORT_STAT_TX_PORT_1024B_1518B_H", 0x2045c, 0 }, + { "MPS_PORT_STAT_TX_PORT_1519B_MAX_L", 0x20460, 0 }, + { "MPS_PORT_STAT_TX_PORT_1519B_MAX_H", 0x20464, 0 }, + { "MPS_PORT_STAT_TX_PORT_DROP_L", 0x20468, 0 }, + { "MPS_PORT_STAT_TX_PORT_DROP_H", 0x2046c, 0 }, + { "MPS_PORT_STAT_TX_PORT_PAUSE_L", 0x20470, 0 }, + { "MPS_PORT_STAT_TX_PORT_PAUSE_H", 0x20474, 0 }, + { "MPS_PORT_STAT_TX_PORT_PPP0_L", 0x20478, 0 }, + { "MPS_PORT_STAT_TX_PORT_PPP0_H", 0x2047c, 0 }, + { "MPS_PORT_STAT_TX_PORT_PPP1_L", 0x20480, 0 }, + { "MPS_PORT_STAT_TX_PORT_PPP1_H", 0x20484, 0 }, + { "MPS_PORT_STAT_TX_PORT_PPP2_L", 0x20488, 0 }, + { "MPS_PORT_STAT_TX_PORT_PPP2_H", 0x2048c, 0 }, + { "MPS_PORT_STAT_TX_PORT_PPP3_L", 0x20490, 0 }, + { "MPS_PORT_STAT_TX_PORT_PPP3_H", 0x20494, 0 }, + { "MPS_PORT_STAT_TX_PORT_PPP4_L", 0x20498, 0 }, + { "MPS_PORT_STAT_TX_PORT_PPP4_H", 0x2049c, 0 }, + { "MPS_PORT_STAT_TX_PORT_PPP5_L", 0x204a0, 0 }, + { "MPS_PORT_STAT_TX_PORT_PPP5_H", 0x204a4, 0 }, + { "MPS_PORT_STAT_TX_PORT_PPP6_L", 0x204a8, 0 }, + { "MPS_PORT_STAT_TX_PORT_PPP6_H", 0x204ac, 0 }, + { "MPS_PORT_STAT_TX_PORT_PPP7_L", 0x204b0, 0 }, + { "MPS_PORT_STAT_TX_PORT_PPP7_H", 0x204b4, 0 }, + { "MPS_PORT_STAT_LB_PORT_BYTES_L", 0x204c0, 0 }, + { "MPS_PORT_STAT_LB_PORT_BYTES_H", 0x204c4, 0 }, + { "MPS_PORT_STAT_LB_PORT_FRAMES_L", 0x204c8, 0 }, + { "MPS_PORT_STAT_LB_PORT_FRAMES_H", 0x204cc, 0 }, + { "MPS_PORT_STAT_LB_PORT_BCAST_L", 0x204d0, 0 }, + { "MPS_PORT_STAT_LB_PORT_BCAST_H", 0x204d4, 0 }, + { "MPS_PORT_STAT_LB_PORT_MCAST_L", 0x204d8, 0 }, + { "MPS_PORT_STAT_LB_PORT_MCAST_H", 0x204dc, 0 }, + { "MPS_PORT_STAT_LB_PORT_UCAST_L", 0x204e0, 0 }, + { "MPS_PORT_STAT_LB_PORT_UCAST_H", 0x204e4, 0 }, + { "MPS_PORT_STAT_LB_PORT_ERROR_L", 0x204e8, 0 }, + { "MPS_PORT_STAT_LB_PORT_ERROR_H", 0x204ec, 0 }, + { "MPS_PORT_STAT_LB_PORT_64B_L", 0x204f0, 0 }, + { "MPS_PORT_STAT_LB_PORT_64B_H", 0x204f4, 0 }, + { "MPS_PORT_STAT_LB_PORT_65B_127B_L", 0x204f8, 0 }, + { "MPS_PORT_STAT_LB_PORT_65B_127B_H", 0x204fc, 0 }, + { "MPS_PORT_STAT_LB_PORT_128B_255B_L", 0x20500, 0 }, + { "MPS_PORT_STAT_LB_PORT_128B_255B_H", 0x20504, 0 }, + { "MPS_PORT_STAT_LB_PORT_256B_511B_L", 0x20508, 0 }, + { "MPS_PORT_STAT_LB_PORT_256B_511B_H", 0x2050c, 0 }, + { "MPS_PORT_STAT_LB_PORT_512B_1023B_L", 0x20510, 0 }, + { "MPS_PORT_STAT_LB_PORT_512B_1023B_H", 0x20514, 0 }, + { "MPS_PORT_STAT_LB_PORT_1024B_1518B_L", 0x20518, 0 }, + { "MPS_PORT_STAT_LB_PORT_1024B_1518B_H", 0x2051c, 0 }, + { "MPS_PORT_STAT_LB_PORT_1519B_MAX_L", 0x20520, 0 }, + { "MPS_PORT_STAT_LB_PORT_1519B_MAX_H", 0x20524, 0 }, + { "MPS_PORT_STAT_LB_PORT_DROP_FRAMES", 0x20528, 0 }, + { "MPS_PORT_STAT_RX_PORT_BYTES_L", 0x20540, 0 }, + { "MPS_PORT_STAT_RX_PORT_BYTES_H", 0x20544, 0 }, + { "MPS_PORT_STAT_RX_PORT_FRAMES_L", 0x20548, 0 }, + { "MPS_PORT_STAT_RX_PORT_FRAMES_H", 0x2054c, 0 }, + { "MPS_PORT_STAT_RX_PORT_BCAST_L", 0x20550, 0 }, + { "MPS_PORT_STAT_RX_PORT_BCAST_H", 0x20554, 0 }, + { "MPS_PORT_STAT_RX_PORT_MCAST_L", 0x20558, 0 }, + { "MPS_PORT_STAT_RX_PORT_MCAST_H", 0x2055c, 0 }, + { "MPS_PORT_STAT_RX_PORT_UCAST_L", 0x20560, 0 }, + { "MPS_PORT_STAT_RX_PORT_UCAST_H", 0x20564, 0 }, + { "MPS_PORT_STAT_RX_PORT_MTU_ERROR_L", 0x20568, 0 }, + { "MPS_PORT_STAT_RX_PORT_MTU_ERROR_H", 0x2056c, 0 }, + { "MPS_PORT_STAT_RX_PORT_MTU_CRC_ERROR_L", 0x20570, 0 }, + { "MPS_PORT_STAT_RX_PORT_MTU_CRC_ERROR_H", 0x20574, 0 }, + { "MPS_PORT_STAT_RX_PORT_CRC_ERROR_L", 0x20578, 0 }, + { "MPS_PORT_STAT_RX_PORT_CRC_ERROR_H", 0x2057c, 0 }, + { "MPS_PORT_STAT_RX_PORT_LEN_ERROR_L", 0x20580, 0 }, + { "MPS_PORT_STAT_RX_PORT_LEN_ERROR_H", 0x20584, 0 }, + { "MPS_PORT_STAT_RX_PORT_SYM_ERROR_L", 0x20588, 0 }, + { "MPS_PORT_STAT_RX_PORT_SYM_ERROR_H", 0x2058c, 0 }, + { "MPS_PORT_STAT_RX_PORT_64B_L", 0x20590, 0 }, + { "MPS_PORT_STAT_RX_PORT_64B_H", 0x20594, 0 }, + { "MPS_PORT_STAT_RX_PORT_65B_127B_L", 0x20598, 0 }, + { "MPS_PORT_STAT_RX_PORT_65B_127B_H", 0x2059c, 0 }, + { "MPS_PORT_STAT_RX_PORT_128B_255B_L", 0x205a0, 0 }, + { "MPS_PORT_STAT_RX_PORT_128B_255B_H", 0x205a4, 0 }, + { "MPS_PORT_STAT_RX_PORT_256B_511B_L", 0x205a8, 0 }, + { "MPS_PORT_STAT_RX_PORT_256B_511B_H", 0x205ac, 0 }, + { "MPS_PORT_STAT_RX_PORT_512B_1023B_L", 0x205b0, 0 }, + { "MPS_PORT_STAT_RX_PORT_512B_1023B_H", 0x205b4, 0 }, + { "MPS_PORT_STAT_RX_PORT_1024B_1518B_L", 0x205b8, 0 }, + { "MPS_PORT_STAT_RX_PORT_1024B_1518B_H", 0x205bc, 0 }, + { "MPS_PORT_STAT_RX_PORT_1519B_MAX_L", 0x205c0, 0 }, + { "MPS_PORT_STAT_RX_PORT_1519B_MAX_H", 0x205c4, 0 }, + { "MPS_PORT_STAT_RX_PORT_PAUSE_L", 0x205c8, 0 }, + { "MPS_PORT_STAT_RX_PORT_PAUSE_H", 0x205cc, 0 }, + { "MPS_PORT_STAT_RX_PORT_PPP0_L", 0x205d0, 0 }, + { "MPS_PORT_STAT_RX_PORT_PPP0_H", 0x205d4, 0 }, + { "MPS_PORT_STAT_RX_PORT_PPP1_L", 0x205d8, 0 }, + { "MPS_PORT_STAT_RX_PORT_PPP1_H", 0x205dc, 0 }, + { "MPS_PORT_STAT_RX_PORT_PPP2_L", 0x205e0, 0 }, + { "MPS_PORT_STAT_RX_PORT_PPP2_H", 0x205e4, 0 }, + { "MPS_PORT_STAT_RX_PORT_PPP3_L", 0x205e8, 0 }, + { "MPS_PORT_STAT_RX_PORT_PPP3_H", 0x205ec, 0 }, + { "MPS_PORT_STAT_RX_PORT_PPP4_L", 0x205f0, 0 }, + { "MPS_PORT_STAT_RX_PORT_PPP4_H", 0x205f4, 0 }, + { "MPS_PORT_STAT_RX_PORT_PPP5_L", 0x205f8, 0 }, + { "MPS_PORT_STAT_RX_PORT_PPP5_H", 0x205fc, 0 }, + { "MPS_PORT_STAT_RX_PORT_PPP6_L", 0x20600, 0 }, + { "MPS_PORT_STAT_RX_PORT_PPP6_H", 0x20604, 0 }, + { "MPS_PORT_STAT_RX_PORT_PPP7_L", 0x20608, 0 }, + { "MPS_PORT_STAT_RX_PORT_PPP7_H", 0x2060c, 0 }, + { "MPS_PORT_STAT_RX_PORT_LESS_64B_L", 0x20610, 0 }, + { "MPS_PORT_STAT_RX_PORT_LESS_64B_H", 0x20614, 0 }, + { "MPS_PORT_STAT_TX_PORT_BYTES_L", 0x22400, 0 }, + { "MPS_PORT_STAT_TX_PORT_BYTES_H", 0x22404, 0 }, + { "MPS_PORT_STAT_TX_PORT_FRAMES_L", 0x22408, 0 }, + { "MPS_PORT_STAT_TX_PORT_FRAMES_H", 0x2240c, 0 }, + { "MPS_PORT_STAT_TX_PORT_BCAST_L", 0x22410, 0 }, + { "MPS_PORT_STAT_TX_PORT_BCAST_H", 0x22414, 0 }, + { "MPS_PORT_STAT_TX_PORT_MCAST_L", 0x22418, 0 }, + { "MPS_PORT_STAT_TX_PORT_MCAST_H", 0x2241c, 0 }, + { "MPS_PORT_STAT_TX_PORT_UCAST_L", 0x22420, 0 }, + { "MPS_PORT_STAT_TX_PORT_UCAST_H", 0x22424, 0 }, + { "MPS_PORT_STAT_TX_PORT_ERROR_L", 0x22428, 0 }, + { "MPS_PORT_STAT_TX_PORT_ERROR_H", 0x2242c, 0 }, + { "MPS_PORT_STAT_TX_PORT_64B_L", 0x22430, 0 }, + { "MPS_PORT_STAT_TX_PORT_64B_H", 0x22434, 0 }, + { "MPS_PORT_STAT_TX_PORT_65B_127B_L", 0x22438, 0 }, + { "MPS_PORT_STAT_TX_PORT_65B_127B_H", 0x2243c, 0 }, + { "MPS_PORT_STAT_TX_PORT_128B_255B_L", 0x22440, 0 }, + { "MPS_PORT_STAT_TX_PORT_128B_255B_H", 0x22444, 0 }, + { "MPS_PORT_STAT_TX_PORT_256B_511B_L", 0x22448, 0 }, + { "MPS_PORT_STAT_TX_PORT_256B_511B_H", 0x2244c, 0 }, + { "MPS_PORT_STAT_TX_PORT_512B_1023B_L", 0x22450, 0 }, + { "MPS_PORT_STAT_TX_PORT_512B_1023B_H", 0x22454, 0 }, + { "MPS_PORT_STAT_TX_PORT_1024B_1518B_L", 0x22458, 0 }, + { "MPS_PORT_STAT_TX_PORT_1024B_1518B_H", 0x2245c, 0 }, + { "MPS_PORT_STAT_TX_PORT_1519B_MAX_L", 0x22460, 0 }, + { "MPS_PORT_STAT_TX_PORT_1519B_MAX_H", 0x22464, 0 }, + { "MPS_PORT_STAT_TX_PORT_DROP_L", 0x22468, 0 }, + { "MPS_PORT_STAT_TX_PORT_DROP_H", 0x2246c, 0 }, + { "MPS_PORT_STAT_TX_PORT_PAUSE_L", 0x22470, 0 }, + { "MPS_PORT_STAT_TX_PORT_PAUSE_H", 0x22474, 0 }, + { "MPS_PORT_STAT_TX_PORT_PPP0_L", 0x22478, 0 }, + { "MPS_PORT_STAT_TX_PORT_PPP0_H", 0x2247c, 0 }, + { "MPS_PORT_STAT_TX_PORT_PPP1_L", 0x22480, 0 }, + { "MPS_PORT_STAT_TX_PORT_PPP1_H", 0x22484, 0 }, + { "MPS_PORT_STAT_TX_PORT_PPP2_L", 0x22488, 0 }, + { "MPS_PORT_STAT_TX_PORT_PPP2_H", 0x2248c, 0 }, + { "MPS_PORT_STAT_TX_PORT_PPP3_L", 0x22490, 0 }, + { "MPS_PORT_STAT_TX_PORT_PPP3_H", 0x22494, 0 }, + { "MPS_PORT_STAT_TX_PORT_PPP4_L", 0x22498, 0 }, + { "MPS_PORT_STAT_TX_PORT_PPP4_H", 0x2249c, 0 }, + { "MPS_PORT_STAT_TX_PORT_PPP5_L", 0x224a0, 0 }, + { "MPS_PORT_STAT_TX_PORT_PPP5_H", 0x224a4, 0 }, + { "MPS_PORT_STAT_TX_PORT_PPP6_L", 0x224a8, 0 }, + { "MPS_PORT_STAT_TX_PORT_PPP6_H", 0x224ac, 0 }, + { "MPS_PORT_STAT_TX_PORT_PPP7_L", 0x224b0, 0 }, + { "MPS_PORT_STAT_TX_PORT_PPP7_H", 0x224b4, 0 }, + { "MPS_PORT_STAT_LB_PORT_BYTES_L", 0x224c0, 0 }, + { "MPS_PORT_STAT_LB_PORT_BYTES_H", 0x224c4, 0 }, + { "MPS_PORT_STAT_LB_PORT_FRAMES_L", 0x224c8, 0 }, + { "MPS_PORT_STAT_LB_PORT_FRAMES_H", 0x224cc, 0 }, + { "MPS_PORT_STAT_LB_PORT_BCAST_L", 0x224d0, 0 }, + { "MPS_PORT_STAT_LB_PORT_BCAST_H", 0x224d4, 0 }, + { "MPS_PORT_STAT_LB_PORT_MCAST_L", 0x224d8, 0 }, + { "MPS_PORT_STAT_LB_PORT_MCAST_H", 0x224dc, 0 }, + { "MPS_PORT_STAT_LB_PORT_UCAST_L", 0x224e0, 0 }, + { "MPS_PORT_STAT_LB_PORT_UCAST_H", 0x224e4, 0 }, + { "MPS_PORT_STAT_LB_PORT_ERROR_L", 0x224e8, 0 }, + { "MPS_PORT_STAT_LB_PORT_ERROR_H", 0x224ec, 0 }, + { "MPS_PORT_STAT_LB_PORT_64B_L", 0x224f0, 0 }, + { "MPS_PORT_STAT_LB_PORT_64B_H", 0x224f4, 0 }, + { "MPS_PORT_STAT_LB_PORT_65B_127B_L", 0x224f8, 0 }, + { "MPS_PORT_STAT_LB_PORT_65B_127B_H", 0x224fc, 0 }, + { "MPS_PORT_STAT_LB_PORT_128B_255B_L", 0x22500, 0 }, + { "MPS_PORT_STAT_LB_PORT_128B_255B_H", 0x22504, 0 }, + { "MPS_PORT_STAT_LB_PORT_256B_511B_L", 0x22508, 0 }, + { "MPS_PORT_STAT_LB_PORT_256B_511B_H", 0x2250c, 0 }, + { "MPS_PORT_STAT_LB_PORT_512B_1023B_L", 0x22510, 0 }, + { "MPS_PORT_STAT_LB_PORT_512B_1023B_H", 0x22514, 0 }, + { "MPS_PORT_STAT_LB_PORT_1024B_1518B_L", 0x22518, 0 }, + { "MPS_PORT_STAT_LB_PORT_1024B_1518B_H", 0x2251c, 0 }, + { "MPS_PORT_STAT_LB_PORT_1519B_MAX_L", 0x22520, 0 }, + { "MPS_PORT_STAT_LB_PORT_1519B_MAX_H", 0x22524, 0 }, + { "MPS_PORT_STAT_LB_PORT_DROP_FRAMES", 0x22528, 0 }, + { "MPS_PORT_STAT_RX_PORT_BYTES_L", 0x22540, 0 }, + { "MPS_PORT_STAT_RX_PORT_BYTES_H", 0x22544, 0 }, + { "MPS_PORT_STAT_RX_PORT_FRAMES_L", 0x22548, 0 }, + { "MPS_PORT_STAT_RX_PORT_FRAMES_H", 0x2254c, 0 }, + { "MPS_PORT_STAT_RX_PORT_BCAST_L", 0x22550, 0 }, + { "MPS_PORT_STAT_RX_PORT_BCAST_H", 0x22554, 0 }, + { "MPS_PORT_STAT_RX_PORT_MCAST_L", 0x22558, 0 }, + { "MPS_PORT_STAT_RX_PORT_MCAST_H", 0x2255c, 0 }, + { "MPS_PORT_STAT_RX_PORT_UCAST_L", 0x22560, 0 }, + { "MPS_PORT_STAT_RX_PORT_UCAST_H", 0x22564, 0 }, + { "MPS_PORT_STAT_RX_PORT_MTU_ERROR_L", 0x22568, 0 }, + { "MPS_PORT_STAT_RX_PORT_MTU_ERROR_H", 0x2256c, 0 }, + { "MPS_PORT_STAT_RX_PORT_MTU_CRC_ERROR_L", 0x22570, 0 }, + { "MPS_PORT_STAT_RX_PORT_MTU_CRC_ERROR_H", 0x22574, 0 }, + { "MPS_PORT_STAT_RX_PORT_CRC_ERROR_L", 0x22578, 0 }, + { "MPS_PORT_STAT_RX_PORT_CRC_ERROR_H", 0x2257c, 0 }, + { "MPS_PORT_STAT_RX_PORT_LEN_ERROR_L", 0x22580, 0 }, + { "MPS_PORT_STAT_RX_PORT_LEN_ERROR_H", 0x22584, 0 }, + { "MPS_PORT_STAT_RX_PORT_SYM_ERROR_L", 0x22588, 0 }, + { "MPS_PORT_STAT_RX_PORT_SYM_ERROR_H", 0x2258c, 0 }, + { "MPS_PORT_STAT_RX_PORT_64B_L", 0x22590, 0 }, + { "MPS_PORT_STAT_RX_PORT_64B_H", 0x22594, 0 }, + { "MPS_PORT_STAT_RX_PORT_65B_127B_L", 0x22598, 0 }, + { "MPS_PORT_STAT_RX_PORT_65B_127B_H", 0x2259c, 0 }, + { "MPS_PORT_STAT_RX_PORT_128B_255B_L", 0x225a0, 0 }, + { "MPS_PORT_STAT_RX_PORT_128B_255B_H", 0x225a4, 0 }, + { "MPS_PORT_STAT_RX_PORT_256B_511B_L", 0x225a8, 0 }, + { "MPS_PORT_STAT_RX_PORT_256B_511B_H", 0x225ac, 0 }, + { "MPS_PORT_STAT_RX_PORT_512B_1023B_L", 0x225b0, 0 }, + { "MPS_PORT_STAT_RX_PORT_512B_1023B_H", 0x225b4, 0 }, + { "MPS_PORT_STAT_RX_PORT_1024B_1518B_L", 0x225b8, 0 }, + { "MPS_PORT_STAT_RX_PORT_1024B_1518B_H", 0x225bc, 0 }, + { "MPS_PORT_STAT_RX_PORT_1519B_MAX_L", 0x225c0, 0 }, + { "MPS_PORT_STAT_RX_PORT_1519B_MAX_H", 0x225c4, 0 }, + { "MPS_PORT_STAT_RX_PORT_PAUSE_L", 0x225c8, 0 }, + { "MPS_PORT_STAT_RX_PORT_PAUSE_H", 0x225cc, 0 }, + { "MPS_PORT_STAT_RX_PORT_PPP0_L", 0x225d0, 0 }, + { "MPS_PORT_STAT_RX_PORT_PPP0_H", 0x225d4, 0 }, + { "MPS_PORT_STAT_RX_PORT_PPP1_L", 0x225d8, 0 }, + { "MPS_PORT_STAT_RX_PORT_PPP1_H", 0x225dc, 0 }, + { "MPS_PORT_STAT_RX_PORT_PPP2_L", 0x225e0, 0 }, + { "MPS_PORT_STAT_RX_PORT_PPP2_H", 0x225e4, 0 }, + { "MPS_PORT_STAT_RX_PORT_PPP3_L", 0x225e8, 0 }, + { "MPS_PORT_STAT_RX_PORT_PPP3_H", 0x225ec, 0 }, + { "MPS_PORT_STAT_RX_PORT_PPP4_L", 0x225f0, 0 }, + { "MPS_PORT_STAT_RX_PORT_PPP4_H", 0x225f4, 0 }, + { "MPS_PORT_STAT_RX_PORT_PPP5_L", 0x225f8, 0 }, + { "MPS_PORT_STAT_RX_PORT_PPP5_H", 0x225fc, 0 }, + { "MPS_PORT_STAT_RX_PORT_PPP6_L", 0x22600, 0 }, + { "MPS_PORT_STAT_RX_PORT_PPP6_H", 0x22604, 0 }, + { "MPS_PORT_STAT_RX_PORT_PPP7_L", 0x22608, 0 }, + { "MPS_PORT_STAT_RX_PORT_PPP7_H", 0x2260c, 0 }, + { "MPS_PORT_STAT_RX_PORT_LESS_64B_L", 0x22610, 0 }, + { "MPS_PORT_STAT_RX_PORT_LESS_64B_H", 0x22614, 0 }, + { "MPS_PORT_STAT_TX_PORT_BYTES_L", 0x24400, 0 }, + { "MPS_PORT_STAT_TX_PORT_BYTES_H", 0x24404, 0 }, + { "MPS_PORT_STAT_TX_PORT_FRAMES_L", 0x24408, 0 }, + { "MPS_PORT_STAT_TX_PORT_FRAMES_H", 0x2440c, 0 }, + { "MPS_PORT_STAT_TX_PORT_BCAST_L", 0x24410, 0 }, + { "MPS_PORT_STAT_TX_PORT_BCAST_H", 0x24414, 0 }, + { "MPS_PORT_STAT_TX_PORT_MCAST_L", 0x24418, 0 }, + { "MPS_PORT_STAT_TX_PORT_MCAST_H", 0x2441c, 0 }, + { "MPS_PORT_STAT_TX_PORT_UCAST_L", 0x24420, 0 }, + { "MPS_PORT_STAT_TX_PORT_UCAST_H", 0x24424, 0 }, + { "MPS_PORT_STAT_TX_PORT_ERROR_L", 0x24428, 0 }, + { "MPS_PORT_STAT_TX_PORT_ERROR_H", 0x2442c, 0 }, + { "MPS_PORT_STAT_TX_PORT_64B_L", 0x24430, 0 }, + { "MPS_PORT_STAT_TX_PORT_64B_H", 0x24434, 0 }, + { "MPS_PORT_STAT_TX_PORT_65B_127B_L", 0x24438, 0 }, + { "MPS_PORT_STAT_TX_PORT_65B_127B_H", 0x2443c, 0 }, + { "MPS_PORT_STAT_TX_PORT_128B_255B_L", 0x24440, 0 }, + { "MPS_PORT_STAT_TX_PORT_128B_255B_H", 0x24444, 0 }, + { "MPS_PORT_STAT_TX_PORT_256B_511B_L", 0x24448, 0 }, + { "MPS_PORT_STAT_TX_PORT_256B_511B_H", 0x2444c, 0 }, + { "MPS_PORT_STAT_TX_PORT_512B_1023B_L", 0x24450, 0 }, + { "MPS_PORT_STAT_TX_PORT_512B_1023B_H", 0x24454, 0 }, + { "MPS_PORT_STAT_TX_PORT_1024B_1518B_L", 0x24458, 0 }, + { "MPS_PORT_STAT_TX_PORT_1024B_1518B_H", 0x2445c, 0 }, + { "MPS_PORT_STAT_TX_PORT_1519B_MAX_L", 0x24460, 0 }, + { "MPS_PORT_STAT_TX_PORT_1519B_MAX_H", 0x24464, 0 }, + { "MPS_PORT_STAT_TX_PORT_DROP_L", 0x24468, 0 }, + { "MPS_PORT_STAT_TX_PORT_DROP_H", 0x2446c, 0 }, + { "MPS_PORT_STAT_TX_PORT_PAUSE_L", 0x24470, 0 }, + { "MPS_PORT_STAT_TX_PORT_PAUSE_H", 0x24474, 0 }, + { "MPS_PORT_STAT_TX_PORT_PPP0_L", 0x24478, 0 }, + { "MPS_PORT_STAT_TX_PORT_PPP0_H", 0x2447c, 0 }, + { "MPS_PORT_STAT_TX_PORT_PPP1_L", 0x24480, 0 }, + { "MPS_PORT_STAT_TX_PORT_PPP1_H", 0x24484, 0 }, + { "MPS_PORT_STAT_TX_PORT_PPP2_L", 0x24488, 0 }, + { "MPS_PORT_STAT_TX_PORT_PPP2_H", 0x2448c, 0 }, + { "MPS_PORT_STAT_TX_PORT_PPP3_L", 0x24490, 0 }, + { "MPS_PORT_STAT_TX_PORT_PPP3_H", 0x24494, 0 }, + { "MPS_PORT_STAT_TX_PORT_PPP4_L", 0x24498, 0 }, + { "MPS_PORT_STAT_TX_PORT_PPP4_H", 0x2449c, 0 }, + { "MPS_PORT_STAT_TX_PORT_PPP5_L", 0x244a0, 0 }, + { "MPS_PORT_STAT_TX_PORT_PPP5_H", 0x244a4, 0 }, + { "MPS_PORT_STAT_TX_PORT_PPP6_L", 0x244a8, 0 }, + { "MPS_PORT_STAT_TX_PORT_PPP6_H", 0x244ac, 0 }, + { "MPS_PORT_STAT_TX_PORT_PPP7_L", 0x244b0, 0 }, + { "MPS_PORT_STAT_TX_PORT_PPP7_H", 0x244b4, 0 }, + { "MPS_PORT_STAT_LB_PORT_BYTES_L", 0x244c0, 0 }, + { "MPS_PORT_STAT_LB_PORT_BYTES_H", 0x244c4, 0 }, + { "MPS_PORT_STAT_LB_PORT_FRAMES_L", 0x244c8, 0 }, + { "MPS_PORT_STAT_LB_PORT_FRAMES_H", 0x244cc, 0 }, + { "MPS_PORT_STAT_LB_PORT_BCAST_L", 0x244d0, 0 }, + { "MPS_PORT_STAT_LB_PORT_BCAST_H", 0x244d4, 0 }, + { "MPS_PORT_STAT_LB_PORT_MCAST_L", 0x244d8, 0 }, + { "MPS_PORT_STAT_LB_PORT_MCAST_H", 0x244dc, 0 }, + { "MPS_PORT_STAT_LB_PORT_UCAST_L", 0x244e0, 0 }, + { "MPS_PORT_STAT_LB_PORT_UCAST_H", 0x244e4, 0 }, + { "MPS_PORT_STAT_LB_PORT_ERROR_L", 0x244e8, 0 }, + { "MPS_PORT_STAT_LB_PORT_ERROR_H", 0x244ec, 0 }, + { "MPS_PORT_STAT_LB_PORT_64B_L", 0x244f0, 0 }, + { "MPS_PORT_STAT_LB_PORT_64B_H", 0x244f4, 0 }, + { "MPS_PORT_STAT_LB_PORT_65B_127B_L", 0x244f8, 0 }, + { "MPS_PORT_STAT_LB_PORT_65B_127B_H", 0x244fc, 0 }, + { "MPS_PORT_STAT_LB_PORT_128B_255B_L", 0x24500, 0 }, + { "MPS_PORT_STAT_LB_PORT_128B_255B_H", 0x24504, 0 }, + { "MPS_PORT_STAT_LB_PORT_256B_511B_L", 0x24508, 0 }, + { "MPS_PORT_STAT_LB_PORT_256B_511B_H", 0x2450c, 0 }, + { "MPS_PORT_STAT_LB_PORT_512B_1023B_L", 0x24510, 0 }, + { "MPS_PORT_STAT_LB_PORT_512B_1023B_H", 0x24514, 0 }, + { "MPS_PORT_STAT_LB_PORT_1024B_1518B_L", 0x24518, 0 }, + { "MPS_PORT_STAT_LB_PORT_1024B_1518B_H", 0x2451c, 0 }, + { "MPS_PORT_STAT_LB_PORT_1519B_MAX_L", 0x24520, 0 }, + { "MPS_PORT_STAT_LB_PORT_1519B_MAX_H", 0x24524, 0 }, + { "MPS_PORT_STAT_LB_PORT_DROP_FRAMES", 0x24528, 0 }, + { "MPS_PORT_STAT_RX_PORT_BYTES_L", 0x24540, 0 }, + { "MPS_PORT_STAT_RX_PORT_BYTES_H", 0x24544, 0 }, + { "MPS_PORT_STAT_RX_PORT_FRAMES_L", 0x24548, 0 }, + { "MPS_PORT_STAT_RX_PORT_FRAMES_H", 0x2454c, 0 }, + { "MPS_PORT_STAT_RX_PORT_BCAST_L", 0x24550, 0 }, + { "MPS_PORT_STAT_RX_PORT_BCAST_H", 0x24554, 0 }, + { "MPS_PORT_STAT_RX_PORT_MCAST_L", 0x24558, 0 }, + { "MPS_PORT_STAT_RX_PORT_MCAST_H", 0x2455c, 0 }, + { "MPS_PORT_STAT_RX_PORT_UCAST_L", 0x24560, 0 }, + { "MPS_PORT_STAT_RX_PORT_UCAST_H", 0x24564, 0 }, + { "MPS_PORT_STAT_RX_PORT_MTU_ERROR_L", 0x24568, 0 }, + { "MPS_PORT_STAT_RX_PORT_MTU_ERROR_H", 0x2456c, 0 }, + { "MPS_PORT_STAT_RX_PORT_MTU_CRC_ERROR_L", 0x24570, 0 }, + { "MPS_PORT_STAT_RX_PORT_MTU_CRC_ERROR_H", 0x24574, 0 }, + { "MPS_PORT_STAT_RX_PORT_CRC_ERROR_L", 0x24578, 0 }, + { "MPS_PORT_STAT_RX_PORT_CRC_ERROR_H", 0x2457c, 0 }, + { "MPS_PORT_STAT_RX_PORT_LEN_ERROR_L", 0x24580, 0 }, + { "MPS_PORT_STAT_RX_PORT_LEN_ERROR_H", 0x24584, 0 }, + { "MPS_PORT_STAT_RX_PORT_SYM_ERROR_L", 0x24588, 0 }, + { "MPS_PORT_STAT_RX_PORT_SYM_ERROR_H", 0x2458c, 0 }, + { "MPS_PORT_STAT_RX_PORT_64B_L", 0x24590, 0 }, + { "MPS_PORT_STAT_RX_PORT_64B_H", 0x24594, 0 }, + { "MPS_PORT_STAT_RX_PORT_65B_127B_L", 0x24598, 0 }, + { "MPS_PORT_STAT_RX_PORT_65B_127B_H", 0x2459c, 0 }, + { "MPS_PORT_STAT_RX_PORT_128B_255B_L", 0x245a0, 0 }, + { "MPS_PORT_STAT_RX_PORT_128B_255B_H", 0x245a4, 0 }, + { "MPS_PORT_STAT_RX_PORT_256B_511B_L", 0x245a8, 0 }, + { "MPS_PORT_STAT_RX_PORT_256B_511B_H", 0x245ac, 0 }, + { "MPS_PORT_STAT_RX_PORT_512B_1023B_L", 0x245b0, 0 }, + { "MPS_PORT_STAT_RX_PORT_512B_1023B_H", 0x245b4, 0 }, + { "MPS_PORT_STAT_RX_PORT_1024B_1518B_L", 0x245b8, 0 }, + { "MPS_PORT_STAT_RX_PORT_1024B_1518B_H", 0x245bc, 0 }, + { "MPS_PORT_STAT_RX_PORT_1519B_MAX_L", 0x245c0, 0 }, + { "MPS_PORT_STAT_RX_PORT_1519B_MAX_H", 0x245c4, 0 }, + { "MPS_PORT_STAT_RX_PORT_PAUSE_L", 0x245c8, 0 }, + { "MPS_PORT_STAT_RX_PORT_PAUSE_H", 0x245cc, 0 }, + { "MPS_PORT_STAT_RX_PORT_PPP0_L", 0x245d0, 0 }, + { "MPS_PORT_STAT_RX_PORT_PPP0_H", 0x245d4, 0 }, + { "MPS_PORT_STAT_RX_PORT_PPP1_L", 0x245d8, 0 }, + { "MPS_PORT_STAT_RX_PORT_PPP1_H", 0x245dc, 0 }, + { "MPS_PORT_STAT_RX_PORT_PPP2_L", 0x245e0, 0 }, + { "MPS_PORT_STAT_RX_PORT_PPP2_H", 0x245e4, 0 }, + { "MPS_PORT_STAT_RX_PORT_PPP3_L", 0x245e8, 0 }, + { "MPS_PORT_STAT_RX_PORT_PPP3_H", 0x245ec, 0 }, + { "MPS_PORT_STAT_RX_PORT_PPP4_L", 0x245f0, 0 }, + { "MPS_PORT_STAT_RX_PORT_PPP4_H", 0x245f4, 0 }, + { "MPS_PORT_STAT_RX_PORT_PPP5_L", 0x245f8, 0 }, + { "MPS_PORT_STAT_RX_PORT_PPP5_H", 0x245fc, 0 }, + { "MPS_PORT_STAT_RX_PORT_PPP6_L", 0x24600, 0 }, + { "MPS_PORT_STAT_RX_PORT_PPP6_H", 0x24604, 0 }, + { "MPS_PORT_STAT_RX_PORT_PPP7_L", 0x24608, 0 }, + { "MPS_PORT_STAT_RX_PORT_PPP7_H", 0x2460c, 0 }, + { "MPS_PORT_STAT_RX_PORT_LESS_64B_L", 0x24610, 0 }, + { "MPS_PORT_STAT_RX_PORT_LESS_64B_H", 0x24614, 0 }, + { "MPS_PORT_STAT_TX_PORT_BYTES_L", 0x26400, 0 }, + { "MPS_PORT_STAT_TX_PORT_BYTES_H", 0x26404, 0 }, + { "MPS_PORT_STAT_TX_PORT_FRAMES_L", 0x26408, 0 }, + { "MPS_PORT_STAT_TX_PORT_FRAMES_H", 0x2640c, 0 }, + { "MPS_PORT_STAT_TX_PORT_BCAST_L", 0x26410, 0 }, + { "MPS_PORT_STAT_TX_PORT_BCAST_H", 0x26414, 0 }, + { "MPS_PORT_STAT_TX_PORT_MCAST_L", 0x26418, 0 }, + { "MPS_PORT_STAT_TX_PORT_MCAST_H", 0x2641c, 0 }, + { "MPS_PORT_STAT_TX_PORT_UCAST_L", 0x26420, 0 }, + { "MPS_PORT_STAT_TX_PORT_UCAST_H", 0x26424, 0 }, + { "MPS_PORT_STAT_TX_PORT_ERROR_L", 0x26428, 0 }, + { "MPS_PORT_STAT_TX_PORT_ERROR_H", 0x2642c, 0 }, + { "MPS_PORT_STAT_TX_PORT_64B_L", 0x26430, 0 }, + { "MPS_PORT_STAT_TX_PORT_64B_H", 0x26434, 0 }, + { "MPS_PORT_STAT_TX_PORT_65B_127B_L", 0x26438, 0 }, + { "MPS_PORT_STAT_TX_PORT_65B_127B_H", 0x2643c, 0 }, + { "MPS_PORT_STAT_TX_PORT_128B_255B_L", 0x26440, 0 }, + { "MPS_PORT_STAT_TX_PORT_128B_255B_H", 0x26444, 0 }, + { "MPS_PORT_STAT_TX_PORT_256B_511B_L", 0x26448, 0 }, + { "MPS_PORT_STAT_TX_PORT_256B_511B_H", 0x2644c, 0 }, + { "MPS_PORT_STAT_TX_PORT_512B_1023B_L", 0x26450, 0 }, + { "MPS_PORT_STAT_TX_PORT_512B_1023B_H", 0x26454, 0 }, + { "MPS_PORT_STAT_TX_PORT_1024B_1518B_L", 0x26458, 0 }, + { "MPS_PORT_STAT_TX_PORT_1024B_1518B_H", 0x2645c, 0 }, + { "MPS_PORT_STAT_TX_PORT_1519B_MAX_L", 0x26460, 0 }, + { "MPS_PORT_STAT_TX_PORT_1519B_MAX_H", 0x26464, 0 }, + { "MPS_PORT_STAT_TX_PORT_DROP_L", 0x26468, 0 }, + { "MPS_PORT_STAT_TX_PORT_DROP_H", 0x2646c, 0 }, + { "MPS_PORT_STAT_TX_PORT_PAUSE_L", 0x26470, 0 }, + { "MPS_PORT_STAT_TX_PORT_PAUSE_H", 0x26474, 0 }, + { "MPS_PORT_STAT_TX_PORT_PPP0_L", 0x26478, 0 }, + { "MPS_PORT_STAT_TX_PORT_PPP0_H", 0x2647c, 0 }, + { "MPS_PORT_STAT_TX_PORT_PPP1_L", 0x26480, 0 }, + { "MPS_PORT_STAT_TX_PORT_PPP1_H", 0x26484, 0 }, + { "MPS_PORT_STAT_TX_PORT_PPP2_L", 0x26488, 0 }, + { "MPS_PORT_STAT_TX_PORT_PPP2_H", 0x2648c, 0 }, + { "MPS_PORT_STAT_TX_PORT_PPP3_L", 0x26490, 0 }, + { "MPS_PORT_STAT_TX_PORT_PPP3_H", 0x26494, 0 }, + { "MPS_PORT_STAT_TX_PORT_PPP4_L", 0x26498, 0 }, + { "MPS_PORT_STAT_TX_PORT_PPP4_H", 0x2649c, 0 }, + { "MPS_PORT_STAT_TX_PORT_PPP5_L", 0x264a0, 0 }, + { "MPS_PORT_STAT_TX_PORT_PPP5_H", 0x264a4, 0 }, + { "MPS_PORT_STAT_TX_PORT_PPP6_L", 0x264a8, 0 }, + { "MPS_PORT_STAT_TX_PORT_PPP6_H", 0x264ac, 0 }, + { "MPS_PORT_STAT_TX_PORT_PPP7_L", 0x264b0, 0 }, + { "MPS_PORT_STAT_TX_PORT_PPP7_H", 0x264b4, 0 }, + { "MPS_PORT_STAT_LB_PORT_BYTES_L", 0x264c0, 0 }, + { "MPS_PORT_STAT_LB_PORT_BYTES_H", 0x264c4, 0 }, + { "MPS_PORT_STAT_LB_PORT_FRAMES_L", 0x264c8, 0 }, + { "MPS_PORT_STAT_LB_PORT_FRAMES_H", 0x264cc, 0 }, + { "MPS_PORT_STAT_LB_PORT_BCAST_L", 0x264d0, 0 }, + { "MPS_PORT_STAT_LB_PORT_BCAST_H", 0x264d4, 0 }, + { "MPS_PORT_STAT_LB_PORT_MCAST_L", 0x264d8, 0 }, + { "MPS_PORT_STAT_LB_PORT_MCAST_H", 0x264dc, 0 }, + { "MPS_PORT_STAT_LB_PORT_UCAST_L", 0x264e0, 0 }, + { "MPS_PORT_STAT_LB_PORT_UCAST_H", 0x264e4, 0 }, + { "MPS_PORT_STAT_LB_PORT_ERROR_L", 0x264e8, 0 }, + { "MPS_PORT_STAT_LB_PORT_ERROR_H", 0x264ec, 0 }, + { "MPS_PORT_STAT_LB_PORT_64B_L", 0x264f0, 0 }, + { "MPS_PORT_STAT_LB_PORT_64B_H", 0x264f4, 0 }, + { "MPS_PORT_STAT_LB_PORT_65B_127B_L", 0x264f8, 0 }, + { "MPS_PORT_STAT_LB_PORT_65B_127B_H", 0x264fc, 0 }, + { "MPS_PORT_STAT_LB_PORT_128B_255B_L", 0x26500, 0 }, + { "MPS_PORT_STAT_LB_PORT_128B_255B_H", 0x26504, 0 }, + { "MPS_PORT_STAT_LB_PORT_256B_511B_L", 0x26508, 0 }, + { "MPS_PORT_STAT_LB_PORT_256B_511B_H", 0x2650c, 0 }, + { "MPS_PORT_STAT_LB_PORT_512B_1023B_L", 0x26510, 0 }, + { "MPS_PORT_STAT_LB_PORT_512B_1023B_H", 0x26514, 0 }, + { "MPS_PORT_STAT_LB_PORT_1024B_1518B_L", 0x26518, 0 }, + { "MPS_PORT_STAT_LB_PORT_1024B_1518B_H", 0x2651c, 0 }, + { "MPS_PORT_STAT_LB_PORT_1519B_MAX_L", 0x26520, 0 }, + { "MPS_PORT_STAT_LB_PORT_1519B_MAX_H", 0x26524, 0 }, + { "MPS_PORT_STAT_LB_PORT_DROP_FRAMES", 0x26528, 0 }, + { "MPS_PORT_STAT_RX_PORT_BYTES_L", 0x26540, 0 }, + { "MPS_PORT_STAT_RX_PORT_BYTES_H", 0x26544, 0 }, + { "MPS_PORT_STAT_RX_PORT_FRAMES_L", 0x26548, 0 }, + { "MPS_PORT_STAT_RX_PORT_FRAMES_H", 0x2654c, 0 }, + { "MPS_PORT_STAT_RX_PORT_BCAST_L", 0x26550, 0 }, + { "MPS_PORT_STAT_RX_PORT_BCAST_H", 0x26554, 0 }, + { "MPS_PORT_STAT_RX_PORT_MCAST_L", 0x26558, 0 }, + { "MPS_PORT_STAT_RX_PORT_MCAST_H", 0x2655c, 0 }, + { "MPS_PORT_STAT_RX_PORT_UCAST_L", 0x26560, 0 }, + { "MPS_PORT_STAT_RX_PORT_UCAST_H", 0x26564, 0 }, + { "MPS_PORT_STAT_RX_PORT_MTU_ERROR_L", 0x26568, 0 }, + { "MPS_PORT_STAT_RX_PORT_MTU_ERROR_H", 0x2656c, 0 }, + { "MPS_PORT_STAT_RX_PORT_MTU_CRC_ERROR_L", 0x26570, 0 }, + { "MPS_PORT_STAT_RX_PORT_MTU_CRC_ERROR_H", 0x26574, 0 }, + { "MPS_PORT_STAT_RX_PORT_CRC_ERROR_L", 0x26578, 0 }, + { "MPS_PORT_STAT_RX_PORT_CRC_ERROR_H", 0x2657c, 0 }, + { "MPS_PORT_STAT_RX_PORT_LEN_ERROR_L", 0x26580, 0 }, + { "MPS_PORT_STAT_RX_PORT_LEN_ERROR_H", 0x26584, 0 }, + { "MPS_PORT_STAT_RX_PORT_SYM_ERROR_L", 0x26588, 0 }, + { "MPS_PORT_STAT_RX_PORT_SYM_ERROR_H", 0x2658c, 0 }, + { "MPS_PORT_STAT_RX_PORT_64B_L", 0x26590, 0 }, + { "MPS_PORT_STAT_RX_PORT_64B_H", 0x26594, 0 }, + { "MPS_PORT_STAT_RX_PORT_65B_127B_L", 0x26598, 0 }, + { "MPS_PORT_STAT_RX_PORT_65B_127B_H", 0x2659c, 0 }, + { "MPS_PORT_STAT_RX_PORT_128B_255B_L", 0x265a0, 0 }, + { "MPS_PORT_STAT_RX_PORT_128B_255B_H", 0x265a4, 0 }, + { "MPS_PORT_STAT_RX_PORT_256B_511B_L", 0x265a8, 0 }, + { "MPS_PORT_STAT_RX_PORT_256B_511B_H", 0x265ac, 0 }, + { "MPS_PORT_STAT_RX_PORT_512B_1023B_L", 0x265b0, 0 }, + { "MPS_PORT_STAT_RX_PORT_512B_1023B_H", 0x265b4, 0 }, + { "MPS_PORT_STAT_RX_PORT_1024B_1518B_L", 0x265b8, 0 }, + { "MPS_PORT_STAT_RX_PORT_1024B_1518B_H", 0x265bc, 0 }, + { "MPS_PORT_STAT_RX_PORT_1519B_MAX_L", 0x265c0, 0 }, + { "MPS_PORT_STAT_RX_PORT_1519B_MAX_H", 0x265c4, 0 }, + { "MPS_PORT_STAT_RX_PORT_PAUSE_L", 0x265c8, 0 }, + { "MPS_PORT_STAT_RX_PORT_PAUSE_H", 0x265cc, 0 }, + { "MPS_PORT_STAT_RX_PORT_PPP0_L", 0x265d0, 0 }, + { "MPS_PORT_STAT_RX_PORT_PPP0_H", 0x265d4, 0 }, + { "MPS_PORT_STAT_RX_PORT_PPP1_L", 0x265d8, 0 }, + { "MPS_PORT_STAT_RX_PORT_PPP1_H", 0x265dc, 0 }, + { "MPS_PORT_STAT_RX_PORT_PPP2_L", 0x265e0, 0 }, + { "MPS_PORT_STAT_RX_PORT_PPP2_H", 0x265e4, 0 }, + { "MPS_PORT_STAT_RX_PORT_PPP3_L", 0x265e8, 0 }, + { "MPS_PORT_STAT_RX_PORT_PPP3_H", 0x265ec, 0 }, + { "MPS_PORT_STAT_RX_PORT_PPP4_L", 0x265f0, 0 }, + { "MPS_PORT_STAT_RX_PORT_PPP4_H", 0x265f4, 0 }, + { "MPS_PORT_STAT_RX_PORT_PPP5_L", 0x265f8, 0 }, + { "MPS_PORT_STAT_RX_PORT_PPP5_H", 0x265fc, 0 }, + { "MPS_PORT_STAT_RX_PORT_PPP6_L", 0x26600, 0 }, + { "MPS_PORT_STAT_RX_PORT_PPP6_H", 0x26604, 0 }, + { "MPS_PORT_STAT_RX_PORT_PPP7_L", 0x26608, 0 }, + { "MPS_PORT_STAT_RX_PORT_PPP7_H", 0x2660c, 0 }, + { "MPS_PORT_STAT_RX_PORT_LESS_64B_L", 0x26610, 0 }, + { "MPS_PORT_STAT_RX_PORT_LESS_64B_H", 0x26614, 0 }, + { "MPS_PF_STAT_TX_PF_BCAST_BYTES_L", 0x1e300, 0 }, + { "MPS_PF_STAT_TX_PF_BCAST_BYTES_H", 0x1e304, 0 }, + { "MPS_PF_STAT_TX_PF_BCAST_FRAMES_L", 0x1e308, 0 }, + { "MPS_PF_STAT_TX_PF_BCAST_FRAMES_H", 0x1e30c, 0 }, + { "MPS_PF_STAT_TX_PF_MCAST_BYTES_L", 0x1e310, 0 }, + { "MPS_PF_STAT_TX_PF_MCAST_BYTES_H", 0x1e314, 0 }, + { "MPS_PF_STAT_TX_PF_MCAST_FRAMES_L", 0x1e318, 0 }, + { "MPS_PF_STAT_TX_PF_MCAST_FRAMES_H", 0x1e31c, 0 }, + { "MPS_PF_STAT_TX_PF_UCAST_BYTES_L", 0x1e320, 0 }, + { "MPS_PF_STAT_TX_PF_UCAST_BYTES_H", 0x1e324, 0 }, + { "MPS_PF_STAT_TX_PF_UCAST_FRAMES_L", 0x1e328, 0 }, + { "MPS_PF_STAT_TX_PF_UCAST_FRAMES_H", 0x1e32c, 0 }, + { "MPS_PF_STAT_TX_PF_OFFLOAD_BYTES_L", 0x1e330, 0 }, + { "MPS_PF_STAT_TX_PF_OFFLOAD_BYTES_H", 0x1e334, 0 }, + { "MPS_PF_STAT_TX_PF_OFFLOAD_FRAMES_L", 0x1e338, 0 }, + { "MPS_PF_STAT_TX_PF_OFFLOAD_FRAMES_H", 0x1e33c, 0 }, + { "MPS_PF_STAT_RX_PF_BYTES_L", 0x1e340, 0 }, + { "MPS_PF_STAT_RX_PF_BYTES_H", 0x1e344, 0 }, + { "MPS_PF_STAT_RX_PF_FRAMES_L", 0x1e348, 0 }, + { "MPS_PF_STAT_RX_PF_FRAMES_H", 0x1e34c, 0 }, + { "MPS_PF_STAT_RX_PF_BCAST_BYTES_L", 0x1e350, 0 }, + { "MPS_PF_STAT_RX_PF_BCAST_BYTES_H", 0x1e354, 0 }, + { "MPS_PF_STAT_RX_PF_BCAST_FRAMES_L", 0x1e358, 0 }, + { "MPS_PF_STAT_RX_PF_BCAST_FRAMES_H", 0x1e35c, 0 }, + { "MPS_PF_STAT_RX_PF_MCAST_BYTES_L", 0x1e360, 0 }, + { "MPS_PF_STAT_RX_PF_MCAST_BYTES_H", 0x1e364, 0 }, + { "MPS_PF_STAT_RX_PF_MCAST_FRAMES_L", 0x1e368, 0 }, + { "MPS_PF_STAT_RX_PF_MCAST_FRAMES_H", 0x1e36c, 0 }, + { "MPS_PF_STAT_RX_PF_UCAST_BYTES_L", 0x1e370, 0 }, + { "MPS_PF_STAT_RX_PF_UCAST_BYTES_H", 0x1e374, 0 }, + { "MPS_PF_STAT_RX_PF_UCAST_FRAMES_L", 0x1e378, 0 }, + { "MPS_PF_STAT_RX_PF_UCAST_FRAMES_H", 0x1e37c, 0 }, + { "MPS_PF_STAT_RX_PF_ERR_FRAMES_L", 0x1e380, 0 }, + { "MPS_PF_STAT_RX_PF_ERR_FRAMES_H", 0x1e384, 0 }, + { "MPS_PF_STAT_TX_PF_BCAST_BYTES_L", 0x1e700, 0 }, + { "MPS_PF_STAT_TX_PF_BCAST_BYTES_H", 0x1e704, 0 }, + { "MPS_PF_STAT_TX_PF_BCAST_FRAMES_L", 0x1e708, 0 }, + { "MPS_PF_STAT_TX_PF_BCAST_FRAMES_H", 0x1e70c, 0 }, + { "MPS_PF_STAT_TX_PF_MCAST_BYTES_L", 0x1e710, 0 }, + { "MPS_PF_STAT_TX_PF_MCAST_BYTES_H", 0x1e714, 0 }, + { "MPS_PF_STAT_TX_PF_MCAST_FRAMES_L", 0x1e718, 0 }, + { "MPS_PF_STAT_TX_PF_MCAST_FRAMES_H", 0x1e71c, 0 }, + { "MPS_PF_STAT_TX_PF_UCAST_BYTES_L", 0x1e720, 0 }, + { "MPS_PF_STAT_TX_PF_UCAST_BYTES_H", 0x1e724, 0 }, + { "MPS_PF_STAT_TX_PF_UCAST_FRAMES_L", 0x1e728, 0 }, + { "MPS_PF_STAT_TX_PF_UCAST_FRAMES_H", 0x1e72c, 0 }, + { "MPS_PF_STAT_TX_PF_OFFLOAD_BYTES_L", 0x1e730, 0 }, + { "MPS_PF_STAT_TX_PF_OFFLOAD_BYTES_H", 0x1e734, 0 }, + { "MPS_PF_STAT_TX_PF_OFFLOAD_FRAMES_L", 0x1e738, 0 }, + { "MPS_PF_STAT_TX_PF_OFFLOAD_FRAMES_H", 0x1e73c, 0 }, + { "MPS_PF_STAT_RX_PF_BYTES_L", 0x1e740, 0 }, + { "MPS_PF_STAT_RX_PF_BYTES_H", 0x1e744, 0 }, + { "MPS_PF_STAT_RX_PF_FRAMES_L", 0x1e748, 0 }, + { "MPS_PF_STAT_RX_PF_FRAMES_H", 0x1e74c, 0 }, + { "MPS_PF_STAT_RX_PF_BCAST_BYTES_L", 0x1e750, 0 }, + { "MPS_PF_STAT_RX_PF_BCAST_BYTES_H", 0x1e754, 0 }, + { "MPS_PF_STAT_RX_PF_BCAST_FRAMES_L", 0x1e758, 0 }, + { "MPS_PF_STAT_RX_PF_BCAST_FRAMES_H", 0x1e75c, 0 }, + { "MPS_PF_STAT_RX_PF_MCAST_BYTES_L", 0x1e760, 0 }, + { "MPS_PF_STAT_RX_PF_MCAST_BYTES_H", 0x1e764, 0 }, + { "MPS_PF_STAT_RX_PF_MCAST_FRAMES_L", 0x1e768, 0 }, + { "MPS_PF_STAT_RX_PF_MCAST_FRAMES_H", 0x1e76c, 0 }, + { "MPS_PF_STAT_RX_PF_UCAST_BYTES_L", 0x1e770, 0 }, + { "MPS_PF_STAT_RX_PF_UCAST_BYTES_H", 0x1e774, 0 }, + { "MPS_PF_STAT_RX_PF_UCAST_FRAMES_L", 0x1e778, 0 }, + { "MPS_PF_STAT_RX_PF_UCAST_FRAMES_H", 0x1e77c, 0 }, + { "MPS_PF_STAT_RX_PF_ERR_FRAMES_L", 0x1e780, 0 }, + { "MPS_PF_STAT_RX_PF_ERR_FRAMES_H", 0x1e784, 0 }, + { "MPS_PF_STAT_TX_PF_BCAST_BYTES_L", 0x1eb00, 0 }, + { "MPS_PF_STAT_TX_PF_BCAST_BYTES_H", 0x1eb04, 0 }, + { "MPS_PF_STAT_TX_PF_BCAST_FRAMES_L", 0x1eb08, 0 }, + { "MPS_PF_STAT_TX_PF_BCAST_FRAMES_H", 0x1eb0c, 0 }, + { "MPS_PF_STAT_TX_PF_MCAST_BYTES_L", 0x1eb10, 0 }, + { "MPS_PF_STAT_TX_PF_MCAST_BYTES_H", 0x1eb14, 0 }, + { "MPS_PF_STAT_TX_PF_MCAST_FRAMES_L", 0x1eb18, 0 }, + { "MPS_PF_STAT_TX_PF_MCAST_FRAMES_H", 0x1eb1c, 0 }, + { "MPS_PF_STAT_TX_PF_UCAST_BYTES_L", 0x1eb20, 0 }, + { "MPS_PF_STAT_TX_PF_UCAST_BYTES_H", 0x1eb24, 0 }, + { "MPS_PF_STAT_TX_PF_UCAST_FRAMES_L", 0x1eb28, 0 }, + { "MPS_PF_STAT_TX_PF_UCAST_FRAMES_H", 0x1eb2c, 0 }, + { "MPS_PF_STAT_TX_PF_OFFLOAD_BYTES_L", 0x1eb30, 0 }, + { "MPS_PF_STAT_TX_PF_OFFLOAD_BYTES_H", 0x1eb34, 0 }, + { "MPS_PF_STAT_TX_PF_OFFLOAD_FRAMES_L", 0x1eb38, 0 }, + { "MPS_PF_STAT_TX_PF_OFFLOAD_FRAMES_H", 0x1eb3c, 0 }, + { "MPS_PF_STAT_RX_PF_BYTES_L", 0x1eb40, 0 }, + { "MPS_PF_STAT_RX_PF_BYTES_H", 0x1eb44, 0 }, + { "MPS_PF_STAT_RX_PF_FRAMES_L", 0x1eb48, 0 }, + { "MPS_PF_STAT_RX_PF_FRAMES_H", 0x1eb4c, 0 }, + { "MPS_PF_STAT_RX_PF_BCAST_BYTES_L", 0x1eb50, 0 }, + { "MPS_PF_STAT_RX_PF_BCAST_BYTES_H", 0x1eb54, 0 }, + { "MPS_PF_STAT_RX_PF_BCAST_FRAMES_L", 0x1eb58, 0 }, + { "MPS_PF_STAT_RX_PF_BCAST_FRAMES_H", 0x1eb5c, 0 }, + { "MPS_PF_STAT_RX_PF_MCAST_BYTES_L", 0x1eb60, 0 }, + { "MPS_PF_STAT_RX_PF_MCAST_BYTES_H", 0x1eb64, 0 }, + { "MPS_PF_STAT_RX_PF_MCAST_FRAMES_L", 0x1eb68, 0 }, + { "MPS_PF_STAT_RX_PF_MCAST_FRAMES_H", 0x1eb6c, 0 }, + { "MPS_PF_STAT_RX_PF_UCAST_BYTES_L", 0x1eb70, 0 }, + { "MPS_PF_STAT_RX_PF_UCAST_BYTES_H", 0x1eb74, 0 }, + { "MPS_PF_STAT_RX_PF_UCAST_FRAMES_L", 0x1eb78, 0 }, + { "MPS_PF_STAT_RX_PF_UCAST_FRAMES_H", 0x1eb7c, 0 }, + { "MPS_PF_STAT_RX_PF_ERR_FRAMES_L", 0x1eb80, 0 }, + { "MPS_PF_STAT_RX_PF_ERR_FRAMES_H", 0x1eb84, 0 }, + { "MPS_PF_STAT_TX_PF_BCAST_BYTES_L", 0x1ef00, 0 }, + { "MPS_PF_STAT_TX_PF_BCAST_BYTES_H", 0x1ef04, 0 }, + { "MPS_PF_STAT_TX_PF_BCAST_FRAMES_L", 0x1ef08, 0 }, + { "MPS_PF_STAT_TX_PF_BCAST_FRAMES_H", 0x1ef0c, 0 }, + { "MPS_PF_STAT_TX_PF_MCAST_BYTES_L", 0x1ef10, 0 }, + { "MPS_PF_STAT_TX_PF_MCAST_BYTES_H", 0x1ef14, 0 }, + { "MPS_PF_STAT_TX_PF_MCAST_FRAMES_L", 0x1ef18, 0 }, + { "MPS_PF_STAT_TX_PF_MCAST_FRAMES_H", 0x1ef1c, 0 }, + { "MPS_PF_STAT_TX_PF_UCAST_BYTES_L", 0x1ef20, 0 }, + { "MPS_PF_STAT_TX_PF_UCAST_BYTES_H", 0x1ef24, 0 }, + { "MPS_PF_STAT_TX_PF_UCAST_FRAMES_L", 0x1ef28, 0 }, + { "MPS_PF_STAT_TX_PF_UCAST_FRAMES_H", 0x1ef2c, 0 }, + { "MPS_PF_STAT_TX_PF_OFFLOAD_BYTES_L", 0x1ef30, 0 }, + { "MPS_PF_STAT_TX_PF_OFFLOAD_BYTES_H", 0x1ef34, 0 }, + { "MPS_PF_STAT_TX_PF_OFFLOAD_FRAMES_L", 0x1ef38, 0 }, + { "MPS_PF_STAT_TX_PF_OFFLOAD_FRAMES_H", 0x1ef3c, 0 }, + { "MPS_PF_STAT_RX_PF_BYTES_L", 0x1ef40, 0 }, + { "MPS_PF_STAT_RX_PF_BYTES_H", 0x1ef44, 0 }, + { "MPS_PF_STAT_RX_PF_FRAMES_L", 0x1ef48, 0 }, + { "MPS_PF_STAT_RX_PF_FRAMES_H", 0x1ef4c, 0 }, + { "MPS_PF_STAT_RX_PF_BCAST_BYTES_L", 0x1ef50, 0 }, + { "MPS_PF_STAT_RX_PF_BCAST_BYTES_H", 0x1ef54, 0 }, + { "MPS_PF_STAT_RX_PF_BCAST_FRAMES_L", 0x1ef58, 0 }, + { "MPS_PF_STAT_RX_PF_BCAST_FRAMES_H", 0x1ef5c, 0 }, + { "MPS_PF_STAT_RX_PF_MCAST_BYTES_L", 0x1ef60, 0 }, + { "MPS_PF_STAT_RX_PF_MCAST_BYTES_H", 0x1ef64, 0 }, + { "MPS_PF_STAT_RX_PF_MCAST_FRAMES_L", 0x1ef68, 0 }, + { "MPS_PF_STAT_RX_PF_MCAST_FRAMES_H", 0x1ef6c, 0 }, + { "MPS_PF_STAT_RX_PF_UCAST_BYTES_L", 0x1ef70, 0 }, + { "MPS_PF_STAT_RX_PF_UCAST_BYTES_H", 0x1ef74, 0 }, + { "MPS_PF_STAT_RX_PF_UCAST_FRAMES_L", 0x1ef78, 0 }, + { "MPS_PF_STAT_RX_PF_UCAST_FRAMES_H", 0x1ef7c, 0 }, + { "MPS_PF_STAT_RX_PF_ERR_FRAMES_L", 0x1ef80, 0 }, + { "MPS_PF_STAT_RX_PF_ERR_FRAMES_H", 0x1ef84, 0 }, + { "MPS_PF_STAT_TX_PF_BCAST_BYTES_L", 0x1f300, 0 }, + { "MPS_PF_STAT_TX_PF_BCAST_BYTES_H", 0x1f304, 0 }, + { "MPS_PF_STAT_TX_PF_BCAST_FRAMES_L", 0x1f308, 0 }, + { "MPS_PF_STAT_TX_PF_BCAST_FRAMES_H", 0x1f30c, 0 }, + { "MPS_PF_STAT_TX_PF_MCAST_BYTES_L", 0x1f310, 0 }, + { "MPS_PF_STAT_TX_PF_MCAST_BYTES_H", 0x1f314, 0 }, + { "MPS_PF_STAT_TX_PF_MCAST_FRAMES_L", 0x1f318, 0 }, + { "MPS_PF_STAT_TX_PF_MCAST_FRAMES_H", 0x1f31c, 0 }, + { "MPS_PF_STAT_TX_PF_UCAST_BYTES_L", 0x1f320, 0 }, + { "MPS_PF_STAT_TX_PF_UCAST_BYTES_H", 0x1f324, 0 }, + { "MPS_PF_STAT_TX_PF_UCAST_FRAMES_L", 0x1f328, 0 }, + { "MPS_PF_STAT_TX_PF_UCAST_FRAMES_H", 0x1f32c, 0 }, + { "MPS_PF_STAT_TX_PF_OFFLOAD_BYTES_L", 0x1f330, 0 }, + { "MPS_PF_STAT_TX_PF_OFFLOAD_BYTES_H", 0x1f334, 0 }, + { "MPS_PF_STAT_TX_PF_OFFLOAD_FRAMES_L", 0x1f338, 0 }, + { "MPS_PF_STAT_TX_PF_OFFLOAD_FRAMES_H", 0x1f33c, 0 }, + { "MPS_PF_STAT_RX_PF_BYTES_L", 0x1f340, 0 }, + { "MPS_PF_STAT_RX_PF_BYTES_H", 0x1f344, 0 }, + { "MPS_PF_STAT_RX_PF_FRAMES_L", 0x1f348, 0 }, + { "MPS_PF_STAT_RX_PF_FRAMES_H", 0x1f34c, 0 }, + { "MPS_PF_STAT_RX_PF_BCAST_BYTES_L", 0x1f350, 0 }, + { "MPS_PF_STAT_RX_PF_BCAST_BYTES_H", 0x1f354, 0 }, + { "MPS_PF_STAT_RX_PF_BCAST_FRAMES_L", 0x1f358, 0 }, + { "MPS_PF_STAT_RX_PF_BCAST_FRAMES_H", 0x1f35c, 0 }, + { "MPS_PF_STAT_RX_PF_MCAST_BYTES_L", 0x1f360, 0 }, + { "MPS_PF_STAT_RX_PF_MCAST_BYTES_H", 0x1f364, 0 }, + { "MPS_PF_STAT_RX_PF_MCAST_FRAMES_L", 0x1f368, 0 }, + { "MPS_PF_STAT_RX_PF_MCAST_FRAMES_H", 0x1f36c, 0 }, + { "MPS_PF_STAT_RX_PF_UCAST_BYTES_L", 0x1f370, 0 }, + { "MPS_PF_STAT_RX_PF_UCAST_BYTES_H", 0x1f374, 0 }, + { "MPS_PF_STAT_RX_PF_UCAST_FRAMES_L", 0x1f378, 0 }, + { "MPS_PF_STAT_RX_PF_UCAST_FRAMES_H", 0x1f37c, 0 }, + { "MPS_PF_STAT_RX_PF_ERR_FRAMES_L", 0x1f380, 0 }, + { "MPS_PF_STAT_RX_PF_ERR_FRAMES_H", 0x1f384, 0 }, + { "MPS_PF_STAT_TX_PF_BCAST_BYTES_L", 0x1f700, 0 }, + { "MPS_PF_STAT_TX_PF_BCAST_BYTES_H", 0x1f704, 0 }, + { "MPS_PF_STAT_TX_PF_BCAST_FRAMES_L", 0x1f708, 0 }, + { "MPS_PF_STAT_TX_PF_BCAST_FRAMES_H", 0x1f70c, 0 }, + { "MPS_PF_STAT_TX_PF_MCAST_BYTES_L", 0x1f710, 0 }, + { "MPS_PF_STAT_TX_PF_MCAST_BYTES_H", 0x1f714, 0 }, + { "MPS_PF_STAT_TX_PF_MCAST_FRAMES_L", 0x1f718, 0 }, + { "MPS_PF_STAT_TX_PF_MCAST_FRAMES_H", 0x1f71c, 0 }, + { "MPS_PF_STAT_TX_PF_UCAST_BYTES_L", 0x1f720, 0 }, + { "MPS_PF_STAT_TX_PF_UCAST_BYTES_H", 0x1f724, 0 }, + { "MPS_PF_STAT_TX_PF_UCAST_FRAMES_L", 0x1f728, 0 }, + { "MPS_PF_STAT_TX_PF_UCAST_FRAMES_H", 0x1f72c, 0 }, + { "MPS_PF_STAT_TX_PF_OFFLOAD_BYTES_L", 0x1f730, 0 }, + { "MPS_PF_STAT_TX_PF_OFFLOAD_BYTES_H", 0x1f734, 0 }, + { "MPS_PF_STAT_TX_PF_OFFLOAD_FRAMES_L", 0x1f738, 0 }, + { "MPS_PF_STAT_TX_PF_OFFLOAD_FRAMES_H", 0x1f73c, 0 }, + { "MPS_PF_STAT_RX_PF_BYTES_L", 0x1f740, 0 }, + { "MPS_PF_STAT_RX_PF_BYTES_H", 0x1f744, 0 }, + { "MPS_PF_STAT_RX_PF_FRAMES_L", 0x1f748, 0 }, + { "MPS_PF_STAT_RX_PF_FRAMES_H", 0x1f74c, 0 }, + { "MPS_PF_STAT_RX_PF_BCAST_BYTES_L", 0x1f750, 0 }, + { "MPS_PF_STAT_RX_PF_BCAST_BYTES_H", 0x1f754, 0 }, + { "MPS_PF_STAT_RX_PF_BCAST_FRAMES_L", 0x1f758, 0 }, + { "MPS_PF_STAT_RX_PF_BCAST_FRAMES_H", 0x1f75c, 0 }, + { "MPS_PF_STAT_RX_PF_MCAST_BYTES_L", 0x1f760, 0 }, + { "MPS_PF_STAT_RX_PF_MCAST_BYTES_H", 0x1f764, 0 }, + { "MPS_PF_STAT_RX_PF_MCAST_FRAMES_L", 0x1f768, 0 }, + { "MPS_PF_STAT_RX_PF_MCAST_FRAMES_H", 0x1f76c, 0 }, + { "MPS_PF_STAT_RX_PF_UCAST_BYTES_L", 0x1f770, 0 }, + { "MPS_PF_STAT_RX_PF_UCAST_BYTES_H", 0x1f774, 0 }, + { "MPS_PF_STAT_RX_PF_UCAST_FRAMES_L", 0x1f778, 0 }, + { "MPS_PF_STAT_RX_PF_UCAST_FRAMES_H", 0x1f77c, 0 }, + { "MPS_PF_STAT_RX_PF_ERR_FRAMES_L", 0x1f780, 0 }, + { "MPS_PF_STAT_RX_PF_ERR_FRAMES_H", 0x1f784, 0 }, + { "MPS_PF_STAT_TX_PF_BCAST_BYTES_L", 0x1fb00, 0 }, + { "MPS_PF_STAT_TX_PF_BCAST_BYTES_H", 0x1fb04, 0 }, + { "MPS_PF_STAT_TX_PF_BCAST_FRAMES_L", 0x1fb08, 0 }, + { "MPS_PF_STAT_TX_PF_BCAST_FRAMES_H", 0x1fb0c, 0 }, + { "MPS_PF_STAT_TX_PF_MCAST_BYTES_L", 0x1fb10, 0 }, + { "MPS_PF_STAT_TX_PF_MCAST_BYTES_H", 0x1fb14, 0 }, + { "MPS_PF_STAT_TX_PF_MCAST_FRAMES_L", 0x1fb18, 0 }, + { "MPS_PF_STAT_TX_PF_MCAST_FRAMES_H", 0x1fb1c, 0 }, + { "MPS_PF_STAT_TX_PF_UCAST_BYTES_L", 0x1fb20, 0 }, + { "MPS_PF_STAT_TX_PF_UCAST_BYTES_H", 0x1fb24, 0 }, + { "MPS_PF_STAT_TX_PF_UCAST_FRAMES_L", 0x1fb28, 0 }, + { "MPS_PF_STAT_TX_PF_UCAST_FRAMES_H", 0x1fb2c, 0 }, + { "MPS_PF_STAT_TX_PF_OFFLOAD_BYTES_L", 0x1fb30, 0 }, + { "MPS_PF_STAT_TX_PF_OFFLOAD_BYTES_H", 0x1fb34, 0 }, + { "MPS_PF_STAT_TX_PF_OFFLOAD_FRAMES_L", 0x1fb38, 0 }, + { "MPS_PF_STAT_TX_PF_OFFLOAD_FRAMES_H", 0x1fb3c, 0 }, + { "MPS_PF_STAT_RX_PF_BYTES_L", 0x1fb40, 0 }, + { "MPS_PF_STAT_RX_PF_BYTES_H", 0x1fb44, 0 }, + { "MPS_PF_STAT_RX_PF_FRAMES_L", 0x1fb48, 0 }, + { "MPS_PF_STAT_RX_PF_FRAMES_H", 0x1fb4c, 0 }, + { "MPS_PF_STAT_RX_PF_BCAST_BYTES_L", 0x1fb50, 0 }, + { "MPS_PF_STAT_RX_PF_BCAST_BYTES_H", 0x1fb54, 0 }, + { "MPS_PF_STAT_RX_PF_BCAST_FRAMES_L", 0x1fb58, 0 }, + { "MPS_PF_STAT_RX_PF_BCAST_FRAMES_H", 0x1fb5c, 0 }, + { "MPS_PF_STAT_RX_PF_MCAST_BYTES_L", 0x1fb60, 0 }, + { "MPS_PF_STAT_RX_PF_MCAST_BYTES_H", 0x1fb64, 0 }, + { "MPS_PF_STAT_RX_PF_MCAST_FRAMES_L", 0x1fb68, 0 }, + { "MPS_PF_STAT_RX_PF_MCAST_FRAMES_H", 0x1fb6c, 0 }, + { "MPS_PF_STAT_RX_PF_UCAST_BYTES_L", 0x1fb70, 0 }, + { "MPS_PF_STAT_RX_PF_UCAST_BYTES_H", 0x1fb74, 0 }, + { "MPS_PF_STAT_RX_PF_UCAST_FRAMES_L", 0x1fb78, 0 }, + { "MPS_PF_STAT_RX_PF_UCAST_FRAMES_H", 0x1fb7c, 0 }, + { "MPS_PF_STAT_RX_PF_ERR_FRAMES_L", 0x1fb80, 0 }, + { "MPS_PF_STAT_RX_PF_ERR_FRAMES_H", 0x1fb84, 0 }, + { "MPS_PF_STAT_TX_PF_BCAST_BYTES_L", 0x1ff00, 0 }, + { "MPS_PF_STAT_TX_PF_BCAST_BYTES_H", 0x1ff04, 0 }, + { "MPS_PF_STAT_TX_PF_BCAST_FRAMES_L", 0x1ff08, 0 }, + { "MPS_PF_STAT_TX_PF_BCAST_FRAMES_H", 0x1ff0c, 0 }, + { "MPS_PF_STAT_TX_PF_MCAST_BYTES_L", 0x1ff10, 0 }, + { "MPS_PF_STAT_TX_PF_MCAST_BYTES_H", 0x1ff14, 0 }, + { "MPS_PF_STAT_TX_PF_MCAST_FRAMES_L", 0x1ff18, 0 }, + { "MPS_PF_STAT_TX_PF_MCAST_FRAMES_H", 0x1ff1c, 0 }, + { "MPS_PF_STAT_TX_PF_UCAST_BYTES_L", 0x1ff20, 0 }, + { "MPS_PF_STAT_TX_PF_UCAST_BYTES_H", 0x1ff24, 0 }, + { "MPS_PF_STAT_TX_PF_UCAST_FRAMES_L", 0x1ff28, 0 }, + { "MPS_PF_STAT_TX_PF_UCAST_FRAMES_H", 0x1ff2c, 0 }, + { "MPS_PF_STAT_TX_PF_OFFLOAD_BYTES_L", 0x1ff30, 0 }, + { "MPS_PF_STAT_TX_PF_OFFLOAD_BYTES_H", 0x1ff34, 0 }, + { "MPS_PF_STAT_TX_PF_OFFLOAD_FRAMES_L", 0x1ff38, 0 }, + { "MPS_PF_STAT_TX_PF_OFFLOAD_FRAMES_H", 0x1ff3c, 0 }, + { "MPS_PF_STAT_RX_PF_BYTES_L", 0x1ff40, 0 }, + { "MPS_PF_STAT_RX_PF_BYTES_H", 0x1ff44, 0 }, + { "MPS_PF_STAT_RX_PF_FRAMES_L", 0x1ff48, 0 }, + { "MPS_PF_STAT_RX_PF_FRAMES_H", 0x1ff4c, 0 }, + { "MPS_PF_STAT_RX_PF_BCAST_BYTES_L", 0x1ff50, 0 }, + { "MPS_PF_STAT_RX_PF_BCAST_BYTES_H", 0x1ff54, 0 }, + { "MPS_PF_STAT_RX_PF_BCAST_FRAMES_L", 0x1ff58, 0 }, + { "MPS_PF_STAT_RX_PF_BCAST_FRAMES_H", 0x1ff5c, 0 }, + { "MPS_PF_STAT_RX_PF_MCAST_BYTES_L", 0x1ff60, 0 }, + { "MPS_PF_STAT_RX_PF_MCAST_BYTES_H", 0x1ff64, 0 }, + { "MPS_PF_STAT_RX_PF_MCAST_FRAMES_L", 0x1ff68, 0 }, + { "MPS_PF_STAT_RX_PF_MCAST_FRAMES_H", 0x1ff6c, 0 }, + { "MPS_PF_STAT_RX_PF_UCAST_BYTES_L", 0x1ff70, 0 }, + { "MPS_PF_STAT_RX_PF_UCAST_BYTES_H", 0x1ff74, 0 }, + { "MPS_PF_STAT_RX_PF_UCAST_FRAMES_L", 0x1ff78, 0 }, + { "MPS_PF_STAT_RX_PF_UCAST_FRAMES_H", 0x1ff7c, 0 }, + { "MPS_PF_STAT_RX_PF_ERR_FRAMES_L", 0x1ff80, 0 }, + { "MPS_PF_STAT_RX_PF_ERR_FRAMES_H", 0x1ff84, 0 }, + { "MPS_PORT_CLS_HASH_SRAM", 0x20200, 0 }, + { "Valid", 20, 1 }, + { "PortMap", 16, 4 }, + { "MultiListen", 15, 1 }, + { "Priority", 12, 3 }, + { "Replicate", 11, 1 }, + { "PF", 8, 3 }, + { "VF_Valid", 7, 1 }, + { "VF", 0, 7 }, + { "MPS_PORT_CLS_HASH_SRAM", 0x20204, 0 }, + { "Valid", 20, 1 }, + { "PortMap", 16, 4 }, + { "MultiListen", 15, 1 }, + { "Priority", 12, 3 }, + { "Replicate", 11, 1 }, + { "PF", 8, 3 }, + { "VF_Valid", 7, 1 }, + { "VF", 0, 7 }, + { "MPS_PORT_CLS_HASH_SRAM", 0x20208, 0 }, + { "Valid", 20, 1 }, + { "PortMap", 16, 4 }, + { "MultiListen", 15, 1 }, + { "Priority", 12, 3 }, + { "Replicate", 11, 1 }, + { "PF", 8, 3 }, + { "VF_Valid", 7, 1 }, + { "VF", 0, 7 }, + { "MPS_PORT_CLS_HASH_SRAM", 0x2020c, 0 }, + { "Valid", 20, 1 }, + { "PortMap", 16, 4 }, + { "MultiListen", 15, 1 }, + { "Priority", 12, 3 }, + { "Replicate", 11, 1 }, + { "PF", 8, 3 }, + { "VF_Valid", 7, 1 }, + { "VF", 0, 7 }, + { "MPS_PORT_CLS_HASH_SRAM", 0x20210, 0 }, + { "Valid", 20, 1 }, + { "PortMap", 16, 4 }, + { "MultiListen", 15, 1 }, + { "Priority", 12, 3 }, + { "Replicate", 11, 1 }, + { "PF", 8, 3 }, + { "VF_Valid", 7, 1 }, + { "VF", 0, 7 }, + { "MPS_PORT_CLS_HASH_SRAM", 0x20214, 0 }, + { "Valid", 20, 1 }, + { "PortMap", 16, 4 }, + { "MultiListen", 15, 1 }, + { "Priority", 12, 3 }, + { "Replicate", 11, 1 }, + { "PF", 8, 3 }, + { "VF_Valid", 7, 1 }, + { "VF", 0, 7 }, + { "MPS_PORT_CLS_HASH_SRAM", 0x20218, 0 }, + { "Valid", 20, 1 }, + { "PortMap", 16, 4 }, + { "MultiListen", 15, 1 }, + { "Priority", 12, 3 }, + { "Replicate", 11, 1 }, + { "PF", 8, 3 }, + { "VF_Valid", 7, 1 }, + { "VF", 0, 7 }, + { "MPS_PORT_CLS_HASH_SRAM", 0x2021c, 0 }, + { "Valid", 20, 1 }, + { "PortMap", 16, 4 }, + { "MultiListen", 15, 1 }, + { "Priority", 12, 3 }, + { "Replicate", 11, 1 }, + { "PF", 8, 3 }, + { "VF_Valid", 7, 1 }, + { "VF", 0, 7 }, + { "MPS_PORT_CLS_HASH_SRAM", 0x20220, 0 }, + { "Valid", 20, 1 }, + { "PortMap", 16, 4 }, + { "MultiListen", 15, 1 }, + { "Priority", 12, 3 }, + { "Replicate", 11, 1 }, + { "PF", 8, 3 }, + { "VF_Valid", 7, 1 }, + { "VF", 0, 7 }, + { "MPS_PORT_CLS_HASH_SRAM", 0x20224, 0 }, + { "Valid", 20, 1 }, + { "PortMap", 16, 4 }, + { "MultiListen", 15, 1 }, + { "Priority", 12, 3 }, + { "Replicate", 11, 1 }, + { "PF", 8, 3 }, + { "VF_Valid", 7, 1 }, + { "VF", 0, 7 }, + { "MPS_PORT_CLS_HASH_SRAM", 0x20228, 0 }, + { "Valid", 20, 1 }, + { "PortMap", 16, 4 }, + { "MultiListen", 15, 1 }, + { "Priority", 12, 3 }, + { "Replicate", 11, 1 }, + { "PF", 8, 3 }, + { "VF_Valid", 7, 1 }, + { "VF", 0, 7 }, + { "MPS_PORT_CLS_HASH_SRAM", 0x2022c, 0 }, + { "Valid", 20, 1 }, + { "PortMap", 16, 4 }, + { "MultiListen", 15, 1 }, + { "Priority", 12, 3 }, + { "Replicate", 11, 1 }, + { "PF", 8, 3 }, + { "VF_Valid", 7, 1 }, + { "VF", 0, 7 }, + { "MPS_PORT_CLS_HASH_SRAM", 0x20230, 0 }, + { "Valid", 20, 1 }, + { "PortMap", 16, 4 }, + { "MultiListen", 15, 1 }, + { "Priority", 12, 3 }, + { "Replicate", 11, 1 }, + { "PF", 8, 3 }, + { "VF_Valid", 7, 1 }, + { "VF", 0, 7 }, + { "MPS_PORT_CLS_HASH_SRAM", 0x20234, 0 }, + { "Valid", 20, 1 }, + { "PortMap", 16, 4 }, + { "MultiListen", 15, 1 }, + { "Priority", 12, 3 }, + { "Replicate", 11, 1 }, + { "PF", 8, 3 }, + { "VF_Valid", 7, 1 }, + { "VF", 0, 7 }, + { "MPS_PORT_CLS_HASH_SRAM", 0x20238, 0 }, + { "Valid", 20, 1 }, + { "PortMap", 16, 4 }, + { "MultiListen", 15, 1 }, + { "Priority", 12, 3 }, + { "Replicate", 11, 1 }, + { "PF", 8, 3 }, + { "VF_Valid", 7, 1 }, + { "VF", 0, 7 }, + { "MPS_PORT_CLS_HASH_SRAM", 0x2023c, 0 }, + { "Valid", 20, 1 }, + { "PortMap", 16, 4 }, + { "MultiListen", 15, 1 }, + { "Priority", 12, 3 }, + { "Replicate", 11, 1 }, + { "PF", 8, 3 }, + { "VF_Valid", 7, 1 }, + { "VF", 0, 7 }, + { "MPS_PORT_CLS_HASH_SRAM", 0x20240, 0 }, + { "Valid", 20, 1 }, + { "PortMap", 16, 4 }, + { "MultiListen", 15, 1 }, + { "Priority", 12, 3 }, + { "Replicate", 11, 1 }, + { "PF", 8, 3 }, + { "VF_Valid", 7, 1 }, + { "VF", 0, 7 }, + { "MPS_PORT_CLS_HASH_SRAM", 0x20244, 0 }, + { "Valid", 20, 1 }, + { "PortMap", 16, 4 }, + { "MultiListen", 15, 1 }, + { "Priority", 12, 3 }, + { "Replicate", 11, 1 }, + { "PF", 8, 3 }, + { "VF_Valid", 7, 1 }, + { "VF", 0, 7 }, + { "MPS_PORT_CLS_HASH_SRAM", 0x20248, 0 }, + { "Valid", 20, 1 }, + { "PortMap", 16, 4 }, + { "MultiListen", 15, 1 }, + { "Priority", 12, 3 }, + { "Replicate", 11, 1 }, + { "PF", 8, 3 }, + { "VF_Valid", 7, 1 }, + { "VF", 0, 7 }, + { "MPS_PORT_CLS_HASH_SRAM", 0x2024c, 0 }, + { "Valid", 20, 1 }, + { "PortMap", 16, 4 }, + { "MultiListen", 15, 1 }, + { "Priority", 12, 3 }, + { "Replicate", 11, 1 }, + { "PF", 8, 3 }, + { "VF_Valid", 7, 1 }, + { "VF", 0, 7 }, + { "MPS_PORT_CLS_HASH_SRAM", 0x20250, 0 }, + { "Valid", 20, 1 }, + { "PortMap", 16, 4 }, + { "MultiListen", 15, 1 }, + { "Priority", 12, 3 }, + { "Replicate", 11, 1 }, + { "PF", 8, 3 }, + { "VF_Valid", 7, 1 }, + { "VF", 0, 7 }, + { "MPS_PORT_CLS_HASH_SRAM", 0x20254, 0 }, + { "Valid", 20, 1 }, + { "PortMap", 16, 4 }, + { "MultiListen", 15, 1 }, + { "Priority", 12, 3 }, + { "Replicate", 11, 1 }, + { "PF", 8, 3 }, + { "VF_Valid", 7, 1 }, + { "VF", 0, 7 }, + { "MPS_PORT_CLS_HASH_SRAM", 0x20258, 0 }, + { "Valid", 20, 1 }, + { "PortMap", 16, 4 }, + { "MultiListen", 15, 1 }, + { "Priority", 12, 3 }, + { "Replicate", 11, 1 }, + { "PF", 8, 3 }, + { "VF_Valid", 7, 1 }, + { "VF", 0, 7 }, + { "MPS_PORT_CLS_HASH_SRAM", 0x2025c, 0 }, + { "Valid", 20, 1 }, + { "PortMap", 16, 4 }, + { "MultiListen", 15, 1 }, + { "Priority", 12, 3 }, + { "Replicate", 11, 1 }, + { "PF", 8, 3 }, + { "VF_Valid", 7, 1 }, + { "VF", 0, 7 }, + { "MPS_PORT_CLS_HASH_SRAM", 0x20260, 0 }, + { "Valid", 20, 1 }, + { "PortMap", 16, 4 }, + { "MultiListen", 15, 1 }, + { "Priority", 12, 3 }, + { "Replicate", 11, 1 }, + { "PF", 8, 3 }, + { "VF_Valid", 7, 1 }, + { "VF", 0, 7 }, + { "MPS_PORT_CLS_HASH_SRAM", 0x20264, 0 }, + { "Valid", 20, 1 }, + { "PortMap", 16, 4 }, + { "MultiListen", 15, 1 }, + { "Priority", 12, 3 }, + { "Replicate", 11, 1 }, + { "PF", 8, 3 }, + { "VF_Valid", 7, 1 }, + { "VF", 0, 7 }, + { "MPS_PORT_CLS_HASH_SRAM", 0x20268, 0 }, + { "Valid", 20, 1 }, + { "PortMap", 16, 4 }, + { "MultiListen", 15, 1 }, + { "Priority", 12, 3 }, + { "Replicate", 11, 1 }, + { "PF", 8, 3 }, + { "VF_Valid", 7, 1 }, + { "VF", 0, 7 }, + { "MPS_PORT_CLS_HASH_SRAM", 0x2026c, 0 }, + { "Valid", 20, 1 }, + { "PortMap", 16, 4 }, + { "MultiListen", 15, 1 }, + { "Priority", 12, 3 }, + { "Replicate", 11, 1 }, + { "PF", 8, 3 }, + { "VF_Valid", 7, 1 }, + { "VF", 0, 7 }, + { "MPS_PORT_CLS_HASH_SRAM", 0x20270, 0 }, + { "Valid", 20, 1 }, + { "PortMap", 16, 4 }, + { "MultiListen", 15, 1 }, + { "Priority", 12, 3 }, + { "Replicate", 11, 1 }, + { "PF", 8, 3 }, + { "VF_Valid", 7, 1 }, + { "VF", 0, 7 }, + { "MPS_PORT_CLS_HASH_SRAM", 0x20274, 0 }, + { "Valid", 20, 1 }, + { "PortMap", 16, 4 }, + { "MultiListen", 15, 1 }, + { "Priority", 12, 3 }, + { "Replicate", 11, 1 }, + { "PF", 8, 3 }, + { "VF_Valid", 7, 1 }, + { "VF", 0, 7 }, + { "MPS_PORT_CLS_HASH_SRAM", 0x20278, 0 }, + { "Valid", 20, 1 }, + { "PortMap", 16, 4 }, + { "MultiListen", 15, 1 }, + { "Priority", 12, 3 }, + { "Replicate", 11, 1 }, + { "PF", 8, 3 }, + { "VF_Valid", 7, 1 }, + { "VF", 0, 7 }, + { "MPS_PORT_CLS_HASH_SRAM", 0x2027c, 0 }, + { "Valid", 20, 1 }, + { "PortMap", 16, 4 }, + { "MultiListen", 15, 1 }, + { "Priority", 12, 3 }, + { "Replicate", 11, 1 }, + { "PF", 8, 3 }, + { "VF_Valid", 7, 1 }, + { "VF", 0, 7 }, + { "MPS_PORT_CLS_HASH_SRAM", 0x20280, 0 }, + { "Valid", 20, 1 }, + { "PortMap", 16, 4 }, + { "MultiListen", 15, 1 }, + { "Priority", 12, 3 }, + { "Replicate", 11, 1 }, + { "PF", 8, 3 }, + { "VF_Valid", 7, 1 }, + { "VF", 0, 7 }, + { "MPS_PORT_CLS_HASH_SRAM", 0x20284, 0 }, + { "Valid", 20, 1 }, + { "PortMap", 16, 4 }, + { "MultiListen", 15, 1 }, + { "Priority", 12, 3 }, + { "Replicate", 11, 1 }, + { "PF", 8, 3 }, + { "VF_Valid", 7, 1 }, + { "VF", 0, 7 }, + { "MPS_PORT_CLS_HASH_SRAM", 0x20288, 0 }, + { "Valid", 20, 1 }, + { "PortMap", 16, 4 }, + { "MultiListen", 15, 1 }, + { "Priority", 12, 3 }, + { "Replicate", 11, 1 }, + { "PF", 8, 3 }, + { "VF_Valid", 7, 1 }, + { "VF", 0, 7 }, + { "MPS_PORT_CLS_HASH_SRAM", 0x2028c, 0 }, + { "Valid", 20, 1 }, + { "PortMap", 16, 4 }, + { "MultiListen", 15, 1 }, + { "Priority", 12, 3 }, + { "Replicate", 11, 1 }, + { "PF", 8, 3 }, + { "VF_Valid", 7, 1 }, + { "VF", 0, 7 }, + { "MPS_PORT_CLS_HASH_SRAM", 0x20290, 0 }, + { "Valid", 20, 1 }, + { "PortMap", 16, 4 }, + { "MultiListen", 15, 1 }, + { "Priority", 12, 3 }, + { "Replicate", 11, 1 }, + { "PF", 8, 3 }, + { "VF_Valid", 7, 1 }, + { "VF", 0, 7 }, + { "MPS_PORT_CLS_HASH_SRAM", 0x20294, 0 }, + { "Valid", 20, 1 }, + { "PortMap", 16, 4 }, + { "MultiListen", 15, 1 }, + { "Priority", 12, 3 }, + { "Replicate", 11, 1 }, + { "PF", 8, 3 }, + { "VF_Valid", 7, 1 }, + { "VF", 0, 7 }, + { "MPS_PORT_CLS_HASH_SRAM", 0x20298, 0 }, + { "Valid", 20, 1 }, + { "PortMap", 16, 4 }, + { "MultiListen", 15, 1 }, + { "Priority", 12, 3 }, + { "Replicate", 11, 1 }, + { "PF", 8, 3 }, + { "VF_Valid", 7, 1 }, + { "VF", 0, 7 }, + { "MPS_PORT_CLS_HASH_SRAM", 0x2029c, 0 }, + { "Valid", 20, 1 }, + { "PortMap", 16, 4 }, + { "MultiListen", 15, 1 }, + { "Priority", 12, 3 }, + { "Replicate", 11, 1 }, + { "PF", 8, 3 }, + { "VF_Valid", 7, 1 }, + { "VF", 0, 7 }, + { "MPS_PORT_CLS_HASH_SRAM", 0x202a0, 0 }, + { "Valid", 20, 1 }, + { "PortMap", 16, 4 }, + { "MultiListen", 15, 1 }, + { "Priority", 12, 3 }, + { "Replicate", 11, 1 }, + { "PF", 8, 3 }, + { "VF_Valid", 7, 1 }, + { "VF", 0, 7 }, + { "MPS_PORT_CLS_HASH_SRAM", 0x202a4, 0 }, + { "Valid", 20, 1 }, + { "PortMap", 16, 4 }, + { "MultiListen", 15, 1 }, + { "Priority", 12, 3 }, + { "Replicate", 11, 1 }, + { "PF", 8, 3 }, + { "VF_Valid", 7, 1 }, + { "VF", 0, 7 }, + { "MPS_PORT_CLS_HASH_SRAM", 0x202a8, 0 }, + { "Valid", 20, 1 }, + { "PortMap", 16, 4 }, + { "MultiListen", 15, 1 }, + { "Priority", 12, 3 }, + { "Replicate", 11, 1 }, + { "PF", 8, 3 }, + { "VF_Valid", 7, 1 }, + { "VF", 0, 7 }, + { "MPS_PORT_CLS_HASH_SRAM", 0x202ac, 0 }, + { "Valid", 20, 1 }, + { "PortMap", 16, 4 }, + { "MultiListen", 15, 1 }, + { "Priority", 12, 3 }, + { "Replicate", 11, 1 }, + { "PF", 8, 3 }, + { "VF_Valid", 7, 1 }, + { "VF", 0, 7 }, + { "MPS_PORT_CLS_HASH_SRAM", 0x202b0, 0 }, + { "Valid", 20, 1 }, + { "PortMap", 16, 4 }, + { "MultiListen", 15, 1 }, + { "Priority", 12, 3 }, + { "Replicate", 11, 1 }, + { "PF", 8, 3 }, + { "VF_Valid", 7, 1 }, + { "VF", 0, 7 }, + { "MPS_PORT_CLS_HASH_SRAM", 0x202b4, 0 }, + { "Valid", 20, 1 }, + { "PortMap", 16, 4 }, + { "MultiListen", 15, 1 }, + { "Priority", 12, 3 }, + { "Replicate", 11, 1 }, + { "PF", 8, 3 }, + { "VF_Valid", 7, 1 }, + { "VF", 0, 7 }, + { "MPS_PORT_CLS_HASH_SRAM", 0x202b8, 0 }, + { "Valid", 20, 1 }, + { "PortMap", 16, 4 }, + { "MultiListen", 15, 1 }, + { "Priority", 12, 3 }, + { "Replicate", 11, 1 }, + { "PF", 8, 3 }, + { "VF_Valid", 7, 1 }, + { "VF", 0, 7 }, + { "MPS_PORT_CLS_HASH_SRAM", 0x202bc, 0 }, + { "Valid", 20, 1 }, + { "PortMap", 16, 4 }, + { "MultiListen", 15, 1 }, + { "Priority", 12, 3 }, + { "Replicate", 11, 1 }, + { "PF", 8, 3 }, + { "VF_Valid", 7, 1 }, + { "VF", 0, 7 }, + { "MPS_PORT_CLS_HASH_SRAM", 0x202c0, 0 }, + { "Valid", 20, 1 }, + { "PortMap", 16, 4 }, + { "MultiListen", 15, 1 }, + { "Priority", 12, 3 }, + { "Replicate", 11, 1 }, + { "PF", 8, 3 }, + { "VF_Valid", 7, 1 }, + { "VF", 0, 7 }, + { "MPS_PORT_CLS_HASH_SRAM", 0x202c4, 0 }, + { "Valid", 20, 1 }, + { "PortMap", 16, 4 }, + { "MultiListen", 15, 1 }, + { "Priority", 12, 3 }, + { "Replicate", 11, 1 }, + { "PF", 8, 3 }, + { "VF_Valid", 7, 1 }, + { "VF", 0, 7 }, + { "MPS_PORT_CLS_HASH_SRAM", 0x202c8, 0 }, + { "Valid", 20, 1 }, + { "PortMap", 16, 4 }, + { "MultiListen", 15, 1 }, + { "Priority", 12, 3 }, + { "Replicate", 11, 1 }, + { "PF", 8, 3 }, + { "VF_Valid", 7, 1 }, + { "VF", 0, 7 }, + { "MPS_PORT_CLS_HASH_SRAM", 0x202cc, 0 }, + { "Valid", 20, 1 }, + { "PortMap", 16, 4 }, + { "MultiListen", 15, 1 }, + { "Priority", 12, 3 }, + { "Replicate", 11, 1 }, + { "PF", 8, 3 }, + { "VF_Valid", 7, 1 }, + { "VF", 0, 7 }, + { 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{ "PF", 8, 3 }, + { "VF_Valid", 7, 1 }, + { "VF", 0, 7 }, + { "MPS_PORT_CLS_HASH_SRAM", 0x262f4, 0 }, + { "Valid", 20, 1 }, + { "PortMap", 16, 4 }, + { "MultiListen", 15, 1 }, + { "Priority", 12, 3 }, + { "Replicate", 11, 1 }, + { "PF", 8, 3 }, + { "VF_Valid", 7, 1 }, + { "VF", 0, 7 }, + { "MPS_PORT_CLS_HASH_SRAM", 0x262f8, 0 }, + { "Valid", 20, 1 }, + { "PortMap", 16, 4 }, + { "MultiListen", 15, 1 }, + { "Priority", 12, 3 }, + { "Replicate", 11, 1 }, + { "PF", 8, 3 }, + { "VF_Valid", 7, 1 }, + { "VF", 0, 7 }, + { "MPS_PORT_CLS_HASH_SRAM", 0x262fc, 0 }, + { "Valid", 20, 1 }, + { "PortMap", 16, 4 }, + { "MultiListen", 15, 1 }, + { "Priority", 12, 3 }, + { "Replicate", 11, 1 }, + { "PF", 8, 3 }, + { "VF_Valid", 7, 1 }, + { "VF", 0, 7 }, + { "MPS_PORT_CLS_HASH_SRAM", 0x26300, 0 }, + { "Valid", 20, 1 }, + { "PortMap", 16, 4 }, + { "MultiListen", 15, 1 }, + { "Priority", 12, 3 }, + { "Replicate", 11, 1 }, + { "PF", 8, 3 }, + { "VF_Valid", 7, 1 }, + { "VF", 0, 7 }, + { "MPS_PORT_CLS_HASH_CTL", 0x20304, 0 }, + { "UnicastEnable", 31, 1 }, + { "MPS_PORT_CLS_PROMISCUOUS_CTL", 0x20308, 0 }, + { "Enable", 31, 1 }, + { "MultiListen", 15, 1 }, + { "Priority", 12, 3 }, + { "Replicate", 11, 1 }, + { "PF", 8, 3 }, + { "VF_Valid", 7, 1 }, + { "VF", 0, 7 }, + { "MPS_PORT_CLS_BMC_MAC_ADDR_L", 0x2030c, 0 }, + { "MPS_PORT_CLS_BMC_MAC_ADDR_H", 0x20310, 0 }, + { "MatchBoth", 17, 1 }, + { "Valid", 16, 1 }, + { "DA", 0, 16 }, + { "MPS_PORT_CLS_BMC_VLAN", 0x20314, 0 }, + { "BMC_VLAN_SEL", 13, 1 }, + { "Valid", 12, 1 }, + { "VLAN_ID", 0, 12 }, + { "MPS_PORT_CLS_CTL", 0x20318, 0 }, + { "MPS_PORT_CLS_HASH_CTL", 0x22304, 0 }, + { "UnicastEnable", 31, 1 }, + { "MPS_PORT_CLS_PROMISCUOUS_CTL", 0x22308, 0 }, + { "Enable", 31, 1 }, + { "MultiListen", 15, 1 }, + { "Priority", 12, 3 }, + { "Replicate", 11, 1 }, + { "PF", 8, 3 }, + { "VF_Valid", 7, 1 }, + { "VF", 0, 7 }, + { "MPS_PORT_CLS_BMC_MAC_ADDR_L", 0x2230c, 0 }, + { "MPS_PORT_CLS_BMC_MAC_ADDR_H", 0x22310, 0 }, + { "MatchBoth", 17, 1 }, + { "Valid", 16, 1 }, + { "DA", 0, 16 }, + { "MPS_PORT_CLS_BMC_VLAN", 0x22314, 0 }, + { "BMC_VLAN_SEL", 13, 1 }, + { "Valid", 12, 1 }, + { "VLAN_ID", 0, 12 }, + { "MPS_PORT_CLS_CTL", 0x22318, 0 }, + { "MPS_PORT_CLS_HASH_CTL", 0x24304, 0 }, + { "UnicastEnable", 31, 1 }, + { "MPS_PORT_CLS_PROMISCUOUS_CTL", 0x24308, 0 }, + { "Enable", 31, 1 }, + { "MultiListen", 15, 1 }, + { "Priority", 12, 3 }, + { "Replicate", 11, 1 }, + { "PF", 8, 3 }, + { "VF_Valid", 7, 1 }, + { "VF", 0, 7 }, + { "MPS_PORT_CLS_BMC_MAC_ADDR_L", 0x2430c, 0 }, + { "MPS_PORT_CLS_BMC_MAC_ADDR_H", 0x24310, 0 }, + { "MatchBoth", 17, 1 }, + { "Valid", 16, 1 }, + { "DA", 0, 16 }, + { "MPS_PORT_CLS_BMC_VLAN", 0x24314, 0 }, + { "BMC_VLAN_SEL", 13, 1 }, + { "Valid", 12, 1 }, + { "VLAN_ID", 0, 12 }, + { "MPS_PORT_CLS_CTL", 0x24318, 0 }, + { "MPS_PORT_CLS_HASH_CTL", 0x26304, 0 }, + { "UnicastEnable", 31, 1 }, + { "MPS_PORT_CLS_PROMISCUOUS_CTL", 0x26308, 0 }, + { "Enable", 31, 1 }, + { "MultiListen", 15, 1 }, + { "Priority", 12, 3 }, + { "Replicate", 11, 1 }, + { "PF", 8, 3 }, + { "VF_Valid", 7, 1 }, + { "VF", 0, 7 }, + { "MPS_PORT_CLS_BMC_MAC_ADDR_L", 0x2630c, 0 }, + { "MPS_PORT_CLS_BMC_MAC_ADDR_H", 0x26310, 0 }, + { "MatchBoth", 17, 1 }, + { "Valid", 16, 1 }, + { "DA", 0, 16 }, + { "MPS_PORT_CLS_BMC_VLAN", 0x26314, 0 }, + { "BMC_VLAN_SEL", 13, 1 }, + { "Valid", 12, 1 }, + { "VLAN_ID", 0, 12 }, + { "MPS_PORT_CLS_CTL", 0x26318, 0 }, + { "MPS_CLS_CTL", 0xd000, 0 }, + { "MemWriteFault", 4, 1 }, + { "MemWriteWaiting", 3, 1 }, + { "CimNoPromiscuous", 2, 1 }, + { "HypervisorOnly", 1, 1 }, + { "VlanClsEn", 0, 1 }, + { "MPS_CLS_ARB_WEIGHT", 0xd004, 0 }, + { "PlWeight", 16, 5 }, + { "CimWeight", 8, 5 }, + { "LpbkWeight", 0, 5 }, + { "MPS_CLS_BMC_MAC_ADDR_L", 0xd010, 0 }, + { "MPS_CLS_BMC_MAC_ADDR_H", 0xd014, 0 }, + { "MatchBoth", 17, 1 }, + { "Valid", 16, 1 }, + { "DA", 0, 16 }, + { "MPS_CLS_BMC_VLAN", 0xd018, 0 }, + { "Valid", 12, 1 }, + { "VLAN_ID", 0, 12 }, + { "MPS_CLS_PERR_INJECT", 0xd01c, 0 }, + { "MemSel", 1, 2 }, + { "InjectDataErr", 0, 1 }, + { "MPS_CLS_PERR_ENABLE", 0xd020, 0 }, + { "HashSRAM", 2, 1 }, + { "MatchTCAM", 1, 1 }, + { "MatchSRAM", 0, 1 }, + { "MPS_CLS_INT_ENABLE", 0xd024, 0 }, + { "PLErrEnb", 3, 1 }, + { "HashSRAM", 2, 1 }, + { "MatchTCAM", 1, 1 }, + { "MatchSRAM", 0, 1 }, + { "MPS_CLS_INT_CAUSE", 0xd028, 0 }, + { "PLErrEnb", 3, 1 }, + { "HashSRAM", 2, 1 }, + { "MatchTCAM", 1, 1 }, + { "MatchSRAM", 0, 1 }, + { "MPS_CLS_PL_TEST_DATA_L", 0xd02c, 0 }, + { "MPS_CLS_PL_TEST_DATA_H", 0xd030, 0 }, + { "MPS_CLS_PL_TEST_RES_DATA", 0xd034, 0 }, + { "Cls_Priority", 24, 3 }, + { "Cls_Replicate", 23, 1 }, + { "Cls_Index", 14, 9 }, + { "Cls_VF", 7, 7 }, + { "Cls_VF_Vld", 6, 1 }, + { "Cls_PF", 3, 3 }, + { "Cls_Match", 0, 3 }, + { "MPS_CLS_PL_TEST_CTL", 0xd038, 0 }, + { "MPS_CLS_PORT_BMC_CTL", 0xd03c, 0 }, + { "MPS_CLS_VLAN_TABLE", 0xdfc0, 0 }, + { "VLAN_Mask", 16, 12 }, + { "PF", 13, 3 }, + { "VLAN_Valid", 12, 1 }, + { "VLAN_ID", 0, 12 }, + { "MPS_CLS_VLAN_TABLE", 0xdfc4, 0 }, + { "VLAN_Mask", 16, 12 }, + { "PF", 13, 3 }, + { "VLAN_Valid", 12, 1 }, + { "VLAN_ID", 0, 12 }, + { "MPS_CLS_VLAN_TABLE", 0xdfc8, 0 }, + { "VLAN_Mask", 16, 12 }, + { "PF", 13, 3 }, + { "VLAN_Valid", 12, 1 }, + { "VLAN_ID", 0, 12 }, + { "MPS_CLS_VLAN_TABLE", 0xdfcc, 0 }, + { "VLAN_Mask", 16, 12 }, + { "PF", 13, 3 }, + { "VLAN_Valid", 12, 1 }, + { "VLAN_ID", 0, 12 }, + { "MPS_CLS_VLAN_TABLE", 0xdfd0, 0 }, + { "VLAN_Mask", 16, 12 }, + { "PF", 13, 3 }, + { "VLAN_Valid", 12, 1 }, + { "VLAN_ID", 0, 12 }, + { "MPS_CLS_VLAN_TABLE", 0xdfd4, 0 }, + { "VLAN_Mask", 16, 12 }, + { "PF", 13, 3 }, + { "VLAN_Valid", 12, 1 }, + { "VLAN_ID", 0, 12 }, + { "MPS_CLS_VLAN_TABLE", 0xdfd8, 0 }, + { "VLAN_Mask", 16, 12 }, + { "PF", 13, 3 }, + { "VLAN_Valid", 12, 1 }, + { "VLAN_ID", 0, 12 }, + { "MPS_CLS_VLAN_TABLE", 0xdfdc, 0 }, + { "VLAN_Mask", 16, 12 }, + { "PF", 13, 3 }, + { "VLAN_Valid", 12, 1 }, + { "VLAN_ID", 0, 12 }, + { "MPS_CLS_VLAN_TABLE", 0xdfe0, 0 }, + { "VLAN_Mask", 16, 12 }, + { "PF", 13, 3 }, + { "VLAN_Valid", 12, 1 }, + { "VLAN_ID", 0, 12 }, + { "MPS_CLS_SRAM_L", 0xe000, 0 }, + { "MultiListen3", 28, 1 }, + { "MultiListen2", 27, 1 }, + { "MultiListen1", 26, 1 }, + { "MultiListen0", 25, 1 }, + { "Priority3", 22, 3 }, + { "Priority2", 19, 3 }, + { "Priority1", 16, 3 }, + { "Priority0", 13, 3 }, + { "Valid", 12, 1 }, + { "Replicate", 11, 1 }, + { "PF", 8, 3 }, + { "VF_Valid", 7, 1 }, + { "VF", 0, 7 }, + { "MPS_CLS_SRAM_L", 0xe008, 0 }, + { "MultiListen3", 28, 1 }, + { "MultiListen2", 27, 1 }, + { "MultiListen1", 26, 1 }, + { "MultiListen0", 25, 1 }, + { "Priority3", 22, 3 }, + { "Priority2", 19, 3 }, + { "Priority1", 16, 3 }, + { "Priority0", 13, 3 }, + { "Valid", 12, 1 }, + { "Replicate", 11, 1 }, + { "PF", 8, 3 }, + { "VF_Valid", 7, 1 }, + { "VF", 0, 7 }, + { "MPS_CLS_SRAM_L", 0xe010, 0 }, + { "MultiListen3", 28, 1 }, + { "MultiListen2", 27, 1 }, + { "MultiListen1", 26, 1 }, + { "MultiListen0", 25, 1 }, + { "Priority3", 22, 3 }, + { "Priority2", 19, 3 }, + { "Priority1", 16, 3 }, + { "Priority0", 13, 3 }, + { "Valid", 12, 1 }, + { "Replicate", 11, 1 }, + { "PF", 8, 3 }, + { "VF_Valid", 7, 1 }, + { "VF", 0, 7 }, + { "MPS_CLS_SRAM_L", 0xe018, 0 }, + { "MultiListen3", 28, 1 }, + { "MultiListen2", 27, 1 }, + { "MultiListen1", 26, 1 }, + { "MultiListen0", 25, 1 }, + { "Priority3", 22, 3 }, + { "Priority2", 19, 3 }, + { "Priority1", 16, 3 }, + { "Priority0", 13, 3 }, + { "Valid", 12, 1 }, + { "Replicate", 11, 1 }, + { "PF", 8, 3 }, + { "VF_Valid", 7, 1 }, + { "VF", 0, 7 }, + { "MPS_CLS_SRAM_L", 0xe020, 0 }, + { "MultiListen3", 28, 1 }, + { "MultiListen2", 27, 1 }, + { "MultiListen1", 26, 1 }, + { "MultiListen0", 25, 1 }, + { "Priority3", 22, 3 }, + { "Priority2", 19, 3 }, + { "Priority1", 16, 3 }, + { "Priority0", 13, 3 }, + { "Valid", 12, 1 }, + { "Replicate", 11, 1 }, + { "PF", 8, 3 }, + { "VF_Valid", 7, 1 }, + { "VF", 0, 7 }, + { "MPS_CLS_SRAM_L", 0xe028, 0 }, + { "MultiListen3", 28, 1 }, + { "MultiListen2", 27, 1 }, + { "MultiListen1", 26, 1 }, + { "MultiListen0", 25, 1 }, + { "Priority3", 22, 3 }, + { "Priority2", 19, 3 }, + { "Priority1", 16, 3 }, + { "Priority0", 13, 3 }, + { "Valid", 12, 1 }, + { "Replicate", 11, 1 }, + { "PF", 8, 3 }, + { "VF_Valid", 7, 1 }, + { "VF", 0, 7 }, + { "MPS_CLS_SRAM_L", 0xe030, 0 }, + { "MultiListen3", 28, 1 }, + { "MultiListen2", 27, 1 }, + { "MultiListen1", 26, 1 }, + { "MultiListen0", 25, 1 }, + { "Priority3", 22, 3 }, + { "Priority2", 19, 3 }, + { "Priority1", 16, 3 }, + { "Priority0", 13, 3 }, + { "Valid", 12, 1 }, + { "Replicate", 11, 1 }, + { "PF", 8, 3 }, + { "VF_Valid", 7, 1 }, + { "VF", 0, 7 }, + { "MPS_CLS_SRAM_L", 0xe038, 0 }, + { "MultiListen3", 28, 1 }, + { "MultiListen2", 27, 1 }, + { "MultiListen1", 26, 1 }, + { "MultiListen0", 25, 1 }, + { "Priority3", 22, 3 }, + { "Priority2", 19, 3 }, + { "Priority1", 16, 3 }, + { "Priority0", 13, 3 }, + { "Valid", 12, 1 }, + { "Replicate", 11, 1 }, + { "PF", 8, 3 }, + { "VF_Valid", 7, 1 }, + { "VF", 0, 7 }, + { "MPS_CLS_SRAM_L", 0xe040, 0 }, + { "MultiListen3", 28, 1 }, + { "MultiListen2", 27, 1 }, + { "MultiListen1", 26, 1 }, + { "MultiListen0", 25, 1 }, + { "Priority3", 22, 3 }, + { "Priority2", 19, 3 }, + { "Priority1", 16, 3 }, + { "Priority0", 13, 3 }, + { "Valid", 12, 1 }, + { "Replicate", 11, 1 }, + { "PF", 8, 3 }, + { "VF_Valid", 7, 1 }, + { "VF", 0, 7 }, + { "MPS_CLS_SRAM_L", 0xe048, 0 }, + { "MultiListen3", 28, 1 }, + { "MultiListen2", 27, 1 }, + { "MultiListen1", 26, 1 }, + { "MultiListen0", 25, 1 }, + { "Priority3", 22, 3 }, + { "Priority2", 19, 3 }, + { "Priority1", 16, 3 }, + { "Priority0", 13, 3 }, + { "Valid", 12, 1 }, + { "Replicate", 11, 1 }, + { "PF", 8, 3 }, + { "VF_Valid", 7, 1 }, + { "VF", 0, 7 }, + { "MPS_CLS_SRAM_L", 0xe050, 0 }, + { "MultiListen3", 28, 1 }, + { "MultiListen2", 27, 1 }, + { "MultiListen1", 26, 1 }, + { "MultiListen0", 25, 1 }, + { "Priority3", 22, 3 }, + { "Priority2", 19, 3 }, + { "Priority1", 16, 3 }, + { "Priority0", 13, 3 }, + { "Valid", 12, 1 }, + { "Replicate", 11, 1 }, + { "PF", 8, 3 }, + { "VF_Valid", 7, 1 }, + { "VF", 0, 7 }, + { "MPS_CLS_SRAM_L", 0xe058, 0 }, + { "MultiListen3", 28, 1 }, + { "MultiListen2", 27, 1 }, + { "MultiListen1", 26, 1 }, + { "MultiListen0", 25, 1 }, + { "Priority3", 22, 3 }, + { "Priority2", 19, 3 }, + { "Priority1", 16, 3 }, + { "Priority0", 13, 3 }, + { "Valid", 12, 1 }, + { "Replicate", 11, 1 }, + { "PF", 8, 3 }, + { "VF_Valid", 7, 1 }, + { "VF", 0, 7 }, + { "MPS_CLS_SRAM_L", 0xe060, 0 }, + { "MultiListen3", 28, 1 }, + { "MultiListen2", 27, 1 }, + { "MultiListen1", 26, 1 }, + { "MultiListen0", 25, 1 }, + { "Priority3", 22, 3 }, + { "Priority2", 19, 3 }, + { "Priority1", 16, 3 }, + { "Priority0", 13, 3 }, + { "Valid", 12, 1 }, + { "Replicate", 11, 1 }, + { "PF", 8, 3 }, + { "VF_Valid", 7, 1 }, + { "VF", 0, 7 }, + { "MPS_CLS_SRAM_L", 0xe068, 0 }, + { "MultiListen3", 28, 1 }, + { "MultiListen2", 27, 1 }, + { "MultiListen1", 26, 1 }, + { "MultiListen0", 25, 1 }, + { "Priority3", 22, 3 }, + { "Priority2", 19, 3 }, + { "Priority1", 16, 3 }, + { "Priority0", 13, 3 }, + { "Valid", 12, 1 }, + { "Replicate", 11, 1 }, + { "PF", 8, 3 }, + { "VF_Valid", 7, 1 }, + { "VF", 0, 7 }, + { "MPS_CLS_SRAM_L", 0xe070, 0 }, + { "MultiListen3", 28, 1 }, + { "MultiListen2", 27, 1 }, + { "MultiListen1", 26, 1 }, + { "MultiListen0", 25, 1 }, + { "Priority3", 22, 3 }, + { "Priority2", 19, 3 }, + { "Priority1", 16, 3 }, + { "Priority0", 13, 3 }, + { "Valid", 12, 1 }, + { "Replicate", 11, 1 }, + { "PF", 8, 3 }, + { "VF_Valid", 7, 1 }, + { "VF", 0, 7 }, + { "MPS_CLS_SRAM_L", 0xe078, 0 }, + { "MultiListen3", 28, 1 }, + { "MultiListen2", 27, 1 }, + { "MultiListen1", 26, 1 }, + { "MultiListen0", 25, 1 }, + { "Priority3", 22, 3 }, + { "Priority2", 19, 3 }, + { "Priority1", 16, 3 }, + { "Priority0", 13, 3 }, + { "Valid", 12, 1 }, + { "Replicate", 11, 1 }, + { "PF", 8, 3 }, + { "VF_Valid", 7, 1 }, + { "VF", 0, 7 }, + { "MPS_CLS_SRAM_L", 0xe080, 0 }, + { "MultiListen3", 28, 1 }, + { "MultiListen2", 27, 1 }, + { "MultiListen1", 26, 1 }, + { "MultiListen0", 25, 1 }, + { "Priority3", 22, 3 }, + { "Priority2", 19, 3 }, + { "Priority1", 16, 3 }, + { "Priority0", 13, 3 }, + { "Valid", 12, 1 }, + { "Replicate", 11, 1 }, + { "PF", 8, 3 }, + { "VF_Valid", 7, 1 }, + { "VF", 0, 7 }, + { "MPS_CLS_SRAM_L", 0xe088, 0 }, + { "MultiListen3", 28, 1 }, + { "MultiListen2", 27, 1 }, + { "MultiListen1", 26, 1 }, + { "MultiListen0", 25, 1 }, + { "Priority3", 22, 3 }, + { "Priority2", 19, 3 }, + { "Priority1", 16, 3 }, + { "Priority0", 13, 3 }, + { "Valid", 12, 1 }, + { "Replicate", 11, 1 }, + { "PF", 8, 3 }, + { "VF_Valid", 7, 1 }, + { "VF", 0, 7 }, + { "MPS_CLS_SRAM_L", 0xe090, 0 }, + { "MultiListen3", 28, 1 }, + { "MultiListen2", 27, 1 }, + { "MultiListen1", 26, 1 }, + { "MultiListen0", 25, 1 }, + { "Priority3", 22, 3 }, + { "Priority2", 19, 3 }, + { "Priority1", 16, 3 }, + { "Priority0", 13, 3 }, + { "Valid", 12, 1 }, + { "Replicate", 11, 1 }, + { "PF", 8, 3 }, + { "VF_Valid", 7, 1 }, + { "VF", 0, 7 }, + { "MPS_CLS_SRAM_L", 0xe098, 0 }, + { "MultiListen3", 28, 1 }, + { "MultiListen2", 27, 1 }, + { "MultiListen1", 26, 1 }, + { "MultiListen0", 25, 1 }, + { "Priority3", 22, 3 }, + { "Priority2", 19, 3 }, + { "Priority1", 16, 3 }, + { "Priority0", 13, 3 }, + { "Valid", 12, 1 }, + { "Replicate", 11, 1 }, + { "PF", 8, 3 }, + { "VF_Valid", 7, 1 }, + { "VF", 0, 7 }, + { "MPS_CLS_SRAM_L", 0xe0a0, 0 }, + { "MultiListen3", 28, 1 }, + { "MultiListen2", 27, 1 }, + { "MultiListen1", 26, 1 }, + { "MultiListen0", 25, 1 }, + { "Priority3", 22, 3 }, + { "Priority2", 19, 3 }, + { "Priority1", 16, 3 }, + { "Priority0", 13, 3 }, + { "Valid", 12, 1 }, + { "Replicate", 11, 1 }, + { "PF", 8, 3 }, + { "VF_Valid", 7, 1 }, + { "VF", 0, 7 }, + { "MPS_CLS_SRAM_L", 0xe0a8, 0 }, + { "MultiListen3", 28, 1 }, + { "MultiListen2", 27, 1 }, + { "MultiListen1", 26, 1 }, + { "MultiListen0", 25, 1 }, + { "Priority3", 22, 3 }, + { "Priority2", 19, 3 }, + { "Priority1", 16, 3 }, + { "Priority0", 13, 3 }, + { "Valid", 12, 1 }, + { "Replicate", 11, 1 }, + { "PF", 8, 3 }, + { "VF_Valid", 7, 1 }, + { "VF", 0, 7 }, + { "MPS_CLS_SRAM_L", 0xe0b0, 0 }, + { "MultiListen3", 28, 1 }, + { "MultiListen2", 27, 1 }, + { "MultiListen1", 26, 1 }, + { "MultiListen0", 25, 1 }, + { "Priority3", 22, 3 }, + { "Priority2", 19, 3 }, + { "Priority1", 16, 3 }, + { "Priority0", 13, 3 }, + { "Valid", 12, 1 }, + { "Replicate", 11, 1 }, + { "PF", 8, 3 }, + { "VF_Valid", 7, 1 }, + { "VF", 0, 7 }, + { "MPS_CLS_SRAM_L", 0xe0b8, 0 }, + { "MultiListen3", 28, 1 }, + { "MultiListen2", 27, 1 }, + { "MultiListen1", 26, 1 }, + { "MultiListen0", 25, 1 }, + { "Priority3", 22, 3 }, + { "Priority2", 19, 3 }, + { "Priority1", 16, 3 }, + { "Priority0", 13, 3 }, + { "Valid", 12, 1 }, + { "Replicate", 11, 1 }, + { "PF", 8, 3 }, + { "VF_Valid", 7, 1 }, + { "VF", 0, 7 }, + { "MPS_CLS_SRAM_L", 0xe0c0, 0 }, + { "MultiListen3", 28, 1 }, + { "MultiListen2", 27, 1 }, + { "MultiListen1", 26, 1 }, + { "MultiListen0", 25, 1 }, + { "Priority3", 22, 3 }, + { "Priority2", 19, 3 }, + { "Priority1", 16, 3 }, + { "Priority0", 13, 3 }, + { "Valid", 12, 1 }, + { "Replicate", 11, 1 }, + { "PF", 8, 3 }, + { "VF_Valid", 7, 1 }, + { "VF", 0, 7 }, + { "MPS_CLS_SRAM_L", 0xe0c8, 0 }, + { "MultiListen3", 28, 1 }, + { "MultiListen2", 27, 1 }, + { "MultiListen1", 26, 1 }, + { "MultiListen0", 25, 1 }, + { "Priority3", 22, 3 }, + { "Priority2", 19, 3 }, + { "Priority1", 16, 3 }, + { "Priority0", 13, 3 }, + { "Valid", 12, 1 }, + { "Replicate", 11, 1 }, + { "PF", 8, 3 }, + { "VF_Valid", 7, 1 }, + { "VF", 0, 7 }, + { "MPS_CLS_SRAM_L", 0xe0d0, 0 }, + { "MultiListen3", 28, 1 }, + { "MultiListen2", 27, 1 }, + { "MultiListen1", 26, 1 }, + { "MultiListen0", 25, 1 }, + { "Priority3", 22, 3 }, + { "Priority2", 19, 3 }, + { "Priority1", 16, 3 }, + { "Priority0", 13, 3 }, + { "Valid", 12, 1 }, + { "Replicate", 11, 1 }, + { "PF", 8, 3 }, + { "VF_Valid", 7, 1 }, + { "VF", 0, 7 }, + { "MPS_CLS_SRAM_L", 0xe0d8, 0 }, + { "MultiListen3", 28, 1 }, + { "MultiListen2", 27, 1 }, + { "MultiListen1", 26, 1 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"MacParity1", 9, 1 }, + { "MacParity0", 8, 1 }, + { "MacParityMaskSize", 4, 4 }, + { "PortMap", 0, 4 }, + { "MPS_CLS_SRAM_H", 0xe814, 0 }, + { "MacParity1", 9, 1 }, + { "MacParity0", 8, 1 }, + { "MacParityMaskSize", 4, 4 }, + { "PortMap", 0, 4 }, + { "MPS_CLS_SRAM_H", 0xe81c, 0 }, + { "MacParity1", 9, 1 }, + { "MacParity0", 8, 1 }, + { "MacParityMaskSize", 4, 4 }, + { "PortMap", 0, 4 }, + { "MPS_CLS_SRAM_H", 0xe824, 0 }, + { "MacParity1", 9, 1 }, + { "MacParity0", 8, 1 }, + { "MacParityMaskSize", 4, 4 }, + { "PortMap", 0, 4 }, + { "MPS_CLS_SRAM_H", 0xe82c, 0 }, + { "MacParity1", 9, 1 }, + { "MacParity0", 8, 1 }, + { "MacParityMaskSize", 4, 4 }, + { "PortMap", 0, 4 }, + { "MPS_CLS_SRAM_H", 0xe834, 0 }, + { "MacParity1", 9, 1 }, + { "MacParity0", 8, 1 }, + { "MacParityMaskSize", 4, 4 }, + { "PortMap", 0, 4 }, + { "MPS_CLS_SRAM_H", 0xe83c, 0 }, + { "MacParity1", 9, 1 }, + { "MacParity0", 8, 1 }, + { "MacParityMaskSize", 4, 4 }, + { "PortMap", 0, 4 }, + { "MPS_CLS_SRAM_H", 0xe844, 0 }, + { "MacParity1", 9, 1 }, + { "MacParity0", 8, 1 }, + { "MacParityMaskSize", 4, 4 }, + { "PortMap", 0, 4 }, + { "MPS_CLS_SRAM_H", 0xe84c, 0 }, + { "MacParity1", 9, 1 }, + { "MacParity0", 8, 1 }, + { "MacParityMaskSize", 4, 4 }, + { "PortMap", 0, 4 }, + { "MPS_CLS_SRAM_H", 0xe854, 0 }, + { "MacParity1", 9, 1 }, + { "MacParity0", 8, 1 }, + { "MacParityMaskSize", 4, 4 }, + { "PortMap", 0, 4 }, + { "MPS_CLS_SRAM_H", 0xe85c, 0 }, + { "MacParity1", 9, 1 }, + { "MacParity0", 8, 1 }, + { "MacParityMaskSize", 4, 4 }, + { "PortMap", 0, 4 }, + { "MPS_CLS_SRAM_H", 0xe864, 0 }, + { "MacParity1", 9, 1 }, + { "MacParity0", 8, 1 }, + { "MacParityMaskSize", 4, 4 }, + { "PortMap", 0, 4 }, + { "MPS_CLS_SRAM_H", 0xe86c, 0 }, + { "MacParity1", 9, 1 }, + { "MacParity0", 8, 1 }, + { "MacParityMaskSize", 4, 4 }, + { "PortMap", 0, 4 }, + { "MPS_CLS_SRAM_H", 0xe874, 0 }, + { "MacParity1", 9, 1 }, + { "MacParity0", 8, 1 }, + { "MacParityMaskSize", 4, 4 }, + { "PortMap", 0, 4 }, + { "MPS_CLS_SRAM_H", 0xe87c, 0 }, + { "MacParity1", 9, 1 }, + { "MacParity0", 8, 1 }, + { "MacParityMaskSize", 4, 4 }, + { "PortMap", 0, 4 }, + { "MPS_CLS_SRAM_H", 0xe884, 0 }, + { "MacParity1", 9, 1 }, + { "MacParity0", 8, 1 }, + { "MacParityMaskSize", 4, 4 }, + { "PortMap", 0, 4 }, + { "MPS_CLS_SRAM_H", 0xe88c, 0 }, + { "MacParity1", 9, 1 }, + { "MacParity0", 8, 1 }, + { "MacParityMaskSize", 4, 4 }, + { "PortMap", 0, 4 }, + { "MPS_CLS_SRAM_H", 0xe894, 0 }, + { "MacParity1", 9, 1 }, + { "MacParity0", 8, 1 }, + { "MacParityMaskSize", 4, 4 }, + { "PortMap", 0, 4 }, + { "MPS_CLS_SRAM_H", 0xe89c, 0 }, + { "MacParity1", 9, 1 }, + { "MacParity0", 8, 1 }, + { "MacParityMaskSize", 4, 4 }, + { "PortMap", 0, 4 }, + { "MPS_CLS_SRAM_H", 0xe8a4, 0 }, + { "MacParity1", 9, 1 }, + { "MacParity0", 8, 1 }, + { "MacParityMaskSize", 4, 4 }, + { "PortMap", 0, 4 }, + { "MPS_CLS_SRAM_H", 0xe8ac, 0 }, + { "MacParity1", 9, 1 }, + { "MacParity0", 8, 1 }, + { "MacParityMaskSize", 4, 4 }, + { "PortMap", 0, 4 }, + { "MPS_CLS_SRAM_H", 0xe8b4, 0 }, + { "MacParity1", 9, 1 }, + { "MacParity0", 8, 1 }, + { "MacParityMaskSize", 4, 4 }, + { "PortMap", 0, 4 }, + { "MPS_CLS_SRAM_H", 0xe8bc, 0 }, + { "MacParity1", 9, 1 }, + { "MacParity0", 8, 1 }, + { "MacParityMaskSize", 4, 4 }, + { "PortMap", 0, 4 }, + { "MPS_CLS_SRAM_H", 0xe8c4, 0 }, + { "MacParity1", 9, 1 }, + { "MacParity0", 8, 1 }, + { "MacParityMaskSize", 4, 4 }, + { "PortMap", 0, 4 }, + { "MPS_CLS_SRAM_H", 0xe8cc, 0 }, + { "MacParity1", 9, 1 }, + { "MacParity0", 8, 1 }, + { "MacParityMaskSize", 4, 4 }, + { "PortMap", 0, 4 }, + { "MPS_CLS_SRAM_H", 0xe8d4, 0 }, + { "MacParity1", 9, 1 }, + { "MacParity0", 8, 1 }, + { "MacParityMaskSize", 4, 4 }, + { "PortMap", 0, 4 }, + { "MPS_CLS_SRAM_H", 0xe8dc, 0 }, + { "MacParity1", 9, 1 }, + { "MacParity0", 8, 1 }, + { "MacParityMaskSize", 4, 4 }, + { "PortMap", 0, 4 }, + { "MPS_CLS_SRAM_H", 0xe8e4, 0 }, + { "MacParity1", 9, 1 }, + { "MacParity0", 8, 1 }, + { "MacParityMaskSize", 4, 4 }, + { "PortMap", 0, 4 }, + { "MPS_CLS_SRAM_H", 0xe8ec, 0 }, + { "MacParity1", 9, 1 }, + { "MacParity0", 8, 1 }, + { "MacParityMaskSize", 4, 4 }, + { "PortMap", 0, 4 }, + { "MPS_CLS_SRAM_H", 0xe8f4, 0 }, + { "MacParity1", 9, 1 }, + { "MacParity0", 8, 1 }, + { "MacParityMaskSize", 4, 4 }, + { "PortMap", 0, 4 }, + { "MPS_CLS_SRAM_H", 0xe8fc, 0 }, + { "MacParity1", 9, 1 }, + { "MacParity0", 8, 1 }, + { "MacParityMaskSize", 4, 4 }, + { "PortMap", 0, 4 }, + { "MPS_CLS_SRAM_H", 0xe904, 0 }, + { "MacParity1", 9, 1 }, + { "MacParity0", 8, 1 }, + { "MacParityMaskSize", 4, 4 }, + { "PortMap", 0, 4 }, + { "MPS_CLS_SRAM_H", 0xe90c, 0 }, + { "MacParity1", 9, 1 }, + { "MacParity0", 8, 1 }, + { "MacParityMaskSize", 4, 4 }, + { "PortMap", 0, 4 }, + { "MPS_CLS_SRAM_H", 0xe914, 0 }, + { "MacParity1", 9, 1 }, + { "MacParity0", 8, 1 }, + { "MacParityMaskSize", 4, 4 }, + { "PortMap", 0, 4 }, + { "MPS_CLS_SRAM_H", 0xe91c, 0 }, + { "MacParity1", 9, 1 }, + { "MacParity0", 8, 1 }, + { "MacParityMaskSize", 4, 4 }, + { "PortMap", 0, 4 }, + { "MPS_CLS_SRAM_H", 0xe924, 0 }, + { "MacParity1", 9, 1 }, + { "MacParity0", 8, 1 }, + { "MacParityMaskSize", 4, 4 }, + { "PortMap", 0, 4 }, + { "MPS_CLS_SRAM_H", 0xe92c, 0 }, + { "MacParity1", 9, 1 }, + { "MacParity0", 8, 1 }, + { "MacParityMaskSize", 4, 4 }, + { "PortMap", 0, 4 }, + { "MPS_CLS_SRAM_H", 0xe934, 0 }, + { "MacParity1", 9, 1 }, + { "MacParity0", 8, 1 }, + { "MacParityMaskSize", 4, 4 }, + { "PortMap", 0, 4 }, + { "MPS_CLS_SRAM_H", 0xe93c, 0 }, + { "MacParity1", 9, 1 }, + { "MacParity0", 8, 1 }, + { "MacParityMaskSize", 4, 4 }, + { "PortMap", 0, 4 }, + { "MPS_CLS_SRAM_H", 0xe944, 0 }, + { "MacParity1", 9, 1 }, + { "MacParity0", 8, 1 }, + { "MacParityMaskSize", 4, 4 }, + { "PortMap", 0, 4 }, + { "MPS_CLS_SRAM_H", 0xe94c, 0 }, + { "MacParity1", 9, 1 }, + { "MacParity0", 8, 1 }, + { "MacParityMaskSize", 4, 4 }, + { "PortMap", 0, 4 }, + { "MPS_CLS_SRAM_H", 0xe954, 0 }, + { "MacParity1", 9, 1 }, + { "MacParity0", 8, 1 }, + { "MacParityMaskSize", 4, 4 }, + { "PortMap", 0, 4 }, + { "MPS_CLS_SRAM_H", 0xe95c, 0 }, + { "MacParity1", 9, 1 }, + { "MacParity0", 8, 1 }, + { "MacParityMaskSize", 4, 4 }, + { "PortMap", 0, 4 }, + { "MPS_CLS_SRAM_H", 0xe964, 0 }, + { "MacParity1", 9, 1 }, + { "MacParity0", 8, 1 }, + { "MacParityMaskSize", 4, 4 }, + { "PortMap", 0, 4 }, + { "MPS_CLS_SRAM_H", 0xe96c, 0 }, + { "MacParity1", 9, 1 }, + { "MacParity0", 8, 1 }, + { "MacParityMaskSize", 4, 4 }, + { "PortMap", 0, 4 }, + { "MPS_CLS_SRAM_H", 0xe974, 0 }, + { "MacParity1", 9, 1 }, + { "MacParity0", 8, 1 }, + { "MacParityMaskSize", 4, 4 }, + { "PortMap", 0, 4 }, + { "MPS_CLS_SRAM_H", 0xe97c, 0 }, + { "MacParity1", 9, 1 }, + { "MacParity0", 8, 1 }, + { "MacParityMaskSize", 4, 4 }, + { "PortMap", 0, 4 }, + { "MPS_CLS_SRAM_H", 0xe984, 0 }, + { "MacParity1", 9, 1 }, + { "MacParity0", 8, 1 }, + { "MacParityMaskSize", 4, 4 }, + { "PortMap", 0, 4 }, + { "MPS_CLS_SRAM_H", 0xe98c, 0 }, + { "MacParity1", 9, 1 }, + { "MacParity0", 8, 1 }, + { "MacParityMaskSize", 4, 4 }, + { "PortMap", 0, 4 }, + { "MPS_CLS_SRAM_H", 0xe994, 0 }, + { "MacParity1", 9, 1 }, + { "MacParity0", 8, 1 }, + { "MacParityMaskSize", 4, 4 }, + { "PortMap", 0, 4 }, + { "MPS_CLS_SRAM_H", 0xe99c, 0 }, + { "MacParity1", 9, 1 }, + { "MacParity0", 8, 1 }, + { "MacParityMaskSize", 4, 4 }, + { "PortMap", 0, 4 }, + { "MPS_CLS_SRAM_H", 0xe9a4, 0 }, + { "MacParity1", 9, 1 }, + { "MacParity0", 8, 1 }, + { "MacParityMaskSize", 4, 4 }, + { "PortMap", 0, 4 }, + { "MPS_CLS_SRAM_H", 0xe9ac, 0 }, + { "MacParity1", 9, 1 }, + { "MacParity0", 8, 1 }, + { "MacParityMaskSize", 4, 4 }, + { "PortMap", 0, 4 }, + { "MPS_CLS_SRAM_H", 0xe9b4, 0 }, + { "MacParity1", 9, 1 }, + { "MacParity0", 8, 1 }, + { "MacParityMaskSize", 4, 4 }, + { "PortMap", 0, 4 }, + { "MPS_CLS_SRAM_H", 0xe9bc, 0 }, + { "MacParity1", 9, 1 }, + { "MacParity0", 8, 1 }, + { "MacParityMaskSize", 4, 4 }, + { "PortMap", 0, 4 }, + { "MPS_CLS_SRAM_H", 0xe9c4, 0 }, + { "MacParity1", 9, 1 }, + { "MacParity0", 8, 1 }, + { "MacParityMaskSize", 4, 4 }, + { "PortMap", 0, 4 }, + { "MPS_CLS_SRAM_H", 0xe9cc, 0 }, + { "MacParity1", 9, 1 }, + { "MacParity0", 8, 1 }, + { "MacParityMaskSize", 4, 4 }, + { "PortMap", 0, 4 }, + { "MPS_CLS_SRAM_H", 0xe9d4, 0 }, + { "MacParity1", 9, 1 }, + { "MacParity0", 8, 1 }, + { "MacParityMaskSize", 4, 4 }, + { "PortMap", 0, 4 }, + { "MPS_CLS_SRAM_H", 0xe9dc, 0 }, + { "MacParity1", 9, 1 }, + { "MacParity0", 8, 1 }, + { "MacParityMaskSize", 4, 4 }, + { "PortMap", 0, 4 }, + { "MPS_CLS_SRAM_H", 0xe9e4, 0 }, + { "MacParity1", 9, 1 }, + { "MacParity0", 8, 1 }, + { "MacParityMaskSize", 4, 4 }, + { "PortMap", 0, 4 }, + { "MPS_CLS_SRAM_H", 0xe9ec, 0 }, + { "MacParity1", 9, 1 }, + { "MacParity0", 8, 1 }, + { "MacParityMaskSize", 4, 4 }, + { "PortMap", 0, 4 }, + { "MPS_CLS_SRAM_H", 0xe9f4, 0 }, + { "MacParity1", 9, 1 }, + { "MacParity0", 8, 1 }, + { "MacParityMaskSize", 4, 4 }, + { "PortMap", 0, 4 }, + { "MPS_CLS_SRAM_H", 0xe9fc, 0 }, + { "MacParity1", 9, 1 }, + { "MacParity0", 8, 1 }, + { "MacParityMaskSize", 4, 4 }, + { "PortMap", 0, 4 }, + { "MPS_CLS_SRAM_H", 0xea04, 0 }, + { "MacParity1", 9, 1 }, + { "MacParity0", 8, 1 }, + { "MacParityMaskSize", 4, 4 }, + { "PortMap", 0, 4 }, + { "MPS_CLS_SRAM_H", 0xea0c, 0 }, + { "MacParity1", 9, 1 }, + { "MacParity0", 8, 1 }, + { "MacParityMaskSize", 4, 4 }, + { "PortMap", 0, 4 }, + { "MPS_CLS_SRAM_H", 0xea14, 0 }, + { "MacParity1", 9, 1 }, + { "MacParity0", 8, 1 }, + { "MacParityMaskSize", 4, 4 }, + { "PortMap", 0, 4 }, + { "MPS_CLS_SRAM_H", 0xea1c, 0 }, + { "MacParity1", 9, 1 }, + { "MacParity0", 8, 1 }, + { "MacParityMaskSize", 4, 4 }, + { "PortMap", 0, 4 }, + { "MPS_CLS_SRAM_H", 0xea24, 0 }, + { "MacParity1", 9, 1 }, + { "MacParity0", 8, 1 }, + { "MacParityMaskSize", 4, 4 }, + { "PortMap", 0, 4 }, + { "MPS_CLS_SRAM_H", 0xea2c, 0 }, + { "MacParity1", 9, 1 }, + { "MacParity0", 8, 1 }, + { "MacParityMaskSize", 4, 4 }, + { "PortMap", 0, 4 }, + { "MPS_CLS_SRAM_H", 0xea34, 0 }, + { "MacParity1", 9, 1 }, + { "MacParity0", 8, 1 }, + { "MacParityMaskSize", 4, 4 }, + { "PortMap", 0, 4 }, + { "MPS_CLS_SRAM_H", 0xea3c, 0 }, + { "MacParity1", 9, 1 }, + { "MacParity0", 8, 1 }, + { "MacParityMaskSize", 4, 4 }, + { "PortMap", 0, 4 }, + { "MPS_CLS_SRAM_H", 0xea44, 0 }, + { "MacParity1", 9, 1 }, + { "MacParity0", 8, 1 }, + { "MacParityMaskSize", 4, 4 }, + { "PortMap", 0, 4 }, + { "MPS_CLS_SRAM_H", 0xea4c, 0 }, + { "MacParity1", 9, 1 }, + { "MacParity0", 8, 1 }, + { "MacParityMaskSize", 4, 4 }, + { "PortMap", 0, 4 }, + { "MPS_CLS_SRAM_H", 0xea54, 0 }, + { "MacParity1", 9, 1 }, + { "MacParity0", 8, 1 }, + { "MacParityMaskSize", 4, 4 }, + { "PortMap", 0, 4 }, + { "MPS_CLS_SRAM_H", 0xea5c, 0 }, + { "MacParity1", 9, 1 }, + { "MacParity0", 8, 1 }, + { "MacParityMaskSize", 4, 4 }, + { "PortMap", 0, 4 }, + { "MPS_CLS_SRAM_H", 0xea64, 0 }, + { "MacParity1", 9, 1 }, + { "MacParity0", 8, 1 }, + { "MacParityMaskSize", 4, 4 }, + { "PortMap", 0, 4 }, + { "MPS_CLS_SRAM_H", 0xea6c, 0 }, + { "MacParity1", 9, 1 }, + { "MacParity0", 8, 1 }, + { "MacParityMaskSize", 4, 4 }, + { "PortMap", 0, 4 }, + { "MPS_CLS_SRAM_H", 0xea74, 0 }, + { "MacParity1", 9, 1 }, + { "MacParity0", 8, 1 }, + { "MacParityMaskSize", 4, 4 }, + { "PortMap", 0, 4 }, + { "MPS_CLS_SRAM_H", 0xea7c, 0 }, + { "MacParity1", 9, 1 }, + { "MacParity0", 8, 1 }, + { "MacParityMaskSize", 4, 4 }, + { "PortMap", 0, 4 }, + { "MPS_CLS_TCAM_Y_L", 0xf000, 0 }, + { "MPS_CLS_TCAM_Y_L", 0xf010, 0 }, + { "MPS_CLS_TCAM_Y_L", 0xf020, 0 }, + { "MPS_CLS_TCAM_Y_L", 0xf030, 0 }, + { "MPS_CLS_TCAM_Y_L", 0xf040, 0 }, + { "MPS_CLS_TCAM_Y_L", 0xf050, 0 }, + { "MPS_CLS_TCAM_Y_L", 0xf060, 0 }, + { "MPS_CLS_TCAM_Y_L", 0xf070, 0 }, + { "MPS_CLS_TCAM_Y_L", 0xf080, 0 }, + { "MPS_CLS_TCAM_Y_L", 0xf090, 0 }, + { "MPS_CLS_TCAM_Y_L", 0xf0a0, 0 }, + { "MPS_CLS_TCAM_Y_L", 0xf0b0, 0 }, + { "MPS_CLS_TCAM_Y_L", 0xf0c0, 0 }, + { "MPS_CLS_TCAM_Y_L", 0xf0d0, 0 }, + { "MPS_CLS_TCAM_Y_L", 0xf0e0, 0 }, + { "MPS_CLS_TCAM_Y_L", 0xf0f0, 0 }, + { "MPS_CLS_TCAM_Y_L", 0xf100, 0 }, + { "MPS_CLS_TCAM_Y_L", 0xf110, 0 }, + { "MPS_CLS_TCAM_Y_L", 0xf120, 0 }, + { "MPS_CLS_TCAM_Y_L", 0xf130, 0 }, + { "MPS_CLS_TCAM_Y_L", 0xf140, 0 }, + { "MPS_CLS_TCAM_Y_L", 0xf150, 0 }, + { "MPS_CLS_TCAM_Y_L", 0xf160, 0 }, + { "MPS_CLS_TCAM_Y_L", 0xf170, 0 }, + { "MPS_CLS_TCAM_Y_L", 0xf180, 0 }, + { "MPS_CLS_TCAM_Y_L", 0xf190, 0 }, + { "MPS_CLS_TCAM_Y_L", 0xf1a0, 0 }, + { "MPS_CLS_TCAM_Y_L", 0xf1b0, 0 }, + { "MPS_CLS_TCAM_Y_L", 0xf1c0, 0 }, + { "MPS_CLS_TCAM_Y_L", 0xf1d0, 0 }, + { "MPS_CLS_TCAM_Y_L", 0xf1e0, 0 }, + { "MPS_CLS_TCAM_Y_L", 0xf1f0, 0 }, + { "MPS_CLS_TCAM_Y_L", 0xf200, 0 }, + { "MPS_CLS_TCAM_Y_L", 0xf210, 0 }, + { "MPS_CLS_TCAM_Y_L", 0xf220, 0 }, + { "MPS_CLS_TCAM_Y_L", 0xf230, 0 }, + { "MPS_CLS_TCAM_Y_L", 0xf240, 0 }, + { "MPS_CLS_TCAM_Y_L", 0xf250, 0 }, + { "MPS_CLS_TCAM_Y_L", 0xf260, 0 }, + { "MPS_CLS_TCAM_Y_L", 0xf270, 0 }, + { "MPS_CLS_TCAM_Y_L", 0xf280, 0 }, + { "MPS_CLS_TCAM_Y_L", 0xf290, 0 }, + { "MPS_CLS_TCAM_Y_L", 0xf2a0, 0 }, + { "MPS_CLS_TCAM_Y_L", 0xf2b0, 0 }, + { "MPS_CLS_TCAM_Y_L", 0xf2c0, 0 }, + { "MPS_CLS_TCAM_Y_L", 0xf2d0, 0 }, + { "MPS_CLS_TCAM_Y_L", 0xf2e0, 0 }, + { "MPS_CLS_TCAM_Y_L", 0xf2f0, 0 }, + { "MPS_CLS_TCAM_Y_L", 0xf300, 0 }, + { "MPS_CLS_TCAM_Y_L", 0xf310, 0 }, + { "MPS_CLS_TCAM_Y_L", 0xf320, 0 }, + { "MPS_CLS_TCAM_Y_L", 0xf330, 0 }, + { "MPS_CLS_TCAM_Y_L", 0xf340, 0 }, + { "MPS_CLS_TCAM_Y_L", 0xf350, 0 }, + { "MPS_CLS_TCAM_Y_L", 0xf360, 0 }, + { "MPS_CLS_TCAM_Y_L", 0xf370, 0 }, + { "MPS_CLS_TCAM_Y_L", 0xf380, 0 }, + { "MPS_CLS_TCAM_Y_L", 0xf390, 0 }, + { "MPS_CLS_TCAM_Y_L", 0xf3a0, 0 }, + { "MPS_CLS_TCAM_Y_L", 0xf3b0, 0 }, + { "MPS_CLS_TCAM_Y_L", 0xf3c0, 0 }, + { "MPS_CLS_TCAM_Y_L", 0xf3d0, 0 }, + { "MPS_CLS_TCAM_Y_L", 0xf3e0, 0 }, + { "MPS_CLS_TCAM_Y_L", 0xf3f0, 0 }, + { "MPS_CLS_TCAM_Y_L", 0xf400, 0 }, + { "MPS_CLS_TCAM_Y_L", 0xf410, 0 }, + { "MPS_CLS_TCAM_Y_L", 0xf420, 0 }, + { "MPS_CLS_TCAM_Y_L", 0xf430, 0 }, + { "MPS_CLS_TCAM_Y_L", 0xf440, 0 }, + { "MPS_CLS_TCAM_Y_L", 0xf450, 0 }, + { "MPS_CLS_TCAM_Y_L", 0xf460, 0 }, + { "MPS_CLS_TCAM_Y_L", 0xf470, 0 }, + { "MPS_CLS_TCAM_Y_L", 0xf480, 0 }, + { "MPS_CLS_TCAM_Y_L", 0xf490, 0 }, + { "MPS_CLS_TCAM_Y_L", 0xf4a0, 0 }, + { "MPS_CLS_TCAM_Y_L", 0xf4b0, 0 }, + { "MPS_CLS_TCAM_Y_L", 0xf4c0, 0 }, + { "MPS_CLS_TCAM_Y_L", 0xf4d0, 0 }, + { "MPS_CLS_TCAM_Y_L", 0xf4e0, 0 }, + { "MPS_CLS_TCAM_Y_L", 0xf4f0, 0 }, + { "MPS_CLS_TCAM_Y_L", 0xf500, 0 }, + { "MPS_CLS_TCAM_Y_L", 0xf510, 0 }, + { "MPS_CLS_TCAM_Y_L", 0xf520, 0 }, + { "MPS_CLS_TCAM_Y_L", 0xf530, 0 }, + { "MPS_CLS_TCAM_Y_L", 0xf540, 0 }, + { "MPS_CLS_TCAM_Y_L", 0xf550, 0 }, + { "MPS_CLS_TCAM_Y_L", 0xf560, 0 }, + { "MPS_CLS_TCAM_Y_L", 0xf570, 0 }, + { "MPS_CLS_TCAM_Y_L", 0xf580, 0 }, + { "MPS_CLS_TCAM_Y_L", 0xf590, 0 }, + { "MPS_CLS_TCAM_Y_L", 0xf5a0, 0 }, + { "MPS_CLS_TCAM_Y_L", 0xf5b0, 0 }, + { "MPS_CLS_TCAM_Y_L", 0xf5c0, 0 }, + { "MPS_CLS_TCAM_Y_L", 0xf5d0, 0 }, + { "MPS_CLS_TCAM_Y_L", 0xf5e0, 0 }, + { "MPS_CLS_TCAM_Y_L", 0xf5f0, 0 }, + { "MPS_CLS_TCAM_Y_L", 0xf600, 0 }, + { "MPS_CLS_TCAM_Y_L", 0xf610, 0 }, + { "MPS_CLS_TCAM_Y_L", 0xf620, 0 }, + { "MPS_CLS_TCAM_Y_L", 0xf630, 0 }, + { "MPS_CLS_TCAM_Y_L", 0xf640, 0 }, + { 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"MPS_CLS_TCAM_X_L", 0x10e18, 0 }, + { "MPS_CLS_TCAM_X_L", 0x10e28, 0 }, + { "MPS_CLS_TCAM_X_L", 0x10e38, 0 }, + { "MPS_CLS_TCAM_X_L", 0x10e48, 0 }, + { "MPS_CLS_TCAM_X_L", 0x10e58, 0 }, + { "MPS_CLS_TCAM_X_L", 0x10e68, 0 }, + { "MPS_CLS_TCAM_X_L", 0x10e78, 0 }, + { "MPS_CLS_TCAM_X_L", 0x10e88, 0 }, + { "MPS_CLS_TCAM_X_L", 0x10e98, 0 }, + { "MPS_CLS_TCAM_X_L", 0x10ea8, 0 }, + { "MPS_CLS_TCAM_X_L", 0x10eb8, 0 }, + { "MPS_CLS_TCAM_X_L", 0x10ec8, 0 }, + { "MPS_CLS_TCAM_X_L", 0x10ed8, 0 }, + { "MPS_CLS_TCAM_X_L", 0x10ee8, 0 }, + { "MPS_CLS_TCAM_X_L", 0x10ef8, 0 }, + { "MPS_CLS_TCAM_X_L", 0x10f08, 0 }, + { "MPS_CLS_TCAM_X_L", 0x10f18, 0 }, + { "MPS_CLS_TCAM_X_L", 0x10f28, 0 }, + { "MPS_CLS_TCAM_X_L", 0x10f38, 0 }, + { "MPS_CLS_TCAM_X_L", 0x10f48, 0 }, + { "MPS_CLS_TCAM_X_L", 0x10f58, 0 }, + { "MPS_CLS_TCAM_X_L", 0x10f68, 0 }, + { "MPS_CLS_TCAM_X_L", 0x10f78, 0 }, + { "MPS_CLS_TCAM_X_L", 0x10f88, 0 }, + { "MPS_CLS_TCAM_X_L", 0x10f98, 0 }, + { "MPS_CLS_TCAM_X_L", 0x10fa8, 0 }, + { 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+ { "MPS_CLS_TCAM_X_H", 0xf16c, 0 }, + { "MPS_CLS_TCAM_X_H", 0xf17c, 0 }, + { "MPS_CLS_TCAM_X_H", 0xf18c, 0 }, + { "MPS_CLS_TCAM_X_H", 0xf19c, 0 }, + { "MPS_CLS_TCAM_X_H", 0xf1ac, 0 }, + { "MPS_CLS_TCAM_X_H", 0xf1bc, 0 }, + { "MPS_CLS_TCAM_X_H", 0xf1cc, 0 }, + { "MPS_CLS_TCAM_X_H", 0xf1dc, 0 }, + { "MPS_CLS_TCAM_X_H", 0xf1ec, 0 }, + { "MPS_CLS_TCAM_X_H", 0xf1fc, 0 }, + { "MPS_CLS_TCAM_X_H", 0xf20c, 0 }, + { "MPS_CLS_TCAM_X_H", 0xf21c, 0 }, + { "MPS_CLS_TCAM_X_H", 0xf22c, 0 }, + { "MPS_CLS_TCAM_X_H", 0xf23c, 0 }, + { "MPS_CLS_TCAM_X_H", 0xf24c, 0 }, + { "MPS_CLS_TCAM_X_H", 0xf25c, 0 }, + { "MPS_CLS_TCAM_X_H", 0xf26c, 0 }, + { "MPS_CLS_TCAM_X_H", 0xf27c, 0 }, + { "MPS_CLS_TCAM_X_H", 0xf28c, 0 }, + { "MPS_CLS_TCAM_X_H", 0xf29c, 0 }, + { "MPS_CLS_TCAM_X_H", 0xf2ac, 0 }, + { "MPS_CLS_TCAM_X_H", 0xf2bc, 0 }, + { "MPS_CLS_TCAM_X_H", 0xf2cc, 0 }, + { "MPS_CLS_TCAM_X_H", 0xf2dc, 0 }, + { "MPS_CLS_TCAM_X_H", 0xf2ec, 0 }, + { "MPS_CLS_TCAM_X_H", 0xf2fc, 0 }, + { "MPS_CLS_TCAM_X_H", 0xf30c, 0 }, + { "MPS_CLS_TCAM_X_H", 0xf31c, 0 }, + { "MPS_CLS_TCAM_X_H", 0xf32c, 0 }, + { "MPS_CLS_TCAM_X_H", 0xf33c, 0 }, + { "MPS_CLS_TCAM_X_H", 0xf34c, 0 }, + { "MPS_CLS_TCAM_X_H", 0xf35c, 0 }, + { "MPS_CLS_TCAM_X_H", 0xf36c, 0 }, + { "MPS_CLS_TCAM_X_H", 0xf37c, 0 }, + { "MPS_CLS_TCAM_X_H", 0xf38c, 0 }, + { "MPS_CLS_TCAM_X_H", 0xf39c, 0 }, + { "MPS_CLS_TCAM_X_H", 0xf3ac, 0 }, + { "MPS_CLS_TCAM_X_H", 0xf3bc, 0 }, + { "MPS_CLS_TCAM_X_H", 0xf3cc, 0 }, + { "MPS_CLS_TCAM_X_H", 0xf3dc, 0 }, + { "MPS_CLS_TCAM_X_H", 0xf3ec, 0 }, + { "MPS_CLS_TCAM_X_H", 0xf3fc, 0 }, + { "MPS_CLS_TCAM_X_H", 0xf40c, 0 }, + { "MPS_CLS_TCAM_X_H", 0xf41c, 0 }, + { "MPS_CLS_TCAM_X_H", 0xf42c, 0 }, + { "MPS_CLS_TCAM_X_H", 0xf43c, 0 }, + { "MPS_CLS_TCAM_X_H", 0xf44c, 0 }, + { "MPS_CLS_TCAM_X_H", 0xf45c, 0 }, + { "MPS_CLS_TCAM_X_H", 0xf46c, 0 }, + { "MPS_CLS_TCAM_X_H", 0xf47c, 0 }, + { "MPS_CLS_TCAM_X_H", 0xf48c, 0 }, + { "MPS_CLS_TCAM_X_H", 0xf49c, 0 }, + { "MPS_CLS_TCAM_X_H", 0xf4ac, 0 }, + { "MPS_CLS_TCAM_X_H", 0xf4bc, 0 }, + { "MPS_CLS_TCAM_X_H", 0xf4cc, 0 }, + { "MPS_CLS_TCAM_X_H", 0xf4dc, 0 }, + { "MPS_CLS_TCAM_X_H", 0xf4ec, 0 }, + { "MPS_CLS_TCAM_X_H", 0xf4fc, 0 }, + { "MPS_CLS_TCAM_X_H", 0xf50c, 0 }, + { "MPS_CLS_TCAM_X_H", 0xf51c, 0 }, + { "MPS_CLS_TCAM_X_H", 0xf52c, 0 }, + { "MPS_CLS_TCAM_X_H", 0xf53c, 0 }, + { "MPS_CLS_TCAM_X_H", 0xf54c, 0 }, + { "MPS_CLS_TCAM_X_H", 0xf55c, 0 }, + { "MPS_CLS_TCAM_X_H", 0xf56c, 0 }, + { "MPS_CLS_TCAM_X_H", 0xf57c, 0 }, + { "MPS_CLS_TCAM_X_H", 0xf58c, 0 }, + { "MPS_CLS_TCAM_X_H", 0xf59c, 0 }, + { "MPS_CLS_TCAM_X_H", 0xf5ac, 0 }, + { "MPS_CLS_TCAM_X_H", 0xf5bc, 0 }, + { "MPS_CLS_TCAM_X_H", 0xf5cc, 0 }, + { "MPS_CLS_TCAM_X_H", 0xf5dc, 0 }, + { "MPS_CLS_TCAM_X_H", 0xf5ec, 0 }, + { "MPS_CLS_TCAM_X_H", 0xf5fc, 0 }, + { "MPS_CLS_TCAM_X_H", 0xf60c, 0 }, + { "MPS_CLS_TCAM_X_H", 0xf61c, 0 }, + { "MPS_CLS_TCAM_X_H", 0xf62c, 0 }, + { "MPS_CLS_TCAM_X_H", 0xf63c, 0 }, + { "MPS_CLS_TCAM_X_H", 0xf64c, 0 }, + { "MPS_CLS_TCAM_X_H", 0xf65c, 0 }, + { "MPS_CLS_TCAM_X_H", 0xf66c, 0 }, + { "MPS_CLS_TCAM_X_H", 0xf67c, 0 }, + { "MPS_CLS_TCAM_X_H", 0xf68c, 0 }, + { "MPS_CLS_TCAM_X_H", 0xf69c, 0 }, + { "MPS_CLS_TCAM_X_H", 0xf6ac, 0 }, + { "MPS_CLS_TCAM_X_H", 0xf6bc, 0 }, + { "MPS_CLS_TCAM_X_H", 0xf6cc, 0 }, + { "MPS_CLS_TCAM_X_H", 0xf6dc, 0 }, + { "MPS_CLS_TCAM_X_H", 0xf6ec, 0 }, + { "MPS_CLS_TCAM_X_H", 0xf6fc, 0 }, + { "MPS_CLS_TCAM_X_H", 0xf70c, 0 }, + { "MPS_CLS_TCAM_X_H", 0xf71c, 0 }, + { "MPS_CLS_TCAM_X_H", 0xf72c, 0 }, + { "MPS_CLS_TCAM_X_H", 0xf73c, 0 }, + { "MPS_CLS_TCAM_X_H", 0xf74c, 0 }, + { "MPS_CLS_TCAM_X_H", 0xf75c, 0 }, + { "MPS_CLS_TCAM_X_H", 0xf76c, 0 }, + { "MPS_CLS_TCAM_X_H", 0xf77c, 0 }, + { "MPS_CLS_TCAM_X_H", 0xf78c, 0 }, + { "MPS_CLS_TCAM_X_H", 0xf79c, 0 }, + { "MPS_CLS_TCAM_X_H", 0xf7ac, 0 }, + { "MPS_CLS_TCAM_X_H", 0xf7bc, 0 }, + { "MPS_CLS_TCAM_X_H", 0xf7cc, 0 }, + { "MPS_CLS_TCAM_X_H", 0xf7dc, 0 }, + { "MPS_CLS_TCAM_X_H", 0xf7ec, 0 }, + { "MPS_CLS_TCAM_X_H", 0xf7fc, 0 }, + { "MPS_CLS_TCAM_X_H", 0xf80c, 0 }, + { "MPS_CLS_TCAM_X_H", 0xf81c, 0 }, + { "MPS_CLS_TCAM_X_H", 0xf82c, 0 }, + { "MPS_CLS_TCAM_X_H", 0xf83c, 0 }, + { "MPS_CLS_TCAM_X_H", 0xf84c, 0 }, + { "MPS_CLS_TCAM_X_H", 0xf85c, 0 }, + { "MPS_CLS_TCAM_X_H", 0xf86c, 0 }, + { "MPS_CLS_TCAM_X_H", 0xf87c, 0 }, + { "MPS_CLS_TCAM_X_H", 0xf88c, 0 }, + { "MPS_CLS_TCAM_X_H", 0xf89c, 0 }, + { "MPS_CLS_TCAM_X_H", 0xf8ac, 0 }, + { "MPS_CLS_TCAM_X_H", 0xf8bc, 0 }, + { "MPS_CLS_TCAM_X_H", 0xf8cc, 0 }, + { "MPS_CLS_TCAM_X_H", 0xf8dc, 0 }, + { "MPS_CLS_TCAM_X_H", 0xf8ec, 0 }, + { "MPS_CLS_TCAM_X_H", 0xf8fc, 0 }, + { "MPS_CLS_TCAM_X_H", 0xf90c, 0 }, + { "MPS_CLS_TCAM_X_H", 0xf91c, 0 }, + { "MPS_CLS_TCAM_X_H", 0xf92c, 0 }, + { "MPS_CLS_TCAM_X_H", 0xf93c, 0 }, + { "MPS_CLS_TCAM_X_H", 0xf94c, 0 }, + { "MPS_CLS_TCAM_X_H", 0xf95c, 0 }, + { "MPS_CLS_TCAM_X_H", 0xf96c, 0 }, + { "MPS_CLS_TCAM_X_H", 0xf97c, 0 }, + { "MPS_CLS_TCAM_X_H", 0xf98c, 0 }, + { "MPS_CLS_TCAM_X_H", 0xf99c, 0 }, + { "MPS_CLS_TCAM_X_H", 0xf9ac, 0 }, + { "MPS_CLS_TCAM_X_H", 0xf9bc, 0 }, + { "MPS_CLS_TCAM_X_H", 0xf9cc, 0 }, + { "MPS_CLS_TCAM_X_H", 0xf9dc, 0 }, + { "MPS_CLS_TCAM_X_H", 0xf9ec, 0 }, + { "MPS_CLS_TCAM_X_H", 0xf9fc, 0 }, + { "MPS_CLS_TCAM_X_H", 0xfa0c, 0 }, + { "MPS_CLS_TCAM_X_H", 0xfa1c, 0 }, + { "MPS_CLS_TCAM_X_H", 0xfa2c, 0 }, + { "MPS_CLS_TCAM_X_H", 0xfa3c, 0 }, + { "MPS_CLS_TCAM_X_H", 0xfa4c, 0 }, + { "MPS_CLS_TCAM_X_H", 0xfa5c, 0 }, + { "MPS_CLS_TCAM_X_H", 0xfa6c, 0 }, + { "MPS_CLS_TCAM_X_H", 0xfa7c, 0 }, + { "MPS_CLS_TCAM_X_H", 0xfa8c, 0 }, + { "MPS_CLS_TCAM_X_H", 0xfa9c, 0 }, + { "MPS_CLS_TCAM_X_H", 0xfaac, 0 }, + { "MPS_CLS_TCAM_X_H", 0xfabc, 0 }, + { "MPS_CLS_TCAM_X_H", 0xfacc, 0 }, + { "MPS_CLS_TCAM_X_H", 0xfadc, 0 }, + { "MPS_CLS_TCAM_X_H", 0xfaec, 0 }, + { "MPS_CLS_TCAM_X_H", 0xfafc, 0 }, + { "MPS_CLS_TCAM_X_H", 0xfb0c, 0 }, + { "MPS_CLS_TCAM_X_H", 0xfb1c, 0 }, + { "MPS_CLS_TCAM_X_H", 0xfb2c, 0 }, + { "MPS_CLS_TCAM_X_H", 0xfb3c, 0 }, + { "MPS_CLS_TCAM_X_H", 0xfb4c, 0 }, + { "MPS_CLS_TCAM_X_H", 0xfb5c, 0 }, + { "MPS_CLS_TCAM_X_H", 0xfb6c, 0 }, + { "MPS_CLS_TCAM_X_H", 0xfb7c, 0 }, + { "MPS_CLS_TCAM_X_H", 0xfb8c, 0 }, + { "MPS_CLS_TCAM_X_H", 0xfb9c, 0 }, + { "MPS_CLS_TCAM_X_H", 0xfbac, 0 }, + { "MPS_CLS_TCAM_X_H", 0xfbbc, 0 }, + { "MPS_CLS_TCAM_X_H", 0xfbcc, 0 }, + { "MPS_CLS_TCAM_X_H", 0xfbdc, 0 }, + { "MPS_CLS_TCAM_X_H", 0xfbec, 0 }, + { "MPS_CLS_TCAM_X_H", 0xfbfc, 0 }, + { "MPS_CLS_TCAM_X_H", 0xfc0c, 0 }, + { "MPS_CLS_TCAM_X_H", 0xfc1c, 0 }, + { "MPS_CLS_TCAM_X_H", 0xfc2c, 0 }, + { "MPS_CLS_TCAM_X_H", 0xfc3c, 0 }, + { "MPS_CLS_TCAM_X_H", 0xfc4c, 0 }, + { "MPS_CLS_TCAM_X_H", 0xfc5c, 0 }, + { "MPS_CLS_TCAM_X_H", 0xfc6c, 0 }, + { "MPS_CLS_TCAM_X_H", 0xfc7c, 0 }, + { "MPS_CLS_TCAM_X_H", 0xfc8c, 0 }, + { "MPS_CLS_TCAM_X_H", 0xfc9c, 0 }, + { "MPS_CLS_TCAM_X_H", 0xfcac, 0 }, + { "MPS_CLS_TCAM_X_H", 0xfcbc, 0 }, + { "MPS_CLS_TCAM_X_H", 0xfccc, 0 }, + { "MPS_CLS_TCAM_X_H", 0xfcdc, 0 }, + { "MPS_CLS_TCAM_X_H", 0xfcec, 0 }, + { "MPS_CLS_TCAM_X_H", 0xfcfc, 0 }, + { "MPS_CLS_TCAM_X_H", 0xfd0c, 0 }, + { "MPS_CLS_TCAM_X_H", 0xfd1c, 0 }, + { "MPS_CLS_TCAM_X_H", 0xfd2c, 0 }, + { "MPS_CLS_TCAM_X_H", 0xfd3c, 0 }, + { "MPS_CLS_TCAM_X_H", 0xfd4c, 0 }, + { "MPS_CLS_TCAM_X_H", 0xfd5c, 0 }, + { "MPS_CLS_TCAM_X_H", 0xfd6c, 0 }, + { "MPS_CLS_TCAM_X_H", 0xfd7c, 0 }, + { "MPS_CLS_TCAM_X_H", 0xfd8c, 0 }, + { "MPS_CLS_TCAM_X_H", 0xfd9c, 0 }, + { "MPS_CLS_TCAM_X_H", 0xfdac, 0 }, + { "MPS_CLS_TCAM_X_H", 0xfdbc, 0 }, + { "MPS_CLS_TCAM_X_H", 0xfdcc, 0 }, + { "MPS_CLS_TCAM_X_H", 0xfddc, 0 }, + { "MPS_CLS_TCAM_X_H", 0xfdec, 0 }, + { "MPS_CLS_TCAM_X_H", 0xfdfc, 0 }, + { "MPS_CLS_TCAM_X_H", 0xfe0c, 0 }, + { "MPS_CLS_TCAM_X_H", 0xfe1c, 0 }, + { "MPS_CLS_TCAM_X_H", 0xfe2c, 0 }, + { "MPS_CLS_TCAM_X_H", 0xfe3c, 0 }, + { "MPS_CLS_TCAM_X_H", 0xfe4c, 0 }, + { "MPS_CLS_TCAM_X_H", 0xfe5c, 0 }, + { "MPS_CLS_TCAM_X_H", 0xfe6c, 0 }, + { "MPS_CLS_TCAM_X_H", 0xfe7c, 0 }, + { "MPS_CLS_TCAM_X_H", 0xfe8c, 0 }, + { "MPS_CLS_TCAM_X_H", 0xfe9c, 0 }, + { "MPS_CLS_TCAM_X_H", 0xfeac, 0 }, + { "MPS_CLS_TCAM_X_H", 0xfebc, 0 }, + { "MPS_CLS_TCAM_X_H", 0xfecc, 0 }, + { "MPS_CLS_TCAM_X_H", 0xfedc, 0 }, + { "MPS_CLS_TCAM_X_H", 0xfeec, 0 }, + { "MPS_CLS_TCAM_X_H", 0xfefc, 0 }, + { "MPS_CLS_TCAM_X_H", 0xff0c, 0 }, + { "MPS_CLS_TCAM_X_H", 0xff1c, 0 }, + { "MPS_CLS_TCAM_X_H", 0xff2c, 0 }, + { "MPS_CLS_TCAM_X_H", 0xff3c, 0 }, + { "MPS_CLS_TCAM_X_H", 0xff4c, 0 }, + { "MPS_CLS_TCAM_X_H", 0xff5c, 0 }, + { "MPS_CLS_TCAM_X_H", 0xff6c, 0 }, + { "MPS_CLS_TCAM_X_H", 0xff7c, 0 }, + { "MPS_CLS_TCAM_X_H", 0xff8c, 0 }, + { "MPS_CLS_TCAM_X_H", 0xff9c, 0 }, + { "MPS_CLS_TCAM_X_H", 0xffac, 0 }, + { "MPS_CLS_TCAM_X_H", 0xffbc, 0 }, + { "MPS_CLS_TCAM_X_H", 0xffcc, 0 }, + { "MPS_CLS_TCAM_X_H", 0xffdc, 0 }, + { "MPS_CLS_TCAM_X_H", 0xffec, 0 }, + { "MPS_CLS_TCAM_X_H", 0xfffc, 0 }, + { "MPS_CLS_TCAM_X_H", 0x1000c, 0 }, + { "MPS_CLS_TCAM_X_H", 0x1001c, 0 }, + { "MPS_CLS_TCAM_X_H", 0x1002c, 0 }, + { "MPS_CLS_TCAM_X_H", 0x1003c, 0 }, + { "MPS_CLS_TCAM_X_H", 0x1004c, 0 }, + { "MPS_CLS_TCAM_X_H", 0x1005c, 0 }, + { "MPS_CLS_TCAM_X_H", 0x1006c, 0 }, + { "MPS_CLS_TCAM_X_H", 0x1007c, 0 }, + { "MPS_CLS_TCAM_X_H", 0x1008c, 0 }, + { "MPS_CLS_TCAM_X_H", 0x1009c, 0 }, + { "MPS_CLS_TCAM_X_H", 0x100ac, 0 }, + { "MPS_CLS_TCAM_X_H", 0x100bc, 0 }, + { "MPS_CLS_TCAM_X_H", 0x100cc, 0 }, + { "MPS_CLS_TCAM_X_H", 0x100dc, 0 }, + { "MPS_CLS_TCAM_X_H", 0x100ec, 0 }, + { "MPS_CLS_TCAM_X_H", 0x100fc, 0 }, + { "MPS_CLS_TCAM_X_H", 0x1010c, 0 }, + { "MPS_CLS_TCAM_X_H", 0x1011c, 0 }, + { "MPS_CLS_TCAM_X_H", 0x1012c, 0 }, + { "MPS_CLS_TCAM_X_H", 0x1013c, 0 }, + { "MPS_CLS_TCAM_X_H", 0x1014c, 0 }, + { "MPS_CLS_TCAM_X_H", 0x1015c, 0 }, + { "MPS_CLS_TCAM_X_H", 0x1016c, 0 }, + { "MPS_CLS_TCAM_X_H", 0x1017c, 0 }, + { "MPS_CLS_TCAM_X_H", 0x1018c, 0 }, + { "MPS_CLS_TCAM_X_H", 0x1019c, 0 }, + { "MPS_CLS_TCAM_X_H", 0x101ac, 0 }, + { "MPS_CLS_TCAM_X_H", 0x101bc, 0 }, + { "MPS_CLS_TCAM_X_H", 0x101cc, 0 }, + { "MPS_CLS_TCAM_X_H", 0x101dc, 0 }, + { "MPS_CLS_TCAM_X_H", 0x101ec, 0 }, + { "MPS_CLS_TCAM_X_H", 0x101fc, 0 }, + { "MPS_CLS_TCAM_X_H", 0x1020c, 0 }, + { "MPS_CLS_TCAM_X_H", 0x1021c, 0 }, + { "MPS_CLS_TCAM_X_H", 0x1022c, 0 }, + { "MPS_CLS_TCAM_X_H", 0x1023c, 0 }, + { "MPS_CLS_TCAM_X_H", 0x1024c, 0 }, + { "MPS_CLS_TCAM_X_H", 0x1025c, 0 }, + { "MPS_CLS_TCAM_X_H", 0x1026c, 0 }, + { "MPS_CLS_TCAM_X_H", 0x1027c, 0 }, + { "MPS_CLS_TCAM_X_H", 0x1028c, 0 }, + { "MPS_CLS_TCAM_X_H", 0x1029c, 0 }, + { "MPS_CLS_TCAM_X_H", 0x102ac, 0 }, + { "MPS_CLS_TCAM_X_H", 0x102bc, 0 }, + { "MPS_CLS_TCAM_X_H", 0x102cc, 0 }, + { "MPS_CLS_TCAM_X_H", 0x102dc, 0 }, + { "MPS_CLS_TCAM_X_H", 0x102ec, 0 }, + { "MPS_CLS_TCAM_X_H", 0x102fc, 0 }, + { "MPS_CLS_TCAM_X_H", 0x1030c, 0 }, + { "MPS_CLS_TCAM_X_H", 0x1031c, 0 }, + { "MPS_CLS_TCAM_X_H", 0x1032c, 0 }, + { "MPS_CLS_TCAM_X_H", 0x1033c, 0 }, + { "MPS_CLS_TCAM_X_H", 0x1034c, 0 }, + { "MPS_CLS_TCAM_X_H", 0x1035c, 0 }, + { "MPS_CLS_TCAM_X_H", 0x1036c, 0 }, + { "MPS_CLS_TCAM_X_H", 0x1037c, 0 }, + { "MPS_CLS_TCAM_X_H", 0x1038c, 0 }, + { "MPS_CLS_TCAM_X_H", 0x1039c, 0 }, + { "MPS_CLS_TCAM_X_H", 0x103ac, 0 }, + { "MPS_CLS_TCAM_X_H", 0x103bc, 0 }, + { "MPS_CLS_TCAM_X_H", 0x103cc, 0 }, + { "MPS_CLS_TCAM_X_H", 0x103dc, 0 }, + { "MPS_CLS_TCAM_X_H", 0x103ec, 0 }, + { "MPS_CLS_TCAM_X_H", 0x103fc, 0 }, + { "MPS_CLS_TCAM_X_H", 0x1040c, 0 }, + { "MPS_CLS_TCAM_X_H", 0x1041c, 0 }, + { "MPS_CLS_TCAM_X_H", 0x1042c, 0 }, + { "MPS_CLS_TCAM_X_H", 0x1043c, 0 }, + { "MPS_CLS_TCAM_X_H", 0x1044c, 0 }, + { "MPS_CLS_TCAM_X_H", 0x1045c, 0 }, + { "MPS_CLS_TCAM_X_H", 0x1046c, 0 }, + { "MPS_CLS_TCAM_X_H", 0x1047c, 0 }, + { "MPS_CLS_TCAM_X_H", 0x1048c, 0 }, + { "MPS_CLS_TCAM_X_H", 0x1049c, 0 }, + { "MPS_CLS_TCAM_X_H", 0x104ac, 0 }, + { "MPS_CLS_TCAM_X_H", 0x104bc, 0 }, + { "MPS_CLS_TCAM_X_H", 0x104cc, 0 }, + { "MPS_CLS_TCAM_X_H", 0x104dc, 0 }, + { "MPS_CLS_TCAM_X_H", 0x104ec, 0 }, + { "MPS_CLS_TCAM_X_H", 0x104fc, 0 }, + { "MPS_CLS_TCAM_X_H", 0x1050c, 0 }, + { "MPS_CLS_TCAM_X_H", 0x1051c, 0 }, + { "MPS_CLS_TCAM_X_H", 0x1052c, 0 }, + { "MPS_CLS_TCAM_X_H", 0x1053c, 0 }, + { "MPS_CLS_TCAM_X_H", 0x1054c, 0 }, + { "MPS_CLS_TCAM_X_H", 0x1055c, 0 }, + { "MPS_CLS_TCAM_X_H", 0x1056c, 0 }, + { "MPS_CLS_TCAM_X_H", 0x1057c, 0 }, + { "MPS_CLS_TCAM_X_H", 0x1058c, 0 }, + { "MPS_CLS_TCAM_X_H", 0x1059c, 0 }, + { "MPS_CLS_TCAM_X_H", 0x105ac, 0 }, + { "MPS_CLS_TCAM_X_H", 0x105bc, 0 }, + { "MPS_CLS_TCAM_X_H", 0x105cc, 0 }, + { "MPS_CLS_TCAM_X_H", 0x105dc, 0 }, + { "MPS_CLS_TCAM_X_H", 0x105ec, 0 }, + { "MPS_CLS_TCAM_X_H", 0x105fc, 0 }, + { "MPS_CLS_TCAM_X_H", 0x1060c, 0 }, + { "MPS_CLS_TCAM_X_H", 0x1061c, 0 }, + { "MPS_CLS_TCAM_X_H", 0x1062c, 0 }, + { "MPS_CLS_TCAM_X_H", 0x1063c, 0 }, + { "MPS_CLS_TCAM_X_H", 0x1064c, 0 }, + { "MPS_CLS_TCAM_X_H", 0x1065c, 0 }, + { "MPS_CLS_TCAM_X_H", 0x1066c, 0 }, + { "MPS_CLS_TCAM_X_H", 0x1067c, 0 }, + { "MPS_CLS_TCAM_X_H", 0x1068c, 0 }, + { "MPS_CLS_TCAM_X_H", 0x1069c, 0 }, + { "MPS_CLS_TCAM_X_H", 0x106ac, 0 }, + { "MPS_CLS_TCAM_X_H", 0x106bc, 0 }, + { "MPS_CLS_TCAM_X_H", 0x106cc, 0 }, + { "MPS_CLS_TCAM_X_H", 0x106dc, 0 }, + { "MPS_CLS_TCAM_X_H", 0x106ec, 0 }, + { "MPS_CLS_TCAM_X_H", 0x106fc, 0 }, + { "MPS_CLS_TCAM_X_H", 0x1070c, 0 }, + { "MPS_CLS_TCAM_X_H", 0x1071c, 0 }, + { "MPS_CLS_TCAM_X_H", 0x1072c, 0 }, + { "MPS_CLS_TCAM_X_H", 0x1073c, 0 }, + { "MPS_CLS_TCAM_X_H", 0x1074c, 0 }, + { "MPS_CLS_TCAM_X_H", 0x1075c, 0 }, + { "MPS_CLS_TCAM_X_H", 0x1076c, 0 }, + { "MPS_CLS_TCAM_X_H", 0x1077c, 0 }, + { "MPS_CLS_TCAM_X_H", 0x1078c, 0 }, + { "MPS_CLS_TCAM_X_H", 0x1079c, 0 }, + { "MPS_CLS_TCAM_X_H", 0x107ac, 0 }, + { "MPS_CLS_TCAM_X_H", 0x107bc, 0 }, + { "MPS_CLS_TCAM_X_H", 0x107cc, 0 }, + { "MPS_CLS_TCAM_X_H", 0x107dc, 0 }, + { "MPS_CLS_TCAM_X_H", 0x107ec, 0 }, + { "MPS_CLS_TCAM_X_H", 0x107fc, 0 }, + { "MPS_CLS_TCAM_X_H", 0x1080c, 0 }, + { "MPS_CLS_TCAM_X_H", 0x1081c, 0 }, + { "MPS_CLS_TCAM_X_H", 0x1082c, 0 }, + { "MPS_CLS_TCAM_X_H", 0x1083c, 0 }, + { "MPS_CLS_TCAM_X_H", 0x1084c, 0 }, + { "MPS_CLS_TCAM_X_H", 0x1085c, 0 }, + { "MPS_CLS_TCAM_X_H", 0x1086c, 0 }, + { "MPS_CLS_TCAM_X_H", 0x1087c, 0 }, + { "MPS_CLS_TCAM_X_H", 0x1088c, 0 }, + { "MPS_CLS_TCAM_X_H", 0x1089c, 0 }, + { "MPS_CLS_TCAM_X_H", 0x108ac, 0 }, + { "MPS_CLS_TCAM_X_H", 0x108bc, 0 }, + { "MPS_CLS_TCAM_X_H", 0x108cc, 0 }, + { "MPS_CLS_TCAM_X_H", 0x108dc, 0 }, + { "MPS_CLS_TCAM_X_H", 0x108ec, 0 }, + { "MPS_CLS_TCAM_X_H", 0x108fc, 0 }, + { "MPS_CLS_TCAM_X_H", 0x1090c, 0 }, + { "MPS_CLS_TCAM_X_H", 0x1091c, 0 }, + { "MPS_CLS_TCAM_X_H", 0x1092c, 0 }, + { "MPS_CLS_TCAM_X_H", 0x1093c, 0 }, + { "MPS_CLS_TCAM_X_H", 0x1094c, 0 }, + { "MPS_CLS_TCAM_X_H", 0x1095c, 0 }, + { "MPS_CLS_TCAM_X_H", 0x1096c, 0 }, + { "MPS_CLS_TCAM_X_H", 0x1097c, 0 }, + { "MPS_CLS_TCAM_X_H", 0x1098c, 0 }, + { "MPS_CLS_TCAM_X_H", 0x1099c, 0 }, + { "MPS_CLS_TCAM_X_H", 0x109ac, 0 }, + { "MPS_CLS_TCAM_X_H", 0x109bc, 0 }, + { "MPS_CLS_TCAM_X_H", 0x109cc, 0 }, + { "MPS_CLS_TCAM_X_H", 0x109dc, 0 }, + { "MPS_CLS_TCAM_X_H", 0x109ec, 0 }, + { "MPS_CLS_TCAM_X_H", 0x109fc, 0 }, + { "MPS_CLS_TCAM_X_H", 0x10a0c, 0 }, + { "MPS_CLS_TCAM_X_H", 0x10a1c, 0 }, + { "MPS_CLS_TCAM_X_H", 0x10a2c, 0 }, + { "MPS_CLS_TCAM_X_H", 0x10a3c, 0 }, + { "MPS_CLS_TCAM_X_H", 0x10a4c, 0 }, + { "MPS_CLS_TCAM_X_H", 0x10a5c, 0 }, + { "MPS_CLS_TCAM_X_H", 0x10a6c, 0 }, + { "MPS_CLS_TCAM_X_H", 0x10a7c, 0 }, + { "MPS_CLS_TCAM_X_H", 0x10a8c, 0 }, + { "MPS_CLS_TCAM_X_H", 0x10a9c, 0 }, + { "MPS_CLS_TCAM_X_H", 0x10aac, 0 }, + { "MPS_CLS_TCAM_X_H", 0x10abc, 0 }, + { "MPS_CLS_TCAM_X_H", 0x10acc, 0 }, + { "MPS_CLS_TCAM_X_H", 0x10adc, 0 }, + { "MPS_CLS_TCAM_X_H", 0x10aec, 0 }, + { "MPS_CLS_TCAM_X_H", 0x10afc, 0 }, + { "MPS_CLS_TCAM_X_H", 0x10b0c, 0 }, + { "MPS_CLS_TCAM_X_H", 0x10b1c, 0 }, + { "MPS_CLS_TCAM_X_H", 0x10b2c, 0 }, + { "MPS_CLS_TCAM_X_H", 0x10b3c, 0 }, + { "MPS_CLS_TCAM_X_H", 0x10b4c, 0 }, + { "MPS_CLS_TCAM_X_H", 0x10b5c, 0 }, + { "MPS_CLS_TCAM_X_H", 0x10b6c, 0 }, + { "MPS_CLS_TCAM_X_H", 0x10b7c, 0 }, + { "MPS_CLS_TCAM_X_H", 0x10b8c, 0 }, + { "MPS_CLS_TCAM_X_H", 0x10b9c, 0 }, + { "MPS_CLS_TCAM_X_H", 0x10bac, 0 }, + { "MPS_CLS_TCAM_X_H", 0x10bbc, 0 }, + { "MPS_CLS_TCAM_X_H", 0x10bcc, 0 }, + { "MPS_CLS_TCAM_X_H", 0x10bdc, 0 }, + { "MPS_CLS_TCAM_X_H", 0x10bec, 0 }, + { "MPS_CLS_TCAM_X_H", 0x10bfc, 0 }, + { "MPS_CLS_TCAM_X_H", 0x10c0c, 0 }, + { "MPS_CLS_TCAM_X_H", 0x10c1c, 0 }, + { "MPS_CLS_TCAM_X_H", 0x10c2c, 0 }, + { "MPS_CLS_TCAM_X_H", 0x10c3c, 0 }, + { "MPS_CLS_TCAM_X_H", 0x10c4c, 0 }, + { "MPS_CLS_TCAM_X_H", 0x10c5c, 0 }, + { "MPS_CLS_TCAM_X_H", 0x10c6c, 0 }, + { "MPS_CLS_TCAM_X_H", 0x10c7c, 0 }, + { "MPS_CLS_TCAM_X_H", 0x10c8c, 0 }, + { "MPS_CLS_TCAM_X_H", 0x10c9c, 0 }, + { "MPS_CLS_TCAM_X_H", 0x10cac, 0 }, + { "MPS_CLS_TCAM_X_H", 0x10cbc, 0 }, + { "MPS_CLS_TCAM_X_H", 0x10ccc, 0 }, + { "MPS_CLS_TCAM_X_H", 0x10cdc, 0 }, + { "MPS_CLS_TCAM_X_H", 0x10cec, 0 }, + { "MPS_CLS_TCAM_X_H", 0x10cfc, 0 }, + { "MPS_CLS_TCAM_X_H", 0x10d0c, 0 }, + { "MPS_CLS_TCAM_X_H", 0x10d1c, 0 }, + { "MPS_CLS_TCAM_X_H", 0x10d2c, 0 }, + { "MPS_CLS_TCAM_X_H", 0x10d3c, 0 }, + { "MPS_CLS_TCAM_X_H", 0x10d4c, 0 }, + { "MPS_CLS_TCAM_X_H", 0x10d5c, 0 }, + { "MPS_CLS_TCAM_X_H", 0x10d6c, 0 }, + { "MPS_CLS_TCAM_X_H", 0x10d7c, 0 }, + { "MPS_CLS_TCAM_X_H", 0x10d8c, 0 }, + { "MPS_CLS_TCAM_X_H", 0x10d9c, 0 }, + { "MPS_CLS_TCAM_X_H", 0x10dac, 0 }, + { "MPS_CLS_TCAM_X_H", 0x10dbc, 0 }, + { "MPS_CLS_TCAM_X_H", 0x10dcc, 0 }, + { "MPS_CLS_TCAM_X_H", 0x10ddc, 0 }, + { "MPS_CLS_TCAM_X_H", 0x10dec, 0 }, + { "MPS_CLS_TCAM_X_H", 0x10dfc, 0 }, + { "MPS_CLS_TCAM_X_H", 0x10e0c, 0 }, + { "MPS_CLS_TCAM_X_H", 0x10e1c, 0 }, + { "MPS_CLS_TCAM_X_H", 0x10e2c, 0 }, + { "MPS_CLS_TCAM_X_H", 0x10e3c, 0 }, + { "MPS_CLS_TCAM_X_H", 0x10e4c, 0 }, + { "MPS_CLS_TCAM_X_H", 0x10e5c, 0 }, + { "MPS_CLS_TCAM_X_H", 0x10e6c, 0 }, + { "MPS_CLS_TCAM_X_H", 0x10e7c, 0 }, + { "MPS_CLS_TCAM_X_H", 0x10e8c, 0 }, + { "MPS_CLS_TCAM_X_H", 0x10e9c, 0 }, + { "MPS_CLS_TCAM_X_H", 0x10eac, 0 }, + { "MPS_CLS_TCAM_X_H", 0x10ebc, 0 }, + { "MPS_CLS_TCAM_X_H", 0x10ecc, 0 }, + { "MPS_CLS_TCAM_X_H", 0x10edc, 0 }, + { "MPS_CLS_TCAM_X_H", 0x10eec, 0 }, + { "MPS_CLS_TCAM_X_H", 0x10efc, 0 }, + { "MPS_CLS_TCAM_X_H", 0x10f0c, 0 }, + { "MPS_CLS_TCAM_X_H", 0x10f1c, 0 }, + { "MPS_CLS_TCAM_X_H", 0x10f2c, 0 }, + { "MPS_CLS_TCAM_X_H", 0x10f3c, 0 }, + { "MPS_CLS_TCAM_X_H", 0x10f4c, 0 }, + { "MPS_CLS_TCAM_X_H", 0x10f5c, 0 }, + { "MPS_CLS_TCAM_X_H", 0x10f6c, 0 }, + { "MPS_CLS_TCAM_X_H", 0x10f7c, 0 }, + { "MPS_CLS_TCAM_X_H", 0x10f8c, 0 }, + { "MPS_CLS_TCAM_X_H", 0x10f9c, 0 }, + { "MPS_CLS_TCAM_X_H", 0x10fac, 0 }, + { "MPS_CLS_TCAM_X_H", 0x10fbc, 0 }, + { "MPS_CLS_TCAM_X_H", 0x10fcc, 0 }, + { "MPS_CLS_TCAM_X_H", 0x10fdc, 0 }, + { "MPS_CLS_TCAM_X_H", 0x10fec, 0 }, + { "MPS_CLS_TCAM_X_H", 0x10ffc, 0 }, + { NULL, 0, 0 } +}; + +struct reg_info t4_cpl_switch_regs[] = { + { "CPL_SWITCH_CNTRL", 0x19040, 0 }, + { "cpl_pkt_tid", 8, 24 }, + { "cim_truncate_enable", 5, 1 }, + { "cim_to_up_full_size", 4, 1 }, + { "cpu_no_enable", 3, 1 }, + { "switch_table_enable", 2, 1 }, + { "sge_enable", 1, 1 }, + { "cim_enable", 0, 1 }, + { "CPL_SWITCH_TBL_IDX", 0x19044, 0 }, + { "CPL_SWITCH_TBL_DATA", 0x19048, 0 }, + { "CPL_SWITCH_ZERO_ERROR", 0x1904c, 0 }, + { "zero_cmd_ch1", 8, 8 }, + { "zero_cmd_ch0", 0, 8 }, + { "CPL_INTR_ENABLE", 0x19050, 0 }, + { "cim_op_map_perr", 5, 1 }, + { "cim_ovfl_error", 4, 1 }, + { "tp_framing_error", 3, 1 }, + { "sge_framing_error", 2, 1 }, + { "cim_framing_error", 1, 1 }, + { "zero_switch_error", 0, 1 }, + { "CPL_INTR_CAUSE", 0x19054, 0 }, + { "cim_op_map_perr", 5, 1 }, + { "cim_ovfl_error", 4, 1 }, + { "tp_framing_error", 3, 1 }, + { "sge_framing_error", 2, 1 }, + { "cim_framing_error", 1, 1 }, + { "zero_switch_error", 0, 1 }, + { "CPL_MAP_TBL_IDX", 0x19058, 0 }, + { "CPL_MAP_TBL_DATA", 0x1905c, 0 }, + { NULL, 0, 0 } +}; + +struct reg_info t4_smb_regs[] = { + { "SMB_GLOBAL_TIME_CFG", 0x19060, 0 }, + { "MacroCntCfg", 8, 5 }, + { "MicroCntCfg", 0, 8 }, + { "SMB_MST_TIMEOUT_CFG", 0x19064, 0 }, + { "SMB_MST_CTL_CFG", 0x19068, 0 }, + { "MstFifoDbg", 31, 1 }, + { "MstFifoDbgClr", 30, 1 }, + { "MstRxByteCfg", 12, 6 }, + { "MstTxByteCfg", 6, 6 }, + { "MstReset", 1, 1 }, + { "MstCtlEn", 0, 1 }, + { "SMB_MST_CTL_STS", 0x1906c, 0 }, + { "MstRxByteCnt", 12, 6 }, + { "MstTxByteCnt", 6, 6 }, + { "MstBusySts", 0, 1 }, + { "SMB_MST_TX_FIFO_RDWR", 0x19070, 0 }, + { "SMB_MST_RX_FIFO_RDWR", 0x19074, 0 }, + { "SMB_SLV_TIMEOUT_CFG", 0x19078, 0 }, + { "SMB_SLV_CTL_CFG", 0x1907c, 0 }, + { "SlvFifoDbg", 31, 1 }, + { "SlvFifoDbgClr", 30, 1 }, + { "SlvCrcOutBitInv", 21, 1 }, + { "SlvCrcOutBitRev", 20, 1 }, + { "SlvCrcInBitRev", 19, 1 }, + { "SlvCrcPreset", 11, 8 }, + { "SlvAddrCfg", 4, 7 }, + { "SlvAlrtSet", 2, 1 }, + { "SlvReset", 1, 1 }, + { "SlvCtlEn", 0, 1 }, + { "SMB_SLV_CTL_STS", 0x19080, 0 }, + { "SlvFifoTxCnt", 12, 6 }, + { "SlvFifoCnt", 6, 6 }, + { "SlvAlrtSts", 2, 1 }, + { "SlvBusySts", 0, 1 }, + { "SMB_SLV_FIFO_RDWR", 0x19084, 0 }, + { "SMB_INT_ENABLE", 0x1908c, 0 }, + { "MstTxFifoParEn", 21, 1 }, + { "MstRxFifoParEn", 20, 1 }, + { "SlvFifoParEn", 19, 1 }, + { "SlvUnExpBusStopEn", 18, 1 }, + { "SlvUnExpBusStartEn", 17, 1 }, + { "SlvCommandCodeInvEn", 16, 1 }, + { "SlvByteCntErrEn", 15, 1 }, + { "SlvUnExpAckMstEn", 14, 1 }, + { "SlvUnExpNackMstEn", 13, 1 }, + { "SlvNoBusStopEn", 12, 1 }, + { "SlvNoRepStartEn", 11, 1 }, + { "SlvRxAddrIntEn", 10, 1 }, + { "SlvRxPecErrIntEn", 9, 1 }, + { "SlvPrepToArpIntEn", 8, 1 }, + { "SlvTimeOutIntEn", 7, 1 }, + { "SlvErrIntEn", 6, 1 }, + { "SlvDoneIntEn", 5, 1 }, + { "SlvRxRdyIntEn", 4, 1 }, + { "MstTimeOutIntEn", 3, 1 }, + { "MstNAckIntEn", 2, 1 }, + { "MstLostArbIntEn", 1, 1 }, + { "MstDoneIntEn", 0, 1 }, + { "SMB_INT_CAUSE", 0x19090, 0 }, + { "MstTxFifoParInt", 21, 1 }, + { "MstRxFifoParInt", 20, 1 }, + { "SlvFifoParInt", 19, 1 }, + { "SlvUnExpBusStopInt", 18, 1 }, + { "SlvUnExpBusStartInt", 17, 1 }, + { "SlvCommandCodeInvInt", 16, 1 }, + { "SlvByteCntErrInt", 15, 1 }, + { "SlvUnExpAckMstInt", 14, 1 }, + { "SlvUnExpNackMstInt", 13, 1 }, + { "SlvNoBusStopInt", 12, 1 }, + { "SlvNoRepStartInt", 11, 1 }, + { "SlvRxAddrInt", 10, 1 }, + { "SlvRxPecErrInt", 9, 1 }, + { "SlvPrepToArpInt", 8, 1 }, + { "SlvTimeOutInt", 7, 1 }, + { "SlvErrInt", 6, 1 }, + { "SlvDoneInt", 5, 1 }, + { "SlvRxRdyInt", 4, 1 }, + { "MstTimeOutInt", 3, 1 }, + { "MstNAckInt", 2, 1 }, + { "MstLostArbInt", 1, 1 }, + { "MstDoneInt", 0, 1 }, + { "SMB_DEBUG_DATA", 0x19094, 0 }, + { "DebugDataH", 16, 16 }, + { "DebugDataL", 0, 16 }, + { "SMB_PERR_EN", 0x19098, 0 }, + { "MstTxFifoPerrEn", 2, 1 }, + { "MstRxFifoPerrEn", 1, 1 }, + { "SlvFifoPerrEn", 0, 1 }, + { "SMB_PERR_INJ", 0x1909c, 0 }, + { "MstTxInjDataErr", 3, 1 }, + { "MstRxInjDataErr", 2, 1 }, + { "SlvInjDataErr", 1, 1 }, + { "FifoInjDataErrEn", 0, 1 }, + { "SMB_SLV_ARP_CTL", 0x190a0, 0 }, + { "ArpCommandCode", 2, 8 }, + { "ArpAddrRes", 1, 1 }, + { "ArpAddrVal", 0, 1 }, + { "SMB_ARP_UDID0", 0x190a4, 0 }, + { "SMB_ARP_UDID1", 0x190a8, 0 }, + { "SubsystemVendorID", 16, 16 }, + { "SubsystemDeviceID", 0, 16 }, + { "SMB_ARP_UDID2", 0x190ac, 0 }, + { "DeviceID", 16, 16 }, + { "Interface", 0, 16 }, + { "SMB_ARP_UDID3", 0x190b0, 0 }, + { "DeviceCap", 24, 8 }, + { "VersionID", 16, 8 }, + { "VendorID", 0, 16 }, + { "SMB_SLV_AUX_ADDR0", 0x190b4, 0 }, + { "AuxAddr0Val", 6, 1 }, + { "AuxAddr0", 0, 6 }, + { "SMB_SLV_AUX_ADDR1", 0x190b8, 0 }, + { "AuxAddr1Val", 6, 1 }, + { "AuxAddr1", 0, 6 }, + { "SMB_SLV_AUX_ADDR2", 0x190bc, 0 }, + { "AuxAddr2Val", 6, 1 }, + { "AuxAddr2", 0, 6 }, + { "SMB_SLV_AUX_ADDR3", 0x190c0, 0 }, + { "AuxAddr3Val", 6, 1 }, + { "AuxAddr3", 0, 6 }, + { "SMB_COMMAND_CODE0", 0x190c4, 0 }, + { "SMB_COMMAND_CODE1", 0x190c8, 0 }, + { "SMB_COMMAND_CODE2", 0x190cc, 0 }, + { "SMB_COMMAND_CODE3", 0x190d0, 0 }, + { "SMB_COMMAND_CODE4", 0x190d4, 0 }, + { "SMB_COMMAND_CODE5", 0x190d8, 0 }, + { "SMB_COMMAND_CODE6", 0x190dc, 0 }, + { "SMB_COMMAND_CODE7", 0x190e0, 0 }, + { "SMB_MICRO_CNT_CLK_CFG", 0x190e4, 0 }, + { "MacroCntClkCfg", 8, 5 }, + { "MicroCntClkCfg", 0, 8 }, + { NULL, 0, 0 } +}; + +struct reg_info t4_i2cm_regs[] = { + { "I2CM_CFG", 0x190f0, 0 }, + { "I2CM_DATA", 0x190f4, 0 }, + { "I2CM_OP", 0x190f8, 0 }, + { "Busy", 31, 1 }, + { "Ack", 30, 1 }, + { "Cont", 1, 1 }, + { "Op", 0, 1 }, + { NULL, 0, 0 } +}; + +struct reg_info t4_mi_regs[] = { + { "MI_CFG", 0x19100, 0 }, + { "T4_St", 14, 1 }, + { "ClkDiv", 5, 8 }, + { "St", 3, 2 }, + { "PreEn", 2, 1 }, + { "MDIInv", 1, 1 }, + { "MDIO_1P2V_Sel", 0, 1 }, + { "MI_ADDR", 0x19104, 0 }, + { "PhyAddr", 5, 5 }, + { "RegAddr", 0, 5 }, + { "MI_DATA", 0x19108, 0 }, + { "MI_OP", 0x1910c, 0 }, + { "Busy", 31, 1 }, + { "St", 3, 2 }, + { "Inc", 2, 1 }, + { "Op", 0, 2 }, + { NULL, 0, 0 } +}; + +struct reg_info t4_uart_regs[] = { + { "UART_CONFIG", 0x19110, 0 }, + { "StopBits", 22, 2 }, + { "Parity", 20, 2 }, + { "DataBits", 16, 4 }, + { "ClkDiv", 0, 12 }, + { NULL, 0, 0 } +}; + +struct reg_info t4_pmu_regs[] = { + { "PMU_PART_CG_PWRMODE", 0x19120, 0 }, + { "TPPartCGEn", 14, 1 }, + { "PDPPartCGEn", 13, 1 }, + { "PCIePartCGEn", 12, 1 }, + { "EDC1PartCGEn", 11, 1 }, + { "MCPartCGEn", 10, 1 }, + { "EDC0PartCGEn", 9, 1 }, + { "LEPartCGEn", 8, 1 }, + { "InitPowerMode", 0, 2 }, + { "PMU_SLEEPMODE_WAKEUP", 0x19124, 0 }, + { "HWWakeUpEn", 5, 1 }, + { "Port3SleepMode", 4, 1 }, + { "Port2SleepMode", 3, 1 }, + { "Port1SleepMode", 2, 1 }, + { "Port0SleepMode", 1, 1 }, + { "WakeUp", 0, 1 }, + { NULL, 0, 0 } +}; + +struct reg_info t4_ulp_rx_regs[] = { + { "ULP_RX_CTL", 0x19150, 0 }, + { "PCMD1Threshold", 24, 8 }, + { "PCMD0Threshold", 16, 8 }, + { "disable_0B_STAG_ERR", 14, 1 }, + { "RDMA_0b_wr_opcode", 10, 4 }, + { "RDMA_0b_wr_pass", 9, 1 }, + { "STAG_RQE", 8, 1 }, + { "RDMA_State_En", 7, 1 }, + { "Crc1_En", 6, 1 }, + { "RDMA_0b_wr_cqe", 5, 1 }, + { "PCIE_Atrb_En", 4, 1 }, + { "RDMA_permissive_mode", 3, 1 }, + { "PagePodME", 2, 1 }, + { "IscsiTagTcb", 1, 1 }, + { "TddpTagTcb", 0, 1 }, + { "ULP_RX_INT_ENABLE", 0x19154, 0 }, + { "ENABLE_CTX_1", 24, 1 }, + { "ENABLE_CTX_0", 23, 1 }, + { "ENABLE_FF", 22, 1 }, + { "ENABLE_APF_1", 21, 1 }, + { "ENABLE_APF_0", 20, 1 }, + { "ENABLE_AF_1", 19, 1 }, + { "ENABLE_AF_0", 18, 1 }, + { "ENABLE_PCMDF_1", 17, 1 }, + { "ENABLE_MPARC_1", 16, 1 }, + { "ENABLE_MPARF_1", 15, 1 }, + { "ENABLE_DDPCF_1", 14, 1 }, + { "ENABLE_TPTCF_1", 13, 1 }, + { "ENABLE_PCMDF_0", 12, 1 }, + { "ENABLE_MPARC_0", 11, 1 }, + { "ENABLE_MPARF_0", 10, 1 }, + { "ENABLE_DDPCF_0", 9, 1 }, + { "ENABLE_TPTCF_0", 8, 1 }, + { "ENABLE_DDPDF_1", 7, 1 }, + { "ENABLE_DDPMF_1", 6, 1 }, + { "ENABLE_MEMRF_1", 5, 1 }, + { "ENABLE_PRSDF_1", 4, 1 }, + { "ENABLE_DDPDF_0", 3, 1 }, + { "ENABLE_DDPMF_0", 2, 1 }, + { "ENABLE_MEMRF_0", 1, 1 }, + { "ENABLE_PRSDF_0", 0, 1 }, + { "ULP_RX_INT_CAUSE", 0x19158, 0 }, + { "CAUSE_CTX_1", 24, 1 }, + { "CAUSE_CTX_0", 23, 1 }, + { "CAUSE_FF", 22, 1 }, + { "CAUSE_APF_1", 21, 1 }, + { "CAUSE_APF_0", 20, 1 }, + { "CAUSE_AF_1", 19, 1 }, + { "CAUSE_AF_0", 18, 1 }, + { "CAUSE_PCMDF_1", 17, 1 }, + { "CAUSE_MPARC_1", 16, 1 }, + { "CAUSE_MPARF_1", 15, 1 }, + { "CAUSE_DDPCF_1", 14, 1 }, + { "CAUSE_TPTCF_1", 13, 1 }, + { "CAUSE_PCMDF_0", 12, 1 }, + { "CAUSE_MPARC_0", 11, 1 }, + { "CAUSE_MPARF_0", 10, 1 }, + { "CAUSE_DDPCF_0", 9, 1 }, + { "CAUSE_TPTCF_0", 8, 1 }, + { "CAUSE_DDPDF_1", 7, 1 }, + { "CAUSE_DDPMF_1", 6, 1 }, + { "CAUSE_MEMRF_1", 5, 1 }, + { "CAUSE_PRSDF_1", 4, 1 }, + { "CAUSE_DDPDF_0", 3, 1 }, + { "CAUSE_DDPMF_0", 2, 1 }, + { "CAUSE_MEMRF_0", 1, 1 }, + { "CAUSE_PRSDF_0", 0, 1 }, + { "ULP_RX_ISCSI_LLIMIT", 0x1915c, 0 }, + { "IscsiLlimit", 6, 26 }, + { "ULP_RX_ISCSI_ULIMIT", 0x19160, 0 }, + { "IscsiUlimit", 6, 26 }, + { "ULP_RX_ISCSI_TAGMASK", 0x19164, 0 }, + { "IscsiTagMask", 6, 26 }, + { "ULP_RX_ISCSI_PSZ", 0x19168, 0 }, + { "Hpz3", 24, 4 }, + { "Hpz2", 16, 4 }, + { "Hpz1", 8, 4 }, + { "Hpz0", 0, 4 }, + { "ULP_RX_TDDP_LLIMIT", 0x1916c, 0 }, + { "TddpLlimit", 6, 26 }, + { "ULP_RX_TDDP_ULIMIT", 0x19170, 0 }, + { "TddpUlimit", 6, 26 }, + { "ULP_RX_TDDP_TAGMASK", 0x19174, 0 }, + { "TddpTagMask", 6, 26 }, + { "ULP_RX_TDDP_PSZ", 0x19178, 0 }, + { "Hpz3", 24, 4 }, + { "Hpz2", 16, 4 }, + { "Hpz1", 8, 4 }, + { "Hpz0", 0, 4 }, + { "ULP_RX_STAG_LLIMIT", 0x1917c, 0 }, + { "ULP_RX_STAG_ULIMIT", 0x19180, 0 }, + { "ULP_RX_RQ_LLIMIT", 0x19184, 0 }, + { "ULP_RX_RQ_ULIMIT", 0x19188, 0 }, + { "ULP_RX_PBL_LLIMIT", 0x1918c, 0 }, + { "ULP_RX_PBL_ULIMIT", 0x19190, 0 }, + { "ULP_RX_CTX_BASE", 0x19194, 0 }, + { "ULP_RX_PERR_ENABLE", 0x1919c, 0 }, + { "ENABLE_FF", 22, 1 }, + { "ENABLE_APF_1", 21, 1 }, + { "ENABLE_APF_0", 20, 1 }, + { "ENABLE_AF_1", 19, 1 }, + { "ENABLE_AF_0", 18, 1 }, + { "ENABLE_PCMDF_1", 17, 1 }, + { "ENABLE_MPARC_1", 16, 1 }, + { "ENABLE_MPARF_1", 15, 1 }, + { "ENABLE_DDPCF_1", 14, 1 }, + { "ENABLE_TPTCF_1", 13, 1 }, + { "ENABLE_PCMDF_0", 12, 1 }, + { "ENABLE_MPARC_0", 11, 1 }, + { "ENABLE_MPARF_0", 10, 1 }, + { "ENABLE_DDPCF_0", 9, 1 }, + { "ENABLE_TPTCF_0", 8, 1 }, + { "ENABLE_DDPDF_1", 7, 1 }, + { "ENABLE_DDPMF_1", 6, 1 }, + { "ENABLE_MEMRF_1", 5, 1 }, + { "ENABLE_PRSDF_1", 4, 1 }, + { "ENABLE_DDPDF_0", 3, 1 }, + { "ENABLE_DDPMF_0", 2, 1 }, + { "ENABLE_MEMRF_0", 1, 1 }, + { "ENABLE_PRSDF_0", 0, 1 }, + { "ULP_RX_PERR_INJECT", 0x191a0, 0 }, + { "MemSel", 1, 5 }, + { "InjectDataErr", 0, 1 }, + { "ULP_RX_RQUDP_LLIMIT", 0x191a4, 0 }, + { "ULP_RX_RQUDP_ULIMIT", 0x191a8, 0 }, + { "ULP_RX_CTX_ACC_CH0", 0x191ac, 0 }, + { "REQ", 21, 1 }, + { "WB", 20, 1 }, + { "TID", 0, 20 }, + { "ULP_RX_CTX_ACC_CH1", 0x191b0, 0 }, + { "REQ", 21, 1 }, + { "WB", 20, 1 }, + { "TID", 0, 20 }, + { "ULP_RX_SE_CNT_ERR", 0x191d0, 0 }, + { "ERR_CH1", 4, 4 }, + { "ERR_CH0", 0, 4 }, + { "ULP_RX_SE_CNT_CLR", 0x191d4, 0 }, + { "CLR_CH0", 4, 4 }, + { "CLR_CH1", 0, 4 }, + { "ULP_RX_SE_CNT_CH0", 0x191d8, 0 }, + { "SOP_CNT_OUT0", 28, 4 }, + { "EOP_CNT_OUT0", 24, 4 }, + { "SOP_CNT_AL0", 20, 4 }, + { "EOP_CNT_AL0", 16, 4 }, + { "SOP_CNT_MR0", 12, 4 }, + { "EOP_CNT_MR0", 8, 4 }, + { "SOP_CNT_IN0", 4, 4 }, + { "EOP_CNT_IN0", 0, 4 }, + { "ULP_RX_SE_CNT_CH1", 0x191dc, 0 }, + { "SOP_CNT_OUT1", 28, 4 }, + { "EOP_CNT_OUT1", 24, 4 }, + { "SOP_CNT_AL1", 20, 4 }, + { "EOP_CNT_AL1", 16, 4 }, + { "SOP_CNT_MR1", 12, 4 }, + { "EOP_CNT_MR1", 8, 4 }, + { "SOP_CNT_IN1", 4, 4 }, + { "EOP_CNT_IN1", 0, 4 }, + { "ULP_RX_DBG_CTL", 0x191e0, 0 }, + { "EN_DBG_H", 17, 1 }, + { "EN_DBG_L", 16, 1 }, + { "SEL_H", 8, 8 }, + { "SEL_L", 0, 8 }, + { "ULP_RX_DBG_DATAH", 0x191e4, 0 }, + { "ULP_RX_DBG_DATAL", 0x191e8, 0 }, + { "ULP_RX_LA_CHNL", 0x19238, 0 }, + { "ULP_RX_LA_CTL", 0x1923c, 0 }, + { "ULP_RX_LA_RDPTR", 0x19240, 0 }, + { "ULP_RX_LA_RDDATA", 0x19244, 0 }, + { "ULP_RX_LA_WRPTR", 0x19248, 0 }, + { "ULP_RX_LA_RESERVED", 0x1924c, 0 }, + { NULL, 0, 0 } +}; + +struct reg_info t4_sf_regs[] = { + { "SF_DATA", 0x193f8, 0 }, + { "SF_OP", 0x193fc, 0 }, + { "Busy", 31, 1 }, + { "Lock", 4, 1 }, + { "Cont", 3, 1 }, + { "ByteCnt", 1, 2 }, + { "Op", 0, 1 }, + { NULL, 0, 0 } +}; + +struct reg_info t4_pl_regs[] = { + { "PL_PF_INT_CAUSE", 0x1e3c0, 0 }, + { "SW", 3, 1 }, + { "SGE", 2, 1 }, + { "CIM", 1, 1 }, + { "MPS", 0, 1 }, + { "PL_PF_INT_ENABLE", 0x1e3c4, 0 }, + { "SW", 3, 1 }, + { "SGE", 2, 1 }, + { "CIM", 1, 1 }, + { "MPS", 0, 1 }, + { "PL_PF_CTL", 0x1e3c8, 0 }, + { "PL_PF_INT_CAUSE", 0x1e7c0, 0 }, + { "SW", 3, 1 }, + { "SGE", 2, 1 }, + { "CIM", 1, 1 }, + { "MPS", 0, 1 }, + { "PL_PF_INT_ENABLE", 0x1e7c4, 0 }, + { "SW", 3, 1 }, + { "SGE", 2, 1 }, + { "CIM", 1, 1 }, + { "MPS", 0, 1 }, + { "PL_PF_CTL", 0x1e7c8, 0 }, + { "PL_PF_INT_CAUSE", 0x1ebc0, 0 }, + { "SW", 3, 1 }, + { "SGE", 2, 1 }, + { "CIM", 1, 1 }, + { "MPS", 0, 1 }, + { "PL_PF_INT_ENABLE", 0x1ebc4, 0 }, + { "SW", 3, 1 }, + { "SGE", 2, 1 }, + { "CIM", 1, 1 }, + { "MPS", 0, 1 }, + { "PL_PF_CTL", 0x1ebc8, 0 }, + { "PL_PF_INT_CAUSE", 0x1efc0, 0 }, + { "SW", 3, 1 }, + { "SGE", 2, 1 }, + { "CIM", 1, 1 }, + { "MPS", 0, 1 }, + { "PL_PF_INT_ENABLE", 0x1efc4, 0 }, + { "SW", 3, 1 }, + { "SGE", 2, 1 }, + { "CIM", 1, 1 }, + { "MPS", 0, 1 }, + { "PL_PF_CTL", 0x1efc8, 0 }, + { "PL_PF_INT_CAUSE", 0x1f3c0, 0 }, + { "SW", 3, 1 }, + { "SGE", 2, 1 }, + { "CIM", 1, 1 }, + { "MPS", 0, 1 }, + { "PL_PF_INT_ENABLE", 0x1f3c4, 0 }, + { "SW", 3, 1 }, + { "SGE", 2, 1 }, + { "CIM", 1, 1 }, + { "MPS", 0, 1 }, + { "PL_PF_CTL", 0x1f3c8, 0 }, + { "PL_PF_INT_CAUSE", 0x1f7c0, 0 }, + { "SW", 3, 1 }, + { "SGE", 2, 1 }, + { "CIM", 1, 1 }, + { "MPS", 0, 1 }, + { "PL_PF_INT_ENABLE", 0x1f7c4, 0 }, + { "SW", 3, 1 }, + { "SGE", 2, 1 }, + { "CIM", 1, 1 }, + { "MPS", 0, 1 }, + { "PL_PF_CTL", 0x1f7c8, 0 }, + { "PL_PF_INT_CAUSE", 0x1fbc0, 0 }, + { "SW", 3, 1 }, + { "SGE", 2, 1 }, + { "CIM", 1, 1 }, + { "MPS", 0, 1 }, + { "PL_PF_INT_ENABLE", 0x1fbc4, 0 }, + { "SW", 3, 1 }, + { "SGE", 2, 1 }, + { "CIM", 1, 1 }, + { "MPS", 0, 1 }, + { "PL_PF_CTL", 0x1fbc8, 0 }, + { "PL_PF_INT_CAUSE", 0x1ffc0, 0 }, + { "SW", 3, 1 }, + { "SGE", 2, 1 }, + { "CIM", 1, 1 }, + { "MPS", 0, 1 }, + { "PL_PF_INT_ENABLE", 0x1ffc4, 0 }, + { "SW", 3, 1 }, + { "SGE", 2, 1 }, + { "CIM", 1, 1 }, + { "MPS", 0, 1 }, + { "PL_PF_CTL", 0x1ffc8, 0 }, + { "PL_WHOAMI", 0x19400, 0 }, + { "PortxMap", 24, 3 }, + { "SourceBus", 16, 2 }, + { "SourcePF", 8, 3 }, + { "IsVF", 7, 1 }, + { "VFID", 0, 7 }, + { "PL_PERR_CAUSE", 0x19404, 0 }, + { "UART", 28, 1 }, + { "ULP_TX", 27, 1 }, + { "SGE", 26, 1 }, + { "HMA", 25, 1 }, + { "CPL_SWITCH", 24, 1 }, + { "ULP_RX", 23, 1 }, + { "PM_RX", 22, 1 }, + { "PM_TX", 21, 1 }, + { "MA", 20, 1 }, + { "TP", 19, 1 }, + { "LE", 18, 1 }, + { "EDC1", 17, 1 }, + { "EDC0", 16, 1 }, + { "MC", 15, 1 }, + { "PCIE", 14, 1 }, + { "PMU", 13, 1 }, + { "XGMAC_KR1", 12, 1 }, + { "XGMAC_KR0", 11, 1 }, + { "XGMAC1", 10, 1 }, + { "XGMAC0", 9, 1 }, + { "SMB", 8, 1 }, + { "SF", 7, 1 }, + { "PL", 6, 1 }, + { "NCSI", 5, 1 }, + { "MPS", 4, 1 }, + { "MI", 3, 1 }, + { "DBG", 2, 1 }, + { "I2CM", 1, 1 }, + { "CIM", 0, 1 }, + { "PL_PERR_ENABLE", 0x19408, 0 }, + { "UART", 28, 1 }, + { "ULP_TX", 27, 1 }, + { "SGE", 26, 1 }, + { "HMA", 25, 1 }, + { "CPL_SWITCH", 24, 1 }, + { "ULP_RX", 23, 1 }, + { "PM_RX", 22, 1 }, + { "PM_TX", 21, 1 }, + { "MA", 20, 1 }, + { "TP", 19, 1 }, + { "LE", 18, 1 }, + { "EDC1", 17, 1 }, + { "EDC0", 16, 1 }, + { "MC", 15, 1 }, + { "PCIE", 14, 1 }, + { "PMU", 13, 1 }, + { "XGMAC_KR1", 12, 1 }, + { "XGMAC_KR0", 11, 1 }, + { "XGMAC1", 10, 1 }, + { "XGMAC0", 9, 1 }, + { "SMB", 8, 1 }, + { "SF", 7, 1 }, + { "PL", 6, 1 }, + { "NCSI", 5, 1 }, + { "MPS", 4, 1 }, + { "MI", 3, 1 }, + { "DBG", 2, 1 }, + { "I2CM", 1, 1 }, + { "CIM", 0, 1 }, + { "PL_INT_CAUSE", 0x1940c, 0 }, + { "FLR", 30, 1 }, + { "SW_CIM", 29, 1 }, + { "UART", 28, 1 }, + { "ULP_TX", 27, 1 }, + { "SGE", 26, 1 }, + { "HMA", 25, 1 }, + { "CPL_SWITCH", 24, 1 }, + { "ULP_RX", 23, 1 }, + { "PM_RX", 22, 1 }, + { "PM_TX", 21, 1 }, + { "MA", 20, 1 }, + { "TP", 19, 1 }, + { "LE", 18, 1 }, + { "EDC1", 17, 1 }, + { "EDC0", 16, 1 }, + { "MC", 15, 1 }, + { "PCIE", 14, 1 }, + { "PMU", 13, 1 }, + { "XGMAC_KR1", 12, 1 }, + { "XGMAC_KR0", 11, 1 }, + { "XGMAC1", 10, 1 }, + { "XGMAC0", 9, 1 }, + { "SMB", 8, 1 }, + { "SF", 7, 1 }, + { "PL", 6, 1 }, + { "NCSI", 5, 1 }, + { "MPS", 4, 1 }, + { "MI", 3, 1 }, + { "DBG", 2, 1 }, + { "I2CM", 1, 1 }, + { "CIM", 0, 1 }, + { "PL_INT_ENABLE", 0x19410, 0 }, + { "FLR", 30, 1 }, + { "SW_CIM", 29, 1 }, + { "UART", 28, 1 }, + { "ULP_TX", 27, 1 }, + { "SGE", 26, 1 }, + { "HMA", 25, 1 }, + { "CPL_SWITCH", 24, 1 }, + { "ULP_RX", 23, 1 }, + { "PM_RX", 22, 1 }, + { "PM_TX", 21, 1 }, + { "MA", 20, 1 }, + { "TP", 19, 1 }, + { "LE", 18, 1 }, + { "EDC1", 17, 1 }, + { "EDC0", 16, 1 }, + { "MC", 15, 1 }, + { "PCIE", 14, 1 }, + { "PMU", 13, 1 }, + { "XGMAC_KR1", 12, 1 }, + { "XGMAC_KR0", 11, 1 }, + { "XGMAC1", 10, 1 }, + { "XGMAC0", 9, 1 }, + { "SMB", 8, 1 }, + { "SF", 7, 1 }, + { "PL", 6, 1 }, + { "NCSI", 5, 1 }, + { "MPS", 4, 1 }, + { "MI", 3, 1 }, + { "DBG", 2, 1 }, + { "I2CM", 1, 1 }, + { "CIM", 0, 1 }, + { "PL_INT_MAP0", 0x19414, 0 }, + { "MapNCSI", 16, 9 }, + { "MapDefault", 0, 9 }, + { "PL_INT_MAP1", 0x19418, 0 }, + { "MapXGMAC1", 16, 9 }, + { "MapXGMAC0", 0, 9 }, + { "PL_INT_MAP2", 0x1941c, 0 }, + { "MapXGMAC_KR1", 16, 9 }, + { "MapXGMAC_KR0", 0, 9 }, + { "PL_INT_MAP3", 0x19420, 0 }, + { "MapMI", 16, 9 }, + { "MapSMB", 0, 9 }, + { "PL_INT_MAP4", 0x19424, 0 }, + { "MapDBG", 16, 9 }, + { "MapI2CM", 0, 9 }, + { "PL_RST", 0x19428, 0 }, + { "FatalPerrEn", 3, 1 }, + { "SWIntCIM", 2, 1 }, + { "PIORst", 1, 1 }, + { "PIORstMode", 0, 1 }, + { "PL_PL_PERR_INJECT", 0x1942c, 0 }, + { "MemSel", 1, 1 }, + { "InjectDataErr", 0, 1 }, + { "PL_PL_INT_CAUSE", 0x19430, 0 }, + { "PF_EnableErr", 5, 1 }, + { "FatalPerr", 4, 1 }, + { "InvalidAccess", 3, 1 }, + { "Timeout", 2, 1 }, + { "PLErr", 1, 1 }, + { "PerrVFID", 0, 1 }, + { "PL_PL_INT_ENABLE", 0x19434, 0 }, + { "PF_EnableErr", 5, 1 }, + { "FatalPerr", 4, 1 }, + { "InvalidAccess", 3, 1 }, + { "Timeout", 2, 1 }, + { "PLErr", 1, 1 }, + { "PerrVFID", 0, 1 }, + { "PL_PL_PERR_ENABLE", 0x19438, 0 }, + { "PL_REV", 0x1943c, 0 }, + { "PL_SEMAPHORE_CTL", 0x1944c, 0 }, + { "LockStatus", 16, 8 }, + { "OwnerOverride", 8, 1 }, + { "EnablePF", 0, 8 }, + { "PL_SEMAPHORE_LOCK", 0x19450, 0 }, + { "Lock", 31, 1 }, + { "SourceBus", 3, 2 }, + { "SourcePF", 0, 3 }, + { "PL_SEMAPHORE_LOCK", 0x19454, 0 }, + { "Lock", 31, 1 }, + { "SourceBus", 3, 2 }, + { "SourcePF", 0, 3 }, + { "PL_SEMAPHORE_LOCK", 0x19458, 0 }, + { "Lock", 31, 1 }, + { "SourceBus", 3, 2 }, + { "SourcePF", 0, 3 }, + { "PL_SEMAPHORE_LOCK", 0x1945c, 0 }, + { "Lock", 31, 1 }, + { "SourceBus", 3, 2 }, + { "SourcePF", 0, 3 }, + { "PL_SEMAPHORE_LOCK", 0x19460, 0 }, + { "Lock", 31, 1 }, + { "SourceBus", 3, 2 }, + { "SourcePF", 0, 3 }, + { "PL_SEMAPHORE_LOCK", 0x19464, 0 }, + { "Lock", 31, 1 }, + { "SourceBus", 3, 2 }, + { "SourcePF", 0, 3 }, + { "PL_SEMAPHORE_LOCK", 0x19468, 0 }, + { "Lock", 31, 1 }, + { "SourceBus", 3, 2 }, + { "SourcePF", 0, 3 }, + { "PL_SEMAPHORE_LOCK", 0x1946c, 0 }, + { "Lock", 31, 1 }, + { "SourceBus", 3, 2 }, + { "SourcePF", 0, 3 }, + { "PL_PF_ENABLE", 0x19470, 0 }, + { "PL_PORTX_MAP", 0x19474, 0 }, + { "MAP7", 28, 3 }, + { "MAP6", 24, 3 }, + { "MAP5", 20, 3 }, + { "MAP4", 16, 3 }, + { "MAP3", 12, 3 }, + { "MAP2", 8, 3 }, + { "MAP1", 4, 3 }, + { "MAP0", 0, 3 }, + { "PL_VF_SLICE_L", 0x19490, 0 }, + { "LimitAddr", 16, 10 }, + { "BaseAddr", 0, 10 }, + { "PL_VF_SLICE_L", 0x19498, 0 }, + { "LimitAddr", 16, 10 }, + { "BaseAddr", 0, 10 }, + { "PL_VF_SLICE_L", 0x194a0, 0 }, + { "LimitAddr", 16, 10 }, + { "BaseAddr", 0, 10 }, + { "PL_VF_SLICE_L", 0x194a8, 0 }, + { "LimitAddr", 16, 10 }, + { "BaseAddr", 0, 10 }, + { "PL_VF_SLICE_L", 0x194b0, 0 }, + { "LimitAddr", 16, 10 }, + { "BaseAddr", 0, 10 }, + { "PL_VF_SLICE_L", 0x194b8, 0 }, + { "LimitAddr", 16, 10 }, + { "BaseAddr", 0, 10 }, + { "PL_VF_SLICE_L", 0x194c0, 0 }, + { "LimitAddr", 16, 10 }, + { "BaseAddr", 0, 10 }, + { "PL_VF_SLICE_L", 0x194c8, 0 }, + { "LimitAddr", 16, 10 }, + { "BaseAddr", 0, 10 }, + { "PL_VF_SLICE_H", 0x19494, 0 }, + { "ModIndx", 16, 3 }, + { "ModOffset", 0, 10 }, + { "PL_VF_SLICE_H", 0x1949c, 0 }, + { "ModIndx", 16, 3 }, + { "ModOffset", 0, 10 }, + { "PL_VF_SLICE_H", 0x194a4, 0 }, + { "ModIndx", 16, 3 }, + { "ModOffset", 0, 10 }, + { "PL_VF_SLICE_H", 0x194ac, 0 }, + { "ModIndx", 16, 3 }, + { "ModOffset", 0, 10 }, + { "PL_VF_SLICE_H", 0x194b4, 0 }, + { "ModIndx", 16, 3 }, + { "ModOffset", 0, 10 }, + { "PL_VF_SLICE_H", 0x194bc, 0 }, + { "ModIndx", 16, 3 }, + { "ModOffset", 0, 10 }, + { "PL_VF_SLICE_H", 0x194c4, 0 }, + { "ModIndx", 16, 3 }, + { "ModOffset", 0, 10 }, + { "PL_VF_SLICE_H", 0x194cc, 0 }, + { "ModIndx", 16, 3 }, + { "ModOffset", 0, 10 }, + { "PL_FLR_VF_STATUS", 0x194d0, 0 }, + { "PL_FLR_VF_STATUS", 0x194d4, 0 }, + { "PL_FLR_VF_STATUS", 0x194d8, 0 }, + { "PL_FLR_VF_STATUS", 0x194dc, 0 }, + { "PL_FLR_PF_STATUS", 0x194e0, 0 }, + { "PL_TIMEOUT_CTL", 0x194f0, 0 }, + { "PL_TIMEOUT_STATUS0", 0x194f4, 0 }, + { "Addr", 2, 28 }, + { "PL_TIMEOUT_STATUS1", 0x194f8, 0 }, + { "Valid", 31, 1 }, + { "Write", 22, 1 }, + { "Bus", 20, 2 }, + { "Rgn", 19, 1 }, + { "PF", 16, 3 }, + { "Function", 0, 16 }, + { "PL_VFID_MAP", 0x19800, 0 }, + { "Valid", 7, 1 }, + { "VFID", 0, 7 }, + { "PL_VFID_MAP", 0x19804, 0 }, + { "Valid", 7, 1 }, + { "VFID", 0, 7 }, + { "PL_VFID_MAP", 0x19808, 0 }, + { "Valid", 7, 1 }, + { "VFID", 0, 7 }, + { "PL_VFID_MAP", 0x1980c, 0 }, + { "Valid", 7, 1 }, + { "VFID", 0, 7 }, + { "PL_VFID_MAP", 0x19810, 0 }, + { "Valid", 7, 1 }, + { "VFID", 0, 7 }, + { "PL_VFID_MAP", 0x19814, 0 }, + { "Valid", 7, 1 }, + { "VFID", 0, 7 }, + { "PL_VFID_MAP", 0x19818, 0 }, + { "Valid", 7, 1 }, + { "VFID", 0, 7 }, + { "PL_VFID_MAP", 0x1981c, 0 }, + { "Valid", 7, 1 }, + { "VFID", 0, 7 }, + { "PL_VFID_MAP", 0x19820, 0 }, + { "Valid", 7, 1 }, + { "VFID", 0, 7 }, + { "PL_VFID_MAP", 0x19824, 0 }, + { "Valid", 7, 1 }, + { "VFID", 0, 7 }, + { "PL_VFID_MAP", 0x19828, 0 }, + { "Valid", 7, 1 }, + { "VFID", 0, 7 }, + { "PL_VFID_MAP", 0x1982c, 0 }, + { "Valid", 7, 1 }, + { "VFID", 0, 7 }, + { "PL_VFID_MAP", 0x19830, 0 }, + { "Valid", 7, 1 }, + { "VFID", 0, 7 }, + { "PL_VFID_MAP", 0x19834, 0 }, + { "Valid", 7, 1 }, + { "VFID", 0, 7 }, + { "PL_VFID_MAP", 0x19838, 0 }, + { "Valid", 7, 1 }, + { "VFID", 0, 7 }, + { "PL_VFID_MAP", 0x1983c, 0 }, + { "Valid", 7, 1 }, + { "VFID", 0, 7 }, + { "PL_VFID_MAP", 0x19840, 0 }, + { "Valid", 7, 1 }, + { "VFID", 0, 7 }, + { "PL_VFID_MAP", 0x19844, 0 }, + { "Valid", 7, 1 }, + { "VFID", 0, 7 }, + { "PL_VFID_MAP", 0x19848, 0 }, + { "Valid", 7, 1 }, + { "VFID", 0, 7 }, + { "PL_VFID_MAP", 0x1984c, 0 }, + { "Valid", 7, 1 }, + { "VFID", 0, 7 }, + { "PL_VFID_MAP", 0x19850, 0 }, + { "Valid", 7, 1 }, + { "VFID", 0, 7 }, + { "PL_VFID_MAP", 0x19854, 0 }, + { "Valid", 7, 1 }, + { "VFID", 0, 7 }, + { "PL_VFID_MAP", 0x19858, 0 }, + { "Valid", 7, 1 }, + { "VFID", 0, 7 }, + { "PL_VFID_MAP", 0x1985c, 0 }, + { "Valid", 7, 1 }, + { "VFID", 0, 7 }, + { "PL_VFID_MAP", 0x19860, 0 }, + { "Valid", 7, 1 }, + { "VFID", 0, 7 }, + { "PL_VFID_MAP", 0x19864, 0 }, + { "Valid", 7, 1 }, + { "VFID", 0, 7 }, + { "PL_VFID_MAP", 0x19868, 0 }, + { "Valid", 7, 1 }, + { "VFID", 0, 7 }, + { "PL_VFID_MAP", 0x1986c, 0 }, + { "Valid", 7, 1 }, + { "VFID", 0, 7 }, + { "PL_VFID_MAP", 0x19870, 0 }, + { "Valid", 7, 1 }, + { "VFID", 0, 7 }, + { "PL_VFID_MAP", 0x19874, 0 }, + { "Valid", 7, 1 }, + { "VFID", 0, 7 }, + { "PL_VFID_MAP", 0x19878, 0 }, + { "Valid", 7, 1 }, + { "VFID", 0, 7 }, + { "PL_VFID_MAP", 0x1987c, 0 }, + { "Valid", 7, 1 }, + { "VFID", 0, 7 }, + { "PL_VFID_MAP", 0x19880, 0 }, + { "Valid", 7, 1 }, + { "VFID", 0, 7 }, + { "PL_VFID_MAP", 0x19884, 0 }, + { "Valid", 7, 1 }, + { "VFID", 0, 7 }, + { "PL_VFID_MAP", 0x19888, 0 }, + { "Valid", 7, 1 }, + { "VFID", 0, 7 }, + { "PL_VFID_MAP", 0x1988c, 0 }, + { "Valid", 7, 1 }, + { "VFID", 0, 7 }, + { "PL_VFID_MAP", 0x19890, 0 }, + { "Valid", 7, 1 }, + { "VFID", 0, 7 }, + { "PL_VFID_MAP", 0x19894, 0 }, + { "Valid", 7, 1 }, + { "VFID", 0, 7 }, + { "PL_VFID_MAP", 0x19898, 0 }, + { "Valid", 7, 1 }, + { "VFID", 0, 7 }, + { "PL_VFID_MAP", 0x1989c, 0 }, + { "Valid", 7, 1 }, + { "VFID", 0, 7 }, + { "PL_VFID_MAP", 0x198a0, 0 }, + { "Valid", 7, 1 }, + { "VFID", 0, 7 }, + { "PL_VFID_MAP", 0x198a4, 0 }, + { "Valid", 7, 1 }, + { "VFID", 0, 7 }, + { "PL_VFID_MAP", 0x198a8, 0 }, + { "Valid", 7, 1 }, + { "VFID", 0, 7 }, + { "PL_VFID_MAP", 0x198ac, 0 }, + { "Valid", 7, 1 }, + { "VFID", 0, 7 }, + { "PL_VFID_MAP", 0x198b0, 0 }, + { "Valid", 7, 1 }, + { "VFID", 0, 7 }, + { "PL_VFID_MAP", 0x198b4, 0 }, + { "Valid", 7, 1 }, + { "VFID", 0, 7 }, + { "PL_VFID_MAP", 0x198b8, 0 }, + { "Valid", 7, 1 }, + { "VFID", 0, 7 }, + { "PL_VFID_MAP", 0x198bc, 0 }, + { "Valid", 7, 1 }, + { "VFID", 0, 7 }, + { "PL_VFID_MAP", 0x198c0, 0 }, + { "Valid", 7, 1 }, + { "VFID", 0, 7 }, + { "PL_VFID_MAP", 0x198c4, 0 }, + { "Valid", 7, 1 }, + { "VFID", 0, 7 }, + { "PL_VFID_MAP", 0x198c8, 0 }, + { "Valid", 7, 1 }, + { "VFID", 0, 7 }, + { "PL_VFID_MAP", 0x198cc, 0 }, + { "Valid", 7, 1 }, + { "VFID", 0, 7 }, + { "PL_VFID_MAP", 0x198d0, 0 }, + { "Valid", 7, 1 }, + { "VFID", 0, 7 }, + { "PL_VFID_MAP", 0x198d4, 0 }, + { "Valid", 7, 1 }, + { "VFID", 0, 7 }, + { "PL_VFID_MAP", 0x198d8, 0 }, + { "Valid", 7, 1 }, + { "VFID", 0, 7 }, + { "PL_VFID_MAP", 0x198dc, 0 }, + { "Valid", 7, 1 }, + { "VFID", 0, 7 }, + { "PL_VFID_MAP", 0x198e0, 0 }, + { "Valid", 7, 1 }, + { "VFID", 0, 7 }, + { "PL_VFID_MAP", 0x198e4, 0 }, + { "Valid", 7, 1 }, + { "VFID", 0, 7 }, + { "PL_VFID_MAP", 0x198e8, 0 }, + { "Valid", 7, 1 }, + { "VFID", 0, 7 }, + { "PL_VFID_MAP", 0x198ec, 0 }, + { "Valid", 7, 1 }, + { "VFID", 0, 7 }, + { "PL_VFID_MAP", 0x198f0, 0 }, + { "Valid", 7, 1 }, + { "VFID", 0, 7 }, + { "PL_VFID_MAP", 0x198f4, 0 }, + { "Valid", 7, 1 }, + { "VFID", 0, 7 }, + { "PL_VFID_MAP", 0x198f8, 0 }, + { "Valid", 7, 1 }, + { "VFID", 0, 7 }, + { "PL_VFID_MAP", 0x198fc, 0 }, + { "Valid", 7, 1 }, + { "VFID", 0, 7 }, + { "PL_VFID_MAP", 0x19900, 0 }, + { "Valid", 7, 1 }, + { "VFID", 0, 7 }, + { "PL_VFID_MAP", 0x19904, 0 }, + { "Valid", 7, 1 }, + { "VFID", 0, 7 }, + { "PL_VFID_MAP", 0x19908, 0 }, + { "Valid", 7, 1 }, + { "VFID", 0, 7 }, + { "PL_VFID_MAP", 0x1990c, 0 }, + { "Valid", 7, 1 }, + { "VFID", 0, 7 }, + { "PL_VFID_MAP", 0x19910, 0 }, + { "Valid", 7, 1 }, + { "VFID", 0, 7 }, + { "PL_VFID_MAP", 0x19914, 0 }, + { "Valid", 7, 1 }, + { "VFID", 0, 7 }, + { "PL_VFID_MAP", 0x19918, 0 }, + { "Valid", 7, 1 }, + { "VFID", 0, 7 }, + { "PL_VFID_MAP", 0x1991c, 0 }, + { "Valid", 7, 1 }, + { "VFID", 0, 7 }, + { "PL_VFID_MAP", 0x19920, 0 }, + { "Valid", 7, 1 }, + { "VFID", 0, 7 }, + { "PL_VFID_MAP", 0x19924, 0 }, + { "Valid", 7, 1 }, + { "VFID", 0, 7 }, + { "PL_VFID_MAP", 0x19928, 0 }, + { "Valid", 7, 1 }, + { "VFID", 0, 7 }, + { "PL_VFID_MAP", 0x1992c, 0 }, + { "Valid", 7, 1 }, + { "VFID", 0, 7 }, + { "PL_VFID_MAP", 0x19930, 0 }, + { "Valid", 7, 1 }, + { "VFID", 0, 7 }, + { "PL_VFID_MAP", 0x19934, 0 }, + { "Valid", 7, 1 }, + { "VFID", 0, 7 }, + { "PL_VFID_MAP", 0x19938, 0 }, + { "Valid", 7, 1 }, + { "VFID", 0, 7 }, + { "PL_VFID_MAP", 0x1993c, 0 }, + { "Valid", 7, 1 }, + { "VFID", 0, 7 }, + { "PL_VFID_MAP", 0x19940, 0 }, + { "Valid", 7, 1 }, + { "VFID", 0, 7 }, + { "PL_VFID_MAP", 0x19944, 0 }, + { "Valid", 7, 1 }, + { "VFID", 0, 7 }, + { "PL_VFID_MAP", 0x19948, 0 }, + { "Valid", 7, 1 }, + { "VFID", 0, 7 }, + { "PL_VFID_MAP", 0x1994c, 0 }, + { "Valid", 7, 1 }, + { "VFID", 0, 7 }, + { "PL_VFID_MAP", 0x19950, 0 }, + { "Valid", 7, 1 }, + { "VFID", 0, 7 }, + { "PL_VFID_MAP", 0x19954, 0 }, + { "Valid", 7, 1 }, + { "VFID", 0, 7 }, + { "PL_VFID_MAP", 0x19958, 0 }, + { "Valid", 7, 1 }, + { "VFID", 0, 7 }, + { "PL_VFID_MAP", 0x1995c, 0 }, + { "Valid", 7, 1 }, + { "VFID", 0, 7 }, + { "PL_VFID_MAP", 0x19960, 0 }, + { "Valid", 7, 1 }, + { "VFID", 0, 7 }, + { "PL_VFID_MAP", 0x19964, 0 }, + { "Valid", 7, 1 }, + { "VFID", 0, 7 }, + { "PL_VFID_MAP", 0x19968, 0 }, + { "Valid", 7, 1 }, + { "VFID", 0, 7 }, + { "PL_VFID_MAP", 0x1996c, 0 }, + { "Valid", 7, 1 }, + { "VFID", 0, 7 }, + { "PL_VFID_MAP", 0x19970, 0 }, + { "Valid", 7, 1 }, + { "VFID", 0, 7 }, + { "PL_VFID_MAP", 0x19974, 0 }, + { "Valid", 7, 1 }, + { "VFID", 0, 7 }, + { "PL_VFID_MAP", 0x19978, 0 }, + { "Valid", 7, 1 }, + { "VFID", 0, 7 }, + { "PL_VFID_MAP", 0x1997c, 0 }, + { "Valid", 7, 1 }, + { "VFID", 0, 7 }, + { "PL_VFID_MAP", 0x19980, 0 }, + { "Valid", 7, 1 }, + { "VFID", 0, 7 }, + { "PL_VFID_MAP", 0x19984, 0 }, + { "Valid", 7, 1 }, + { "VFID", 0, 7 }, + { "PL_VFID_MAP", 0x19988, 0 }, + { "Valid", 7, 1 }, + { "VFID", 0, 7 }, + { "PL_VFID_MAP", 0x1998c, 0 }, + { "Valid", 7, 1 }, + { "VFID", 0, 7 }, + { "PL_VFID_MAP", 0x19990, 0 }, + { "Valid", 7, 1 }, + { "VFID", 0, 7 }, + { "PL_VFID_MAP", 0x19994, 0 }, + { "Valid", 7, 1 }, + { "VFID", 0, 7 }, + { "PL_VFID_MAP", 0x19998, 0 }, + { "Valid", 7, 1 }, + { "VFID", 0, 7 }, + { "PL_VFID_MAP", 0x1999c, 0 }, + { "Valid", 7, 1 }, + { "VFID", 0, 7 }, + { "PL_VFID_MAP", 0x199a0, 0 }, + { "Valid", 7, 1 }, + { "VFID", 0, 7 }, + { "PL_VFID_MAP", 0x199a4, 0 }, + { "Valid", 7, 1 }, + { "VFID", 0, 7 }, + { "PL_VFID_MAP", 0x199a8, 0 }, + { "Valid", 7, 1 }, + { "VFID", 0, 7 }, + { "PL_VFID_MAP", 0x199ac, 0 }, + { "Valid", 7, 1 }, + { "VFID", 0, 7 }, + { "PL_VFID_MAP", 0x199b0, 0 }, + { "Valid", 7, 1 }, + { "VFID", 0, 7 }, + { "PL_VFID_MAP", 0x199b4, 0 }, + { "Valid", 7, 1 }, + { "VFID", 0, 7 }, + { "PL_VFID_MAP", 0x199b8, 0 }, + { "Valid", 7, 1 }, + { "VFID", 0, 7 }, + { "PL_VFID_MAP", 0x199bc, 0 }, + { "Valid", 7, 1 }, + { "VFID", 0, 7 }, + { "PL_VFID_MAP", 0x199c0, 0 }, + { "Valid", 7, 1 }, + { "VFID", 0, 7 }, + { "PL_VFID_MAP", 0x199c4, 0 }, + { "Valid", 7, 1 }, + { "VFID", 0, 7 }, + { "PL_VFID_MAP", 0x199c8, 0 }, + { "Valid", 7, 1 }, + { "VFID", 0, 7 }, + { "PL_VFID_MAP", 0x199cc, 0 }, + { "Valid", 7, 1 }, + { "VFID", 0, 7 }, + { "PL_VFID_MAP", 0x199d0, 0 }, + { "Valid", 7, 1 }, + { "VFID", 0, 7 }, + { "PL_VFID_MAP", 0x199d4, 0 }, + { "Valid", 7, 1 }, + { "VFID", 0, 7 }, + { "PL_VFID_MAP", 0x199d8, 0 }, + { "Valid", 7, 1 }, + { "VFID", 0, 7 }, + { "PL_VFID_MAP", 0x199dc, 0 }, + { "Valid", 7, 1 }, + { "VFID", 0, 7 }, + { "PL_VFID_MAP", 0x199e0, 0 }, + { "Valid", 7, 1 }, + { "VFID", 0, 7 }, + { "PL_VFID_MAP", 0x199e4, 0 }, + { "Valid", 7, 1 }, + { "VFID", 0, 7 }, + { "PL_VFID_MAP", 0x199e8, 0 }, + { "Valid", 7, 1 }, + { "VFID", 0, 7 }, + { "PL_VFID_MAP", 0x199ec, 0 }, + { "Valid", 7, 1 }, + { "VFID", 0, 7 }, + { "PL_VFID_MAP", 0x199f0, 0 }, + { "Valid", 7, 1 }, + { "VFID", 0, 7 }, + { "PL_VFID_MAP", 0x199f4, 0 }, + { "Valid", 7, 1 }, + { "VFID", 0, 7 }, + { "PL_VFID_MAP", 0x199f8, 0 }, + { "Valid", 7, 1 }, + { "VFID", 0, 7 }, + { "PL_VFID_MAP", 0x199fc, 0 }, + { "Valid", 7, 1 }, + { "VFID", 0, 7 }, + { "PL_VFID_MAP", 0x19a00, 0 }, + { "Valid", 7, 1 }, + { "VFID", 0, 7 }, + { "PL_VFID_MAP", 0x19a04, 0 }, + { "Valid", 7, 1 }, + { "VFID", 0, 7 }, + { "PL_VFID_MAP", 0x19a08, 0 }, + { "Valid", 7, 1 }, + { "VFID", 0, 7 }, + { "PL_VFID_MAP", 0x19a0c, 0 }, + { "Valid", 7, 1 }, + { "VFID", 0, 7 }, + { "PL_VFID_MAP", 0x19a10, 0 }, + { "Valid", 7, 1 }, + { "VFID", 0, 7 }, + { "PL_VFID_MAP", 0x19a14, 0 }, + { "Valid", 7, 1 }, + { "VFID", 0, 7 }, + { "PL_VFID_MAP", 0x19a18, 0 }, + { "Valid", 7, 1 }, + { "VFID", 0, 7 }, + { "PL_VFID_MAP", 0x19a1c, 0 }, + { "Valid", 7, 1 }, + { "VFID", 0, 7 }, + { "PL_VFID_MAP", 0x19a20, 0 }, + { "Valid", 7, 1 }, + { "VFID", 0, 7 }, + { "PL_VFID_MAP", 0x19a24, 0 }, + { "Valid", 7, 1 }, + { "VFID", 0, 7 }, + { "PL_VFID_MAP", 0x19a28, 0 }, + { "Valid", 7, 1 }, + { "VFID", 0, 7 }, + { "PL_VFID_MAP", 0x19a2c, 0 }, + { "Valid", 7, 1 }, + { "VFID", 0, 7 }, + { "PL_VFID_MAP", 0x19a30, 0 }, + { "Valid", 7, 1 }, + { "VFID", 0, 7 }, + { "PL_VFID_MAP", 0x19a34, 0 }, + { "Valid", 7, 1 }, + { "VFID", 0, 7 }, + { "PL_VFID_MAP", 0x19a38, 0 }, + { "Valid", 7, 1 }, + { "VFID", 0, 7 }, + { "PL_VFID_MAP", 0x19a3c, 0 }, + { "Valid", 7, 1 }, + { "VFID", 0, 7 }, + { "PL_VFID_MAP", 0x19a40, 0 }, + { "Valid", 7, 1 }, + { "VFID", 0, 7 }, + { "PL_VFID_MAP", 0x19a44, 0 }, + { "Valid", 7, 1 }, + { "VFID", 0, 7 }, + { "PL_VFID_MAP", 0x19a48, 0 }, + { "Valid", 7, 1 }, + { "VFID", 0, 7 }, + { "PL_VFID_MAP", 0x19a4c, 0 }, + { "Valid", 7, 1 }, + { "VFID", 0, 7 }, + { "PL_VFID_MAP", 0x19a50, 0 }, + { "Valid", 7, 1 }, + { "VFID", 0, 7 }, + { "PL_VFID_MAP", 0x19a54, 0 }, + { "Valid", 7, 1 }, + { "VFID", 0, 7 }, + { "PL_VFID_MAP", 0x19a58, 0 }, + { "Valid", 7, 1 }, + { "VFID", 0, 7 }, + { "PL_VFID_MAP", 0x19a5c, 0 }, + { "Valid", 7, 1 }, + { "VFID", 0, 7 }, + { "PL_VFID_MAP", 0x19a60, 0 }, + { "Valid", 7, 1 }, + { "VFID", 0, 7 }, + { "PL_VFID_MAP", 0x19a64, 0 }, + { "Valid", 7, 1 }, + { "VFID", 0, 7 }, + { "PL_VFID_MAP", 0x19a68, 0 }, + { "Valid", 7, 1 }, + { "VFID", 0, 7 }, + { "PL_VFID_MAP", 0x19a6c, 0 }, + { "Valid", 7, 1 }, + { "VFID", 0, 7 }, + { "PL_VFID_MAP", 0x19a70, 0 }, + { "Valid", 7, 1 }, + { "VFID", 0, 7 }, + { "PL_VFID_MAP", 0x19a74, 0 }, + { "Valid", 7, 1 }, + { "VFID", 0, 7 }, + { "PL_VFID_MAP", 0x19a78, 0 }, + { "Valid", 7, 1 }, + { "VFID", 0, 7 }, + { "PL_VFID_MAP", 0x19a7c, 0 }, + { "Valid", 7, 1 }, + { "VFID", 0, 7 }, + { "PL_VFID_MAP", 0x19a80, 0 }, + { "Valid", 7, 1 }, + { "VFID", 0, 7 }, + { "PL_VFID_MAP", 0x19a84, 0 }, + { "Valid", 7, 1 }, + { "VFID", 0, 7 }, + { "PL_VFID_MAP", 0x19a88, 0 }, + { "Valid", 7, 1 }, + { "VFID", 0, 7 }, + { "PL_VFID_MAP", 0x19a8c, 0 }, + { "Valid", 7, 1 }, + { "VFID", 0, 7 }, + { "PL_VFID_MAP", 0x19a90, 0 }, + { "Valid", 7, 1 }, + { "VFID", 0, 7 }, + { "PL_VFID_MAP", 0x19a94, 0 }, + { "Valid", 7, 1 }, + { "VFID", 0, 7 }, + { "PL_VFID_MAP", 0x19a98, 0 }, + { "Valid", 7, 1 }, + { "VFID", 0, 7 }, + { "PL_VFID_MAP", 0x19a9c, 0 }, + { "Valid", 7, 1 }, + { "VFID", 0, 7 }, + { "PL_VFID_MAP", 0x19aa0, 0 }, + { "Valid", 7, 1 }, + { "VFID", 0, 7 }, + { "PL_VFID_MAP", 0x19aa4, 0 }, + { "Valid", 7, 1 }, + { "VFID", 0, 7 }, + { "PL_VFID_MAP", 0x19aa8, 0 }, + { "Valid", 7, 1 }, + { "VFID", 0, 7 }, + { "PL_VFID_MAP", 0x19aac, 0 }, + { "Valid", 7, 1 }, + { "VFID", 0, 7 }, + { "PL_VFID_MAP", 0x19ab0, 0 }, + { "Valid", 7, 1 }, + { "VFID", 0, 7 }, + { "PL_VFID_MAP", 0x19ab4, 0 }, + { "Valid", 7, 1 }, + { "VFID", 0, 7 }, + { "PL_VFID_MAP", 0x19ab8, 0 }, + { "Valid", 7, 1 }, + { "VFID", 0, 7 }, + { "PL_VFID_MAP", 0x19abc, 0 }, + { "Valid", 7, 1 }, + { "VFID", 0, 7 }, + { "PL_VFID_MAP", 0x19ac0, 0 }, + { "Valid", 7, 1 }, + { "VFID", 0, 7 }, + { "PL_VFID_MAP", 0x19ac4, 0 }, + { "Valid", 7, 1 }, + { "VFID", 0, 7 }, + { "PL_VFID_MAP", 0x19ac8, 0 }, + { "Valid", 7, 1 }, + { "VFID", 0, 7 }, + { "PL_VFID_MAP", 0x19acc, 0 }, + { "Valid", 7, 1 }, + { "VFID", 0, 7 }, + { "PL_VFID_MAP", 0x19ad0, 0 }, + { "Valid", 7, 1 }, + { "VFID", 0, 7 }, + { "PL_VFID_MAP", 0x19ad4, 0 }, + { "Valid", 7, 1 }, + { "VFID", 0, 7 }, + { "PL_VFID_MAP", 0x19ad8, 0 }, + { "Valid", 7, 1 }, + { "VFID", 0, 7 }, + { "PL_VFID_MAP", 0x19adc, 0 }, + { "Valid", 7, 1 }, + { "VFID", 0, 7 }, + { "PL_VFID_MAP", 0x19ae0, 0 }, + { "Valid", 7, 1 }, + { "VFID", 0, 7 }, + { "PL_VFID_MAP", 0x19ae4, 0 }, + { "Valid", 7, 1 }, + { "VFID", 0, 7 }, + { "PL_VFID_MAP", 0x19ae8, 0 }, + { "Valid", 7, 1 }, + { "VFID", 0, 7 }, + { "PL_VFID_MAP", 0x19aec, 0 }, + { "Valid", 7, 1 }, + { "VFID", 0, 7 }, + { "PL_VFID_MAP", 0x19af0, 0 }, + { "Valid", 7, 1 }, + { "VFID", 0, 7 }, + { "PL_VFID_MAP", 0x19af4, 0 }, + { "Valid", 7, 1 }, + { "VFID", 0, 7 }, + { "PL_VFID_MAP", 0x19af8, 0 }, + { "Valid", 7, 1 }, + { "VFID", 0, 7 }, + { "PL_VFID_MAP", 0x19afc, 0 }, + { "Valid", 7, 1 }, + { "VFID", 0, 7 }, + { "PL_VFID_MAP", 0x19b00, 0 }, + { "Valid", 7, 1 }, + { "VFID", 0, 7 }, + { "PL_VFID_MAP", 0x19b04, 0 }, + { "Valid", 7, 1 }, + { "VFID", 0, 7 }, + { "PL_VFID_MAP", 0x19b08, 0 }, + { "Valid", 7, 1 }, + { "VFID", 0, 7 }, + { "PL_VFID_MAP", 0x19b0c, 0 }, + { "Valid", 7, 1 }, + { "VFID", 0, 7 }, + { "PL_VFID_MAP", 0x19b10, 0 }, + { "Valid", 7, 1 }, + { "VFID", 0, 7 }, + { "PL_VFID_MAP", 0x19b14, 0 }, + { "Valid", 7, 1 }, + { "VFID", 0, 7 }, + { "PL_VFID_MAP", 0x19b18, 0 }, + { "Valid", 7, 1 }, + { "VFID", 0, 7 }, + { "PL_VFID_MAP", 0x19b1c, 0 }, + { "Valid", 7, 1 }, + { "VFID", 0, 7 }, + { "PL_VFID_MAP", 0x19b20, 0 }, + { "Valid", 7, 1 }, + { "VFID", 0, 7 }, + { "PL_VFID_MAP", 0x19b24, 0 }, + { "Valid", 7, 1 }, + { "VFID", 0, 7 }, + { "PL_VFID_MAP", 0x19b28, 0 }, + { "Valid", 7, 1 }, + { "VFID", 0, 7 }, + { "PL_VFID_MAP", 0x19b2c, 0 }, + { "Valid", 7, 1 }, + { "VFID", 0, 7 }, + { "PL_VFID_MAP", 0x19b30, 0 }, + { "Valid", 7, 1 }, + { "VFID", 0, 7 }, + { "PL_VFID_MAP", 0x19b34, 0 }, + { "Valid", 7, 1 }, + { "VFID", 0, 7 }, + { "PL_VFID_MAP", 0x19b38, 0 }, + { "Valid", 7, 1 }, + { "VFID", 0, 7 }, + { "PL_VFID_MAP", 0x19b3c, 0 }, + { "Valid", 7, 1 }, + { "VFID", 0, 7 }, + { "PL_VFID_MAP", 0x19b40, 0 }, + { "Valid", 7, 1 }, + { "VFID", 0, 7 }, + { "PL_VFID_MAP", 0x19b44, 0 }, + { "Valid", 7, 1 }, + { "VFID", 0, 7 }, + { "PL_VFID_MAP", 0x19b48, 0 }, + { "Valid", 7, 1 }, + { "VFID", 0, 7 }, + { "PL_VFID_MAP", 0x19b4c, 0 }, + { "Valid", 7, 1 }, + { "VFID", 0, 7 }, + { "PL_VFID_MAP", 0x19b50, 0 }, + { "Valid", 7, 1 }, + { "VFID", 0, 7 }, + { "PL_VFID_MAP", 0x19b54, 0 }, + { "Valid", 7, 1 }, + { "VFID", 0, 7 }, + { "PL_VFID_MAP", 0x19b58, 0 }, + { "Valid", 7, 1 }, + { "VFID", 0, 7 }, + { "PL_VFID_MAP", 0x19b5c, 0 }, + { "Valid", 7, 1 }, + { "VFID", 0, 7 }, + { "PL_VFID_MAP", 0x19b60, 0 }, + { "Valid", 7, 1 }, + { "VFID", 0, 7 }, + { "PL_VFID_MAP", 0x19b64, 0 }, + { "Valid", 7, 1 }, + { "VFID", 0, 7 }, + { "PL_VFID_MAP", 0x19b68, 0 }, + { "Valid", 7, 1 }, + { "VFID", 0, 7 }, + { "PL_VFID_MAP", 0x19b6c, 0 }, + { "Valid", 7, 1 }, + { "VFID", 0, 7 }, + { "PL_VFID_MAP", 0x19b70, 0 }, + { "Valid", 7, 1 }, + { "VFID", 0, 7 }, + { "PL_VFID_MAP", 0x19b74, 0 }, + { "Valid", 7, 1 }, + { "VFID", 0, 7 }, + { "PL_VFID_MAP", 0x19b78, 0 }, + { "Valid", 7, 1 }, + { "VFID", 0, 7 }, + { "PL_VFID_MAP", 0x19b7c, 0 }, + { "Valid", 7, 1 }, + { "VFID", 0, 7 }, + { "PL_VFID_MAP", 0x19b80, 0 }, + { "Valid", 7, 1 }, + { "VFID", 0, 7 }, + { "PL_VFID_MAP", 0x19b84, 0 }, + { "Valid", 7, 1 }, + { "VFID", 0, 7 }, + { "PL_VFID_MAP", 0x19b88, 0 }, + { "Valid", 7, 1 }, + { "VFID", 0, 7 }, + { "PL_VFID_MAP", 0x19b8c, 0 }, + { "Valid", 7, 1 }, + { "VFID", 0, 7 }, + { "PL_VFID_MAP", 0x19b90, 0 }, + { "Valid", 7, 1 }, + { "VFID", 0, 7 }, + { "PL_VFID_MAP", 0x19b94, 0 }, + { "Valid", 7, 1 }, + { "VFID", 0, 7 }, + { "PL_VFID_MAP", 0x19b98, 0 }, + { "Valid", 7, 1 }, + { "VFID", 0, 7 }, + { "PL_VFID_MAP", 0x19b9c, 0 }, + { "Valid", 7, 1 }, + { "VFID", 0, 7 }, + { "PL_VFID_MAP", 0x19ba0, 0 }, + { "Valid", 7, 1 }, + { "VFID", 0, 7 }, + { "PL_VFID_MAP", 0x19ba4, 0 }, + { "Valid", 7, 1 }, + { "VFID", 0, 7 }, + { "PL_VFID_MAP", 0x19ba8, 0 }, + { "Valid", 7, 1 }, + { "VFID", 0, 7 }, + { "PL_VFID_MAP", 0x19bac, 0 }, + { "Valid", 7, 1 }, + { "VFID", 0, 7 }, + { "PL_VFID_MAP", 0x19bb0, 0 }, + { "Valid", 7, 1 }, + { "VFID", 0, 7 }, + { "PL_VFID_MAP", 0x19bb4, 0 }, + { "Valid", 7, 1 }, + { "VFID", 0, 7 }, + { "PL_VFID_MAP", 0x19bb8, 0 }, + { "Valid", 7, 1 }, + { "VFID", 0, 7 }, + { "PL_VFID_MAP", 0x19bbc, 0 }, + { "Valid", 7, 1 }, + { "VFID", 0, 7 }, + { "PL_VFID_MAP", 0x19bc0, 0 }, + { "Valid", 7, 1 }, + { "VFID", 0, 7 }, + { "PL_VFID_MAP", 0x19bc4, 0 }, + { "Valid", 7, 1 }, + { "VFID", 0, 7 }, + { "PL_VFID_MAP", 0x19bc8, 0 }, + { "Valid", 7, 1 }, + { "VFID", 0, 7 }, + { "PL_VFID_MAP", 0x19bcc, 0 }, + { "Valid", 7, 1 }, + { "VFID", 0, 7 }, + { "PL_VFID_MAP", 0x19bd0, 0 }, + { "Valid", 7, 1 }, + { "VFID", 0, 7 }, + { "PL_VFID_MAP", 0x19bd4, 0 }, + { "Valid", 7, 1 }, + { "VFID", 0, 7 }, + { "PL_VFID_MAP", 0x19bd8, 0 }, + { "Valid", 7, 1 }, + { "VFID", 0, 7 }, + { "PL_VFID_MAP", 0x19bdc, 0 }, + { "Valid", 7, 1 }, + { "VFID", 0, 7 }, + { "PL_VFID_MAP", 0x19be0, 0 }, + { "Valid", 7, 1 }, + { "VFID", 0, 7 }, + { "PL_VFID_MAP", 0x19be4, 0 }, + { "Valid", 7, 1 }, + { "VFID", 0, 7 }, + { "PL_VFID_MAP", 0x19be8, 0 }, + { "Valid", 7, 1 }, + { "VFID", 0, 7 }, + { "PL_VFID_MAP", 0x19bec, 0 }, + { "Valid", 7, 1 }, + { "VFID", 0, 7 }, + { "PL_VFID_MAP", 0x19bf0, 0 }, + { "Valid", 7, 1 }, + { "VFID", 0, 7 }, + { "PL_VFID_MAP", 0x19bf4, 0 }, + { "Valid", 7, 1 }, + { "VFID", 0, 7 }, + { "PL_VFID_MAP", 0x19bf8, 0 }, + { "Valid", 7, 1 }, + { "VFID", 0, 7 }, + { "PL_VFID_MAP", 0x19bfc, 0 }, + { "Valid", 7, 1 }, + { "VFID", 0, 7 }, + { NULL, 0, 0 } +}; + +struct reg_info t4_le_regs[] = { + { "LE_BUF_CONFIG", 0x19c00, 0 }, + { "LE_DB_CONFIG", 0x19c04, 0 }, + { "TCAMCMDOVLAPEN", 21, 1 }, + { "HASHEN", 20, 1 }, + { "ASBOTHSRCHEN", 18, 1 }, + { "ASLIPCOMPEN", 17, 1 }, + { "BUILD", 16, 1 }, + { "FilterEn", 11, 1 }, + { "SYNMode", 7, 2 }, + { "LEBUSEN", 5, 1 }, + { "ELOOKDUMEN", 4, 1 }, + { "IPv4ONLYEN", 3, 1 }, + { "MOSTCMDOEN", 2, 1 }, + { "DELACTSYNOEN", 1, 1 }, + { "CMDOVERLAPDIS", 0, 1 }, + { "LE_MISC", 0x19c08, 0 }, + { "LE_DB_ROUTING_TABLE_INDEX", 0x19c10, 0 }, + { "RTINDX", 7, 6 }, + { "LE_DB_FILTER_TABLE_INDEX", 0x19c14, 0 }, + { "FTINDX", 7, 6 }, + { "LE_DB_SERVER_INDEX", 0x19c18, 0 }, + { "SRINDX", 7, 6 }, + { "LE_DB_CLIP_TABLE_INDEX", 0x19c1c, 0 }, + { "CLIPTINDX", 7, 6 }, + { "LE_DB_ACT_CNT_IPV4", 0x19c20, 0 }, + { "LE_DB_ACT_CNT_IPV6", 0x19c24, 0 }, + { "LE_DB_HASH_CONFIG", 0x19c28, 0 }, + { "HASHTIDSIZE", 16, 6 }, + { "HASHSIZE", 0, 6 }, + { "LE_DB_HASH_TABLE_BASE", 0x19c2c, 0 }, + { "LE_DB_HASH_TID_BASE", 0x19c30, 0 }, + { "LE_DB_SIZE", 0x19c34, 0 }, + { "LE_DB_INT_ENABLE", 0x19c38, 0 }, + { "MsgSel", 27, 5 }, + { "ReqQParErr", 16, 1 }, + { "UnknownCmd", 15, 1 }, + { "DropFilterHit", 13, 1 }, + { "FilterHit", 12, 1 }, + { "SYNCookieOff", 11, 1 }, + { "SYNCookieBad", 10, 1 }, + { "SYNCookie", 9, 1 }, + { "NFASrchFail", 8, 1 }, + { "ActRgnFull", 7, 1 }, + { "ParityErr", 6, 1 }, + { "LIPMiss", 5, 1 }, + { "LIP0", 4, 1 }, + { "Miss", 3, 1 }, + { "RoutingHit", 2, 1 }, + { "ActiveHit", 1, 1 }, + { "ServerHit", 0, 1 }, + { "LE_DB_INT_CAUSE", 0x19c3c, 0 }, + { "ReqQParErr", 16, 1 }, + { "UnknownCmd", 15, 1 }, + { "DropFilterHit", 13, 1 }, + { "FilterHit", 12, 1 }, + { "SYNCookieOff", 11, 1 }, + { "SYNCookieBad", 10, 1 }, + { "SYNCookie", 9, 1 }, + { "NFASrchFail", 8, 1 }, + { "ActRgnFull", 7, 1 }, + { "ParityErr", 6, 1 }, + { "LIPMiss", 5, 1 }, + { "LIP0", 4, 1 }, + { "Miss", 3, 1 }, + { "RoutingHit", 2, 1 }, + { "ActiveHit", 1, 1 }, + { "ServerHit", 0, 1 }, + { "LE_DB_INT_TID", 0x19c40, 0 }, + { "LE_DB_INT_PTID", 0x19c44, 0 }, + { "LE_DB_INT_INDEX", 0x19c48, 0 }, + { "LE_DB_INT_CMD", 0x19c4c, 0 }, + { "LE_DB_MASK_IPV4", 0x19c50, 0 }, + { "LE_DB_MASK_IPV4", 0x19c54, 0 }, + { "LE_DB_MASK_IPV4", 0x19c58, 0 }, + { "LE_DB_MASK_IPV4", 0x19c5c, 0 }, + { "LE_DB_MASK_IPV4", 0x19c60, 0 }, + { "LE_DB_MASK_IPV4", 0x19c64, 0 }, + { "LE_DB_MASK_IPV4", 0x19c68, 0 }, + { "LE_DB_MASK_IPV4", 0x19c6c, 0 }, + { "LE_DB_MASK_IPV4", 0x19c70, 0 }, + { "LE_DB_MASK_IPV4", 0x19c74, 0 }, + { "LE_DB_MASK_IPV4", 0x19c78, 0 }, + { "LE_DB_MASK_IPV4", 0x19c7c, 0 }, + { "LE_DB_MASK_IPV4", 0x19c80, 0 }, + { "LE_DB_MASK_IPV4", 0x19c84, 0 }, + { "LE_DB_MASK_IPV4", 0x19c88, 0 }, + { "LE_DB_MASK_IPV4", 0x19c8c, 0 }, + { "LE_DB_MASK_IPV4", 0x19c90, 0 }, + { "LE_DB_MASK_IPV6", 0x19ca0, 0 }, + { "LE_DB_MASK_IPV6", 0x19ca4, 0 }, + { "LE_DB_MASK_IPV6", 0x19ca8, 0 }, + { "LE_DB_MASK_IPV6", 0x19cac, 0 }, + { "LE_DB_MASK_IPV6", 0x19cb0, 0 }, + { "LE_DB_MASK_IPV6", 0x19cb4, 0 }, + { "LE_DB_MASK_IPV6", 0x19cb8, 0 }, + { "LE_DB_MASK_IPV6", 0x19cbc, 0 }, + { "LE_DB_MASK_IPV6", 0x19cc0, 0 }, + { "LE_DB_MASK_IPV6", 0x19cc4, 0 }, + { "LE_DB_MASK_IPV6", 0x19cc8, 0 }, + { "LE_DB_MASK_IPV6", 0x19ccc, 0 }, + { "LE_DB_MASK_IPV6", 0x19cd0, 0 }, + { "LE_DB_MASK_IPV6", 0x19cd4, 0 }, + { "LE_DB_MASK_IPV6", 0x19cd8, 0 }, + { "LE_DB_MASK_IPV6", 0x19cdc, 0 }, + { "LE_DB_MASK_IPV6", 0x19ce0, 0 }, + { "LE_DB_REQ_RSP_CNT", 0x19ce4, 0 }, + { "RspCnt", 16, 16 }, + { "ReqCnt", 0, 16 }, + { "LE_DB_DBGI_CONFIG", 0x19cf0, 0 }, + { "DBGICMDPERR", 31, 1 }, + { "DBGICMDRANGE", 22, 3 }, + { "DBGICMDMSKTYPE", 21, 1 }, + { "DBGICMDSEARCH", 20, 1 }, + { "DBGICMDREAD", 19, 1 }, + { "DBGICMDLEARN", 18, 1 }, + { "DBGICMDERASE", 17, 1 }, + { "DBGICMDIPv6", 16, 1 }, + { "DBGICMDTYPE", 13, 3 }, + { "DBGICMDACKERR", 12, 1 }, + { "DBGICMDBUSY", 3, 1 }, + { "DBGICMDSTRT", 2, 1 }, + { "DBGICMDMODE", 0, 2 }, + { "LE_DB_DBGI_REQ_TCAM_CMD", 0x19cf4, 0 }, + { "DBGICMD", 20, 4 }, + { "DBGITINDEX", 0, 20 }, + { "LE_PERR_ENABLE", 0x19cf8, 0 }, + { "ReqQueue", 1, 1 }, + { "TCAM", 0, 1 }, + { "LE_SPARE", 0x19cfc, 0 }, + { "LE_DB_DBGI_REQ_DATA", 0x19d00, 0 }, + { "LE_DB_DBGI_REQ_DATA", 0x19d04, 0 }, + { "LE_DB_DBGI_REQ_DATA", 0x19d08, 0 }, + { "LE_DB_DBGI_REQ_DATA", 0x19d0c, 0 }, + { "LE_DB_DBGI_REQ_DATA", 0x19d10, 0 }, + { "LE_DB_DBGI_REQ_DATA", 0x19d14, 0 }, + { "LE_DB_DBGI_REQ_DATA", 0x19d18, 0 }, + { "LE_DB_DBGI_REQ_DATA", 0x19d1c, 0 }, + { "LE_DB_DBGI_REQ_DATA", 0x19d20, 0 }, + { "LE_DB_DBGI_REQ_DATA", 0x19d24, 0 }, + { "LE_DB_DBGI_REQ_DATA", 0x19d28, 0 }, + { "LE_DB_DBGI_REQ_DATA", 0x19d2c, 0 }, + { "LE_DB_DBGI_REQ_DATA", 0x19d30, 0 }, + { "LE_DB_DBGI_REQ_DATA", 0x19d34, 0 }, + { "LE_DB_DBGI_REQ_DATA", 0x19d38, 0 }, + { "LE_DB_DBGI_REQ_DATA", 0x19d3c, 0 }, + { "LE_DB_DBGI_REQ_DATA", 0x19d40, 0 }, + { "LE_DB_DBGI_REQ_MASK", 0x19d50, 0 }, + { "LE_DB_DBGI_REQ_MASK", 0x19d54, 0 }, + { "LE_DB_DBGI_REQ_MASK", 0x19d58, 0 }, + { "LE_DB_DBGI_REQ_MASK", 0x19d5c, 0 }, + { "LE_DB_DBGI_REQ_MASK", 0x19d60, 0 }, + { "LE_DB_DBGI_REQ_MASK", 0x19d64, 0 }, + { "LE_DB_DBGI_REQ_MASK", 0x19d68, 0 }, + { "LE_DB_DBGI_REQ_MASK", 0x19d6c, 0 }, + { "LE_DB_DBGI_REQ_MASK", 0x19d70, 0 }, + { "LE_DB_DBGI_REQ_MASK", 0x19d74, 0 }, + { "LE_DB_DBGI_REQ_MASK", 0x19d78, 0 }, + { "LE_DB_DBGI_REQ_MASK", 0x19d7c, 0 }, + { "LE_DB_DBGI_REQ_MASK", 0x19d80, 0 }, + { "LE_DB_DBGI_REQ_MASK", 0x19d84, 0 }, + { "LE_DB_DBGI_REQ_MASK", 0x19d88, 0 }, + { "LE_DB_DBGI_REQ_MASK", 0x19d8c, 0 }, + { "LE_DB_DBGI_REQ_MASK", 0x19d90, 0 }, + { "LE_DB_DBGI_RSP_STATUS", 0x19d94, 0 }, + { "DBGIRspIndex", 12, 20 }, + { "DBGIRspMsg", 8, 4 }, + { "DBGIRspMsgVld", 7, 1 }, + { "DBGIRspMHit", 2, 1 }, + { "DBGIRspHit", 1, 1 }, + { "DBGIRspValid", 0, 1 }, + { "LE_DB_DBGI_RSP_DATA", 0x19da0, 0 }, + { "LE_DB_DBGI_RSP_DATA", 0x19da4, 0 }, + { "LE_DB_DBGI_RSP_DATA", 0x19da8, 0 }, + { "LE_DB_DBGI_RSP_DATA", 0x19dac, 0 }, + { "LE_DB_DBGI_RSP_DATA", 0x19db0, 0 }, + { "LE_DB_DBGI_RSP_DATA", 0x19db4, 0 }, + { "LE_DB_DBGI_RSP_DATA", 0x19db8, 0 }, + { "LE_DB_DBGI_RSP_DATA", 0x19dbc, 0 }, + { "LE_DB_DBGI_RSP_DATA", 0x19dc0, 0 }, + { "LE_DB_DBGI_RSP_DATA", 0x19dc4, 0 }, + { "LE_DB_DBGI_RSP_DATA", 0x19dc8, 0 }, + { "LE_DB_DBGI_RSP_DATA", 0x19dcc, 0 }, + { "LE_DB_DBGI_RSP_DATA", 0x19dd0, 0 }, + { "LE_DB_DBGI_RSP_DATA", 0x19dd4, 0 }, + { "LE_DB_DBGI_RSP_DATA", 0x19dd8, 0 }, + { "LE_DB_DBGI_RSP_DATA", 0x19ddc, 0 }, + { "LE_DB_DBGI_RSP_DATA", 0x19de0, 0 }, + { "LE_DB_DBGI_RSP_LAST_CMD", 0x19de4, 0 }, + { "LastCmdB", 16, 11 }, + { "LastCmdA", 0, 11 }, + { "LE_DB_DROP_FILTER_ENTRY", 0x19de8, 0 }, + { "DropFilterEn", 31, 1 }, + { "DropFilterClear", 17, 1 }, + { "DropFilterSet", 16, 1 }, + { "DropFilterFIDX", 0, 13 }, + { "LE_DB_PTID_SVRBASE", 0x19df0, 0 }, + { "SVRBASE_ADDR", 2, 18 }, + { "LE_DB_FTID_FLTRBASE", 0x19df4, 0 }, + { "FLTRBASE_ADDR", 2, 18 }, + { "LE_DB_TID_HASHBASE", 0x19df8, 0 }, + { "HASHBASE_ADDR", 2, 20 }, + { "LE_PERR_INJECT", 0x19dfc, 0 }, + { "MemSel", 1, 3 }, + { "InjectDataErr", 0, 1 }, + { "LE_DB_ACTIVE_MASK_IPV4", 0x19e00, 0 }, + { "LE_DB_ACTIVE_MASK_IPV4", 0x19e04, 0 }, + { "LE_DB_ACTIVE_MASK_IPV4", 0x19e08, 0 }, + { "LE_DB_ACTIVE_MASK_IPV4", 0x19e0c, 0 }, + { "LE_DB_ACTIVE_MASK_IPV4", 0x19e10, 0 }, + { "LE_DB_ACTIVE_MASK_IPV4", 0x19e14, 0 }, + { "LE_DB_ACTIVE_MASK_IPV4", 0x19e18, 0 }, + { "LE_DB_ACTIVE_MASK_IPV4", 0x19e1c, 0 }, + { "LE_DB_ACTIVE_MASK_IPV4", 0x19e20, 0 }, + { "LE_DB_ACTIVE_MASK_IPV4", 0x19e24, 0 }, + { "LE_DB_ACTIVE_MASK_IPV4", 0x19e28, 0 }, + { "LE_DB_ACTIVE_MASK_IPV4", 0x19e2c, 0 }, + { "LE_DB_ACTIVE_MASK_IPV4", 0x19e30, 0 }, + { "LE_DB_ACTIVE_MASK_IPV4", 0x19e34, 0 }, + { "LE_DB_ACTIVE_MASK_IPV4", 0x19e38, 0 }, + { "LE_DB_ACTIVE_MASK_IPV4", 0x19e3c, 0 }, + { "LE_DB_ACTIVE_MASK_IPV4", 0x19e40, 0 }, + { "LE_DB_ACTIVE_MASK_IPV6", 0x19e50, 0 }, + { "LE_DB_ACTIVE_MASK_IPV6", 0x19e54, 0 }, + { "LE_DB_ACTIVE_MASK_IPV6", 0x19e58, 0 }, + { "LE_DB_ACTIVE_MASK_IPV6", 0x19e5c, 0 }, + { "LE_DB_ACTIVE_MASK_IPV6", 0x19e60, 0 }, + { "LE_DB_ACTIVE_MASK_IPV6", 0x19e64, 0 }, + { "LE_DB_ACTIVE_MASK_IPV6", 0x19e68, 0 }, + { "LE_DB_ACTIVE_MASK_IPV6", 0x19e6c, 0 }, + { "LE_DB_ACTIVE_MASK_IPV6", 0x19e70, 0 }, + { "LE_DB_ACTIVE_MASK_IPV6", 0x19e74, 0 }, + { "LE_DB_ACTIVE_MASK_IPV6", 0x19e78, 0 }, + { "LE_DB_ACTIVE_MASK_IPV6", 0x19e7c, 0 }, + { "LE_DB_ACTIVE_MASK_IPV6", 0x19e80, 0 }, + { "LE_DB_ACTIVE_MASK_IPV6", 0x19e84, 0 }, + { "LE_DB_ACTIVE_MASK_IPV6", 0x19e88, 0 }, + { "LE_DB_ACTIVE_MASK_IPV6", 0x19e8c, 0 }, + { "LE_DB_ACTIVE_MASK_IPV6", 0x19e90, 0 }, + { "LE_HASH_MASK_GEN_IPV4", 0x19ea0, 0 }, + { "LE_HASH_MASK_GEN_IPV4", 0x19ea4, 0 }, + { "LE_HASH_MASK_GEN_IPV4", 0x19ea8, 0 }, + { "LE_HASH_MASK_GEN_IPV4", 0x19eac, 0 }, + { "LE_HASH_MASK_GEN_IPV6", 0x19eb0, 0 }, + { "LE_HASH_MASK_GEN_IPV6", 0x19eb4, 0 }, + { "LE_HASH_MASK_GEN_IPV6", 0x19eb8, 0 }, + { "LE_HASH_MASK_GEN_IPV6", 0x19ebc, 0 }, + { "LE_HASH_MASK_GEN_IPV6", 0x19ec0, 0 }, + { "LE_HASH_MASK_GEN_IPV6", 0x19ec4, 0 }, + { "LE_HASH_MASK_GEN_IPV6", 0x19ec8, 0 }, + { "LE_HASH_MASK_GEN_IPV6", 0x19ecc, 0 }, + { "LE_HASH_MASK_GEN_IPV6", 0x19ed0, 0 }, + { "LE_HASH_MASK_GEN_IPV6", 0x19ed4, 0 }, + { "LE_HASH_MASK_GEN_IPV6", 0x19ed8, 0 }, + { "LE_HASH_MASK_GEN_IPV6", 0x19edc, 0 }, + { "LE_HASH_MASK_CMP_IPV4", 0x19ee0, 0 }, + { "LE_HASH_MASK_CMP_IPV4", 0x19ee4, 0 }, + { "LE_HASH_MASK_CMP_IPV4", 0x19ee8, 0 }, + { "LE_HASH_MASK_CMP_IPV4", 0x19eec, 0 }, + { "LE_HASH_MASK_CMP_IPV6", 0x19ef0, 0 }, + { "LE_HASH_MASK_CMP_IPV6", 0x19ef4, 0 }, + { "LE_HASH_MASK_CMP_IPV6", 0x19ef8, 0 }, + { "LE_HASH_MASK_CMP_IPV6", 0x19efc, 0 }, + { "LE_HASH_MASK_CMP_IPV6", 0x19f00, 0 }, + { "LE_HASH_MASK_CMP_IPV6", 0x19f04, 0 }, + { "LE_HASH_MASK_CMP_IPV6", 0x19f08, 0 }, + { "LE_HASH_MASK_CMP_IPV6", 0x19f0c, 0 }, + { "LE_HASH_MASK_CMP_IPV6", 0x19f10, 0 }, + { "LE_HASH_MASK_CMP_IPV6", 0x19f14, 0 }, + { "LE_HASH_MASK_CMP_IPV6", 0x19f18, 0 }, + { "LE_HASH_MASK_CMP_IPV6", 0x19f1c, 0 }, + { "LE_DEBUG_LA_CONFIG", 0x19f20, 0 }, + { "LE_REQ_DEBUG_LA_DATA", 0x19f24, 0 }, + { "LE_REQ_DEBUG_LA_WRPTR", 0x19f28, 0 }, + { "LE_RSP_DEBUG_LA_DATA", 0x19f2c, 0 }, + { "LE_RSP_DEBUG_LA_WRPTR", 0x19f30, 0 }, + { NULL, 0, 0 } +}; + +struct reg_info t4_ncsi_regs[] = { + { "NCSI_PORT_CFGREG", 0x1a000, 0 }, + { "WireEn", 28, 4 }, + { "strp_crc", 24, 4 }, + { "rx_halt", 22, 1 }, + { "flush_rx_fifo", 21, 1 }, + { "hw_arb_en", 20, 1 }, + { "soft_pkg_sel", 19, 1 }, + { "err_discard_en", 18, 1 }, + { "max_pkt_size", 4, 14 }, + { "rx_byte_swap", 3, 1 }, + { "tx_byte_swap", 2, 1 }, + { "NCSI_RST_CTRL", 0x1a004, 0 }, + { "mac_ref_rst", 2, 1 }, + { "mac_rx_rst", 1, 1 }, + { "mac_tx_rst", 0, 1 }, + { "NCSI_CH0_SADDR_LOW", 0x1a010, 0 }, + { "NCSI_CH0_SADDR_HIGH", 0x1a014, 0 }, + { "CHO_SADDR_EN", 31, 1 }, + { "CH0_SADDR_HIGH", 0, 16 }, + { "NCSI_CH1_SADDR_LOW", 0x1a018, 0 }, + { "NCSI_CH1_SADDR_HIGH", 0x1a01c, 0 }, + { "CH1_SADDR_EN", 31, 1 }, + { "CH1_SADDR_HIGH", 0, 16 }, + { "NCSI_CH2_SADDR_LOW", 0x1a020, 0 }, + { "NCSI_CH2_SADDR_HIGH", 0x1a024, 0 }, + { "CH2_SADDR_EN", 31, 1 }, + { "CH2_SADDR_HIGH", 0, 16 }, + { "NCSI_CH3_SADDR_LOW", 0x1a028, 0 }, + { "NCSI_CH3_SADDR_HIGH", 0x1a02c, 0 }, + { "CH3_SADDR_EN", 31, 1 }, + { "CH3_SADDR_HIGH", 0, 16 }, + { "NCSI_WORK_REQHDR_0", 0x1a030, 0 }, + { "NCSI_WORK_REQHDR_1", 0x1a034, 0 }, + { "NCSI_WORK_REQHDR_2", 0x1a038, 0 }, + { "NCSI_WORK_REQHDR_3", 0x1a03c, 0 }, + { "NCSI_MPS_HDR_LO", 0x1a040, 0 }, + { "NCSI_MPS_HDR_HI", 0x1a044, 0 }, + { "NCSI_CTL", 0x1a048, 0 }, + { "STRIP_OVLAN", 3, 1 }, + { "bmc_drop_non_bc", 2, 1 }, + { "bmc_rx_fwd_all", 1, 1 }, + { "FWD_BMC", 0, 1 }, + { "NCSI_NCSI_ETYPE", 0x1a04c, 0 }, + { "NCSI_RX_FIFO_CNT", 0x1a050, 0 }, + { "NCSI_RX_ERR_CNT", 0x1a054, 0 }, + { "NCSI_RX_OF_CNT", 0x1a058, 0 }, + { "NCSI_RX_MS_CNT", 0x1a05c, 0 }, + { "NCSI_RX_IE_CNT", 0x1a060, 0 }, + { "NCSI_MPS_DEMUX_CNT", 0x1a064, 0 }, + { "MPS2CIM_CNT", 16, 9 }, + { "MPS2BMC_CNT", 0, 9 }, + { "NCSI_CIM_DEMUX_CNT", 0x1a068, 0 }, + { "CIM2MPS_CNT", 16, 9 }, + { "CIM2BMC_CNT", 0, 9 }, + { "NCSI_TX_FIFO_CNT", 0x1a06c, 0 }, + { "NCSI_SE_CNT_CTL", 0x1a0b0, 0 }, + { "NCSI_SE_CNT_MPS", 0x1a0b4, 0 }, + { "NC2MPS_SOP_CNT", 24, 8 }, + { "NC2MPS_EOP_CNT", 16, 6 }, + { "MPS2NC_SOP_CNT", 8, 8 }, + { "MPS2NC_EOP_CNT", 0, 8 }, + { "NCSI_SE_CNT_CIM", 0x1a0b8, 0 }, + { "NC2CIM_SOP_CNT", 24, 8 }, + { "NC2CIM_EOP_CNT", 16, 6 }, + { "CIM2NC_SOP_CNT", 8, 8 }, + { "CIM2NC_EOP_CNT", 0, 8 }, + { "NCSI_BUS_DEBUG", 0x1a0bc, 0 }, + { "SOP_CNT_ERR", 12, 4 }, + { "BUS_STATE_MPS_OUT", 6, 2 }, + { "BUS_STATE_MPS_IN", 4, 2 }, + { "BUS_STATE_CIM_OUT", 2, 2 }, + { "BUS_STATE_CIM_IN", 0, 2 }, + { "NCSI_LA_RDPTR", 0x1a0c0, 0 }, + { "NCSI_LA_RDDATA", 0x1a0c4, 0 }, + { "NCSI_LA_WRPTR", 0x1a0c8, 0 }, + { "NCSI_LA_RESERVED", 0x1a0cc, 0 }, + { "NCSI_LA_CTL", 0x1a0d0, 0 }, + { "NCSI_INT_ENABLE", 0x1a0d4, 0 }, + { "CIM_DM_prty_err", 8, 1 }, + { "MPS_DM_prty_err", 7, 1 }, + { "token", 6, 1 }, + { "arb_done", 5, 1 }, + { "arb_started", 4, 1 }, + { "WOL", 3, 1 }, + { "MACInt", 2, 1 }, + { "TXFIFO_prty_err", 1, 1 }, + { "RXFIFO_prty_err", 0, 1 }, + { "NCSI_INT_CAUSE", 0x1a0d8, 0 }, + { "CIM_DM_prty_err", 8, 1 }, + { "MPS_DM_prty_err", 7, 1 }, + { "token", 6, 1 }, + { "arb_done", 5, 1 }, + { "arb_started", 4, 1 }, + { "WOL", 3, 1 }, + { "MACInt", 2, 1 }, + { "TXFIFO_prty_err", 1, 1 }, + { "RXFIFO_prty_err", 0, 1 }, + { "NCSI_STATUS", 0x1a0dc, 0 }, + { "Master", 1, 1 }, + { "arb_status", 0, 1 }, + { "NCSI_PAUSE_CTRL", 0x1a0e0, 0 }, + { "NCSI_PAUSE_TIMEOUT", 0x1a0e4, 0 }, + { "NCSI_PAUSE_WM", 0x1a0ec, 0 }, + { "PauseHWM", 16, 11 }, + { "PauseLWM", 0, 11 }, + { "NCSI_DEBUG", 0x1a0f0, 0 }, + { "NCSI_PERR_INJECT", 0x1a0f4, 0 }, + { "MemSel", 1, 1 }, + { "InjectDataErr", 0, 1 }, + { "NCSI_MACB_NETWORK_CTRL", 0x1a100, 0 }, + { "TxSndZeroPause", 12, 1 }, + { "TxSndPause", 11, 1 }, + { "TxStop", 10, 1 }, + { "TxStart", 9, 1 }, + { "BackPress", 8, 1 }, + { "StatWrEn", 7, 1 }, + { "IncrStat", 6, 1 }, + { "ClearStat", 5, 1 }, + { "EnMgmtPort", 4, 1 }, + { "TxEn", 3, 1 }, + { "RxEn", 2, 1 }, + { "LoopLocal", 1, 1 }, + { "LoopPHY", 0, 1 }, + { "NCSI_MACB_NETWORK_CFG", 0x1a104, 0 }, + { "PClkDiv128", 22, 1 }, + { "CopyPause", 21, 1 }, + { "NonStdPreOK", 20, 1 }, + { "NoFCS", 19, 1 }, + { "RxEnHalfDup", 18, 1 }, + { "NoCopyFCS", 17, 1 }, + { "LenChkEn", 16, 1 }, + { "RxBufOffset", 14, 2 }, + { "PauseEn", 13, 1 }, + { "RetryTest", 12, 1 }, + { "PClkDiv", 10, 2 }, + { "ExtClass", 9, 1 }, + { "En1536Frame", 8, 1 }, + { "UCastHashEn", 7, 1 }, + { "MCastHashEn", 6, 1 }, + { "RxBCastDis", 5, 1 }, + { "CopyAllFrames", 4, 1 }, + { "JumboEn", 3, 1 }, + { "SerEn", 2, 1 }, + { "FullDuplex", 1, 1 }, + { "Speed", 0, 1 }, + { "NCSI_MACB_NETWORK_STATUS", 0x1a108, 0 }, + { "PHYMgmtStatus", 2, 1 }, + { "MDIStatus", 1, 1 }, + { "LinkStatus", 0, 1 }, + { "NCSI_MACB_TX_STATUS", 0x1a114, 0 }, + { "UnderrunErr", 6, 1 }, + { "TxComplete", 5, 1 }, + { "BufferExhausted", 4, 1 }, + { "TxProgress", 3, 1 }, + { "RetryLimit", 2, 1 }, + { "ColEvent", 1, 1 }, + { "UsedBitRead", 0, 1 }, + { "NCSI_MACB_RX_BUF_QPTR", 0x1a118, 0 }, + { "RxBufQPtr", 2, 30 }, + { "NCSI_MACB_TX_BUF_QPTR", 0x1a11c, 0 }, + { "TxBufQPtr", 2, 30 }, + { "NCSI_MACB_RX_STATUS", 0x1a120, 0 }, + { "RxOverrunErr", 2, 1 }, + { "FrameRcvd", 1, 1 }, + { "NoRxBuf", 0, 1 }, + { "NCSI_MACB_INT_STATUS", 0x1a124, 0 }, + { "PauseTimeZero", 13, 1 }, + { "PauseRcvd", 12, 1 }, + { "HRespNotOK", 11, 1 }, + { "RxOverrun", 10, 1 }, + { "LinkChange", 9, 1 }, + { "TxComplete", 7, 1 }, + { "TxBufErr", 6, 1 }, + { "RetryLimitErr", 5, 1 }, + { "TxBufUnderrun", 4, 1 }, + { "TxUsedBitRead", 3, 1 }, + { "RxUsedBitRead", 2, 1 }, + { "RxComplete", 1, 1 }, + { "MgmtFrameSent", 0, 1 }, + { "NCSI_MACB_INT_EN", 0x1a128, 0 }, + { "PauseTimeZero", 13, 1 }, + { "PauseRcvd", 12, 1 }, + { "HRespNotOK", 11, 1 }, + { "RxOverrun", 10, 1 }, + { "LinkChange", 9, 1 }, + { "TxComplete", 7, 1 }, + { "TxBufErr", 6, 1 }, + { "RetryLimitErr", 5, 1 }, + { "TxBufUnderrun", 4, 1 }, + { "TxUsedBitRead", 3, 1 }, + { "RxUsedBitRead", 2, 1 }, + { "RxComplete", 1, 1 }, + { "MgmtFrameSent", 0, 1 }, + { "NCSI_MACB_INT_DIS", 0x1a12c, 0 }, + { "PauseTimeZero", 13, 1 }, + { "PauseRcvd", 12, 1 }, + { "HRespNotOK", 11, 1 }, + { "RxOverrun", 10, 1 }, + { "LinkChange", 9, 1 }, + { "TxComplete", 7, 1 }, + { "TxBufErr", 6, 1 }, + { "RetryLimitErr", 5, 1 }, + { "TxBufUnderrun", 4, 1 }, + { "TxUsedBitRead", 3, 1 }, + { "RxUsedBitRead", 2, 1 }, + { "RxComplete", 1, 1 }, + { "MgmtFrameSent", 0, 1 }, + { "NCSI_MACB_INT_MASK", 0x1a130, 0 }, + { "PauseTimeZero", 13, 1 }, + { "PauseRcvd", 12, 1 }, + { "HRespNotOK", 11, 1 }, + { "RxOverrun", 10, 1 }, + { "LinkChange", 9, 1 }, + { "TxComplete", 7, 1 }, + { "TxBufErr", 6, 1 }, + { "RetryLimitErr", 5, 1 }, + { "TxBufUnderrun", 4, 1 }, + { "TxUsedBitRead", 3, 1 }, + { "RxUsedBitRead", 2, 1 }, + { "RxComplete", 1, 1 }, + { "MgmtFrameSent", 0, 1 }, + { "NCSI_MACB_PAUSE_TIME", 0x1a138, 0 }, + { "NCSI_MACB_PAUSE_FRAMES_RCVD", 0x1a13c, 0 }, + { "NCSI_MACB_TX_FRAMES_OK", 0x1a140, 0 }, + { "NCSI_MACB_SINGLE_COL_FRAMES", 0x1a144, 0 }, + { "NCSI_MACB_MUL_COL_FRAMES", 0x1a148, 0 }, + { "NCSI_MACB_RX_FRAMES_OK", 0x1a14c, 0 }, + { "NCSI_MACB_FCS_ERR", 0x1a150, 0 }, + { "NCSI_MACB_ALIGN_ERR", 0x1a154, 0 }, + { "NCSI_MACB_DEF_TX_FRAMES", 0x1a158, 0 }, + { "NCSI_MACB_LATE_COL", 0x1a15c, 0 }, + { "NCSI_MACB_EXCESSIVE_COL", 0x1a160, 0 }, + { "NCSI_MACB_TX_UNDERRUN_ERR", 0x1a164, 0 }, + { "NCSI_MACB_CARRIER_SENSE_ERR", 0x1a168, 0 }, + { "NCSI_MACB_RX_RESOURCE_ERR", 0x1a16c, 0 }, + { "NCSI_MACB_RX_OVERRUN_ERR", 0x1a170, 0 }, + { "NCSI_MACB_RX_SYMBOL_ERR", 0x1a174, 0 }, + { "NCSI_MACB_RX_OVERSIZE_FRAME", 0x1a178, 0 }, + { "NCSI_MACB_RX_JABBER_ERR", 0x1a17c, 0 }, + { "NCSI_MACB_RX_UNDERSIZE_FRAME", 0x1a180, 0 }, + { "NCSI_MACB_SQE_TEST_ERR", 0x1a184, 0 }, + { "NCSI_MACB_LENGTH_ERR", 0x1a188, 0 }, + { "NCSI_MACB_TX_PAUSE_FRAMES", 0x1a18c, 0 }, + { "NCSI_MACB_HASH_LOW", 0x1a190, 0 }, + { "NCSI_MACB_HASH_HIGH", 0x1a194, 0 }, + { "NCSI_MACB_SPECIFIC_1_LOW", 0x1a198, 0 }, + { "NCSI_MACB_SPECIFIC_1_HIGH", 0x1a19c, 0 }, + { "NCSI_MACB_SPECIFIC_2_LOW", 0x1a1a0, 0 }, + { "NCSI_MACB_SPECIFIC_2_HIGH", 0x1a1a4, 0 }, + { "NCSI_MACB_SPECIFIC_3_LOW", 0x1a1a8, 0 }, + { "NCSI_MACB_SPECIFIC_3_HIGH", 0x1a1ac, 0 }, + { "NCSI_MACB_SPECIFIC_4_LOW", 0x1a1b0, 0 }, + { "NCSI_MACB_SPECIFIC_4_HIGH", 0x1a1b4, 0 }, + { "NCSI_MACB_TYPE_ID", 0x1a1b8, 0 }, + { "NCSI_MACB_TX_PAUSE_QUANTUM", 0x1a1bc, 0 }, + { "NCSI_MACB_USER_IO", 0x1a1c0, 0 }, + { "UserProgInput", 16, 16 }, + { "UserProgOutput", 0, 16 }, + { "NCSI_MACB_WOL_CFG", 0x1a1c4, 0 }, + { "MCHashEn", 19, 1 }, + { "Specific1En", 18, 1 }, + { "ARPEn", 17, 1 }, + { "MagicPktEn", 16, 1 }, + { "ARPIPAddr", 0, 16 }, + { "NCSI_MACB_REV_STATUS", 0x1a1fc, 0 }, + { "PartRef", 16, 16 }, + { "DesRev", 0, 16 }, + { NULL, 0, 0 } +}; + +struct reg_info t4_xgmac_regs[] = { + { "XGMAC_PORT_CFG", 0x21000, 0 }, + { "XGMII_Clk_Sel", 29, 3 }, + { "SinkTx", 27, 1 }, + { "SinkTxOnLinkDown", 26, 1 }, + { "xg2g_speed_mode", 25, 1 }, + { "LoopNoFwd", 24, 1 }, + { "XGM_Tx_pause_size", 23, 1 }, + { "XGM_Tx_pause_frame", 22, 1 }, + { "XGM_Tx_Disable_Pre", 21, 1 }, + { "XGM_Tx_Disable_Crc", 20, 1 }, + { "Smux_Rx_Loop", 19, 1 }, + { "Rx_Lane_Swap", 18, 1 }, + { "Tx_Lane_Swap", 17, 1 }, + { "Signal_Det", 14, 1 }, + { "Pmux_Rx_Loop", 13, 1 }, + { "Pmux_Tx_Loop", 12, 1 }, + { "XGM_Rx_Sel", 10, 2 }, + { "PCS_Tx_Sel", 8, 2 }, + { "XAUI20_Rem_Pre", 5, 1 }, + { "XAUI20_XGMII_Sel", 4, 1 }, + { "Rx_Byte_Swap", 3, 1 }, + { "Tx_Byte_Swap", 2, 1 }, + { "Port_Sel", 0, 1 }, + { "XGMAC_PORT_RESET_CTRL", 0x21004, 0 }, + { "AuxExt_Reset", 10, 1 }, + { "TXFIFO_Reset", 9, 1 }, + { "RXFIFO_Reset", 8, 1 }, + { "BEAN_Reset", 7, 1 }, + { "XAUI_Reset", 6, 1 }, + { "AE_Reset", 5, 1 }, + { "XGM_Reset", 4, 1 }, + { "XG2G_Reset", 3, 1 }, + { "WOL_Reset", 2, 1 }, + { "XFI_PCS_Reset", 1, 1 }, + { "HSS_Reset", 0, 1 }, + { "XGMAC_PORT_LED_CFG", 0x21008, 0 }, + { "Led1_Cfg", 5, 3 }, + { "Led1_Polarity_Inv", 4, 1 }, + { "Led0_Cfg", 1, 3 }, + { "Led0_Polarity_Inv", 0, 1 }, + { "XGMAC_PORT_LED_COUNTHI", 0x2100c, 0 }, + { "XGMAC_PORT_LED_COUNTLO", 0x21010, 0 }, + { "XGMAC_PORT_DEBUG_CFG", 0x21014, 0 }, + { "XGMAC_PORT_CFG2", 0x21018, 0 }, + { "Rx_Polarity_Inv", 28, 4 }, + { "Tx_Polarity_Inv", 24, 4 }, + { "InstanceNum", 22, 2 }, + { "StopOnPerr", 21, 1 }, + { "MACTxEn", 20, 1 }, + { "MACRxEn", 19, 1 }, + { "PatEn", 18, 1 }, + { "MagicEn", 17, 1 }, + { "TX_IPG", 4, 13 }, + { "AEC_PMA_TX_READY", 1, 1 }, + { "AEC_PMA_RX_READY", 0, 1 }, + { "XGMAC_PORT_PKT_COUNT", 0x2101c, 0 }, + { "tx_sop_count", 24, 8 }, + { "tx_eop_count", 16, 8 }, + { "rx_sop_count", 8, 8 }, + { "rx_eop_count", 0, 8 }, + { "XGMAC_PORT_PERR_INJECT", 0x21020, 0 }, + { "MemSel", 1, 1 }, + { "InjectDataErr", 0, 1 }, + { "XGMAC_PORT_MAGIC_MACID_LO", 0x21024, 0 }, + { "XGMAC_PORT_MAGIC_MACID_HI", 0x21028, 0 }, + { "XGMAC_PORT_BUILD_REVISION", 0x2102c, 0 }, + { "XGMAC_PORT_XGMII_SE_COUNT", 0x21030, 0 }, + { "TxSop", 24, 8 }, + { "TxEop", 16, 8 }, + { "RxSop", 8, 8 }, + { "RxEop", 0, 8 }, + { "XGMAC_PORT_LINK_STATUS", 0x21034, 0 }, + { "remflt", 3, 1 }, + { "locflt", 2, 1 }, + { "linkup", 1, 1 }, + { "linkdn", 0, 1 }, + { "XGMAC_PORT_CHECKIN", 0x21038, 0 }, + { "Preamble", 1, 1 }, + { "CheckIn", 0, 1 }, + { "XGMAC_PORT_FAULT_TEST", 0x2103c, 0 }, + { "FltType", 1, 1 }, + { "FltCtrl", 0, 1 }, + { "XGMAC_PORT_SPARE", 0x21040, 0 }, + { "XGMAC_PORT_HSS_SIGDET_STATUS", 0x21044, 0 }, + { "XGMAC_PORT_EXT_LOS_STATUS", 0x21048, 0 }, + { "XGMAC_PORT_EXT_LOS_CTRL", 0x2104c, 0 }, + { "XGMAC_PORT_FPGA_PAUSE_CTL", 0x21050, 0 }, + { "CTL", 31, 1 }, + { "HWM", 13, 13 }, + { "LWM", 0, 13 }, + { "XGMAC_PORT_FPGA_ERRPKT_CNT", 0x21054, 0 }, + { "XGMAC_PORT_LA_TX_0", 0x21058, 0 }, + { "XGMAC_PORT_LA_RX_0", 0x2105c, 0 }, + { "XGMAC_PORT_FPGA_LA_CTL", 0x21060, 0 }, + { "rxrst", 5, 1 }, + { "txrst", 4, 1 }, + { "xgmii", 3, 1 }, + { "pause", 2, 1 }, + { "stopErr", 1, 1 }, + { "stop", 0, 1 }, + { "XGMAC_PORT_EPIO_DATA0", 0x210c0, 0 }, + { "XGMAC_PORT_EPIO_DATA1", 0x210c4, 0 }, + { "XGMAC_PORT_EPIO_DATA2", 0x210c8, 0 }, + { "XGMAC_PORT_EPIO_DATA3", 0x210cc, 0 }, + { "XGMAC_PORT_EPIO_OP", 0x210d0, 0 }, + { "Busy", 31, 1 }, + { "Write", 8, 1 }, + { "Address", 0, 8 }, + { "XGMAC_PORT_WOL_STATUS", 0x210d4, 0 }, + { "MagicDetected", 31, 1 }, + { "PatDetected", 30, 1 }, + { "ClearMagic", 4, 1 }, + { "ClearMatch", 3, 1 }, + { "MatchedFilter", 0, 3 }, + { "XGMAC_PORT_INT_EN", 0x210d8, 0 }, + { "ext_los", 28, 1 }, + { "incmptbl_link", 27, 1 }, + { "PatDetWake", 26, 1 }, + { "MagicWake", 25, 1 }, + { "SigDetChg", 24, 1 }, + { "PCSR_fec_corr", 23, 1 }, + { "AE_Train_Local", 22, 1 }, + { "HSSPLL_LOCK", 21, 1 }, + { "HSSPRT_READY", 20, 1 }, + { "AutoNeg_Done", 19, 1 }, + { "PCSR_Hi_BER", 18, 1 }, + { "PCSR_FEC_Error", 17, 1 }, + { "PCSR_Link_Fail", 16, 1 }, + { "XAUI_Dec_Error", 15, 1 }, + { "XAUI_Link_Fail", 14, 1 }, + { "PCS_CTC_Error", 13, 1 }, + { "PCS_Link_Good", 12, 1 }, + { "PCS_Link_Fail", 11, 1 }, + { "RxFifoOverFlow", 10, 1 }, + { "HSSPRBSErr", 9, 1 }, + { "HSSEyeQual", 8, 1 }, + { "RemoteFault", 7, 1 }, + { "LocalFault", 6, 1 }, + { "MAC_Link_Down", 5, 1 }, + { "MAC_Link_Up", 4, 1 }, + { "BEAN_Int", 3, 1 }, + { "XGM_Int", 2, 1 }, + { "TxFifo_prty_err", 1, 1 }, + { "RxFifo_prty_err", 0, 1 }, + { "XGMAC_PORT_INT_CAUSE", 0x210dc, 0 }, + { "ext_los", 28, 1 }, + { "incmptbl_link", 27, 1 }, + { "PatDetWake", 26, 1 }, + { "MagicWake", 25, 1 }, + { "SigDetChg", 24, 1 }, + { "PCSR_fec_corr", 23, 1 }, + { "AE_Train_Local", 22, 1 }, + { "HSSPLL_LOCK", 21, 1 }, + { "HSSPRT_READY", 20, 1 }, + { "AutoNeg_Done", 19, 1 }, + { "PCSR_Hi_BER", 18, 1 }, + { "PCSR_FEC_Error", 17, 1 }, + { "PCSR_Link_Fail", 16, 1 }, + { "XAUI_Dec_Error", 15, 1 }, + { "XAUI_Link_Fail", 14, 1 }, + { "PCS_CTC_Error", 13, 1 }, + { "PCS_Link_Good", 12, 1 }, + { "PCS_Link_Fail", 11, 1 }, + { "RxFifoOverFlow", 10, 1 }, + { "HSSPRBSErr", 9, 1 }, + { "HSSEyeQual", 8, 1 }, + { "RemoteFault", 7, 1 }, + { "LocalFault", 6, 1 }, + { "MAC_Link_Down", 5, 1 }, + { "MAC_Link_Up", 4, 1 }, + { "BEAN_Int", 3, 1 }, + { "XGM_Int", 2, 1 }, + { "TxFifo_prty_err", 1, 1 }, + { "RxFifo_prty_err", 0, 1 }, + { "XGMAC_PORT_HSS_CFG0", 0x210e0, 0 }, + { "TXDTS", 31, 1 }, + { "TXCTS", 30, 1 }, + { "TXBTS", 29, 1 }, + { "TXATS", 28, 1 }, + { "TXDOBS", 27, 1 }, + { "TXCOBS", 26, 1 }, + { "TXBOBS", 25, 1 }, + { "TXAOBS", 24, 1 }, + { "HSSREFCLKSEL", 20, 1 }, + { "HSSAVDHI", 17, 1 }, + { "HSSRXTS", 16, 1 }, + { "HSSTXACMODE", 15, 1 }, + { "HSSRXACMODE", 14, 1 }, + { "HSSRESYNC", 13, 1 }, + { "HSSRECCAL", 12, 1 }, + { "HSSPDWNPLL", 11, 1 }, + { "HSSDIVSEL", 9, 2 }, + { "HSSREFDIV", 8, 1 }, + { "HSSPLLBYP", 7, 1 }, + { "HSSLOFREQPLL", 6, 1 }, + { "HSSLOFREQ2PLL", 5, 1 }, + { "HSSEXTC16SEL", 4, 1 }, + { "HSSRSTCONFIG", 1, 3 }, + { "HSSPRBSEN", 0, 1 }, + { "XGMAC_PORT_HSS_CFG1", 0x210e4, 0 }, + { "RXDPRBSRST", 28, 1 }, + { "RXDPRBSEN", 27, 1 }, + { "RXDPRBSFRCERR", 26, 1 }, + { "TXDPRBSRST", 25, 1 }, + { "TXDPRBSEN", 24, 1 }, + { "RXCPRBSRST", 20, 1 }, + { "RXCPRBSEN", 19, 1 }, + { "RXCPRBSFRCERR", 18, 1 }, + { "TXCPRBSRST", 17, 1 }, + { "TXCPRBSEN", 16, 1 }, + { "RXBPRBSRST", 12, 1 }, + { "RXBPRBSEN", 11, 1 }, + { "RXBPRBSFRCERR", 10, 1 }, + { "TXBPRBSRST", 9, 1 }, + { "TXBPRBSEN", 8, 1 }, + { "RXAPRBSRST", 4, 1 }, + { "RXAPRBSEN", 3, 1 }, + { "RXAPRBSFRCERR", 2, 1 }, + { "TXAPRBSRST", 1, 1 }, + { "TXAPRBSEN", 0, 1 }, + { "XGMAC_PORT_HSS_CFG2", 0x210e8, 0 }, + { "RXDDATASYNC", 23, 1 }, + { "RXCDATASYNC", 22, 1 }, + { "RXBDATASYNC", 21, 1 }, + { "RXADATASYNC", 20, 1 }, + { "RXDEARLYIN", 19, 1 }, + { "RXDLATEIN", 18, 1 }, + { "RXDPHSLOCK", 17, 1 }, + { "RXDPHSDNIN", 16, 1 }, + { "RXDPHSUPIN", 15, 1 }, + { "RXCEARLYIN", 14, 1 }, + { "RXCLATEIN", 13, 1 }, + { "RXCPHSLOCK", 12, 1 }, + { "RXCPHSDNIN", 11, 1 }, + { "RXCPHSUPIN", 10, 1 }, + { "RXBEARLYIN", 9, 1 }, + { "RXBLATEIN", 8, 1 }, + { "RXBPHSLOCK", 7, 1 }, + { "RXBPHSDNIN", 6, 1 }, + { "RXBPHSUPIN", 5, 1 }, + { "RXAEARLYIN", 4, 1 }, + { "RXALATEIN", 3, 1 }, + { "RXAPHSLOCK", 2, 1 }, + { "RXAPHSDNIN", 1, 1 }, + { "RXAPHSUPIN", 0, 1 }, + { "XGMAC_PORT_HSS_STATUS", 0x210ec, 0 }, + { "RXDPRBSSYNC", 15, 1 }, + { "RXCPRBSSYNC", 14, 1 }, + { "RXBPRBSSYNC", 13, 1 }, + { "RXAPRBSSYNC", 12, 1 }, + { "RXDPRBSERR", 11, 1 }, + { "RXCPRBSERR", 10, 1 }, + { "RXBPRBSERR", 9, 1 }, + { "RXAPRBSERR", 8, 1 }, + { "RXDSIGDET", 7, 1 }, + { "RXCSIGDET", 6, 1 }, + { "RXBSIGDET", 5, 1 }, + { "RXASIGDET", 4, 1 }, + { "HSSPLLLOCK", 1, 1 }, + { "HSSPRTREADY", 0, 1 }, + { "XGMAC_PORT_XGM_TX_CTRL", 0x21200, 0 }, + { "SendPause", 2, 1 }, + { "SendZeroPause", 1, 1 }, + { "TxEn", 0, 1 }, + { "XGMAC_PORT_XGM_TX_CFG", 0x21204, 0 }, + { "CRCCal", 8, 2 }, + { "DisDefIdleCnt", 7, 1 }, + { "DecAvgTxIPG", 6, 1 }, + { "UnidirTxEn", 5, 1 }, + { "CfgClkSpeed", 2, 3 }, + { "StretchMode", 1, 1 }, + { "TxPauseEn", 0, 1 }, + { "XGMAC_PORT_XGM_TX_PAUSE_QUANTA", 0x21208, 0 }, + { "XGMAC_PORT_XGM_RX_CTRL", 0x2120c, 0 }, + { "XGMAC_PORT_XGM_RX_CFG", 0x21210, 0 }, + { "CRCCal", 16, 2 }, + { "LocalFault", 15, 1 }, + { "RemoteFault", 14, 1 }, + { "LenErrFrameDis", 13, 1 }, + { "Con802_3Preamble", 12, 1 }, + { "EnNon802_3Preamble", 11, 1 }, + { "CopyPreamble", 10, 1 }, + { "DisPauseFrames", 9, 1 }, + { "En1536BFrames", 8, 1 }, + { "EnJumbo", 7, 1 }, + { "RmFCS", 6, 1 }, + { "DisNonVlan", 5, 1 }, + { "EnExtMatch", 4, 1 }, + { "EnHashUcast", 3, 1 }, + { "EnHashMcast", 2, 1 }, + { "DisBCast", 1, 1 }, + { "CopyAllFrames", 0, 1 }, + { "XGMAC_PORT_XGM_RX_HASH_LOW", 0x21214, 0 }, + { "XGMAC_PORT_XGM_RX_HASH_HIGH", 0x21218, 0 }, + { "XGMAC_PORT_XGM_RX_EXACT_MATCH_LOW_1", 0x2121c, 0 }, + { "XGMAC_PORT_XGM_RX_EXACT_MATCH_HIGH_1", 0x21220, 0 }, + { "XGMAC_PORT_XGM_RX_EXACT_MATCH_LOW_2", 0x21224, 0 }, + { "XGMAC_PORT_XGM_RX_EXACT_MATCH_HIGH_2", 0x21228, 0 }, + { "XGMAC_PORT_XGM_RX_EXACT_MATCH_LOW_3", 0x2122c, 0 }, + { "XGMAC_PORT_XGM_RX_EXACT_MATCH_HIGH_3", 0x21230, 0 }, + { "XGMAC_PORT_XGM_RX_EXACT_MATCH_LOW_4", 0x21234, 0 }, + { "XGMAC_PORT_XGM_RX_EXACT_MATCH_HIGH_4", 0x21238, 0 }, + { "XGMAC_PORT_XGM_RX_EXACT_MATCH_LOW_5", 0x2123c, 0 }, + { "XGMAC_PORT_XGM_RX_EXACT_MATCH_HIGH_5", 0x21240, 0 }, + { "XGMAC_PORT_XGM_RX_EXACT_MATCH_LOW_6", 0x21244, 0 }, + { "XGMAC_PORT_XGM_RX_EXACT_MATCH_HIGH_6", 0x21248, 0 }, + { "XGMAC_PORT_XGM_RX_EXACT_MATCH_LOW_7", 0x2124c, 0 }, + { "XGMAC_PORT_XGM_RX_EXACT_MATCH_HIGH_7", 0x21250, 0 }, + { "XGMAC_PORT_XGM_RX_EXACT_MATCH_LOW_8", 0x21254, 0 }, + { "XGMAC_PORT_XGM_RX_EXACT_MATCH_HIGH_8", 0x21258, 0 }, + { "XGMAC_PORT_XGM_RX_TYPE_MATCH_1", 0x2125c, 0 }, + { "EnTypeMatch", 31, 1 }, + { "type", 0, 16 }, + { "XGMAC_PORT_XGM_RX_TYPE_MATCH_2", 0x21260, 0 }, + { "EnTypeMatch", 31, 1 }, + { "type", 0, 16 }, + { "XGMAC_PORT_XGM_RX_TYPE_MATCH_3", 0x21264, 0 }, + { "EnTypeMatch", 31, 1 }, + { "type", 0, 16 }, + { "XGMAC_PORT_XGM_RX_TYPE_MATCH_4", 0x21268, 0 }, + { "EnTypeMatch", 31, 1 }, + { "type", 0, 16 }, + { "XGMAC_PORT_XGM_INT_STATUS", 0x2126c, 0 }, + { "XGMIIExtInt", 10, 1 }, + { "LinkFaultChange", 9, 1 }, + { "PhyFrameComplete", 8, 1 }, + { "PauseFrameTxmt", 7, 1 }, + { "PauseCntrTimeOut", 6, 1 }, + { "Non0PauseRcvd", 5, 1 }, + { "StatOFlow", 4, 1 }, + { "TxErrFIFO", 3, 1 }, + { "TxUFlow", 2, 1 }, + { "FrameTxmt", 1, 1 }, + { "FrameRcvd", 0, 1 }, + { "XGMAC_PORT_XGM_INT_MASK", 0x21270, 0 }, + { "XGMIIExtInt", 10, 1 }, + { "LinkFaultChange", 9, 1 }, + { "PhyFrameComplete", 8, 1 }, + { "PauseFrameTxmt", 7, 1 }, + { "PauseCntrTimeOut", 6, 1 }, + { "Non0PauseRcvd", 5, 1 }, + { "StatOFlow", 4, 1 }, + { "TxErrFIFO", 3, 1 }, + { "TxUFlow", 2, 1 }, + { "FrameTxmt", 1, 1 }, + { "FrameRcvd", 0, 1 }, + { "XGMAC_PORT_XGM_INT_EN", 0x21274, 0 }, + { "XGMIIExtInt", 10, 1 }, + { "LinkFaultChange", 9, 1 }, + { "PhyFrameComplete", 8, 1 }, + { "PauseFrameTxmt", 7, 1 }, + { "PauseCntrTimeOut", 6, 1 }, + { "Non0PauseRcvd", 5, 1 }, + { "StatOFlow", 4, 1 }, + { "TxErrFIFO", 3, 1 }, + { "TxUFlow", 2, 1 }, + { "FrameTxmt", 1, 1 }, + { "FrameRcvd", 0, 1 }, + { "XGMAC_PORT_XGM_INT_DISABLE", 0x21278, 0 }, + { "XGMIIExtInt", 10, 1 }, + { "LinkFaultChange", 9, 1 }, + { "PhyFrameComplete", 8, 1 }, + { "PauseFrameTxmt", 7, 1 }, + { "PauseCntrTimeOut", 6, 1 }, + { "Non0PauseRcvd", 5, 1 }, + { "StatOFlow", 4, 1 }, + { "TxErrFIFO", 3, 1 }, + { "TxUFlow", 2, 1 }, + { "FrameTxmt", 1, 1 }, + { "FrameRcvd", 0, 1 }, + { "XGMAC_PORT_XGM_TX_PAUSE_TIMER", 0x2127c, 0 }, + { "XGMAC_PORT_XGM_STAT_CTRL", 0x21280, 0 }, + { "ReadSnpShot", 4, 1 }, + { "TakeSnpShot", 3, 1 }, + { "ClrStats", 2, 1 }, + { "IncrStats", 1, 1 }, + { "EnTestModeWr", 0, 1 }, + { "XGMAC_PORT_XGM_MDIO_CTRL", 0x21284, 0 }, + { "FrameType", 30, 2 }, + { "Operation", 28, 2 }, + { "PortAddr", 23, 5 }, + { "DevAddr", 18, 5 }, + { "Resrv", 16, 2 }, + { "Data", 0, 16 }, + { "XGMAC_PORT_XGM_MODULE_ID", 0x212fc, 0 }, + { "ModuleID", 16, 16 }, + { "ModuleRev", 0, 16 }, + { "XGMAC_PORT_XGM_STAT_TX_BYTE_LOW", 0x21300, 0 }, + { "XGMAC_PORT_XGM_STAT_TX_BYTE_HIGH", 0x21304, 0 }, + { "XGMAC_PORT_XGM_STAT_TX_FRAME_LOW", 0x21308, 0 }, + { "XGMAC_PORT_XGM_STAT_TX_FRAME_HIGH", 0x2130c, 0 }, + { "XGMAC_PORT_XGM_STAT_TX_BCAST", 0x21310, 0 }, + { "XGMAC_PORT_XGM_STAT_TX_MCAST", 0x21314, 0 }, + { "XGMAC_PORT_XGM_STAT_TX_PAUSE", 0x21318, 0 }, + { "XGMAC_PORT_XGM_STAT_TX_64B_FRAMES", 0x2131c, 0 }, + { "XGMAC_PORT_XGM_STAT_TX_65_127B_FRAMES", 0x21320, 0 }, + { "XGMAC_PORT_XGM_STAT_TX_128_255B_FRAMES", 0x21324, 0 }, + { "XGMAC_PORT_XGM_STAT_TX_256_511B_FRAMES", 0x21328, 0 }, + { "XGMAC_PORT_XGM_STAT_TX_512_1023B_FRAMES", 0x2132c, 0 }, + { "XGMAC_PORT_XGM_STAT_TX_1024_1518B_FRAMES", 0x21330, 0 }, + { "XGMAC_PORT_XGM_STAT_TX_1519_MAXB_FRAMES", 0x21334, 0 }, + { "XGMAC_PORT_XGM_STAT_TX_ERR_FRAMES", 0x21338, 0 }, + { "XGMAC_PORT_XGM_STAT_RX_BYTES_LOW", 0x2133c, 0 }, + { "XGMAC_PORT_XGM_STAT_RX_BYTES_HIGH", 0x21340, 0 }, + { "XGMAC_PORT_XGM_STAT_RX_FRAMES_LOW", 0x21344, 0 }, + { "XGMAC_PORT_XGM_STAT_RX_FRAMES_HIGH", 0x21348, 0 }, + { "XGMAC_PORT_XGM_STAT_RX_BCAST_FRAMES", 0x2134c, 0 }, + { "XGMAC_PORT_XGM_STAT_RX_MCAST_FRAMES", 0x21350, 0 }, + { "XGMAC_PORT_XGM_STAT_RX_PAUSE_FRAMES", 0x21354, 0 }, + { "XGMAC_PORT_XGM_STAT_RX_64B_FRAMES", 0x21358, 0 }, + { "XGMAC_PORT_XGM_STAT_RX_65_127B_FRAMES", 0x2135c, 0 }, + { "XGMAC_PORT_XGM_STAT_RX_128_255B_FRAMES", 0x21360, 0 }, + { "XGMAC_PORT_XGM_STAT_RX_256_511B_FRAMES", 0x21364, 0 }, + { "XGMAC_PORT_XGM_STAT_RX_512_1023B_FRAMES", 0x21368, 0 }, + { "XGMAC_PORT_XGM_STAT_RX_1024_1518B_FRAMES", 0x2136c, 0 }, + { "XGMAC_PORT_XGM_STAT_RX_1519_MAXB_FRAMES", 0x21370, 0 }, + { "XGMAC_PORT_XGM_STAT_RX_SHORT_FRAMES", 0x21374, 0 }, + { "XGMAC_PORT_XGM_STAT_RX_OVERSIZE_FRAMES", 0x21378, 0 }, + { "XGMAC_PORT_XGM_STAT_RX_JABBER_FRAMES", 0x2137c, 0 }, + { "XGMAC_PORT_XGM_STAT_RX_CRC_ERR_FRAMES", 0x21380, 0 }, + { "XGMAC_PORT_XGM_STAT_RX_LENGTH_ERR_FRAMES", 0x21384, 0 }, + { "XGMAC_PORT_XGM_STAT_RX_SYM_CODE_ERR_FRAMES", 0x21388, 0 }, + { "XGMAC_PORT_XAUI_CTRL", 0x21400, 0 }, + { "polarity_inv_rx", 8, 4 }, + { "polarity_inv_tx", 4, 4 }, + { "test_sel", 2, 2 }, + { "test_en", 0, 1 }, + { "XGMAC_PORT_XAUI_STATUS", 0x21404, 0 }, + { "Decode_Error", 12, 8 }, + { "Lane3_CTC_Status", 11, 1 }, + { "Lane2_CTC_Status", 10, 1 }, + { "Lane1_CTC_Status", 9, 1 }, + { "Lane0_CTC_Status", 8, 1 }, + { "Align_Status", 4, 1 }, + { "Lane3_Sync_Status", 3, 1 }, + { "Lane2_Sync_Status", 2, 1 }, + { "Lane1_Sync_Status", 1, 1 }, + { "Lane0_Sync_Status", 0, 1 }, + { "XGMAC_PORT_PCSR_CTRL", 0x21500, 0 }, + { "rx_clk_speed", 7, 1 }, + { "ScrBypass", 6, 1 }, + { "FECErrIndEn", 5, 1 }, + { "FECEn", 4, 1 }, + { "TestSel", 2, 2 }, + { "ScrLoopEn", 1, 1 }, + { "XGMIILoopEn", 0, 1 }, + { "XGMAC_PORT_PCSR_TXTEST_CTRL", 0x21510, 0 }, + { "tx_prbs9_en", 4, 1 }, + { "tx_prbs31_en", 3, 1 }, + { "tx_tst_dat_sel", 2, 1 }, + { "tx_tst_sel", 1, 1 }, + { "tx_tst_en", 0, 1 }, + { "XGMAC_PORT_PCSR_TXTEST_SEEDA_LOWER", 0x21514, 0 }, + { "XGMAC_PORT_PCSR_TXTEST_SEEDA_UPPER", 0x21518, 0 }, + { "XGMAC_PORT_PCSR_TXTEST_SEEDB_LOWER", 0x2152c, 0 }, + { "XGMAC_PORT_PCSR_TXTEST_SEEDB_UPPER", 0x21530, 0 }, + { "XGMAC_PORT_PCSR_RXTEST_CTRL", 0x2153c, 0 }, + { "tpter_cnt_rst", 7, 1 }, + { "test_cnt_125us", 6, 1 }, + { "test_cnt_pre", 5, 1 }, + { "ber_cnt_rst", 4, 1 }, + { "err_blk_cnt_rst", 3, 1 }, + { "rx_prbs31_en", 2, 1 }, + { "rx_tst_dat_sel", 1, 1 }, + { "rx_tst_en", 0, 1 }, + { "XGMAC_PORT_PCSR_STATUS", 0x21550, 0 }, + { "err_blk_cnt", 16, 8 }, + { "ber_count", 8, 6 }, + { "hi_ber", 2, 1 }, + { "rx_fault", 1, 1 }, + { "tx_fault", 0, 1 }, + { "XGMAC_PORT_PCSR_TEST_STATUS", 0x21554, 0 }, + { "XGMAC_PORT_AN_CONTROL", 0x21600, 0 }, + { "soft_reset", 15, 1 }, + { "an_enable", 12, 1 }, + { "restart_an", 9, 1 }, + { "XGMAC_PORT_AN_STATUS", 0x21604, 0 }, + { "Noncer_Match", 31, 1 }, + { "Parallel_Det_Fault", 9, 1 }, + { "Page_Received", 6, 1 }, + { "AN_Complete", 5, 1 }, + { "Remote_Fault", 4, 1 }, + { "AN_Ability", 3, 1 }, + { "link_status", 2, 1 }, + { "partner_an_ability", 0, 1 }, + { "XGMAC_PORT_AN_ADVERTISEMENT", 0x21608, 0 }, + { "FEC_Enable", 31, 1 }, + { "FEC_Ability", 30, 1 }, + { "10GBASE_KR_Capable", 23, 1 }, + { "10GBASE_KX4_Capable", 22, 1 }, + { "1000BASE_KX_Capable", 21, 1 }, + { "Transmitted_Nonce", 16, 5 }, + { "NP", 15, 1 }, + { "ACK", 14, 1 }, + { "Remote_Fault", 13, 1 }, + { "ASM_DIR", 11, 1 }, + { "Pause", 10, 1 }, + { "Echoed_Nonce", 5, 5 }, + { "XGMAC_PORT_AN_LINK_PARTNER_ABILITY", 0x2160c, 0 }, + { "FEC_Enable", 31, 1 }, + { "FEC_Ability", 30, 1 }, + { "10GBASE_KR_Capable", 23, 1 }, + { "10GBASE_KX4_Capable", 22, 1 }, + { "1000BASE_KX_Capable", 21, 1 }, + { "Transmitted_Nonce", 16, 5 }, + { "NP", 15, 1 }, + { "ACK", 14, 1 }, + { "Remote_Fault", 13, 1 }, + { "ASM_DIR", 11, 1 }, + { "Pause", 10, 1 }, + { "Echoed_Nonce", 5, 5 }, + { "Selector_Field", 0, 5 }, + { "XGMAC_PORT_AN_NP_LOWER_TRANSMIT", 0x21610, 0 }, + { "NP_Info", 16, 16 }, + { "NP_Indication", 15, 1 }, + { "Message_Page", 13, 1 }, + { "ACK_2", 12, 1 }, + { "Toggle", 11, 1 }, + { "XGMAC_PORT_AN_NP_UPPER_TRANSMIT", 0x21614, 0 }, + { "XGMAC_PORT_AN_LP_NP_LOWER", 0x21618, 0 }, + { "XGMAC_PORT_AN_LP_NP_UPPER", 0x2161c, 0 }, + { "XGMAC_PORT_AN_BACKPLANE_ETHERNET_STATUS", 0x21624, 0 }, + { "TX_Pause_Okay", 6, 1 }, + { "RX_Pause_Okay", 5, 1 }, + { "10GBASE_KR_FEC_neg", 4, 1 }, + { "10GBASE_KR_neg", 3, 1 }, + { "10GBASE_KX4_neg", 2, 1 }, + { "1000BASE_KX_neg", 1, 1 }, + { "BP_AN_Ability", 0, 1 }, + { "XGMAC_PORT_AN_TX_NONCE_CONTROL", 0x21628, 0 }, + { "Bypass_LFSR", 15, 1 }, + { "LFSR_Init", 0, 15 }, + { "XGMAC_PORT_AN_INTERRUPT_STATUS", 0x2162c, 0 }, + { "NP_From_LP", 3, 1 }, + { "Parallel_Det_Fault", 2, 1 }, + { "BP_From_LP", 1, 1 }, + { "PCS_AN_Complete", 0, 1 }, + { "XGMAC_PORT_AN_GENERIC_TIMER_TIMEOUT", 0x21630, 0 }, + { "XGMAC_PORT_AN_BREAK_LINK_TIMEOUT", 0x21634, 0 }, + { "XGMAC_PORT_AN_MODULE_ID", 0x2163c, 0 }, + { "Module_ID", 16, 16 }, + { "Module_Revision", 0, 16 }, + { "XGMAC_PORT_AE_RX_COEF_REQ", 0x21700, 0 }, + { "RXREQ_CPRE", 13, 1 }, + { "RXREQ_CINIT", 12, 1 }, + { "RXREQ_C0", 4, 2 }, + { "RXREQ_C1", 2, 2 }, + { "RXREQ_C2", 0, 2 }, + { "XGMAC_PORT_AE_RX_COEF_STAT", 0x21704, 0 }, + { "RXSTAT_RDY", 15, 1 }, + { "RXSTAT_C0", 4, 2 }, + { "RXSTAT_C1", 2, 2 }, + { "RXSTAT_C2", 0, 2 }, + { "XGMAC_PORT_AE_TX_COEF_REQ", 0x21708, 0 }, + { "TXREQ_CPRE", 13, 1 }, + { "TXREQ_CINIT", 12, 1 }, + { "TXREQ_C0", 4, 2 }, + { "TXREQ_C1", 2, 2 }, + { "TXREQ_C2", 0, 2 }, + { "XGMAC_PORT_AE_TX_COEF_STAT", 0x2170c, 0 }, + { "TXSTAT_RDY", 15, 1 }, + { "TXSTAT_C0", 4, 2 }, + { "TXSTAT_C1", 2, 2 }, + { "TXSTAT_C2", 0, 2 }, + { "XGMAC_PORT_AE_REG_MODE", 0x21710, 0 }, + { "MAN_DEC", 4, 2 }, + { "MANUAL_RDY", 3, 1 }, + { "MWT_DISABLE", 2, 1 }, + { "MDIO_OVR", 1, 1 }, + { "STICKY_MODE", 0, 1 }, + { "XGMAC_PORT_AE_PRBS_CTL", 0x21714, 0 }, + { "PRBS_CHK_ERRCNT", 8, 8 }, + { "PRBS_SYNCCNT", 5, 3 }, + { "PRBS_CHK_SYNC", 4, 1 }, + { "PRBS_CHK_RST", 3, 1 }, + { "PRBS_CHK_OFF", 2, 1 }, + { "PRBS_GEN_FRCERR", 1, 1 }, + { "PRBS_GEN_OFF", 0, 1 }, + { "XGMAC_PORT_AE_FSM_CTL", 0x21718, 0 }, + { "FSM_TR_LCL", 14, 1 }, + { "FSM_GDMRK", 11, 3 }, + { "FSM_BADMRK", 8, 3 }, + { "FSM_TR_FAIL", 7, 1 }, + { "FSM_TR_ACT", 6, 1 }, + { "FSM_FRM_LCK", 5, 1 }, + { "FSM_TR_COMP", 4, 1 }, + { "MC_RX_RDY", 3, 1 }, + { "FSM_CU_DIS", 2, 1 }, + { "FSM_TR_RST", 1, 1 }, + { "FSM_TR_EN", 0, 1 }, + { "XGMAC_PORT_AE_FSM_STATE", 0x2171c, 0 }, + { "CC2FSM_STATE", 13, 3 }, + { "CC1FSM_STATE", 10, 3 }, + { "CC0FSM_STATE", 7, 3 }, + { "FLFSM_STATE", 4, 3 }, + { "TFSM_STATE", 0, 3 }, + { "XGMAC_PORT_AE_TX_DIS", 0x21780, 0 }, + { "XGMAC_PORT_AE_KR_CTRL", 0x21784, 0 }, + { "Training_Enable", 1, 1 }, + { "Restart_Training", 0, 1 }, + { "XGMAC_PORT_AE_RX_SIGDET", 0x21788, 0 }, + { "XGMAC_PORT_AE_KR_STATUS", 0x2178c, 0 }, + { "Training_Failure", 3, 1 }, + { "Training", 2, 1 }, + { "Frame_Lock", 1, 1 }, + { "RX_Trained", 0, 1 }, + { "XGMAC_PORT_HSS_TXA_MODE_CFG", 0x21800, 0 }, + { "BWSEL", 2, 2 }, + { "RTSEL", 0, 2 }, + { "XGMAC_PORT_HSS_TXA_TEST_CTRL", 0x21804, 0 }, + { "TWDP", 5, 1 }, + { "TPGRST", 4, 1 }, + { "TPGEN", 3, 1 }, + { "TPSEL", 0, 3 }, + { "XGMAC_PORT_HSS_TXA_COEFF_CTRL", 0x21808, 0 }, + { "AEINVPOL", 6, 1 }, + { "AESOURCE", 5, 1 }, + { "EQMODE", 4, 1 }, + { "OCOEF", 3, 1 }, + { "COEFRST", 2, 1 }, + { "SPEN", 1, 1 }, + { "ALOAD", 0, 1 }, + { "XGMAC_PORT_HSS_TXA_DRIVER_MODE", 0x2180c, 0 }, + { "DRVOFFT", 5, 1 }, + { "SLEW", 2, 3 }, + { "FFE", 0, 2 }, + { "XGMAC_PORT_HSS_TXA_DRIVER_OVR_CTRL", 0x21810, 0 }, + { "VLINC", 7, 1 }, + { "VLDEC", 6, 1 }, + { "LOPWR", 5, 1 }, + { "TDMEN", 4, 1 }, + { "DCCEN", 3, 1 }, + { "VHSEL", 2, 1 }, + { "IDAC", 0, 2 }, + { "XGMAC_PORT_HSS_TXA_TDM_BIASGEN_STANDBY_TIMER", 0x21814, 0 }, + { "XGMAC_PORT_HSS_TXA_TDM_BIASGEN_PWRON_TIMER", 0x21818, 0 }, + { "XGMAC_PORT_HSS_TXA_TAP0_COEFF", 0x21820, 0 }, + { "XGMAC_PORT_HSS_TXA_TAP1_COEFF", 0x21824, 0 }, + { "XGMAC_PORT_HSS_TXA_TAP2_COEFF", 0x21828, 0 }, + { "XGMAC_PORT_HSS_TXA_PWR", 0x21830, 0 }, + { "XGMAC_PORT_HSS_TXA_POLARITY", 0x21834, 0 }, + { "TXPOL", 4, 3 }, + { "NTXPOL", 0, 3 }, + { "XGMAC_PORT_HSS_TXA_8023AP_AE_CMD", 0x21838, 0 }, + { "CXPRESET", 13, 1 }, + { "CXINIT", 12, 1 }, + { "C2UPDT", 4, 2 }, + { "C1UPDT", 2, 2 }, + { "C0UPDT", 0, 2 }, + { "XGMAC_PORT_HSS_TXA_8023AP_AE_STATUS", 0x2183c, 0 }, + { "C2STAT", 4, 2 }, + { "C1STAT", 2, 2 }, + { "C0STAT", 0, 2 }, + { "XGMAC_PORT_HSS_TXA_TAP0_IDAC_OVR", 0x21840, 0 }, + { "XGMAC_PORT_HSS_TXA_TAP1_IDAC_OVR", 0x21844, 0 }, + { "XGMAC_PORT_HSS_TXA_TAP2_IDAC_OVR", 0x21848, 0 }, + { "XGMAC_PORT_HSS_TXA_PWR_DAC_OVR", 0x21850, 0 }, + { "OPEN", 7, 1 }, + { "OPVAL", 0, 5 }, + { "XGMAC_PORT_HSS_TXA_PWR_DAC", 0x21854, 0 }, + { "XGMAC_PORT_HSS_TXA_TAP0_IDAC_APP", 0x21860, 0 }, + { "XGMAC_PORT_HSS_TXA_TAP1_IDAC_APP", 0x21864, 0 }, + { "XGMAC_PORT_HSS_TXA_TAP2_IDAC_APP", 0x21868, 0 }, + { "XGMAC_PORT_HSS_TXA_SEG_DIS_APP", 0x21870, 0 }, + { "XGMAC_PORT_HSS_TXA_EXT_ADDR_DATA", 0x21878, 0 }, + { "XGMAC_PORT_HSS_TXA_EXT_ADDR", 0x2187c, 0 }, + { "XADDR", 1, 5 }, + { "XWR", 0, 1 }, + { "XGMAC_PORT_HSS_TXB_MODE_CFG", 0x21880, 0 }, + { "BWSEL", 2, 2 }, + { "RTSEL", 0, 2 }, + { "XGMAC_PORT_HSS_TXB_TEST_CTRL", 0x21884, 0 }, + { "TWDP", 5, 1 }, + { "TPGRST", 4, 1 }, + { "TPGEN", 3, 1 }, + { "TPSEL", 0, 3 }, + { "XGMAC_PORT_HSS_TXB_COEFF_CTRL", 0x21888, 0 }, + { "AEINVPOL", 6, 1 }, + { "AESOURCE", 5, 1 }, + { "EQMODE", 4, 1 }, + { "OCOEF", 3, 1 }, + { "COEFRST", 2, 1 }, + { "SPEN", 1, 1 }, + { "ALOAD", 0, 1 }, + { "XGMAC_PORT_HSS_TXB_DRIVER_MODE", 0x2188c, 0 }, + { "DRVOFFT", 5, 1 }, + { "SLEW", 2, 3 }, + { "FFE", 0, 2 }, + { "XGMAC_PORT_HSS_TXB_DRIVER_OVR_CTRL", 0x21890, 0 }, + { "VLINC", 7, 1 }, + { "VLDEC", 6, 1 }, + { "LOPWR", 5, 1 }, + { "TDMEN", 4, 1 }, + { "DCCEN", 3, 1 }, + { "VHSEL", 2, 1 }, + { "IDAC", 0, 2 }, + { "XGMAC_PORT_HSS_TXB_TDM_BIASGEN_STANDBY_TIMER", 0x21894, 0 }, + { "XGMAC_PORT_HSS_TXB_TDM_BIASGEN_PWRON_TIMER", 0x21898, 0 }, + { "XGMAC_PORT_HSS_TXB_TAP0_COEFF", 0x218a0, 0 }, + { "XGMAC_PORT_HSS_TXB_TAP1_COEFF", 0x218a4, 0 }, + { "XGMAC_PORT_HSS_TXB_TAP2_COEFF", 0x218a8, 0 }, + { "XGMAC_PORT_HSS_TXB_PWR", 0x218b0, 0 }, + { "XGMAC_PORT_HSS_TXB_POLARITY", 0x218b4, 0 }, + { "TXPOL", 4, 3 }, + { "NTXPOL", 0, 3 }, + { "XGMAC_PORT_HSS_TXB_8023AP_AE_CMD", 0x218b8, 0 }, + { "CXPRESET", 13, 1 }, + { "CXINIT", 12, 1 }, + { "C2UPDT", 4, 2 }, + { "C1UPDT", 2, 2 }, + { "C0UPDT", 0, 2 }, + { "XGMAC_PORT_HSS_TXB_8023AP_AE_STATUS", 0x218bc, 0 }, + { "C2STAT", 4, 2 }, + { "C1STAT", 2, 2 }, + { "C0STAT", 0, 2 }, + { "XGMAC_PORT_HSS_TXB_TAP0_IDAC_OVR", 0x218c0, 0 }, + { "XGMAC_PORT_HSS_TXB_TAP1_IDAC_OVR", 0x218c4, 0 }, + { "XGMAC_PORT_HSS_TXB_TAP2_IDAC_OVR", 0x218c8, 0 }, + { "XGMAC_PORT_HSS_TXB_PWR_DAC_OVR", 0x218d0, 0 }, + { "OPEN", 7, 1 }, + { "OPVAL", 0, 5 }, + { "XGMAC_PORT_HSS_TXB_PWR_DAC", 0x218d4, 0 }, + { "XGMAC_PORT_HSS_TXB_TAP0_IDAC_APP", 0x218e0, 0 }, + { "XGMAC_PORT_HSS_TXB_TAP1_IDAC_APP", 0x218e4, 0 }, + { "XGMAC_PORT_HSS_TXB_TAP2_IDAC_APP", 0x218e8, 0 }, + { "XGMAC_PORT_HSS_TXB_SEG_DIS_APP", 0x218f0, 0 }, + { "XGMAC_PORT_HSS_TXB_EXT_ADDR_DATA", 0x218f8, 0 }, + { "XGMAC_PORT_HSS_TXB_EXT_ADDR", 0x218fc, 0 }, + { "XADDR", 2, 4 }, + { "XWR", 0, 1 }, + { "XGMAC_PORT_HSS_RXA_CFG_MODE", 0x21900, 0 }, + { "BW810", 8, 1 }, + { "AUXCLK", 7, 1 }, + { "DMSEL", 4, 3 }, + { "BWSEL", 2, 2 }, + { "RTSEL", 0, 2 }, + { "XGMAC_PORT_HSS_RXA_TEST_CTRL", 0x21904, 0 }, + { "RCLKEN", 15, 1 }, + { "RRATE", 13, 2 }, + { "LBFRCERROR", 10, 1 }, + { "LBERROR", 9, 1 }, + { "LBSYNC", 8, 1 }, + { "FDWRAPCLK", 7, 1 }, + { "FDWRAP", 6, 1 }, + { "PRST", 4, 1 }, + { "PCHKEN", 3, 1 }, + { "PRBSSEL", 0, 3 }, + { "XGMAC_PORT_HSS_RXA_PH_ROTATOR_CTRL", 0x21908, 0 }, + { "FTHROT", 12, 4 }, + { "RTHROT", 11, 1 }, + { "FILTCTL", 7, 4 }, + { "RSRVO", 5, 2 }, + { "EXTEL", 4, 1 }, + { "RSTONSTUCK", 3, 1 }, + { "FREEZEFW", 2, 1 }, + { "RESETFW", 1, 1 }, + { "SSCENABLE", 0, 1 }, + { "XGMAC_PORT_HSS_RXA_PH_ROTATOR_OFFSET_CTRL", 0x2190c, 0 }, + { "RSNP", 11, 1 }, + { "TSOEN", 10, 1 }, + { "OFFEN", 9, 1 }, + { "TMSCAL", 7, 2 }, + { "APADJ", 6, 1 }, + { "RSEL", 5, 1 }, + { "PHOFFS", 0, 5 }, + { "XGMAC_PORT_HSS_RXA_PH_ROTATOR_POSITION1", 0x21910, 0 }, + { "ROT0A", 8, 6 }, + { "RTSEL", 0, 6 }, + { "XGMAC_PORT_HSS_RXA_PH_ROTATOR_POSITION2", 0x21914, 0 }, + { "XGMAC_PORT_HSS_RXA_PH_ROTATOR_STATIC_PH_OFFSET", 0x21918, 0 }, + { "RCALER", 15, 1 }, + { "RAOOFF", 10, 5 }, + { "RAEOFF", 5, 5 }, + { "RDOFF", 0, 5 }, + { "XGMAC_PORT_HSS_RXA_SIGDET_CTRL", 0x2191c, 0 }, + { "SIGNSD", 13, 2 }, + { "DACSD", 8, 5 }, + { "SDPDN", 6, 1 }, + { "SIGDET", 5, 1 }, + { "SDLVL", 0, 5 }, + { "XGMAC_PORT_HSS_RXA_DFE_CTRL", 0x21920, 0 }, + { "REQCMP", 15, 1 }, + { "DFEREQ", 14, 1 }, + { "SPCEN", 13, 1 }, + { "GATEEN", 12, 1 }, + { "SPIFMT", 9, 3 }, + { "DFEPWR", 6, 3 }, + { "STNDBY", 5, 1 }, + { "FRCH", 4, 1 }, + { "NONRND", 3, 1 }, + { "NONRNF", 2, 1 }, + { "FSTLCK", 1, 1 }, + { "DFERST", 0, 1 }, + { "XGMAC_PORT_HSS_RXA_DFE_DATA_EDGE_SAMPLE", 0x21924, 0 }, + { "ESAMP", 8, 8 }, + { "DSAMP", 0, 8 }, + { "XGMAC_PORT_HSS_RXA_DFE_AMP_SAMPLE", 0x21928, 0 }, + { "SMODE", 8, 4 }, + { "ADCORR", 7, 1 }, + { "TRAINEN", 6, 1 }, + { "ASAMPQ", 3, 3 }, + { "ASAMP", 0, 3 }, + { "XGMAC_PORT_HSS_RXA_VGA_CTRL1", 0x2192c, 0 }, + { "POLE", 12, 2 }, + { "PEAK", 8, 3 }, + { "VOFFSN", 6, 2 }, + { "VOFFA", 0, 6 }, + { "XGMAC_PORT_HSS_RXA_VGA_CTRL2", 0x21930, 0 }, + { "SHORTV", 10, 1 }, + { "VGAIN", 0, 4 }, + { "XGMAC_PORT_HSS_RXA_VGA_CTRL3", 0x21934, 0 }, + { "HBND1", 10, 1 }, + { "HBND0", 9, 1 }, + { "VLCKD", 8, 1 }, + { "VLCKDF", 7, 1 }, + { "AMAXT", 0, 7 }, + { "XGMAC_PORT_HSS_RXA_DFE_D00_D01_OFFSET", 0x21938, 0 }, + { "D01SN", 13, 2 }, + { "D01AMP", 8, 5 }, + { "D00SN", 5, 2 }, + { "D00AMP", 0, 5 }, + { "XGMAC_PORT_HSS_RXA_DFE_D10_D11_OFFSET", 0x2193c, 0 }, + { "D11SN", 13, 2 }, + { "D11AMP", 8, 5 }, + { "D10SN", 5, 2 }, + { "D10AMP", 0, 5 }, + { "XGMAC_PORT_HSS_RXA_DFE_E0_E1_OFFSET", 0x21940, 0 }, + { "E1SN", 13, 2 }, + { "E1AMP", 8, 5 }, + { "E0SN", 5, 2 }, + { "E0AMP", 0, 5 }, + { "XGMAC_PORT_HSS_RXA_DACA_OFFSET", 0x21944, 0 }, + { "AOFFO", 8, 6 }, + { "AOFFE", 0, 6 }, + { "XGMAC_PORT_HSS_RXA_DACAP_DAC_AN_OFFSET", 0x21948, 0 }, + { "DACAN", 8, 8 }, + { "DACAP", 0, 8 }, + { "XGMAC_PORT_HSS_RXA_DACA_MIN", 0x2194c, 0 }, + { "DACAZ", 8, 8 }, + { "DACAM", 0, 8 }, + { "XGMAC_PORT_HSS_RXA_ADAC_CTRL", 0x21950, 0 }, + { "ADSN", 7, 2 }, + { "ADMAG", 0, 7 }, + { "XGMAC_PORT_HSS_RXA_DIGITAL_EYE_CTRL", 0x21954, 0 }, + { "BLKAZ", 15, 1 }, + { "WIDTH", 10, 5 }, + { "MINWIDTH", 5, 5 }, + { "MINAMP", 0, 5 }, + { "XGMAC_PORT_HSS_RXA_DIGITAL_EYE_METRICS", 0x21958, 0 }, + { "EMBRDY", 10, 1 }, + { "EMBUMP", 7, 1 }, + { "EMMD", 5, 2 }, + { "EMPAT", 1, 1 }, + { "EMEN", 0, 1 }, + { "XGMAC_PORT_HSS_RXA_DFE_H1", 0x2195c, 0 }, + { "H1OSN", 14, 2 }, + { "H1OMAG", 8, 6 }, + { "H1ESN", 6, 2 }, + { "H1EMAG", 0, 6 }, + { "XGMAC_PORT_HSS_RXA_DFE_H2", 0x21960, 0 }, + { "H2OSN", 13, 2 }, + { "H2OMAG", 8, 5 }, + { "H2ESN", 5, 2 }, + { "H2EMAG", 0, 5 }, + { "XGMAC_PORT_HSS_RXA_DFE_H3", 0x21964, 0 }, + { "H3OSN", 12, 2 }, + { "H3OMAG", 8, 4 }, + { "H3ESN", 4, 2 }, + { "H3EMAG", 0, 4 }, + { "XGMAC_PORT_HSS_RXA_DFE_H4", 0x21968, 0 }, + { "H4OSN", 12, 2 }, + { "H4OMAG", 8, 4 }, + { "H4ESN", 4, 2 }, + { "H4EMAG", 0, 4 }, + { "XGMAC_PORT_HSS_RXA_DFE_H5", 0x2196c, 0 }, + { "H5OSN", 12, 2 }, + { "H5OMAG", 8, 4 }, + { "H5ESN", 4, 2 }, + { "H5EMAG", 0, 4 }, + { "XGMAC_PORT_HSS_RXA_DAC_DPC", 0x21970, 0 }, + { "DPCCVG", 13, 1 }, + { "DACCVG", 12, 1 }, + { "DPCTGT", 9, 3 }, + { "BLKH1T", 8, 1 }, + { "BLKOAE", 7, 1 }, + { "H1TGT", 4, 3 }, + { "OAE", 0, 4 }, + { "XGMAC_PORT_HSS_RXA_DDC", 0x21974, 0 }, + { "OLS", 11, 5 }, + { "OES", 6, 5 }, + { "BLKODEC", 5, 1 }, + { "ODEC", 0, 5 }, + { "XGMAC_PORT_HSS_RXA_INTERNAL_STATUS", 0x21978, 0 }, + { "BER6", 15, 1 }, + { "BER6VAL", 14, 1 }, + { "BER3VAL", 13, 1 }, + { "DPCCMP", 9, 1 }, + { "DACCMP", 8, 1 }, + { "DDCCMP", 7, 1 }, + { "AERRFLG", 6, 1 }, + { "WERRFLG", 5, 1 }, + { "TRCMP", 4, 1 }, + { "VLCKF", 3, 1 }, + { "ROCADJ", 2, 1 }, + { "ROCCMP", 1, 1 }, + { "OCCMP", 0, 1 }, + { "XGMAC_PORT_HSS_RXA_DFE_FUNC_CTRL", 0x2197c, 0 }, + { "FDPC", 15, 1 }, + { "FDAC", 14, 1 }, + { "FDDC", 13, 1 }, + { "FNRND", 12, 1 }, + { "FVGAIN", 11, 1 }, + { "FVOFF", 10, 1 }, + { "FSDET", 9, 1 }, + { "FBER6", 8, 1 }, + { "FROTO", 7, 1 }, + { "FH4H5", 6, 1 }, + { "FH2H3", 5, 1 }, + { "FH1", 4, 1 }, + { "FH1SN", 3, 1 }, + { "FNRDF", 2, 1 }, + { "FADAC", 0, 1 }, + { "XGMAC_PORT_HSS_RXB_CFG_MODE", 0x21980, 0 }, + { "BW810", 8, 1 }, + { "AUXCLK", 7, 1 }, + { "DMSEL", 4, 3 }, + { "BWSEL", 2, 2 }, + { "RTSEL", 0, 2 }, + { "XGMAC_PORT_HSS_RXB_TEST_CTRL", 0x21984, 0 }, + { "RCLKEN", 15, 1 }, + { "RRATE", 13, 2 }, + { "LBFRCERROR", 10, 1 }, + { "LBERROR", 9, 1 }, + { "LBSYNC", 8, 1 }, + { "FDWRAPCLK", 7, 1 }, + { "FDWRAP", 6, 1 }, + { "PRST", 4, 1 }, + { "PCHKEN", 3, 1 }, + { "PRBSSEL", 0, 3 }, + { "XGMAC_PORT_HSS_RXB_PH_ROTATOR_CTRL", 0x21988, 0 }, + { "FTHROT", 12, 4 }, + { "RTHROT", 11, 1 }, + { "FILTCTL", 7, 4 }, + { "RSRVO", 5, 2 }, + { "EXTEL", 4, 1 }, + { "RSTONSTUCK", 3, 1 }, + { "FREEZEFW", 2, 1 }, + { "RESETFW", 1, 1 }, + { "SSCENABLE", 0, 1 }, + { "XGMAC_PORT_HSS_RXB_PH_ROTATOR_OFFSET_CTRL", 0x2198c, 0 }, + { "RSNP", 11, 1 }, + { "TSOEN", 10, 1 }, + { "OFFEN", 9, 1 }, + { "TMSCAL", 7, 2 }, + { "APADJ", 6, 1 }, + { "RSEL", 5, 1 }, + { "PHOFFS", 0, 5 }, + { "XGMAC_PORT_HSS_RXB_PH_ROTATOR_POSITION1", 0x21990, 0 }, + { "ROT0A", 8, 6 }, + { "RTSEL", 0, 6 }, + { "XGMAC_PORT_HSS_RXB_PH_ROTATOR_POSITION2", 0x21994, 0 }, + { "XGMAC_PORT_HSS_RXB_PH_ROTATOR_STATIC_PH_OFFSET", 0x21998, 0 }, + { "RCALER", 15, 1 }, + { "RAOOFF", 10, 5 }, + { "RAEOFF", 5, 5 }, + { "RDOFF", 0, 5 }, + { "XGMAC_PORT_HSS_RXB_SIGDET_CTRL", 0x2199c, 0 }, + { "SIGNSD", 13, 2 }, + { "DACSD", 8, 5 }, + { "SDPDN", 6, 1 }, + { "SIGDET", 5, 1 }, + { "SDLVL", 0, 5 }, + { "XGMAC_PORT_HSS_RXB_DFE_CTRL", 0x219a0, 0 }, + { "REQCMP", 15, 1 }, + { "DFEREQ", 14, 1 }, + { "SPCEN", 13, 1 }, + { "GATEEN", 12, 1 }, + { "SPIFMT", 9, 3 }, + { "DFEPWR", 6, 3 }, + { "STNDBY", 5, 1 }, + { "FRCH", 4, 1 }, + { "NONRND", 3, 1 }, + { "NONRNF", 2, 1 }, + { "FSTLCK", 1, 1 }, + { "DFERST", 0, 1 }, + { "XGMAC_PORT_HSS_RXB_DFE_DATA_EDGE_SAMPLE", 0x219a4, 0 }, + { "ESAMP", 8, 8 }, + { "DSAMP", 0, 8 }, + { "XGMAC_PORT_HSS_RXB_DFE_AMP_SAMPLE", 0x219a8, 0 }, + { "SMODE", 8, 4 }, + { "ADCORR", 7, 1 }, + { "TRAINEN", 6, 1 }, + { "ASAMPQ", 3, 3 }, + { "ASAMP", 0, 3 }, + { "XGMAC_PORT_HSS_RXB_VGA_CTRL1", 0x219ac, 0 }, + { "POLE", 12, 2 }, + { "PEAK", 8, 3 }, + { "VOFFSN", 6, 2 }, + { "VOFFA", 0, 6 }, + { "XGMAC_PORT_HSS_RXB_VGA_CTRL2", 0x219b0, 0 }, + { "SHORTV", 10, 1 }, + { "VGAIN", 0, 4 }, + { "XGMAC_PORT_HSS_RXB_VGA_CTRL3", 0x219b4, 0 }, + { "HBND1", 10, 1 }, + { "HBND0", 9, 1 }, + { "VLCKD", 8, 1 }, + { "VLCKDF", 7, 1 }, + { "AMAXT", 0, 7 }, + { "XGMAC_PORT_HSS_RXB_DFE_D00_D01_OFFSET", 0x219b8, 0 }, + { "D01SN", 13, 2 }, + { "D01AMP", 8, 5 }, + { "D00SN", 5, 2 }, + { "D00AMP", 0, 5 }, + { "XGMAC_PORT_HSS_RXB_DFE_D10_D11_OFFSET", 0x219bc, 0 }, + { "D11SN", 13, 2 }, + { "D11AMP", 8, 5 }, + { "D10SN", 5, 2 }, + { "D10AMP", 0, 5 }, + { "XGMAC_PORT_HSS_RXB_DFE_E0_E1_OFFSET", 0x219c0, 0 }, + { "E1SN", 13, 2 }, + { "E1AMP", 8, 5 }, + { "E0SN", 5, 2 }, + { "E0AMP", 0, 5 }, + { "XGMAC_PORT_HSS_RXB_DACA_OFFSET", 0x219c4, 0 }, + { "AOFFO", 8, 6 }, + { "AOFFE", 0, 6 }, + { "XGMAC_PORT_HSS_RXB_DACAP_DAC_AN_OFFSET", 0x219c8, 0 }, + { "DACAN", 8, 8 }, + { "DACAP", 0, 8 }, + { "XGMAC_PORT_HSS_RXB_DACA_MIN", 0x219cc, 0 }, + { "DACAZ", 8, 8 }, + { "DACAM", 0, 8 }, + { "XGMAC_PORT_HSS_RXB_ADAC_CTRL", 0x219d0, 0 }, + { "ADSN", 7, 2 }, + { "ADMAG", 0, 7 }, + { "XGMAC_PORT_HSS_RXB_DIGITAL_EYE_CTRL", 0x219d4, 0 }, + { "BLKAZ", 15, 1 }, + { "WIDTH", 10, 5 }, + { "MINWIDTH", 5, 5 }, + { "MINAMP", 0, 5 }, + { "XGMAC_PORT_HSS_RXB_DIGITAL_EYE_METRICS", 0x219d8, 0 }, + { "EMBRDY", 10, 1 }, + { "EMBUMP", 7, 1 }, + { "EMMD", 5, 2 }, + { "EMPAT", 1, 1 }, + { "EMEN", 0, 1 }, + { "XGMAC_PORT_HSS_RXB_DFE_H1", 0x219dc, 0 }, + { "H1OSN", 14, 2 }, + { "H1OMAG", 8, 6 }, + { "H1ESN", 6, 2 }, + { "H1EMAG", 0, 6 }, + { "XGMAC_PORT_HSS_RXB_DFE_H2", 0x219e0, 0 }, + { "H2OSN", 13, 2 }, + { "H2OMAG", 8, 5 }, + { "H2ESN", 5, 2 }, + { "H2EMAG", 0, 5 }, + { "XGMAC_PORT_HSS_RXB_DFE_H3", 0x219e4, 0 }, + { "H3OSN", 12, 2 }, + { "H3OMAG", 8, 4 }, + { "H3ESN", 4, 2 }, + { "H3EMAG", 0, 4 }, + { "XGMAC_PORT_HSS_RXB_DFE_H4", 0x219e8, 0 }, + { "H4OSN", 12, 2 }, + { "H4OMAG", 8, 4 }, + { "H4ESN", 4, 2 }, + { "H4EMAG", 0, 4 }, + { "XGMAC_PORT_HSS_RXB_DFE_H5", 0x219ec, 0 }, + { "H5OSN", 12, 2 }, + { "H5OMAG", 8, 4 }, + { "H5ESN", 4, 2 }, + { "H5EMAG", 0, 4 }, + { "XGMAC_PORT_HSS_RXB_DAC_DPC", 0x219f0, 0 }, + { "DPCCVG", 13, 1 }, + { "DACCVG", 12, 1 }, + { "DPCTGT", 9, 3 }, + { "BLKH1T", 8, 1 }, + { "BLKOAE", 7, 1 }, + { "H1TGT", 4, 3 }, + { "OAE", 0, 4 }, + { "XGMAC_PORT_HSS_RXB_DDC", 0x219f4, 0 }, + { "OLS", 11, 5 }, + { "OES", 6, 5 }, + { "BLKODEC", 5, 1 }, + { "ODEC", 0, 5 }, + { "XGMAC_PORT_HSS_RXB_INTERNAL_STATUS", 0x219f8, 0 }, + { "BER6", 15, 1 }, + { "BER6VAL", 14, 1 }, + { "BER3VAL", 13, 1 }, + { "DPCCMP", 9, 1 }, + { "DACCMP", 8, 1 }, + { "DDCCMP", 7, 1 }, + { "AERRFLG", 6, 1 }, + { "WERRFLG", 5, 1 }, + { "TRCMP", 4, 1 }, + { "VLCKF", 3, 1 }, + { "ROCADJ", 2, 1 }, + { "ROCCMP", 1, 1 }, + { "OCCMP", 0, 1 }, + { "XGMAC_PORT_HSS_RXB_DFE_FUNC_CTRL", 0x219fc, 0 }, + { "FDPC", 15, 1 }, + { "FDAC", 14, 1 }, + { "FDDC", 13, 1 }, + { "FNRND", 12, 1 }, + { "FVGAIN", 11, 1 }, + { "FVOFF", 10, 1 }, + { "FSDET", 9, 1 }, + { "FBER6", 8, 1 }, + { "FROTO", 7, 1 }, + { "FH4H5", 6, 1 }, + { "FH2H3", 5, 1 }, + { "FH1", 4, 1 }, + { "FH1SN", 3, 1 }, + { "FNRDF", 2, 1 }, + { "FADAC", 0, 1 }, + { "XGMAC_PORT_HSS_TXC_MODE_CFG", 0x21a00, 0 }, + { "BWSEL", 2, 2 }, + { "RTSEL", 0, 2 }, + { "XGMAC_PORT_HSS_TXC_TEST_CTRL", 0x21a04, 0 }, + { "TWDP", 5, 1 }, + { "TPGRST", 4, 1 }, + { "TPGEN", 3, 1 }, + { "TPSEL", 0, 3 }, + { "XGMAC_PORT_HSS_TXC_COEFF_CTRL", 0x21a08, 0 }, + { "AEINVPOL", 6, 1 }, + { "AESOURCE", 5, 1 }, + { "EQMODE", 4, 1 }, + { "OCOEF", 3, 1 }, + { "COEFRST", 2, 1 }, + { "SPEN", 1, 1 }, + { "ALOAD", 0, 1 }, + { "XGMAC_PORT_HSS_TXC_DRIVER_MODE", 0x21a0c, 0 }, + { "DRVOFFT", 5, 1 }, + { "SLEW", 2, 3 }, + { "FFE", 0, 2 }, + { "XGMAC_PORT_HSS_TXC_DRIVER_OVR_CTRL", 0x21a10, 0 }, + { "VLINC", 7, 1 }, + { "VLDEC", 6, 1 }, + { "LOPWR", 5, 1 }, + { "TDMEN", 4, 1 }, + { "DCCEN", 3, 1 }, + { "VHSEL", 2, 1 }, + { "IDAC", 0, 2 }, + { "XGMAC_PORT_HSS_TXC_TDM_BIASGEN_STANDBY_TIMER", 0x21a14, 0 }, + { "XGMAC_PORT_HSS_TXC_TDM_BIASGEN_PWRON_TIMER", 0x21a18, 0 }, + { "XGMAC_PORT_HSS_TXC_TAP0_COEFF", 0x21a20, 0 }, + { "XGMAC_PORT_HSS_TXC_TAP1_COEFF", 0x21a24, 0 }, + { "XGMAC_PORT_HSS_TXC_TAP2_COEFF", 0x21a28, 0 }, + { "XGMAC_PORT_HSS_TXC_PWR", 0x21a30, 0 }, + { "XGMAC_PORT_HSS_TXC_POLARITY", 0x21a34, 0 }, + { "TXPOL", 4, 3 }, + { "NTXPOL", 0, 3 }, + { "XGMAC_PORT_HSS_TXC_8023AP_AE_CMD", 0x21a38, 0 }, + { "CXPRESET", 13, 1 }, + { "CXINIT", 12, 1 }, + { "C2UPDT", 4, 2 }, + { "C1UPDT", 2, 2 }, + { "C0UPDT", 0, 2 }, + { "XGMAC_PORT_HSS_TXC_8023AP_AE_STATUS", 0x21a3c, 0 }, + { "C2STAT", 4, 2 }, + { "C1STAT", 2, 2 }, + { "C0STAT", 0, 2 }, + { "XGMAC_PORT_HSS_TXC_TAP0_IDAC_OVR", 0x21a40, 0 }, + { "XGMAC_PORT_HSS_TXC_TAP1_IDAC_OVR", 0x21a44, 0 }, + { "XGMAC_PORT_HSS_TXC_TAP2_IDAC_OVR", 0x21a48, 0 }, + { "XGMAC_PORT_HSS_TXC_PWR_DAC_OVR", 0x21a50, 0 }, + { "OPEN", 7, 1 }, + { "OPVAL", 0, 5 }, + { "XGMAC_PORT_HSS_TXC_PWR_DAC", 0x21a54, 0 }, + { "XGMAC_PORT_HSS_TXC_TAP0_IDAC_APP", 0x21a60, 0 }, + { "XGMAC_PORT_HSS_TXC_TAP1_IDAC_APP", 0x21a64, 0 }, + { "XGMAC_PORT_HSS_TXC_TAP2_IDAC_APP", 0x21a68, 0 }, + { "XGMAC_PORT_HSS_TXC_SEG_DIS_APP", 0x21a70, 0 }, + { "XGMAC_PORT_HSS_TXC_EXT_ADDR_DATA", 0x21a78, 0 }, + { "XGMAC_PORT_HSS_TXC_EXT_ADDR", 0x21a7c, 0 }, + { "XADDR", 2, 4 }, + { "XWR", 0, 1 }, + { "XGMAC_PORT_HSS_TXD_MODE_CFG", 0x21a80, 0 }, + { "BWSEL", 2, 2 }, + { "RTSEL", 0, 2 }, + { "XGMAC_PORT_HSS_TXD_TEST_CTRL", 0x21a84, 0 }, + { "TWDP", 5, 1 }, + { "TPGRST", 4, 1 }, + { "TPGEN", 3, 1 }, + { "TPSEL", 0, 3 }, + { "XGMAC_PORT_HSS_TXD_COEFF_CTRL", 0x21a88, 0 }, + { "AEINVPOL", 6, 1 }, + { "AESOURCE", 5, 1 }, + { "EQMODE", 4, 1 }, + { "OCOEF", 3, 1 }, + { "COEFRST", 2, 1 }, + { "SPEN", 1, 1 }, + { "ALOAD", 0, 1 }, + { "XGMAC_PORT_HSS_TXD_DRIVER_MODE", 0x21a8c, 0 }, + { "DRVOFFT", 5, 1 }, + { "SLEW", 2, 3 }, + { "FFE", 0, 2 }, + { "XGMAC_PORT_HSS_TXD_DRIVER_OVR_CTRL", 0x21a90, 0 }, + { "VLINC", 7, 1 }, + { "VLDEC", 6, 1 }, + { "LOPWR", 5, 1 }, + { "TDMEN", 4, 1 }, + { "DCCEN", 3, 1 }, + { "VHSEL", 2, 1 }, + { "IDAC", 0, 2 }, + { "XGMAC_PORT_HSS_TXD_TDM_BIASGEN_STANDBY_TIMER", 0x21a94, 0 }, + { "XGMAC_PORT_HSS_TXD_TDM_BIASGEN_PWRON_TIMER", 0x21a98, 0 }, + { "XGMAC_PORT_HSS_TXD_TAP0_COEFF", 0x21aa0, 0 }, + { "XGMAC_PORT_HSS_TXD_TAP1_COEFF", 0x21aa4, 0 }, + { "XGMAC_PORT_HSS_TXD_TAP2_COEFF", 0x21aa8, 0 }, + { "XGMAC_PORT_HSS_TXD_PWR", 0x21ab0, 0 }, + { "XGMAC_PORT_HSS_TXD_POLARITY", 0x21ab4, 0 }, + { "TXPOL", 4, 3 }, + { "NTXPOL", 0, 3 }, + { "XGMAC_PORT_HSS_TXD_8023AP_AE_CMD", 0x21ab8, 0 }, + { "CXPRESET", 13, 1 }, + { "CXINIT", 12, 1 }, + { "C2UPDT", 4, 2 }, + { "C1UPDT", 2, 2 }, + { "C0UPDT", 0, 2 }, + { "XGMAC_PORT_HSS_TXD_8023AP_AE_STATUS", 0x21abc, 0 }, + { "C2STAT", 4, 2 }, + { "C1STAT", 2, 2 }, + { "C0STAT", 0, 2 }, + { "XGMAC_PORT_HSS_TXD_TAP0_IDAC_OVR", 0x21ac0, 0 }, + { "XGMAC_PORT_HSS_TXD_TAP1_IDAC_OVR", 0x21ac4, 0 }, + { "XGMAC_PORT_HSS_TXD_TAP2_IDAC_OVR", 0x21ac8, 0 }, + { "XGMAC_PORT_HSS_TXD_PWR_DAC_OVR", 0x21ad0, 0 }, + { "OPEN", 7, 1 }, + { "OPVAL", 0, 5 }, + { "XGMAC_PORT_HSS_TXD_PWR_DAC", 0x21ad4, 0 }, + { "XGMAC_PORT_HSS_TXD_TAP0_IDAC_APP", 0x21ae0, 0 }, + { "XGMAC_PORT_HSS_TXD_TAP1_IDAC_APP", 0x21ae4, 0 }, + { "XGMAC_PORT_HSS_TXD_TAP2_IDAC_APP", 0x21ae8, 0 }, + { "XGMAC_PORT_HSS_TXD_SEG_DIS_APP", 0x21af0, 0 }, + { "XGMAC_PORT_HSS_TXD_EXT_ADDR_DATA", 0x21af8, 0 }, + { "XGMAC_PORT_HSS_TXD_EXT_ADDR", 0x21afc, 0 }, + { "XADDR", 2, 4 }, + { "XWR", 0, 1 }, + { "XGMAC_PORT_HSS_RXC_CFG_MODE", 0x21b00, 0 }, + { "BW810", 8, 1 }, + { "AUXCLK", 7, 1 }, + { "DMSEL", 4, 3 }, + { "BWSEL", 2, 2 }, + { "RTSEL", 0, 2 }, + { "XGMAC_PORT_HSS_RXC_TEST_CTRL", 0x21b04, 0 }, + { "RCLKEN", 15, 1 }, + { "RRATE", 13, 2 }, + { "LBFRCERROR", 10, 1 }, + { "LBERROR", 9, 1 }, + { "LBSYNC", 8, 1 }, + { "FDWRAPCLK", 7, 1 }, + { "FDWRAP", 6, 1 }, + { "PRST", 4, 1 }, + { "PCHKEN", 3, 1 }, + { "PRBSSEL", 0, 3 }, + { "XGMAC_PORT_HSS_RXC_PH_ROTATOR_CTRL", 0x21b08, 0 }, + { "FTHROT", 12, 4 }, + { "RTHROT", 11, 1 }, + { "FILTCTL", 7, 4 }, + { "RSRVO", 5, 2 }, + { "EXTEL", 4, 1 }, + { "RSTONSTUCK", 3, 1 }, + { "FREEZEFW", 2, 1 }, + { "RESETFW", 1, 1 }, + { "SSCENABLE", 0, 1 }, + { "XGMAC_PORT_HSS_RXC_PH_ROTATOR_OFFSET_CTRL", 0x21b0c, 0 }, + { "RSNP", 11, 1 }, + { "TSOEN", 10, 1 }, + { "OFFEN", 9, 1 }, + { "TMSCAL", 7, 2 }, + { "APADJ", 6, 1 }, + { "RSEL", 5, 1 }, + { "PHOFFS", 0, 5 }, + { "XGMAC_PORT_HSS_RXC_PH_ROTATOR_POSITION1", 0x21b10, 0 }, + { "ROT0A", 8, 6 }, + { "RTSEL", 0, 6 }, + { "XGMAC_PORT_HSS_RXC_PH_ROTATOR_POSITION2", 0x21b14, 0 }, + { "XGMAC_PORT_HSS_RXC_PH_ROTATOR_STATIC_PH_OFFSET", 0x21b18, 0 }, + { "RCALER", 15, 1 }, + { "RAOOFF", 10, 5 }, + { "RAEOFF", 5, 5 }, + { "RDOFF", 0, 5 }, + { "XGMAC_PORT_HSS_RXC_SIGDET_CTRL", 0x21b1c, 0 }, + { "SIGNSD", 13, 2 }, + { "DACSD", 8, 5 }, + { "SDPDN", 6, 1 }, + { "SIGDET", 5, 1 }, + { "SDLVL", 0, 5 }, + { "XGMAC_PORT_HSS_RXC_DFE_CTRL", 0x21b20, 0 }, + { "REQCMP", 15, 1 }, + { "DFEREQ", 14, 1 }, + { "SPCEN", 13, 1 }, + { "GATEEN", 12, 1 }, + { "SPIFMT", 9, 3 }, + { "DFEPWR", 6, 3 }, + { "STNDBY", 5, 1 }, + { "FRCH", 4, 1 }, + { "NONRND", 3, 1 }, + { "NONRNF", 2, 1 }, + { "FSTLCK", 1, 1 }, + { "DFERST", 0, 1 }, + { "XGMAC_PORT_HSS_RXC_DFE_DATA_EDGE_SAMPLE", 0x21b24, 0 }, + { "ESAMP", 8, 8 }, + { "DSAMP", 0, 8 }, + { "XGMAC_PORT_HSS_RXC_DFE_AMP_SAMPLE", 0x21b28, 0 }, + { "SMODE", 8, 4 }, + { "ADCORR", 7, 1 }, + { "TRAINEN", 6, 1 }, + { "ASAMPQ", 3, 3 }, + { "ASAMP", 0, 3 }, + { "XGMAC_PORT_HSS_RXC_VGA_CTRL1", 0x21b2c, 0 }, + { "POLE", 12, 2 }, + { "PEAK", 8, 3 }, + { "VOFFSN", 6, 2 }, + { "VOFFA", 0, 6 }, + { "XGMAC_PORT_HSS_RXC_VGA_CTRL2", 0x21b30, 0 }, + { "SHORTV", 10, 1 }, + { "VGAIN", 0, 4 }, + { "XGMAC_PORT_HSS_RXC_VGA_CTRL3", 0x21b34, 0 }, + { "HBND1", 10, 1 }, + { "HBND0", 9, 1 }, + { "VLCKD", 8, 1 }, + { "VLCKDF", 7, 1 }, + { "AMAXT", 0, 7 }, + { "XGMAC_PORT_HSS_RXC_DFE_D00_D01_OFFSET", 0x21b38, 0 }, + { "D01SN", 13, 2 }, + { "D01AMP", 8, 5 }, + { "D00SN", 5, 2 }, + { "D00AMP", 0, 5 }, + { "XGMAC_PORT_HSS_RXC_DFE_D10_D11_OFFSET", 0x21b3c, 0 }, + { "D11SN", 13, 2 }, + { "D11AMP", 8, 5 }, + { "D10SN", 5, 2 }, + { "D10AMP", 0, 5 }, + { "XGMAC_PORT_HSS_RXC_DFE_E0_E1_OFFSET", 0x21b40, 0 }, + { "E1SN", 13, 2 }, + { "E1AMP", 8, 5 }, + { "E0SN", 5, 2 }, + { "E0AMP", 0, 5 }, + { "XGMAC_PORT_HSS_RXC_DACA_OFFSET", 0x21b44, 0 }, + { "AOFFO", 8, 6 }, + { "AOFFE", 0, 6 }, + { "XGMAC_PORT_HSS_RXC_DACAP_DAC_AN_OFFSET", 0x21b48, 0 }, + { "DACAN", 8, 8 }, + { "DACAP", 0, 8 }, + { "XGMAC_PORT_HSS_RXC_DACA_MIN", 0x21b4c, 0 }, + { "DACAZ", 8, 8 }, + { "DACAM", 0, 8 }, + { "XGMAC_PORT_HSS_RXC_ADAC_CTRL", 0x21b50, 0 }, + { "ADSN", 7, 2 }, + { "ADMAG", 0, 7 }, + { "XGMAC_PORT_HSS_RXC_DIGITAL_EYE_CTRL", 0x21b54, 0 }, + { "BLKAZ", 15, 1 }, + { "WIDTH", 10, 5 }, + { "MINWIDTH", 5, 5 }, + { "MINAMP", 0, 5 }, + { "XGMAC_PORT_HSS_RXC_DIGITAL_EYE_METRICS", 0x21b58, 0 }, + { "EMBRDY", 10, 1 }, + { "EMBUMP", 7, 1 }, + { "EMMD", 5, 2 }, + { "EMPAT", 1, 1 }, + { "EMEN", 0, 1 }, + { "XGMAC_PORT_HSS_RXC_DFE_H1", 0x21b5c, 0 }, + { "H1OSN", 14, 2 }, + { "H1OMAG", 8, 6 }, + { "H1ESN", 6, 2 }, + { "H1EMAG", 0, 6 }, + { "XGMAC_PORT_HSS_RXC_DFE_H2", 0x21b60, 0 }, + { "H2OSN", 13, 2 }, + { "H2OMAG", 8, 5 }, + { "H2ESN", 5, 2 }, + { "H2EMAG", 0, 5 }, + { "XGMAC_PORT_HSS_RXC_DFE_H3", 0x21b64, 0 }, + { "H3OSN", 12, 2 }, + { "H3OMAG", 8, 4 }, + { "H3ESN", 4, 2 }, + { "H3EMAG", 0, 4 }, + { "XGMAC_PORT_HSS_RXC_DFE_H4", 0x21b68, 0 }, + { "H4OSN", 12, 2 }, + { "H4OMAG", 8, 4 }, + { "H4ESN", 4, 2 }, + { "H4EMAG", 0, 4 }, + { "XGMAC_PORT_HSS_RXC_DFE_H5", 0x21b6c, 0 }, + { "H5OSN", 12, 2 }, + { "H5OMAG", 8, 4 }, + { "H5ESN", 4, 2 }, + { "H5EMAG", 0, 4 }, + { "XGMAC_PORT_HSS_RXC_DAC_DPC", 0x21b70, 0 }, + { "DPCCVG", 13, 1 }, + { "DACCVG", 12, 1 }, + { "DPCTGT", 9, 3 }, + { "BLKH1T", 8, 1 }, + { "BLKOAE", 7, 1 }, + { "H1TGT", 4, 3 }, + { "OAE", 0, 4 }, + { "XGMAC_PORT_HSS_RXC_DDC", 0x21b74, 0 }, + { "OLS", 11, 5 }, + { "OES", 6, 5 }, + { "BLKODEC", 5, 1 }, + { "ODEC", 0, 5 }, + { "XGMAC_PORT_HSS_RXC_INTERNAL_STATUS", 0x21b78, 0 }, + { "BER6", 15, 1 }, + { "BER6VAL", 14, 1 }, + { "BER3VAL", 13, 1 }, + { "DPCCMP", 9, 1 }, + { "DACCMP", 8, 1 }, + { "DDCCMP", 7, 1 }, + { "AERRFLG", 6, 1 }, + { "WERRFLG", 5, 1 }, + { "TRCMP", 4, 1 }, + { "VLCKF", 3, 1 }, + { "ROCADJ", 2, 1 }, + { "ROCCMP", 1, 1 }, + { "OCCMP", 0, 1 }, + { "XGMAC_PORT_HSS_RXC_DFE_FUNC_CTRL", 0x21b7c, 0 }, + { "FDPC", 15, 1 }, + { "FDAC", 14, 1 }, + { "FDDC", 13, 1 }, + { "FNRND", 12, 1 }, + { "FVGAIN", 11, 1 }, + { "FVOFF", 10, 1 }, + { "FSDET", 9, 1 }, + { "FBER6", 8, 1 }, + { "FROTO", 7, 1 }, + { "FH4H5", 6, 1 }, + { "FH2H3", 5, 1 }, + { "FH1", 4, 1 }, + { "FH1SN", 3, 1 }, + { "FNRDF", 2, 1 }, + { "FADAC", 0, 1 }, + { "XGMAC_PORT_HSS_RXD_CFG_MODE", 0x21b80, 0 }, + { "BW810", 8, 1 }, + { "AUXCLK", 7, 1 }, + { "DMSEL", 4, 3 }, + { "BWSEL", 2, 2 }, + { "RTSEL", 0, 2 }, + { "XGMAC_PORT_HSS_RXD_TEST_CTRL", 0x21b84, 0 }, + { "RCLKEN", 15, 1 }, + { "RRATE", 13, 2 }, + { "LBFRCERROR", 10, 1 }, + { "LBERROR", 9, 1 }, + { "LBSYNC", 8, 1 }, + { "FDWRAPCLK", 7, 1 }, + { "FDWRAP", 6, 1 }, + { "PRST", 4, 1 }, + { "PCHKEN", 3, 1 }, + { "PRBSSEL", 0, 3 }, + { "XGMAC_PORT_HSS_RXD_PH_ROTATOR_CTRL", 0x21b88, 0 }, + { "FTHROT", 12, 4 }, + { "RTHROT", 11, 1 }, + { "FILTCTL", 7, 4 }, + { "RSRVO", 5, 2 }, + { "EXTEL", 4, 1 }, + { "RSTONSTUCK", 3, 1 }, + { "FREEZEFW", 2, 1 }, + { "RESETFW", 1, 1 }, + { "SSCENABLE", 0, 1 }, + { "XGMAC_PORT_HSS_RXD_PH_ROTATOR_OFFSET_CTRL", 0x21b8c, 0 }, + { "RSNP", 11, 1 }, + { "TSOEN", 10, 1 }, + { "OFFEN", 9, 1 }, + { "TMSCAL", 7, 2 }, + { "APADJ", 6, 1 }, + { "RSEL", 5, 1 }, + { "PHOFFS", 0, 5 }, + { "XGMAC_PORT_HSS_RXD_PH_ROTATOR_POSITION1", 0x21b90, 0 }, + { "ROT0A", 8, 6 }, + { "RTSEL", 0, 6 }, + { "XGMAC_PORT_HSS_RXD_PH_ROTATOR_POSITION2", 0x21b94, 0 }, + { "XGMAC_PORT_HSS_RXD_PH_ROTATOR_STATIC_PH_OFFSET", 0x21b98, 0 }, + { "RCALER", 15, 1 }, + { "RAOOFF", 10, 5 }, + { "RAEOFF", 5, 5 }, + { "RDOFF", 0, 5 }, + { "XGMAC_PORT_HSS_RXD_SIGDET_CTRL", 0x21b9c, 0 }, + { "SIGNSD", 13, 2 }, + { "DACSD", 8, 5 }, + { "SDPDN", 6, 1 }, + { "SIGDET", 5, 1 }, + { "SDLVL", 0, 5 }, + { "XGMAC_PORT_HSS_RXD_DFE_CTRL", 0x21ba0, 0 }, + { "REQCMP", 15, 1 }, + { "DFEREQ", 14, 1 }, + { "SPCEN", 13, 1 }, + { "GATEEN", 12, 1 }, + { "SPIFMT", 9, 3 }, + { "DFEPWR", 6, 3 }, + { "STNDBY", 5, 1 }, + { "FRCH", 4, 1 }, + { "NONRND", 3, 1 }, + { "NONRNF", 2, 1 }, + { "FSTLCK", 1, 1 }, + { "DFERST", 0, 1 }, + { "XGMAC_PORT_HSS_RXD_DFE_DATA_EDGE_SAMPLE", 0x21ba4, 0 }, + { "ESAMP", 8, 8 }, + { "DSAMP", 0, 8 }, + { "XGMAC_PORT_HSS_RXD_DFE_AMP_SAMPLE", 0x21ba8, 0 }, + { "SMODE", 8, 4 }, + { "ADCORR", 7, 1 }, + { "TRAINEN", 6, 1 }, + { "ASAMPQ", 3, 3 }, + { "ASAMP", 0, 3 }, + { "XGMAC_PORT_HSS_RXD_VGA_CTRL1", 0x21bac, 0 }, + { "POLE", 12, 2 }, + { "PEAK", 8, 3 }, + { "VOFFSN", 6, 2 }, + { "VOFFA", 0, 6 }, + { "XGMAC_PORT_HSS_RXD_VGA_CTRL2", 0x21bb0, 0 }, + { "SHORTV", 10, 1 }, + { "VGAIN", 0, 4 }, + { "XGMAC_PORT_HSS_RXD_VGA_CTRL3", 0x21bb4, 0 }, + { "HBND1", 10, 1 }, + { "HBND0", 9, 1 }, + { "VLCKD", 8, 1 }, + { "VLCKDF", 7, 1 }, + { "AMAXT", 0, 7 }, + { "XGMAC_PORT_HSS_RXD_DFE_D00_D01_OFFSET", 0x21bb8, 0 }, + { "D01SN", 13, 2 }, + { "D01AMP", 8, 5 }, + { "D00SN", 5, 2 }, + { "D00AMP", 0, 5 }, + { "XGMAC_PORT_HSS_RXD_DFE_D10_D11_OFFSET", 0x21bbc, 0 }, + { "D11SN", 13, 2 }, + { "D11AMP", 8, 5 }, + { "D10SN", 5, 2 }, + { "D10AMP", 0, 5 }, + { "XGMAC_PORT_HSS_RXD_DFE_E0_E1_OFFSET", 0x21bc0, 0 }, + { "E1SN", 13, 2 }, + { "E1AMP", 8, 5 }, + { "E0SN", 5, 2 }, + { "E0AMP", 0, 5 }, + { "XGMAC_PORT_HSS_RXD_DACA_OFFSET", 0x21bc4, 0 }, + { "AOFFO", 8, 6 }, + { "AOFFE", 0, 6 }, + { "XGMAC_PORT_HSS_RXD_DACAP_DAC_AN_OFFSET", 0x21bc8, 0 }, + { "DACAN", 8, 8 }, + { "DACAP", 0, 8 }, + { "XGMAC_PORT_HSS_RXD_DACA_MIN", 0x21bcc, 0 }, + { "DACAZ", 8, 8 }, + { "DACAM", 0, 8 }, + { "XGMAC_PORT_HSS_RXD_ADAC_CTRL", 0x21bd0, 0 }, + { "ADSN", 7, 2 }, + { "ADMAG", 0, 7 }, + { "XGMAC_PORT_HSS_RXD_DIGITAL_EYE_CTRL", 0x21bd4, 0 }, + { "BLKAZ", 15, 1 }, + { "WIDTH", 10, 5 }, + { "MINWIDTH", 5, 5 }, + { "MINAMP", 0, 5 }, + { "XGMAC_PORT_HSS_RXD_DIGITAL_EYE_METRICS", 0x21bd8, 0 }, + { "EMBRDY", 10, 1 }, + { "EMBUMP", 7, 1 }, + { "EMMD", 5, 2 }, + { "EMPAT", 1, 1 }, + { "EMEN", 0, 1 }, + { "XGMAC_PORT_HSS_RXD_DFE_H1", 0x21bdc, 0 }, + { "H1OSN", 14, 2 }, + { "H1OMAG", 8, 6 }, + { "H1ESN", 6, 2 }, + { "H1EMAG", 0, 6 }, + { "XGMAC_PORT_HSS_RXD_DFE_H2", 0x21be0, 0 }, + { "H2OSN", 13, 2 }, + { "H2OMAG", 8, 5 }, + { "H2ESN", 5, 2 }, + { "H2EMAG", 0, 5 }, + { "XGMAC_PORT_HSS_RXD_DFE_H3", 0x21be4, 0 }, + { "H3OSN", 12, 2 }, + { "H3OMAG", 8, 4 }, + { "H3ESN", 4, 2 }, + { "H3EMAG", 0, 4 }, + { "XGMAC_PORT_HSS_RXD_DFE_H4", 0x21be8, 0 }, + { "H4OSN", 12, 2 }, + { "H4OMAG", 8, 4 }, + { "H4ESN", 4, 2 }, + { "H4EMAG", 0, 4 }, + { "XGMAC_PORT_HSS_RXD_DFE_H5", 0x21bec, 0 }, + { "H5OSN", 12, 2 }, + { "H5OMAG", 8, 4 }, + { "H5ESN", 4, 2 }, + { "H5EMAG", 0, 4 }, + { "XGMAC_PORT_HSS_RXD_DAC_DPC", 0x21bf0, 0 }, + { "DPCCVG", 13, 1 }, + { "DACCVG", 12, 1 }, + { "DPCTGT", 9, 3 }, + { "BLKH1T", 8, 1 }, + { "BLKOAE", 7, 1 }, + { "H1TGT", 4, 3 }, + { "OAE", 0, 4 }, + { "XGMAC_PORT_HSS_RXD_DDC", 0x21bf4, 0 }, + { "OLS", 11, 5 }, + { "OES", 6, 5 }, + { "BLKODEC", 5, 1 }, + { "ODEC", 0, 5 }, + { "XGMAC_PORT_HSS_RXD_INTERNAL_STATUS", 0x21bf8, 0 }, + { "BER6", 15, 1 }, + { "BER6VAL", 14, 1 }, + { "BER3VAL", 13, 1 }, + { "DPCCMP", 9, 1 }, + { "DACCMP", 8, 1 }, + { "DDCCMP", 7, 1 }, + { "AERRFLG", 6, 1 }, + { "WERRFLG", 5, 1 }, + { "TRCMP", 4, 1 }, + { "VLCKF", 3, 1 }, + { "ROCADJ", 2, 1 }, + { "ROCCMP", 1, 1 }, + { "OCCMP", 0, 1 }, + { "XGMAC_PORT_HSS_RXD_DFE_FUNC_CTRL", 0x21bfc, 0 }, + { "FDPC", 15, 1 }, + { "FDAC", 14, 1 }, + { "FDDC", 13, 1 }, + { "FNRND", 12, 1 }, + { "FVGAIN", 11, 1 }, + { "FVOFF", 10, 1 }, + { "FSDET", 9, 1 }, + { "FBER6", 8, 1 }, + { "FROTO", 7, 1 }, + { "FH4H5", 6, 1 }, + { "FH2H3", 5, 1 }, + { "FH1", 4, 1 }, + { "FH1SN", 3, 1 }, + { "FNRDF", 2, 1 }, + { "FADAC", 0, 1 }, + { "XGMAC_PORT_HSS_VCO_COARSE_CALIBRATION_0", 0x21c00, 0 }, + { "XGMAC_PORT_HSS_VCO_COARSE_CALIBRATION_1", 0x21c04, 0 }, + { "LDET", 4, 1 }, + { "CCERR", 3, 1 }, + { "CCCMP", 2, 1 }, + { "XGMAC_PORT_HSS_VCO_COARSE_CALIBRATION_2", 0x21c08, 0 }, + { "XGMAC_PORT_HSS_VCO_COARSE_CALIBRATION_3", 0x21c0c, 0 }, + { "VISEL", 4, 1 }, + { "FMIN", 3, 1 }, + { "FMAX", 2, 1 }, + { "CVHOLD", 1, 1 }, + { "TCDIS", 0, 1 }, + { "XGMAC_PORT_HSS_VCO_COARSE_CALIBRATION_4", 0x21c10, 0 }, + { "CMETH", 2, 1 }, + { "RECAL", 1, 1 }, + { "CCLD", 0, 1 }, + { "XGMAC_PORT_HSS_ANALOG_TEST_MUX", 0x21c14, 0 }, + { "XGMAC_PORT_HSS_PORT_EN_0", 0x21c18, 0 }, + { "RXDEN", 7, 1 }, + { "RXCEN", 6, 1 }, + { "TXDEN", 5, 1 }, + { "TXCEN", 4, 1 }, + { "RXBEN", 3, 1 }, + { "RXAEN", 2, 1 }, + { "TXBEN", 1, 1 }, + { "TXAEN", 0, 1 }, + { "XGMAC_PORT_HSS_PORT_RESET_0", 0x21c20, 0 }, + { "RXDRST", 7, 1 }, + { "RXCRST", 6, 1 }, + { "TXDRST", 5, 1 }, + { "TXCRST", 4, 1 }, + { "RXBRST", 3, 1 }, + { "RXARST", 2, 1 }, + { "TXBRST", 1, 1 }, + { "TXARST", 0, 1 }, + { "XGMAC_PORT_HSS_CHARGE_PUMP_CTRL", 0x21c28, 0 }, + { "ENCPIS", 2, 1 }, + { "CPISEL", 0, 2 }, + { "XGMAC_PORT_HSS_BAND_GAP_CTRL", 0x21c2c, 0 }, + { "XGMAC_PORT_HSS_LOFREQ_OVR", 0x21c30, 0 }, + { "LFREQ2", 3, 1 }, + { "LFREQ1", 2, 1 }, + { "LFREQO", 1, 1 }, + { "LFSEL", 0, 1 }, + { "XGMAC_PORT_HSS_VOLTAGE_BOOST_CTRL", 0x21c38, 0 }, + { "PFVAL", 2, 1 }, + { "PFEN", 1, 1 }, + { "VBADJ", 0, 1 }, + { "XGMAC_PORT_HSS_TX_MODE_CFG", 0x21c80, 0 }, + { "BWSEL", 2, 2 }, + { "RTSEL", 0, 2 }, + { "XGMAC_PORT_HSS_TXTEST_CTRL", 0x21c84, 0 }, + { "TWDP", 5, 1 }, + { "TPGRST", 4, 1 }, + { "TPGEN", 3, 1 }, + { "TPSEL", 0, 3 }, + { "XGMAC_PORT_HSS_TX_COEFF_CTRL", 0x21c88, 0 }, + { "AEINVPOL", 6, 1 }, + { "AESOURCE", 5, 1 }, + { "EQMODE", 4, 1 }, + { "OCOEF", 3, 1 }, + { "COEFRST", 2, 1 }, + { "SPEN", 1, 1 }, + { "ALOAD", 0, 1 }, + { "XGMAC_PORT_HSS_TX_DRIVER_MODE", 0x21c8c, 0 }, + { "DRVOFFT", 5, 1 }, + { "SLEW", 2, 3 }, + { "FFE", 0, 2 }, + { "XGMAC_PORT_HSS_TX_DRIVER_OVR_CTRL", 0x21c90, 0 }, + { "VLINC", 7, 1 }, + { "VLDEC", 6, 1 }, + { "LOPWR", 5, 1 }, + { "TDMEN", 4, 1 }, + { "DCCEN", 3, 1 }, + { "VHSEL", 2, 1 }, + { "IDAC", 0, 2 }, + { "XGMAC_PORT_HSS_TX_TDM_BIASGEN_STANDBY_TIMER", 0x21c94, 0 }, + { "XGMAC_PORT_HSS_TX_TDM_BIASGEN_PWRON_TIMER", 0x21c98, 0 }, + { "XGMAC_PORT_HSS_TX_TAP0_COEFF", 0x21ca0, 0 }, + { "XGMAC_PORT_HSS_TX_TAP1_COEFF", 0x21ca4, 0 }, + { "XGMAC_PORT_HSS_TX_TAP2_COEFF", 0x21ca8, 0 }, + { "XGMAC_PORT_HSS_TX_PWR", 0x21cb0, 0 }, + { "XGMAC_PORT_HSS_TX_POLARITY", 0x21cb4, 0 }, + { "TXPOL", 4, 3 }, + { "NTXPOL", 0, 3 }, + { "XGMAC_PORT_HSS_TX_8023AP_AE_CMD", 0x21cb8, 0 }, + { "CXPRESET", 13, 1 }, + { "CXINIT", 12, 1 }, + { "C2UPDT", 4, 2 }, + { "C1UPDT", 2, 2 }, + { "C0UPDT", 0, 2 }, + { "XGMAC_PORT_HSS_TX_8023AP_AE_STATUS", 0x21cbc, 0 }, + { "C2STAT", 4, 2 }, + { "C1STAT", 2, 2 }, + { "C0STAT", 0, 2 }, + { "XGMAC_PORT_HSS_TX_TAP0_IDAC_OVR", 0x21cc0, 0 }, + { "XGMAC_PORT_HSS_TX_TAP1_IDAC_OVR", 0x21cc4, 0 }, + { "XGMAC_PORT_HSS_TX_TAP2_IDAC_OVR", 0x21cc8, 0 }, + { "XGMAC_PORT_HSS_TX_PWR_DAC_OVR", 0x21cd0, 0 }, + { "OPEN", 7, 1 }, + { "OPVAL", 0, 5 }, + { "XGMAC_PORT_HSS_TX_PWR_DAC", 0x21cd4, 0 }, + { "XGMAC_PORT_HSS_TX_TAP0_IDAC_APP", 0x21ce0, 0 }, + { "XGMAC_PORT_HSS_TX_TAP1_IDAC_APP", 0x21ce4, 0 }, + { "XGMAC_PORT_HSS_TX_TAP2_IDAC_APP", 0x21ce8, 0 }, + { "XGMAC_PORT_HSS_TX_SEG_DIS_APP", 0x21cf0, 0 }, + { "XGMAC_PORT_HSS_TX_EXT_ADDR_DATA", 0x21cf8, 0 }, + { "XGMAC_PORT_HSS_TX_EXT_ADDR", 0x21cfc, 0 }, + { "XADDR", 2, 4 }, + { "XWR", 0, 1 }, + { "XGMAC_PORT_HSS_RX_CFG_MODE", 0x21d00, 0 }, + { "BW810", 8, 1 }, + { "AUXCLK", 7, 1 }, + { "DMSEL", 4, 3 }, + { "BWSEL", 2, 2 }, + { "RTSEL", 0, 2 }, + { "XGMAC_PORT_HSS_RXTEST_CTRL", 0x21d04, 0 }, + { "RCLKEN", 15, 1 }, + { "RRATE", 13, 2 }, + { "LBFRCERROR", 10, 1 }, + { "LBERROR", 9, 1 }, + { "LBSYNC", 8, 1 }, + { "FDWRAPCLK", 7, 1 }, + { "FDWRAP", 6, 1 }, + { "PRST", 4, 1 }, + { "PCHKEN", 3, 1 }, + { "PRBSSEL", 0, 3 }, + { "XGMAC_PORT_HSS_RX_PH_ROTATOR_CTRL", 0x21d08, 0 }, + { "FTHROT", 12, 4 }, + { "RTHROT", 11, 1 }, + { "FILTCTL", 7, 4 }, + { "RSRVO", 5, 2 }, + { "EXTEL", 4, 1 }, + { "RSTONSTUCK", 3, 1 }, + { "FREEZEFW", 2, 1 }, + { "RESETFW", 1, 1 }, + { "SSCENABLE", 0, 1 }, + { "XGMAC_PORT_HSS_RX_PH_ROTATOR_OFFSET_CTRL", 0x21d0c, 0 }, + { "RSNP", 11, 1 }, + { "TSOEN", 10, 1 }, + { "OFFEN", 9, 1 }, + { "TMSCAL", 7, 2 }, + { "APADJ", 6, 1 }, + { "RSEL", 5, 1 }, + { "PHOFFS", 0, 5 }, + { "XGMAC_PORT_HSS_RX_PH_ROTATOR_POSITION1", 0x21d10, 0 }, + { "ROT0A", 8, 6 }, + { "RTSEL", 0, 6 }, + { "XGMAC_PORT_HSS_RX_PH_ROTATOR_POSITION2", 0x21d14, 0 }, + { "XGMAC_PORT_HSS_RX_PH_ROTATOR_STATIC_PH_OFFSET", 0x21d18, 0 }, + { "RCALER", 15, 1 }, + { "RAOOFF", 10, 5 }, + { "RAEOFF", 5, 5 }, + { "RDOFF", 0, 5 }, + { "XGMAC_PORT_HSS_RX_SIGDET_CTRL", 0x21d1c, 0 }, + { "SIGNSD", 13, 2 }, + { "DACSD", 8, 5 }, + { "SDPDN", 6, 1 }, + { "SIGDET", 5, 1 }, + { "SDLVL", 0, 5 }, + { "XGMAC_PORT_HSS_RX_DFE_CTRL", 0x21d20, 0 }, + { "REQCMP", 15, 1 }, + { "DFEREQ", 14, 1 }, + { "SPCEN", 13, 1 }, + { "GATEEN", 12, 1 }, + { "SPIFMT", 9, 3 }, + { "DFEPWR", 6, 3 }, + { "STNDBY", 5, 1 }, + { "FRCH", 4, 1 }, + { "NONRND", 3, 1 }, + { "NONRNF", 2, 1 }, + { "FSTLCK", 1, 1 }, + { "DFERST", 0, 1 }, + { "XGMAC_PORT_HSS_RX_DFE_DATA_EDGE_SAMPLE", 0x21d24, 0 }, + { "ESAMP", 8, 8 }, + { "DSAMP", 0, 8 }, + { "XGMAC_PORT_HSS_RX_DFE_AMP_SAMPLE", 0x21d28, 0 }, + { "SMODE", 8, 4 }, + { "ADCORR", 7, 1 }, + { "TRAINEN", 6, 1 }, + { "ASAMPQ", 3, 3 }, + { "ASAMP", 0, 3 }, + { "XGMAC_PORT_HSS_RX_VGA_CTRL1", 0x21d2c, 0 }, + { "POLE", 12, 2 }, + { "PEAK", 8, 3 }, + { "VOFFSN", 6, 2 }, + { "VOFFA", 0, 6 }, + { "XGMAC_PORT_HSS_RX_VGA_CTRL2", 0x21d30, 0 }, + { "SHORTV", 10, 1 }, + { "VGAIN", 0, 4 }, + { "XGMAC_PORT_HSS_RX_VGA_CTRL3", 0x21d34, 0 }, + { "HBND1", 10, 1 }, + { "HBND0", 9, 1 }, + { "VLCKD", 8, 1 }, + { "VLCKDF", 7, 1 }, + { "AMAXT", 0, 7 }, + { "XGMAC_PORT_HSS_RX_DFE_D00_D01_OFFSET", 0x21d38, 0 }, + { "D01SN", 13, 2 }, + { "D01AMP", 8, 5 }, + { "D00SN", 5, 2 }, + { "D00AMP", 0, 5 }, + { "XGMAC_PORT_HSS_RX_DFE_D10_D11_OFFSET", 0x21d3c, 0 }, + { "D11SN", 13, 2 }, + { "D11AMP", 8, 5 }, + { "D10SN", 5, 2 }, + { "D10AMP", 0, 5 }, + { "XGMAC_PORT_HSS_RX_DFE_E0_E1_OFFSET", 0x21d40, 0 }, + { "E1SN", 13, 2 }, + { "E1AMP", 8, 5 }, + { "E0SN", 5, 2 }, + { "E0AMP", 0, 5 }, + { "XGMAC_PORT_HSS_RX_DACA_OFFSET", 0x21d44, 0 }, + { "AOFFO", 8, 6 }, + { "AOFFE", 0, 6 }, + { "XGMAC_PORT_HSS_RX_DACAP_DAC_AN_OFFSET", 0x21d48, 0 }, + { "DACAN", 8, 8 }, + { "DACAP", 0, 8 }, + { "XGMAC_PORT_HSS_RX_DACA_MIN", 0x21d4c, 0 }, + { "DACAZ", 8, 8 }, + { "DACAM", 0, 8 }, + { "XGMAC_PORT_HSS_RX_ADAC_CTRL", 0x21d50, 0 }, + { "ADSN", 7, 2 }, + { "ADMAG", 0, 7 }, + { "XGMAC_PORT_HSS_RX_DIGITAL_EYE_CTRL", 0x21d54, 0 }, + { "BLKAZ", 15, 1 }, + { "WIDTH", 10, 5 }, + { "MINWIDTH", 5, 5 }, + { "MINAMP", 0, 5 }, + { "XGMAC_PORT_HSS_RX_DIGITAL_EYE_METRICS", 0x21d58, 0 }, + { "EMBRDY", 10, 1 }, + { "EMBUMP", 7, 1 }, + { "EMMD", 5, 2 }, + { "EMPAT", 1, 1 }, + { "EMEN", 0, 1 }, + { "XGMAC_PORT_HSS_RX_DFE_H1", 0x21d5c, 0 }, + { "H1OSN", 14, 2 }, + { "H1OMAG", 8, 6 }, + { "H1ESN", 6, 2 }, + { "H1EMAG", 0, 6 }, + { "XGMAC_PORT_HSS_RX_DFE_H2", 0x21d60, 0 }, + { "H2OSN", 13, 2 }, + { "H2OMAG", 8, 5 }, + { "H2ESN", 5, 2 }, + { "H2EMAG", 0, 5 }, + { "XGMAC_PORT_HSS_RX_DFE_H3", 0x21d64, 0 }, + { "H3OSN", 12, 2 }, + { "H3OMAG", 8, 4 }, + { "H3ESN", 4, 2 }, + { "H3EMAG", 0, 4 }, + { "XGMAC_PORT_HSS_RX_DFE_H4", 0x21d68, 0 }, + { "H4OSN", 12, 2 }, + { "H4OMAG", 8, 4 }, + { "H4ESN", 4, 2 }, + { "H4EMAG", 0, 4 }, + { "XGMAC_PORT_HSS_RX_DFE_H5", 0x21d6c, 0 }, + { "H5OSN", 12, 2 }, + { "H5OMAG", 8, 4 }, + { "H5ESN", 4, 2 }, + { "H5EMAG", 0, 4 }, + { "XGMAC_PORT_HSS_RX_DAC_DPC", 0x21d70, 0 }, + { "DPCCVG", 13, 1 }, + { "DACCVG", 12, 1 }, + { "DPCTGT", 9, 3 }, + { "BLKH1T", 8, 1 }, + { "BLKOAE", 7, 1 }, + { "H1TGT", 4, 3 }, + { "OAE", 0, 4 }, + { "XGMAC_PORT_HSS_RX_DDC", 0x21d74, 0 }, + { "OLS", 11, 5 }, + { "OES", 6, 5 }, + { "BLKODEC", 5, 1 }, + { "ODEC", 0, 5 }, + { "XGMAC_PORT_HSS_RX_INTERNAL_STATUS", 0x21d78, 0 }, + { "BER6", 15, 1 }, + { "BER6VAL", 14, 1 }, + { "BER3VAL", 13, 1 }, + { "DPCCMP", 9, 1 }, + { "DACCMP", 8, 1 }, + { "DDCCMP", 7, 1 }, + { "AERRFLG", 6, 1 }, + { "WERRFLG", 5, 1 }, + { "TRCMP", 4, 1 }, + { "VLCKF", 3, 1 }, + { "ROCADJ", 2, 1 }, + { "ROCCMP", 1, 1 }, + { "OCCMP", 0, 1 }, + { "XGMAC_PORT_HSS_RX_DFE_FUNC_CTRL", 0x21d7c, 0 }, + { "FDPC", 15, 1 }, + { "FDAC", 14, 1 }, + { "FDDC", 13, 1 }, + { "FNRND", 12, 1 }, + { "FVGAIN", 11, 1 }, + { "FVOFF", 10, 1 }, + { "FSDET", 9, 1 }, + { "FBER6", 8, 1 }, + { "FROTO", 7, 1 }, + { "FH4H5", 6, 1 }, + { "FH2H3", 5, 1 }, + { "FH1", 4, 1 }, + { "FH1SN", 3, 1 }, + { "FNRDF", 2, 1 }, + { "FADAC", 0, 1 }, + { "XGMAC_PORT_HSS_TXRX_CFG_MODE", 0x21e00, 0 }, + { "BW810", 8, 1 }, + { "AUXCLK", 7, 1 }, + { "DMSEL", 4, 3 }, + { "BWSEL", 2, 2 }, + { "RTSEL", 0, 2 }, + { "XGMAC_PORT_HSS_TXRXTEST_CTRL", 0x21e04, 0 }, + { "RCLKEN", 15, 1 }, + { "RRATE", 13, 2 }, + { "LBFRCERROR", 10, 1 }, + { "LBERROR", 9, 1 }, + { "LBSYNC", 8, 1 }, + { "FDWRAPCLK", 7, 1 }, + { "FDWRAP", 6, 1 }, + { "PRST", 4, 1 }, + { "PCHKEN", 3, 1 }, + { "PRBSSEL", 0, 3 }, + { "XGMAC_PORT_CFG", 0x23000, 0 }, + { "XGMII_Clk_Sel", 29, 3 }, + { "SinkTx", 27, 1 }, + { "SinkTxOnLinkDown", 26, 1 }, + { "xg2g_speed_mode", 25, 1 }, + { "LoopNoFwd", 24, 1 }, + { "XGM_Tx_pause_size", 23, 1 }, + { "XGM_Tx_pause_frame", 22, 1 }, + { "XGM_Tx_Disable_Pre", 21, 1 }, + { "XGM_Tx_Disable_Crc", 20, 1 }, + { "Smux_Rx_Loop", 19, 1 }, + { "Rx_Lane_Swap", 18, 1 }, + { "Tx_Lane_Swap", 17, 1 }, + { "Signal_Det", 14, 1 }, + { "Pmux_Rx_Loop", 13, 1 }, + { "Pmux_Tx_Loop", 12, 1 }, + { "XGM_Rx_Sel", 10, 2 }, + { "PCS_Tx_Sel", 8, 2 }, + { "XAUI20_Rem_Pre", 5, 1 }, + { "XAUI20_XGMII_Sel", 4, 1 }, + { "Rx_Byte_Swap", 3, 1 }, + { "Tx_Byte_Swap", 2, 1 }, + { "Port_Sel", 0, 1 }, + { "XGMAC_PORT_RESET_CTRL", 0x23004, 0 }, + { "AuxExt_Reset", 10, 1 }, + { "TXFIFO_Reset", 9, 1 }, + { "RXFIFO_Reset", 8, 1 }, + { "BEAN_Reset", 7, 1 }, + { "XAUI_Reset", 6, 1 }, + { "AE_Reset", 5, 1 }, + { "XGM_Reset", 4, 1 }, + { "XG2G_Reset", 3, 1 }, + { "WOL_Reset", 2, 1 }, + { "XFI_PCS_Reset", 1, 1 }, + { "HSS_Reset", 0, 1 }, + { "XGMAC_PORT_LED_CFG", 0x23008, 0 }, + { "Led1_Cfg", 5, 3 }, + { "Led1_Polarity_Inv", 4, 1 }, + { "Led0_Cfg", 1, 3 }, + { "Led0_Polarity_Inv", 0, 1 }, + { "XGMAC_PORT_LED_COUNTHI", 0x2300c, 0 }, + { "XGMAC_PORT_LED_COUNTLO", 0x23010, 0 }, + { "XGMAC_PORT_DEBUG_CFG", 0x23014, 0 }, + { "XGMAC_PORT_CFG2", 0x23018, 0 }, + { "Rx_Polarity_Inv", 28, 4 }, + { "Tx_Polarity_Inv", 24, 4 }, + { "InstanceNum", 22, 2 }, + { "StopOnPerr", 21, 1 }, + { "MACTxEn", 20, 1 }, + { "MACRxEn", 19, 1 }, + { "PatEn", 18, 1 }, + { "MagicEn", 17, 1 }, + { "TX_IPG", 4, 13 }, + { "AEC_PMA_TX_READY", 1, 1 }, + { "AEC_PMA_RX_READY", 0, 1 }, + { "XGMAC_PORT_PKT_COUNT", 0x2301c, 0 }, + { "tx_sop_count", 24, 8 }, + { "tx_eop_count", 16, 8 }, + { "rx_sop_count", 8, 8 }, + { "rx_eop_count", 0, 8 }, + { "XGMAC_PORT_PERR_INJECT", 0x23020, 0 }, + { "MemSel", 1, 1 }, + { "InjectDataErr", 0, 1 }, + { "XGMAC_PORT_MAGIC_MACID_LO", 0x23024, 0 }, + { "XGMAC_PORT_MAGIC_MACID_HI", 0x23028, 0 }, + { "XGMAC_PORT_BUILD_REVISION", 0x2302c, 0 }, + { "XGMAC_PORT_XGMII_SE_COUNT", 0x23030, 0 }, + { "TxSop", 24, 8 }, + { "TxEop", 16, 8 }, + { "RxSop", 8, 8 }, + { "RxEop", 0, 8 }, + { "XGMAC_PORT_LINK_STATUS", 0x23034, 0 }, + { "remflt", 3, 1 }, + { "locflt", 2, 1 }, + { "linkup", 1, 1 }, + { "linkdn", 0, 1 }, + { "XGMAC_PORT_CHECKIN", 0x23038, 0 }, + { "Preamble", 1, 1 }, + { "CheckIn", 0, 1 }, + { "XGMAC_PORT_FAULT_TEST", 0x2303c, 0 }, + { "FltType", 1, 1 }, + { "FltCtrl", 0, 1 }, + { "XGMAC_PORT_SPARE", 0x23040, 0 }, + { "XGMAC_PORT_HSS_SIGDET_STATUS", 0x23044, 0 }, + { "XGMAC_PORT_EXT_LOS_STATUS", 0x23048, 0 }, + { "XGMAC_PORT_EXT_LOS_CTRL", 0x2304c, 0 }, + { "XGMAC_PORT_FPGA_PAUSE_CTL", 0x23050, 0 }, + { "CTL", 31, 1 }, + { "HWM", 13, 13 }, + { "LWM", 0, 13 }, + { "XGMAC_PORT_FPGA_ERRPKT_CNT", 0x23054, 0 }, + { "XGMAC_PORT_LA_TX_0", 0x23058, 0 }, + { "XGMAC_PORT_LA_RX_0", 0x2305c, 0 }, + { "XGMAC_PORT_FPGA_LA_CTL", 0x23060, 0 }, + { "rxrst", 5, 1 }, + { "txrst", 4, 1 }, + { "xgmii", 3, 1 }, + { "pause", 2, 1 }, + { "stopErr", 1, 1 }, + { "stop", 0, 1 }, + { "XGMAC_PORT_EPIO_DATA0", 0x230c0, 0 }, + { "XGMAC_PORT_EPIO_DATA1", 0x230c4, 0 }, + { "XGMAC_PORT_EPIO_DATA2", 0x230c8, 0 }, + { "XGMAC_PORT_EPIO_DATA3", 0x230cc, 0 }, + { "XGMAC_PORT_EPIO_OP", 0x230d0, 0 }, + { "Busy", 31, 1 }, + { "Write", 8, 1 }, + { "Address", 0, 8 }, + { "XGMAC_PORT_WOL_STATUS", 0x230d4, 0 }, + { "MagicDetected", 31, 1 }, + { "PatDetected", 30, 1 }, + { "ClearMagic", 4, 1 }, + { "ClearMatch", 3, 1 }, + { "MatchedFilter", 0, 3 }, + { "XGMAC_PORT_INT_EN", 0x230d8, 0 }, + { "ext_los", 28, 1 }, + { "incmptbl_link", 27, 1 }, + { "PatDetWake", 26, 1 }, + { "MagicWake", 25, 1 }, + { "SigDetChg", 24, 1 }, + { "PCSR_fec_corr", 23, 1 }, + { "AE_Train_Local", 22, 1 }, + { "HSSPLL_LOCK", 21, 1 }, + { "HSSPRT_READY", 20, 1 }, + { "AutoNeg_Done", 19, 1 }, + { "PCSR_Hi_BER", 18, 1 }, + { "PCSR_FEC_Error", 17, 1 }, + { "PCSR_Link_Fail", 16, 1 }, + { "XAUI_Dec_Error", 15, 1 }, + { "XAUI_Link_Fail", 14, 1 }, + { "PCS_CTC_Error", 13, 1 }, + { "PCS_Link_Good", 12, 1 }, + { "PCS_Link_Fail", 11, 1 }, + { "RxFifoOverFlow", 10, 1 }, + { "HSSPRBSErr", 9, 1 }, + { "HSSEyeQual", 8, 1 }, + { "RemoteFault", 7, 1 }, + { "LocalFault", 6, 1 }, + { "MAC_Link_Down", 5, 1 }, + { "MAC_Link_Up", 4, 1 }, + { "BEAN_Int", 3, 1 }, + { "XGM_Int", 2, 1 }, + { "TxFifo_prty_err", 1, 1 }, + { "RxFifo_prty_err", 0, 1 }, + { "XGMAC_PORT_INT_CAUSE", 0x230dc, 0 }, + { "ext_los", 28, 1 }, + { "incmptbl_link", 27, 1 }, + { "PatDetWake", 26, 1 }, + { "MagicWake", 25, 1 }, + { "SigDetChg", 24, 1 }, + { "PCSR_fec_corr", 23, 1 }, + { "AE_Train_Local", 22, 1 }, + { "HSSPLL_LOCK", 21, 1 }, + { "HSSPRT_READY", 20, 1 }, + { "AutoNeg_Done", 19, 1 }, + { "PCSR_Hi_BER", 18, 1 }, + { "PCSR_FEC_Error", 17, 1 }, + { "PCSR_Link_Fail", 16, 1 }, + { "XAUI_Dec_Error", 15, 1 }, + { "XAUI_Link_Fail", 14, 1 }, + { "PCS_CTC_Error", 13, 1 }, + { "PCS_Link_Good", 12, 1 }, + { "PCS_Link_Fail", 11, 1 }, + { "RxFifoOverFlow", 10, 1 }, + { "HSSPRBSErr", 9, 1 }, + { "HSSEyeQual", 8, 1 }, + { "RemoteFault", 7, 1 }, + { "LocalFault", 6, 1 }, + { "MAC_Link_Down", 5, 1 }, + { "MAC_Link_Up", 4, 1 }, + { "BEAN_Int", 3, 1 }, + { "XGM_Int", 2, 1 }, + { "TxFifo_prty_err", 1, 1 }, + { "RxFifo_prty_err", 0, 1 }, + { "XGMAC_PORT_HSS_CFG0", 0x230e0, 0 }, + { "TXDTS", 31, 1 }, + { "TXCTS", 30, 1 }, + { "TXBTS", 29, 1 }, + { "TXATS", 28, 1 }, + { "TXDOBS", 27, 1 }, + { "TXCOBS", 26, 1 }, + { "TXBOBS", 25, 1 }, + { "TXAOBS", 24, 1 }, + { "HSSREFCLKSEL", 20, 1 }, + { "HSSAVDHI", 17, 1 }, + { "HSSRXTS", 16, 1 }, + { "HSSTXACMODE", 15, 1 }, + { "HSSRXACMODE", 14, 1 }, + { "HSSRESYNC", 13, 1 }, + { "HSSRECCAL", 12, 1 }, + { "HSSPDWNPLL", 11, 1 }, + { "HSSDIVSEL", 9, 2 }, + { "HSSREFDIV", 8, 1 }, + { "HSSPLLBYP", 7, 1 }, + { "HSSLOFREQPLL", 6, 1 }, + { "HSSLOFREQ2PLL", 5, 1 }, + { "HSSEXTC16SEL", 4, 1 }, + { "HSSRSTCONFIG", 1, 3 }, + { "HSSPRBSEN", 0, 1 }, + { "XGMAC_PORT_HSS_CFG1", 0x230e4, 0 }, + { "RXDPRBSRST", 28, 1 }, + { "RXDPRBSEN", 27, 1 }, + { "RXDPRBSFRCERR", 26, 1 }, + { "TXDPRBSRST", 25, 1 }, + { "TXDPRBSEN", 24, 1 }, + { "RXCPRBSRST", 20, 1 }, + { "RXCPRBSEN", 19, 1 }, + { "RXCPRBSFRCERR", 18, 1 }, + { "TXCPRBSRST", 17, 1 }, + { "TXCPRBSEN", 16, 1 }, + { "RXBPRBSRST", 12, 1 }, + { "RXBPRBSEN", 11, 1 }, + { "RXBPRBSFRCERR", 10, 1 }, + { "TXBPRBSRST", 9, 1 }, + { "TXBPRBSEN", 8, 1 }, + { "RXAPRBSRST", 4, 1 }, + { "RXAPRBSEN", 3, 1 }, + { "RXAPRBSFRCERR", 2, 1 }, + { "TXAPRBSRST", 1, 1 }, + { "TXAPRBSEN", 0, 1 }, + { "XGMAC_PORT_HSS_CFG2", 0x230e8, 0 }, + { "RXDDATASYNC", 23, 1 }, + { "RXCDATASYNC", 22, 1 }, + { "RXBDATASYNC", 21, 1 }, + { "RXADATASYNC", 20, 1 }, + { "RXDEARLYIN", 19, 1 }, + { "RXDLATEIN", 18, 1 }, + { "RXDPHSLOCK", 17, 1 }, + { "RXDPHSDNIN", 16, 1 }, + { "RXDPHSUPIN", 15, 1 }, + { "RXCEARLYIN", 14, 1 }, + { "RXCLATEIN", 13, 1 }, + { "RXCPHSLOCK", 12, 1 }, + { "RXCPHSDNIN", 11, 1 }, + { "RXCPHSUPIN", 10, 1 }, + { "RXBEARLYIN", 9, 1 }, + { "RXBLATEIN", 8, 1 }, + { "RXBPHSLOCK", 7, 1 }, + { "RXBPHSDNIN", 6, 1 }, + { "RXBPHSUPIN", 5, 1 }, + { "RXAEARLYIN", 4, 1 }, + { "RXALATEIN", 3, 1 }, + { "RXAPHSLOCK", 2, 1 }, + { "RXAPHSDNIN", 1, 1 }, + { "RXAPHSUPIN", 0, 1 }, + { "XGMAC_PORT_HSS_STATUS", 0x230ec, 0 }, + { "RXDPRBSSYNC", 15, 1 }, + { "RXCPRBSSYNC", 14, 1 }, + { "RXBPRBSSYNC", 13, 1 }, + { "RXAPRBSSYNC", 12, 1 }, + { "RXDPRBSERR", 11, 1 }, + { "RXCPRBSERR", 10, 1 }, + { "RXBPRBSERR", 9, 1 }, + { "RXAPRBSERR", 8, 1 }, + { "RXDSIGDET", 7, 1 }, + { "RXCSIGDET", 6, 1 }, + { "RXBSIGDET", 5, 1 }, + { "RXASIGDET", 4, 1 }, + { "HSSPLLLOCK", 1, 1 }, + { "HSSPRTREADY", 0, 1 }, + { "XGMAC_PORT_XGM_TX_CTRL", 0x23200, 0 }, + { "SendPause", 2, 1 }, + { "SendZeroPause", 1, 1 }, + { "TxEn", 0, 1 }, + { "XGMAC_PORT_XGM_TX_CFG", 0x23204, 0 }, + { "CRCCal", 8, 2 }, + { "DisDefIdleCnt", 7, 1 }, + { "DecAvgTxIPG", 6, 1 }, + { "UnidirTxEn", 5, 1 }, + { "CfgClkSpeed", 2, 3 }, + { "StretchMode", 1, 1 }, + { "TxPauseEn", 0, 1 }, + { "XGMAC_PORT_XGM_TX_PAUSE_QUANTA", 0x23208, 0 }, + { "XGMAC_PORT_XGM_RX_CTRL", 0x2320c, 0 }, + { "XGMAC_PORT_XGM_RX_CFG", 0x23210, 0 }, + { "CRCCal", 16, 2 }, + { "LocalFault", 15, 1 }, + { "RemoteFault", 14, 1 }, + { "LenErrFrameDis", 13, 1 }, + { "Con802_3Preamble", 12, 1 }, + { "EnNon802_3Preamble", 11, 1 }, + { "CopyPreamble", 10, 1 }, + { "DisPauseFrames", 9, 1 }, + { "En1536BFrames", 8, 1 }, + { "EnJumbo", 7, 1 }, + { "RmFCS", 6, 1 }, + { "DisNonVlan", 5, 1 }, + { "EnExtMatch", 4, 1 }, + { "EnHashUcast", 3, 1 }, + { "EnHashMcast", 2, 1 }, + { "DisBCast", 1, 1 }, + { "CopyAllFrames", 0, 1 }, + { "XGMAC_PORT_XGM_RX_HASH_LOW", 0x23214, 0 }, + { "XGMAC_PORT_XGM_RX_HASH_HIGH", 0x23218, 0 }, + { "XGMAC_PORT_XGM_RX_EXACT_MATCH_LOW_1", 0x2321c, 0 }, + { "XGMAC_PORT_XGM_RX_EXACT_MATCH_HIGH_1", 0x23220, 0 }, + { "XGMAC_PORT_XGM_RX_EXACT_MATCH_LOW_2", 0x23224, 0 }, + { "XGMAC_PORT_XGM_RX_EXACT_MATCH_HIGH_2", 0x23228, 0 }, + { "XGMAC_PORT_XGM_RX_EXACT_MATCH_LOW_3", 0x2322c, 0 }, + { "XGMAC_PORT_XGM_RX_EXACT_MATCH_HIGH_3", 0x23230, 0 }, + { "XGMAC_PORT_XGM_RX_EXACT_MATCH_LOW_4", 0x23234, 0 }, + { "XGMAC_PORT_XGM_RX_EXACT_MATCH_HIGH_4", 0x23238, 0 }, + { "XGMAC_PORT_XGM_RX_EXACT_MATCH_LOW_5", 0x2323c, 0 }, + { "XGMAC_PORT_XGM_RX_EXACT_MATCH_HIGH_5", 0x23240, 0 }, + { "XGMAC_PORT_XGM_RX_EXACT_MATCH_LOW_6", 0x23244, 0 }, + { "XGMAC_PORT_XGM_RX_EXACT_MATCH_HIGH_6", 0x23248, 0 }, + { "XGMAC_PORT_XGM_RX_EXACT_MATCH_LOW_7", 0x2324c, 0 }, + { "XGMAC_PORT_XGM_RX_EXACT_MATCH_HIGH_7", 0x23250, 0 }, + { "XGMAC_PORT_XGM_RX_EXACT_MATCH_LOW_8", 0x23254, 0 }, + { "XGMAC_PORT_XGM_RX_EXACT_MATCH_HIGH_8", 0x23258, 0 }, + { "XGMAC_PORT_XGM_RX_TYPE_MATCH_1", 0x2325c, 0 }, + { "EnTypeMatch", 31, 1 }, + { "type", 0, 16 }, + { "XGMAC_PORT_XGM_RX_TYPE_MATCH_2", 0x23260, 0 }, + { "EnTypeMatch", 31, 1 }, + { "type", 0, 16 }, + { "XGMAC_PORT_XGM_RX_TYPE_MATCH_3", 0x23264, 0 }, + { "EnTypeMatch", 31, 1 }, + { "type", 0, 16 }, + { "XGMAC_PORT_XGM_RX_TYPE_MATCH_4", 0x23268, 0 }, + { "EnTypeMatch", 31, 1 }, + { "type", 0, 16 }, + { "XGMAC_PORT_XGM_INT_STATUS", 0x2326c, 0 }, + { "XGMIIExtInt", 10, 1 }, + { "LinkFaultChange", 9, 1 }, + { "PhyFrameComplete", 8, 1 }, + { "PauseFrameTxmt", 7, 1 }, + { "PauseCntrTimeOut", 6, 1 }, + { "Non0PauseRcvd", 5, 1 }, + { "StatOFlow", 4, 1 }, + { "TxErrFIFO", 3, 1 }, + { "TxUFlow", 2, 1 }, + { "FrameTxmt", 1, 1 }, + { "FrameRcvd", 0, 1 }, + { "XGMAC_PORT_XGM_INT_MASK", 0x23270, 0 }, + { "XGMIIExtInt", 10, 1 }, + { "LinkFaultChange", 9, 1 }, + { "PhyFrameComplete", 8, 1 }, + { "PauseFrameTxmt", 7, 1 }, + { "PauseCntrTimeOut", 6, 1 }, + { "Non0PauseRcvd", 5, 1 }, + { "StatOFlow", 4, 1 }, + { "TxErrFIFO", 3, 1 }, + { "TxUFlow", 2, 1 }, + { "FrameTxmt", 1, 1 }, + { "FrameRcvd", 0, 1 }, + { "XGMAC_PORT_XGM_INT_EN", 0x23274, 0 }, + { "XGMIIExtInt", 10, 1 }, + { "LinkFaultChange", 9, 1 }, + { "PhyFrameComplete", 8, 1 }, + { "PauseFrameTxmt", 7, 1 }, + { "PauseCntrTimeOut", 6, 1 }, + { "Non0PauseRcvd", 5, 1 }, + { "StatOFlow", 4, 1 }, + { "TxErrFIFO", 3, 1 }, + { "TxUFlow", 2, 1 }, + { "FrameTxmt", 1, 1 }, + { "FrameRcvd", 0, 1 }, + { "XGMAC_PORT_XGM_INT_DISABLE", 0x23278, 0 }, + { "XGMIIExtInt", 10, 1 }, + { "LinkFaultChange", 9, 1 }, + { "PhyFrameComplete", 8, 1 }, + { "PauseFrameTxmt", 7, 1 }, + { "PauseCntrTimeOut", 6, 1 }, + { "Non0PauseRcvd", 5, 1 }, + { "StatOFlow", 4, 1 }, + { "TxErrFIFO", 3, 1 }, + { "TxUFlow", 2, 1 }, + { "FrameTxmt", 1, 1 }, + { "FrameRcvd", 0, 1 }, + { "XGMAC_PORT_XGM_TX_PAUSE_TIMER", 0x2327c, 0 }, + { "XGMAC_PORT_XGM_STAT_CTRL", 0x23280, 0 }, + { "ReadSnpShot", 4, 1 }, + { "TakeSnpShot", 3, 1 }, + { "ClrStats", 2, 1 }, + { "IncrStats", 1, 1 }, + { "EnTestModeWr", 0, 1 }, + { "XGMAC_PORT_XGM_MDIO_CTRL", 0x23284, 0 }, + { "FrameType", 30, 2 }, + { "Operation", 28, 2 }, + { "PortAddr", 23, 5 }, + { "DevAddr", 18, 5 }, + { "Resrv", 16, 2 }, + { "Data", 0, 16 }, + { "XGMAC_PORT_XGM_MODULE_ID", 0x232fc, 0 }, + { "ModuleID", 16, 16 }, + { "ModuleRev", 0, 16 }, + { "XGMAC_PORT_XGM_STAT_TX_BYTE_LOW", 0x23300, 0 }, + { "XGMAC_PORT_XGM_STAT_TX_BYTE_HIGH", 0x23304, 0 }, + { "XGMAC_PORT_XGM_STAT_TX_FRAME_LOW", 0x23308, 0 }, + { "XGMAC_PORT_XGM_STAT_TX_FRAME_HIGH", 0x2330c, 0 }, + { "XGMAC_PORT_XGM_STAT_TX_BCAST", 0x23310, 0 }, + { "XGMAC_PORT_XGM_STAT_TX_MCAST", 0x23314, 0 }, + { "XGMAC_PORT_XGM_STAT_TX_PAUSE", 0x23318, 0 }, + { "XGMAC_PORT_XGM_STAT_TX_64B_FRAMES", 0x2331c, 0 }, + { "XGMAC_PORT_XGM_STAT_TX_65_127B_FRAMES", 0x23320, 0 }, + { "XGMAC_PORT_XGM_STAT_TX_128_255B_FRAMES", 0x23324, 0 }, + { "XGMAC_PORT_XGM_STAT_TX_256_511B_FRAMES", 0x23328, 0 }, + { "XGMAC_PORT_XGM_STAT_TX_512_1023B_FRAMES", 0x2332c, 0 }, + { "XGMAC_PORT_XGM_STAT_TX_1024_1518B_FRAMES", 0x23330, 0 }, + { "XGMAC_PORT_XGM_STAT_TX_1519_MAXB_FRAMES", 0x23334, 0 }, + { "XGMAC_PORT_XGM_STAT_TX_ERR_FRAMES", 0x23338, 0 }, + { "XGMAC_PORT_XGM_STAT_RX_BYTES_LOW", 0x2333c, 0 }, + { "XGMAC_PORT_XGM_STAT_RX_BYTES_HIGH", 0x23340, 0 }, + { "XGMAC_PORT_XGM_STAT_RX_FRAMES_LOW", 0x23344, 0 }, + { "XGMAC_PORT_XGM_STAT_RX_FRAMES_HIGH", 0x23348, 0 }, + { "XGMAC_PORT_XGM_STAT_RX_BCAST_FRAMES", 0x2334c, 0 }, + { "XGMAC_PORT_XGM_STAT_RX_MCAST_FRAMES", 0x23350, 0 }, + { "XGMAC_PORT_XGM_STAT_RX_PAUSE_FRAMES", 0x23354, 0 }, + { "XGMAC_PORT_XGM_STAT_RX_64B_FRAMES", 0x23358, 0 }, + { "XGMAC_PORT_XGM_STAT_RX_65_127B_FRAMES", 0x2335c, 0 }, + { "XGMAC_PORT_XGM_STAT_RX_128_255B_FRAMES", 0x23360, 0 }, + { "XGMAC_PORT_XGM_STAT_RX_256_511B_FRAMES", 0x23364, 0 }, + { "XGMAC_PORT_XGM_STAT_RX_512_1023B_FRAMES", 0x23368, 0 }, + { "XGMAC_PORT_XGM_STAT_RX_1024_1518B_FRAMES", 0x2336c, 0 }, + { "XGMAC_PORT_XGM_STAT_RX_1519_MAXB_FRAMES", 0x23370, 0 }, + { "XGMAC_PORT_XGM_STAT_RX_SHORT_FRAMES", 0x23374, 0 }, + { "XGMAC_PORT_XGM_STAT_RX_OVERSIZE_FRAMES", 0x23378, 0 }, + { "XGMAC_PORT_XGM_STAT_RX_JABBER_FRAMES", 0x2337c, 0 }, + { "XGMAC_PORT_XGM_STAT_RX_CRC_ERR_FRAMES", 0x23380, 0 }, + { "XGMAC_PORT_XGM_STAT_RX_LENGTH_ERR_FRAMES", 0x23384, 0 }, + { "XGMAC_PORT_XGM_STAT_RX_SYM_CODE_ERR_FRAMES", 0x23388, 0 }, + { "XGMAC_PORT_XAUI_CTRL", 0x23400, 0 }, + { "polarity_inv_rx", 8, 4 }, + { "polarity_inv_tx", 4, 4 }, + { "test_sel", 2, 2 }, + { "test_en", 0, 1 }, + { "XGMAC_PORT_XAUI_STATUS", 0x23404, 0 }, + { "Decode_Error", 12, 8 }, + { "Lane3_CTC_Status", 11, 1 }, + { "Lane2_CTC_Status", 10, 1 }, + { "Lane1_CTC_Status", 9, 1 }, + { "Lane0_CTC_Status", 8, 1 }, + { "Align_Status", 4, 1 }, + { "Lane3_Sync_Status", 3, 1 }, + { "Lane2_Sync_Status", 2, 1 }, + { "Lane1_Sync_Status", 1, 1 }, + { "Lane0_Sync_Status", 0, 1 }, + { "XGMAC_PORT_PCSR_CTRL", 0x23500, 0 }, + { "rx_clk_speed", 7, 1 }, + { "ScrBypass", 6, 1 }, + { "FECErrIndEn", 5, 1 }, + { "FECEn", 4, 1 }, + { "TestSel", 2, 2 }, + { "ScrLoopEn", 1, 1 }, + { "XGMIILoopEn", 0, 1 }, + { "XGMAC_PORT_PCSR_TXTEST_CTRL", 0x23510, 0 }, + { "tx_prbs9_en", 4, 1 }, + { "tx_prbs31_en", 3, 1 }, + { "tx_tst_dat_sel", 2, 1 }, + { "tx_tst_sel", 1, 1 }, + { "tx_tst_en", 0, 1 }, + { "XGMAC_PORT_PCSR_TXTEST_SEEDA_LOWER", 0x23514, 0 }, + { "XGMAC_PORT_PCSR_TXTEST_SEEDA_UPPER", 0x23518, 0 }, + { "XGMAC_PORT_PCSR_TXTEST_SEEDB_LOWER", 0x2352c, 0 }, + { "XGMAC_PORT_PCSR_TXTEST_SEEDB_UPPER", 0x23530, 0 }, + { "XGMAC_PORT_PCSR_RXTEST_CTRL", 0x2353c, 0 }, + { "tpter_cnt_rst", 7, 1 }, + { "test_cnt_125us", 6, 1 }, + { "test_cnt_pre", 5, 1 }, + { "ber_cnt_rst", 4, 1 }, + { "err_blk_cnt_rst", 3, 1 }, + { "rx_prbs31_en", 2, 1 }, + { "rx_tst_dat_sel", 1, 1 }, + { "rx_tst_en", 0, 1 }, + { "XGMAC_PORT_PCSR_STATUS", 0x23550, 0 }, + { "err_blk_cnt", 16, 8 }, + { "ber_count", 8, 6 }, + { "hi_ber", 2, 1 }, + { "rx_fault", 1, 1 }, + { "tx_fault", 0, 1 }, + { "XGMAC_PORT_PCSR_TEST_STATUS", 0x23554, 0 }, + { "XGMAC_PORT_AN_CONTROL", 0x23600, 0 }, + { "soft_reset", 15, 1 }, + { "an_enable", 12, 1 }, + { "restart_an", 9, 1 }, + { "XGMAC_PORT_AN_STATUS", 0x23604, 0 }, + { "Noncer_Match", 31, 1 }, + { "Parallel_Det_Fault", 9, 1 }, + { "Page_Received", 6, 1 }, + { "AN_Complete", 5, 1 }, + { "Remote_Fault", 4, 1 }, + { "AN_Ability", 3, 1 }, + { "link_status", 2, 1 }, + { "partner_an_ability", 0, 1 }, + { "XGMAC_PORT_AN_ADVERTISEMENT", 0x23608, 0 }, + { "FEC_Enable", 31, 1 }, + { "FEC_Ability", 30, 1 }, + { "10GBASE_KR_Capable", 23, 1 }, + { "10GBASE_KX4_Capable", 22, 1 }, + { "1000BASE_KX_Capable", 21, 1 }, + { "Transmitted_Nonce", 16, 5 }, + { "NP", 15, 1 }, + { "ACK", 14, 1 }, + { "Remote_Fault", 13, 1 }, + { "ASM_DIR", 11, 1 }, + { "Pause", 10, 1 }, + { "Echoed_Nonce", 5, 5 }, + { "XGMAC_PORT_AN_LINK_PARTNER_ABILITY", 0x2360c, 0 }, + { "FEC_Enable", 31, 1 }, + { "FEC_Ability", 30, 1 }, + { "10GBASE_KR_Capable", 23, 1 }, + { "10GBASE_KX4_Capable", 22, 1 }, + { "1000BASE_KX_Capable", 21, 1 }, + { "Transmitted_Nonce", 16, 5 }, + { "NP", 15, 1 }, + { "ACK", 14, 1 }, + { "Remote_Fault", 13, 1 }, + { "ASM_DIR", 11, 1 }, + { "Pause", 10, 1 }, + { "Echoed_Nonce", 5, 5 }, + { "Selector_Field", 0, 5 }, + { "XGMAC_PORT_AN_NP_LOWER_TRANSMIT", 0x23610, 0 }, + { "NP_Info", 16, 16 }, + { "NP_Indication", 15, 1 }, + { "Message_Page", 13, 1 }, + { "ACK_2", 12, 1 }, + { "Toggle", 11, 1 }, + { "XGMAC_PORT_AN_NP_UPPER_TRANSMIT", 0x23614, 0 }, + { "XGMAC_PORT_AN_LP_NP_LOWER", 0x23618, 0 }, + { "XGMAC_PORT_AN_LP_NP_UPPER", 0x2361c, 0 }, + { "XGMAC_PORT_AN_BACKPLANE_ETHERNET_STATUS", 0x23624, 0 }, + { "TX_Pause_Okay", 6, 1 }, + { "RX_Pause_Okay", 5, 1 }, + { "10GBASE_KR_FEC_neg", 4, 1 }, + { "10GBASE_KR_neg", 3, 1 }, + { "10GBASE_KX4_neg", 2, 1 }, + { "1000BASE_KX_neg", 1, 1 }, + { "BP_AN_Ability", 0, 1 }, + { "XGMAC_PORT_AN_TX_NONCE_CONTROL", 0x23628, 0 }, + { "Bypass_LFSR", 15, 1 }, + { "LFSR_Init", 0, 15 }, + { "XGMAC_PORT_AN_INTERRUPT_STATUS", 0x2362c, 0 }, + { "NP_From_LP", 3, 1 }, + { "Parallel_Det_Fault", 2, 1 }, + { "BP_From_LP", 1, 1 }, + { "PCS_AN_Complete", 0, 1 }, + { "XGMAC_PORT_AN_GENERIC_TIMER_TIMEOUT", 0x23630, 0 }, + { "XGMAC_PORT_AN_BREAK_LINK_TIMEOUT", 0x23634, 0 }, + { "XGMAC_PORT_AN_MODULE_ID", 0x2363c, 0 }, + { "Module_ID", 16, 16 }, + { "Module_Revision", 0, 16 }, + { "XGMAC_PORT_AE_RX_COEF_REQ", 0x23700, 0 }, + { "RXREQ_CPRE", 13, 1 }, + { "RXREQ_CINIT", 12, 1 }, + { "RXREQ_C0", 4, 2 }, + { "RXREQ_C1", 2, 2 }, + { "RXREQ_C2", 0, 2 }, + { "XGMAC_PORT_AE_RX_COEF_STAT", 0x23704, 0 }, + { "RXSTAT_RDY", 15, 1 }, + { "RXSTAT_C0", 4, 2 }, + { "RXSTAT_C1", 2, 2 }, + { "RXSTAT_C2", 0, 2 }, + { "XGMAC_PORT_AE_TX_COEF_REQ", 0x23708, 0 }, + { "TXREQ_CPRE", 13, 1 }, + { "TXREQ_CINIT", 12, 1 }, + { "TXREQ_C0", 4, 2 }, + { "TXREQ_C1", 2, 2 }, + { "TXREQ_C2", 0, 2 }, + { "XGMAC_PORT_AE_TX_COEF_STAT", 0x2370c, 0 }, + { "TXSTAT_RDY", 15, 1 }, + { "TXSTAT_C0", 4, 2 }, + { "TXSTAT_C1", 2, 2 }, + { "TXSTAT_C2", 0, 2 }, + { "XGMAC_PORT_AE_REG_MODE", 0x23710, 0 }, + { "MAN_DEC", 4, 2 }, + { "MANUAL_RDY", 3, 1 }, + { "MWT_DISABLE", 2, 1 }, + { "MDIO_OVR", 1, 1 }, + { "STICKY_MODE", 0, 1 }, + { "XGMAC_PORT_AE_PRBS_CTL", 0x23714, 0 }, + { "PRBS_CHK_ERRCNT", 8, 8 }, + { "PRBS_SYNCCNT", 5, 3 }, + { "PRBS_CHK_SYNC", 4, 1 }, + { "PRBS_CHK_RST", 3, 1 }, + { "PRBS_CHK_OFF", 2, 1 }, + { "PRBS_GEN_FRCERR", 1, 1 }, + { "PRBS_GEN_OFF", 0, 1 }, + { "XGMAC_PORT_AE_FSM_CTL", 0x23718, 0 }, + { "FSM_TR_LCL", 14, 1 }, + { "FSM_GDMRK", 11, 3 }, + { "FSM_BADMRK", 8, 3 }, + { "FSM_TR_FAIL", 7, 1 }, + { "FSM_TR_ACT", 6, 1 }, + { "FSM_FRM_LCK", 5, 1 }, + { "FSM_TR_COMP", 4, 1 }, + { "MC_RX_RDY", 3, 1 }, + { "FSM_CU_DIS", 2, 1 }, + { "FSM_TR_RST", 1, 1 }, + { "FSM_TR_EN", 0, 1 }, + { "XGMAC_PORT_AE_FSM_STATE", 0x2371c, 0 }, + { "CC2FSM_STATE", 13, 3 }, + { "CC1FSM_STATE", 10, 3 }, + { "CC0FSM_STATE", 7, 3 }, + { "FLFSM_STATE", 4, 3 }, + { "TFSM_STATE", 0, 3 }, + { "XGMAC_PORT_AE_TX_DIS", 0x23780, 0 }, + { "XGMAC_PORT_AE_KR_CTRL", 0x23784, 0 }, + { "Training_Enable", 1, 1 }, + { "Restart_Training", 0, 1 }, + { "XGMAC_PORT_AE_RX_SIGDET", 0x23788, 0 }, + { "XGMAC_PORT_AE_KR_STATUS", 0x2378c, 0 }, + { "Training_Failure", 3, 1 }, + { "Training", 2, 1 }, + { "Frame_Lock", 1, 1 }, + { "RX_Trained", 0, 1 }, + { "XGMAC_PORT_HSS_TXA_MODE_CFG", 0x23800, 0 }, + { "BWSEL", 2, 2 }, + { "RTSEL", 0, 2 }, + { "XGMAC_PORT_HSS_TXA_TEST_CTRL", 0x23804, 0 }, + { "TWDP", 5, 1 }, + { "TPGRST", 4, 1 }, + { "TPGEN", 3, 1 }, + { "TPSEL", 0, 3 }, + { "XGMAC_PORT_HSS_TXA_COEFF_CTRL", 0x23808, 0 }, + { "AEINVPOL", 6, 1 }, + { "AESOURCE", 5, 1 }, + { "EQMODE", 4, 1 }, + { "OCOEF", 3, 1 }, + { "COEFRST", 2, 1 }, + { "SPEN", 1, 1 }, + { "ALOAD", 0, 1 }, + { "XGMAC_PORT_HSS_TXA_DRIVER_MODE", 0x2380c, 0 }, + { "DRVOFFT", 5, 1 }, + { "SLEW", 2, 3 }, + { "FFE", 0, 2 }, + { "XGMAC_PORT_HSS_TXA_DRIVER_OVR_CTRL", 0x23810, 0 }, + { "VLINC", 7, 1 }, + { "VLDEC", 6, 1 }, + { "LOPWR", 5, 1 }, + { "TDMEN", 4, 1 }, + { "DCCEN", 3, 1 }, + { "VHSEL", 2, 1 }, + { "IDAC", 0, 2 }, + { "XGMAC_PORT_HSS_TXA_TDM_BIASGEN_STANDBY_TIMER", 0x23814, 0 }, + { "XGMAC_PORT_HSS_TXA_TDM_BIASGEN_PWRON_TIMER", 0x23818, 0 }, + { "XGMAC_PORT_HSS_TXA_TAP0_COEFF", 0x23820, 0 }, + { "XGMAC_PORT_HSS_TXA_TAP1_COEFF", 0x23824, 0 }, + { "XGMAC_PORT_HSS_TXA_TAP2_COEFF", 0x23828, 0 }, + { "XGMAC_PORT_HSS_TXA_PWR", 0x23830, 0 }, + { "XGMAC_PORT_HSS_TXA_POLARITY", 0x23834, 0 }, + { "TXPOL", 4, 3 }, + { "NTXPOL", 0, 3 }, + { "XGMAC_PORT_HSS_TXA_8023AP_AE_CMD", 0x23838, 0 }, + { "CXPRESET", 13, 1 }, + { "CXINIT", 12, 1 }, + { "C2UPDT", 4, 2 }, + { "C1UPDT", 2, 2 }, + { "C0UPDT", 0, 2 }, + { "XGMAC_PORT_HSS_TXA_8023AP_AE_STATUS", 0x2383c, 0 }, + { "C2STAT", 4, 2 }, + { "C1STAT", 2, 2 }, + { "C0STAT", 0, 2 }, + { "XGMAC_PORT_HSS_TXA_TAP0_IDAC_OVR", 0x23840, 0 }, + { "XGMAC_PORT_HSS_TXA_TAP1_IDAC_OVR", 0x23844, 0 }, + { "XGMAC_PORT_HSS_TXA_TAP2_IDAC_OVR", 0x23848, 0 }, + { "XGMAC_PORT_HSS_TXA_PWR_DAC_OVR", 0x23850, 0 }, + { "OPEN", 7, 1 }, + { "OPVAL", 0, 5 }, + { "XGMAC_PORT_HSS_TXA_PWR_DAC", 0x23854, 0 }, + { "XGMAC_PORT_HSS_TXA_TAP0_IDAC_APP", 0x23860, 0 }, + { "XGMAC_PORT_HSS_TXA_TAP1_IDAC_APP", 0x23864, 0 }, + { "XGMAC_PORT_HSS_TXA_TAP2_IDAC_APP", 0x23868, 0 }, + { "XGMAC_PORT_HSS_TXA_SEG_DIS_APP", 0x23870, 0 }, + { "XGMAC_PORT_HSS_TXA_EXT_ADDR_DATA", 0x23878, 0 }, + { "XGMAC_PORT_HSS_TXA_EXT_ADDR", 0x2387c, 0 }, + { "XADDR", 1, 5 }, + { "XWR", 0, 1 }, + { "XGMAC_PORT_HSS_TXB_MODE_CFG", 0x23880, 0 }, + { "BWSEL", 2, 2 }, + { "RTSEL", 0, 2 }, + { "XGMAC_PORT_HSS_TXB_TEST_CTRL", 0x23884, 0 }, + { "TWDP", 5, 1 }, + { "TPGRST", 4, 1 }, + { "TPGEN", 3, 1 }, + { "TPSEL", 0, 3 }, + { "XGMAC_PORT_HSS_TXB_COEFF_CTRL", 0x23888, 0 }, + { "AEINVPOL", 6, 1 }, + { "AESOURCE", 5, 1 }, + { "EQMODE", 4, 1 }, + { "OCOEF", 3, 1 }, + { "COEFRST", 2, 1 }, + { "SPEN", 1, 1 }, + { "ALOAD", 0, 1 }, + { "XGMAC_PORT_HSS_TXB_DRIVER_MODE", 0x2388c, 0 }, + { "DRVOFFT", 5, 1 }, + { "SLEW", 2, 3 }, + { "FFE", 0, 2 }, + { "XGMAC_PORT_HSS_TXB_DRIVER_OVR_CTRL", 0x23890, 0 }, + { "VLINC", 7, 1 }, + { "VLDEC", 6, 1 }, + { "LOPWR", 5, 1 }, + { "TDMEN", 4, 1 }, + { "DCCEN", 3, 1 }, + { "VHSEL", 2, 1 }, + { "IDAC", 0, 2 }, + { "XGMAC_PORT_HSS_TXB_TDM_BIASGEN_STANDBY_TIMER", 0x23894, 0 }, + { "XGMAC_PORT_HSS_TXB_TDM_BIASGEN_PWRON_TIMER", 0x23898, 0 }, + { "XGMAC_PORT_HSS_TXB_TAP0_COEFF", 0x238a0, 0 }, + { "XGMAC_PORT_HSS_TXB_TAP1_COEFF", 0x238a4, 0 }, + { "XGMAC_PORT_HSS_TXB_TAP2_COEFF", 0x238a8, 0 }, + { "XGMAC_PORT_HSS_TXB_PWR", 0x238b0, 0 }, + { "XGMAC_PORT_HSS_TXB_POLARITY", 0x238b4, 0 }, + { "TXPOL", 4, 3 }, + { "NTXPOL", 0, 3 }, + { "XGMAC_PORT_HSS_TXB_8023AP_AE_CMD", 0x238b8, 0 }, + { "CXPRESET", 13, 1 }, + { "CXINIT", 12, 1 }, + { "C2UPDT", 4, 2 }, + { "C1UPDT", 2, 2 }, + { "C0UPDT", 0, 2 }, + { "XGMAC_PORT_HSS_TXB_8023AP_AE_STATUS", 0x238bc, 0 }, + { "C2STAT", 4, 2 }, + { "C1STAT", 2, 2 }, + { "C0STAT", 0, 2 }, + { "XGMAC_PORT_HSS_TXB_TAP0_IDAC_OVR", 0x238c0, 0 }, + { "XGMAC_PORT_HSS_TXB_TAP1_IDAC_OVR", 0x238c4, 0 }, + { "XGMAC_PORT_HSS_TXB_TAP2_IDAC_OVR", 0x238c8, 0 }, + { "XGMAC_PORT_HSS_TXB_PWR_DAC_OVR", 0x238d0, 0 }, + { "OPEN", 7, 1 }, + { "OPVAL", 0, 5 }, + { "XGMAC_PORT_HSS_TXB_PWR_DAC", 0x238d4, 0 }, + { "XGMAC_PORT_HSS_TXB_TAP0_IDAC_APP", 0x238e0, 0 }, + { "XGMAC_PORT_HSS_TXB_TAP1_IDAC_APP", 0x238e4, 0 }, + { "XGMAC_PORT_HSS_TXB_TAP2_IDAC_APP", 0x238e8, 0 }, + { "XGMAC_PORT_HSS_TXB_SEG_DIS_APP", 0x238f0, 0 }, + { "XGMAC_PORT_HSS_TXB_EXT_ADDR_DATA", 0x238f8, 0 }, + { "XGMAC_PORT_HSS_TXB_EXT_ADDR", 0x238fc, 0 }, + { "XADDR", 2, 4 }, + { "XWR", 0, 1 }, + { "XGMAC_PORT_HSS_RXA_CFG_MODE", 0x23900, 0 }, + { "BW810", 8, 1 }, + { "AUXCLK", 7, 1 }, + { "DMSEL", 4, 3 }, + { "BWSEL", 2, 2 }, + { "RTSEL", 0, 2 }, + { "XGMAC_PORT_HSS_RXA_TEST_CTRL", 0x23904, 0 }, + { "RCLKEN", 15, 1 }, + { "RRATE", 13, 2 }, + { "LBFRCERROR", 10, 1 }, + { "LBERROR", 9, 1 }, + { "LBSYNC", 8, 1 }, + { "FDWRAPCLK", 7, 1 }, + { "FDWRAP", 6, 1 }, + { "PRST", 4, 1 }, + { "PCHKEN", 3, 1 }, + { "PRBSSEL", 0, 3 }, + { "XGMAC_PORT_HSS_RXA_PH_ROTATOR_CTRL", 0x23908, 0 }, + { "FTHROT", 12, 4 }, + { "RTHROT", 11, 1 }, + { "FILTCTL", 7, 4 }, + { "RSRVO", 5, 2 }, + { "EXTEL", 4, 1 }, + { "RSTONSTUCK", 3, 1 }, + { "FREEZEFW", 2, 1 }, + { "RESETFW", 1, 1 }, + { "SSCENABLE", 0, 1 }, + { "XGMAC_PORT_HSS_RXA_PH_ROTATOR_OFFSET_CTRL", 0x2390c, 0 }, + { "RSNP", 11, 1 }, + { "TSOEN", 10, 1 }, + { "OFFEN", 9, 1 }, + { "TMSCAL", 7, 2 }, + { "APADJ", 6, 1 }, + { "RSEL", 5, 1 }, + { "PHOFFS", 0, 5 }, + { "XGMAC_PORT_HSS_RXA_PH_ROTATOR_POSITION1", 0x23910, 0 }, + { "ROT0A", 8, 6 }, + { "RTSEL", 0, 6 }, + { "XGMAC_PORT_HSS_RXA_PH_ROTATOR_POSITION2", 0x23914, 0 }, + { "XGMAC_PORT_HSS_RXA_PH_ROTATOR_STATIC_PH_OFFSET", 0x23918, 0 }, + { "RCALER", 15, 1 }, + { "RAOOFF", 10, 5 }, + { "RAEOFF", 5, 5 }, + { "RDOFF", 0, 5 }, + { "XGMAC_PORT_HSS_RXA_SIGDET_CTRL", 0x2391c, 0 }, + { "SIGNSD", 13, 2 }, + { "DACSD", 8, 5 }, + { "SDPDN", 6, 1 }, + { "SIGDET", 5, 1 }, + { "SDLVL", 0, 5 }, + { "XGMAC_PORT_HSS_RXA_DFE_CTRL", 0x23920, 0 }, + { "REQCMP", 15, 1 }, + { "DFEREQ", 14, 1 }, + { "SPCEN", 13, 1 }, + { "GATEEN", 12, 1 }, + { "SPIFMT", 9, 3 }, + { "DFEPWR", 6, 3 }, + { "STNDBY", 5, 1 }, + { "FRCH", 4, 1 }, + { "NONRND", 3, 1 }, + { "NONRNF", 2, 1 }, + { "FSTLCK", 1, 1 }, + { "DFERST", 0, 1 }, + { "XGMAC_PORT_HSS_RXA_DFE_DATA_EDGE_SAMPLE", 0x23924, 0 }, + { "ESAMP", 8, 8 }, + { "DSAMP", 0, 8 }, + { "XGMAC_PORT_HSS_RXA_DFE_AMP_SAMPLE", 0x23928, 0 }, + { "SMODE", 8, 4 }, + { "ADCORR", 7, 1 }, + { "TRAINEN", 6, 1 }, + { "ASAMPQ", 3, 3 }, + { "ASAMP", 0, 3 }, + { "XGMAC_PORT_HSS_RXA_VGA_CTRL1", 0x2392c, 0 }, + { "POLE", 12, 2 }, + { "PEAK", 8, 3 }, + { "VOFFSN", 6, 2 }, + { "VOFFA", 0, 6 }, + { "XGMAC_PORT_HSS_RXA_VGA_CTRL2", 0x23930, 0 }, + { "SHORTV", 10, 1 }, + { "VGAIN", 0, 4 }, + { "XGMAC_PORT_HSS_RXA_VGA_CTRL3", 0x23934, 0 }, + { "HBND1", 10, 1 }, + { "HBND0", 9, 1 }, + { "VLCKD", 8, 1 }, + { "VLCKDF", 7, 1 }, + { "AMAXT", 0, 7 }, + { "XGMAC_PORT_HSS_RXA_DFE_D00_D01_OFFSET", 0x23938, 0 }, + { "D01SN", 13, 2 }, + { "D01AMP", 8, 5 }, + { "D00SN", 5, 2 }, + { "D00AMP", 0, 5 }, + { "XGMAC_PORT_HSS_RXA_DFE_D10_D11_OFFSET", 0x2393c, 0 }, + { "D11SN", 13, 2 }, + { "D11AMP", 8, 5 }, + { "D10SN", 5, 2 }, + { "D10AMP", 0, 5 }, + { "XGMAC_PORT_HSS_RXA_DFE_E0_E1_OFFSET", 0x23940, 0 }, + { "E1SN", 13, 2 }, + { "E1AMP", 8, 5 }, + { "E0SN", 5, 2 }, + { "E0AMP", 0, 5 }, + { "XGMAC_PORT_HSS_RXA_DACA_OFFSET", 0x23944, 0 }, + { "AOFFO", 8, 6 }, + { "AOFFE", 0, 6 }, + { "XGMAC_PORT_HSS_RXA_DACAP_DAC_AN_OFFSET", 0x23948, 0 }, + { "DACAN", 8, 8 }, + { "DACAP", 0, 8 }, + { "XGMAC_PORT_HSS_RXA_DACA_MIN", 0x2394c, 0 }, + { "DACAZ", 8, 8 }, + { "DACAM", 0, 8 }, + { "XGMAC_PORT_HSS_RXA_ADAC_CTRL", 0x23950, 0 }, + { "ADSN", 7, 2 }, + { "ADMAG", 0, 7 }, + { "XGMAC_PORT_HSS_RXA_DIGITAL_EYE_CTRL", 0x23954, 0 }, + { "BLKAZ", 15, 1 }, + { "WIDTH", 10, 5 }, + { "MINWIDTH", 5, 5 }, + { "MINAMP", 0, 5 }, + { "XGMAC_PORT_HSS_RXA_DIGITAL_EYE_METRICS", 0x23958, 0 }, + { "EMBRDY", 10, 1 }, + { "EMBUMP", 7, 1 }, + { "EMMD", 5, 2 }, + { "EMPAT", 1, 1 }, + { "EMEN", 0, 1 }, + { "XGMAC_PORT_HSS_RXA_DFE_H1", 0x2395c, 0 }, + { "H1OSN", 14, 2 }, + { "H1OMAG", 8, 6 }, + { "H1ESN", 6, 2 }, + { "H1EMAG", 0, 6 }, + { "XGMAC_PORT_HSS_RXA_DFE_H2", 0x23960, 0 }, + { "H2OSN", 13, 2 }, + { "H2OMAG", 8, 5 }, + { "H2ESN", 5, 2 }, + { "H2EMAG", 0, 5 }, + { "XGMAC_PORT_HSS_RXA_DFE_H3", 0x23964, 0 }, + { "H3OSN", 12, 2 }, + { "H3OMAG", 8, 4 }, + { "H3ESN", 4, 2 }, + { "H3EMAG", 0, 4 }, + { "XGMAC_PORT_HSS_RXA_DFE_H4", 0x23968, 0 }, + { "H4OSN", 12, 2 }, + { "H4OMAG", 8, 4 }, + { "H4ESN", 4, 2 }, + { "H4EMAG", 0, 4 }, + { "XGMAC_PORT_HSS_RXA_DFE_H5", 0x2396c, 0 }, + { "H5OSN", 12, 2 }, + { "H5OMAG", 8, 4 }, + { "H5ESN", 4, 2 }, + { "H5EMAG", 0, 4 }, + { "XGMAC_PORT_HSS_RXA_DAC_DPC", 0x23970, 0 }, + { "DPCCVG", 13, 1 }, + { "DACCVG", 12, 1 }, + { "DPCTGT", 9, 3 }, + { "BLKH1T", 8, 1 }, + { "BLKOAE", 7, 1 }, + { "H1TGT", 4, 3 }, + { "OAE", 0, 4 }, + { "XGMAC_PORT_HSS_RXA_DDC", 0x23974, 0 }, + { "OLS", 11, 5 }, + { "OES", 6, 5 }, + { "BLKODEC", 5, 1 }, + { "ODEC", 0, 5 }, + { "XGMAC_PORT_HSS_RXA_INTERNAL_STATUS", 0x23978, 0 }, + { "BER6", 15, 1 }, + { "BER6VAL", 14, 1 }, + { "BER3VAL", 13, 1 }, + { "DPCCMP", 9, 1 }, + { "DACCMP", 8, 1 }, + { "DDCCMP", 7, 1 }, + { "AERRFLG", 6, 1 }, + { "WERRFLG", 5, 1 }, + { "TRCMP", 4, 1 }, + { "VLCKF", 3, 1 }, + { "ROCADJ", 2, 1 }, + { "ROCCMP", 1, 1 }, + { "OCCMP", 0, 1 }, + { "XGMAC_PORT_HSS_RXA_DFE_FUNC_CTRL", 0x2397c, 0 }, + { "FDPC", 15, 1 }, + { "FDAC", 14, 1 }, + { "FDDC", 13, 1 }, + { "FNRND", 12, 1 }, + { "FVGAIN", 11, 1 }, + { "FVOFF", 10, 1 }, + { "FSDET", 9, 1 }, + { "FBER6", 8, 1 }, + { "FROTO", 7, 1 }, + { "FH4H5", 6, 1 }, + { "FH2H3", 5, 1 }, + { "FH1", 4, 1 }, + { "FH1SN", 3, 1 }, + { "FNRDF", 2, 1 }, + { "FADAC", 0, 1 }, + { "XGMAC_PORT_HSS_RXB_CFG_MODE", 0x23980, 0 }, + { "BW810", 8, 1 }, + { "AUXCLK", 7, 1 }, + { "DMSEL", 4, 3 }, + { "BWSEL", 2, 2 }, + { "RTSEL", 0, 2 }, + { "XGMAC_PORT_HSS_RXB_TEST_CTRL", 0x23984, 0 }, + { "RCLKEN", 15, 1 }, + { "RRATE", 13, 2 }, + { "LBFRCERROR", 10, 1 }, + { "LBERROR", 9, 1 }, + { "LBSYNC", 8, 1 }, + { "FDWRAPCLK", 7, 1 }, + { "FDWRAP", 6, 1 }, + { "PRST", 4, 1 }, + { "PCHKEN", 3, 1 }, + { "PRBSSEL", 0, 3 }, + { "XGMAC_PORT_HSS_RXB_PH_ROTATOR_CTRL", 0x23988, 0 }, + { "FTHROT", 12, 4 }, + { "RTHROT", 11, 1 }, + { "FILTCTL", 7, 4 }, + { "RSRVO", 5, 2 }, + { "EXTEL", 4, 1 }, + { "RSTONSTUCK", 3, 1 }, + { "FREEZEFW", 2, 1 }, + { "RESETFW", 1, 1 }, + { "SSCENABLE", 0, 1 }, + { "XGMAC_PORT_HSS_RXB_PH_ROTATOR_OFFSET_CTRL", 0x2398c, 0 }, + { "RSNP", 11, 1 }, + { "TSOEN", 10, 1 }, + { "OFFEN", 9, 1 }, + { "TMSCAL", 7, 2 }, + { "APADJ", 6, 1 }, + { "RSEL", 5, 1 }, + { "PHOFFS", 0, 5 }, + { "XGMAC_PORT_HSS_RXB_PH_ROTATOR_POSITION1", 0x23990, 0 }, + { "ROT0A", 8, 6 }, + { "RTSEL", 0, 6 }, + { "XGMAC_PORT_HSS_RXB_PH_ROTATOR_POSITION2", 0x23994, 0 }, + { "XGMAC_PORT_HSS_RXB_PH_ROTATOR_STATIC_PH_OFFSET", 0x23998, 0 }, + { "RCALER", 15, 1 }, + { "RAOOFF", 10, 5 }, + { "RAEOFF", 5, 5 }, + { "RDOFF", 0, 5 }, + { "XGMAC_PORT_HSS_RXB_SIGDET_CTRL", 0x2399c, 0 }, + { "SIGNSD", 13, 2 }, + { "DACSD", 8, 5 }, + { "SDPDN", 6, 1 }, + { "SIGDET", 5, 1 }, + { "SDLVL", 0, 5 }, + { "XGMAC_PORT_HSS_RXB_DFE_CTRL", 0x239a0, 0 }, + { "REQCMP", 15, 1 }, + { "DFEREQ", 14, 1 }, + { "SPCEN", 13, 1 }, + { "GATEEN", 12, 1 }, + { "SPIFMT", 9, 3 }, + { "DFEPWR", 6, 3 }, + { "STNDBY", 5, 1 }, + { "FRCH", 4, 1 }, + { "NONRND", 3, 1 }, + { "NONRNF", 2, 1 }, + { "FSTLCK", 1, 1 }, + { "DFERST", 0, 1 }, + { "XGMAC_PORT_HSS_RXB_DFE_DATA_EDGE_SAMPLE", 0x239a4, 0 }, + { "ESAMP", 8, 8 }, + { "DSAMP", 0, 8 }, + { "XGMAC_PORT_HSS_RXB_DFE_AMP_SAMPLE", 0x239a8, 0 }, + { "SMODE", 8, 4 }, + { "ADCORR", 7, 1 }, + { "TRAINEN", 6, 1 }, + { "ASAMPQ", 3, 3 }, + { "ASAMP", 0, 3 }, + { "XGMAC_PORT_HSS_RXB_VGA_CTRL1", 0x239ac, 0 }, + { "POLE", 12, 2 }, + { "PEAK", 8, 3 }, + { "VOFFSN", 6, 2 }, + { "VOFFA", 0, 6 }, + { "XGMAC_PORT_HSS_RXB_VGA_CTRL2", 0x239b0, 0 }, + { "SHORTV", 10, 1 }, + { "VGAIN", 0, 4 }, + { "XGMAC_PORT_HSS_RXB_VGA_CTRL3", 0x239b4, 0 }, + { "HBND1", 10, 1 }, + { "HBND0", 9, 1 }, + { "VLCKD", 8, 1 }, + { "VLCKDF", 7, 1 }, + { "AMAXT", 0, 7 }, + { "XGMAC_PORT_HSS_RXB_DFE_D00_D01_OFFSET", 0x239b8, 0 }, + { "D01SN", 13, 2 }, + { "D01AMP", 8, 5 }, + { "D00SN", 5, 2 }, + { "D00AMP", 0, 5 }, + { "XGMAC_PORT_HSS_RXB_DFE_D10_D11_OFFSET", 0x239bc, 0 }, + { "D11SN", 13, 2 }, + { "D11AMP", 8, 5 }, + { "D10SN", 5, 2 }, + { "D10AMP", 0, 5 }, + { "XGMAC_PORT_HSS_RXB_DFE_E0_E1_OFFSET", 0x239c0, 0 }, + { "E1SN", 13, 2 }, + { "E1AMP", 8, 5 }, + { "E0SN", 5, 2 }, + { "E0AMP", 0, 5 }, + { "XGMAC_PORT_HSS_RXB_DACA_OFFSET", 0x239c4, 0 }, + { "AOFFO", 8, 6 }, + { "AOFFE", 0, 6 }, + { "XGMAC_PORT_HSS_RXB_DACAP_DAC_AN_OFFSET", 0x239c8, 0 }, + { "DACAN", 8, 8 }, + { "DACAP", 0, 8 }, + { "XGMAC_PORT_HSS_RXB_DACA_MIN", 0x239cc, 0 }, + { "DACAZ", 8, 8 }, + { "DACAM", 0, 8 }, + { "XGMAC_PORT_HSS_RXB_ADAC_CTRL", 0x239d0, 0 }, + { "ADSN", 7, 2 }, + { "ADMAG", 0, 7 }, + { "XGMAC_PORT_HSS_RXB_DIGITAL_EYE_CTRL", 0x239d4, 0 }, + { "BLKAZ", 15, 1 }, + { "WIDTH", 10, 5 }, + { "MINWIDTH", 5, 5 }, + { "MINAMP", 0, 5 }, + { "XGMAC_PORT_HSS_RXB_DIGITAL_EYE_METRICS", 0x239d8, 0 }, + { "EMBRDY", 10, 1 }, + { "EMBUMP", 7, 1 }, + { "EMMD", 5, 2 }, + { "EMPAT", 1, 1 }, + { "EMEN", 0, 1 }, + { "XGMAC_PORT_HSS_RXB_DFE_H1", 0x239dc, 0 }, + { "H1OSN", 14, 2 }, + { "H1OMAG", 8, 6 }, + { "H1ESN", 6, 2 }, + { "H1EMAG", 0, 6 }, + { "XGMAC_PORT_HSS_RXB_DFE_H2", 0x239e0, 0 }, + { "H2OSN", 13, 2 }, + { "H2OMAG", 8, 5 }, + { "H2ESN", 5, 2 }, + { "H2EMAG", 0, 5 }, + { "XGMAC_PORT_HSS_RXB_DFE_H3", 0x239e4, 0 }, + { "H3OSN", 12, 2 }, + { "H3OMAG", 8, 4 }, + { "H3ESN", 4, 2 }, + { "H3EMAG", 0, 4 }, + { "XGMAC_PORT_HSS_RXB_DFE_H4", 0x239e8, 0 }, + { "H4OSN", 12, 2 }, + { "H4OMAG", 8, 4 }, + { "H4ESN", 4, 2 }, + { "H4EMAG", 0, 4 }, + { "XGMAC_PORT_HSS_RXB_DFE_H5", 0x239ec, 0 }, + { "H5OSN", 12, 2 }, + { "H5OMAG", 8, 4 }, + { "H5ESN", 4, 2 }, + { "H5EMAG", 0, 4 }, + { "XGMAC_PORT_HSS_RXB_DAC_DPC", 0x239f0, 0 }, + { "DPCCVG", 13, 1 }, + { "DACCVG", 12, 1 }, + { "DPCTGT", 9, 3 }, + { "BLKH1T", 8, 1 }, + { "BLKOAE", 7, 1 }, + { "H1TGT", 4, 3 }, + { "OAE", 0, 4 }, + { "XGMAC_PORT_HSS_RXB_DDC", 0x239f4, 0 }, + { "OLS", 11, 5 }, + { "OES", 6, 5 }, + { "BLKODEC", 5, 1 }, + { "ODEC", 0, 5 }, + { "XGMAC_PORT_HSS_RXB_INTERNAL_STATUS", 0x239f8, 0 }, + { "BER6", 15, 1 }, + { "BER6VAL", 14, 1 }, + { "BER3VAL", 13, 1 }, + { "DPCCMP", 9, 1 }, + { "DACCMP", 8, 1 }, + { "DDCCMP", 7, 1 }, + { "AERRFLG", 6, 1 }, + { "WERRFLG", 5, 1 }, + { "TRCMP", 4, 1 }, + { "VLCKF", 3, 1 }, + { "ROCADJ", 2, 1 }, + { "ROCCMP", 1, 1 }, + { "OCCMP", 0, 1 }, + { "XGMAC_PORT_HSS_RXB_DFE_FUNC_CTRL", 0x239fc, 0 }, + { "FDPC", 15, 1 }, + { "FDAC", 14, 1 }, + { "FDDC", 13, 1 }, + { "FNRND", 12, 1 }, + { "FVGAIN", 11, 1 }, + { "FVOFF", 10, 1 }, + { "FSDET", 9, 1 }, + { "FBER6", 8, 1 }, + { "FROTO", 7, 1 }, + { "FH4H5", 6, 1 }, + { "FH2H3", 5, 1 }, + { "FH1", 4, 1 }, + { "FH1SN", 3, 1 }, + { "FNRDF", 2, 1 }, + { "FADAC", 0, 1 }, + { "XGMAC_PORT_HSS_TXC_MODE_CFG", 0x23a00, 0 }, + { "BWSEL", 2, 2 }, + { "RTSEL", 0, 2 }, + { "XGMAC_PORT_HSS_TXC_TEST_CTRL", 0x23a04, 0 }, + { "TWDP", 5, 1 }, + { "TPGRST", 4, 1 }, + { "TPGEN", 3, 1 }, + { "TPSEL", 0, 3 }, + { "XGMAC_PORT_HSS_TXC_COEFF_CTRL", 0x23a08, 0 }, + { "AEINVPOL", 6, 1 }, + { "AESOURCE", 5, 1 }, + { "EQMODE", 4, 1 }, + { "OCOEF", 3, 1 }, + { "COEFRST", 2, 1 }, + { "SPEN", 1, 1 }, + { "ALOAD", 0, 1 }, + { "XGMAC_PORT_HSS_TXC_DRIVER_MODE", 0x23a0c, 0 }, + { "DRVOFFT", 5, 1 }, + { "SLEW", 2, 3 }, + { "FFE", 0, 2 }, + { "XGMAC_PORT_HSS_TXC_DRIVER_OVR_CTRL", 0x23a10, 0 }, + { "VLINC", 7, 1 }, + { "VLDEC", 6, 1 }, + { "LOPWR", 5, 1 }, + { "TDMEN", 4, 1 }, + { "DCCEN", 3, 1 }, + { "VHSEL", 2, 1 }, + { "IDAC", 0, 2 }, + { "XGMAC_PORT_HSS_TXC_TDM_BIASGEN_STANDBY_TIMER", 0x23a14, 0 }, + { "XGMAC_PORT_HSS_TXC_TDM_BIASGEN_PWRON_TIMER", 0x23a18, 0 }, + { "XGMAC_PORT_HSS_TXC_TAP0_COEFF", 0x23a20, 0 }, + { "XGMAC_PORT_HSS_TXC_TAP1_COEFF", 0x23a24, 0 }, + { "XGMAC_PORT_HSS_TXC_TAP2_COEFF", 0x23a28, 0 }, + { "XGMAC_PORT_HSS_TXC_PWR", 0x23a30, 0 }, + { "XGMAC_PORT_HSS_TXC_POLARITY", 0x23a34, 0 }, + { "TXPOL", 4, 3 }, + { "NTXPOL", 0, 3 }, + { "XGMAC_PORT_HSS_TXC_8023AP_AE_CMD", 0x23a38, 0 }, + { "CXPRESET", 13, 1 }, + { "CXINIT", 12, 1 }, + { "C2UPDT", 4, 2 }, + { "C1UPDT", 2, 2 }, + { "C0UPDT", 0, 2 }, + { "XGMAC_PORT_HSS_TXC_8023AP_AE_STATUS", 0x23a3c, 0 }, + { "C2STAT", 4, 2 }, + { "C1STAT", 2, 2 }, + { "C0STAT", 0, 2 }, + { "XGMAC_PORT_HSS_TXC_TAP0_IDAC_OVR", 0x23a40, 0 }, + { "XGMAC_PORT_HSS_TXC_TAP1_IDAC_OVR", 0x23a44, 0 }, + { "XGMAC_PORT_HSS_TXC_TAP2_IDAC_OVR", 0x23a48, 0 }, + { "XGMAC_PORT_HSS_TXC_PWR_DAC_OVR", 0x23a50, 0 }, + { "OPEN", 7, 1 }, + { "OPVAL", 0, 5 }, + { "XGMAC_PORT_HSS_TXC_PWR_DAC", 0x23a54, 0 }, + { "XGMAC_PORT_HSS_TXC_TAP0_IDAC_APP", 0x23a60, 0 }, + { "XGMAC_PORT_HSS_TXC_TAP1_IDAC_APP", 0x23a64, 0 }, + { "XGMAC_PORT_HSS_TXC_TAP2_IDAC_APP", 0x23a68, 0 }, + { "XGMAC_PORT_HSS_TXC_SEG_DIS_APP", 0x23a70, 0 }, + { "XGMAC_PORT_HSS_TXC_EXT_ADDR_DATA", 0x23a78, 0 }, + { "XGMAC_PORT_HSS_TXC_EXT_ADDR", 0x23a7c, 0 }, + { "XADDR", 2, 4 }, + { "XWR", 0, 1 }, + { "XGMAC_PORT_HSS_TXD_MODE_CFG", 0x23a80, 0 }, + { "BWSEL", 2, 2 }, + { "RTSEL", 0, 2 }, + { "XGMAC_PORT_HSS_TXD_TEST_CTRL", 0x23a84, 0 }, + { "TWDP", 5, 1 }, + { "TPGRST", 4, 1 }, + { "TPGEN", 3, 1 }, + { "TPSEL", 0, 3 }, + { "XGMAC_PORT_HSS_TXD_COEFF_CTRL", 0x23a88, 0 }, + { "AEINVPOL", 6, 1 }, + { "AESOURCE", 5, 1 }, + { "EQMODE", 4, 1 }, + { "OCOEF", 3, 1 }, + { "COEFRST", 2, 1 }, + { "SPEN", 1, 1 }, + { "ALOAD", 0, 1 }, + { "XGMAC_PORT_HSS_TXD_DRIVER_MODE", 0x23a8c, 0 }, + { "DRVOFFT", 5, 1 }, + { "SLEW", 2, 3 }, + { "FFE", 0, 2 }, + { "XGMAC_PORT_HSS_TXD_DRIVER_OVR_CTRL", 0x23a90, 0 }, + { "VLINC", 7, 1 }, + { "VLDEC", 6, 1 }, + { "LOPWR", 5, 1 }, + { "TDMEN", 4, 1 }, + { "DCCEN", 3, 1 }, + { "VHSEL", 2, 1 }, + { "IDAC", 0, 2 }, + { "XGMAC_PORT_HSS_TXD_TDM_BIASGEN_STANDBY_TIMER", 0x23a94, 0 }, + { "XGMAC_PORT_HSS_TXD_TDM_BIASGEN_PWRON_TIMER", 0x23a98, 0 }, + { "XGMAC_PORT_HSS_TXD_TAP0_COEFF", 0x23aa0, 0 }, + { "XGMAC_PORT_HSS_TXD_TAP1_COEFF", 0x23aa4, 0 }, + { "XGMAC_PORT_HSS_TXD_TAP2_COEFF", 0x23aa8, 0 }, + { "XGMAC_PORT_HSS_TXD_PWR", 0x23ab0, 0 }, + { "XGMAC_PORT_HSS_TXD_POLARITY", 0x23ab4, 0 }, + { "TXPOL", 4, 3 }, + { "NTXPOL", 0, 3 }, + { "XGMAC_PORT_HSS_TXD_8023AP_AE_CMD", 0x23ab8, 0 }, + { "CXPRESET", 13, 1 }, + { "CXINIT", 12, 1 }, + { "C2UPDT", 4, 2 }, + { "C1UPDT", 2, 2 }, + { "C0UPDT", 0, 2 }, + { "XGMAC_PORT_HSS_TXD_8023AP_AE_STATUS", 0x23abc, 0 }, + { "C2STAT", 4, 2 }, + { "C1STAT", 2, 2 }, + { "C0STAT", 0, 2 }, + { "XGMAC_PORT_HSS_TXD_TAP0_IDAC_OVR", 0x23ac0, 0 }, + { "XGMAC_PORT_HSS_TXD_TAP1_IDAC_OVR", 0x23ac4, 0 }, + { "XGMAC_PORT_HSS_TXD_TAP2_IDAC_OVR", 0x23ac8, 0 }, + { "XGMAC_PORT_HSS_TXD_PWR_DAC_OVR", 0x23ad0, 0 }, + { "OPEN", 7, 1 }, + { "OPVAL", 0, 5 }, + { "XGMAC_PORT_HSS_TXD_PWR_DAC", 0x23ad4, 0 }, + { "XGMAC_PORT_HSS_TXD_TAP0_IDAC_APP", 0x23ae0, 0 }, + { "XGMAC_PORT_HSS_TXD_TAP1_IDAC_APP", 0x23ae4, 0 }, + { "XGMAC_PORT_HSS_TXD_TAP2_IDAC_APP", 0x23ae8, 0 }, + { "XGMAC_PORT_HSS_TXD_SEG_DIS_APP", 0x23af0, 0 }, + { "XGMAC_PORT_HSS_TXD_EXT_ADDR_DATA", 0x23af8, 0 }, + { "XGMAC_PORT_HSS_TXD_EXT_ADDR", 0x23afc, 0 }, + { "XADDR", 2, 4 }, + { "XWR", 0, 1 }, + { "XGMAC_PORT_HSS_RXC_CFG_MODE", 0x23b00, 0 }, + { "BW810", 8, 1 }, + { "AUXCLK", 7, 1 }, + { "DMSEL", 4, 3 }, + { "BWSEL", 2, 2 }, + { "RTSEL", 0, 2 }, + { "XGMAC_PORT_HSS_RXC_TEST_CTRL", 0x23b04, 0 }, + { "RCLKEN", 15, 1 }, + { "RRATE", 13, 2 }, + { "LBFRCERROR", 10, 1 }, + { "LBERROR", 9, 1 }, + { "LBSYNC", 8, 1 }, + { "FDWRAPCLK", 7, 1 }, + { "FDWRAP", 6, 1 }, + { "PRST", 4, 1 }, + { "PCHKEN", 3, 1 }, + { "PRBSSEL", 0, 3 }, + { "XGMAC_PORT_HSS_RXC_PH_ROTATOR_CTRL", 0x23b08, 0 }, + { "FTHROT", 12, 4 }, + { "RTHROT", 11, 1 }, + { "FILTCTL", 7, 4 }, + { "RSRVO", 5, 2 }, + { "EXTEL", 4, 1 }, + { "RSTONSTUCK", 3, 1 }, + { "FREEZEFW", 2, 1 }, + { "RESETFW", 1, 1 }, + { "SSCENABLE", 0, 1 }, + { "XGMAC_PORT_HSS_RXC_PH_ROTATOR_OFFSET_CTRL", 0x23b0c, 0 }, + { "RSNP", 11, 1 }, + { "TSOEN", 10, 1 }, + { "OFFEN", 9, 1 }, + { "TMSCAL", 7, 2 }, + { "APADJ", 6, 1 }, + { "RSEL", 5, 1 }, + { "PHOFFS", 0, 5 }, + { "XGMAC_PORT_HSS_RXC_PH_ROTATOR_POSITION1", 0x23b10, 0 }, + { "ROT0A", 8, 6 }, + { "RTSEL", 0, 6 }, + { "XGMAC_PORT_HSS_RXC_PH_ROTATOR_POSITION2", 0x23b14, 0 }, + { "XGMAC_PORT_HSS_RXC_PH_ROTATOR_STATIC_PH_OFFSET", 0x23b18, 0 }, + { "RCALER", 15, 1 }, + { "RAOOFF", 10, 5 }, + { "RAEOFF", 5, 5 }, + { "RDOFF", 0, 5 }, + { "XGMAC_PORT_HSS_RXC_SIGDET_CTRL", 0x23b1c, 0 }, + { "SIGNSD", 13, 2 }, + { "DACSD", 8, 5 }, + { "SDPDN", 6, 1 }, + { "SIGDET", 5, 1 }, + { "SDLVL", 0, 5 }, + { "XGMAC_PORT_HSS_RXC_DFE_CTRL", 0x23b20, 0 }, + { "REQCMP", 15, 1 }, + { "DFEREQ", 14, 1 }, + { "SPCEN", 13, 1 }, + { "GATEEN", 12, 1 }, + { "SPIFMT", 9, 3 }, + { "DFEPWR", 6, 3 }, + { "STNDBY", 5, 1 }, + { "FRCH", 4, 1 }, + { "NONRND", 3, 1 }, + { "NONRNF", 2, 1 }, + { "FSTLCK", 1, 1 }, + { "DFERST", 0, 1 }, + { "XGMAC_PORT_HSS_RXC_DFE_DATA_EDGE_SAMPLE", 0x23b24, 0 }, + { "ESAMP", 8, 8 }, + { "DSAMP", 0, 8 }, + { "XGMAC_PORT_HSS_RXC_DFE_AMP_SAMPLE", 0x23b28, 0 }, + { "SMODE", 8, 4 }, + { "ADCORR", 7, 1 }, + { "TRAINEN", 6, 1 }, + { "ASAMPQ", 3, 3 }, + { "ASAMP", 0, 3 }, + { "XGMAC_PORT_HSS_RXC_VGA_CTRL1", 0x23b2c, 0 }, + { "POLE", 12, 2 }, + { "PEAK", 8, 3 }, + { "VOFFSN", 6, 2 }, + { "VOFFA", 0, 6 }, + { "XGMAC_PORT_HSS_RXC_VGA_CTRL2", 0x23b30, 0 }, + { "SHORTV", 10, 1 }, + { "VGAIN", 0, 4 }, + { "XGMAC_PORT_HSS_RXC_VGA_CTRL3", 0x23b34, 0 }, + { "HBND1", 10, 1 }, + { "HBND0", 9, 1 }, + { "VLCKD", 8, 1 }, + { "VLCKDF", 7, 1 }, + { "AMAXT", 0, 7 }, + { "XGMAC_PORT_HSS_RXC_DFE_D00_D01_OFFSET", 0x23b38, 0 }, + { "D01SN", 13, 2 }, + { "D01AMP", 8, 5 }, + { "D00SN", 5, 2 }, + { "D00AMP", 0, 5 }, + { "XGMAC_PORT_HSS_RXC_DFE_D10_D11_OFFSET", 0x23b3c, 0 }, + { "D11SN", 13, 2 }, + { "D11AMP", 8, 5 }, + { "D10SN", 5, 2 }, + { "D10AMP", 0, 5 }, + { "XGMAC_PORT_HSS_RXC_DFE_E0_E1_OFFSET", 0x23b40, 0 }, + { "E1SN", 13, 2 }, + { "E1AMP", 8, 5 }, + { "E0SN", 5, 2 }, + { "E0AMP", 0, 5 }, + { "XGMAC_PORT_HSS_RXC_DACA_OFFSET", 0x23b44, 0 }, + { "AOFFO", 8, 6 }, + { "AOFFE", 0, 6 }, + { "XGMAC_PORT_HSS_RXC_DACAP_DAC_AN_OFFSET", 0x23b48, 0 }, + { "DACAN", 8, 8 }, + { "DACAP", 0, 8 }, + { "XGMAC_PORT_HSS_RXC_DACA_MIN", 0x23b4c, 0 }, + { "DACAZ", 8, 8 }, + { "DACAM", 0, 8 }, + { "XGMAC_PORT_HSS_RXC_ADAC_CTRL", 0x23b50, 0 }, + { "ADSN", 7, 2 }, + { "ADMAG", 0, 7 }, + { "XGMAC_PORT_HSS_RXC_DIGITAL_EYE_CTRL", 0x23b54, 0 }, + { "BLKAZ", 15, 1 }, + { "WIDTH", 10, 5 }, + { "MINWIDTH", 5, 5 }, + { "MINAMP", 0, 5 }, + { "XGMAC_PORT_HSS_RXC_DIGITAL_EYE_METRICS", 0x23b58, 0 }, + { "EMBRDY", 10, 1 }, + { "EMBUMP", 7, 1 }, + { "EMMD", 5, 2 }, + { "EMPAT", 1, 1 }, + { "EMEN", 0, 1 }, + { "XGMAC_PORT_HSS_RXC_DFE_H1", 0x23b5c, 0 }, + { "H1OSN", 14, 2 }, + { "H1OMAG", 8, 6 }, + { "H1ESN", 6, 2 }, + { "H1EMAG", 0, 6 }, + { "XGMAC_PORT_HSS_RXC_DFE_H2", 0x23b60, 0 }, + { "H2OSN", 13, 2 }, + { "H2OMAG", 8, 5 }, + { "H2ESN", 5, 2 }, + { "H2EMAG", 0, 5 }, + { "XGMAC_PORT_HSS_RXC_DFE_H3", 0x23b64, 0 }, + { "H3OSN", 12, 2 }, + { "H3OMAG", 8, 4 }, + { "H3ESN", 4, 2 }, + { "H3EMAG", 0, 4 }, + { "XGMAC_PORT_HSS_RXC_DFE_H4", 0x23b68, 0 }, + { "H4OSN", 12, 2 }, + { "H4OMAG", 8, 4 }, + { "H4ESN", 4, 2 }, + { "H4EMAG", 0, 4 }, + { "XGMAC_PORT_HSS_RXC_DFE_H5", 0x23b6c, 0 }, + { "H5OSN", 12, 2 }, + { "H5OMAG", 8, 4 }, + { "H5ESN", 4, 2 }, + { "H5EMAG", 0, 4 }, + { "XGMAC_PORT_HSS_RXC_DAC_DPC", 0x23b70, 0 }, + { "DPCCVG", 13, 1 }, + { "DACCVG", 12, 1 }, + { "DPCTGT", 9, 3 }, + { "BLKH1T", 8, 1 }, + { "BLKOAE", 7, 1 }, + { "H1TGT", 4, 3 }, + { "OAE", 0, 4 }, + { "XGMAC_PORT_HSS_RXC_DDC", 0x23b74, 0 }, + { "OLS", 11, 5 }, + { "OES", 6, 5 }, + { "BLKODEC", 5, 1 }, + { "ODEC", 0, 5 }, + { "XGMAC_PORT_HSS_RXC_INTERNAL_STATUS", 0x23b78, 0 }, + { "BER6", 15, 1 }, + { "BER6VAL", 14, 1 }, + { "BER3VAL", 13, 1 }, + { "DPCCMP", 9, 1 }, + { "DACCMP", 8, 1 }, + { "DDCCMP", 7, 1 }, + { "AERRFLG", 6, 1 }, + { "WERRFLG", 5, 1 }, + { "TRCMP", 4, 1 }, + { "VLCKF", 3, 1 }, + { "ROCADJ", 2, 1 }, + { "ROCCMP", 1, 1 }, + { "OCCMP", 0, 1 }, + { "XGMAC_PORT_HSS_RXC_DFE_FUNC_CTRL", 0x23b7c, 0 }, + { "FDPC", 15, 1 }, + { "FDAC", 14, 1 }, + { "FDDC", 13, 1 }, + { "FNRND", 12, 1 }, + { "FVGAIN", 11, 1 }, + { "FVOFF", 10, 1 }, + { "FSDET", 9, 1 }, + { "FBER6", 8, 1 }, + { "FROTO", 7, 1 }, + { "FH4H5", 6, 1 }, + { "FH2H3", 5, 1 }, + { "FH1", 4, 1 }, + { "FH1SN", 3, 1 }, + { "FNRDF", 2, 1 }, + { "FADAC", 0, 1 }, + { "XGMAC_PORT_HSS_RXD_CFG_MODE", 0x23b80, 0 }, + { "BW810", 8, 1 }, + { "AUXCLK", 7, 1 }, + { "DMSEL", 4, 3 }, + { "BWSEL", 2, 2 }, + { "RTSEL", 0, 2 }, + { "XGMAC_PORT_HSS_RXD_TEST_CTRL", 0x23b84, 0 }, + { "RCLKEN", 15, 1 }, + { "RRATE", 13, 2 }, + { "LBFRCERROR", 10, 1 }, + { "LBERROR", 9, 1 }, + { "LBSYNC", 8, 1 }, + { "FDWRAPCLK", 7, 1 }, + { "FDWRAP", 6, 1 }, + { "PRST", 4, 1 }, + { "PCHKEN", 3, 1 }, + { "PRBSSEL", 0, 3 }, + { "XGMAC_PORT_HSS_RXD_PH_ROTATOR_CTRL", 0x23b88, 0 }, + { "FTHROT", 12, 4 }, + { "RTHROT", 11, 1 }, + { "FILTCTL", 7, 4 }, + { "RSRVO", 5, 2 }, + { "EXTEL", 4, 1 }, + { "RSTONSTUCK", 3, 1 }, + { "FREEZEFW", 2, 1 }, + { "RESETFW", 1, 1 }, + { "SSCENABLE", 0, 1 }, + { "XGMAC_PORT_HSS_RXD_PH_ROTATOR_OFFSET_CTRL", 0x23b8c, 0 }, + { "RSNP", 11, 1 }, + { "TSOEN", 10, 1 }, + { "OFFEN", 9, 1 }, + { "TMSCAL", 7, 2 }, + { "APADJ", 6, 1 }, + { "RSEL", 5, 1 }, + { "PHOFFS", 0, 5 }, + { "XGMAC_PORT_HSS_RXD_PH_ROTATOR_POSITION1", 0x23b90, 0 }, + { "ROT0A", 8, 6 }, + { "RTSEL", 0, 6 }, + { "XGMAC_PORT_HSS_RXD_PH_ROTATOR_POSITION2", 0x23b94, 0 }, + { "XGMAC_PORT_HSS_RXD_PH_ROTATOR_STATIC_PH_OFFSET", 0x23b98, 0 }, + { "RCALER", 15, 1 }, + { "RAOOFF", 10, 5 }, + { "RAEOFF", 5, 5 }, + { "RDOFF", 0, 5 }, + { "XGMAC_PORT_HSS_RXD_SIGDET_CTRL", 0x23b9c, 0 }, + { "SIGNSD", 13, 2 }, + { "DACSD", 8, 5 }, + { "SDPDN", 6, 1 }, + { "SIGDET", 5, 1 }, + { "SDLVL", 0, 5 }, + { "XGMAC_PORT_HSS_RXD_DFE_CTRL", 0x23ba0, 0 }, + { "REQCMP", 15, 1 }, + { "DFEREQ", 14, 1 }, + { "SPCEN", 13, 1 }, + { "GATEEN", 12, 1 }, + { "SPIFMT", 9, 3 }, + { "DFEPWR", 6, 3 }, + { "STNDBY", 5, 1 }, + { "FRCH", 4, 1 }, + { "NONRND", 3, 1 }, + { "NONRNF", 2, 1 }, + { "FSTLCK", 1, 1 }, + { "DFERST", 0, 1 }, + { "XGMAC_PORT_HSS_RXD_DFE_DATA_EDGE_SAMPLE", 0x23ba4, 0 }, + { "ESAMP", 8, 8 }, + { "DSAMP", 0, 8 }, + { "XGMAC_PORT_HSS_RXD_DFE_AMP_SAMPLE", 0x23ba8, 0 }, + { "SMODE", 8, 4 }, + { "ADCORR", 7, 1 }, + { "TRAINEN", 6, 1 }, + { "ASAMPQ", 3, 3 }, + { "ASAMP", 0, 3 }, + { "XGMAC_PORT_HSS_RXD_VGA_CTRL1", 0x23bac, 0 }, + { "POLE", 12, 2 }, + { "PEAK", 8, 3 }, + { "VOFFSN", 6, 2 }, + { "VOFFA", 0, 6 }, + { "XGMAC_PORT_HSS_RXD_VGA_CTRL2", 0x23bb0, 0 }, + { "SHORTV", 10, 1 }, + { "VGAIN", 0, 4 }, + { "XGMAC_PORT_HSS_RXD_VGA_CTRL3", 0x23bb4, 0 }, + { "HBND1", 10, 1 }, + { "HBND0", 9, 1 }, + { "VLCKD", 8, 1 }, + { "VLCKDF", 7, 1 }, + { "AMAXT", 0, 7 }, + { "XGMAC_PORT_HSS_RXD_DFE_D00_D01_OFFSET", 0x23bb8, 0 }, + { "D01SN", 13, 2 }, + { "D01AMP", 8, 5 }, + { "D00SN", 5, 2 }, + { "D00AMP", 0, 5 }, + { "XGMAC_PORT_HSS_RXD_DFE_D10_D11_OFFSET", 0x23bbc, 0 }, + { "D11SN", 13, 2 }, + { "D11AMP", 8, 5 }, + { "D10SN", 5, 2 }, + { "D10AMP", 0, 5 }, + { "XGMAC_PORT_HSS_RXD_DFE_E0_E1_OFFSET", 0x23bc0, 0 }, + { "E1SN", 13, 2 }, + { "E1AMP", 8, 5 }, + { "E0SN", 5, 2 }, + { "E0AMP", 0, 5 }, + { "XGMAC_PORT_HSS_RXD_DACA_OFFSET", 0x23bc4, 0 }, + { "AOFFO", 8, 6 }, + { "AOFFE", 0, 6 }, + { "XGMAC_PORT_HSS_RXD_DACAP_DAC_AN_OFFSET", 0x23bc8, 0 }, + { "DACAN", 8, 8 }, + { "DACAP", 0, 8 }, + { "XGMAC_PORT_HSS_RXD_DACA_MIN", 0x23bcc, 0 }, + { "DACAZ", 8, 8 }, + { "DACAM", 0, 8 }, + { "XGMAC_PORT_HSS_RXD_ADAC_CTRL", 0x23bd0, 0 }, + { "ADSN", 7, 2 }, + { "ADMAG", 0, 7 }, + { "XGMAC_PORT_HSS_RXD_DIGITAL_EYE_CTRL", 0x23bd4, 0 }, + { "BLKAZ", 15, 1 }, + { "WIDTH", 10, 5 }, + { "MINWIDTH", 5, 5 }, + { "MINAMP", 0, 5 }, + { "XGMAC_PORT_HSS_RXD_DIGITAL_EYE_METRICS", 0x23bd8, 0 }, + { "EMBRDY", 10, 1 }, + { "EMBUMP", 7, 1 }, + { "EMMD", 5, 2 }, + { "EMPAT", 1, 1 }, + { "EMEN", 0, 1 }, + { "XGMAC_PORT_HSS_RXD_DFE_H1", 0x23bdc, 0 }, + { "H1OSN", 14, 2 }, + { "H1OMAG", 8, 6 }, + { "H1ESN", 6, 2 }, + { "H1EMAG", 0, 6 }, + { "XGMAC_PORT_HSS_RXD_DFE_H2", 0x23be0, 0 }, + { "H2OSN", 13, 2 }, + { "H2OMAG", 8, 5 }, + { "H2ESN", 5, 2 }, + { "H2EMAG", 0, 5 }, + { "XGMAC_PORT_HSS_RXD_DFE_H3", 0x23be4, 0 }, + { "H3OSN", 12, 2 }, + { "H3OMAG", 8, 4 }, + { "H3ESN", 4, 2 }, + { "H3EMAG", 0, 4 }, + { "XGMAC_PORT_HSS_RXD_DFE_H4", 0x23be8, 0 }, + { "H4OSN", 12, 2 }, + { "H4OMAG", 8, 4 }, + { "H4ESN", 4, 2 }, + { "H4EMAG", 0, 4 }, + { "XGMAC_PORT_HSS_RXD_DFE_H5", 0x23bec, 0 }, + { "H5OSN", 12, 2 }, + { "H5OMAG", 8, 4 }, + { "H5ESN", 4, 2 }, + { "H5EMAG", 0, 4 }, + { "XGMAC_PORT_HSS_RXD_DAC_DPC", 0x23bf0, 0 }, + { "DPCCVG", 13, 1 }, + { "DACCVG", 12, 1 }, + { "DPCTGT", 9, 3 }, + { "BLKH1T", 8, 1 }, + { "BLKOAE", 7, 1 }, + { "H1TGT", 4, 3 }, + { "OAE", 0, 4 }, + { "XGMAC_PORT_HSS_RXD_DDC", 0x23bf4, 0 }, + { "OLS", 11, 5 }, + { "OES", 6, 5 }, + { "BLKODEC", 5, 1 }, + { "ODEC", 0, 5 }, + { "XGMAC_PORT_HSS_RXD_INTERNAL_STATUS", 0x23bf8, 0 }, + { "BER6", 15, 1 }, + { "BER6VAL", 14, 1 }, + { "BER3VAL", 13, 1 }, + { "DPCCMP", 9, 1 }, + { "DACCMP", 8, 1 }, + { "DDCCMP", 7, 1 }, + { "AERRFLG", 6, 1 }, + { "WERRFLG", 5, 1 }, + { "TRCMP", 4, 1 }, + { "VLCKF", 3, 1 }, + { "ROCADJ", 2, 1 }, + { "ROCCMP", 1, 1 }, + { "OCCMP", 0, 1 }, + { "XGMAC_PORT_HSS_RXD_DFE_FUNC_CTRL", 0x23bfc, 0 }, + { "FDPC", 15, 1 }, + { "FDAC", 14, 1 }, + { "FDDC", 13, 1 }, + { "FNRND", 12, 1 }, + { "FVGAIN", 11, 1 }, + { "FVOFF", 10, 1 }, + { "FSDET", 9, 1 }, + { "FBER6", 8, 1 }, + { "FROTO", 7, 1 }, + { "FH4H5", 6, 1 }, + { "FH2H3", 5, 1 }, + { "FH1", 4, 1 }, + { "FH1SN", 3, 1 }, + { "FNRDF", 2, 1 }, + { "FADAC", 0, 1 }, + { "XGMAC_PORT_HSS_VCO_COARSE_CALIBRATION_0", 0x23c00, 0 }, + { "XGMAC_PORT_HSS_VCO_COARSE_CALIBRATION_1", 0x23c04, 0 }, + { "LDET", 4, 1 }, + { "CCERR", 3, 1 }, + { "CCCMP", 2, 1 }, + { "XGMAC_PORT_HSS_VCO_COARSE_CALIBRATION_2", 0x23c08, 0 }, + { "XGMAC_PORT_HSS_VCO_COARSE_CALIBRATION_3", 0x23c0c, 0 }, + { "VISEL", 4, 1 }, + { "FMIN", 3, 1 }, + { "FMAX", 2, 1 }, + { "CVHOLD", 1, 1 }, + { "TCDIS", 0, 1 }, + { "XGMAC_PORT_HSS_VCO_COARSE_CALIBRATION_4", 0x23c10, 0 }, + { "CMETH", 2, 1 }, + { "RECAL", 1, 1 }, + { "CCLD", 0, 1 }, + { "XGMAC_PORT_HSS_ANALOG_TEST_MUX", 0x23c14, 0 }, + { "XGMAC_PORT_HSS_PORT_EN_0", 0x23c18, 0 }, + { "RXDEN", 7, 1 }, + { "RXCEN", 6, 1 }, + { "TXDEN", 5, 1 }, + { "TXCEN", 4, 1 }, + { "RXBEN", 3, 1 }, + { "RXAEN", 2, 1 }, + { "TXBEN", 1, 1 }, + { "TXAEN", 0, 1 }, + { "XGMAC_PORT_HSS_PORT_RESET_0", 0x23c20, 0 }, + { "RXDRST", 7, 1 }, + { "RXCRST", 6, 1 }, + { "TXDRST", 5, 1 }, + { "TXCRST", 4, 1 }, + { "RXBRST", 3, 1 }, + { "RXARST", 2, 1 }, + { "TXBRST", 1, 1 }, + { "TXARST", 0, 1 }, + { "XGMAC_PORT_HSS_CHARGE_PUMP_CTRL", 0x23c28, 0 }, + { "ENCPIS", 2, 1 }, + { "CPISEL", 0, 2 }, + { "XGMAC_PORT_HSS_BAND_GAP_CTRL", 0x23c2c, 0 }, + { "XGMAC_PORT_HSS_LOFREQ_OVR", 0x23c30, 0 }, + { "LFREQ2", 3, 1 }, + { "LFREQ1", 2, 1 }, + { "LFREQO", 1, 1 }, + { "LFSEL", 0, 1 }, + { "XGMAC_PORT_HSS_VOLTAGE_BOOST_CTRL", 0x23c38, 0 }, + { "PFVAL", 2, 1 }, + { "PFEN", 1, 1 }, + { "VBADJ", 0, 1 }, + { "XGMAC_PORT_HSS_TX_MODE_CFG", 0x23c80, 0 }, + { "BWSEL", 2, 2 }, + { "RTSEL", 0, 2 }, + { "XGMAC_PORT_HSS_TXTEST_CTRL", 0x23c84, 0 }, + { "TWDP", 5, 1 }, + { "TPGRST", 4, 1 }, + { "TPGEN", 3, 1 }, + { "TPSEL", 0, 3 }, + { "XGMAC_PORT_HSS_TX_COEFF_CTRL", 0x23c88, 0 }, + { "AEINVPOL", 6, 1 }, + { "AESOURCE", 5, 1 }, + { "EQMODE", 4, 1 }, + { "OCOEF", 3, 1 }, + { "COEFRST", 2, 1 }, + { "SPEN", 1, 1 }, + { "ALOAD", 0, 1 }, + { "XGMAC_PORT_HSS_TX_DRIVER_MODE", 0x23c8c, 0 }, + { "DRVOFFT", 5, 1 }, + { "SLEW", 2, 3 }, + { "FFE", 0, 2 }, + { "XGMAC_PORT_HSS_TX_DRIVER_OVR_CTRL", 0x23c90, 0 }, + { "VLINC", 7, 1 }, + { "VLDEC", 6, 1 }, + { "LOPWR", 5, 1 }, + { "TDMEN", 4, 1 }, + { "DCCEN", 3, 1 }, + { "VHSEL", 2, 1 }, + { "IDAC", 0, 2 }, + { "XGMAC_PORT_HSS_TX_TDM_BIASGEN_STANDBY_TIMER", 0x23c94, 0 }, + { "XGMAC_PORT_HSS_TX_TDM_BIASGEN_PWRON_TIMER", 0x23c98, 0 }, + { "XGMAC_PORT_HSS_TX_TAP0_COEFF", 0x23ca0, 0 }, + { "XGMAC_PORT_HSS_TX_TAP1_COEFF", 0x23ca4, 0 }, + { "XGMAC_PORT_HSS_TX_TAP2_COEFF", 0x23ca8, 0 }, + { "XGMAC_PORT_HSS_TX_PWR", 0x23cb0, 0 }, + { "XGMAC_PORT_HSS_TX_POLARITY", 0x23cb4, 0 }, + { "TXPOL", 4, 3 }, + { "NTXPOL", 0, 3 }, + { "XGMAC_PORT_HSS_TX_8023AP_AE_CMD", 0x23cb8, 0 }, + { "CXPRESET", 13, 1 }, + { "CXINIT", 12, 1 }, + { "C2UPDT", 4, 2 }, + { "C1UPDT", 2, 2 }, + { "C0UPDT", 0, 2 }, + { "XGMAC_PORT_HSS_TX_8023AP_AE_STATUS", 0x23cbc, 0 }, + { "C2STAT", 4, 2 }, + { "C1STAT", 2, 2 }, + { "C0STAT", 0, 2 }, + { "XGMAC_PORT_HSS_TX_TAP0_IDAC_OVR", 0x23cc0, 0 }, + { "XGMAC_PORT_HSS_TX_TAP1_IDAC_OVR", 0x23cc4, 0 }, + { "XGMAC_PORT_HSS_TX_TAP2_IDAC_OVR", 0x23cc8, 0 }, + { "XGMAC_PORT_HSS_TX_PWR_DAC_OVR", 0x23cd0, 0 }, + { "OPEN", 7, 1 }, + { "OPVAL", 0, 5 }, + { "XGMAC_PORT_HSS_TX_PWR_DAC", 0x23cd4, 0 }, + { "XGMAC_PORT_HSS_TX_TAP0_IDAC_APP", 0x23ce0, 0 }, + { "XGMAC_PORT_HSS_TX_TAP1_IDAC_APP", 0x23ce4, 0 }, + { "XGMAC_PORT_HSS_TX_TAP2_IDAC_APP", 0x23ce8, 0 }, + { "XGMAC_PORT_HSS_TX_SEG_DIS_APP", 0x23cf0, 0 }, + { "XGMAC_PORT_HSS_TX_EXT_ADDR_DATA", 0x23cf8, 0 }, + { "XGMAC_PORT_HSS_TX_EXT_ADDR", 0x23cfc, 0 }, + { "XADDR", 2, 4 }, + { "XWR", 0, 1 }, + { "XGMAC_PORT_HSS_RX_CFG_MODE", 0x23d00, 0 }, + { "BW810", 8, 1 }, + { "AUXCLK", 7, 1 }, + { "DMSEL", 4, 3 }, + { "BWSEL", 2, 2 }, + { "RTSEL", 0, 2 }, + { "XGMAC_PORT_HSS_RXTEST_CTRL", 0x23d04, 0 }, + { "RCLKEN", 15, 1 }, + { "RRATE", 13, 2 }, + { "LBFRCERROR", 10, 1 }, + { "LBERROR", 9, 1 }, + { "LBSYNC", 8, 1 }, + { "FDWRAPCLK", 7, 1 }, + { "FDWRAP", 6, 1 }, + { "PRST", 4, 1 }, + { "PCHKEN", 3, 1 }, + { "PRBSSEL", 0, 3 }, + { "XGMAC_PORT_HSS_RX_PH_ROTATOR_CTRL", 0x23d08, 0 }, + { "FTHROT", 12, 4 }, + { "RTHROT", 11, 1 }, + { "FILTCTL", 7, 4 }, + { "RSRVO", 5, 2 }, + { "EXTEL", 4, 1 }, + { "RSTONSTUCK", 3, 1 }, + { "FREEZEFW", 2, 1 }, + { "RESETFW", 1, 1 }, + { "SSCENABLE", 0, 1 }, + { "XGMAC_PORT_HSS_RX_PH_ROTATOR_OFFSET_CTRL", 0x23d0c, 0 }, + { "RSNP", 11, 1 }, + { "TSOEN", 10, 1 }, + { "OFFEN", 9, 1 }, + { "TMSCAL", 7, 2 }, + { "APADJ", 6, 1 }, + { "RSEL", 5, 1 }, + { "PHOFFS", 0, 5 }, + { "XGMAC_PORT_HSS_RX_PH_ROTATOR_POSITION1", 0x23d10, 0 }, + { "ROT0A", 8, 6 }, + { "RTSEL", 0, 6 }, + { "XGMAC_PORT_HSS_RX_PH_ROTATOR_POSITION2", 0x23d14, 0 }, + { "XGMAC_PORT_HSS_RX_PH_ROTATOR_STATIC_PH_OFFSET", 0x23d18, 0 }, + { "RCALER", 15, 1 }, + { "RAOOFF", 10, 5 }, + { "RAEOFF", 5, 5 }, + { "RDOFF", 0, 5 }, + { "XGMAC_PORT_HSS_RX_SIGDET_CTRL", 0x23d1c, 0 }, + { "SIGNSD", 13, 2 }, + { "DACSD", 8, 5 }, + { "SDPDN", 6, 1 }, + { "SIGDET", 5, 1 }, + { "SDLVL", 0, 5 }, + { "XGMAC_PORT_HSS_RX_DFE_CTRL", 0x23d20, 0 }, + { "REQCMP", 15, 1 }, + { "DFEREQ", 14, 1 }, + { "SPCEN", 13, 1 }, + { "GATEEN", 12, 1 }, + { "SPIFMT", 9, 3 }, + { "DFEPWR", 6, 3 }, + { "STNDBY", 5, 1 }, + { "FRCH", 4, 1 }, + { "NONRND", 3, 1 }, + { "NONRNF", 2, 1 }, + { "FSTLCK", 1, 1 }, + { "DFERST", 0, 1 }, + { "XGMAC_PORT_HSS_RX_DFE_DATA_EDGE_SAMPLE", 0x23d24, 0 }, + { "ESAMP", 8, 8 }, + { "DSAMP", 0, 8 }, + { "XGMAC_PORT_HSS_RX_DFE_AMP_SAMPLE", 0x23d28, 0 }, + { "SMODE", 8, 4 }, + { "ADCORR", 7, 1 }, + { "TRAINEN", 6, 1 }, + { "ASAMPQ", 3, 3 }, + { "ASAMP", 0, 3 }, + { "XGMAC_PORT_HSS_RX_VGA_CTRL1", 0x23d2c, 0 }, + { "POLE", 12, 2 }, + { "PEAK", 8, 3 }, + { "VOFFSN", 6, 2 }, + { "VOFFA", 0, 6 }, + { "XGMAC_PORT_HSS_RX_VGA_CTRL2", 0x23d30, 0 }, + { "SHORTV", 10, 1 }, + { "VGAIN", 0, 4 }, + { "XGMAC_PORT_HSS_RX_VGA_CTRL3", 0x23d34, 0 }, + { "HBND1", 10, 1 }, + { "HBND0", 9, 1 }, + { "VLCKD", 8, 1 }, + { "VLCKDF", 7, 1 }, + { "AMAXT", 0, 7 }, + { "XGMAC_PORT_HSS_RX_DFE_D00_D01_OFFSET", 0x23d38, 0 }, + { "D01SN", 13, 2 }, + { "D01AMP", 8, 5 }, + { "D00SN", 5, 2 }, + { "D00AMP", 0, 5 }, + { "XGMAC_PORT_HSS_RX_DFE_D10_D11_OFFSET", 0x23d3c, 0 }, + { "D11SN", 13, 2 }, + { "D11AMP", 8, 5 }, + { "D10SN", 5, 2 }, + { "D10AMP", 0, 5 }, + { "XGMAC_PORT_HSS_RX_DFE_E0_E1_OFFSET", 0x23d40, 0 }, + { "E1SN", 13, 2 }, + { "E1AMP", 8, 5 }, + { "E0SN", 5, 2 }, + { "E0AMP", 0, 5 }, + { "XGMAC_PORT_HSS_RX_DACA_OFFSET", 0x23d44, 0 }, + { "AOFFO", 8, 6 }, + { "AOFFE", 0, 6 }, + { "XGMAC_PORT_HSS_RX_DACAP_DAC_AN_OFFSET", 0x23d48, 0 }, + { "DACAN", 8, 8 }, + { "DACAP", 0, 8 }, + { "XGMAC_PORT_HSS_RX_DACA_MIN", 0x23d4c, 0 }, + { "DACAZ", 8, 8 }, + { "DACAM", 0, 8 }, + { "XGMAC_PORT_HSS_RX_ADAC_CTRL", 0x23d50, 0 }, + { "ADSN", 7, 2 }, + { "ADMAG", 0, 7 }, + { "XGMAC_PORT_HSS_RX_DIGITAL_EYE_CTRL", 0x23d54, 0 }, + { "BLKAZ", 15, 1 }, + { "WIDTH", 10, 5 }, + { "MINWIDTH", 5, 5 }, + { "MINAMP", 0, 5 }, + { "XGMAC_PORT_HSS_RX_DIGITAL_EYE_METRICS", 0x23d58, 0 }, + { "EMBRDY", 10, 1 }, + { "EMBUMP", 7, 1 }, + { "EMMD", 5, 2 }, + { "EMPAT", 1, 1 }, + { "EMEN", 0, 1 }, + { "XGMAC_PORT_HSS_RX_DFE_H1", 0x23d5c, 0 }, + { "H1OSN", 14, 2 }, + { "H1OMAG", 8, 6 }, + { "H1ESN", 6, 2 }, + { "H1EMAG", 0, 6 }, + { "XGMAC_PORT_HSS_RX_DFE_H2", 0x23d60, 0 }, + { "H2OSN", 13, 2 }, + { "H2OMAG", 8, 5 }, + { "H2ESN", 5, 2 }, + { "H2EMAG", 0, 5 }, + { "XGMAC_PORT_HSS_RX_DFE_H3", 0x23d64, 0 }, + { "H3OSN", 12, 2 }, + { "H3OMAG", 8, 4 }, + { "H3ESN", 4, 2 }, + { "H3EMAG", 0, 4 }, + { "XGMAC_PORT_HSS_RX_DFE_H4", 0x23d68, 0 }, + { "H4OSN", 12, 2 }, + { "H4OMAG", 8, 4 }, + { "H4ESN", 4, 2 }, + { "H4EMAG", 0, 4 }, + { "XGMAC_PORT_HSS_RX_DFE_H5", 0x23d6c, 0 }, + { "H5OSN", 12, 2 }, + { "H5OMAG", 8, 4 }, + { "H5ESN", 4, 2 }, + { "H5EMAG", 0, 4 }, + { "XGMAC_PORT_HSS_RX_DAC_DPC", 0x23d70, 0 }, + { "DPCCVG", 13, 1 }, + { "DACCVG", 12, 1 }, + { "DPCTGT", 9, 3 }, + { "BLKH1T", 8, 1 }, + { "BLKOAE", 7, 1 }, + { "H1TGT", 4, 3 }, + { "OAE", 0, 4 }, + { "XGMAC_PORT_HSS_RX_DDC", 0x23d74, 0 }, + { "OLS", 11, 5 }, + { "OES", 6, 5 }, + { "BLKODEC", 5, 1 }, + { "ODEC", 0, 5 }, + { "XGMAC_PORT_HSS_RX_INTERNAL_STATUS", 0x23d78, 0 }, + { "BER6", 15, 1 }, + { "BER6VAL", 14, 1 }, + { "BER3VAL", 13, 1 }, + { "DPCCMP", 9, 1 }, + { "DACCMP", 8, 1 }, + { "DDCCMP", 7, 1 }, + { "AERRFLG", 6, 1 }, + { "WERRFLG", 5, 1 }, + { "TRCMP", 4, 1 }, + { "VLCKF", 3, 1 }, + { "ROCADJ", 2, 1 }, + { "ROCCMP", 1, 1 }, + { "OCCMP", 0, 1 }, + { "XGMAC_PORT_HSS_RX_DFE_FUNC_CTRL", 0x23d7c, 0 }, + { "FDPC", 15, 1 }, + { "FDAC", 14, 1 }, + { "FDDC", 13, 1 }, + { "FNRND", 12, 1 }, + { "FVGAIN", 11, 1 }, + { "FVOFF", 10, 1 }, + { "FSDET", 9, 1 }, + { "FBER6", 8, 1 }, + { "FROTO", 7, 1 }, + { "FH4H5", 6, 1 }, + { "FH2H3", 5, 1 }, + { "FH1", 4, 1 }, + { "FH1SN", 3, 1 }, + { "FNRDF", 2, 1 }, + { "FADAC", 0, 1 }, + { "XGMAC_PORT_HSS_TXRX_CFG_MODE", 0x23e00, 0 }, + { "BW810", 8, 1 }, + { "AUXCLK", 7, 1 }, + { "DMSEL", 4, 3 }, + { "BWSEL", 2, 2 }, + { "RTSEL", 0, 2 }, + { "XGMAC_PORT_HSS_TXRXTEST_CTRL", 0x23e04, 0 }, + { "RCLKEN", 15, 1 }, + { "RRATE", 13, 2 }, + { "LBFRCERROR", 10, 1 }, + { "LBERROR", 9, 1 }, + { "LBSYNC", 8, 1 }, + { "FDWRAPCLK", 7, 1 }, + { "FDWRAP", 6, 1 }, + { "PRST", 4, 1 }, + { "PCHKEN", 3, 1 }, + { "PRBSSEL", 0, 3 }, + { "XGMAC_PORT_CFG", 0x25000, 0 }, + { "XGMII_Clk_Sel", 29, 3 }, + { "SinkTx", 27, 1 }, + { "SinkTxOnLinkDown", 26, 1 }, + { "xg2g_speed_mode", 25, 1 }, + { "LoopNoFwd", 24, 1 }, + { "XGM_Tx_pause_size", 23, 1 }, + { "XGM_Tx_pause_frame", 22, 1 }, + { "XGM_Tx_Disable_Pre", 21, 1 }, + { "XGM_Tx_Disable_Crc", 20, 1 }, + { "Smux_Rx_Loop", 19, 1 }, + { "Rx_Lane_Swap", 18, 1 }, + { "Tx_Lane_Swap", 17, 1 }, + { "Signal_Det", 14, 1 }, + { "Pmux_Rx_Loop", 13, 1 }, + { "Pmux_Tx_Loop", 12, 1 }, + { "XGM_Rx_Sel", 10, 2 }, + { "PCS_Tx_Sel", 8, 2 }, + { "XAUI20_Rem_Pre", 5, 1 }, + { "XAUI20_XGMII_Sel", 4, 1 }, + { "Rx_Byte_Swap", 3, 1 }, + { "Tx_Byte_Swap", 2, 1 }, + { "Port_Sel", 0, 1 }, + { "XGMAC_PORT_RESET_CTRL", 0x25004, 0 }, + { "AuxExt_Reset", 10, 1 }, + { "TXFIFO_Reset", 9, 1 }, + { "RXFIFO_Reset", 8, 1 }, + { "BEAN_Reset", 7, 1 }, + { "XAUI_Reset", 6, 1 }, + { "AE_Reset", 5, 1 }, + { "XGM_Reset", 4, 1 }, + { "XG2G_Reset", 3, 1 }, + { "WOL_Reset", 2, 1 }, + { "XFI_PCS_Reset", 1, 1 }, + { "HSS_Reset", 0, 1 }, + { "XGMAC_PORT_LED_CFG", 0x25008, 0 }, + { "Led1_Cfg", 5, 3 }, + { "Led1_Polarity_Inv", 4, 1 }, + { "Led0_Cfg", 1, 3 }, + { "Led0_Polarity_Inv", 0, 1 }, + { "XGMAC_PORT_LED_COUNTHI", 0x2500c, 0 }, + { "XGMAC_PORT_LED_COUNTLO", 0x25010, 0 }, + { "XGMAC_PORT_DEBUG_CFG", 0x25014, 0 }, + { "XGMAC_PORT_CFG2", 0x25018, 0 }, + { "Rx_Polarity_Inv", 28, 4 }, + { "Tx_Polarity_Inv", 24, 4 }, + { "InstanceNum", 22, 2 }, + { "StopOnPerr", 21, 1 }, + { "MACTxEn", 20, 1 }, + { "MACRxEn", 19, 1 }, + { "PatEn", 18, 1 }, + { "MagicEn", 17, 1 }, + { "TX_IPG", 4, 13 }, + { "AEC_PMA_TX_READY", 1, 1 }, + { "AEC_PMA_RX_READY", 0, 1 }, + { "XGMAC_PORT_PKT_COUNT", 0x2501c, 0 }, + { "tx_sop_count", 24, 8 }, + { "tx_eop_count", 16, 8 }, + { "rx_sop_count", 8, 8 }, + { "rx_eop_count", 0, 8 }, + { "XGMAC_PORT_PERR_INJECT", 0x25020, 0 }, + { "MemSel", 1, 1 }, + { "InjectDataErr", 0, 1 }, + { "XGMAC_PORT_MAGIC_MACID_LO", 0x25024, 0 }, + { "XGMAC_PORT_MAGIC_MACID_HI", 0x25028, 0 }, + { "XGMAC_PORT_BUILD_REVISION", 0x2502c, 0 }, + { "XGMAC_PORT_XGMII_SE_COUNT", 0x25030, 0 }, + { "TxSop", 24, 8 }, + { "TxEop", 16, 8 }, + { "RxSop", 8, 8 }, + { "RxEop", 0, 8 }, + { "XGMAC_PORT_LINK_STATUS", 0x25034, 0 }, + { "remflt", 3, 1 }, + { "locflt", 2, 1 }, + { "linkup", 1, 1 }, + { "linkdn", 0, 1 }, + { "XGMAC_PORT_CHECKIN", 0x25038, 0 }, + { "Preamble", 1, 1 }, + { "CheckIn", 0, 1 }, + { "XGMAC_PORT_FAULT_TEST", 0x2503c, 0 }, + { "FltType", 1, 1 }, + { "FltCtrl", 0, 1 }, + { "XGMAC_PORT_SPARE", 0x25040, 0 }, + { "XGMAC_PORT_HSS_SIGDET_STATUS", 0x25044, 0 }, + { "XGMAC_PORT_EXT_LOS_STATUS", 0x25048, 0 }, + { "XGMAC_PORT_EXT_LOS_CTRL", 0x2504c, 0 }, + { "XGMAC_PORT_FPGA_PAUSE_CTL", 0x25050, 0 }, + { "CTL", 31, 1 }, + { "HWM", 13, 13 }, + { "LWM", 0, 13 }, + { "XGMAC_PORT_FPGA_ERRPKT_CNT", 0x25054, 0 }, + { "XGMAC_PORT_LA_TX_0", 0x25058, 0 }, + { "XGMAC_PORT_LA_RX_0", 0x2505c, 0 }, + { "XGMAC_PORT_FPGA_LA_CTL", 0x25060, 0 }, + { "rxrst", 5, 1 }, + { "txrst", 4, 1 }, + { "xgmii", 3, 1 }, + { "pause", 2, 1 }, + { "stopErr", 1, 1 }, + { "stop", 0, 1 }, + { "XGMAC_PORT_EPIO_DATA0", 0x250c0, 0 }, + { "XGMAC_PORT_EPIO_DATA1", 0x250c4, 0 }, + { "XGMAC_PORT_EPIO_DATA2", 0x250c8, 0 }, + { "XGMAC_PORT_EPIO_DATA3", 0x250cc, 0 }, + { "XGMAC_PORT_EPIO_OP", 0x250d0, 0 }, + { "Busy", 31, 1 }, + { "Write", 8, 1 }, + { "Address", 0, 8 }, + { "XGMAC_PORT_WOL_STATUS", 0x250d4, 0 }, + { "MagicDetected", 31, 1 }, + { "PatDetected", 30, 1 }, + { "ClearMagic", 4, 1 }, + { "ClearMatch", 3, 1 }, + { "MatchedFilter", 0, 3 }, + { "XGMAC_PORT_INT_EN", 0x250d8, 0 }, + { "ext_los", 28, 1 }, + { "incmptbl_link", 27, 1 }, + { "PatDetWake", 26, 1 }, + { "MagicWake", 25, 1 }, + { "SigDetChg", 24, 1 }, + { "PCSR_fec_corr", 23, 1 }, + { "AE_Train_Local", 22, 1 }, + { "HSSPLL_LOCK", 21, 1 }, + { "HSSPRT_READY", 20, 1 }, + { "AutoNeg_Done", 19, 1 }, + { "PCSR_Hi_BER", 18, 1 }, + { "PCSR_FEC_Error", 17, 1 }, + { "PCSR_Link_Fail", 16, 1 }, + { "XAUI_Dec_Error", 15, 1 }, + { "XAUI_Link_Fail", 14, 1 }, + { "PCS_CTC_Error", 13, 1 }, + { "PCS_Link_Good", 12, 1 }, + { "PCS_Link_Fail", 11, 1 }, + { "RxFifoOverFlow", 10, 1 }, + { "HSSPRBSErr", 9, 1 }, + { "HSSEyeQual", 8, 1 }, + { "RemoteFault", 7, 1 }, + { "LocalFault", 6, 1 }, + { "MAC_Link_Down", 5, 1 }, + { "MAC_Link_Up", 4, 1 }, + { "BEAN_Int", 3, 1 }, + { "XGM_Int", 2, 1 }, + { "TxFifo_prty_err", 1, 1 }, + { "RxFifo_prty_err", 0, 1 }, + { "XGMAC_PORT_INT_CAUSE", 0x250dc, 0 }, + { "ext_los", 28, 1 }, + { "incmptbl_link", 27, 1 }, + { "PatDetWake", 26, 1 }, + { "MagicWake", 25, 1 }, + { "SigDetChg", 24, 1 }, + { "PCSR_fec_corr", 23, 1 }, + { "AE_Train_Local", 22, 1 }, + { "HSSPLL_LOCK", 21, 1 }, + { "HSSPRT_READY", 20, 1 }, + { "AutoNeg_Done", 19, 1 }, + { "PCSR_Hi_BER", 18, 1 }, + { "PCSR_FEC_Error", 17, 1 }, + { "PCSR_Link_Fail", 16, 1 }, + { "XAUI_Dec_Error", 15, 1 }, + { "XAUI_Link_Fail", 14, 1 }, + { "PCS_CTC_Error", 13, 1 }, + { "PCS_Link_Good", 12, 1 }, + { "PCS_Link_Fail", 11, 1 }, + { "RxFifoOverFlow", 10, 1 }, + { "HSSPRBSErr", 9, 1 }, + { "HSSEyeQual", 8, 1 }, + { "RemoteFault", 7, 1 }, + { "LocalFault", 6, 1 }, + { "MAC_Link_Down", 5, 1 }, + { "MAC_Link_Up", 4, 1 }, + { "BEAN_Int", 3, 1 }, + { "XGM_Int", 2, 1 }, + { "TxFifo_prty_err", 1, 1 }, + { "RxFifo_prty_err", 0, 1 }, + { "XGMAC_PORT_HSS_CFG0", 0x250e0, 0 }, + { "TXDTS", 31, 1 }, + { "TXCTS", 30, 1 }, + { "TXBTS", 29, 1 }, + { "TXATS", 28, 1 }, + { "TXDOBS", 27, 1 }, + { "TXCOBS", 26, 1 }, + { "TXBOBS", 25, 1 }, + { "TXAOBS", 24, 1 }, + { "HSSREFCLKSEL", 20, 1 }, + { "HSSAVDHI", 17, 1 }, + { "HSSRXTS", 16, 1 }, + { "HSSTXACMODE", 15, 1 }, + { "HSSRXACMODE", 14, 1 }, + { "HSSRESYNC", 13, 1 }, + { "HSSRECCAL", 12, 1 }, + { "HSSPDWNPLL", 11, 1 }, + { "HSSDIVSEL", 9, 2 }, + { "HSSREFDIV", 8, 1 }, + { "HSSPLLBYP", 7, 1 }, + { "HSSLOFREQPLL", 6, 1 }, + { "HSSLOFREQ2PLL", 5, 1 }, + { "HSSEXTC16SEL", 4, 1 }, + { "HSSRSTCONFIG", 1, 3 }, + { "HSSPRBSEN", 0, 1 }, + { "XGMAC_PORT_HSS_CFG1", 0x250e4, 0 }, + { "RXDPRBSRST", 28, 1 }, + { "RXDPRBSEN", 27, 1 }, + { "RXDPRBSFRCERR", 26, 1 }, + { "TXDPRBSRST", 25, 1 }, + { "TXDPRBSEN", 24, 1 }, + { "RXCPRBSRST", 20, 1 }, + { "RXCPRBSEN", 19, 1 }, + { "RXCPRBSFRCERR", 18, 1 }, + { "TXCPRBSRST", 17, 1 }, + { "TXCPRBSEN", 16, 1 }, + { "RXBPRBSRST", 12, 1 }, + { "RXBPRBSEN", 11, 1 }, + { "RXBPRBSFRCERR", 10, 1 }, + { "TXBPRBSRST", 9, 1 }, + { "TXBPRBSEN", 8, 1 }, + { "RXAPRBSRST", 4, 1 }, + { "RXAPRBSEN", 3, 1 }, + { "RXAPRBSFRCERR", 2, 1 }, + { "TXAPRBSRST", 1, 1 }, + { "TXAPRBSEN", 0, 1 }, + { "XGMAC_PORT_HSS_CFG2", 0x250e8, 0 }, + { "RXDDATASYNC", 23, 1 }, + { "RXCDATASYNC", 22, 1 }, + { "RXBDATASYNC", 21, 1 }, + { "RXADATASYNC", 20, 1 }, + { "RXDEARLYIN", 19, 1 }, + { "RXDLATEIN", 18, 1 }, + { "RXDPHSLOCK", 17, 1 }, + { "RXDPHSDNIN", 16, 1 }, + { "RXDPHSUPIN", 15, 1 }, + { "RXCEARLYIN", 14, 1 }, + { "RXCLATEIN", 13, 1 }, + { "RXCPHSLOCK", 12, 1 }, + { "RXCPHSDNIN", 11, 1 }, + { "RXCPHSUPIN", 10, 1 }, + { "RXBEARLYIN", 9, 1 }, + { "RXBLATEIN", 8, 1 }, + { "RXBPHSLOCK", 7, 1 }, + { "RXBPHSDNIN", 6, 1 }, + { "RXBPHSUPIN", 5, 1 }, + { "RXAEARLYIN", 4, 1 }, + { "RXALATEIN", 3, 1 }, + { "RXAPHSLOCK", 2, 1 }, + { "RXAPHSDNIN", 1, 1 }, + { "RXAPHSUPIN", 0, 1 }, + { "XGMAC_PORT_HSS_STATUS", 0x250ec, 0 }, + { "RXDPRBSSYNC", 15, 1 }, + { "RXCPRBSSYNC", 14, 1 }, + { "RXBPRBSSYNC", 13, 1 }, + { "RXAPRBSSYNC", 12, 1 }, + { "RXDPRBSERR", 11, 1 }, + { "RXCPRBSERR", 10, 1 }, + { "RXBPRBSERR", 9, 1 }, + { "RXAPRBSERR", 8, 1 }, + { "RXDSIGDET", 7, 1 }, + { "RXCSIGDET", 6, 1 }, + { "RXBSIGDET", 5, 1 }, + { "RXASIGDET", 4, 1 }, + { "HSSPLLLOCK", 1, 1 }, + { "HSSPRTREADY", 0, 1 }, + { "XGMAC_PORT_XGM_TX_CTRL", 0x25200, 0 }, + { "SendPause", 2, 1 }, + { "SendZeroPause", 1, 1 }, + { "TxEn", 0, 1 }, + { "XGMAC_PORT_XGM_TX_CFG", 0x25204, 0 }, + { "CRCCal", 8, 2 }, + { "DisDefIdleCnt", 7, 1 }, + { "DecAvgTxIPG", 6, 1 }, + { "UnidirTxEn", 5, 1 }, + { "CfgClkSpeed", 2, 3 }, + { "StretchMode", 1, 1 }, + { "TxPauseEn", 0, 1 }, + { "XGMAC_PORT_XGM_TX_PAUSE_QUANTA", 0x25208, 0 }, + { "XGMAC_PORT_XGM_RX_CTRL", 0x2520c, 0 }, + { "XGMAC_PORT_XGM_RX_CFG", 0x25210, 0 }, + { "CRCCal", 16, 2 }, + { "LocalFault", 15, 1 }, + { "RemoteFault", 14, 1 }, + { "LenErrFrameDis", 13, 1 }, + { "Con802_3Preamble", 12, 1 }, + { "EnNon802_3Preamble", 11, 1 }, + { "CopyPreamble", 10, 1 }, + { "DisPauseFrames", 9, 1 }, + { "En1536BFrames", 8, 1 }, + { "EnJumbo", 7, 1 }, + { "RmFCS", 6, 1 }, + { "DisNonVlan", 5, 1 }, + { "EnExtMatch", 4, 1 }, + { "EnHashUcast", 3, 1 }, + { "EnHashMcast", 2, 1 }, + { "DisBCast", 1, 1 }, + { "CopyAllFrames", 0, 1 }, + { "XGMAC_PORT_XGM_RX_HASH_LOW", 0x25214, 0 }, + { "XGMAC_PORT_XGM_RX_HASH_HIGH", 0x25218, 0 }, + { "XGMAC_PORT_XGM_RX_EXACT_MATCH_LOW_1", 0x2521c, 0 }, + { "XGMAC_PORT_XGM_RX_EXACT_MATCH_HIGH_1", 0x25220, 0 }, + { "XGMAC_PORT_XGM_RX_EXACT_MATCH_LOW_2", 0x25224, 0 }, + { "XGMAC_PORT_XGM_RX_EXACT_MATCH_HIGH_2", 0x25228, 0 }, + { "XGMAC_PORT_XGM_RX_EXACT_MATCH_LOW_3", 0x2522c, 0 }, + { "XGMAC_PORT_XGM_RX_EXACT_MATCH_HIGH_3", 0x25230, 0 }, + { "XGMAC_PORT_XGM_RX_EXACT_MATCH_LOW_4", 0x25234, 0 }, + { "XGMAC_PORT_XGM_RX_EXACT_MATCH_HIGH_4", 0x25238, 0 }, + { "XGMAC_PORT_XGM_RX_EXACT_MATCH_LOW_5", 0x2523c, 0 }, + { "XGMAC_PORT_XGM_RX_EXACT_MATCH_HIGH_5", 0x25240, 0 }, + { "XGMAC_PORT_XGM_RX_EXACT_MATCH_LOW_6", 0x25244, 0 }, + { "XGMAC_PORT_XGM_RX_EXACT_MATCH_HIGH_6", 0x25248, 0 }, + { "XGMAC_PORT_XGM_RX_EXACT_MATCH_LOW_7", 0x2524c, 0 }, + { "XGMAC_PORT_XGM_RX_EXACT_MATCH_HIGH_7", 0x25250, 0 }, + { "XGMAC_PORT_XGM_RX_EXACT_MATCH_LOW_8", 0x25254, 0 }, + { "XGMAC_PORT_XGM_RX_EXACT_MATCH_HIGH_8", 0x25258, 0 }, + { "XGMAC_PORT_XGM_RX_TYPE_MATCH_1", 0x2525c, 0 }, + { "EnTypeMatch", 31, 1 }, + { "type", 0, 16 }, + { "XGMAC_PORT_XGM_RX_TYPE_MATCH_2", 0x25260, 0 }, + { "EnTypeMatch", 31, 1 }, + { "type", 0, 16 }, + { "XGMAC_PORT_XGM_RX_TYPE_MATCH_3", 0x25264, 0 }, + { "EnTypeMatch", 31, 1 }, + { "type", 0, 16 }, + { "XGMAC_PORT_XGM_RX_TYPE_MATCH_4", 0x25268, 0 }, + { "EnTypeMatch", 31, 1 }, + { "type", 0, 16 }, + { "XGMAC_PORT_XGM_INT_STATUS", 0x2526c, 0 }, + { "XGMIIExtInt", 10, 1 }, + { "LinkFaultChange", 9, 1 }, + { "PhyFrameComplete", 8, 1 }, + { "PauseFrameTxmt", 7, 1 }, + { "PauseCntrTimeOut", 6, 1 }, + { "Non0PauseRcvd", 5, 1 }, + { "StatOFlow", 4, 1 }, + { "TxErrFIFO", 3, 1 }, + { "TxUFlow", 2, 1 }, + { "FrameTxmt", 1, 1 }, + { "FrameRcvd", 0, 1 }, + { "XGMAC_PORT_XGM_INT_MASK", 0x25270, 0 }, + { "XGMIIExtInt", 10, 1 }, + { "LinkFaultChange", 9, 1 }, + { "PhyFrameComplete", 8, 1 }, + { "PauseFrameTxmt", 7, 1 }, + { "PauseCntrTimeOut", 6, 1 }, + { "Non0PauseRcvd", 5, 1 }, + { "StatOFlow", 4, 1 }, + { "TxErrFIFO", 3, 1 }, + { "TxUFlow", 2, 1 }, + { "FrameTxmt", 1, 1 }, + { "FrameRcvd", 0, 1 }, + { "XGMAC_PORT_XGM_INT_EN", 0x25274, 0 }, + { "XGMIIExtInt", 10, 1 }, + { "LinkFaultChange", 9, 1 }, + { "PhyFrameComplete", 8, 1 }, + { "PauseFrameTxmt", 7, 1 }, + { "PauseCntrTimeOut", 6, 1 }, + { "Non0PauseRcvd", 5, 1 }, + { "StatOFlow", 4, 1 }, + { "TxErrFIFO", 3, 1 }, + { "TxUFlow", 2, 1 }, + { "FrameTxmt", 1, 1 }, + { "FrameRcvd", 0, 1 }, + { "XGMAC_PORT_XGM_INT_DISABLE", 0x25278, 0 }, + { "XGMIIExtInt", 10, 1 }, + { "LinkFaultChange", 9, 1 }, + { "PhyFrameComplete", 8, 1 }, + { "PauseFrameTxmt", 7, 1 }, + { "PauseCntrTimeOut", 6, 1 }, + { "Non0PauseRcvd", 5, 1 }, + { "StatOFlow", 4, 1 }, + { "TxErrFIFO", 3, 1 }, + { "TxUFlow", 2, 1 }, + { "FrameTxmt", 1, 1 }, + { "FrameRcvd", 0, 1 }, + { "XGMAC_PORT_XGM_TX_PAUSE_TIMER", 0x2527c, 0 }, + { "XGMAC_PORT_XGM_STAT_CTRL", 0x25280, 0 }, + { "ReadSnpShot", 4, 1 }, + { "TakeSnpShot", 3, 1 }, + { "ClrStats", 2, 1 }, + { "IncrStats", 1, 1 }, + { "EnTestModeWr", 0, 1 }, + { "XGMAC_PORT_XGM_MDIO_CTRL", 0x25284, 0 }, + { "FrameType", 30, 2 }, + { "Operation", 28, 2 }, + { "PortAddr", 23, 5 }, + { "DevAddr", 18, 5 }, + { "Resrv", 16, 2 }, + { "Data", 0, 16 }, + { "XGMAC_PORT_XGM_MODULE_ID", 0x252fc, 0 }, + { "ModuleID", 16, 16 }, + { "ModuleRev", 0, 16 }, + { "XGMAC_PORT_XGM_STAT_TX_BYTE_LOW", 0x25300, 0 }, + { "XGMAC_PORT_XGM_STAT_TX_BYTE_HIGH", 0x25304, 0 }, + { "XGMAC_PORT_XGM_STAT_TX_FRAME_LOW", 0x25308, 0 }, + { "XGMAC_PORT_XGM_STAT_TX_FRAME_HIGH", 0x2530c, 0 }, + { "XGMAC_PORT_XGM_STAT_TX_BCAST", 0x25310, 0 }, + { "XGMAC_PORT_XGM_STAT_TX_MCAST", 0x25314, 0 }, + { "XGMAC_PORT_XGM_STAT_TX_PAUSE", 0x25318, 0 }, + { "XGMAC_PORT_XGM_STAT_TX_64B_FRAMES", 0x2531c, 0 }, + { "XGMAC_PORT_XGM_STAT_TX_65_127B_FRAMES", 0x25320, 0 }, + { "XGMAC_PORT_XGM_STAT_TX_128_255B_FRAMES", 0x25324, 0 }, + { "XGMAC_PORT_XGM_STAT_TX_256_511B_FRAMES", 0x25328, 0 }, + { "XGMAC_PORT_XGM_STAT_TX_512_1023B_FRAMES", 0x2532c, 0 }, + { "XGMAC_PORT_XGM_STAT_TX_1024_1518B_FRAMES", 0x25330, 0 }, + { "XGMAC_PORT_XGM_STAT_TX_1519_MAXB_FRAMES", 0x25334, 0 }, + { "XGMAC_PORT_XGM_STAT_TX_ERR_FRAMES", 0x25338, 0 }, + { "XGMAC_PORT_XGM_STAT_RX_BYTES_LOW", 0x2533c, 0 }, + { "XGMAC_PORT_XGM_STAT_RX_BYTES_HIGH", 0x25340, 0 }, + { "XGMAC_PORT_XGM_STAT_RX_FRAMES_LOW", 0x25344, 0 }, + { "XGMAC_PORT_XGM_STAT_RX_FRAMES_HIGH", 0x25348, 0 }, + { "XGMAC_PORT_XGM_STAT_RX_BCAST_FRAMES", 0x2534c, 0 }, + { "XGMAC_PORT_XGM_STAT_RX_MCAST_FRAMES", 0x25350, 0 }, + { "XGMAC_PORT_XGM_STAT_RX_PAUSE_FRAMES", 0x25354, 0 }, + { "XGMAC_PORT_XGM_STAT_RX_64B_FRAMES", 0x25358, 0 }, + { "XGMAC_PORT_XGM_STAT_RX_65_127B_FRAMES", 0x2535c, 0 }, + { "XGMAC_PORT_XGM_STAT_RX_128_255B_FRAMES", 0x25360, 0 }, + { "XGMAC_PORT_XGM_STAT_RX_256_511B_FRAMES", 0x25364, 0 }, + { "XGMAC_PORT_XGM_STAT_RX_512_1023B_FRAMES", 0x25368, 0 }, + { "XGMAC_PORT_XGM_STAT_RX_1024_1518B_FRAMES", 0x2536c, 0 }, + { "XGMAC_PORT_XGM_STAT_RX_1519_MAXB_FRAMES", 0x25370, 0 }, + { "XGMAC_PORT_XGM_STAT_RX_SHORT_FRAMES", 0x25374, 0 }, + { "XGMAC_PORT_XGM_STAT_RX_OVERSIZE_FRAMES", 0x25378, 0 }, + { "XGMAC_PORT_XGM_STAT_RX_JABBER_FRAMES", 0x2537c, 0 }, + { "XGMAC_PORT_XGM_STAT_RX_CRC_ERR_FRAMES", 0x25380, 0 }, + { "XGMAC_PORT_XGM_STAT_RX_LENGTH_ERR_FRAMES", 0x25384, 0 }, + { "XGMAC_PORT_XGM_STAT_RX_SYM_CODE_ERR_FRAMES", 0x25388, 0 }, + { "XGMAC_PORT_XAUI_CTRL", 0x25400, 0 }, + { "polarity_inv_rx", 8, 4 }, + { "polarity_inv_tx", 4, 4 }, + { "test_sel", 2, 2 }, + { "test_en", 0, 1 }, + { "XGMAC_PORT_XAUI_STATUS", 0x25404, 0 }, + { "Decode_Error", 12, 8 }, + { "Lane3_CTC_Status", 11, 1 }, + { "Lane2_CTC_Status", 10, 1 }, + { "Lane1_CTC_Status", 9, 1 }, + { "Lane0_CTC_Status", 8, 1 }, + { "Align_Status", 4, 1 }, + { "Lane3_Sync_Status", 3, 1 }, + { "Lane2_Sync_Status", 2, 1 }, + { "Lane1_Sync_Status", 1, 1 }, + { "Lane0_Sync_Status", 0, 1 }, + { "XGMAC_PORT_PCSR_CTRL", 0x25500, 0 }, + { "rx_clk_speed", 7, 1 }, + { "ScrBypass", 6, 1 }, + { "FECErrIndEn", 5, 1 }, + { "FECEn", 4, 1 }, + { "TestSel", 2, 2 }, + { "ScrLoopEn", 1, 1 }, + { "XGMIILoopEn", 0, 1 }, + { "XGMAC_PORT_PCSR_TXTEST_CTRL", 0x25510, 0 }, + { "tx_prbs9_en", 4, 1 }, + { "tx_prbs31_en", 3, 1 }, + { "tx_tst_dat_sel", 2, 1 }, + { "tx_tst_sel", 1, 1 }, + { "tx_tst_en", 0, 1 }, + { "XGMAC_PORT_PCSR_TXTEST_SEEDA_LOWER", 0x25514, 0 }, + { "XGMAC_PORT_PCSR_TXTEST_SEEDA_UPPER", 0x25518, 0 }, + { "XGMAC_PORT_PCSR_TXTEST_SEEDB_LOWER", 0x2552c, 0 }, + { "XGMAC_PORT_PCSR_TXTEST_SEEDB_UPPER", 0x25530, 0 }, + { "XGMAC_PORT_PCSR_RXTEST_CTRL", 0x2553c, 0 }, + { "tpter_cnt_rst", 7, 1 }, + { "test_cnt_125us", 6, 1 }, + { "test_cnt_pre", 5, 1 }, + { "ber_cnt_rst", 4, 1 }, + { "err_blk_cnt_rst", 3, 1 }, + { "rx_prbs31_en", 2, 1 }, + { "rx_tst_dat_sel", 1, 1 }, + { "rx_tst_en", 0, 1 }, + { "XGMAC_PORT_PCSR_STATUS", 0x25550, 0 }, + { "err_blk_cnt", 16, 8 }, + { "ber_count", 8, 6 }, + { "hi_ber", 2, 1 }, + { "rx_fault", 1, 1 }, + { "tx_fault", 0, 1 }, + { "XGMAC_PORT_PCSR_TEST_STATUS", 0x25554, 0 }, + { "XGMAC_PORT_AN_CONTROL", 0x25600, 0 }, + { "soft_reset", 15, 1 }, + { "an_enable", 12, 1 }, + { "restart_an", 9, 1 }, + { "XGMAC_PORT_AN_STATUS", 0x25604, 0 }, + { "Noncer_Match", 31, 1 }, + { "Parallel_Det_Fault", 9, 1 }, + { "Page_Received", 6, 1 }, + { "AN_Complete", 5, 1 }, + { "Remote_Fault", 4, 1 }, + { "AN_Ability", 3, 1 }, + { "link_status", 2, 1 }, + { "partner_an_ability", 0, 1 }, + { "XGMAC_PORT_AN_ADVERTISEMENT", 0x25608, 0 }, + { "FEC_Enable", 31, 1 }, + { "FEC_Ability", 30, 1 }, + { "10GBASE_KR_Capable", 23, 1 }, + { "10GBASE_KX4_Capable", 22, 1 }, + { "1000BASE_KX_Capable", 21, 1 }, + { "Transmitted_Nonce", 16, 5 }, + { "NP", 15, 1 }, + { "ACK", 14, 1 }, + { "Remote_Fault", 13, 1 }, + { "ASM_DIR", 11, 1 }, + { "Pause", 10, 1 }, + { "Echoed_Nonce", 5, 5 }, + { "XGMAC_PORT_AN_LINK_PARTNER_ABILITY", 0x2560c, 0 }, + { "FEC_Enable", 31, 1 }, + { "FEC_Ability", 30, 1 }, + { "10GBASE_KR_Capable", 23, 1 }, + { "10GBASE_KX4_Capable", 22, 1 }, + { "1000BASE_KX_Capable", 21, 1 }, + { "Transmitted_Nonce", 16, 5 }, + { "NP", 15, 1 }, + { "ACK", 14, 1 }, + { "Remote_Fault", 13, 1 }, + { "ASM_DIR", 11, 1 }, + { "Pause", 10, 1 }, + { "Echoed_Nonce", 5, 5 }, + { "Selector_Field", 0, 5 }, + { "XGMAC_PORT_AN_NP_LOWER_TRANSMIT", 0x25610, 0 }, + { "NP_Info", 16, 16 }, + { "NP_Indication", 15, 1 }, + { "Message_Page", 13, 1 }, + { "ACK_2", 12, 1 }, + { "Toggle", 11, 1 }, + { "XGMAC_PORT_AN_NP_UPPER_TRANSMIT", 0x25614, 0 }, + { "XGMAC_PORT_AN_LP_NP_LOWER", 0x25618, 0 }, + { "XGMAC_PORT_AN_LP_NP_UPPER", 0x2561c, 0 }, + { "XGMAC_PORT_AN_BACKPLANE_ETHERNET_STATUS", 0x25624, 0 }, + { "TX_Pause_Okay", 6, 1 }, + { "RX_Pause_Okay", 5, 1 }, + { "10GBASE_KR_FEC_neg", 4, 1 }, + { "10GBASE_KR_neg", 3, 1 }, + { "10GBASE_KX4_neg", 2, 1 }, + { "1000BASE_KX_neg", 1, 1 }, + { "BP_AN_Ability", 0, 1 }, + { "XGMAC_PORT_AN_TX_NONCE_CONTROL", 0x25628, 0 }, + { "Bypass_LFSR", 15, 1 }, + { "LFSR_Init", 0, 15 }, + { "XGMAC_PORT_AN_INTERRUPT_STATUS", 0x2562c, 0 }, + { "NP_From_LP", 3, 1 }, + { "Parallel_Det_Fault", 2, 1 }, + { "BP_From_LP", 1, 1 }, + { "PCS_AN_Complete", 0, 1 }, + { "XGMAC_PORT_AN_GENERIC_TIMER_TIMEOUT", 0x25630, 0 }, + { "XGMAC_PORT_AN_BREAK_LINK_TIMEOUT", 0x25634, 0 }, + { "XGMAC_PORT_AN_MODULE_ID", 0x2563c, 0 }, + { "Module_ID", 16, 16 }, + { "Module_Revision", 0, 16 }, + { "XGMAC_PORT_AE_RX_COEF_REQ", 0x25700, 0 }, + { "RXREQ_CPRE", 13, 1 }, + { "RXREQ_CINIT", 12, 1 }, + { "RXREQ_C0", 4, 2 }, + { "RXREQ_C1", 2, 2 }, + { "RXREQ_C2", 0, 2 }, + { "XGMAC_PORT_AE_RX_COEF_STAT", 0x25704, 0 }, + { "RXSTAT_RDY", 15, 1 }, + { "RXSTAT_C0", 4, 2 }, + { "RXSTAT_C1", 2, 2 }, + { "RXSTAT_C2", 0, 2 }, + { "XGMAC_PORT_AE_TX_COEF_REQ", 0x25708, 0 }, + { "TXREQ_CPRE", 13, 1 }, + { "TXREQ_CINIT", 12, 1 }, + { "TXREQ_C0", 4, 2 }, + { "TXREQ_C1", 2, 2 }, + { "TXREQ_C2", 0, 2 }, + { "XGMAC_PORT_AE_TX_COEF_STAT", 0x2570c, 0 }, + { "TXSTAT_RDY", 15, 1 }, + { "TXSTAT_C0", 4, 2 }, + { "TXSTAT_C1", 2, 2 }, + { "TXSTAT_C2", 0, 2 }, + { "XGMAC_PORT_AE_REG_MODE", 0x25710, 0 }, + { "MAN_DEC", 4, 2 }, + { "MANUAL_RDY", 3, 1 }, + { "MWT_DISABLE", 2, 1 }, + { "MDIO_OVR", 1, 1 }, + { "STICKY_MODE", 0, 1 }, + { "XGMAC_PORT_AE_PRBS_CTL", 0x25714, 0 }, + { "PRBS_CHK_ERRCNT", 8, 8 }, + { "PRBS_SYNCCNT", 5, 3 }, + { "PRBS_CHK_SYNC", 4, 1 }, + { "PRBS_CHK_RST", 3, 1 }, + { "PRBS_CHK_OFF", 2, 1 }, + { "PRBS_GEN_FRCERR", 1, 1 }, + { "PRBS_GEN_OFF", 0, 1 }, + { "XGMAC_PORT_AE_FSM_CTL", 0x25718, 0 }, + { "FSM_TR_LCL", 14, 1 }, + { "FSM_GDMRK", 11, 3 }, + { "FSM_BADMRK", 8, 3 }, + { "FSM_TR_FAIL", 7, 1 }, + { "FSM_TR_ACT", 6, 1 }, + { "FSM_FRM_LCK", 5, 1 }, + { "FSM_TR_COMP", 4, 1 }, + { "MC_RX_RDY", 3, 1 }, + { "FSM_CU_DIS", 2, 1 }, + { "FSM_TR_RST", 1, 1 }, + { "FSM_TR_EN", 0, 1 }, + { "XGMAC_PORT_AE_FSM_STATE", 0x2571c, 0 }, + { "CC2FSM_STATE", 13, 3 }, + { "CC1FSM_STATE", 10, 3 }, + { "CC0FSM_STATE", 7, 3 }, + { "FLFSM_STATE", 4, 3 }, + { "TFSM_STATE", 0, 3 }, + { "XGMAC_PORT_AE_TX_DIS", 0x25780, 0 }, + { "XGMAC_PORT_AE_KR_CTRL", 0x25784, 0 }, + { "Training_Enable", 1, 1 }, + { "Restart_Training", 0, 1 }, + { "XGMAC_PORT_AE_RX_SIGDET", 0x25788, 0 }, + { "XGMAC_PORT_AE_KR_STATUS", 0x2578c, 0 }, + { "Training_Failure", 3, 1 }, + { "Training", 2, 1 }, + { "Frame_Lock", 1, 1 }, + { "RX_Trained", 0, 1 }, + { "XGMAC_PORT_HSS_TXA_MODE_CFG", 0x25800, 0 }, + { "BWSEL", 2, 2 }, + { "RTSEL", 0, 2 }, + { "XGMAC_PORT_HSS_TXA_TEST_CTRL", 0x25804, 0 }, + { "TWDP", 5, 1 }, + { "TPGRST", 4, 1 }, + { "TPGEN", 3, 1 }, + { "TPSEL", 0, 3 }, + { "XGMAC_PORT_HSS_TXA_COEFF_CTRL", 0x25808, 0 }, + { "AEINVPOL", 6, 1 }, + { "AESOURCE", 5, 1 }, + { "EQMODE", 4, 1 }, + { "OCOEF", 3, 1 }, + { "COEFRST", 2, 1 }, + { "SPEN", 1, 1 }, + { "ALOAD", 0, 1 }, + { "XGMAC_PORT_HSS_TXA_DRIVER_MODE", 0x2580c, 0 }, + { "DRVOFFT", 5, 1 }, + { "SLEW", 2, 3 }, + { "FFE", 0, 2 }, + { "XGMAC_PORT_HSS_TXA_DRIVER_OVR_CTRL", 0x25810, 0 }, + { "VLINC", 7, 1 }, + { "VLDEC", 6, 1 }, + { "LOPWR", 5, 1 }, + { "TDMEN", 4, 1 }, + { "DCCEN", 3, 1 }, + { "VHSEL", 2, 1 }, + { "IDAC", 0, 2 }, + { "XGMAC_PORT_HSS_TXA_TDM_BIASGEN_STANDBY_TIMER", 0x25814, 0 }, + { "XGMAC_PORT_HSS_TXA_TDM_BIASGEN_PWRON_TIMER", 0x25818, 0 }, + { "XGMAC_PORT_HSS_TXA_TAP0_COEFF", 0x25820, 0 }, + { "XGMAC_PORT_HSS_TXA_TAP1_COEFF", 0x25824, 0 }, + { "XGMAC_PORT_HSS_TXA_TAP2_COEFF", 0x25828, 0 }, + { "XGMAC_PORT_HSS_TXA_PWR", 0x25830, 0 }, + { "XGMAC_PORT_HSS_TXA_POLARITY", 0x25834, 0 }, + { "TXPOL", 4, 3 }, + { "NTXPOL", 0, 3 }, + { "XGMAC_PORT_HSS_TXA_8023AP_AE_CMD", 0x25838, 0 }, + { "CXPRESET", 13, 1 }, + { "CXINIT", 12, 1 }, + { "C2UPDT", 4, 2 }, + { "C1UPDT", 2, 2 }, + { "C0UPDT", 0, 2 }, + { "XGMAC_PORT_HSS_TXA_8023AP_AE_STATUS", 0x2583c, 0 }, + { "C2STAT", 4, 2 }, + { "C1STAT", 2, 2 }, + { "C0STAT", 0, 2 }, + { "XGMAC_PORT_HSS_TXA_TAP0_IDAC_OVR", 0x25840, 0 }, + { "XGMAC_PORT_HSS_TXA_TAP1_IDAC_OVR", 0x25844, 0 }, + { "XGMAC_PORT_HSS_TXA_TAP2_IDAC_OVR", 0x25848, 0 }, + { "XGMAC_PORT_HSS_TXA_PWR_DAC_OVR", 0x25850, 0 }, + { "OPEN", 7, 1 }, + { "OPVAL", 0, 5 }, + { "XGMAC_PORT_HSS_TXA_PWR_DAC", 0x25854, 0 }, + { "XGMAC_PORT_HSS_TXA_TAP0_IDAC_APP", 0x25860, 0 }, + { "XGMAC_PORT_HSS_TXA_TAP1_IDAC_APP", 0x25864, 0 }, + { "XGMAC_PORT_HSS_TXA_TAP2_IDAC_APP", 0x25868, 0 }, + { "XGMAC_PORT_HSS_TXA_SEG_DIS_APP", 0x25870, 0 }, + { "XGMAC_PORT_HSS_TXA_EXT_ADDR_DATA", 0x25878, 0 }, + { "XGMAC_PORT_HSS_TXA_EXT_ADDR", 0x2587c, 0 }, + { "XADDR", 1, 5 }, + { "XWR", 0, 1 }, + { "XGMAC_PORT_HSS_TXB_MODE_CFG", 0x25880, 0 }, + { "BWSEL", 2, 2 }, + { "RTSEL", 0, 2 }, + { "XGMAC_PORT_HSS_TXB_TEST_CTRL", 0x25884, 0 }, + { "TWDP", 5, 1 }, + { "TPGRST", 4, 1 }, + { "TPGEN", 3, 1 }, + { "TPSEL", 0, 3 }, + { "XGMAC_PORT_HSS_TXB_COEFF_CTRL", 0x25888, 0 }, + { "AEINVPOL", 6, 1 }, + { "AESOURCE", 5, 1 }, + { "EQMODE", 4, 1 }, + { "OCOEF", 3, 1 }, + { "COEFRST", 2, 1 }, + { "SPEN", 1, 1 }, + { "ALOAD", 0, 1 }, + { "XGMAC_PORT_HSS_TXB_DRIVER_MODE", 0x2588c, 0 }, + { "DRVOFFT", 5, 1 }, + { "SLEW", 2, 3 }, + { "FFE", 0, 2 }, + { "XGMAC_PORT_HSS_TXB_DRIVER_OVR_CTRL", 0x25890, 0 }, + { "VLINC", 7, 1 }, + { "VLDEC", 6, 1 }, + { "LOPWR", 5, 1 }, + { "TDMEN", 4, 1 }, + { "DCCEN", 3, 1 }, + { "VHSEL", 2, 1 }, + { "IDAC", 0, 2 }, + { "XGMAC_PORT_HSS_TXB_TDM_BIASGEN_STANDBY_TIMER", 0x25894, 0 }, + { "XGMAC_PORT_HSS_TXB_TDM_BIASGEN_PWRON_TIMER", 0x25898, 0 }, + { "XGMAC_PORT_HSS_TXB_TAP0_COEFF", 0x258a0, 0 }, + { "XGMAC_PORT_HSS_TXB_TAP1_COEFF", 0x258a4, 0 }, + { "XGMAC_PORT_HSS_TXB_TAP2_COEFF", 0x258a8, 0 }, + { "XGMAC_PORT_HSS_TXB_PWR", 0x258b0, 0 }, + { "XGMAC_PORT_HSS_TXB_POLARITY", 0x258b4, 0 }, + { "TXPOL", 4, 3 }, + { "NTXPOL", 0, 3 }, + { "XGMAC_PORT_HSS_TXB_8023AP_AE_CMD", 0x258b8, 0 }, + { "CXPRESET", 13, 1 }, + { "CXINIT", 12, 1 }, + { "C2UPDT", 4, 2 }, + { "C1UPDT", 2, 2 }, + { "C0UPDT", 0, 2 }, + { "XGMAC_PORT_HSS_TXB_8023AP_AE_STATUS", 0x258bc, 0 }, + { "C2STAT", 4, 2 }, + { "C1STAT", 2, 2 }, + { "C0STAT", 0, 2 }, + { "XGMAC_PORT_HSS_TXB_TAP0_IDAC_OVR", 0x258c0, 0 }, + { "XGMAC_PORT_HSS_TXB_TAP1_IDAC_OVR", 0x258c4, 0 }, + { "XGMAC_PORT_HSS_TXB_TAP2_IDAC_OVR", 0x258c8, 0 }, + { "XGMAC_PORT_HSS_TXB_PWR_DAC_OVR", 0x258d0, 0 }, + { "OPEN", 7, 1 }, + { "OPVAL", 0, 5 }, + { "XGMAC_PORT_HSS_TXB_PWR_DAC", 0x258d4, 0 }, + { "XGMAC_PORT_HSS_TXB_TAP0_IDAC_APP", 0x258e0, 0 }, + { "XGMAC_PORT_HSS_TXB_TAP1_IDAC_APP", 0x258e4, 0 }, + { "XGMAC_PORT_HSS_TXB_TAP2_IDAC_APP", 0x258e8, 0 }, + { "XGMAC_PORT_HSS_TXB_SEG_DIS_APP", 0x258f0, 0 }, + { "XGMAC_PORT_HSS_TXB_EXT_ADDR_DATA", 0x258f8, 0 }, + { "XGMAC_PORT_HSS_TXB_EXT_ADDR", 0x258fc, 0 }, + { "XADDR", 2, 4 }, + { "XWR", 0, 1 }, + { "XGMAC_PORT_HSS_RXA_CFG_MODE", 0x25900, 0 }, + { "BW810", 8, 1 }, + { "AUXCLK", 7, 1 }, + { "DMSEL", 4, 3 }, + { "BWSEL", 2, 2 }, + { "RTSEL", 0, 2 }, + { "XGMAC_PORT_HSS_RXA_TEST_CTRL", 0x25904, 0 }, + { "RCLKEN", 15, 1 }, + { "RRATE", 13, 2 }, + { "LBFRCERROR", 10, 1 }, + { "LBERROR", 9, 1 }, + { "LBSYNC", 8, 1 }, + { "FDWRAPCLK", 7, 1 }, + { "FDWRAP", 6, 1 }, + { "PRST", 4, 1 }, + { "PCHKEN", 3, 1 }, + { "PRBSSEL", 0, 3 }, + { "XGMAC_PORT_HSS_RXA_PH_ROTATOR_CTRL", 0x25908, 0 }, + { "FTHROT", 12, 4 }, + { "RTHROT", 11, 1 }, + { "FILTCTL", 7, 4 }, + { "RSRVO", 5, 2 }, + { "EXTEL", 4, 1 }, + { "RSTONSTUCK", 3, 1 }, + { "FREEZEFW", 2, 1 }, + { "RESETFW", 1, 1 }, + { "SSCENABLE", 0, 1 }, + { "XGMAC_PORT_HSS_RXA_PH_ROTATOR_OFFSET_CTRL", 0x2590c, 0 }, + { "RSNP", 11, 1 }, + { "TSOEN", 10, 1 }, + { "OFFEN", 9, 1 }, + { "TMSCAL", 7, 2 }, + { "APADJ", 6, 1 }, + { "RSEL", 5, 1 }, + { "PHOFFS", 0, 5 }, + { "XGMAC_PORT_HSS_RXA_PH_ROTATOR_POSITION1", 0x25910, 0 }, + { "ROT0A", 8, 6 }, + { "RTSEL", 0, 6 }, + { "XGMAC_PORT_HSS_RXA_PH_ROTATOR_POSITION2", 0x25914, 0 }, + { "XGMAC_PORT_HSS_RXA_PH_ROTATOR_STATIC_PH_OFFSET", 0x25918, 0 }, + { "RCALER", 15, 1 }, + { "RAOOFF", 10, 5 }, + { "RAEOFF", 5, 5 }, + { "RDOFF", 0, 5 }, + { "XGMAC_PORT_HSS_RXA_SIGDET_CTRL", 0x2591c, 0 }, + { "SIGNSD", 13, 2 }, + { "DACSD", 8, 5 }, + { "SDPDN", 6, 1 }, + { "SIGDET", 5, 1 }, + { "SDLVL", 0, 5 }, + { "XGMAC_PORT_HSS_RXA_DFE_CTRL", 0x25920, 0 }, + { "REQCMP", 15, 1 }, + { "DFEREQ", 14, 1 }, + { "SPCEN", 13, 1 }, + { "GATEEN", 12, 1 }, + { "SPIFMT", 9, 3 }, + { "DFEPWR", 6, 3 }, + { "STNDBY", 5, 1 }, + { "FRCH", 4, 1 }, + { "NONRND", 3, 1 }, + { "NONRNF", 2, 1 }, + { "FSTLCK", 1, 1 }, + { "DFERST", 0, 1 }, + { "XGMAC_PORT_HSS_RXA_DFE_DATA_EDGE_SAMPLE", 0x25924, 0 }, + { "ESAMP", 8, 8 }, + { "DSAMP", 0, 8 }, + { "XGMAC_PORT_HSS_RXA_DFE_AMP_SAMPLE", 0x25928, 0 }, + { "SMODE", 8, 4 }, + { "ADCORR", 7, 1 }, + { "TRAINEN", 6, 1 }, + { "ASAMPQ", 3, 3 }, + { "ASAMP", 0, 3 }, + { "XGMAC_PORT_HSS_RXA_VGA_CTRL1", 0x2592c, 0 }, + { "POLE", 12, 2 }, + { "PEAK", 8, 3 }, + { "VOFFSN", 6, 2 }, + { "VOFFA", 0, 6 }, + { "XGMAC_PORT_HSS_RXA_VGA_CTRL2", 0x25930, 0 }, + { "SHORTV", 10, 1 }, + { "VGAIN", 0, 4 }, + { "XGMAC_PORT_HSS_RXA_VGA_CTRL3", 0x25934, 0 }, + { "HBND1", 10, 1 }, + { "HBND0", 9, 1 }, + { "VLCKD", 8, 1 }, + { "VLCKDF", 7, 1 }, + { "AMAXT", 0, 7 }, + { "XGMAC_PORT_HSS_RXA_DFE_D00_D01_OFFSET", 0x25938, 0 }, + { "D01SN", 13, 2 }, + { "D01AMP", 8, 5 }, + { "D00SN", 5, 2 }, + { "D00AMP", 0, 5 }, + { "XGMAC_PORT_HSS_RXA_DFE_D10_D11_OFFSET", 0x2593c, 0 }, + { "D11SN", 13, 2 }, + { "D11AMP", 8, 5 }, + { "D10SN", 5, 2 }, + { "D10AMP", 0, 5 }, + { "XGMAC_PORT_HSS_RXA_DFE_E0_E1_OFFSET", 0x25940, 0 }, + { "E1SN", 13, 2 }, + { "E1AMP", 8, 5 }, + { "E0SN", 5, 2 }, + { "E0AMP", 0, 5 }, + { "XGMAC_PORT_HSS_RXA_DACA_OFFSET", 0x25944, 0 }, + { "AOFFO", 8, 6 }, + { "AOFFE", 0, 6 }, + { "XGMAC_PORT_HSS_RXA_DACAP_DAC_AN_OFFSET", 0x25948, 0 }, + { "DACAN", 8, 8 }, + { "DACAP", 0, 8 }, + { "XGMAC_PORT_HSS_RXA_DACA_MIN", 0x2594c, 0 }, + { "DACAZ", 8, 8 }, + { "DACAM", 0, 8 }, + { "XGMAC_PORT_HSS_RXA_ADAC_CTRL", 0x25950, 0 }, + { "ADSN", 7, 2 }, + { "ADMAG", 0, 7 }, + { "XGMAC_PORT_HSS_RXA_DIGITAL_EYE_CTRL", 0x25954, 0 }, + { "BLKAZ", 15, 1 }, + { "WIDTH", 10, 5 }, + { "MINWIDTH", 5, 5 }, + { "MINAMP", 0, 5 }, + { "XGMAC_PORT_HSS_RXA_DIGITAL_EYE_METRICS", 0x25958, 0 }, + { "EMBRDY", 10, 1 }, + { "EMBUMP", 7, 1 }, + { "EMMD", 5, 2 }, + { "EMPAT", 1, 1 }, + { "EMEN", 0, 1 }, + { "XGMAC_PORT_HSS_RXA_DFE_H1", 0x2595c, 0 }, + { "H1OSN", 14, 2 }, + { "H1OMAG", 8, 6 }, + { "H1ESN", 6, 2 }, + { "H1EMAG", 0, 6 }, + { "XGMAC_PORT_HSS_RXA_DFE_H2", 0x25960, 0 }, + { "H2OSN", 13, 2 }, + { "H2OMAG", 8, 5 }, + { "H2ESN", 5, 2 }, + { "H2EMAG", 0, 5 }, + { "XGMAC_PORT_HSS_RXA_DFE_H3", 0x25964, 0 }, + { "H3OSN", 12, 2 }, + { "H3OMAG", 8, 4 }, + { "H3ESN", 4, 2 }, + { "H3EMAG", 0, 4 }, + { "XGMAC_PORT_HSS_RXA_DFE_H4", 0x25968, 0 }, + { "H4OSN", 12, 2 }, + { "H4OMAG", 8, 4 }, + { "H4ESN", 4, 2 }, + { "H4EMAG", 0, 4 }, + { "XGMAC_PORT_HSS_RXA_DFE_H5", 0x2596c, 0 }, + { "H5OSN", 12, 2 }, + { "H5OMAG", 8, 4 }, + { "H5ESN", 4, 2 }, + { "H5EMAG", 0, 4 }, + { "XGMAC_PORT_HSS_RXA_DAC_DPC", 0x25970, 0 }, + { "DPCCVG", 13, 1 }, + { "DACCVG", 12, 1 }, + { "DPCTGT", 9, 3 }, + { "BLKH1T", 8, 1 }, + { "BLKOAE", 7, 1 }, + { "H1TGT", 4, 3 }, + { "OAE", 0, 4 }, + { "XGMAC_PORT_HSS_RXA_DDC", 0x25974, 0 }, + { "OLS", 11, 5 }, + { "OES", 6, 5 }, + { "BLKODEC", 5, 1 }, + { "ODEC", 0, 5 }, + { "XGMAC_PORT_HSS_RXA_INTERNAL_STATUS", 0x25978, 0 }, + { "BER6", 15, 1 }, + { "BER6VAL", 14, 1 }, + { "BER3VAL", 13, 1 }, + { "DPCCMP", 9, 1 }, + { "DACCMP", 8, 1 }, + { "DDCCMP", 7, 1 }, + { "AERRFLG", 6, 1 }, + { "WERRFLG", 5, 1 }, + { "TRCMP", 4, 1 }, + { "VLCKF", 3, 1 }, + { "ROCADJ", 2, 1 }, + { "ROCCMP", 1, 1 }, + { "OCCMP", 0, 1 }, + { "XGMAC_PORT_HSS_RXA_DFE_FUNC_CTRL", 0x2597c, 0 }, + { "FDPC", 15, 1 }, + { "FDAC", 14, 1 }, + { "FDDC", 13, 1 }, + { "FNRND", 12, 1 }, + { "FVGAIN", 11, 1 }, + { "FVOFF", 10, 1 }, + { "FSDET", 9, 1 }, + { "FBER6", 8, 1 }, + { "FROTO", 7, 1 }, + { "FH4H5", 6, 1 }, + { "FH2H3", 5, 1 }, + { "FH1", 4, 1 }, + { "FH1SN", 3, 1 }, + { "FNRDF", 2, 1 }, + { "FADAC", 0, 1 }, + { "XGMAC_PORT_HSS_RXB_CFG_MODE", 0x25980, 0 }, + { "BW810", 8, 1 }, + { "AUXCLK", 7, 1 }, + { "DMSEL", 4, 3 }, + { "BWSEL", 2, 2 }, + { "RTSEL", 0, 2 }, + { "XGMAC_PORT_HSS_RXB_TEST_CTRL", 0x25984, 0 }, + { "RCLKEN", 15, 1 }, + { "RRATE", 13, 2 }, + { "LBFRCERROR", 10, 1 }, + { "LBERROR", 9, 1 }, + { "LBSYNC", 8, 1 }, + { "FDWRAPCLK", 7, 1 }, + { "FDWRAP", 6, 1 }, + { "PRST", 4, 1 }, + { "PCHKEN", 3, 1 }, + { "PRBSSEL", 0, 3 }, + { "XGMAC_PORT_HSS_RXB_PH_ROTATOR_CTRL", 0x25988, 0 }, + { "FTHROT", 12, 4 }, + { "RTHROT", 11, 1 }, + { "FILTCTL", 7, 4 }, + { "RSRVO", 5, 2 }, + { "EXTEL", 4, 1 }, + { "RSTONSTUCK", 3, 1 }, + { "FREEZEFW", 2, 1 }, + { "RESETFW", 1, 1 }, + { "SSCENABLE", 0, 1 }, + { "XGMAC_PORT_HSS_RXB_PH_ROTATOR_OFFSET_CTRL", 0x2598c, 0 }, + { "RSNP", 11, 1 }, + { "TSOEN", 10, 1 }, + { "OFFEN", 9, 1 }, + { "TMSCAL", 7, 2 }, + { "APADJ", 6, 1 }, + { "RSEL", 5, 1 }, + { "PHOFFS", 0, 5 }, + { "XGMAC_PORT_HSS_RXB_PH_ROTATOR_POSITION1", 0x25990, 0 }, + { "ROT0A", 8, 6 }, + { "RTSEL", 0, 6 }, + { "XGMAC_PORT_HSS_RXB_PH_ROTATOR_POSITION2", 0x25994, 0 }, + { "XGMAC_PORT_HSS_RXB_PH_ROTATOR_STATIC_PH_OFFSET", 0x25998, 0 }, + { "RCALER", 15, 1 }, + { "RAOOFF", 10, 5 }, + { "RAEOFF", 5, 5 }, + { "RDOFF", 0, 5 }, + { "XGMAC_PORT_HSS_RXB_SIGDET_CTRL", 0x2599c, 0 }, + { "SIGNSD", 13, 2 }, + { "DACSD", 8, 5 }, + { "SDPDN", 6, 1 }, + { "SIGDET", 5, 1 }, + { "SDLVL", 0, 5 }, + { "XGMAC_PORT_HSS_RXB_DFE_CTRL", 0x259a0, 0 }, + { "REQCMP", 15, 1 }, + { "DFEREQ", 14, 1 }, + { "SPCEN", 13, 1 }, + { "GATEEN", 12, 1 }, + { "SPIFMT", 9, 3 }, + { "DFEPWR", 6, 3 }, + { "STNDBY", 5, 1 }, + { "FRCH", 4, 1 }, + { "NONRND", 3, 1 }, + { "NONRNF", 2, 1 }, + { "FSTLCK", 1, 1 }, + { "DFERST", 0, 1 }, + { "XGMAC_PORT_HSS_RXB_DFE_DATA_EDGE_SAMPLE", 0x259a4, 0 }, + { "ESAMP", 8, 8 }, + { "DSAMP", 0, 8 }, + { "XGMAC_PORT_HSS_RXB_DFE_AMP_SAMPLE", 0x259a8, 0 }, + { "SMODE", 8, 4 }, + { "ADCORR", 7, 1 }, + { "TRAINEN", 6, 1 }, + { "ASAMPQ", 3, 3 }, + { "ASAMP", 0, 3 }, + { "XGMAC_PORT_HSS_RXB_VGA_CTRL1", 0x259ac, 0 }, + { "POLE", 12, 2 }, + { "PEAK", 8, 3 }, + { "VOFFSN", 6, 2 }, + { "VOFFA", 0, 6 }, + { "XGMAC_PORT_HSS_RXB_VGA_CTRL2", 0x259b0, 0 }, + { "SHORTV", 10, 1 }, + { "VGAIN", 0, 4 }, + { "XGMAC_PORT_HSS_RXB_VGA_CTRL3", 0x259b4, 0 }, + { "HBND1", 10, 1 }, + { "HBND0", 9, 1 }, + { "VLCKD", 8, 1 }, + { "VLCKDF", 7, 1 }, + { "AMAXT", 0, 7 }, + { "XGMAC_PORT_HSS_RXB_DFE_D00_D01_OFFSET", 0x259b8, 0 }, + { "D01SN", 13, 2 }, + { "D01AMP", 8, 5 }, + { "D00SN", 5, 2 }, + { "D00AMP", 0, 5 }, + { "XGMAC_PORT_HSS_RXB_DFE_D10_D11_OFFSET", 0x259bc, 0 }, + { "D11SN", 13, 2 }, + { "D11AMP", 8, 5 }, + { "D10SN", 5, 2 }, + { "D10AMP", 0, 5 }, + { "XGMAC_PORT_HSS_RXB_DFE_E0_E1_OFFSET", 0x259c0, 0 }, + { "E1SN", 13, 2 }, + { "E1AMP", 8, 5 }, + { "E0SN", 5, 2 }, + { "E0AMP", 0, 5 }, + { "XGMAC_PORT_HSS_RXB_DACA_OFFSET", 0x259c4, 0 }, + { "AOFFO", 8, 6 }, + { "AOFFE", 0, 6 }, + { "XGMAC_PORT_HSS_RXB_DACAP_DAC_AN_OFFSET", 0x259c8, 0 }, + { "DACAN", 8, 8 }, + { "DACAP", 0, 8 }, + { "XGMAC_PORT_HSS_RXB_DACA_MIN", 0x259cc, 0 }, + { "DACAZ", 8, 8 }, + { "DACAM", 0, 8 }, + { "XGMAC_PORT_HSS_RXB_ADAC_CTRL", 0x259d0, 0 }, + { "ADSN", 7, 2 }, + { "ADMAG", 0, 7 }, + { "XGMAC_PORT_HSS_RXB_DIGITAL_EYE_CTRL", 0x259d4, 0 }, + { "BLKAZ", 15, 1 }, + { "WIDTH", 10, 5 }, + { "MINWIDTH", 5, 5 }, + { "MINAMP", 0, 5 }, + { "XGMAC_PORT_HSS_RXB_DIGITAL_EYE_METRICS", 0x259d8, 0 }, + { "EMBRDY", 10, 1 }, + { "EMBUMP", 7, 1 }, + { "EMMD", 5, 2 }, + { "EMPAT", 1, 1 }, + { "EMEN", 0, 1 }, + { "XGMAC_PORT_HSS_RXB_DFE_H1", 0x259dc, 0 }, + { "H1OSN", 14, 2 }, + { "H1OMAG", 8, 6 }, + { "H1ESN", 6, 2 }, + { "H1EMAG", 0, 6 }, + { "XGMAC_PORT_HSS_RXB_DFE_H2", 0x259e0, 0 }, + { "H2OSN", 13, 2 }, + { "H2OMAG", 8, 5 }, + { "H2ESN", 5, 2 }, + { "H2EMAG", 0, 5 }, + { "XGMAC_PORT_HSS_RXB_DFE_H3", 0x259e4, 0 }, + { "H3OSN", 12, 2 }, + { "H3OMAG", 8, 4 }, + { "H3ESN", 4, 2 }, + { "H3EMAG", 0, 4 }, + { "XGMAC_PORT_HSS_RXB_DFE_H4", 0x259e8, 0 }, + { "H4OSN", 12, 2 }, + { "H4OMAG", 8, 4 }, + { "H4ESN", 4, 2 }, + { "H4EMAG", 0, 4 }, + { "XGMAC_PORT_HSS_RXB_DFE_H5", 0x259ec, 0 }, + { "H5OSN", 12, 2 }, + { "H5OMAG", 8, 4 }, + { "H5ESN", 4, 2 }, + { "H5EMAG", 0, 4 }, + { "XGMAC_PORT_HSS_RXB_DAC_DPC", 0x259f0, 0 }, + { "DPCCVG", 13, 1 }, + { "DACCVG", 12, 1 }, + { "DPCTGT", 9, 3 }, + { "BLKH1T", 8, 1 }, + { "BLKOAE", 7, 1 }, + { "H1TGT", 4, 3 }, + { "OAE", 0, 4 }, + { "XGMAC_PORT_HSS_RXB_DDC", 0x259f4, 0 }, + { "OLS", 11, 5 }, + { "OES", 6, 5 }, + { "BLKODEC", 5, 1 }, + { "ODEC", 0, 5 }, + { "XGMAC_PORT_HSS_RXB_INTERNAL_STATUS", 0x259f8, 0 }, + { "BER6", 15, 1 }, + { "BER6VAL", 14, 1 }, + { "BER3VAL", 13, 1 }, + { "DPCCMP", 9, 1 }, + { "DACCMP", 8, 1 }, + { "DDCCMP", 7, 1 }, + { "AERRFLG", 6, 1 }, + { "WERRFLG", 5, 1 }, + { "TRCMP", 4, 1 }, + { "VLCKF", 3, 1 }, + { "ROCADJ", 2, 1 }, + { "ROCCMP", 1, 1 }, + { "OCCMP", 0, 1 }, + { "XGMAC_PORT_HSS_RXB_DFE_FUNC_CTRL", 0x259fc, 0 }, + { "FDPC", 15, 1 }, + { "FDAC", 14, 1 }, + { "FDDC", 13, 1 }, + { "FNRND", 12, 1 }, + { "FVGAIN", 11, 1 }, + { "FVOFF", 10, 1 }, + { "FSDET", 9, 1 }, + { "FBER6", 8, 1 }, + { "FROTO", 7, 1 }, + { "FH4H5", 6, 1 }, + { "FH2H3", 5, 1 }, + { "FH1", 4, 1 }, + { "FH1SN", 3, 1 }, + { "FNRDF", 2, 1 }, + { "FADAC", 0, 1 }, + { "XGMAC_PORT_HSS_TXC_MODE_CFG", 0x25a00, 0 }, + { "BWSEL", 2, 2 }, + { "RTSEL", 0, 2 }, + { "XGMAC_PORT_HSS_TXC_TEST_CTRL", 0x25a04, 0 }, + { "TWDP", 5, 1 }, + { "TPGRST", 4, 1 }, + { "TPGEN", 3, 1 }, + { "TPSEL", 0, 3 }, + { "XGMAC_PORT_HSS_TXC_COEFF_CTRL", 0x25a08, 0 }, + { "AEINVPOL", 6, 1 }, + { "AESOURCE", 5, 1 }, + { "EQMODE", 4, 1 }, + { "OCOEF", 3, 1 }, + { "COEFRST", 2, 1 }, + { "SPEN", 1, 1 }, + { "ALOAD", 0, 1 }, + { "XGMAC_PORT_HSS_TXC_DRIVER_MODE", 0x25a0c, 0 }, + { "DRVOFFT", 5, 1 }, + { "SLEW", 2, 3 }, + { "FFE", 0, 2 }, + { "XGMAC_PORT_HSS_TXC_DRIVER_OVR_CTRL", 0x25a10, 0 }, + { "VLINC", 7, 1 }, + { "VLDEC", 6, 1 }, + { "LOPWR", 5, 1 }, + { "TDMEN", 4, 1 }, + { "DCCEN", 3, 1 }, + { "VHSEL", 2, 1 }, + { "IDAC", 0, 2 }, + { "XGMAC_PORT_HSS_TXC_TDM_BIASGEN_STANDBY_TIMER", 0x25a14, 0 }, + { "XGMAC_PORT_HSS_TXC_TDM_BIASGEN_PWRON_TIMER", 0x25a18, 0 }, + { "XGMAC_PORT_HSS_TXC_TAP0_COEFF", 0x25a20, 0 }, + { "XGMAC_PORT_HSS_TXC_TAP1_COEFF", 0x25a24, 0 }, + { "XGMAC_PORT_HSS_TXC_TAP2_COEFF", 0x25a28, 0 }, + { "XGMAC_PORT_HSS_TXC_PWR", 0x25a30, 0 }, + { "XGMAC_PORT_HSS_TXC_POLARITY", 0x25a34, 0 }, + { "TXPOL", 4, 3 }, + { "NTXPOL", 0, 3 }, + { "XGMAC_PORT_HSS_TXC_8023AP_AE_CMD", 0x25a38, 0 }, + { "CXPRESET", 13, 1 }, + { "CXINIT", 12, 1 }, + { "C2UPDT", 4, 2 }, + { "C1UPDT", 2, 2 }, + { "C0UPDT", 0, 2 }, + { "XGMAC_PORT_HSS_TXC_8023AP_AE_STATUS", 0x25a3c, 0 }, + { "C2STAT", 4, 2 }, + { "C1STAT", 2, 2 }, + { "C0STAT", 0, 2 }, + { "XGMAC_PORT_HSS_TXC_TAP0_IDAC_OVR", 0x25a40, 0 }, + { "XGMAC_PORT_HSS_TXC_TAP1_IDAC_OVR", 0x25a44, 0 }, + { "XGMAC_PORT_HSS_TXC_TAP2_IDAC_OVR", 0x25a48, 0 }, + { "XGMAC_PORT_HSS_TXC_PWR_DAC_OVR", 0x25a50, 0 }, + { "OPEN", 7, 1 }, + { "OPVAL", 0, 5 }, + { "XGMAC_PORT_HSS_TXC_PWR_DAC", 0x25a54, 0 }, + { "XGMAC_PORT_HSS_TXC_TAP0_IDAC_APP", 0x25a60, 0 }, + { "XGMAC_PORT_HSS_TXC_TAP1_IDAC_APP", 0x25a64, 0 }, + { "XGMAC_PORT_HSS_TXC_TAP2_IDAC_APP", 0x25a68, 0 }, + { "XGMAC_PORT_HSS_TXC_SEG_DIS_APP", 0x25a70, 0 }, + { "XGMAC_PORT_HSS_TXC_EXT_ADDR_DATA", 0x25a78, 0 }, + { "XGMAC_PORT_HSS_TXC_EXT_ADDR", 0x25a7c, 0 }, + { "XADDR", 2, 4 }, + { "XWR", 0, 1 }, + { "XGMAC_PORT_HSS_TXD_MODE_CFG", 0x25a80, 0 }, + { "BWSEL", 2, 2 }, + { "RTSEL", 0, 2 }, + { "XGMAC_PORT_HSS_TXD_TEST_CTRL", 0x25a84, 0 }, + { "TWDP", 5, 1 }, + { "TPGRST", 4, 1 }, + { "TPGEN", 3, 1 }, + { "TPSEL", 0, 3 }, + { "XGMAC_PORT_HSS_TXD_COEFF_CTRL", 0x25a88, 0 }, + { "AEINVPOL", 6, 1 }, + { "AESOURCE", 5, 1 }, + { "EQMODE", 4, 1 }, + { "OCOEF", 3, 1 }, + { "COEFRST", 2, 1 }, + { "SPEN", 1, 1 }, + { "ALOAD", 0, 1 }, + { "XGMAC_PORT_HSS_TXD_DRIVER_MODE", 0x25a8c, 0 }, + { "DRVOFFT", 5, 1 }, + { "SLEW", 2, 3 }, + { "FFE", 0, 2 }, + { "XGMAC_PORT_HSS_TXD_DRIVER_OVR_CTRL", 0x25a90, 0 }, + { "VLINC", 7, 1 }, + { "VLDEC", 6, 1 }, + { "LOPWR", 5, 1 }, + { "TDMEN", 4, 1 }, + { "DCCEN", 3, 1 }, + { "VHSEL", 2, 1 }, + { "IDAC", 0, 2 }, + { "XGMAC_PORT_HSS_TXD_TDM_BIASGEN_STANDBY_TIMER", 0x25a94, 0 }, + { "XGMAC_PORT_HSS_TXD_TDM_BIASGEN_PWRON_TIMER", 0x25a98, 0 }, + { "XGMAC_PORT_HSS_TXD_TAP0_COEFF", 0x25aa0, 0 }, + { "XGMAC_PORT_HSS_TXD_TAP1_COEFF", 0x25aa4, 0 }, + { "XGMAC_PORT_HSS_TXD_TAP2_COEFF", 0x25aa8, 0 }, + { "XGMAC_PORT_HSS_TXD_PWR", 0x25ab0, 0 }, + { "XGMAC_PORT_HSS_TXD_POLARITY", 0x25ab4, 0 }, + { "TXPOL", 4, 3 }, + { "NTXPOL", 0, 3 }, + { "XGMAC_PORT_HSS_TXD_8023AP_AE_CMD", 0x25ab8, 0 }, + { "CXPRESET", 13, 1 }, + { "CXINIT", 12, 1 }, + { "C2UPDT", 4, 2 }, + { "C1UPDT", 2, 2 }, + { "C0UPDT", 0, 2 }, + { "XGMAC_PORT_HSS_TXD_8023AP_AE_STATUS", 0x25abc, 0 }, + { "C2STAT", 4, 2 }, + { "C1STAT", 2, 2 }, + { "C0STAT", 0, 2 }, + { "XGMAC_PORT_HSS_TXD_TAP0_IDAC_OVR", 0x25ac0, 0 }, + { "XGMAC_PORT_HSS_TXD_TAP1_IDAC_OVR", 0x25ac4, 0 }, + { "XGMAC_PORT_HSS_TXD_TAP2_IDAC_OVR", 0x25ac8, 0 }, + { "XGMAC_PORT_HSS_TXD_PWR_DAC_OVR", 0x25ad0, 0 }, + { "OPEN", 7, 1 }, + { "OPVAL", 0, 5 }, + { "XGMAC_PORT_HSS_TXD_PWR_DAC", 0x25ad4, 0 }, + { "XGMAC_PORT_HSS_TXD_TAP0_IDAC_APP", 0x25ae0, 0 }, + { "XGMAC_PORT_HSS_TXD_TAP1_IDAC_APP", 0x25ae4, 0 }, + { "XGMAC_PORT_HSS_TXD_TAP2_IDAC_APP", 0x25ae8, 0 }, + { "XGMAC_PORT_HSS_TXD_SEG_DIS_APP", 0x25af0, 0 }, + { "XGMAC_PORT_HSS_TXD_EXT_ADDR_DATA", 0x25af8, 0 }, + { "XGMAC_PORT_HSS_TXD_EXT_ADDR", 0x25afc, 0 }, + { "XADDR", 2, 4 }, + { "XWR", 0, 1 }, + { "XGMAC_PORT_HSS_RXC_CFG_MODE", 0x25b00, 0 }, + { "BW810", 8, 1 }, + { "AUXCLK", 7, 1 }, + { "DMSEL", 4, 3 }, + { "BWSEL", 2, 2 }, + { "RTSEL", 0, 2 }, + { "XGMAC_PORT_HSS_RXC_TEST_CTRL", 0x25b04, 0 }, + { "RCLKEN", 15, 1 }, + { "RRATE", 13, 2 }, + { "LBFRCERROR", 10, 1 }, + { "LBERROR", 9, 1 }, + { "LBSYNC", 8, 1 }, + { "FDWRAPCLK", 7, 1 }, + { "FDWRAP", 6, 1 }, + { "PRST", 4, 1 }, + { "PCHKEN", 3, 1 }, + { "PRBSSEL", 0, 3 }, + { "XGMAC_PORT_HSS_RXC_PH_ROTATOR_CTRL", 0x25b08, 0 }, + { "FTHROT", 12, 4 }, + { "RTHROT", 11, 1 }, + { "FILTCTL", 7, 4 }, + { "RSRVO", 5, 2 }, + { "EXTEL", 4, 1 }, + { "RSTONSTUCK", 3, 1 }, + { "FREEZEFW", 2, 1 }, + { "RESETFW", 1, 1 }, + { "SSCENABLE", 0, 1 }, + { "XGMAC_PORT_HSS_RXC_PH_ROTATOR_OFFSET_CTRL", 0x25b0c, 0 }, + { "RSNP", 11, 1 }, + { "TSOEN", 10, 1 }, + { "OFFEN", 9, 1 }, + { "TMSCAL", 7, 2 }, + { "APADJ", 6, 1 }, + { "RSEL", 5, 1 }, + { "PHOFFS", 0, 5 }, + { "XGMAC_PORT_HSS_RXC_PH_ROTATOR_POSITION1", 0x25b10, 0 }, + { "ROT0A", 8, 6 }, + { "RTSEL", 0, 6 }, + { "XGMAC_PORT_HSS_RXC_PH_ROTATOR_POSITION2", 0x25b14, 0 }, + { "XGMAC_PORT_HSS_RXC_PH_ROTATOR_STATIC_PH_OFFSET", 0x25b18, 0 }, + { "RCALER", 15, 1 }, + { "RAOOFF", 10, 5 }, + { "RAEOFF", 5, 5 }, + { "RDOFF", 0, 5 }, + { "XGMAC_PORT_HSS_RXC_SIGDET_CTRL", 0x25b1c, 0 }, + { "SIGNSD", 13, 2 }, + { "DACSD", 8, 5 }, + { "SDPDN", 6, 1 }, + { "SIGDET", 5, 1 }, + { "SDLVL", 0, 5 }, + { "XGMAC_PORT_HSS_RXC_DFE_CTRL", 0x25b20, 0 }, + { "REQCMP", 15, 1 }, + { "DFEREQ", 14, 1 }, + { "SPCEN", 13, 1 }, + { "GATEEN", 12, 1 }, + { "SPIFMT", 9, 3 }, + { "DFEPWR", 6, 3 }, + { "STNDBY", 5, 1 }, + { "FRCH", 4, 1 }, + { "NONRND", 3, 1 }, + { "NONRNF", 2, 1 }, + { "FSTLCK", 1, 1 }, + { "DFERST", 0, 1 }, + { "XGMAC_PORT_HSS_RXC_DFE_DATA_EDGE_SAMPLE", 0x25b24, 0 }, + { "ESAMP", 8, 8 }, + { "DSAMP", 0, 8 }, + { "XGMAC_PORT_HSS_RXC_DFE_AMP_SAMPLE", 0x25b28, 0 }, + { "SMODE", 8, 4 }, + { "ADCORR", 7, 1 }, + { "TRAINEN", 6, 1 }, + { "ASAMPQ", 3, 3 }, + { "ASAMP", 0, 3 }, + { "XGMAC_PORT_HSS_RXC_VGA_CTRL1", 0x25b2c, 0 }, + { "POLE", 12, 2 }, + { "PEAK", 8, 3 }, + { "VOFFSN", 6, 2 }, + { "VOFFA", 0, 6 }, + { "XGMAC_PORT_HSS_RXC_VGA_CTRL2", 0x25b30, 0 }, + { "SHORTV", 10, 1 }, + { "VGAIN", 0, 4 }, + { "XGMAC_PORT_HSS_RXC_VGA_CTRL3", 0x25b34, 0 }, + { "HBND1", 10, 1 }, + { "HBND0", 9, 1 }, + { "VLCKD", 8, 1 }, + { "VLCKDF", 7, 1 }, + { "AMAXT", 0, 7 }, + { "XGMAC_PORT_HSS_RXC_DFE_D00_D01_OFFSET", 0x25b38, 0 }, + { "D01SN", 13, 2 }, + { "D01AMP", 8, 5 }, + { "D00SN", 5, 2 }, + { "D00AMP", 0, 5 }, + { "XGMAC_PORT_HSS_RXC_DFE_D10_D11_OFFSET", 0x25b3c, 0 }, + { "D11SN", 13, 2 }, + { "D11AMP", 8, 5 }, + { "D10SN", 5, 2 }, + { "D10AMP", 0, 5 }, + { "XGMAC_PORT_HSS_RXC_DFE_E0_E1_OFFSET", 0x25b40, 0 }, + { "E1SN", 13, 2 }, + { "E1AMP", 8, 5 }, + { "E0SN", 5, 2 }, + { "E0AMP", 0, 5 }, + { "XGMAC_PORT_HSS_RXC_DACA_OFFSET", 0x25b44, 0 }, + { "AOFFO", 8, 6 }, + { "AOFFE", 0, 6 }, + { "XGMAC_PORT_HSS_RXC_DACAP_DAC_AN_OFFSET", 0x25b48, 0 }, + { "DACAN", 8, 8 }, + { "DACAP", 0, 8 }, + { "XGMAC_PORT_HSS_RXC_DACA_MIN", 0x25b4c, 0 }, + { "DACAZ", 8, 8 }, + { "DACAM", 0, 8 }, + { "XGMAC_PORT_HSS_RXC_ADAC_CTRL", 0x25b50, 0 }, + { "ADSN", 7, 2 }, + { "ADMAG", 0, 7 }, + { "XGMAC_PORT_HSS_RXC_DIGITAL_EYE_CTRL", 0x25b54, 0 }, + { "BLKAZ", 15, 1 }, + { "WIDTH", 10, 5 }, + { "MINWIDTH", 5, 5 }, + { "MINAMP", 0, 5 }, + { "XGMAC_PORT_HSS_RXC_DIGITAL_EYE_METRICS", 0x25b58, 0 }, + { "EMBRDY", 10, 1 }, + { "EMBUMP", 7, 1 }, + { "EMMD", 5, 2 }, + { "EMPAT", 1, 1 }, + { "EMEN", 0, 1 }, + { "XGMAC_PORT_HSS_RXC_DFE_H1", 0x25b5c, 0 }, + { "H1OSN", 14, 2 }, + { "H1OMAG", 8, 6 }, + { "H1ESN", 6, 2 }, + { "H1EMAG", 0, 6 }, + { "XGMAC_PORT_HSS_RXC_DFE_H2", 0x25b60, 0 }, + { "H2OSN", 13, 2 }, + { "H2OMAG", 8, 5 }, + { "H2ESN", 5, 2 }, + { "H2EMAG", 0, 5 }, + { "XGMAC_PORT_HSS_RXC_DFE_H3", 0x25b64, 0 }, + { "H3OSN", 12, 2 }, + { "H3OMAG", 8, 4 }, + { "H3ESN", 4, 2 }, + { "H3EMAG", 0, 4 }, + { "XGMAC_PORT_HSS_RXC_DFE_H4", 0x25b68, 0 }, + { "H4OSN", 12, 2 }, + { "H4OMAG", 8, 4 }, + { "H4ESN", 4, 2 }, + { "H4EMAG", 0, 4 }, + { "XGMAC_PORT_HSS_RXC_DFE_H5", 0x25b6c, 0 }, + { "H5OSN", 12, 2 }, + { "H5OMAG", 8, 4 }, + { "H5ESN", 4, 2 }, + { "H5EMAG", 0, 4 }, + { "XGMAC_PORT_HSS_RXC_DAC_DPC", 0x25b70, 0 }, + { "DPCCVG", 13, 1 }, + { "DACCVG", 12, 1 }, + { "DPCTGT", 9, 3 }, + { "BLKH1T", 8, 1 }, + { "BLKOAE", 7, 1 }, + { "H1TGT", 4, 3 }, + { "OAE", 0, 4 }, + { "XGMAC_PORT_HSS_RXC_DDC", 0x25b74, 0 }, + { "OLS", 11, 5 }, + { "OES", 6, 5 }, + { "BLKODEC", 5, 1 }, + { "ODEC", 0, 5 }, + { "XGMAC_PORT_HSS_RXC_INTERNAL_STATUS", 0x25b78, 0 }, + { "BER6", 15, 1 }, + { "BER6VAL", 14, 1 }, + { "BER3VAL", 13, 1 }, + { "DPCCMP", 9, 1 }, + { "DACCMP", 8, 1 }, + { "DDCCMP", 7, 1 }, + { "AERRFLG", 6, 1 }, + { "WERRFLG", 5, 1 }, + { "TRCMP", 4, 1 }, + { "VLCKF", 3, 1 }, + { "ROCADJ", 2, 1 }, + { "ROCCMP", 1, 1 }, + { "OCCMP", 0, 1 }, + { "XGMAC_PORT_HSS_RXC_DFE_FUNC_CTRL", 0x25b7c, 0 }, + { "FDPC", 15, 1 }, + { "FDAC", 14, 1 }, + { "FDDC", 13, 1 }, + { "FNRND", 12, 1 }, + { "FVGAIN", 11, 1 }, + { "FVOFF", 10, 1 }, + { "FSDET", 9, 1 }, + { "FBER6", 8, 1 }, + { "FROTO", 7, 1 }, + { "FH4H5", 6, 1 }, + { "FH2H3", 5, 1 }, + { "FH1", 4, 1 }, + { "FH1SN", 3, 1 }, + { "FNRDF", 2, 1 }, + { "FADAC", 0, 1 }, + { "XGMAC_PORT_HSS_RXD_CFG_MODE", 0x25b80, 0 }, + { "BW810", 8, 1 }, + { "AUXCLK", 7, 1 }, + { "DMSEL", 4, 3 }, + { "BWSEL", 2, 2 }, + { "RTSEL", 0, 2 }, + { "XGMAC_PORT_HSS_RXD_TEST_CTRL", 0x25b84, 0 }, + { "RCLKEN", 15, 1 }, + { "RRATE", 13, 2 }, + { "LBFRCERROR", 10, 1 }, + { "LBERROR", 9, 1 }, + { "LBSYNC", 8, 1 }, + { "FDWRAPCLK", 7, 1 }, + { "FDWRAP", 6, 1 }, + { "PRST", 4, 1 }, + { "PCHKEN", 3, 1 }, + { "PRBSSEL", 0, 3 }, + { "XGMAC_PORT_HSS_RXD_PH_ROTATOR_CTRL", 0x25b88, 0 }, + { "FTHROT", 12, 4 }, + { "RTHROT", 11, 1 }, + { "FILTCTL", 7, 4 }, + { "RSRVO", 5, 2 }, + { "EXTEL", 4, 1 }, + { "RSTONSTUCK", 3, 1 }, + { "FREEZEFW", 2, 1 }, + { "RESETFW", 1, 1 }, + { "SSCENABLE", 0, 1 }, + { "XGMAC_PORT_HSS_RXD_PH_ROTATOR_OFFSET_CTRL", 0x25b8c, 0 }, + { "RSNP", 11, 1 }, + { "TSOEN", 10, 1 }, + { "OFFEN", 9, 1 }, + { "TMSCAL", 7, 2 }, + { "APADJ", 6, 1 }, + { "RSEL", 5, 1 }, + { "PHOFFS", 0, 5 }, + { "XGMAC_PORT_HSS_RXD_PH_ROTATOR_POSITION1", 0x25b90, 0 }, + { "ROT0A", 8, 6 }, + { "RTSEL", 0, 6 }, + { "XGMAC_PORT_HSS_RXD_PH_ROTATOR_POSITION2", 0x25b94, 0 }, + { "XGMAC_PORT_HSS_RXD_PH_ROTATOR_STATIC_PH_OFFSET", 0x25b98, 0 }, + { "RCALER", 15, 1 }, + { "RAOOFF", 10, 5 }, + { "RAEOFF", 5, 5 }, + { "RDOFF", 0, 5 }, + { "XGMAC_PORT_HSS_RXD_SIGDET_CTRL", 0x25b9c, 0 }, + { "SIGNSD", 13, 2 }, + { "DACSD", 8, 5 }, + { "SDPDN", 6, 1 }, + { "SIGDET", 5, 1 }, + { "SDLVL", 0, 5 }, + { "XGMAC_PORT_HSS_RXD_DFE_CTRL", 0x25ba0, 0 }, + { "REQCMP", 15, 1 }, + { "DFEREQ", 14, 1 }, + { "SPCEN", 13, 1 }, + { "GATEEN", 12, 1 }, + { "SPIFMT", 9, 3 }, + { "DFEPWR", 6, 3 }, + { "STNDBY", 5, 1 }, + { "FRCH", 4, 1 }, + { "NONRND", 3, 1 }, + { "NONRNF", 2, 1 }, + { "FSTLCK", 1, 1 }, + { "DFERST", 0, 1 }, + { "XGMAC_PORT_HSS_RXD_DFE_DATA_EDGE_SAMPLE", 0x25ba4, 0 }, + { "ESAMP", 8, 8 }, + { "DSAMP", 0, 8 }, + { "XGMAC_PORT_HSS_RXD_DFE_AMP_SAMPLE", 0x25ba8, 0 }, + { "SMODE", 8, 4 }, + { "ADCORR", 7, 1 }, + { "TRAINEN", 6, 1 }, + { "ASAMPQ", 3, 3 }, + { "ASAMP", 0, 3 }, + { "XGMAC_PORT_HSS_RXD_VGA_CTRL1", 0x25bac, 0 }, + { "POLE", 12, 2 }, + { "PEAK", 8, 3 }, + { "VOFFSN", 6, 2 }, + { "VOFFA", 0, 6 }, + { "XGMAC_PORT_HSS_RXD_VGA_CTRL2", 0x25bb0, 0 }, + { "SHORTV", 10, 1 }, + { "VGAIN", 0, 4 }, + { "XGMAC_PORT_HSS_RXD_VGA_CTRL3", 0x25bb4, 0 }, + { "HBND1", 10, 1 }, + { "HBND0", 9, 1 }, + { "VLCKD", 8, 1 }, + { "VLCKDF", 7, 1 }, + { "AMAXT", 0, 7 }, + { "XGMAC_PORT_HSS_RXD_DFE_D00_D01_OFFSET", 0x25bb8, 0 }, + { "D01SN", 13, 2 }, + { "D01AMP", 8, 5 }, + { "D00SN", 5, 2 }, + { "D00AMP", 0, 5 }, + { "XGMAC_PORT_HSS_RXD_DFE_D10_D11_OFFSET", 0x25bbc, 0 }, + { "D11SN", 13, 2 }, + { "D11AMP", 8, 5 }, + { "D10SN", 5, 2 }, + { "D10AMP", 0, 5 }, + { "XGMAC_PORT_HSS_RXD_DFE_E0_E1_OFFSET", 0x25bc0, 0 }, + { "E1SN", 13, 2 }, + { "E1AMP", 8, 5 }, + { "E0SN", 5, 2 }, + { "E0AMP", 0, 5 }, + { "XGMAC_PORT_HSS_RXD_DACA_OFFSET", 0x25bc4, 0 }, + { "AOFFO", 8, 6 }, + { "AOFFE", 0, 6 }, + { "XGMAC_PORT_HSS_RXD_DACAP_DAC_AN_OFFSET", 0x25bc8, 0 }, + { "DACAN", 8, 8 }, + { "DACAP", 0, 8 }, + { "XGMAC_PORT_HSS_RXD_DACA_MIN", 0x25bcc, 0 }, + { "DACAZ", 8, 8 }, + { "DACAM", 0, 8 }, + { "XGMAC_PORT_HSS_RXD_ADAC_CTRL", 0x25bd0, 0 }, + { "ADSN", 7, 2 }, + { "ADMAG", 0, 7 }, + { "XGMAC_PORT_HSS_RXD_DIGITAL_EYE_CTRL", 0x25bd4, 0 }, + { "BLKAZ", 15, 1 }, + { "WIDTH", 10, 5 }, + { "MINWIDTH", 5, 5 }, + { "MINAMP", 0, 5 }, + { "XGMAC_PORT_HSS_RXD_DIGITAL_EYE_METRICS", 0x25bd8, 0 }, + { "EMBRDY", 10, 1 }, + { "EMBUMP", 7, 1 }, + { "EMMD", 5, 2 }, + { "EMPAT", 1, 1 }, + { "EMEN", 0, 1 }, + { "XGMAC_PORT_HSS_RXD_DFE_H1", 0x25bdc, 0 }, + { "H1OSN", 14, 2 }, + { "H1OMAG", 8, 6 }, + { "H1ESN", 6, 2 }, + { "H1EMAG", 0, 6 }, + { "XGMAC_PORT_HSS_RXD_DFE_H2", 0x25be0, 0 }, + { "H2OSN", 13, 2 }, + { "H2OMAG", 8, 5 }, + { "H2ESN", 5, 2 }, + { "H2EMAG", 0, 5 }, + { "XGMAC_PORT_HSS_RXD_DFE_H3", 0x25be4, 0 }, + { "H3OSN", 12, 2 }, + { "H3OMAG", 8, 4 }, + { "H3ESN", 4, 2 }, + { "H3EMAG", 0, 4 }, + { "XGMAC_PORT_HSS_RXD_DFE_H4", 0x25be8, 0 }, + { "H4OSN", 12, 2 }, + { "H4OMAG", 8, 4 }, + { "H4ESN", 4, 2 }, + { "H4EMAG", 0, 4 }, + { "XGMAC_PORT_HSS_RXD_DFE_H5", 0x25bec, 0 }, + { "H5OSN", 12, 2 }, + { "H5OMAG", 8, 4 }, + { "H5ESN", 4, 2 }, + { "H5EMAG", 0, 4 }, + { "XGMAC_PORT_HSS_RXD_DAC_DPC", 0x25bf0, 0 }, + { "DPCCVG", 13, 1 }, + { "DACCVG", 12, 1 }, + { "DPCTGT", 9, 3 }, + { "BLKH1T", 8, 1 }, + { "BLKOAE", 7, 1 }, + { "H1TGT", 4, 3 }, + { "OAE", 0, 4 }, + { "XGMAC_PORT_HSS_RXD_DDC", 0x25bf4, 0 }, + { "OLS", 11, 5 }, + { "OES", 6, 5 }, + { "BLKODEC", 5, 1 }, + { "ODEC", 0, 5 }, + { "XGMAC_PORT_HSS_RXD_INTERNAL_STATUS", 0x25bf8, 0 }, + { "BER6", 15, 1 }, + { "BER6VAL", 14, 1 }, + { "BER3VAL", 13, 1 }, + { "DPCCMP", 9, 1 }, + { "DACCMP", 8, 1 }, + { "DDCCMP", 7, 1 }, + { "AERRFLG", 6, 1 }, + { "WERRFLG", 5, 1 }, + { "TRCMP", 4, 1 }, + { "VLCKF", 3, 1 }, + { "ROCADJ", 2, 1 }, + { "ROCCMP", 1, 1 }, + { "OCCMP", 0, 1 }, + { "XGMAC_PORT_HSS_RXD_DFE_FUNC_CTRL", 0x25bfc, 0 }, + { "FDPC", 15, 1 }, + { "FDAC", 14, 1 }, + { "FDDC", 13, 1 }, + { "FNRND", 12, 1 }, + { "FVGAIN", 11, 1 }, + { "FVOFF", 10, 1 }, + { "FSDET", 9, 1 }, + { "FBER6", 8, 1 }, + { "FROTO", 7, 1 }, + { "FH4H5", 6, 1 }, + { "FH2H3", 5, 1 }, + { "FH1", 4, 1 }, + { "FH1SN", 3, 1 }, + { "FNRDF", 2, 1 }, + { "FADAC", 0, 1 }, + { "XGMAC_PORT_HSS_VCO_COARSE_CALIBRATION_0", 0x25c00, 0 }, + { "XGMAC_PORT_HSS_VCO_COARSE_CALIBRATION_1", 0x25c04, 0 }, + { "LDET", 4, 1 }, + { "CCERR", 3, 1 }, + { "CCCMP", 2, 1 }, + { "XGMAC_PORT_HSS_VCO_COARSE_CALIBRATION_2", 0x25c08, 0 }, + { "XGMAC_PORT_HSS_VCO_COARSE_CALIBRATION_3", 0x25c0c, 0 }, + { "VISEL", 4, 1 }, + { "FMIN", 3, 1 }, + { "FMAX", 2, 1 }, + { "CVHOLD", 1, 1 }, + { "TCDIS", 0, 1 }, + { "XGMAC_PORT_HSS_VCO_COARSE_CALIBRATION_4", 0x25c10, 0 }, + { "CMETH", 2, 1 }, + { "RECAL", 1, 1 }, + { "CCLD", 0, 1 }, + { "XGMAC_PORT_HSS_ANALOG_TEST_MUX", 0x25c14, 0 }, + { "XGMAC_PORT_HSS_PORT_EN_0", 0x25c18, 0 }, + { "RXDEN", 7, 1 }, + { "RXCEN", 6, 1 }, + { "TXDEN", 5, 1 }, + { "TXCEN", 4, 1 }, + { "RXBEN", 3, 1 }, + { "RXAEN", 2, 1 }, + { "TXBEN", 1, 1 }, + { "TXAEN", 0, 1 }, + { "XGMAC_PORT_HSS_PORT_RESET_0", 0x25c20, 0 }, + { "RXDRST", 7, 1 }, + { "RXCRST", 6, 1 }, + { "TXDRST", 5, 1 }, + { "TXCRST", 4, 1 }, + { "RXBRST", 3, 1 }, + { "RXARST", 2, 1 }, + { "TXBRST", 1, 1 }, + { "TXARST", 0, 1 }, + { "XGMAC_PORT_HSS_CHARGE_PUMP_CTRL", 0x25c28, 0 }, + { "ENCPIS", 2, 1 }, + { "CPISEL", 0, 2 }, + { "XGMAC_PORT_HSS_BAND_GAP_CTRL", 0x25c2c, 0 }, + { "XGMAC_PORT_HSS_LOFREQ_OVR", 0x25c30, 0 }, + { "LFREQ2", 3, 1 }, + { "LFREQ1", 2, 1 }, + { "LFREQO", 1, 1 }, + { "LFSEL", 0, 1 }, + { "XGMAC_PORT_HSS_VOLTAGE_BOOST_CTRL", 0x25c38, 0 }, + { "PFVAL", 2, 1 }, + { "PFEN", 1, 1 }, + { "VBADJ", 0, 1 }, + { "XGMAC_PORT_HSS_TX_MODE_CFG", 0x25c80, 0 }, + { "BWSEL", 2, 2 }, + { "RTSEL", 0, 2 }, + { "XGMAC_PORT_HSS_TXTEST_CTRL", 0x25c84, 0 }, + { "TWDP", 5, 1 }, + { "TPGRST", 4, 1 }, + { "TPGEN", 3, 1 }, + { "TPSEL", 0, 3 }, + { "XGMAC_PORT_HSS_TX_COEFF_CTRL", 0x25c88, 0 }, + { "AEINVPOL", 6, 1 }, + { "AESOURCE", 5, 1 }, + { "EQMODE", 4, 1 }, + { "OCOEF", 3, 1 }, + { "COEFRST", 2, 1 }, + { "SPEN", 1, 1 }, + { "ALOAD", 0, 1 }, + { "XGMAC_PORT_HSS_TX_DRIVER_MODE", 0x25c8c, 0 }, + { "DRVOFFT", 5, 1 }, + { "SLEW", 2, 3 }, + { "FFE", 0, 2 }, + { "XGMAC_PORT_HSS_TX_DRIVER_OVR_CTRL", 0x25c90, 0 }, + { "VLINC", 7, 1 }, + { "VLDEC", 6, 1 }, + { "LOPWR", 5, 1 }, + { "TDMEN", 4, 1 }, + { "DCCEN", 3, 1 }, + { "VHSEL", 2, 1 }, + { "IDAC", 0, 2 }, + { "XGMAC_PORT_HSS_TX_TDM_BIASGEN_STANDBY_TIMER", 0x25c94, 0 }, + { "XGMAC_PORT_HSS_TX_TDM_BIASGEN_PWRON_TIMER", 0x25c98, 0 }, + { "XGMAC_PORT_HSS_TX_TAP0_COEFF", 0x25ca0, 0 }, + { "XGMAC_PORT_HSS_TX_TAP1_COEFF", 0x25ca4, 0 }, + { "XGMAC_PORT_HSS_TX_TAP2_COEFF", 0x25ca8, 0 }, + { "XGMAC_PORT_HSS_TX_PWR", 0x25cb0, 0 }, + { "XGMAC_PORT_HSS_TX_POLARITY", 0x25cb4, 0 }, + { "TXPOL", 4, 3 }, + { "NTXPOL", 0, 3 }, + { "XGMAC_PORT_HSS_TX_8023AP_AE_CMD", 0x25cb8, 0 }, + { "CXPRESET", 13, 1 }, + { "CXINIT", 12, 1 }, + { "C2UPDT", 4, 2 }, + { "C1UPDT", 2, 2 }, + { "C0UPDT", 0, 2 }, + { "XGMAC_PORT_HSS_TX_8023AP_AE_STATUS", 0x25cbc, 0 }, + { "C2STAT", 4, 2 }, + { "C1STAT", 2, 2 }, + { "C0STAT", 0, 2 }, + { "XGMAC_PORT_HSS_TX_TAP0_IDAC_OVR", 0x25cc0, 0 }, + { "XGMAC_PORT_HSS_TX_TAP1_IDAC_OVR", 0x25cc4, 0 }, + { "XGMAC_PORT_HSS_TX_TAP2_IDAC_OVR", 0x25cc8, 0 }, + { "XGMAC_PORT_HSS_TX_PWR_DAC_OVR", 0x25cd0, 0 }, + { "OPEN", 7, 1 }, + { "OPVAL", 0, 5 }, + { "XGMAC_PORT_HSS_TX_PWR_DAC", 0x25cd4, 0 }, + { "XGMAC_PORT_HSS_TX_TAP0_IDAC_APP", 0x25ce0, 0 }, + { "XGMAC_PORT_HSS_TX_TAP1_IDAC_APP", 0x25ce4, 0 }, + { "XGMAC_PORT_HSS_TX_TAP2_IDAC_APP", 0x25ce8, 0 }, + { "XGMAC_PORT_HSS_TX_SEG_DIS_APP", 0x25cf0, 0 }, + { "XGMAC_PORT_HSS_TX_EXT_ADDR_DATA", 0x25cf8, 0 }, + { "XGMAC_PORT_HSS_TX_EXT_ADDR", 0x25cfc, 0 }, + { "XADDR", 2, 4 }, + { "XWR", 0, 1 }, + { "XGMAC_PORT_HSS_RX_CFG_MODE", 0x25d00, 0 }, + { "BW810", 8, 1 }, + { "AUXCLK", 7, 1 }, + { "DMSEL", 4, 3 }, + { "BWSEL", 2, 2 }, + { "RTSEL", 0, 2 }, + { "XGMAC_PORT_HSS_RXTEST_CTRL", 0x25d04, 0 }, + { "RCLKEN", 15, 1 }, + { "RRATE", 13, 2 }, + { "LBFRCERROR", 10, 1 }, + { "LBERROR", 9, 1 }, + { "LBSYNC", 8, 1 }, + { "FDWRAPCLK", 7, 1 }, + { "FDWRAP", 6, 1 }, + { "PRST", 4, 1 }, + { "PCHKEN", 3, 1 }, + { "PRBSSEL", 0, 3 }, + { "XGMAC_PORT_HSS_RX_PH_ROTATOR_CTRL", 0x25d08, 0 }, + { "FTHROT", 12, 4 }, + { "RTHROT", 11, 1 }, + { "FILTCTL", 7, 4 }, + { "RSRVO", 5, 2 }, + { "EXTEL", 4, 1 }, + { "RSTONSTUCK", 3, 1 }, + { "FREEZEFW", 2, 1 }, + { "RESETFW", 1, 1 }, + { "SSCENABLE", 0, 1 }, + { "XGMAC_PORT_HSS_RX_PH_ROTATOR_OFFSET_CTRL", 0x25d0c, 0 }, + { "RSNP", 11, 1 }, + { "TSOEN", 10, 1 }, + { "OFFEN", 9, 1 }, + { "TMSCAL", 7, 2 }, + { "APADJ", 6, 1 }, + { "RSEL", 5, 1 }, + { "PHOFFS", 0, 5 }, + { "XGMAC_PORT_HSS_RX_PH_ROTATOR_POSITION1", 0x25d10, 0 }, + { "ROT0A", 8, 6 }, + { "RTSEL", 0, 6 }, + { "XGMAC_PORT_HSS_RX_PH_ROTATOR_POSITION2", 0x25d14, 0 }, + { "XGMAC_PORT_HSS_RX_PH_ROTATOR_STATIC_PH_OFFSET", 0x25d18, 0 }, + { "RCALER", 15, 1 }, + { "RAOOFF", 10, 5 }, + { "RAEOFF", 5, 5 }, + { "RDOFF", 0, 5 }, + { "XGMAC_PORT_HSS_RX_SIGDET_CTRL", 0x25d1c, 0 }, + { "SIGNSD", 13, 2 }, + { "DACSD", 8, 5 }, + { "SDPDN", 6, 1 }, + { "SIGDET", 5, 1 }, + { "SDLVL", 0, 5 }, + { "XGMAC_PORT_HSS_RX_DFE_CTRL", 0x25d20, 0 }, + { "REQCMP", 15, 1 }, + { "DFEREQ", 14, 1 }, + { "SPCEN", 13, 1 }, + { "GATEEN", 12, 1 }, + { "SPIFMT", 9, 3 }, + { "DFEPWR", 6, 3 }, + { "STNDBY", 5, 1 }, + { "FRCH", 4, 1 }, + { "NONRND", 3, 1 }, + { "NONRNF", 2, 1 }, + { "FSTLCK", 1, 1 }, + { "DFERST", 0, 1 }, + { "XGMAC_PORT_HSS_RX_DFE_DATA_EDGE_SAMPLE", 0x25d24, 0 }, + { "ESAMP", 8, 8 }, + { "DSAMP", 0, 8 }, + { "XGMAC_PORT_HSS_RX_DFE_AMP_SAMPLE", 0x25d28, 0 }, + { "SMODE", 8, 4 }, + { "ADCORR", 7, 1 }, + { "TRAINEN", 6, 1 }, + { "ASAMPQ", 3, 3 }, + { "ASAMP", 0, 3 }, + { "XGMAC_PORT_HSS_RX_VGA_CTRL1", 0x25d2c, 0 }, + { "POLE", 12, 2 }, + { "PEAK", 8, 3 }, + { "VOFFSN", 6, 2 }, + { "VOFFA", 0, 6 }, + { "XGMAC_PORT_HSS_RX_VGA_CTRL2", 0x25d30, 0 }, + { "SHORTV", 10, 1 }, + { "VGAIN", 0, 4 }, + { "XGMAC_PORT_HSS_RX_VGA_CTRL3", 0x25d34, 0 }, + { "HBND1", 10, 1 }, + { "HBND0", 9, 1 }, + { "VLCKD", 8, 1 }, + { "VLCKDF", 7, 1 }, + { "AMAXT", 0, 7 }, + { "XGMAC_PORT_HSS_RX_DFE_D00_D01_OFFSET", 0x25d38, 0 }, + { "D01SN", 13, 2 }, + { "D01AMP", 8, 5 }, + { "D00SN", 5, 2 }, + { "D00AMP", 0, 5 }, + { "XGMAC_PORT_HSS_RX_DFE_D10_D11_OFFSET", 0x25d3c, 0 }, + { "D11SN", 13, 2 }, + { "D11AMP", 8, 5 }, + { "D10SN", 5, 2 }, + { "D10AMP", 0, 5 }, + { "XGMAC_PORT_HSS_RX_DFE_E0_E1_OFFSET", 0x25d40, 0 }, + { "E1SN", 13, 2 }, + { "E1AMP", 8, 5 }, + { "E0SN", 5, 2 }, + { "E0AMP", 0, 5 }, + { "XGMAC_PORT_HSS_RX_DACA_OFFSET", 0x25d44, 0 }, + { "AOFFO", 8, 6 }, + { "AOFFE", 0, 6 }, + { "XGMAC_PORT_HSS_RX_DACAP_DAC_AN_OFFSET", 0x25d48, 0 }, + { "DACAN", 8, 8 }, + { "DACAP", 0, 8 }, + { "XGMAC_PORT_HSS_RX_DACA_MIN", 0x25d4c, 0 }, + { "DACAZ", 8, 8 }, + { "DACAM", 0, 8 }, + { "XGMAC_PORT_HSS_RX_ADAC_CTRL", 0x25d50, 0 }, + { "ADSN", 7, 2 }, + { "ADMAG", 0, 7 }, + { "XGMAC_PORT_HSS_RX_DIGITAL_EYE_CTRL", 0x25d54, 0 }, + { "BLKAZ", 15, 1 }, + { "WIDTH", 10, 5 }, + { "MINWIDTH", 5, 5 }, + { "MINAMP", 0, 5 }, + { "XGMAC_PORT_HSS_RX_DIGITAL_EYE_METRICS", 0x25d58, 0 }, + { "EMBRDY", 10, 1 }, + { "EMBUMP", 7, 1 }, + { "EMMD", 5, 2 }, + { "EMPAT", 1, 1 }, + { "EMEN", 0, 1 }, + { "XGMAC_PORT_HSS_RX_DFE_H1", 0x25d5c, 0 }, + { "H1OSN", 14, 2 }, + { "H1OMAG", 8, 6 }, + { "H1ESN", 6, 2 }, + { "H1EMAG", 0, 6 }, + { "XGMAC_PORT_HSS_RX_DFE_H2", 0x25d60, 0 }, + { "H2OSN", 13, 2 }, + { "H2OMAG", 8, 5 }, + { "H2ESN", 5, 2 }, + { "H2EMAG", 0, 5 }, + { "XGMAC_PORT_HSS_RX_DFE_H3", 0x25d64, 0 }, + { "H3OSN", 12, 2 }, + { "H3OMAG", 8, 4 }, + { "H3ESN", 4, 2 }, + { "H3EMAG", 0, 4 }, + { "XGMAC_PORT_HSS_RX_DFE_H4", 0x25d68, 0 }, + { "H4OSN", 12, 2 }, + { "H4OMAG", 8, 4 }, + { "H4ESN", 4, 2 }, + { "H4EMAG", 0, 4 }, + { "XGMAC_PORT_HSS_RX_DFE_H5", 0x25d6c, 0 }, + { "H5OSN", 12, 2 }, + { "H5OMAG", 8, 4 }, + { "H5ESN", 4, 2 }, + { "H5EMAG", 0, 4 }, + { "XGMAC_PORT_HSS_RX_DAC_DPC", 0x25d70, 0 }, + { "DPCCVG", 13, 1 }, + { "DACCVG", 12, 1 }, + { "DPCTGT", 9, 3 }, + { "BLKH1T", 8, 1 }, + { "BLKOAE", 7, 1 }, + { "H1TGT", 4, 3 }, + { "OAE", 0, 4 }, + { "XGMAC_PORT_HSS_RX_DDC", 0x25d74, 0 }, + { "OLS", 11, 5 }, + { "OES", 6, 5 }, + { "BLKODEC", 5, 1 }, + { "ODEC", 0, 5 }, + { "XGMAC_PORT_HSS_RX_INTERNAL_STATUS", 0x25d78, 0 }, + { "BER6", 15, 1 }, + { "BER6VAL", 14, 1 }, + { "BER3VAL", 13, 1 }, + { "DPCCMP", 9, 1 }, + { "DACCMP", 8, 1 }, + { "DDCCMP", 7, 1 }, + { "AERRFLG", 6, 1 }, + { "WERRFLG", 5, 1 }, + { "TRCMP", 4, 1 }, + { "VLCKF", 3, 1 }, + { "ROCADJ", 2, 1 }, + { "ROCCMP", 1, 1 }, + { "OCCMP", 0, 1 }, + { "XGMAC_PORT_HSS_RX_DFE_FUNC_CTRL", 0x25d7c, 0 }, + { "FDPC", 15, 1 }, + { "FDAC", 14, 1 }, + { "FDDC", 13, 1 }, + { "FNRND", 12, 1 }, + { "FVGAIN", 11, 1 }, + { "FVOFF", 10, 1 }, + { "FSDET", 9, 1 }, + { "FBER6", 8, 1 }, + { "FROTO", 7, 1 }, + { "FH4H5", 6, 1 }, + { "FH2H3", 5, 1 }, + { "FH1", 4, 1 }, + { "FH1SN", 3, 1 }, + { "FNRDF", 2, 1 }, + { "FADAC", 0, 1 }, + { "XGMAC_PORT_HSS_TXRX_CFG_MODE", 0x25e00, 0 }, + { "BW810", 8, 1 }, + { "AUXCLK", 7, 1 }, + { "DMSEL", 4, 3 }, + { "BWSEL", 2, 2 }, + { "RTSEL", 0, 2 }, + { "XGMAC_PORT_HSS_TXRXTEST_CTRL", 0x25e04, 0 }, + { "RCLKEN", 15, 1 }, + { "RRATE", 13, 2 }, + { "LBFRCERROR", 10, 1 }, + { "LBERROR", 9, 1 }, + { "LBSYNC", 8, 1 }, + { "FDWRAPCLK", 7, 1 }, + { "FDWRAP", 6, 1 }, + { "PRST", 4, 1 }, + { "PCHKEN", 3, 1 }, + { "PRBSSEL", 0, 3 }, + { "XGMAC_PORT_CFG", 0x27000, 0 }, + { "XGMII_Clk_Sel", 29, 3 }, + { "SinkTx", 27, 1 }, + { "SinkTxOnLinkDown", 26, 1 }, + { "xg2g_speed_mode", 25, 1 }, + { "LoopNoFwd", 24, 1 }, + { "XGM_Tx_pause_size", 23, 1 }, + { "XGM_Tx_pause_frame", 22, 1 }, + { "XGM_Tx_Disable_Pre", 21, 1 }, + { "XGM_Tx_Disable_Crc", 20, 1 }, + { "Smux_Rx_Loop", 19, 1 }, + { "Rx_Lane_Swap", 18, 1 }, + { "Tx_Lane_Swap", 17, 1 }, + { "Signal_Det", 14, 1 }, + { "Pmux_Rx_Loop", 13, 1 }, + { "Pmux_Tx_Loop", 12, 1 }, + { "XGM_Rx_Sel", 10, 2 }, + { "PCS_Tx_Sel", 8, 2 }, + { "XAUI20_Rem_Pre", 5, 1 }, + { "XAUI20_XGMII_Sel", 4, 1 }, + { "Rx_Byte_Swap", 3, 1 }, + { "Tx_Byte_Swap", 2, 1 }, + { "Port_Sel", 0, 1 }, + { "XGMAC_PORT_RESET_CTRL", 0x27004, 0 }, + { "AuxExt_Reset", 10, 1 }, + { "TXFIFO_Reset", 9, 1 }, + { "RXFIFO_Reset", 8, 1 }, + { "BEAN_Reset", 7, 1 }, + { "XAUI_Reset", 6, 1 }, + { "AE_Reset", 5, 1 }, + { "XGM_Reset", 4, 1 }, + { "XG2G_Reset", 3, 1 }, + { "WOL_Reset", 2, 1 }, + { "XFI_PCS_Reset", 1, 1 }, + { "HSS_Reset", 0, 1 }, + { "XGMAC_PORT_LED_CFG", 0x27008, 0 }, + { "Led1_Cfg", 5, 3 }, + { "Led1_Polarity_Inv", 4, 1 }, + { "Led0_Cfg", 1, 3 }, + { "Led0_Polarity_Inv", 0, 1 }, + { "XGMAC_PORT_LED_COUNTHI", 0x2700c, 0 }, + { "XGMAC_PORT_LED_COUNTLO", 0x27010, 0 }, + { "XGMAC_PORT_DEBUG_CFG", 0x27014, 0 }, + { "XGMAC_PORT_CFG2", 0x27018, 0 }, + { "Rx_Polarity_Inv", 28, 4 }, + { "Tx_Polarity_Inv", 24, 4 }, + { "InstanceNum", 22, 2 }, + { "StopOnPerr", 21, 1 }, + { "MACTxEn", 20, 1 }, + { "MACRxEn", 19, 1 }, + { "PatEn", 18, 1 }, + { "MagicEn", 17, 1 }, + { "TX_IPG", 4, 13 }, + { "AEC_PMA_TX_READY", 1, 1 }, + { "AEC_PMA_RX_READY", 0, 1 }, + { "XGMAC_PORT_PKT_COUNT", 0x2701c, 0 }, + { "tx_sop_count", 24, 8 }, + { "tx_eop_count", 16, 8 }, + { "rx_sop_count", 8, 8 }, + { "rx_eop_count", 0, 8 }, + { "XGMAC_PORT_PERR_INJECT", 0x27020, 0 }, + { "MemSel", 1, 1 }, + { "InjectDataErr", 0, 1 }, + { "XGMAC_PORT_MAGIC_MACID_LO", 0x27024, 0 }, + { "XGMAC_PORT_MAGIC_MACID_HI", 0x27028, 0 }, + { "XGMAC_PORT_BUILD_REVISION", 0x2702c, 0 }, + { "XGMAC_PORT_XGMII_SE_COUNT", 0x27030, 0 }, + { "TxSop", 24, 8 }, + { "TxEop", 16, 8 }, + { "RxSop", 8, 8 }, + { "RxEop", 0, 8 }, + { "XGMAC_PORT_LINK_STATUS", 0x27034, 0 }, + { "remflt", 3, 1 }, + { "locflt", 2, 1 }, + { "linkup", 1, 1 }, + { "linkdn", 0, 1 }, + { "XGMAC_PORT_CHECKIN", 0x27038, 0 }, + { "Preamble", 1, 1 }, + { "CheckIn", 0, 1 }, + { "XGMAC_PORT_FAULT_TEST", 0x2703c, 0 }, + { "FltType", 1, 1 }, + { "FltCtrl", 0, 1 }, + { "XGMAC_PORT_SPARE", 0x27040, 0 }, + { "XGMAC_PORT_HSS_SIGDET_STATUS", 0x27044, 0 }, + { "XGMAC_PORT_EXT_LOS_STATUS", 0x27048, 0 }, + { "XGMAC_PORT_EXT_LOS_CTRL", 0x2704c, 0 }, + { "XGMAC_PORT_FPGA_PAUSE_CTL", 0x27050, 0 }, + { "CTL", 31, 1 }, + { "HWM", 13, 13 }, + { "LWM", 0, 13 }, + { "XGMAC_PORT_FPGA_ERRPKT_CNT", 0x27054, 0 }, + { "XGMAC_PORT_LA_TX_0", 0x27058, 0 }, + { "XGMAC_PORT_LA_RX_0", 0x2705c, 0 }, + { "XGMAC_PORT_FPGA_LA_CTL", 0x27060, 0 }, + { "rxrst", 5, 1 }, + { "txrst", 4, 1 }, + { "xgmii", 3, 1 }, + { "pause", 2, 1 }, + { "stopErr", 1, 1 }, + { "stop", 0, 1 }, + { "XGMAC_PORT_EPIO_DATA0", 0x270c0, 0 }, + { "XGMAC_PORT_EPIO_DATA1", 0x270c4, 0 }, + { "XGMAC_PORT_EPIO_DATA2", 0x270c8, 0 }, + { "XGMAC_PORT_EPIO_DATA3", 0x270cc, 0 }, + { "XGMAC_PORT_EPIO_OP", 0x270d0, 0 }, + { "Busy", 31, 1 }, + { "Write", 8, 1 }, + { "Address", 0, 8 }, + { "XGMAC_PORT_WOL_STATUS", 0x270d4, 0 }, + { "MagicDetected", 31, 1 }, + { "PatDetected", 30, 1 }, + { "ClearMagic", 4, 1 }, + { "ClearMatch", 3, 1 }, + { "MatchedFilter", 0, 3 }, + { "XGMAC_PORT_INT_EN", 0x270d8, 0 }, + { "ext_los", 28, 1 }, + { "incmptbl_link", 27, 1 }, + { "PatDetWake", 26, 1 }, + { "MagicWake", 25, 1 }, + { "SigDetChg", 24, 1 }, + { "PCSR_fec_corr", 23, 1 }, + { "AE_Train_Local", 22, 1 }, + { "HSSPLL_LOCK", 21, 1 }, + { "HSSPRT_READY", 20, 1 }, + { "AutoNeg_Done", 19, 1 }, + { "PCSR_Hi_BER", 18, 1 }, + { "PCSR_FEC_Error", 17, 1 }, + { "PCSR_Link_Fail", 16, 1 }, + { "XAUI_Dec_Error", 15, 1 }, + { "XAUI_Link_Fail", 14, 1 }, + { "PCS_CTC_Error", 13, 1 }, + { "PCS_Link_Good", 12, 1 }, + { "PCS_Link_Fail", 11, 1 }, + { "RxFifoOverFlow", 10, 1 }, + { "HSSPRBSErr", 9, 1 }, + { "HSSEyeQual", 8, 1 }, + { "RemoteFault", 7, 1 }, + { "LocalFault", 6, 1 }, + { "MAC_Link_Down", 5, 1 }, + { "MAC_Link_Up", 4, 1 }, + { "BEAN_Int", 3, 1 }, + { "XGM_Int", 2, 1 }, + { "TxFifo_prty_err", 1, 1 }, + { "RxFifo_prty_err", 0, 1 }, + { "XGMAC_PORT_INT_CAUSE", 0x270dc, 0 }, + { "ext_los", 28, 1 }, + { "incmptbl_link", 27, 1 }, + { "PatDetWake", 26, 1 }, + { "MagicWake", 25, 1 }, + { "SigDetChg", 24, 1 }, + { "PCSR_fec_corr", 23, 1 }, + { "AE_Train_Local", 22, 1 }, + { "HSSPLL_LOCK", 21, 1 }, + { "HSSPRT_READY", 20, 1 }, + { "AutoNeg_Done", 19, 1 }, + { "PCSR_Hi_BER", 18, 1 }, + { "PCSR_FEC_Error", 17, 1 }, + { "PCSR_Link_Fail", 16, 1 }, + { "XAUI_Dec_Error", 15, 1 }, + { "XAUI_Link_Fail", 14, 1 }, + { "PCS_CTC_Error", 13, 1 }, + { "PCS_Link_Good", 12, 1 }, + { "PCS_Link_Fail", 11, 1 }, + { "RxFifoOverFlow", 10, 1 }, + { "HSSPRBSErr", 9, 1 }, + { "HSSEyeQual", 8, 1 }, + { "RemoteFault", 7, 1 }, + { "LocalFault", 6, 1 }, + { "MAC_Link_Down", 5, 1 }, + { "MAC_Link_Up", 4, 1 }, + { "BEAN_Int", 3, 1 }, + { "XGM_Int", 2, 1 }, + { "TxFifo_prty_err", 1, 1 }, + { "RxFifo_prty_err", 0, 1 }, + { "XGMAC_PORT_HSS_CFG0", 0x270e0, 0 }, + { "TXDTS", 31, 1 }, + { "TXCTS", 30, 1 }, + { "TXBTS", 29, 1 }, + { "TXATS", 28, 1 }, + { "TXDOBS", 27, 1 }, + { "TXCOBS", 26, 1 }, + { "TXBOBS", 25, 1 }, + { "TXAOBS", 24, 1 }, + { "HSSREFCLKSEL", 20, 1 }, + { "HSSAVDHI", 17, 1 }, + { "HSSRXTS", 16, 1 }, + { "HSSTXACMODE", 15, 1 }, + { "HSSRXACMODE", 14, 1 }, + { "HSSRESYNC", 13, 1 }, + { "HSSRECCAL", 12, 1 }, + { "HSSPDWNPLL", 11, 1 }, + { "HSSDIVSEL", 9, 2 }, + { "HSSREFDIV", 8, 1 }, + { "HSSPLLBYP", 7, 1 }, + { "HSSLOFREQPLL", 6, 1 }, + { "HSSLOFREQ2PLL", 5, 1 }, + { "HSSEXTC16SEL", 4, 1 }, + { "HSSRSTCONFIG", 1, 3 }, + { "HSSPRBSEN", 0, 1 }, + { "XGMAC_PORT_HSS_CFG1", 0x270e4, 0 }, + { "RXDPRBSRST", 28, 1 }, + { "RXDPRBSEN", 27, 1 }, + { "RXDPRBSFRCERR", 26, 1 }, + { "TXDPRBSRST", 25, 1 }, + { "TXDPRBSEN", 24, 1 }, + { "RXCPRBSRST", 20, 1 }, + { "RXCPRBSEN", 19, 1 }, + { "RXCPRBSFRCERR", 18, 1 }, + { "TXCPRBSRST", 17, 1 }, + { "TXCPRBSEN", 16, 1 }, + { "RXBPRBSRST", 12, 1 }, + { "RXBPRBSEN", 11, 1 }, + { "RXBPRBSFRCERR", 10, 1 }, + { "TXBPRBSRST", 9, 1 }, + { "TXBPRBSEN", 8, 1 }, + { "RXAPRBSRST", 4, 1 }, + { "RXAPRBSEN", 3, 1 }, + { "RXAPRBSFRCERR", 2, 1 }, + { "TXAPRBSRST", 1, 1 }, + { "TXAPRBSEN", 0, 1 }, + { "XGMAC_PORT_HSS_CFG2", 0x270e8, 0 }, + { "RXDDATASYNC", 23, 1 }, + { "RXCDATASYNC", 22, 1 }, + { "RXBDATASYNC", 21, 1 }, + { "RXADATASYNC", 20, 1 }, + { "RXDEARLYIN", 19, 1 }, + { "RXDLATEIN", 18, 1 }, + { "RXDPHSLOCK", 17, 1 }, + { "RXDPHSDNIN", 16, 1 }, + { "RXDPHSUPIN", 15, 1 }, + { "RXCEARLYIN", 14, 1 }, + { "RXCLATEIN", 13, 1 }, + { "RXCPHSLOCK", 12, 1 }, + { "RXCPHSDNIN", 11, 1 }, + { "RXCPHSUPIN", 10, 1 }, + { "RXBEARLYIN", 9, 1 }, + { "RXBLATEIN", 8, 1 }, + { "RXBPHSLOCK", 7, 1 }, + { "RXBPHSDNIN", 6, 1 }, + { "RXBPHSUPIN", 5, 1 }, + { "RXAEARLYIN", 4, 1 }, + { "RXALATEIN", 3, 1 }, + { "RXAPHSLOCK", 2, 1 }, + { "RXAPHSDNIN", 1, 1 }, + { "RXAPHSUPIN", 0, 1 }, + { "XGMAC_PORT_HSS_STATUS", 0x270ec, 0 }, + { "RXDPRBSSYNC", 15, 1 }, + { "RXCPRBSSYNC", 14, 1 }, + { "RXBPRBSSYNC", 13, 1 }, + { "RXAPRBSSYNC", 12, 1 }, + { "RXDPRBSERR", 11, 1 }, + { "RXCPRBSERR", 10, 1 }, + { "RXBPRBSERR", 9, 1 }, + { "RXAPRBSERR", 8, 1 }, + { "RXDSIGDET", 7, 1 }, + { "RXCSIGDET", 6, 1 }, + { "RXBSIGDET", 5, 1 }, + { "RXASIGDET", 4, 1 }, + { "HSSPLLLOCK", 1, 1 }, + { "HSSPRTREADY", 0, 1 }, + { "XGMAC_PORT_XGM_TX_CTRL", 0x27200, 0 }, + { "SendPause", 2, 1 }, + { "SendZeroPause", 1, 1 }, + { "TxEn", 0, 1 }, + { "XGMAC_PORT_XGM_TX_CFG", 0x27204, 0 }, + { "CRCCal", 8, 2 }, + { "DisDefIdleCnt", 7, 1 }, + { "DecAvgTxIPG", 6, 1 }, + { "UnidirTxEn", 5, 1 }, + { "CfgClkSpeed", 2, 3 }, + { "StretchMode", 1, 1 }, + { "TxPauseEn", 0, 1 }, + { "XGMAC_PORT_XGM_TX_PAUSE_QUANTA", 0x27208, 0 }, + { "XGMAC_PORT_XGM_RX_CTRL", 0x2720c, 0 }, + { "XGMAC_PORT_XGM_RX_CFG", 0x27210, 0 }, + { "CRCCal", 16, 2 }, + { "LocalFault", 15, 1 }, + { "RemoteFault", 14, 1 }, + { "LenErrFrameDis", 13, 1 }, + { "Con802_3Preamble", 12, 1 }, + { "EnNon802_3Preamble", 11, 1 }, + { "CopyPreamble", 10, 1 }, + { "DisPauseFrames", 9, 1 }, + { "En1536BFrames", 8, 1 }, + { "EnJumbo", 7, 1 }, + { "RmFCS", 6, 1 }, + { "DisNonVlan", 5, 1 }, + { "EnExtMatch", 4, 1 }, + { "EnHashUcast", 3, 1 }, + { "EnHashMcast", 2, 1 }, + { "DisBCast", 1, 1 }, + { "CopyAllFrames", 0, 1 }, + { "XGMAC_PORT_XGM_RX_HASH_LOW", 0x27214, 0 }, + { "XGMAC_PORT_XGM_RX_HASH_HIGH", 0x27218, 0 }, + { "XGMAC_PORT_XGM_RX_EXACT_MATCH_LOW_1", 0x2721c, 0 }, + { "XGMAC_PORT_XGM_RX_EXACT_MATCH_HIGH_1", 0x27220, 0 }, + { "XGMAC_PORT_XGM_RX_EXACT_MATCH_LOW_2", 0x27224, 0 }, + { "XGMAC_PORT_XGM_RX_EXACT_MATCH_HIGH_2", 0x27228, 0 }, + { "XGMAC_PORT_XGM_RX_EXACT_MATCH_LOW_3", 0x2722c, 0 }, + { "XGMAC_PORT_XGM_RX_EXACT_MATCH_HIGH_3", 0x27230, 0 }, + { "XGMAC_PORT_XGM_RX_EXACT_MATCH_LOW_4", 0x27234, 0 }, + { "XGMAC_PORT_XGM_RX_EXACT_MATCH_HIGH_4", 0x27238, 0 }, + { "XGMAC_PORT_XGM_RX_EXACT_MATCH_LOW_5", 0x2723c, 0 }, + { "XGMAC_PORT_XGM_RX_EXACT_MATCH_HIGH_5", 0x27240, 0 }, + { "XGMAC_PORT_XGM_RX_EXACT_MATCH_LOW_6", 0x27244, 0 }, + { "XGMAC_PORT_XGM_RX_EXACT_MATCH_HIGH_6", 0x27248, 0 }, + { "XGMAC_PORT_XGM_RX_EXACT_MATCH_LOW_7", 0x2724c, 0 }, + { "XGMAC_PORT_XGM_RX_EXACT_MATCH_HIGH_7", 0x27250, 0 }, + { "XGMAC_PORT_XGM_RX_EXACT_MATCH_LOW_8", 0x27254, 0 }, + { "XGMAC_PORT_XGM_RX_EXACT_MATCH_HIGH_8", 0x27258, 0 }, + { "XGMAC_PORT_XGM_RX_TYPE_MATCH_1", 0x2725c, 0 }, + { "EnTypeMatch", 31, 1 }, + { "type", 0, 16 }, + { "XGMAC_PORT_XGM_RX_TYPE_MATCH_2", 0x27260, 0 }, + { "EnTypeMatch", 31, 1 }, + { "type", 0, 16 }, + { "XGMAC_PORT_XGM_RX_TYPE_MATCH_3", 0x27264, 0 }, + { "EnTypeMatch", 31, 1 }, + { "type", 0, 16 }, + { "XGMAC_PORT_XGM_RX_TYPE_MATCH_4", 0x27268, 0 }, + { "EnTypeMatch", 31, 1 }, + { "type", 0, 16 }, + { "XGMAC_PORT_XGM_INT_STATUS", 0x2726c, 0 }, + { "XGMIIExtInt", 10, 1 }, + { "LinkFaultChange", 9, 1 }, + { "PhyFrameComplete", 8, 1 }, + { "PauseFrameTxmt", 7, 1 }, + { "PauseCntrTimeOut", 6, 1 }, + { "Non0PauseRcvd", 5, 1 }, + { "StatOFlow", 4, 1 }, + { "TxErrFIFO", 3, 1 }, + { "TxUFlow", 2, 1 }, + { "FrameTxmt", 1, 1 }, + { "FrameRcvd", 0, 1 }, + { "XGMAC_PORT_XGM_INT_MASK", 0x27270, 0 }, + { "XGMIIExtInt", 10, 1 }, + { "LinkFaultChange", 9, 1 }, + { "PhyFrameComplete", 8, 1 }, + { "PauseFrameTxmt", 7, 1 }, + { "PauseCntrTimeOut", 6, 1 }, + { "Non0PauseRcvd", 5, 1 }, + { "StatOFlow", 4, 1 }, + { "TxErrFIFO", 3, 1 }, + { "TxUFlow", 2, 1 }, + { "FrameTxmt", 1, 1 }, + { "FrameRcvd", 0, 1 }, + { "XGMAC_PORT_XGM_INT_EN", 0x27274, 0 }, + { "XGMIIExtInt", 10, 1 }, + { "LinkFaultChange", 9, 1 }, + { "PhyFrameComplete", 8, 1 }, + { "PauseFrameTxmt", 7, 1 }, + { "PauseCntrTimeOut", 6, 1 }, + { "Non0PauseRcvd", 5, 1 }, + { "StatOFlow", 4, 1 }, + { "TxErrFIFO", 3, 1 }, + { "TxUFlow", 2, 1 }, + { "FrameTxmt", 1, 1 }, + { "FrameRcvd", 0, 1 }, + { "XGMAC_PORT_XGM_INT_DISABLE", 0x27278, 0 }, + { "XGMIIExtInt", 10, 1 }, + { "LinkFaultChange", 9, 1 }, + { "PhyFrameComplete", 8, 1 }, + { "PauseFrameTxmt", 7, 1 }, + { "PauseCntrTimeOut", 6, 1 }, + { "Non0PauseRcvd", 5, 1 }, + { "StatOFlow", 4, 1 }, + { "TxErrFIFO", 3, 1 }, + { "TxUFlow", 2, 1 }, + { "FrameTxmt", 1, 1 }, + { "FrameRcvd", 0, 1 }, + { "XGMAC_PORT_XGM_TX_PAUSE_TIMER", 0x2727c, 0 }, + { "XGMAC_PORT_XGM_STAT_CTRL", 0x27280, 0 }, + { "ReadSnpShot", 4, 1 }, + { "TakeSnpShot", 3, 1 }, + { "ClrStats", 2, 1 }, + { "IncrStats", 1, 1 }, + { "EnTestModeWr", 0, 1 }, + { "XGMAC_PORT_XGM_MDIO_CTRL", 0x27284, 0 }, + { "FrameType", 30, 2 }, + { "Operation", 28, 2 }, + { "PortAddr", 23, 5 }, + { "DevAddr", 18, 5 }, + { "Resrv", 16, 2 }, + { "Data", 0, 16 }, + { "XGMAC_PORT_XGM_MODULE_ID", 0x272fc, 0 }, + { "ModuleID", 16, 16 }, + { "ModuleRev", 0, 16 }, + { "XGMAC_PORT_XGM_STAT_TX_BYTE_LOW", 0x27300, 0 }, + { "XGMAC_PORT_XGM_STAT_TX_BYTE_HIGH", 0x27304, 0 }, + { "XGMAC_PORT_XGM_STAT_TX_FRAME_LOW", 0x27308, 0 }, + { "XGMAC_PORT_XGM_STAT_TX_FRAME_HIGH", 0x2730c, 0 }, + { "XGMAC_PORT_XGM_STAT_TX_BCAST", 0x27310, 0 }, + { "XGMAC_PORT_XGM_STAT_TX_MCAST", 0x27314, 0 }, + { "XGMAC_PORT_XGM_STAT_TX_PAUSE", 0x27318, 0 }, + { "XGMAC_PORT_XGM_STAT_TX_64B_FRAMES", 0x2731c, 0 }, + { "XGMAC_PORT_XGM_STAT_TX_65_127B_FRAMES", 0x27320, 0 }, + { "XGMAC_PORT_XGM_STAT_TX_128_255B_FRAMES", 0x27324, 0 }, + { "XGMAC_PORT_XGM_STAT_TX_256_511B_FRAMES", 0x27328, 0 }, + { "XGMAC_PORT_XGM_STAT_TX_512_1023B_FRAMES", 0x2732c, 0 }, + { "XGMAC_PORT_XGM_STAT_TX_1024_1518B_FRAMES", 0x27330, 0 }, + { "XGMAC_PORT_XGM_STAT_TX_1519_MAXB_FRAMES", 0x27334, 0 }, + { "XGMAC_PORT_XGM_STAT_TX_ERR_FRAMES", 0x27338, 0 }, + { "XGMAC_PORT_XGM_STAT_RX_BYTES_LOW", 0x2733c, 0 }, + { "XGMAC_PORT_XGM_STAT_RX_BYTES_HIGH", 0x27340, 0 }, + { "XGMAC_PORT_XGM_STAT_RX_FRAMES_LOW", 0x27344, 0 }, + { "XGMAC_PORT_XGM_STAT_RX_FRAMES_HIGH", 0x27348, 0 }, + { "XGMAC_PORT_XGM_STAT_RX_BCAST_FRAMES", 0x2734c, 0 }, + { "XGMAC_PORT_XGM_STAT_RX_MCAST_FRAMES", 0x27350, 0 }, + { "XGMAC_PORT_XGM_STAT_RX_PAUSE_FRAMES", 0x27354, 0 }, + { "XGMAC_PORT_XGM_STAT_RX_64B_FRAMES", 0x27358, 0 }, + { "XGMAC_PORT_XGM_STAT_RX_65_127B_FRAMES", 0x2735c, 0 }, + { "XGMAC_PORT_XGM_STAT_RX_128_255B_FRAMES", 0x27360, 0 }, + { "XGMAC_PORT_XGM_STAT_RX_256_511B_FRAMES", 0x27364, 0 }, + { "XGMAC_PORT_XGM_STAT_RX_512_1023B_FRAMES", 0x27368, 0 }, + { "XGMAC_PORT_XGM_STAT_RX_1024_1518B_FRAMES", 0x2736c, 0 }, + { "XGMAC_PORT_XGM_STAT_RX_1519_MAXB_FRAMES", 0x27370, 0 }, + { "XGMAC_PORT_XGM_STAT_RX_SHORT_FRAMES", 0x27374, 0 }, + { "XGMAC_PORT_XGM_STAT_RX_OVERSIZE_FRAMES", 0x27378, 0 }, + { "XGMAC_PORT_XGM_STAT_RX_JABBER_FRAMES", 0x2737c, 0 }, + { "XGMAC_PORT_XGM_STAT_RX_CRC_ERR_FRAMES", 0x27380, 0 }, + { "XGMAC_PORT_XGM_STAT_RX_LENGTH_ERR_FRAMES", 0x27384, 0 }, + { "XGMAC_PORT_XGM_STAT_RX_SYM_CODE_ERR_FRAMES", 0x27388, 0 }, + { "XGMAC_PORT_XAUI_CTRL", 0x27400, 0 }, + { "polarity_inv_rx", 8, 4 }, + { "polarity_inv_tx", 4, 4 }, + { "test_sel", 2, 2 }, + { "test_en", 0, 1 }, + { "XGMAC_PORT_XAUI_STATUS", 0x27404, 0 }, + { "Decode_Error", 12, 8 }, + { "Lane3_CTC_Status", 11, 1 }, + { "Lane2_CTC_Status", 10, 1 }, + { "Lane1_CTC_Status", 9, 1 }, + { "Lane0_CTC_Status", 8, 1 }, + { "Align_Status", 4, 1 }, + { "Lane3_Sync_Status", 3, 1 }, + { "Lane2_Sync_Status", 2, 1 }, + { "Lane1_Sync_Status", 1, 1 }, + { "Lane0_Sync_Status", 0, 1 }, + { "XGMAC_PORT_PCSR_CTRL", 0x27500, 0 }, + { "rx_clk_speed", 7, 1 }, + { "ScrBypass", 6, 1 }, + { "FECErrIndEn", 5, 1 }, + { "FECEn", 4, 1 }, + { "TestSel", 2, 2 }, + { "ScrLoopEn", 1, 1 }, + { "XGMIILoopEn", 0, 1 }, + { "XGMAC_PORT_PCSR_TXTEST_CTRL", 0x27510, 0 }, + { "tx_prbs9_en", 4, 1 }, + { "tx_prbs31_en", 3, 1 }, + { "tx_tst_dat_sel", 2, 1 }, + { "tx_tst_sel", 1, 1 }, + { "tx_tst_en", 0, 1 }, + { "XGMAC_PORT_PCSR_TXTEST_SEEDA_LOWER", 0x27514, 0 }, + { "XGMAC_PORT_PCSR_TXTEST_SEEDA_UPPER", 0x27518, 0 }, + { "XGMAC_PORT_PCSR_TXTEST_SEEDB_LOWER", 0x2752c, 0 }, + { "XGMAC_PORT_PCSR_TXTEST_SEEDB_UPPER", 0x27530, 0 }, + { "XGMAC_PORT_PCSR_RXTEST_CTRL", 0x2753c, 0 }, + { "tpter_cnt_rst", 7, 1 }, + { "test_cnt_125us", 6, 1 }, + { "test_cnt_pre", 5, 1 }, + { "ber_cnt_rst", 4, 1 }, + { "err_blk_cnt_rst", 3, 1 }, + { "rx_prbs31_en", 2, 1 }, + { "rx_tst_dat_sel", 1, 1 }, + { "rx_tst_en", 0, 1 }, + { "XGMAC_PORT_PCSR_STATUS", 0x27550, 0 }, + { "err_blk_cnt", 16, 8 }, + { "ber_count", 8, 6 }, + { "hi_ber", 2, 1 }, + { "rx_fault", 1, 1 }, + { "tx_fault", 0, 1 }, + { "XGMAC_PORT_PCSR_TEST_STATUS", 0x27554, 0 }, + { "XGMAC_PORT_AN_CONTROL", 0x27600, 0 }, + { "soft_reset", 15, 1 }, + { "an_enable", 12, 1 }, + { "restart_an", 9, 1 }, + { "XGMAC_PORT_AN_STATUS", 0x27604, 0 }, + { "Noncer_Match", 31, 1 }, + { "Parallel_Det_Fault", 9, 1 }, + { "Page_Received", 6, 1 }, + { "AN_Complete", 5, 1 }, + { "Remote_Fault", 4, 1 }, + { "AN_Ability", 3, 1 }, + { "link_status", 2, 1 }, + { "partner_an_ability", 0, 1 }, + { "XGMAC_PORT_AN_ADVERTISEMENT", 0x27608, 0 }, + { "FEC_Enable", 31, 1 }, + { "FEC_Ability", 30, 1 }, + { "10GBASE_KR_Capable", 23, 1 }, + { "10GBASE_KX4_Capable", 22, 1 }, + { "1000BASE_KX_Capable", 21, 1 }, + { "Transmitted_Nonce", 16, 5 }, + { "NP", 15, 1 }, + { "ACK", 14, 1 }, + { "Remote_Fault", 13, 1 }, + { "ASM_DIR", 11, 1 }, + { "Pause", 10, 1 }, + { "Echoed_Nonce", 5, 5 }, + { "XGMAC_PORT_AN_LINK_PARTNER_ABILITY", 0x2760c, 0 }, + { "FEC_Enable", 31, 1 }, + { "FEC_Ability", 30, 1 }, + { "10GBASE_KR_Capable", 23, 1 }, + { "10GBASE_KX4_Capable", 22, 1 }, + { "1000BASE_KX_Capable", 21, 1 }, + { "Transmitted_Nonce", 16, 5 }, + { "NP", 15, 1 }, + { "ACK", 14, 1 }, + { "Remote_Fault", 13, 1 }, + { "ASM_DIR", 11, 1 }, + { "Pause", 10, 1 }, + { "Echoed_Nonce", 5, 5 }, + { "Selector_Field", 0, 5 }, + { "XGMAC_PORT_AN_NP_LOWER_TRANSMIT", 0x27610, 0 }, + { "NP_Info", 16, 16 }, + { "NP_Indication", 15, 1 }, + { "Message_Page", 13, 1 }, + { "ACK_2", 12, 1 }, + { "Toggle", 11, 1 }, + { "XGMAC_PORT_AN_NP_UPPER_TRANSMIT", 0x27614, 0 }, + { "XGMAC_PORT_AN_LP_NP_LOWER", 0x27618, 0 }, + { "XGMAC_PORT_AN_LP_NP_UPPER", 0x2761c, 0 }, + { "XGMAC_PORT_AN_BACKPLANE_ETHERNET_STATUS", 0x27624, 0 }, + { "TX_Pause_Okay", 6, 1 }, + { "RX_Pause_Okay", 5, 1 }, + { "10GBASE_KR_FEC_neg", 4, 1 }, + { "10GBASE_KR_neg", 3, 1 }, + { "10GBASE_KX4_neg", 2, 1 }, + { "1000BASE_KX_neg", 1, 1 }, + { "BP_AN_Ability", 0, 1 }, + { "XGMAC_PORT_AN_TX_NONCE_CONTROL", 0x27628, 0 }, + { "Bypass_LFSR", 15, 1 }, + { "LFSR_Init", 0, 15 }, + { "XGMAC_PORT_AN_INTERRUPT_STATUS", 0x2762c, 0 }, + { "NP_From_LP", 3, 1 }, + { "Parallel_Det_Fault", 2, 1 }, + { "BP_From_LP", 1, 1 }, + { "PCS_AN_Complete", 0, 1 }, + { "XGMAC_PORT_AN_GENERIC_TIMER_TIMEOUT", 0x27630, 0 }, + { "XGMAC_PORT_AN_BREAK_LINK_TIMEOUT", 0x27634, 0 }, + { "XGMAC_PORT_AN_MODULE_ID", 0x2763c, 0 }, + { "Module_ID", 16, 16 }, + { "Module_Revision", 0, 16 }, + { "XGMAC_PORT_AE_RX_COEF_REQ", 0x27700, 0 }, + { "RXREQ_CPRE", 13, 1 }, + { "RXREQ_CINIT", 12, 1 }, + { "RXREQ_C0", 4, 2 }, + { "RXREQ_C1", 2, 2 }, + { "RXREQ_C2", 0, 2 }, + { "XGMAC_PORT_AE_RX_COEF_STAT", 0x27704, 0 }, + { "RXSTAT_RDY", 15, 1 }, + { "RXSTAT_C0", 4, 2 }, + { "RXSTAT_C1", 2, 2 }, + { "RXSTAT_C2", 0, 2 }, + { "XGMAC_PORT_AE_TX_COEF_REQ", 0x27708, 0 }, + { "TXREQ_CPRE", 13, 1 }, + { "TXREQ_CINIT", 12, 1 }, + { "TXREQ_C0", 4, 2 }, + { "TXREQ_C1", 2, 2 }, + { "TXREQ_C2", 0, 2 }, + { "XGMAC_PORT_AE_TX_COEF_STAT", 0x2770c, 0 }, + { "TXSTAT_RDY", 15, 1 }, + { "TXSTAT_C0", 4, 2 }, + { "TXSTAT_C1", 2, 2 }, + { "TXSTAT_C2", 0, 2 }, + { "XGMAC_PORT_AE_REG_MODE", 0x27710, 0 }, + { "MAN_DEC", 4, 2 }, + { "MANUAL_RDY", 3, 1 }, + { "MWT_DISABLE", 2, 1 }, + { "MDIO_OVR", 1, 1 }, + { "STICKY_MODE", 0, 1 }, + { "XGMAC_PORT_AE_PRBS_CTL", 0x27714, 0 }, + { "PRBS_CHK_ERRCNT", 8, 8 }, + { "PRBS_SYNCCNT", 5, 3 }, + { "PRBS_CHK_SYNC", 4, 1 }, + { "PRBS_CHK_RST", 3, 1 }, + { "PRBS_CHK_OFF", 2, 1 }, + { "PRBS_GEN_FRCERR", 1, 1 }, + { "PRBS_GEN_OFF", 0, 1 }, + { "XGMAC_PORT_AE_FSM_CTL", 0x27718, 0 }, + { "FSM_TR_LCL", 14, 1 }, + { "FSM_GDMRK", 11, 3 }, + { "FSM_BADMRK", 8, 3 }, + { "FSM_TR_FAIL", 7, 1 }, + { "FSM_TR_ACT", 6, 1 }, + { "FSM_FRM_LCK", 5, 1 }, + { "FSM_TR_COMP", 4, 1 }, + { "MC_RX_RDY", 3, 1 }, + { "FSM_CU_DIS", 2, 1 }, + { "FSM_TR_RST", 1, 1 }, + { "FSM_TR_EN", 0, 1 }, + { "XGMAC_PORT_AE_FSM_STATE", 0x2771c, 0 }, + { "CC2FSM_STATE", 13, 3 }, + { "CC1FSM_STATE", 10, 3 }, + { "CC0FSM_STATE", 7, 3 }, + { "FLFSM_STATE", 4, 3 }, + { "TFSM_STATE", 0, 3 }, + { "XGMAC_PORT_AE_TX_DIS", 0x27780, 0 }, + { "XGMAC_PORT_AE_KR_CTRL", 0x27784, 0 }, + { "Training_Enable", 1, 1 }, + { "Restart_Training", 0, 1 }, + { "XGMAC_PORT_AE_RX_SIGDET", 0x27788, 0 }, + { "XGMAC_PORT_AE_KR_STATUS", 0x2778c, 0 }, + { "Training_Failure", 3, 1 }, + { "Training", 2, 1 }, + { "Frame_Lock", 1, 1 }, + { "RX_Trained", 0, 1 }, + { "XGMAC_PORT_HSS_TXA_MODE_CFG", 0x27800, 0 }, + { "BWSEL", 2, 2 }, + { "RTSEL", 0, 2 }, + { "XGMAC_PORT_HSS_TXA_TEST_CTRL", 0x27804, 0 }, + { "TWDP", 5, 1 }, + { "TPGRST", 4, 1 }, + { "TPGEN", 3, 1 }, + { "TPSEL", 0, 3 }, + { "XGMAC_PORT_HSS_TXA_COEFF_CTRL", 0x27808, 0 }, + { "AEINVPOL", 6, 1 }, + { "AESOURCE", 5, 1 }, + { "EQMODE", 4, 1 }, + { "OCOEF", 3, 1 }, + { "COEFRST", 2, 1 }, + { "SPEN", 1, 1 }, + { "ALOAD", 0, 1 }, + { "XGMAC_PORT_HSS_TXA_DRIVER_MODE", 0x2780c, 0 }, + { "DRVOFFT", 5, 1 }, + { "SLEW", 2, 3 }, + { "FFE", 0, 2 }, + { "XGMAC_PORT_HSS_TXA_DRIVER_OVR_CTRL", 0x27810, 0 }, + { "VLINC", 7, 1 }, + { "VLDEC", 6, 1 }, + { "LOPWR", 5, 1 }, + { "TDMEN", 4, 1 }, + { "DCCEN", 3, 1 }, + { "VHSEL", 2, 1 }, + { "IDAC", 0, 2 }, + { "XGMAC_PORT_HSS_TXA_TDM_BIASGEN_STANDBY_TIMER", 0x27814, 0 }, + { "XGMAC_PORT_HSS_TXA_TDM_BIASGEN_PWRON_TIMER", 0x27818, 0 }, + { "XGMAC_PORT_HSS_TXA_TAP0_COEFF", 0x27820, 0 }, + { "XGMAC_PORT_HSS_TXA_TAP1_COEFF", 0x27824, 0 }, + { "XGMAC_PORT_HSS_TXA_TAP2_COEFF", 0x27828, 0 }, + { "XGMAC_PORT_HSS_TXA_PWR", 0x27830, 0 }, + { "XGMAC_PORT_HSS_TXA_POLARITY", 0x27834, 0 }, + { "TXPOL", 4, 3 }, + { "NTXPOL", 0, 3 }, + { "XGMAC_PORT_HSS_TXA_8023AP_AE_CMD", 0x27838, 0 }, + { "CXPRESET", 13, 1 }, + { "CXINIT", 12, 1 }, + { "C2UPDT", 4, 2 }, + { "C1UPDT", 2, 2 }, + { "C0UPDT", 0, 2 }, + { "XGMAC_PORT_HSS_TXA_8023AP_AE_STATUS", 0x2783c, 0 }, + { "C2STAT", 4, 2 }, + { "C1STAT", 2, 2 }, + { "C0STAT", 0, 2 }, + { "XGMAC_PORT_HSS_TXA_TAP0_IDAC_OVR", 0x27840, 0 }, + { "XGMAC_PORT_HSS_TXA_TAP1_IDAC_OVR", 0x27844, 0 }, + { "XGMAC_PORT_HSS_TXA_TAP2_IDAC_OVR", 0x27848, 0 }, + { "XGMAC_PORT_HSS_TXA_PWR_DAC_OVR", 0x27850, 0 }, + { "OPEN", 7, 1 }, + { "OPVAL", 0, 5 }, + { "XGMAC_PORT_HSS_TXA_PWR_DAC", 0x27854, 0 }, + { "XGMAC_PORT_HSS_TXA_TAP0_IDAC_APP", 0x27860, 0 }, + { "XGMAC_PORT_HSS_TXA_TAP1_IDAC_APP", 0x27864, 0 }, + { "XGMAC_PORT_HSS_TXA_TAP2_IDAC_APP", 0x27868, 0 }, + { "XGMAC_PORT_HSS_TXA_SEG_DIS_APP", 0x27870, 0 }, + { "XGMAC_PORT_HSS_TXA_EXT_ADDR_DATA", 0x27878, 0 }, + { "XGMAC_PORT_HSS_TXA_EXT_ADDR", 0x2787c, 0 }, + { "XADDR", 1, 5 }, + { "XWR", 0, 1 }, + { "XGMAC_PORT_HSS_TXB_MODE_CFG", 0x27880, 0 }, + { "BWSEL", 2, 2 }, + { "RTSEL", 0, 2 }, + { "XGMAC_PORT_HSS_TXB_TEST_CTRL", 0x27884, 0 }, + { "TWDP", 5, 1 }, + { "TPGRST", 4, 1 }, + { "TPGEN", 3, 1 }, + { "TPSEL", 0, 3 }, + { "XGMAC_PORT_HSS_TXB_COEFF_CTRL", 0x27888, 0 }, + { "AEINVPOL", 6, 1 }, + { "AESOURCE", 5, 1 }, + { "EQMODE", 4, 1 }, + { "OCOEF", 3, 1 }, + { "COEFRST", 2, 1 }, + { "SPEN", 1, 1 }, + { "ALOAD", 0, 1 }, + { "XGMAC_PORT_HSS_TXB_DRIVER_MODE", 0x2788c, 0 }, + { "DRVOFFT", 5, 1 }, + { "SLEW", 2, 3 }, + { "FFE", 0, 2 }, + { "XGMAC_PORT_HSS_TXB_DRIVER_OVR_CTRL", 0x27890, 0 }, + { "VLINC", 7, 1 }, + { "VLDEC", 6, 1 }, + { "LOPWR", 5, 1 }, + { "TDMEN", 4, 1 }, + { "DCCEN", 3, 1 }, + { "VHSEL", 2, 1 }, + { "IDAC", 0, 2 }, + { "XGMAC_PORT_HSS_TXB_TDM_BIASGEN_STANDBY_TIMER", 0x27894, 0 }, + { "XGMAC_PORT_HSS_TXB_TDM_BIASGEN_PWRON_TIMER", 0x27898, 0 }, + { "XGMAC_PORT_HSS_TXB_TAP0_COEFF", 0x278a0, 0 }, + { "XGMAC_PORT_HSS_TXB_TAP1_COEFF", 0x278a4, 0 }, + { "XGMAC_PORT_HSS_TXB_TAP2_COEFF", 0x278a8, 0 }, + { "XGMAC_PORT_HSS_TXB_PWR", 0x278b0, 0 }, + { "XGMAC_PORT_HSS_TXB_POLARITY", 0x278b4, 0 }, + { "TXPOL", 4, 3 }, + { "NTXPOL", 0, 3 }, + { "XGMAC_PORT_HSS_TXB_8023AP_AE_CMD", 0x278b8, 0 }, + { "CXPRESET", 13, 1 }, + { "CXINIT", 12, 1 }, + { "C2UPDT", 4, 2 }, + { "C1UPDT", 2, 2 }, + { "C0UPDT", 0, 2 }, + { "XGMAC_PORT_HSS_TXB_8023AP_AE_STATUS", 0x278bc, 0 }, + { "C2STAT", 4, 2 }, + { "C1STAT", 2, 2 }, + { "C0STAT", 0, 2 }, + { "XGMAC_PORT_HSS_TXB_TAP0_IDAC_OVR", 0x278c0, 0 }, + { "XGMAC_PORT_HSS_TXB_TAP1_IDAC_OVR", 0x278c4, 0 }, + { "XGMAC_PORT_HSS_TXB_TAP2_IDAC_OVR", 0x278c8, 0 }, + { "XGMAC_PORT_HSS_TXB_PWR_DAC_OVR", 0x278d0, 0 }, + { "OPEN", 7, 1 }, + { "OPVAL", 0, 5 }, + { "XGMAC_PORT_HSS_TXB_PWR_DAC", 0x278d4, 0 }, + { "XGMAC_PORT_HSS_TXB_TAP0_IDAC_APP", 0x278e0, 0 }, + { "XGMAC_PORT_HSS_TXB_TAP1_IDAC_APP", 0x278e4, 0 }, + { "XGMAC_PORT_HSS_TXB_TAP2_IDAC_APP", 0x278e8, 0 }, + { "XGMAC_PORT_HSS_TXB_SEG_DIS_APP", 0x278f0, 0 }, + { "XGMAC_PORT_HSS_TXB_EXT_ADDR_DATA", 0x278f8, 0 }, + { "XGMAC_PORT_HSS_TXB_EXT_ADDR", 0x278fc, 0 }, + { "XADDR", 2, 4 }, + { "XWR", 0, 1 }, + { "XGMAC_PORT_HSS_RXA_CFG_MODE", 0x27900, 0 }, + { "BW810", 8, 1 }, + { "AUXCLK", 7, 1 }, + { "DMSEL", 4, 3 }, + { "BWSEL", 2, 2 }, + { "RTSEL", 0, 2 }, + { "XGMAC_PORT_HSS_RXA_TEST_CTRL", 0x27904, 0 }, + { "RCLKEN", 15, 1 }, + { "RRATE", 13, 2 }, + { "LBFRCERROR", 10, 1 }, + { "LBERROR", 9, 1 }, + { "LBSYNC", 8, 1 }, + { "FDWRAPCLK", 7, 1 }, + { "FDWRAP", 6, 1 }, + { "PRST", 4, 1 }, + { "PCHKEN", 3, 1 }, + { "PRBSSEL", 0, 3 }, + { "XGMAC_PORT_HSS_RXA_PH_ROTATOR_CTRL", 0x27908, 0 }, + { "FTHROT", 12, 4 }, + { "RTHROT", 11, 1 }, + { "FILTCTL", 7, 4 }, + { "RSRVO", 5, 2 }, + { "EXTEL", 4, 1 }, + { "RSTONSTUCK", 3, 1 }, + { "FREEZEFW", 2, 1 }, + { "RESETFW", 1, 1 }, + { "SSCENABLE", 0, 1 }, + { "XGMAC_PORT_HSS_RXA_PH_ROTATOR_OFFSET_CTRL", 0x2790c, 0 }, + { "RSNP", 11, 1 }, + { "TSOEN", 10, 1 }, + { "OFFEN", 9, 1 }, + { "TMSCAL", 7, 2 }, + { "APADJ", 6, 1 }, + { "RSEL", 5, 1 }, + { "PHOFFS", 0, 5 }, + { "XGMAC_PORT_HSS_RXA_PH_ROTATOR_POSITION1", 0x27910, 0 }, + { "ROT0A", 8, 6 }, + { "RTSEL", 0, 6 }, + { "XGMAC_PORT_HSS_RXA_PH_ROTATOR_POSITION2", 0x27914, 0 }, + { "XGMAC_PORT_HSS_RXA_PH_ROTATOR_STATIC_PH_OFFSET", 0x27918, 0 }, + { "RCALER", 15, 1 }, + { "RAOOFF", 10, 5 }, + { "RAEOFF", 5, 5 }, + { "RDOFF", 0, 5 }, + { "XGMAC_PORT_HSS_RXA_SIGDET_CTRL", 0x2791c, 0 }, + { "SIGNSD", 13, 2 }, + { "DACSD", 8, 5 }, + { "SDPDN", 6, 1 }, + { "SIGDET", 5, 1 }, + { "SDLVL", 0, 5 }, + { "XGMAC_PORT_HSS_RXA_DFE_CTRL", 0x27920, 0 }, + { "REQCMP", 15, 1 }, + { "DFEREQ", 14, 1 }, + { "SPCEN", 13, 1 }, + { "GATEEN", 12, 1 }, + { "SPIFMT", 9, 3 }, + { "DFEPWR", 6, 3 }, + { "STNDBY", 5, 1 }, + { "FRCH", 4, 1 }, + { "NONRND", 3, 1 }, + { "NONRNF", 2, 1 }, + { "FSTLCK", 1, 1 }, + { "DFERST", 0, 1 }, + { "XGMAC_PORT_HSS_RXA_DFE_DATA_EDGE_SAMPLE", 0x27924, 0 }, + { "ESAMP", 8, 8 }, + { "DSAMP", 0, 8 }, + { "XGMAC_PORT_HSS_RXA_DFE_AMP_SAMPLE", 0x27928, 0 }, + { "SMODE", 8, 4 }, + { "ADCORR", 7, 1 }, + { "TRAINEN", 6, 1 }, + { "ASAMPQ", 3, 3 }, + { "ASAMP", 0, 3 }, + { "XGMAC_PORT_HSS_RXA_VGA_CTRL1", 0x2792c, 0 }, + { "POLE", 12, 2 }, + { "PEAK", 8, 3 }, + { "VOFFSN", 6, 2 }, + { "VOFFA", 0, 6 }, + { "XGMAC_PORT_HSS_RXA_VGA_CTRL2", 0x27930, 0 }, + { "SHORTV", 10, 1 }, + { "VGAIN", 0, 4 }, + { "XGMAC_PORT_HSS_RXA_VGA_CTRL3", 0x27934, 0 }, + { "HBND1", 10, 1 }, + { "HBND0", 9, 1 }, + { "VLCKD", 8, 1 }, + { "VLCKDF", 7, 1 }, + { "AMAXT", 0, 7 }, + { "XGMAC_PORT_HSS_RXA_DFE_D00_D01_OFFSET", 0x27938, 0 }, + { "D01SN", 13, 2 }, + { "D01AMP", 8, 5 }, + { "D00SN", 5, 2 }, + { "D00AMP", 0, 5 }, + { "XGMAC_PORT_HSS_RXA_DFE_D10_D11_OFFSET", 0x2793c, 0 }, + { "D11SN", 13, 2 }, + { "D11AMP", 8, 5 }, + { "D10SN", 5, 2 }, + { "D10AMP", 0, 5 }, + { "XGMAC_PORT_HSS_RXA_DFE_E0_E1_OFFSET", 0x27940, 0 }, + { "E1SN", 13, 2 }, + { "E1AMP", 8, 5 }, + { "E0SN", 5, 2 }, + { "E0AMP", 0, 5 }, + { "XGMAC_PORT_HSS_RXA_DACA_OFFSET", 0x27944, 0 }, + { "AOFFO", 8, 6 }, + { "AOFFE", 0, 6 }, + { "XGMAC_PORT_HSS_RXA_DACAP_DAC_AN_OFFSET", 0x27948, 0 }, + { "DACAN", 8, 8 }, + { "DACAP", 0, 8 }, + { "XGMAC_PORT_HSS_RXA_DACA_MIN", 0x2794c, 0 }, + { "DACAZ", 8, 8 }, + { "DACAM", 0, 8 }, + { "XGMAC_PORT_HSS_RXA_ADAC_CTRL", 0x27950, 0 }, + { "ADSN", 7, 2 }, + { "ADMAG", 0, 7 }, + { "XGMAC_PORT_HSS_RXA_DIGITAL_EYE_CTRL", 0x27954, 0 }, + { "BLKAZ", 15, 1 }, + { "WIDTH", 10, 5 }, + { "MINWIDTH", 5, 5 }, + { "MINAMP", 0, 5 }, + { "XGMAC_PORT_HSS_RXA_DIGITAL_EYE_METRICS", 0x27958, 0 }, + { "EMBRDY", 10, 1 }, + { "EMBUMP", 7, 1 }, + { "EMMD", 5, 2 }, + { "EMPAT", 1, 1 }, + { "EMEN", 0, 1 }, + { "XGMAC_PORT_HSS_RXA_DFE_H1", 0x2795c, 0 }, + { "H1OSN", 14, 2 }, + { "H1OMAG", 8, 6 }, + { "H1ESN", 6, 2 }, + { "H1EMAG", 0, 6 }, + { "XGMAC_PORT_HSS_RXA_DFE_H2", 0x27960, 0 }, + { "H2OSN", 13, 2 }, + { "H2OMAG", 8, 5 }, + { "H2ESN", 5, 2 }, + { "H2EMAG", 0, 5 }, + { "XGMAC_PORT_HSS_RXA_DFE_H3", 0x27964, 0 }, + { "H3OSN", 12, 2 }, + { "H3OMAG", 8, 4 }, + { "H3ESN", 4, 2 }, + { "H3EMAG", 0, 4 }, + { "XGMAC_PORT_HSS_RXA_DFE_H4", 0x27968, 0 }, + { "H4OSN", 12, 2 }, + { "H4OMAG", 8, 4 }, + { "H4ESN", 4, 2 }, + { "H4EMAG", 0, 4 }, + { "XGMAC_PORT_HSS_RXA_DFE_H5", 0x2796c, 0 }, + { "H5OSN", 12, 2 }, + { "H5OMAG", 8, 4 }, + { "H5ESN", 4, 2 }, + { "H5EMAG", 0, 4 }, + { "XGMAC_PORT_HSS_RXA_DAC_DPC", 0x27970, 0 }, + { "DPCCVG", 13, 1 }, + { "DACCVG", 12, 1 }, + { "DPCTGT", 9, 3 }, + { "BLKH1T", 8, 1 }, + { "BLKOAE", 7, 1 }, + { "H1TGT", 4, 3 }, + { "OAE", 0, 4 }, + { "XGMAC_PORT_HSS_RXA_DDC", 0x27974, 0 }, + { "OLS", 11, 5 }, + { "OES", 6, 5 }, + { "BLKODEC", 5, 1 }, + { "ODEC", 0, 5 }, + { "XGMAC_PORT_HSS_RXA_INTERNAL_STATUS", 0x27978, 0 }, + { "BER6", 15, 1 }, + { "BER6VAL", 14, 1 }, + { "BER3VAL", 13, 1 }, + { "DPCCMP", 9, 1 }, + { "DACCMP", 8, 1 }, + { "DDCCMP", 7, 1 }, + { "AERRFLG", 6, 1 }, + { "WERRFLG", 5, 1 }, + { "TRCMP", 4, 1 }, + { "VLCKF", 3, 1 }, + { "ROCADJ", 2, 1 }, + { "ROCCMP", 1, 1 }, + { "OCCMP", 0, 1 }, + { "XGMAC_PORT_HSS_RXA_DFE_FUNC_CTRL", 0x2797c, 0 }, + { "FDPC", 15, 1 }, + { "FDAC", 14, 1 }, + { "FDDC", 13, 1 }, + { "FNRND", 12, 1 }, + { "FVGAIN", 11, 1 }, + { "FVOFF", 10, 1 }, + { "FSDET", 9, 1 }, + { "FBER6", 8, 1 }, + { "FROTO", 7, 1 }, + { "FH4H5", 6, 1 }, + { "FH2H3", 5, 1 }, + { "FH1", 4, 1 }, + { "FH1SN", 3, 1 }, + { "FNRDF", 2, 1 }, + { "FADAC", 0, 1 }, + { "XGMAC_PORT_HSS_RXB_CFG_MODE", 0x27980, 0 }, + { "BW810", 8, 1 }, + { "AUXCLK", 7, 1 }, + { "DMSEL", 4, 3 }, + { "BWSEL", 2, 2 }, + { "RTSEL", 0, 2 }, + { "XGMAC_PORT_HSS_RXB_TEST_CTRL", 0x27984, 0 }, + { "RCLKEN", 15, 1 }, + { "RRATE", 13, 2 }, + { "LBFRCERROR", 10, 1 }, + { "LBERROR", 9, 1 }, + { "LBSYNC", 8, 1 }, + { "FDWRAPCLK", 7, 1 }, + { "FDWRAP", 6, 1 }, + { "PRST", 4, 1 }, + { "PCHKEN", 3, 1 }, + { "PRBSSEL", 0, 3 }, + { "XGMAC_PORT_HSS_RXB_PH_ROTATOR_CTRL", 0x27988, 0 }, + { "FTHROT", 12, 4 }, + { "RTHROT", 11, 1 }, + { "FILTCTL", 7, 4 }, + { "RSRVO", 5, 2 }, + { "EXTEL", 4, 1 }, + { "RSTONSTUCK", 3, 1 }, + { "FREEZEFW", 2, 1 }, + { "RESETFW", 1, 1 }, + { "SSCENABLE", 0, 1 }, + { "XGMAC_PORT_HSS_RXB_PH_ROTATOR_OFFSET_CTRL", 0x2798c, 0 }, + { "RSNP", 11, 1 }, + { "TSOEN", 10, 1 }, + { "OFFEN", 9, 1 }, + { "TMSCAL", 7, 2 }, + { "APADJ", 6, 1 }, + { "RSEL", 5, 1 }, + { "PHOFFS", 0, 5 }, + { "XGMAC_PORT_HSS_RXB_PH_ROTATOR_POSITION1", 0x27990, 0 }, + { "ROT0A", 8, 6 }, + { "RTSEL", 0, 6 }, + { "XGMAC_PORT_HSS_RXB_PH_ROTATOR_POSITION2", 0x27994, 0 }, + { "XGMAC_PORT_HSS_RXB_PH_ROTATOR_STATIC_PH_OFFSET", 0x27998, 0 }, + { "RCALER", 15, 1 }, + { "RAOOFF", 10, 5 }, + { "RAEOFF", 5, 5 }, + { "RDOFF", 0, 5 }, + { "XGMAC_PORT_HSS_RXB_SIGDET_CTRL", 0x2799c, 0 }, + { "SIGNSD", 13, 2 }, + { "DACSD", 8, 5 }, + { "SDPDN", 6, 1 }, + { "SIGDET", 5, 1 }, + { "SDLVL", 0, 5 }, + { "XGMAC_PORT_HSS_RXB_DFE_CTRL", 0x279a0, 0 }, + { "REQCMP", 15, 1 }, + { "DFEREQ", 14, 1 }, + { "SPCEN", 13, 1 }, + { "GATEEN", 12, 1 }, + { "SPIFMT", 9, 3 }, + { "DFEPWR", 6, 3 }, + { "STNDBY", 5, 1 }, + { "FRCH", 4, 1 }, + { "NONRND", 3, 1 }, + { "NONRNF", 2, 1 }, + { "FSTLCK", 1, 1 }, + { "DFERST", 0, 1 }, + { "XGMAC_PORT_HSS_RXB_DFE_DATA_EDGE_SAMPLE", 0x279a4, 0 }, + { "ESAMP", 8, 8 }, + { "DSAMP", 0, 8 }, + { "XGMAC_PORT_HSS_RXB_DFE_AMP_SAMPLE", 0x279a8, 0 }, + { "SMODE", 8, 4 }, + { "ADCORR", 7, 1 }, + { "TRAINEN", 6, 1 }, + { "ASAMPQ", 3, 3 }, + { "ASAMP", 0, 3 }, + { "XGMAC_PORT_HSS_RXB_VGA_CTRL1", 0x279ac, 0 }, + { "POLE", 12, 2 }, + { "PEAK", 8, 3 }, + { "VOFFSN", 6, 2 }, + { "VOFFA", 0, 6 }, + { "XGMAC_PORT_HSS_RXB_VGA_CTRL2", 0x279b0, 0 }, + { "SHORTV", 10, 1 }, + { "VGAIN", 0, 4 }, + { "XGMAC_PORT_HSS_RXB_VGA_CTRL3", 0x279b4, 0 }, + { "HBND1", 10, 1 }, + { "HBND0", 9, 1 }, + { "VLCKD", 8, 1 }, + { "VLCKDF", 7, 1 }, + { "AMAXT", 0, 7 }, + { "XGMAC_PORT_HSS_RXB_DFE_D00_D01_OFFSET", 0x279b8, 0 }, + { "D01SN", 13, 2 }, + { "D01AMP", 8, 5 }, + { "D00SN", 5, 2 }, + { "D00AMP", 0, 5 }, + { "XGMAC_PORT_HSS_RXB_DFE_D10_D11_OFFSET", 0x279bc, 0 }, + { "D11SN", 13, 2 }, + { "D11AMP", 8, 5 }, + { "D10SN", 5, 2 }, + { "D10AMP", 0, 5 }, + { "XGMAC_PORT_HSS_RXB_DFE_E0_E1_OFFSET", 0x279c0, 0 }, + { "E1SN", 13, 2 }, + { "E1AMP", 8, 5 }, + { "E0SN", 5, 2 }, + { "E0AMP", 0, 5 }, + { "XGMAC_PORT_HSS_RXB_DACA_OFFSET", 0x279c4, 0 }, + { "AOFFO", 8, 6 }, + { "AOFFE", 0, 6 }, + { "XGMAC_PORT_HSS_RXB_DACAP_DAC_AN_OFFSET", 0x279c8, 0 }, + { "DACAN", 8, 8 }, + { "DACAP", 0, 8 }, + { "XGMAC_PORT_HSS_RXB_DACA_MIN", 0x279cc, 0 }, + { "DACAZ", 8, 8 }, + { "DACAM", 0, 8 }, + { "XGMAC_PORT_HSS_RXB_ADAC_CTRL", 0x279d0, 0 }, + { "ADSN", 7, 2 }, + { "ADMAG", 0, 7 }, + { "XGMAC_PORT_HSS_RXB_DIGITAL_EYE_CTRL", 0x279d4, 0 }, + { "BLKAZ", 15, 1 }, + { "WIDTH", 10, 5 }, + { "MINWIDTH", 5, 5 }, + { "MINAMP", 0, 5 }, + { "XGMAC_PORT_HSS_RXB_DIGITAL_EYE_METRICS", 0x279d8, 0 }, + { "EMBRDY", 10, 1 }, + { "EMBUMP", 7, 1 }, + { "EMMD", 5, 2 }, + { "EMPAT", 1, 1 }, + { "EMEN", 0, 1 }, + { "XGMAC_PORT_HSS_RXB_DFE_H1", 0x279dc, 0 }, + { "H1OSN", 14, 2 }, + { "H1OMAG", 8, 6 }, + { "H1ESN", 6, 2 }, + { "H1EMAG", 0, 6 }, + { "XGMAC_PORT_HSS_RXB_DFE_H2", 0x279e0, 0 }, + { "H2OSN", 13, 2 }, + { "H2OMAG", 8, 5 }, + { "H2ESN", 5, 2 }, + { "H2EMAG", 0, 5 }, + { "XGMAC_PORT_HSS_RXB_DFE_H3", 0x279e4, 0 }, + { "H3OSN", 12, 2 }, + { "H3OMAG", 8, 4 }, + { "H3ESN", 4, 2 }, + { "H3EMAG", 0, 4 }, + { "XGMAC_PORT_HSS_RXB_DFE_H4", 0x279e8, 0 }, + { "H4OSN", 12, 2 }, + { "H4OMAG", 8, 4 }, + { "H4ESN", 4, 2 }, + { "H4EMAG", 0, 4 }, + { "XGMAC_PORT_HSS_RXB_DFE_H5", 0x279ec, 0 }, + { "H5OSN", 12, 2 }, + { "H5OMAG", 8, 4 }, + { "H5ESN", 4, 2 }, + { "H5EMAG", 0, 4 }, + { "XGMAC_PORT_HSS_RXB_DAC_DPC", 0x279f0, 0 }, + { "DPCCVG", 13, 1 }, + { "DACCVG", 12, 1 }, + { "DPCTGT", 9, 3 }, + { "BLKH1T", 8, 1 }, + { "BLKOAE", 7, 1 }, + { "H1TGT", 4, 3 }, + { "OAE", 0, 4 }, + { "XGMAC_PORT_HSS_RXB_DDC", 0x279f4, 0 }, + { "OLS", 11, 5 }, + { "OES", 6, 5 }, + { "BLKODEC", 5, 1 }, + { "ODEC", 0, 5 }, + { "XGMAC_PORT_HSS_RXB_INTERNAL_STATUS", 0x279f8, 0 }, + { "BER6", 15, 1 }, + { "BER6VAL", 14, 1 }, + { "BER3VAL", 13, 1 }, + { "DPCCMP", 9, 1 }, + { "DACCMP", 8, 1 }, + { "DDCCMP", 7, 1 }, + { "AERRFLG", 6, 1 }, + { "WERRFLG", 5, 1 }, + { "TRCMP", 4, 1 }, + { "VLCKF", 3, 1 }, + { "ROCADJ", 2, 1 }, + { "ROCCMP", 1, 1 }, + { "OCCMP", 0, 1 }, + { "XGMAC_PORT_HSS_RXB_DFE_FUNC_CTRL", 0x279fc, 0 }, + { "FDPC", 15, 1 }, + { "FDAC", 14, 1 }, + { "FDDC", 13, 1 }, + { "FNRND", 12, 1 }, + { "FVGAIN", 11, 1 }, + { "FVOFF", 10, 1 }, + { "FSDET", 9, 1 }, + { "FBER6", 8, 1 }, + { "FROTO", 7, 1 }, + { "FH4H5", 6, 1 }, + { "FH2H3", 5, 1 }, + { "FH1", 4, 1 }, + { "FH1SN", 3, 1 }, + { "FNRDF", 2, 1 }, + { "FADAC", 0, 1 }, + { "XGMAC_PORT_HSS_TXC_MODE_CFG", 0x27a00, 0 }, + { "BWSEL", 2, 2 }, + { "RTSEL", 0, 2 }, + { "XGMAC_PORT_HSS_TXC_TEST_CTRL", 0x27a04, 0 }, + { "TWDP", 5, 1 }, + { "TPGRST", 4, 1 }, + { "TPGEN", 3, 1 }, + { "TPSEL", 0, 3 }, + { "XGMAC_PORT_HSS_TXC_COEFF_CTRL", 0x27a08, 0 }, + { "AEINVPOL", 6, 1 }, + { "AESOURCE", 5, 1 }, + { "EQMODE", 4, 1 }, + { "OCOEF", 3, 1 }, + { "COEFRST", 2, 1 }, + { "SPEN", 1, 1 }, + { "ALOAD", 0, 1 }, + { "XGMAC_PORT_HSS_TXC_DRIVER_MODE", 0x27a0c, 0 }, + { "DRVOFFT", 5, 1 }, + { "SLEW", 2, 3 }, + { "FFE", 0, 2 }, + { "XGMAC_PORT_HSS_TXC_DRIVER_OVR_CTRL", 0x27a10, 0 }, + { "VLINC", 7, 1 }, + { "VLDEC", 6, 1 }, + { "LOPWR", 5, 1 }, + { "TDMEN", 4, 1 }, + { "DCCEN", 3, 1 }, + { "VHSEL", 2, 1 }, + { "IDAC", 0, 2 }, + { "XGMAC_PORT_HSS_TXC_TDM_BIASGEN_STANDBY_TIMER", 0x27a14, 0 }, + { "XGMAC_PORT_HSS_TXC_TDM_BIASGEN_PWRON_TIMER", 0x27a18, 0 }, + { "XGMAC_PORT_HSS_TXC_TAP0_COEFF", 0x27a20, 0 }, + { "XGMAC_PORT_HSS_TXC_TAP1_COEFF", 0x27a24, 0 }, + { "XGMAC_PORT_HSS_TXC_TAP2_COEFF", 0x27a28, 0 }, + { "XGMAC_PORT_HSS_TXC_PWR", 0x27a30, 0 }, + { "XGMAC_PORT_HSS_TXC_POLARITY", 0x27a34, 0 }, + { "TXPOL", 4, 3 }, + { "NTXPOL", 0, 3 }, + { "XGMAC_PORT_HSS_TXC_8023AP_AE_CMD", 0x27a38, 0 }, + { "CXPRESET", 13, 1 }, + { "CXINIT", 12, 1 }, + { "C2UPDT", 4, 2 }, + { "C1UPDT", 2, 2 }, + { "C0UPDT", 0, 2 }, + { "XGMAC_PORT_HSS_TXC_8023AP_AE_STATUS", 0x27a3c, 0 }, + { "C2STAT", 4, 2 }, + { "C1STAT", 2, 2 }, + { "C0STAT", 0, 2 }, + { "XGMAC_PORT_HSS_TXC_TAP0_IDAC_OVR", 0x27a40, 0 }, + { "XGMAC_PORT_HSS_TXC_TAP1_IDAC_OVR", 0x27a44, 0 }, + { "XGMAC_PORT_HSS_TXC_TAP2_IDAC_OVR", 0x27a48, 0 }, + { "XGMAC_PORT_HSS_TXC_PWR_DAC_OVR", 0x27a50, 0 }, + { "OPEN", 7, 1 }, + { "OPVAL", 0, 5 }, + { "XGMAC_PORT_HSS_TXC_PWR_DAC", 0x27a54, 0 }, + { "XGMAC_PORT_HSS_TXC_TAP0_IDAC_APP", 0x27a60, 0 }, + { "XGMAC_PORT_HSS_TXC_TAP1_IDAC_APP", 0x27a64, 0 }, + { "XGMAC_PORT_HSS_TXC_TAP2_IDAC_APP", 0x27a68, 0 }, + { "XGMAC_PORT_HSS_TXC_SEG_DIS_APP", 0x27a70, 0 }, + { "XGMAC_PORT_HSS_TXC_EXT_ADDR_DATA", 0x27a78, 0 }, + { "XGMAC_PORT_HSS_TXC_EXT_ADDR", 0x27a7c, 0 }, + { "XADDR", 2, 4 }, + { "XWR", 0, 1 }, + { "XGMAC_PORT_HSS_TXD_MODE_CFG", 0x27a80, 0 }, + { "BWSEL", 2, 2 }, + { "RTSEL", 0, 2 }, + { "XGMAC_PORT_HSS_TXD_TEST_CTRL", 0x27a84, 0 }, + { "TWDP", 5, 1 }, + { "TPGRST", 4, 1 }, + { "TPGEN", 3, 1 }, + { "TPSEL", 0, 3 }, + { "XGMAC_PORT_HSS_TXD_COEFF_CTRL", 0x27a88, 0 }, + { "AEINVPOL", 6, 1 }, + { "AESOURCE", 5, 1 }, + { "EQMODE", 4, 1 }, + { "OCOEF", 3, 1 }, + { "COEFRST", 2, 1 }, + { "SPEN", 1, 1 }, + { "ALOAD", 0, 1 }, + { "XGMAC_PORT_HSS_TXD_DRIVER_MODE", 0x27a8c, 0 }, + { "DRVOFFT", 5, 1 }, + { "SLEW", 2, 3 }, + { "FFE", 0, 2 }, + { "XGMAC_PORT_HSS_TXD_DRIVER_OVR_CTRL", 0x27a90, 0 }, + { "VLINC", 7, 1 }, + { "VLDEC", 6, 1 }, + { "LOPWR", 5, 1 }, + { "TDMEN", 4, 1 }, + { "DCCEN", 3, 1 }, + { "VHSEL", 2, 1 }, + { "IDAC", 0, 2 }, + { "XGMAC_PORT_HSS_TXD_TDM_BIASGEN_STANDBY_TIMER", 0x27a94, 0 }, + { "XGMAC_PORT_HSS_TXD_TDM_BIASGEN_PWRON_TIMER", 0x27a98, 0 }, + { "XGMAC_PORT_HSS_TXD_TAP0_COEFF", 0x27aa0, 0 }, + { "XGMAC_PORT_HSS_TXD_TAP1_COEFF", 0x27aa4, 0 }, + { "XGMAC_PORT_HSS_TXD_TAP2_COEFF", 0x27aa8, 0 }, + { "XGMAC_PORT_HSS_TXD_PWR", 0x27ab0, 0 }, + { "XGMAC_PORT_HSS_TXD_POLARITY", 0x27ab4, 0 }, + { "TXPOL", 4, 3 }, + { "NTXPOL", 0, 3 }, + { "XGMAC_PORT_HSS_TXD_8023AP_AE_CMD", 0x27ab8, 0 }, + { "CXPRESET", 13, 1 }, + { "CXINIT", 12, 1 }, + { "C2UPDT", 4, 2 }, + { "C1UPDT", 2, 2 }, + { "C0UPDT", 0, 2 }, + { "XGMAC_PORT_HSS_TXD_8023AP_AE_STATUS", 0x27abc, 0 }, + { "C2STAT", 4, 2 }, + { "C1STAT", 2, 2 }, + { "C0STAT", 0, 2 }, + { "XGMAC_PORT_HSS_TXD_TAP0_IDAC_OVR", 0x27ac0, 0 }, + { "XGMAC_PORT_HSS_TXD_TAP1_IDAC_OVR", 0x27ac4, 0 }, + { "XGMAC_PORT_HSS_TXD_TAP2_IDAC_OVR", 0x27ac8, 0 }, + { "XGMAC_PORT_HSS_TXD_PWR_DAC_OVR", 0x27ad0, 0 }, + { "OPEN", 7, 1 }, + { "OPVAL", 0, 5 }, + { "XGMAC_PORT_HSS_TXD_PWR_DAC", 0x27ad4, 0 }, + { "XGMAC_PORT_HSS_TXD_TAP0_IDAC_APP", 0x27ae0, 0 }, + { "XGMAC_PORT_HSS_TXD_TAP1_IDAC_APP", 0x27ae4, 0 }, + { "XGMAC_PORT_HSS_TXD_TAP2_IDAC_APP", 0x27ae8, 0 }, + { "XGMAC_PORT_HSS_TXD_SEG_DIS_APP", 0x27af0, 0 }, + { "XGMAC_PORT_HSS_TXD_EXT_ADDR_DATA", 0x27af8, 0 }, + { "XGMAC_PORT_HSS_TXD_EXT_ADDR", 0x27afc, 0 }, + { "XADDR", 2, 4 }, + { "XWR", 0, 1 }, + { "XGMAC_PORT_HSS_RXC_CFG_MODE", 0x27b00, 0 }, + { "BW810", 8, 1 }, + { "AUXCLK", 7, 1 }, + { "DMSEL", 4, 3 }, + { "BWSEL", 2, 2 }, + { "RTSEL", 0, 2 }, + { "XGMAC_PORT_HSS_RXC_TEST_CTRL", 0x27b04, 0 }, + { "RCLKEN", 15, 1 }, + { "RRATE", 13, 2 }, + { "LBFRCERROR", 10, 1 }, + { "LBERROR", 9, 1 }, + { "LBSYNC", 8, 1 }, + { "FDWRAPCLK", 7, 1 }, + { "FDWRAP", 6, 1 }, + { "PRST", 4, 1 }, + { "PCHKEN", 3, 1 }, + { "PRBSSEL", 0, 3 }, + { "XGMAC_PORT_HSS_RXC_PH_ROTATOR_CTRL", 0x27b08, 0 }, + { "FTHROT", 12, 4 }, + { "RTHROT", 11, 1 }, + { "FILTCTL", 7, 4 }, + { "RSRVO", 5, 2 }, + { "EXTEL", 4, 1 }, + { "RSTONSTUCK", 3, 1 }, + { "FREEZEFW", 2, 1 }, + { "RESETFW", 1, 1 }, + { "SSCENABLE", 0, 1 }, + { "XGMAC_PORT_HSS_RXC_PH_ROTATOR_OFFSET_CTRL", 0x27b0c, 0 }, + { "RSNP", 11, 1 }, + { "TSOEN", 10, 1 }, + { "OFFEN", 9, 1 }, + { "TMSCAL", 7, 2 }, + { "APADJ", 6, 1 }, + { "RSEL", 5, 1 }, + { "PHOFFS", 0, 5 }, + { "XGMAC_PORT_HSS_RXC_PH_ROTATOR_POSITION1", 0x27b10, 0 }, + { "ROT0A", 8, 6 }, + { "RTSEL", 0, 6 }, + { "XGMAC_PORT_HSS_RXC_PH_ROTATOR_POSITION2", 0x27b14, 0 }, + { "XGMAC_PORT_HSS_RXC_PH_ROTATOR_STATIC_PH_OFFSET", 0x27b18, 0 }, + { "RCALER", 15, 1 }, + { "RAOOFF", 10, 5 }, + { "RAEOFF", 5, 5 }, + { "RDOFF", 0, 5 }, + { "XGMAC_PORT_HSS_RXC_SIGDET_CTRL", 0x27b1c, 0 }, + { "SIGNSD", 13, 2 }, + { "DACSD", 8, 5 }, + { "SDPDN", 6, 1 }, + { "SIGDET", 5, 1 }, + { "SDLVL", 0, 5 }, + { "XGMAC_PORT_HSS_RXC_DFE_CTRL", 0x27b20, 0 }, + { "REQCMP", 15, 1 }, + { "DFEREQ", 14, 1 }, + { "SPCEN", 13, 1 }, + { "GATEEN", 12, 1 }, + { "SPIFMT", 9, 3 }, + { "DFEPWR", 6, 3 }, + { "STNDBY", 5, 1 }, + { "FRCH", 4, 1 }, + { "NONRND", 3, 1 }, + { "NONRNF", 2, 1 }, + { "FSTLCK", 1, 1 }, + { "DFERST", 0, 1 }, + { "XGMAC_PORT_HSS_RXC_DFE_DATA_EDGE_SAMPLE", 0x27b24, 0 }, + { "ESAMP", 8, 8 }, + { "DSAMP", 0, 8 }, + { "XGMAC_PORT_HSS_RXC_DFE_AMP_SAMPLE", 0x27b28, 0 }, + { "SMODE", 8, 4 }, + { "ADCORR", 7, 1 }, + { "TRAINEN", 6, 1 }, + { "ASAMPQ", 3, 3 }, + { "ASAMP", 0, 3 }, + { "XGMAC_PORT_HSS_RXC_VGA_CTRL1", 0x27b2c, 0 }, + { "POLE", 12, 2 }, + { "PEAK", 8, 3 }, + { "VOFFSN", 6, 2 }, + { "VOFFA", 0, 6 }, + { "XGMAC_PORT_HSS_RXC_VGA_CTRL2", 0x27b30, 0 }, + { "SHORTV", 10, 1 }, + { "VGAIN", 0, 4 }, + { "XGMAC_PORT_HSS_RXC_VGA_CTRL3", 0x27b34, 0 }, + { "HBND1", 10, 1 }, + { "HBND0", 9, 1 }, + { "VLCKD", 8, 1 }, + { "VLCKDF", 7, 1 }, + { "AMAXT", 0, 7 }, + { "XGMAC_PORT_HSS_RXC_DFE_D00_D01_OFFSET", 0x27b38, 0 }, + { "D01SN", 13, 2 }, + { "D01AMP", 8, 5 }, + { "D00SN", 5, 2 }, + { "D00AMP", 0, 5 }, + { "XGMAC_PORT_HSS_RXC_DFE_D10_D11_OFFSET", 0x27b3c, 0 }, + { "D11SN", 13, 2 }, + { "D11AMP", 8, 5 }, + { "D10SN", 5, 2 }, + { "D10AMP", 0, 5 }, + { "XGMAC_PORT_HSS_RXC_DFE_E0_E1_OFFSET", 0x27b40, 0 }, + { "E1SN", 13, 2 }, + { "E1AMP", 8, 5 }, + { "E0SN", 5, 2 }, + { "E0AMP", 0, 5 }, + { "XGMAC_PORT_HSS_RXC_DACA_OFFSET", 0x27b44, 0 }, + { "AOFFO", 8, 6 }, + { "AOFFE", 0, 6 }, + { "XGMAC_PORT_HSS_RXC_DACAP_DAC_AN_OFFSET", 0x27b48, 0 }, + { "DACAN", 8, 8 }, + { "DACAP", 0, 8 }, + { "XGMAC_PORT_HSS_RXC_DACA_MIN", 0x27b4c, 0 }, + { "DACAZ", 8, 8 }, + { "DACAM", 0, 8 }, + { "XGMAC_PORT_HSS_RXC_ADAC_CTRL", 0x27b50, 0 }, + { "ADSN", 7, 2 }, + { "ADMAG", 0, 7 }, + { "XGMAC_PORT_HSS_RXC_DIGITAL_EYE_CTRL", 0x27b54, 0 }, + { "BLKAZ", 15, 1 }, + { "WIDTH", 10, 5 }, + { "MINWIDTH", 5, 5 }, + { "MINAMP", 0, 5 }, + { "XGMAC_PORT_HSS_RXC_DIGITAL_EYE_METRICS", 0x27b58, 0 }, + { "EMBRDY", 10, 1 }, + { "EMBUMP", 7, 1 }, + { "EMMD", 5, 2 }, + { "EMPAT", 1, 1 }, + { "EMEN", 0, 1 }, + { "XGMAC_PORT_HSS_RXC_DFE_H1", 0x27b5c, 0 }, + { "H1OSN", 14, 2 }, + { "H1OMAG", 8, 6 }, + { "H1ESN", 6, 2 }, + { "H1EMAG", 0, 6 }, + { "XGMAC_PORT_HSS_RXC_DFE_H2", 0x27b60, 0 }, + { "H2OSN", 13, 2 }, + { "H2OMAG", 8, 5 }, + { "H2ESN", 5, 2 }, + { "H2EMAG", 0, 5 }, + { "XGMAC_PORT_HSS_RXC_DFE_H3", 0x27b64, 0 }, + { "H3OSN", 12, 2 }, + { "H3OMAG", 8, 4 }, + { "H3ESN", 4, 2 }, + { "H3EMAG", 0, 4 }, + { "XGMAC_PORT_HSS_RXC_DFE_H4", 0x27b68, 0 }, + { "H4OSN", 12, 2 }, + { "H4OMAG", 8, 4 }, + { "H4ESN", 4, 2 }, + { "H4EMAG", 0, 4 }, + { "XGMAC_PORT_HSS_RXC_DFE_H5", 0x27b6c, 0 }, + { "H5OSN", 12, 2 }, + { "H5OMAG", 8, 4 }, + { "H5ESN", 4, 2 }, + { "H5EMAG", 0, 4 }, + { "XGMAC_PORT_HSS_RXC_DAC_DPC", 0x27b70, 0 }, + { "DPCCVG", 13, 1 }, + { "DACCVG", 12, 1 }, + { "DPCTGT", 9, 3 }, + { "BLKH1T", 8, 1 }, + { "BLKOAE", 7, 1 }, + { "H1TGT", 4, 3 }, + { "OAE", 0, 4 }, + { "XGMAC_PORT_HSS_RXC_DDC", 0x27b74, 0 }, + { "OLS", 11, 5 }, + { "OES", 6, 5 }, + { "BLKODEC", 5, 1 }, + { "ODEC", 0, 5 }, + { "XGMAC_PORT_HSS_RXC_INTERNAL_STATUS", 0x27b78, 0 }, + { "BER6", 15, 1 }, + { "BER6VAL", 14, 1 }, + { "BER3VAL", 13, 1 }, + { "DPCCMP", 9, 1 }, + { "DACCMP", 8, 1 }, + { "DDCCMP", 7, 1 }, + { "AERRFLG", 6, 1 }, + { "WERRFLG", 5, 1 }, + { "TRCMP", 4, 1 }, + { "VLCKF", 3, 1 }, + { "ROCADJ", 2, 1 }, + { "ROCCMP", 1, 1 }, + { "OCCMP", 0, 1 }, + { "XGMAC_PORT_HSS_RXC_DFE_FUNC_CTRL", 0x27b7c, 0 }, + { "FDPC", 15, 1 }, + { "FDAC", 14, 1 }, + { "FDDC", 13, 1 }, + { "FNRND", 12, 1 }, + { "FVGAIN", 11, 1 }, + { "FVOFF", 10, 1 }, + { "FSDET", 9, 1 }, + { "FBER6", 8, 1 }, + { "FROTO", 7, 1 }, + { "FH4H5", 6, 1 }, + { "FH2H3", 5, 1 }, + { "FH1", 4, 1 }, + { "FH1SN", 3, 1 }, + { "FNRDF", 2, 1 }, + { "FADAC", 0, 1 }, + { "XGMAC_PORT_HSS_RXD_CFG_MODE", 0x27b80, 0 }, + { "BW810", 8, 1 }, + { "AUXCLK", 7, 1 }, + { "DMSEL", 4, 3 }, + { "BWSEL", 2, 2 }, + { "RTSEL", 0, 2 }, + { "XGMAC_PORT_HSS_RXD_TEST_CTRL", 0x27b84, 0 }, + { "RCLKEN", 15, 1 }, + { "RRATE", 13, 2 }, + { "LBFRCERROR", 10, 1 }, + { "LBERROR", 9, 1 }, + { "LBSYNC", 8, 1 }, + { "FDWRAPCLK", 7, 1 }, + { "FDWRAP", 6, 1 }, + { "PRST", 4, 1 }, + { "PCHKEN", 3, 1 }, + { "PRBSSEL", 0, 3 }, + { "XGMAC_PORT_HSS_RXD_PH_ROTATOR_CTRL", 0x27b88, 0 }, + { "FTHROT", 12, 4 }, + { "RTHROT", 11, 1 }, + { "FILTCTL", 7, 4 }, + { "RSRVO", 5, 2 }, + { "EXTEL", 4, 1 }, + { "RSTONSTUCK", 3, 1 }, + { "FREEZEFW", 2, 1 }, + { "RESETFW", 1, 1 }, + { "SSCENABLE", 0, 1 }, + { "XGMAC_PORT_HSS_RXD_PH_ROTATOR_OFFSET_CTRL", 0x27b8c, 0 }, + { "RSNP", 11, 1 }, + { "TSOEN", 10, 1 }, + { "OFFEN", 9, 1 }, + { "TMSCAL", 7, 2 }, + { "APADJ", 6, 1 }, + { "RSEL", 5, 1 }, + { "PHOFFS", 0, 5 }, + { "XGMAC_PORT_HSS_RXD_PH_ROTATOR_POSITION1", 0x27b90, 0 }, + { "ROT0A", 8, 6 }, + { "RTSEL", 0, 6 }, + { "XGMAC_PORT_HSS_RXD_PH_ROTATOR_POSITION2", 0x27b94, 0 }, + { "XGMAC_PORT_HSS_RXD_PH_ROTATOR_STATIC_PH_OFFSET", 0x27b98, 0 }, + { "RCALER", 15, 1 }, + { "RAOOFF", 10, 5 }, + { "RAEOFF", 5, 5 }, + { "RDOFF", 0, 5 }, + { "XGMAC_PORT_HSS_RXD_SIGDET_CTRL", 0x27b9c, 0 }, + { "SIGNSD", 13, 2 }, + { "DACSD", 8, 5 }, + { "SDPDN", 6, 1 }, + { "SIGDET", 5, 1 }, + { "SDLVL", 0, 5 }, + { "XGMAC_PORT_HSS_RXD_DFE_CTRL", 0x27ba0, 0 }, + { "REQCMP", 15, 1 }, + { "DFEREQ", 14, 1 }, + { "SPCEN", 13, 1 }, + { "GATEEN", 12, 1 }, + { "SPIFMT", 9, 3 }, + { "DFEPWR", 6, 3 }, + { "STNDBY", 5, 1 }, + { "FRCH", 4, 1 }, + { "NONRND", 3, 1 }, + { "NONRNF", 2, 1 }, + { "FSTLCK", 1, 1 }, + { "DFERST", 0, 1 }, + { "XGMAC_PORT_HSS_RXD_DFE_DATA_EDGE_SAMPLE", 0x27ba4, 0 }, + { "ESAMP", 8, 8 }, + { "DSAMP", 0, 8 }, + { "XGMAC_PORT_HSS_RXD_DFE_AMP_SAMPLE", 0x27ba8, 0 }, + { "SMODE", 8, 4 }, + { "ADCORR", 7, 1 }, + { "TRAINEN", 6, 1 }, + { "ASAMPQ", 3, 3 }, + { "ASAMP", 0, 3 }, + { "XGMAC_PORT_HSS_RXD_VGA_CTRL1", 0x27bac, 0 }, + { "POLE", 12, 2 }, + { "PEAK", 8, 3 }, + { "VOFFSN", 6, 2 }, + { "VOFFA", 0, 6 }, + { "XGMAC_PORT_HSS_RXD_VGA_CTRL2", 0x27bb0, 0 }, + { "SHORTV", 10, 1 }, + { "VGAIN", 0, 4 }, + { "XGMAC_PORT_HSS_RXD_VGA_CTRL3", 0x27bb4, 0 }, + { "HBND1", 10, 1 }, + { "HBND0", 9, 1 }, + { "VLCKD", 8, 1 }, + { "VLCKDF", 7, 1 }, + { "AMAXT", 0, 7 }, + { "XGMAC_PORT_HSS_RXD_DFE_D00_D01_OFFSET", 0x27bb8, 0 }, + { "D01SN", 13, 2 }, + { "D01AMP", 8, 5 }, + { "D00SN", 5, 2 }, + { "D00AMP", 0, 5 }, + { "XGMAC_PORT_HSS_RXD_DFE_D10_D11_OFFSET", 0x27bbc, 0 }, + { "D11SN", 13, 2 }, + { "D11AMP", 8, 5 }, + { "D10SN", 5, 2 }, + { "D10AMP", 0, 5 }, + { "XGMAC_PORT_HSS_RXD_DFE_E0_E1_OFFSET", 0x27bc0, 0 }, + { "E1SN", 13, 2 }, + { "E1AMP", 8, 5 }, + { "E0SN", 5, 2 }, + { "E0AMP", 0, 5 }, + { "XGMAC_PORT_HSS_RXD_DACA_OFFSET", 0x27bc4, 0 }, + { "AOFFO", 8, 6 }, + { "AOFFE", 0, 6 }, + { "XGMAC_PORT_HSS_RXD_DACAP_DAC_AN_OFFSET", 0x27bc8, 0 }, + { "DACAN", 8, 8 }, + { "DACAP", 0, 8 }, + { "XGMAC_PORT_HSS_RXD_DACA_MIN", 0x27bcc, 0 }, + { "DACAZ", 8, 8 }, + { "DACAM", 0, 8 }, + { "XGMAC_PORT_HSS_RXD_ADAC_CTRL", 0x27bd0, 0 }, + { "ADSN", 7, 2 }, + { "ADMAG", 0, 7 }, + { "XGMAC_PORT_HSS_RXD_DIGITAL_EYE_CTRL", 0x27bd4, 0 }, + { "BLKAZ", 15, 1 }, + { "WIDTH", 10, 5 }, + { "MINWIDTH", 5, 5 }, + { "MINAMP", 0, 5 }, + { "XGMAC_PORT_HSS_RXD_DIGITAL_EYE_METRICS", 0x27bd8, 0 }, + { "EMBRDY", 10, 1 }, + { "EMBUMP", 7, 1 }, + { "EMMD", 5, 2 }, + { "EMPAT", 1, 1 }, + { "EMEN", 0, 1 }, + { "XGMAC_PORT_HSS_RXD_DFE_H1", 0x27bdc, 0 }, + { "H1OSN", 14, 2 }, + { "H1OMAG", 8, 6 }, + { "H1ESN", 6, 2 }, + { "H1EMAG", 0, 6 }, + { "XGMAC_PORT_HSS_RXD_DFE_H2", 0x27be0, 0 }, + { "H2OSN", 13, 2 }, + { "H2OMAG", 8, 5 }, + { "H2ESN", 5, 2 }, + { "H2EMAG", 0, 5 }, + { "XGMAC_PORT_HSS_RXD_DFE_H3", 0x27be4, 0 }, + { "H3OSN", 12, 2 }, + { "H3OMAG", 8, 4 }, + { "H3ESN", 4, 2 }, + { "H3EMAG", 0, 4 }, + { "XGMAC_PORT_HSS_RXD_DFE_H4", 0x27be8, 0 }, + { "H4OSN", 12, 2 }, + { "H4OMAG", 8, 4 }, + { "H4ESN", 4, 2 }, + { "H4EMAG", 0, 4 }, + { "XGMAC_PORT_HSS_RXD_DFE_H5", 0x27bec, 0 }, + { "H5OSN", 12, 2 }, + { "H5OMAG", 8, 4 }, + { "H5ESN", 4, 2 }, + { "H5EMAG", 0, 4 }, + { "XGMAC_PORT_HSS_RXD_DAC_DPC", 0x27bf0, 0 }, + { "DPCCVG", 13, 1 }, + { "DACCVG", 12, 1 }, + { "DPCTGT", 9, 3 }, + { "BLKH1T", 8, 1 }, + { "BLKOAE", 7, 1 }, + { "H1TGT", 4, 3 }, + { "OAE", 0, 4 }, + { "XGMAC_PORT_HSS_RXD_DDC", 0x27bf4, 0 }, + { "OLS", 11, 5 }, + { "OES", 6, 5 }, + { "BLKODEC", 5, 1 }, + { "ODEC", 0, 5 }, + { "XGMAC_PORT_HSS_RXD_INTERNAL_STATUS", 0x27bf8, 0 }, + { "BER6", 15, 1 }, + { "BER6VAL", 14, 1 }, + { "BER3VAL", 13, 1 }, + { "DPCCMP", 9, 1 }, + { "DACCMP", 8, 1 }, + { "DDCCMP", 7, 1 }, + { "AERRFLG", 6, 1 }, + { "WERRFLG", 5, 1 }, + { "TRCMP", 4, 1 }, + { "VLCKF", 3, 1 }, + { "ROCADJ", 2, 1 }, + { "ROCCMP", 1, 1 }, + { "OCCMP", 0, 1 }, + { "XGMAC_PORT_HSS_RXD_DFE_FUNC_CTRL", 0x27bfc, 0 }, + { "FDPC", 15, 1 }, + { "FDAC", 14, 1 }, + { "FDDC", 13, 1 }, + { "FNRND", 12, 1 }, + { "FVGAIN", 11, 1 }, + { "FVOFF", 10, 1 }, + { "FSDET", 9, 1 }, + { "FBER6", 8, 1 }, + { "FROTO", 7, 1 }, + { "FH4H5", 6, 1 }, + { "FH2H3", 5, 1 }, + { "FH1", 4, 1 }, + { "FH1SN", 3, 1 }, + { "FNRDF", 2, 1 }, + { "FADAC", 0, 1 }, + { "XGMAC_PORT_HSS_VCO_COARSE_CALIBRATION_0", 0x27c00, 0 }, + { "XGMAC_PORT_HSS_VCO_COARSE_CALIBRATION_1", 0x27c04, 0 }, + { "LDET", 4, 1 }, + { "CCERR", 3, 1 }, + { "CCCMP", 2, 1 }, + { "XGMAC_PORT_HSS_VCO_COARSE_CALIBRATION_2", 0x27c08, 0 }, + { "XGMAC_PORT_HSS_VCO_COARSE_CALIBRATION_3", 0x27c0c, 0 }, + { "VISEL", 4, 1 }, + { "FMIN", 3, 1 }, + { "FMAX", 2, 1 }, + { "CVHOLD", 1, 1 }, + { "TCDIS", 0, 1 }, + { "XGMAC_PORT_HSS_VCO_COARSE_CALIBRATION_4", 0x27c10, 0 }, + { "CMETH", 2, 1 }, + { "RECAL", 1, 1 }, + { "CCLD", 0, 1 }, + { "XGMAC_PORT_HSS_ANALOG_TEST_MUX", 0x27c14, 0 }, + { "XGMAC_PORT_HSS_PORT_EN_0", 0x27c18, 0 }, + { "RXDEN", 7, 1 }, + { "RXCEN", 6, 1 }, + { "TXDEN", 5, 1 }, + { "TXCEN", 4, 1 }, + { "RXBEN", 3, 1 }, + { "RXAEN", 2, 1 }, + { "TXBEN", 1, 1 }, + { "TXAEN", 0, 1 }, + { "XGMAC_PORT_HSS_PORT_RESET_0", 0x27c20, 0 }, + { "RXDRST", 7, 1 }, + { "RXCRST", 6, 1 }, + { "TXDRST", 5, 1 }, + { "TXCRST", 4, 1 }, + { "RXBRST", 3, 1 }, + { "RXARST", 2, 1 }, + { "TXBRST", 1, 1 }, + { "TXARST", 0, 1 }, + { "XGMAC_PORT_HSS_CHARGE_PUMP_CTRL", 0x27c28, 0 }, + { "ENCPIS", 2, 1 }, + { "CPISEL", 0, 2 }, + { "XGMAC_PORT_HSS_BAND_GAP_CTRL", 0x27c2c, 0 }, + { "XGMAC_PORT_HSS_LOFREQ_OVR", 0x27c30, 0 }, + { "LFREQ2", 3, 1 }, + { "LFREQ1", 2, 1 }, + { "LFREQO", 1, 1 }, + { "LFSEL", 0, 1 }, + { "XGMAC_PORT_HSS_VOLTAGE_BOOST_CTRL", 0x27c38, 0 }, + { "PFVAL", 2, 1 }, + { "PFEN", 1, 1 }, + { "VBADJ", 0, 1 }, + { "XGMAC_PORT_HSS_TX_MODE_CFG", 0x27c80, 0 }, + { "BWSEL", 2, 2 }, + { "RTSEL", 0, 2 }, + { "XGMAC_PORT_HSS_TXTEST_CTRL", 0x27c84, 0 }, + { "TWDP", 5, 1 }, + { "TPGRST", 4, 1 }, + { "TPGEN", 3, 1 }, + { "TPSEL", 0, 3 }, + { "XGMAC_PORT_HSS_TX_COEFF_CTRL", 0x27c88, 0 }, + { "AEINVPOL", 6, 1 }, + { "AESOURCE", 5, 1 }, + { "EQMODE", 4, 1 }, + { "OCOEF", 3, 1 }, + { "COEFRST", 2, 1 }, + { "SPEN", 1, 1 }, + { "ALOAD", 0, 1 }, + { "XGMAC_PORT_HSS_TX_DRIVER_MODE", 0x27c8c, 0 }, + { "DRVOFFT", 5, 1 }, + { "SLEW", 2, 3 }, + { "FFE", 0, 2 }, + { "XGMAC_PORT_HSS_TX_DRIVER_OVR_CTRL", 0x27c90, 0 }, + { "VLINC", 7, 1 }, + { "VLDEC", 6, 1 }, + { "LOPWR", 5, 1 }, + { "TDMEN", 4, 1 }, + { "DCCEN", 3, 1 }, + { "VHSEL", 2, 1 }, + { "IDAC", 0, 2 }, + { "XGMAC_PORT_HSS_TX_TDM_BIASGEN_STANDBY_TIMER", 0x27c94, 0 }, + { "XGMAC_PORT_HSS_TX_TDM_BIASGEN_PWRON_TIMER", 0x27c98, 0 }, + { "XGMAC_PORT_HSS_TX_TAP0_COEFF", 0x27ca0, 0 }, + { "XGMAC_PORT_HSS_TX_TAP1_COEFF", 0x27ca4, 0 }, + { "XGMAC_PORT_HSS_TX_TAP2_COEFF", 0x27ca8, 0 }, + { "XGMAC_PORT_HSS_TX_PWR", 0x27cb0, 0 }, + { "XGMAC_PORT_HSS_TX_POLARITY", 0x27cb4, 0 }, + { "TXPOL", 4, 3 }, + { "NTXPOL", 0, 3 }, + { "XGMAC_PORT_HSS_TX_8023AP_AE_CMD", 0x27cb8, 0 }, + { "CXPRESET", 13, 1 }, + { "CXINIT", 12, 1 }, + { "C2UPDT", 4, 2 }, + { "C1UPDT", 2, 2 }, + { "C0UPDT", 0, 2 }, + { "XGMAC_PORT_HSS_TX_8023AP_AE_STATUS", 0x27cbc, 0 }, + { "C2STAT", 4, 2 }, + { "C1STAT", 2, 2 }, + { "C0STAT", 0, 2 }, + { "XGMAC_PORT_HSS_TX_TAP0_IDAC_OVR", 0x27cc0, 0 }, + { "XGMAC_PORT_HSS_TX_TAP1_IDAC_OVR", 0x27cc4, 0 }, + { "XGMAC_PORT_HSS_TX_TAP2_IDAC_OVR", 0x27cc8, 0 }, + { "XGMAC_PORT_HSS_TX_PWR_DAC_OVR", 0x27cd0, 0 }, + { "OPEN", 7, 1 }, + { "OPVAL", 0, 5 }, + { "XGMAC_PORT_HSS_TX_PWR_DAC", 0x27cd4, 0 }, + { "XGMAC_PORT_HSS_TX_TAP0_IDAC_APP", 0x27ce0, 0 }, + { "XGMAC_PORT_HSS_TX_TAP1_IDAC_APP", 0x27ce4, 0 }, + { "XGMAC_PORT_HSS_TX_TAP2_IDAC_APP", 0x27ce8, 0 }, + { "XGMAC_PORT_HSS_TX_SEG_DIS_APP", 0x27cf0, 0 }, + { "XGMAC_PORT_HSS_TX_EXT_ADDR_DATA", 0x27cf8, 0 }, + { "XGMAC_PORT_HSS_TX_EXT_ADDR", 0x27cfc, 0 }, + { "XADDR", 2, 4 }, + { "XWR", 0, 1 }, + { "XGMAC_PORT_HSS_RX_CFG_MODE", 0x27d00, 0 }, + { "BW810", 8, 1 }, + { "AUXCLK", 7, 1 }, + { "DMSEL", 4, 3 }, + { "BWSEL", 2, 2 }, + { "RTSEL", 0, 2 }, + { "XGMAC_PORT_HSS_RXTEST_CTRL", 0x27d04, 0 }, + { "RCLKEN", 15, 1 }, + { "RRATE", 13, 2 }, + { "LBFRCERROR", 10, 1 }, + { "LBERROR", 9, 1 }, + { "LBSYNC", 8, 1 }, + { "FDWRAPCLK", 7, 1 }, + { "FDWRAP", 6, 1 }, + { "PRST", 4, 1 }, + { "PCHKEN", 3, 1 }, + { "PRBSSEL", 0, 3 }, + { "XGMAC_PORT_HSS_RX_PH_ROTATOR_CTRL", 0x27d08, 0 }, + { "FTHROT", 12, 4 }, + { "RTHROT", 11, 1 }, + { "FILTCTL", 7, 4 }, + { "RSRVO", 5, 2 }, + { "EXTEL", 4, 1 }, + { "RSTONSTUCK", 3, 1 }, + { "FREEZEFW", 2, 1 }, + { "RESETFW", 1, 1 }, + { "SSCENABLE", 0, 1 }, + { "XGMAC_PORT_HSS_RX_PH_ROTATOR_OFFSET_CTRL", 0x27d0c, 0 }, + { "RSNP", 11, 1 }, + { "TSOEN", 10, 1 }, + { "OFFEN", 9, 1 }, + { "TMSCAL", 7, 2 }, + { "APADJ", 6, 1 }, + { "RSEL", 5, 1 }, + { "PHOFFS", 0, 5 }, + { "XGMAC_PORT_HSS_RX_PH_ROTATOR_POSITION1", 0x27d10, 0 }, + { "ROT0A", 8, 6 }, + { "RTSEL", 0, 6 }, + { "XGMAC_PORT_HSS_RX_PH_ROTATOR_POSITION2", 0x27d14, 0 }, + { "XGMAC_PORT_HSS_RX_PH_ROTATOR_STATIC_PH_OFFSET", 0x27d18, 0 }, + { "RCALER", 15, 1 }, + { "RAOOFF", 10, 5 }, + { "RAEOFF", 5, 5 }, + { "RDOFF", 0, 5 }, + { "XGMAC_PORT_HSS_RX_SIGDET_CTRL", 0x27d1c, 0 }, + { "SIGNSD", 13, 2 }, + { "DACSD", 8, 5 }, + { "SDPDN", 6, 1 }, + { "SIGDET", 5, 1 }, + { "SDLVL", 0, 5 }, + { "XGMAC_PORT_HSS_RX_DFE_CTRL", 0x27d20, 0 }, + { "REQCMP", 15, 1 }, + { "DFEREQ", 14, 1 }, + { "SPCEN", 13, 1 }, + { "GATEEN", 12, 1 }, + { "SPIFMT", 9, 3 }, + { "DFEPWR", 6, 3 }, + { "STNDBY", 5, 1 }, + { "FRCH", 4, 1 }, + { "NONRND", 3, 1 }, + { "NONRNF", 2, 1 }, + { "FSTLCK", 1, 1 }, + { "DFERST", 0, 1 }, + { "XGMAC_PORT_HSS_RX_DFE_DATA_EDGE_SAMPLE", 0x27d24, 0 }, + { "ESAMP", 8, 8 }, + { "DSAMP", 0, 8 }, + { "XGMAC_PORT_HSS_RX_DFE_AMP_SAMPLE", 0x27d28, 0 }, + { "SMODE", 8, 4 }, + { "ADCORR", 7, 1 }, + { "TRAINEN", 6, 1 }, + { "ASAMPQ", 3, 3 }, + { "ASAMP", 0, 3 }, + { "XGMAC_PORT_HSS_RX_VGA_CTRL1", 0x27d2c, 0 }, + { "POLE", 12, 2 }, + { "PEAK", 8, 3 }, + { "VOFFSN", 6, 2 }, + { "VOFFA", 0, 6 }, + { "XGMAC_PORT_HSS_RX_VGA_CTRL2", 0x27d30, 0 }, + { "SHORTV", 10, 1 }, + { "VGAIN", 0, 4 }, + { "XGMAC_PORT_HSS_RX_VGA_CTRL3", 0x27d34, 0 }, + { "HBND1", 10, 1 }, + { "HBND0", 9, 1 }, + { "VLCKD", 8, 1 }, + { "VLCKDF", 7, 1 }, + { "AMAXT", 0, 7 }, + { "XGMAC_PORT_HSS_RX_DFE_D00_D01_OFFSET", 0x27d38, 0 }, + { "D01SN", 13, 2 }, + { "D01AMP", 8, 5 }, + { "D00SN", 5, 2 }, + { "D00AMP", 0, 5 }, + { "XGMAC_PORT_HSS_RX_DFE_D10_D11_OFFSET", 0x27d3c, 0 }, + { "D11SN", 13, 2 }, + { "D11AMP", 8, 5 }, + { "D10SN", 5, 2 }, + { "D10AMP", 0, 5 }, + { "XGMAC_PORT_HSS_RX_DFE_E0_E1_OFFSET", 0x27d40, 0 }, + { "E1SN", 13, 2 }, + { "E1AMP", 8, 5 }, + { "E0SN", 5, 2 }, + { "E0AMP", 0, 5 }, + { "XGMAC_PORT_HSS_RX_DACA_OFFSET", 0x27d44, 0 }, + { "AOFFO", 8, 6 }, + { "AOFFE", 0, 6 }, + { "XGMAC_PORT_HSS_RX_DACAP_DAC_AN_OFFSET", 0x27d48, 0 }, + { "DACAN", 8, 8 }, + { "DACAP", 0, 8 }, + { "XGMAC_PORT_HSS_RX_DACA_MIN", 0x27d4c, 0 }, + { "DACAZ", 8, 8 }, + { "DACAM", 0, 8 }, + { "XGMAC_PORT_HSS_RX_ADAC_CTRL", 0x27d50, 0 }, + { "ADSN", 7, 2 }, + { "ADMAG", 0, 7 }, + { "XGMAC_PORT_HSS_RX_DIGITAL_EYE_CTRL", 0x27d54, 0 }, + { "BLKAZ", 15, 1 }, + { "WIDTH", 10, 5 }, + { "MINWIDTH", 5, 5 }, + { "MINAMP", 0, 5 }, + { "XGMAC_PORT_HSS_RX_DIGITAL_EYE_METRICS", 0x27d58, 0 }, + { "EMBRDY", 10, 1 }, + { "EMBUMP", 7, 1 }, + { "EMMD", 5, 2 }, + { "EMPAT", 1, 1 }, + { "EMEN", 0, 1 }, + { "XGMAC_PORT_HSS_RX_DFE_H1", 0x27d5c, 0 }, + { "H1OSN", 14, 2 }, + { "H1OMAG", 8, 6 }, + { "H1ESN", 6, 2 }, + { "H1EMAG", 0, 6 }, + { "XGMAC_PORT_HSS_RX_DFE_H2", 0x27d60, 0 }, + { "H2OSN", 13, 2 }, + { "H2OMAG", 8, 5 }, + { "H2ESN", 5, 2 }, + { "H2EMAG", 0, 5 }, + { "XGMAC_PORT_HSS_RX_DFE_H3", 0x27d64, 0 }, + { "H3OSN", 12, 2 }, + { "H3OMAG", 8, 4 }, + { "H3ESN", 4, 2 }, + { "H3EMAG", 0, 4 }, + { "XGMAC_PORT_HSS_RX_DFE_H4", 0x27d68, 0 }, + { "H4OSN", 12, 2 }, + { "H4OMAG", 8, 4 }, + { "H4ESN", 4, 2 }, + { "H4EMAG", 0, 4 }, + { "XGMAC_PORT_HSS_RX_DFE_H5", 0x27d6c, 0 }, + { "H5OSN", 12, 2 }, + { "H5OMAG", 8, 4 }, + { "H5ESN", 4, 2 }, + { "H5EMAG", 0, 4 }, + { "XGMAC_PORT_HSS_RX_DAC_DPC", 0x27d70, 0 }, + { "DPCCVG", 13, 1 }, + { "DACCVG", 12, 1 }, + { "DPCTGT", 9, 3 }, + { "BLKH1T", 8, 1 }, + { "BLKOAE", 7, 1 }, + { "H1TGT", 4, 3 }, + { "OAE", 0, 4 }, + { "XGMAC_PORT_HSS_RX_DDC", 0x27d74, 0 }, + { "OLS", 11, 5 }, + { "OES", 6, 5 }, + { "BLKODEC", 5, 1 }, + { "ODEC", 0, 5 }, + { "XGMAC_PORT_HSS_RX_INTERNAL_STATUS", 0x27d78, 0 }, + { "BER6", 15, 1 }, + { "BER6VAL", 14, 1 }, + { "BER3VAL", 13, 1 }, + { "DPCCMP", 9, 1 }, + { "DACCMP", 8, 1 }, + { "DDCCMP", 7, 1 }, + { "AERRFLG", 6, 1 }, + { "WERRFLG", 5, 1 }, + { "TRCMP", 4, 1 }, + { "VLCKF", 3, 1 }, + { "ROCADJ", 2, 1 }, + { "ROCCMP", 1, 1 }, + { "OCCMP", 0, 1 }, + { "XGMAC_PORT_HSS_RX_DFE_FUNC_CTRL", 0x27d7c, 0 }, + { "FDPC", 15, 1 }, + { "FDAC", 14, 1 }, + { "FDDC", 13, 1 }, + { "FNRND", 12, 1 }, + { "FVGAIN", 11, 1 }, + { "FVOFF", 10, 1 }, + { "FSDET", 9, 1 }, + { "FBER6", 8, 1 }, + { "FROTO", 7, 1 }, + { "FH4H5", 6, 1 }, + { "FH2H3", 5, 1 }, + { "FH1", 4, 1 }, + { "FH1SN", 3, 1 }, + { "FNRDF", 2, 1 }, + { "FADAC", 0, 1 }, + { "XGMAC_PORT_HSS_TXRX_CFG_MODE", 0x27e00, 0 }, + { "BW810", 8, 1 }, + { "AUXCLK", 7, 1 }, + { "DMSEL", 4, 3 }, + { "BWSEL", 2, 2 }, + { "RTSEL", 0, 2 }, + { "XGMAC_PORT_HSS_TXRXTEST_CTRL", 0x27e04, 0 }, + { "RCLKEN", 15, 1 }, + { "RRATE", 13, 2 }, + { "LBFRCERROR", 10, 1 }, + { "LBERROR", 9, 1 }, + { "LBSYNC", 8, 1 }, + { "FDWRAPCLK", 7, 1 }, + { "FDWRAP", 6, 1 }, + { "PRST", 4, 1 }, + { "PCHKEN", 3, 1 }, + { "PRBSSEL", 0, 3 }, + { NULL, 0, 0 } +}; diff --git a/tools/tools/cxgbetool/reg_defs_t4vf.c b/tools/tools/cxgbetool/reg_defs_t4vf.c new file mode 100644 index 0000000..6ebd731 --- /dev/null +++ b/tools/tools/cxgbetool/reg_defs_t4vf.c @@ -0,0 +1,122 @@ +/* + * This file is _NOT_ automatically generated. It must agree with the + * Virtual Function register map definitions in t4vf_defs.h in the common + * code. + */ +__FBSDID("$FreeBSD$"); + +struct reg_info t4vf_sge_regs[] = { + { "SGE_KDOORBELL", 0x000, 0 }, + { "QID", 15, 17 }, + { "Priority", 14, 1 }, + { "PIDX", 0, 14 }, + { "SGE_GTS", 0x004, 0 }, + { "IngressQID", 16, 16 }, + { "TimerReg", 13, 3 }, + { "SEIntArm", 12, 1 }, + { "CIDXInc", 0, 12 }, + + { NULL, 0, 0 } +}; + +struct reg_info t4vf_mps_regs[] = { + { "MPS_VF_CTL", 0x100, 0 }, + { "TxEn", 1, 1 }, + { "RxEn", 0, 1 }, + + { "MPS_VF_STAT_TX_VF_BCAST_BYTES_L", 0x180, 0 }, + { "MPS_VF_STAT_TX_VF_BCAST_BYTES_H", 0x184, 0 }, + { "MPS_VF_STAT_TX_VF_BCAST_FRAMES_L", 0x188, 0 }, + { "MPS_VF_STAT_TX_VF_BCAST_FRAMES_H", 0x18c, 0 }, + + { "MPS_VF_STAT_TX_VF_MCAST_BYTES_L", 0x190, 0 }, + { "MPS_VF_STAT_TX_VF_MCAST_BYTES_H", 0x194, 0 }, + { "MPS_VF_STAT_TX_VF_MCAST_FRAMES_L", 0x198, 0 }, + { "MPS_VF_STAT_TX_VF_MCAST_FRAMES_H", 0x19c, 0 }, + + { "MPS_VF_STAT_TX_VF_UCAST_BYTES_L", 0x1a0, 0 }, + { "MPS_VF_STAT_TX_VF_UCAST_BYTES_H", 0x1a4, 0 }, + { "MPS_VF_STAT_TX_VF_UCAST_FRAMES_L", 0x1a8, 0 }, + { "MPS_VF_STAT_TX_VF_UCAST_FRAMES_H", 0x1ac, 0 }, + + { "MPS_VF_STAT_TX_VF_DROP_FRAMES_L", 0x1b0, 0 }, + { "MPS_VF_STAT_TX_VF_DROP_FRAMES_H", 0x1b4, 0 }, + + { "MPS_VF_STAT_TX_VF_OFFLOAD_BYTES_L", 0x1b8, 0 }, + { "MPS_VF_STAT_TX_VF_OFFLOAD_BYTES_H", 0x1bc, 0 }, + { "MPS_VF_STAT_TX_VF_OFFLOAD_FRAMES_L", 0x1c0, 0 }, + { "MPS_VF_STAT_TX_VF_OFFLOAD_FRAMES_H", 0x1c4, 0 }, + + { "MPS_VF_STAT_RX_VF_BCAST_BYTES_L", 0x1c8, 0 }, + { "MPS_VF_STAT_RX_VF_BCAST_BYTES_H", 0x1cc, 0 }, + { "MPS_VF_STAT_RX_VF_BCAST_FRAMES_L", 0x1d0, 0 }, + { "MPS_VF_STAT_RX_VF_BCAST_FRAMES_H", 0x1d4, 0 }, + + { "MPS_VF_STAT_RX_VF_MCAST_BYTES_L", 0x1d8, 0 }, + { "MPS_VF_STAT_RX_VF_MCAST_BYTES_H", 0x1dc, 0 }, + { "MPS_VF_STAT_RX_VF_MCAST_FRAMES_L", 0x1e0, 0 }, + { "MPS_VF_STAT_RX_VF_MCAST_FRAMES_H", 0x1e4, 0 }, + + { "MPS_VF_STAT_RX_VF_UCAST_BYTES_L", 0x1e8, 0 }, + { "MPS_VF_STAT_RX_VF_UCAST_BYTES_H", 0x1ec, 0 }, + { "MPS_VF_STAT_RX_VF_UCAST_FRAMES_L", 0x1f0, 0 }, + { "MPS_VF_STAT_RX_VF_UCAST_FRAMES_H", 0x1f4, 0 }, + + { "MPS_VF_STAT_RX_VF_ERR_FRAMES_L", 0x1f8, 0 }, + { "MPS_VF_STAT_RX_VF_ERR_FRAMES_H", 0x1fc, 0 }, + + { NULL, 0, 0 } +}; + +struct reg_info t4vf_pl_regs[] = { + { "PL_VF_WHOAMI", 0x200, 0 }, + { "PortxMap", 5, 3 }, + { "SourceBus", 3, 2 }, + { "SourcePF", 0, 3 }, + + { NULL, 0, 0 } +}; + +struct reg_info t4vf_cim_regs[] = { + /* + * Note: the Mailbox Control register has read side-effects so + * the driver simply returns 0xffff for this register. + */ + { "CIM_VF_EXT_MAILBOX_CTRL", 0x300, 0 }, + { "MBGeneric", 4, 4 }, + { "MBMsgValid", 3, 1 }, + { "MBIntReq", 3, 1 }, + { "MBOwner", 0, 2 }, + { "CIM_VF_EXT_MAILBOX_STATUS", 0x304, 0 }, + { "MBVFReady", 0, 1 }, + + { NULL, 0, 0 } +}; + +struct reg_info t4vf_mbdata_regs[] = { + { "CIM_VF_EXT_MAILBOX_DATA_00", 0x240, 0 }, + { "Return", 8, 8 }, + { "Length16", 0, 8 }, + { "CIM_VF_EXT_MAILBOX_DATA_04", 0x244, 0 }, + { "OpCode", 24, 8 }, + { "Request", 23, 1 }, + { "Read", 22, 1 }, + { "Write", 21, 1 }, + { "Execute", 20, 1 }, + { "CIM_VF_EXT_MAILBOX_DATA_08", 0x248, 0 }, + { "CIM_VF_EXT_MAILBOX_DATA_0c", 0x24c, 0 }, + { "CIM_VF_EXT_MAILBOX_DATA_10", 0x250, 0 }, + { "CIM_VF_EXT_MAILBOX_DATA_14", 0x254, 0 }, + { "CIM_VF_EXT_MAILBOX_DATA_18", 0x258, 0 }, + { "CIM_VF_EXT_MAILBOX_DATA_1c", 0x25c, 0 }, + { "CIM_VF_EXT_MAILBOX_DATA_20", 0x260, 0 }, + { "CIM_VF_EXT_MAILBOX_DATA_24", 0x264, 0 }, + { "CIM_VF_EXT_MAILBOX_DATA_28", 0x268, 0 }, + { "CIM_VF_EXT_MAILBOX_DATA_2c", 0x26c, 0 }, + { "CIM_VF_EXT_MAILBOX_DATA_30", 0x270, 0 }, + { "CIM_VF_EXT_MAILBOX_DATA_34", 0x274, 0 }, + { "CIM_VF_EXT_MAILBOX_DATA_38", 0x278, 0 }, + { "CIM_VF_EXT_MAILBOX_DATA_3c", 0x27c, 0 }, + + { NULL, 0, 0 } +}; diff --git a/usr.sbin/mfiutil/mfi_config.c b/usr.sbin/mfiutil/mfi_config.c index fdda117..f1e6516 100644 --- a/usr.sbin/mfiutil/mfi_config.c +++ b/usr.sbin/mfiutil/mfi_config.c @@ -85,6 +85,7 @@ mfi_config_read(int fd, struct mfi_config_data **configp) { struct mfi_config_data *config; uint32_t config_size; + int error; /* * Keep fetching the config in a loop until we have a large enough @@ -97,8 +98,12 @@ fetch: if (config == NULL) return (-1); if (mfi_dcmd_command(fd, MFI_DCMD_CFG_READ, config, - config_size, NULL, 0, NULL) < 0) + config_size, NULL, 0, NULL) < 0) { + error = errno; + free(config); + errno = error; return (-1); + } if (config->size > config_size) { config_size = config->size; @@ -162,12 +167,14 @@ clear_config(int ac, char **av) if (!mfi_reconfig_supported()) { warnx("The current mfi(4) driver does not support " "configuration changes."); + close(fd); return (EOPNOTSUPP); } if (mfi_ld_get_list(fd, &list, NULL) < 0) { error = errno; warn("Failed to get volume list"); + close(fd); return (error); } @@ -175,6 +182,7 @@ clear_config(int ac, char **av) if (mfi_volume_busy(fd, list.ld_list[i].ld.v.target_id)) { warnx("Volume %s is busy and cannot be deleted", mfi_volume_name(fd, list.ld_list[i].ld.v.target_id)); + close(fd); return (EBUSY); } } @@ -185,12 +193,14 @@ clear_config(int ac, char **av) ch = getchar(); if (ch != 'y' && ch != 'Y') { printf("\nAborting\n"); + close(fd); return (0); } if (mfi_dcmd_command(fd, MFI_DCMD_CFG_CLEAR, NULL, 0, NULL, 0, NULL) < 0) { error = errno; warn("Failed to clear configuration"); + close(fd); return (error); } @@ -336,17 +346,21 @@ parse_array(int fd, int raid_type, char *array_str, struct array_info *info) for (pinfo = info->drives; (cp = strsep(&array_str, ",")) != NULL; pinfo++) { error = mfi_lookup_drive(fd, cp, &device_id); - if (error) + if (error) { + free(info->drives); return (error); + } if (mfi_pd_get_info(fd, device_id, pinfo, NULL) < 0) { error = errno; warn("Failed to fetch drive info for drive %s", cp); + free(info->drives); return (error); } if (pinfo->fw_state != MFI_PD_STATE_UNCONFIGURED_GOOD) { warnx("Drive %u is not available", device_id); + free(info->drives); return (EINVAL); } } @@ -551,7 +565,12 @@ create_volume(int ac, char **av) return (EINVAL); } - + bzero(&state, sizeof(state)); + config = NULL; + arrays = NULL; + narrays = 0; + error = 0; + fd = mfi_open(mfi_unit); if (fd < 0) { error = errno; @@ -562,7 +581,8 @@ create_volume(int ac, char **av) if (!mfi_reconfig_supported()) { warnx("The current mfi(4) driver does not support " "configuration changes."); - return (EOPNOTSUPP); + error = EOPNOTSUPP; + goto error; } /* Lookup the RAID type first. */ @@ -575,7 +595,8 @@ create_volume(int ac, char **av) if (raid_type == -1) { warnx("Unknown or unsupported volume type %s", av[1]); - return (EINVAL); + error = EINVAL; + goto error; } /* Parse any options. */ @@ -603,7 +624,8 @@ create_volume(int ac, char **av) break; case '?': default: - return (EINVAL); + error = EINVAL; + goto error; } } ac -= optind; @@ -613,7 +635,8 @@ create_volume(int ac, char **av) narrays = ac; if (narrays == 0) { warnx("At least one drive list is required"); - return (EINVAL); + error = EINVAL; + goto error; } switch (raid_type) { case RT_RAID0: @@ -623,7 +646,8 @@ create_volume(int ac, char **av) case RT_CONCAT: if (narrays != 1) { warnx("Only one drive list can be specified"); - return (EINVAL); + error = EINVAL; + goto error; } break; case RT_RAID10: @@ -632,24 +656,27 @@ create_volume(int ac, char **av) if (narrays < 1) { warnx("RAID10, RAID50, and RAID60 require at least " "two drive lists"); - return (EINVAL); + error = EINVAL; + goto error; } if (narrays > MFI_MAX_SPAN_DEPTH) { warnx("Volume spans more than %d arrays", MFI_MAX_SPAN_DEPTH); - return (EINVAL); + error = EINVAL; + goto error; } break; } arrays = calloc(narrays, sizeof(*arrays)); if (arrays == NULL) { warnx("malloc failed"); - return (ENOMEM); + error = ENOMEM; + goto error; } for (i = 0; i < narrays; i++) { error = parse_array(fd, raid_type, av[i], &arrays[i]); if (error) - return (error); + goto error; } switch (raid_type) { @@ -660,7 +687,8 @@ create_volume(int ac, char **av) if (arrays[i].drive_count != arrays[0].drive_count) { warnx("All arrays must contain the same " "number of drives"); - return (EINVAL); + error = EINVAL; + goto error; } } break; @@ -673,7 +701,7 @@ create_volume(int ac, char **av) if (mfi_config_read(fd, &config) < 0) { error = errno; warn("Failed to read configuration"); - return (error); + goto error; } p = (char *)config->array; state.array_ref = 0xffff; @@ -683,7 +711,8 @@ create_volume(int ac, char **av) state.arrays = calloc(config->array_count, sizeof(int)); if (state.arrays == NULL) { warnx("malloc failed"); - return (ENOMEM); + error = ENOMEM; + goto error; } for (i = 0; i < config->array_count; i++) { ar = (struct mfi_array *)p; @@ -699,7 +728,8 @@ create_volume(int ac, char **av) state.volumes = calloc(config->log_drv_count, sizeof(int)); if (state.volumes == NULL) { warnx("malloc failed"); - return (ENOMEM); + error = ENOMEM; + goto error; } for (i = 0; i < config->log_drv_count; i++) { ld = (struct mfi_ld_config *)p; @@ -739,7 +769,8 @@ create_volume(int ac, char **av) config = calloc(1, config_size); if (config == NULL) { warnx("malloc failed"); - return (ENOMEM); + error = ENOMEM; + goto error; } config->size = config_size; config->array_count = narrays; @@ -776,21 +807,20 @@ create_volume(int ac, char **av) NULL, 0, NULL) < 0) { error = errno; warn("Failed to add volume"); - return (error); + /* FALLTHROUGH */ } +error: /* Clean up. */ free(config); - if (state.log_drv_count > 0) - free(state.volumes); - if (state.array_count > 0) - free(state.arrays); + free(state.volumes); + free(state.arrays); for (i = 0; i < narrays; i++) free(arrays[i].drives); free(arrays); close(fd); - return (0); + return (error); } MFI_COMMAND(top, create, create_volume); @@ -831,24 +861,28 @@ delete_volume(int ac, char **av) if (!mfi_reconfig_supported()) { warnx("The current mfi(4) driver does not support " "configuration changes."); + close(fd); return (EOPNOTSUPP); } if (mfi_lookup_volume(fd, av[1], &target_id) < 0) { error = errno; warn("Invalid volume %s", av[1]); + close(fd); return (error); } if (mfi_ld_get_info(fd, target_id, &info, NULL) < 0) { error = errno; warn("Failed to get info for volume %d", target_id); + close(fd); return (error); } if (mfi_volume_busy(fd, target_id)) { warnx("Volume %s is busy and cannot be deleted", mfi_volume_name(fd, target_id)); + close(fd); return (EBUSY); } @@ -857,6 +891,7 @@ delete_volume(int ac, char **av) sizeof(mbox), NULL) < 0) { error = errno; warn("Failed to delete volume"); + close(fd); return (error); } @@ -891,40 +926,44 @@ add_spare(int ac, char **av) return (error); } + config = NULL; + spare = NULL; error = mfi_lookup_drive(fd, av[1], &device_id); if (error) - return (error); + goto error; if (mfi_pd_get_info(fd, device_id, &info, NULL) < 0) { error = errno; warn("Failed to fetch drive info"); - return (error); + goto error; } if (info.fw_state != MFI_PD_STATE_UNCONFIGURED_GOOD) { warnx("Drive %u is not available", device_id); - return (EINVAL); + error = EINVAL; + goto error; } if (ac > 2) { if (mfi_lookup_volume(fd, av[2], &target_id) < 0) { error = errno; warn("Invalid volume %s", av[2]); - return (error); + goto error; } } if (mfi_config_read(fd, &config) < 0) { error = errno; warn("Failed to read configuration"); - return (error); + goto error; } spare = malloc(sizeof(struct mfi_spare) + sizeof(uint16_t) * config->array_count); if (spare == NULL) { warnx("malloc failed"); - return (ENOMEM); + error = ENOMEM; + goto error; } bzero(spare, sizeof(struct mfi_spare)); spare->ref = info.ref; @@ -937,7 +976,8 @@ add_spare(int ac, char **av) if (ar->size > info.coerced_size) { warnx("Spare isn't large enough for array %u", ar->array_ref); - return (EINVAL); + error = EINVAL; + goto error; } p += config->array_size; } @@ -950,7 +990,8 @@ add_spare(int ac, char **av) ld = mfi_config_lookup_volume(config, target_id); if (ld == NULL) { warnx("Did not find volume %d", target_id); - return (EINVAL); + error = EINVAL; + goto error; } spare->spare_type |= MFI_SPARE_DEDICATED; @@ -960,29 +1001,33 @@ add_spare(int ac, char **av) ld->span[i].array_ref); if (ar == NULL) { warnx("Missing array; inconsistent config?"); - return (ENXIO); + error = ENXIO; + goto error; } if (ar->size > info.coerced_size) { warnx("Spare isn't large enough for array %u", ar->array_ref); - return (EINVAL); + error = EINVAL; + goto error; } spare->array_ref[i] = ar->array_ref; } } - free(config); if (mfi_dcmd_command(fd, MFI_DCMD_CFG_MAKE_SPARE, spare, sizeof(struct mfi_spare) + sizeof(uint16_t) * spare->array_count, NULL, 0, NULL) < 0) { error = errno; warn("Failed to assign spare"); - return (error); + /* FALLTHROUGH. */ } +error: + free(spare); + free(config); close(fd); - return (0); + return (error); } MFI_COMMAND(top, add, add_spare); @@ -1007,18 +1052,22 @@ remove_spare(int ac, char **av) } error = mfi_lookup_drive(fd, av[1], &device_id); - if (error) + if (error) { + close(fd); return (error); + } /* Get the info for this drive. */ if (mfi_pd_get_info(fd, device_id, &info, NULL) < 0) { error = errno; warn("Failed to fetch info for drive %u", device_id); + close(fd); return (error); } if (info.fw_state != MFI_PD_STATE_HOT_SPARE) { warnx("Drive %u is not a hot spare", device_id); + close(fd); return (EINVAL); } @@ -1027,6 +1076,7 @@ remove_spare(int ac, char **av) sizeof(mbox), NULL) < 0) { error = errno; warn("Failed to delete spare"); + close(fd); return (error); } @@ -1151,6 +1201,7 @@ debug_config(int ac, char **av) if (mfi_config_read(fd, &config) < 0) { error = errno; warn("Failed to get config"); + close(fd); return (error); } @@ -1190,17 +1241,21 @@ dump(int ac, char **av) warn("Failed to read debug command"); if (error == ENOENT) error = EOPNOTSUPP; + close(fd); return (error); } config = malloc(len); if (config == NULL) { warnx("malloc failed"); + close(fd); return (ENOMEM); } if (sysctlbyname(buf, config, &len, NULL, 0) < 0) { error = errno; warn("Failed to read debug command"); + free(config); + close(fd); return (error); } dump_config(fd, config); diff --git a/usr.sbin/mfiutil/mfi_drive.c b/usr.sbin/mfiutil/mfi_drive.c index 75c4a53..5c2ab5d 100644 --- a/usr.sbin/mfiutil/mfi_drive.c +++ b/usr.sbin/mfiutil/mfi_drive.c @@ -310,19 +310,23 @@ drive_set_state(char *drive, uint16_t new_state) } error = mfi_lookup_drive(fd, drive, &device_id); - if (error) + if (error) { + close(fd); return (error); + } /* Get the info for this drive. */ if (mfi_pd_get_info(fd, device_id, &info, NULL) < 0) { error = errno; warn("Failed to fetch info for drive %u", device_id); + close(fd); return (error); } /* Try to change the state. */ if (info.fw_state == new_state) { warnx("Drive %u is already in the desired state", device_id); + close(fd); return (EINVAL); } @@ -334,6 +338,7 @@ drive_set_state(char *drive, uint16_t new_state) error = errno; warn("Failed to set drive %u to %s", device_id, mfi_pdstate(new_state)); + close(fd); return (error); } @@ -406,19 +411,23 @@ start_rebuild(int ac, char **av) } error = mfi_lookup_drive(fd, av[1], &device_id); - if (error) + if (error) { + close(fd); return (error); + } /* Get the info for this drive. */ if (mfi_pd_get_info(fd, device_id, &info, NULL) < 0) { error = errno; warn("Failed to fetch info for drive %u", device_id); + close(fd); return (error); } /* Check the state, must be REBUILD. */ if (info.fw_state != MFI_PD_STATE_REBUILD) { warnx("Drive %d is not in the REBUILD state", device_id); + close(fd); return (EINVAL); } @@ -428,6 +437,7 @@ start_rebuild(int ac, char **av) NULL) < 0) { error = errno; warn("Failed to start rebuild on drive %u", device_id); + close(fd); return (error); } close(fd); @@ -458,19 +468,23 @@ abort_rebuild(int ac, char **av) } error = mfi_lookup_drive(fd, av[1], &device_id); - if (error) + if (error) { + close(fd); return (error); + } /* Get the info for this drive. */ if (mfi_pd_get_info(fd, device_id, &info, NULL) < 0) { error = errno; warn("Failed to fetch info for drive %u", device_id); + close(fd); return (error); } /* Check the state, must be REBUILD. */ if (info.fw_state != MFI_PD_STATE_REBUILD) { warn("Drive %d is not in the REBUILD state", device_id); + close(fd); return (EINVAL); } @@ -480,6 +494,7 @@ abort_rebuild(int ac, char **av) NULL) < 0) { error = errno; warn("Failed to abort rebuild on drive %u", device_id); + close(fd); return (error); } close(fd); @@ -509,13 +524,16 @@ drive_progress(int ac, char **av) } error = mfi_lookup_drive(fd, av[1], &device_id); - if (error) + if (error) { + close(fd); return (error); + } /* Get the info for this drive. */ if (mfi_pd_get_info(fd, device_id, &info, NULL) < 0) { error = errno; warn("Failed to fetch info for drive %u", device_id); + close(fd); return (error); } close(fd); @@ -570,13 +588,16 @@ drive_clear(int ac, char **av) } error = mfi_lookup_drive(fd, av[1], &device_id); - if (error) + if (error) { + close(fd); return (error); + } /* Get the info for this drive. */ if (mfi_pd_get_info(fd, device_id, &info, NULL) < 0) { error = errno; warn("Failed to fetch info for drive %u", device_id); + close(fd); return (error); } @@ -586,6 +607,7 @@ drive_clear(int ac, char **av) warn("Failed to %s clear on drive %u", opcode == MFI_DCMD_PD_CLEAR_START ? "start" : "stop", device_id); + close(fd); return (error); } @@ -626,8 +648,10 @@ drive_locate(int ac, char **av) } error = mfi_lookup_drive(fd, av[1], &device_id); - if (error) + if (error) { + close(fd); return (error); + } mbox_store_device_id(&mbox[0], device_id); @@ -638,6 +662,7 @@ drive_locate(int ac, char **av) warn("Failed to %s locate on drive %u", opcode == MFI_DCMD_PD_LOCATE_START ? "start" : "stop", device_id); + close(fd); return (error); } close(fd); diff --git a/usr.sbin/mfiutil/mfi_evt.c b/usr.sbin/mfiutil/mfi_evt.c index a8a8775..336fbd3 100644 --- a/usr.sbin/mfiutil/mfi_evt.c +++ b/usr.sbin/mfiutil/mfi_evt.c @@ -83,6 +83,7 @@ show_logstate(int ac, char **av) if (mfi_event_get_info(fd, &info, NULL) < 0) { error = errno; warn("Failed to get event log info"); + close(fd); return (error); } @@ -550,6 +551,7 @@ show_events(int ac, char **av) if (mfi_event_get_info(fd, &info, NULL) < 0) { error = errno; warn("Failed to get event log info"); + close(fd); return (error); } @@ -570,6 +572,7 @@ show_events(int ac, char **av) if (parse_class(optarg, &filter.members.evt_class) < 0) { error = errno; warn("Error parsing event class"); + close(fd); return (error); } break; @@ -577,6 +580,7 @@ show_events(int ac, char **av) if (parse_locale(optarg, &filter.members.locale) < 0) { error = errno; warn("Error parsing event locale"); + close(fd); return (error); } break; @@ -584,6 +588,7 @@ show_events(int ac, char **av) val = strtol(optarg, &cp, 0); if (*cp != '\0' || val <= 0) { warnx("Invalid event count"); + close(fd); return (EINVAL); } num_events = val; @@ -593,6 +598,7 @@ show_events(int ac, char **av) break; case '?': default: + close(fd); return (EINVAL); } } @@ -604,28 +610,33 @@ show_events(int ac, char **av) (num_events - 1); if (size > getpagesize()) { warnx("Event count is too high"); + close(fd); return (EINVAL); } /* Handle optional start and stop sequence numbers. */ if (ac > 2) { warnx("show events: extra arguments"); + close(fd); return (EINVAL); } if (ac > 0 && parse_seq(&info, av[0], &start) < 0) { error = errno; warn("Error parsing starting sequence number"); + close(fd); return (error); } if (ac > 1 && parse_seq(&info, av[1], &stop) < 0) { error = errno; warn("Error parsing ending sequence number"); + close(fd); return (error); } list = malloc(size); if (list == NULL) { warnx("malloc failed"); + close(fd); return (ENOMEM); } for (seq = start;;) { @@ -633,6 +644,8 @@ show_events(int ac, char **av) &status) < 0) { error = errno; warn("Failed to fetch events"); + free(list); + close(fd); return (error); } if (status == MFI_STAT_NOT_FOUND) { @@ -642,6 +655,8 @@ show_events(int ac, char **av) } if (status != MFI_STAT_OK) { warnx("Error fetching events: %s", mfi_status(status)); + free(list); + close(fd); return (EIO); } diff --git a/usr.sbin/mfiutil/mfi_flash.c b/usr.sbin/mfiutil/mfi_flash.c index 4039beb..6d07cb0 100644 --- a/usr.sbin/mfiutil/mfi_flash.c +++ b/usr.sbin/mfiutil/mfi_flash.c @@ -136,21 +136,25 @@ flash_adapter(int ac, char **av) return (error); } + buf = NULL; + fd = -1; + if (fstat(flash, &sb) < 0) { error = errno; warn("fstat(%s)", av[1]); - return (error); + goto error; } if (sb.st_size % 1024 != 0 || sb.st_size > 0x7fffffff) { warnx("Invalid flash file size"); - return (EINVAL); + error = EINVAL; + goto error; } fd = mfi_open(mfi_unit); if (fd < 0) { error = errno; warn("mfi_open"); - return (error); + goto error; } /* First, ask the firmware to allocate space for the flash file. */ @@ -158,14 +162,16 @@ flash_adapter(int ac, char **av) mfi_dcmd_command(fd, MFI_DCMD_FLASH_FW_OPEN, NULL, 0, mbox, 4, &status); if (status != MFI_STAT_OK) { warnx("Failed to alloc flash memory: %s", mfi_status(status)); - return (EIO); + error = EIO; + goto error; } /* Upload the file 64k at a time. */ buf = malloc(FLASH_BUF_SIZE); if (buf == NULL) { warnx("malloc failed"); - return (ENOMEM); + error = ENOMEM; + goto error; } offset = 0; while (sb.st_size > 0) { @@ -174,7 +180,8 @@ flash_adapter(int ac, char **av) warnx("Bad read from flash file"); mfi_dcmd_command(fd, MFI_DCMD_FLASH_FW_CLOSE, NULL, 0, NULL, 0, NULL); - return (ENXIO); + error = ENXIO; + goto error; } mbox_store_word(mbox, offset); @@ -184,12 +191,12 @@ flash_adapter(int ac, char **av) warnx("Flash download failed: %s", mfi_status(status)); mfi_dcmd_command(fd, MFI_DCMD_FLASH_FW_CLOSE, NULL, 0, NULL, 0, NULL); - return (ENXIO); + error = ENXIO; + goto error; } sb.st_size -= nread; offset += nread; } - close(flash); /* Kick off the flash. */ printf("WARNING: Firmware flash in progress, do not reboot machine... "); @@ -198,12 +205,17 @@ flash_adapter(int ac, char **av) NULL, 0, &status); if (status != MFI_STAT_OK) { printf("failed:\n\t%s\n", mfi_status(status)); - return (ENXIO); + error = ENXIO; + goto error; } printf("finished\n"); error = display_pending_firmware(fd); - close(fd); +error: + free(buf); + if (fd >= 0) + close(fd); + close(flash); return (error); } diff --git a/usr.sbin/mfiutil/mfi_patrol.c b/usr.sbin/mfiutil/mfi_patrol.c index da7ddb5..d70c4ab 100644 --- a/usr.sbin/mfiutil/mfi_patrol.c +++ b/usr.sbin/mfiutil/mfi_patrol.c @@ -96,8 +96,10 @@ show_patrol(int ac, char **av) time(&now); mfi_get_time(fd, &at); error = patrol_get_props(fd, &prop); - if (error) + if (error) { + close(fd); return (error); + } printf("Operation Mode: "); switch (prop.op_mode) { case MFI_PR_OPMODE_AUTO: @@ -128,6 +130,7 @@ show_patrol(int ac, char **av) sizeof(status), NULL, 0, NULL) < 0) { error = errno; warn("Failed to get patrol read properties"); + close(fd); return (error); } printf("Runs Completed: %u\n", status.num_iteration); @@ -153,6 +156,7 @@ show_patrol(int ac, char **av) if (mfi_pd_get_list(fd, &list, NULL) < 0) { error = errno; warn("Failed to get drive list"); + close(fd); return (error); } @@ -165,6 +169,8 @@ show_patrol(int ac, char **av) error = errno; warn("Failed to fetch info for drive %u", list->addr[i].device_id); + free(list); + close(fd); return (error); } if (info.prog_info.active & MFI_PD_PROGRESS_PATROL) { @@ -174,6 +180,7 @@ show_patrol(int ac, char **av) &info.prog_info.patrol); } } + free(list); } close(fd); @@ -198,6 +205,7 @@ start_patrol(int ac, char **av) 0) { error = errno; warn("Failed to start patrol read"); + close(fd); return (error); } @@ -223,6 +231,7 @@ stop_patrol(int ac, char **av) 0) { error = errno; warn("Failed to stop patrol read"); + close(fd); return (error); } @@ -289,8 +298,10 @@ patrol_config(int ac, char **av) } error = patrol_get_props(fd, &prop); - if (error) + if (error) { + close(fd); return (error); + } prop.op_mode = op_mode; if (op_mode == MFI_PR_OPMODE_AUTO) { if (ac > 2) @@ -298,8 +309,10 @@ patrol_config(int ac, char **av) if (ac > 3) { time(&now); mfi_get_time(fd, &at); - if (at == 0) + if (at == 0) { + close(fd); return (ENXIO); + } prop.next_exec = at + next_exec; printf("Starting next patrol read at %s", adapter_time(now, at, prop.next_exec)); @@ -309,6 +322,7 @@ patrol_config(int ac, char **av) sizeof(prop), NULL, 0, NULL) < 0) { error = errno; warn("Failed to set patrol read properties"); + close(fd); return (error); } diff --git a/usr.sbin/mfiutil/mfi_show.c b/usr.sbin/mfiutil/mfi_show.c index 22a735d..76fd6b9 100644 --- a/usr.sbin/mfiutil/mfi_show.c +++ b/usr.sbin/mfiutil/mfi_show.c @@ -71,6 +71,7 @@ show_adapter(int ac, char **av) if (mfi_ctrl_get_info(fd, &info, NULL) < 0) { error = errno; warn("Failed to get controller info"); + close(fd); return (error); } printf("mfi%d Adapter:\n", mfi_unit); @@ -158,10 +159,12 @@ show_battery(int ac, char **av) sizeof(cap), NULL, 0, &status) < 0) { if (status == MFI_STAT_NO_HW_PRESENT) { printf("mfi%d: No battery present\n", mfi_unit); + close(fd); return (0); } error = errno; warn("Failed to get capacity info"); + close(fd); return (error); } @@ -169,6 +172,7 @@ show_battery(int ac, char **av) sizeof(design), NULL, 0, NULL) < 0) { error = errno; warn("Failed to get design info"); + close(fd); return (error); } @@ -176,6 +180,7 @@ show_battery(int ac, char **av) NULL, 0, NULL) < 0) { error = errno; warn("Failed to get status"); + close(fd); return (error); } @@ -308,6 +313,7 @@ show_config(int ac, char **av) if (mfi_config_read(fd, &config) < 0) { error = errno; warn("Failed to get config"); + close(fd); return (error); } @@ -376,6 +382,7 @@ show_config(int ac, char **av) printf("\n"); p += config->spares_size; } + free(config); close(fd); return (0); @@ -406,6 +413,7 @@ show_volumes(int ac, char **av) if (mfi_ld_get_list(fd, &list, NULL) < 0) { error = errno; warn("Failed to get volume list"); + close(fd); return (error); } @@ -431,6 +439,7 @@ show_volumes(int ac, char **av) error = errno; warn("Failed to get info for volume %d", list.ld_list[i].ld.v.target_id); + close(fd); return (error); } printf("%6s ", @@ -483,10 +492,11 @@ show_drives(int ac, char **av) return (error); } + list = NULL; if (mfi_pd_get_list(fd, &list, NULL) < 0) { error = errno; warn("Failed to get drive list"); - return (error); + goto error; } /* Walk the list of drives to determine width of state column. */ @@ -500,7 +510,7 @@ show_drives(int ac, char **av) error = errno; warn("Failed to fetch info for drive %u", list->addr[i].device_id); - return (error); + goto error; } len = strlen(mfi_pdstate(info.fw_state)); if (len > state_len) @@ -521,15 +531,17 @@ show_drives(int ac, char **av) error = errno; warn("Failed to fetch info for drive %u", list->addr[i].device_id); - return (error); + goto error; } print_pd(&info, state_len, 1); printf("\n"); } +error: + free(list); close(fd); - return (0); + return (error); } MFI_COMMAND(show, drives, show_drives); @@ -586,6 +598,7 @@ show_firmware(int ac, char **av) if (mfi_ctrl_get_info(fd, &info, NULL) < 0) { error = errno; warn("Failed to get controller info"); + close(fd); return (error); } @@ -627,7 +640,6 @@ show_progress(int ac, char **av) struct mfi_pd_info pinfo; int busy, error, fd; u_int i; - uint16_t device_id; uint8_t target_id; @@ -642,25 +654,29 @@ show_progress(int ac, char **av) warn("mfi_open"); return (error); } - busy = 0; if (mfi_ld_get_list(fd, &llist, NULL) < 0) { error = errno; warn("Failed to get volume list"); + close(fd); return (error); } if (mfi_pd_get_list(fd, &plist, NULL) < 0) { error = errno; warn("Failed to get drive list"); + close(fd); return (error); } + busy = 0; for (i = 0; i < llist.ld_count; i++) { target_id = llist.ld_list[i].ld.v.target_id; if (mfi_ld_get_info(fd, target_id, &linfo, NULL) < 0) { error = errno; warn("Failed to get info for volume %s", mfi_volume_name(fd, target_id)); + free(plist); + close(fd); return (error); } if (linfo.progress.active & MFI_LD_PROGRESS_CC) { @@ -697,6 +713,8 @@ show_progress(int ac, char **av) if (mfi_pd_get_info(fd, device_id, &pinfo, NULL) < 0) { error = errno; warn("Failed to fetch info for drive %u", device_id); + free(plist); + close(fd); return (error); } @@ -718,6 +736,7 @@ show_progress(int ac, char **av) } } + free(plist); close(fd); if (!busy) diff --git a/usr.sbin/mfiutil/mfi_volume.c b/usr.sbin/mfiutil/mfi_volume.c index 1e679c4..0d9300a 100644 --- a/usr.sbin/mfiutil/mfi_volume.c +++ b/usr.sbin/mfiutil/mfi_volume.c @@ -174,12 +174,14 @@ volume_cache(int ac, char **av) if (mfi_lookup_volume(fd, av[1], &target_id) < 0) { error = errno; warn("Invalid volume: %s", av[1]); + close(fd); return (error); } if (mfi_ld_get_props(fd, target_id, &props) < 0) { error = errno; warn("Failed to fetch volume properties"); + close(fd); return (error); } @@ -264,6 +266,7 @@ volume_cache(int ac, char **av) else if (strcmp(av[2], "read-ahead") == 0) { if (ac < 4) { warnx("cache: read-ahead setting required"); + close(fd); return (EINVAL); } if (strcmp(av[3], "none") == 0) @@ -275,6 +278,7 @@ volume_cache(int ac, char **av) MR_LD_CACHE_READ_ADAPTIVE; else { warnx("cache: invalid read-ahead setting"); + close(fd); return (EINVAL); } error = update_cache_policy(fd, &props, policy, @@ -283,6 +287,7 @@ volume_cache(int ac, char **av) } else if (strcmp(av[2], "bad-bbu-write-cache") == 0) { if (ac < 4) { warnx("cache: bad BBU setting required"); + close(fd); return (EINVAL); } if (strcmp(av[3], "enable") == 0) @@ -291,6 +296,7 @@ volume_cache(int ac, char **av) policy = 0; else { warnx("cache: invalid bad BBU setting"); + close(fd); return (EINVAL); } error = update_cache_policy(fd, &props, policy, @@ -298,6 +304,7 @@ volume_cache(int ac, char **av) } else if (strcmp(av[2], "write-cache") == 0) { if (ac < 4) { warnx("cache: write-cache setting required"); + close(fd); return (EINVAL); } if (strcmp(av[3], "enable") == 0) @@ -308,6 +315,7 @@ volume_cache(int ac, char **av) policy = MR_PD_CACHE_UNCHANGED; else { warnx("cache: invalid write-cache setting"); + close(fd); return (EINVAL); } error = 0; @@ -331,6 +339,7 @@ volume_cache(int ac, char **av) } } else { warnx("cache: Invalid command"); + close(fd); return (EINVAL); } } @@ -367,12 +376,14 @@ volume_name(int ac, char **av) if (mfi_lookup_volume(fd, av[1], &target_id) < 0) { error = errno; warn("Invalid volume: %s", av[1]); + close(fd); return (error); } if (mfi_ld_get_props(fd, target_id, &props) < 0) { error = errno; warn("Failed to fetch volume properties"); + close(fd); return (error); } @@ -383,6 +394,7 @@ volume_name(int ac, char **av) if (mfi_ld_set_props(fd, &props) < 0) { error = errno; warn("Failed to set volume properties"); + close(fd); return (error); } @@ -415,6 +427,7 @@ volume_progress(int ac, char **av) if (mfi_lookup_volume(fd, av[1], &target_id) < 0) { error = errno; warn("Invalid volume: %s", av[1]); + close(fd); return (error); } @@ -423,6 +436,7 @@ volume_progress(int ac, char **av) error = errno; warn("Failed to fetch info for volume %s", mfi_volume_name(fd, target_id)); + close(fd); return (error); } diff --git a/usr.sbin/rtadvd/config.c b/usr.sbin/rtadvd/config.c index 1b48868..c0e442b 100644 --- a/usr.sbin/rtadvd/config.c +++ b/usr.sbin/rtadvd/config.c @@ -142,6 +142,33 @@ dname_labelenc(char *dst, const char *src) } while(0) int +loadconfig(char *ifl_names[], const int ifl_len) +{ + int i; + int idx; + int error; + + for (i = 0; i < ifl_len; i++) { + idx = if_nametoindex(ifl_names[i]); + if (idx == 0) { + syslog(LOG_ERR, + "<%s> interface %s not found. " + "Ignored at this moment.", __func__, ifl_names[i]); + continue; + } + syslog(LOG_INFO, + "<%s> loading config for %s.", __func__, ifl_names[i]); + error = getconfig(idx); + if (error) + syslog(LOG_ERR, + "<%s> invalid configuration for %s. " + "Ignored at this moment.", __func__, ifl_names[i]); + } + + return (0); +} + +int rmconfig(int idx) { struct rainfo *rai; @@ -207,6 +234,7 @@ getconfig(int idx) int stat, i; char tbuf[BUFSIZ]; struct rainfo *rai; + struct rainfo *rai_old; long val; int64_t val64; char buf[BUFSIZ]; @@ -220,6 +248,10 @@ getconfig(int idx) return (-1); } + TAILQ_FOREACH(rai_old, &railist, rai_next) + if (idx == rai_old->rai_ifindex) + break; + if ((stat = agetent(tbuf, intface)) <= 0) { memset(tbuf, 0, sizeof(tbuf)); syslog(LOG_INFO, @@ -254,7 +286,7 @@ getconfig(int idx) syslog(LOG_ERR, "<%s> can't get information of %s", __func__, intface); - return (-1); + goto getconfig_free_rai; } rai->rai_ifindex = rai->rai_sdl->sdl_index; } else @@ -280,7 +312,7 @@ getconfig(int idx) "<%s> maxinterval (%ld) on %s is invalid " "(must be between %u and %u)", __func__, val, intface, MIN_MAXINTERVAL, MAX_MAXINTERVAL); - return (-1); + goto getconfig_free_rai; } rai->rai_maxinterval = (u_int)val; @@ -292,7 +324,7 @@ getconfig(int idx) "(must be between %d and %d)", __func__, val, intface, MIN_MININTERVAL, (rai->rai_maxinterval * 3) / 4); - return (-1); + goto getconfig_free_rai; } rai->rai_mininterval = (u_int)val; @@ -311,7 +343,7 @@ getconfig(int idx) if ((val & ND_RA_FLAG_RTPREF_HIGH)) { syslog(LOG_ERR, "<%s> the \'h\' and \'l\'" " router flags are exclusive", __func__); - return (-1); + goto getconfig_free_rai; } val |= ND_RA_FLAG_RTPREF_LOW; } @@ -328,7 +360,7 @@ getconfig(int idx) if (rai->rai_rtpref == ND_RA_FLAG_RTPREF_RSV) { syslog(LOG_ERR, "<%s> invalid router preference (%02x) on %s", __func__, rai->rai_rtpref, intface); - return (-1); + goto getconfig_free_rai; } MAYHAVE(val, "rltime", rai->rai_maxinterval * 3); @@ -339,7 +371,7 @@ getconfig(int idx) "(must be 0 or between %d and %d)", __func__, val, intface, rai->rai_maxinterval, MAXROUTERLIFETIME); - return (-1); + goto getconfig_free_rai; } rai->rai_lifetime = val & 0xffff; @@ -349,7 +381,7 @@ getconfig(int idx) "<%s> reachable time (%ld) on %s is invalid " "(must be no greater than %d)", __func__, val, intface, MAXREACHABLETIME); - return (-1); + goto getconfig_free_rai; } rai->rai_reachabletime = (u_int32_t)val; @@ -357,7 +389,7 @@ getconfig(int idx) if (val64 < 0 || val64 > 0xffffffff) { syslog(LOG_ERR, "<%s> retrans time (%lld) on %s out of range", __func__, (long long)val64, intface); - return (-1); + goto getconfig_free_rai; } rai->rai_retranstimer = (u_int32_t)val64; @@ -365,7 +397,7 @@ getconfig(int idx) syslog(LOG_ERR, "<%s> mobile-ip6 configuration not supported", __func__); - return (-1); + goto getconfig_free_rai; } /* prefix information */ @@ -395,14 +427,14 @@ getconfig(int idx) syslog(LOG_ERR, "<%s> inet_pton failed for %s", __func__, addr); - return (-1); + goto getconfig_free_pfx; } if (IN6_IS_ADDR_MULTICAST(&pfx->pfx_prefix)) { syslog(LOG_ERR, "<%s> multicast prefix (%s) must " "not be advertised on %s", __func__, addr, intface); - return (-1); + goto getconfig_free_pfx; } if (IN6_IS_ADDR_LINKLOCAL(&pfx->pfx_prefix)) syslog(LOG_NOTICE, @@ -416,7 +448,7 @@ getconfig(int idx) syslog(LOG_ERR, "<%s> prefixlen (%ld) for %s " "on %s out of range", __func__, val, addr, intface); - return (-1); + goto getconfig_free_pfx; } pfx->pfx_prefixlen = (int)val; @@ -441,7 +473,7 @@ getconfig(int idx) "%s/%d on %s is out of range", __func__, (long long)val64, addr, pfx->pfx_prefixlen, intface); - return (-1); + goto getconfig_free_pfx; } pfx->pfx_validlifetime = (u_int32_t)val64; @@ -461,7 +493,7 @@ getconfig(int idx) "is out of range", __func__, (long long)val64, addr, pfx->pfx_prefixlen, intface); - return (-1); + goto getconfig_free_pfx; } pfx->pfx_preflifetime = (u_int32_t)val64; @@ -475,6 +507,9 @@ getconfig(int idx) /* link into chain */ TAILQ_INSERT_TAIL(&rai->rai_prefix, pfx, pfx_next); rai->rai_pfxs++; + continue; +getconfig_free_pfx: + free(pfx); } if (rai->rai_advifprefix && rai->rai_pfxs == 0) get_prefix(rai); @@ -484,7 +519,7 @@ getconfig(int idx) syslog(LOG_ERR, "<%s> mtu (%ld) on %s out of range", __func__, val, intface); - return (-1); + goto getconfig_free_rai; } rai->rai_linkmtu = (u_int32_t)val; if (rai->rai_linkmtu == 0) { @@ -501,7 +536,7 @@ getconfig(int idx) "be between least MTU (%d) and physical link MTU (%d)", __func__, (unsigned long)rai->rai_linkmtu, intface, IPV6_MMTU, rai->rai_phymtu); - return (-1); + goto getconfig_free_rai; } #ifdef SIOCSIFINFO_IN6 @@ -553,14 +588,10 @@ getconfig(int idx) /* allocate memory to store prefix information */ ELM_MALLOC(rti, exit(1)); - /* link into chain */ - TAILQ_INSERT_TAIL(&rai->rai_route, rti, rti_next); - rai->rai_routes++; - if (inet_pton(AF_INET6, addr, &rti->rti_prefix) != 1) { syslog(LOG_ERR, "<%s> inet_pton failed for %s", __func__, addr); - return (-1); + goto getconfig_free_rti; } #if 0 /* @@ -575,14 +606,14 @@ getconfig(int idx) "<%s> multicast route (%s) must " "not be advertised on %s", __func__, addr, intface); - return (-1); + goto getconfig_free_rti; } if (IN6_IS_ADDR_LINKLOCAL(&rti->prefix)) { syslog(LOG_NOTICE, "<%s> link-local route (%s) will " "be advertised on %s", __func__, addr, intface); - return (-1); + goto getconfig_free_rti; } #endif @@ -602,7 +633,7 @@ getconfig(int idx) syslog(LOG_ERR, "<%s> prefixlen (%ld) for %s on %s " "out of range", __func__, val, addr, intface); - return (-1); + goto getconfig_free_rti; } rti->rti_prefixlen = (int)val; @@ -617,7 +648,7 @@ getconfig(int idx) "<%s> the \'h\' and \'l\' route" " preferences are exclusive", __func__); - exit(1); + goto getconfig_free_rti; } val |= ND_RA_FLAG_RTPREF_LOW; } @@ -638,7 +669,7 @@ getconfig(int idx) "for %s/%d on %s", __func__, rti->rti_rtpref, addr, rti->rti_prefixlen, intface); - return (-1); + goto getconfig_free_rti; } /* @@ -665,9 +696,16 @@ getconfig(int idx) syslog(LOG_ERR, "<%s> route lifetime (%lld) for " "%s/%d on %s out of range", __func__, (long long)val64, addr, rti->rti_prefixlen, intface); - return (-1); + goto getconfig_free_rti; } rti->rti_ltime = (u_int32_t)val64; + + /* link into chain */ + TAILQ_INSERT_TAIL(&rai->rai_route, rti, rti_next); + rai->rai_routes++; + continue; +getconfig_free_rti: + free(rti); } #endif /* DNS server and DNS search list information */ @@ -689,12 +727,12 @@ getconfig(int idx) c = strcspn(ap, ","); strncpy(abuf, ap, c); abuf[c] = '\0'; - ELM_MALLOC(rdna, exit(1)); + ELM_MALLOC(rdna, goto getconfig_free_rdn); if (inet_pton(AF_INET6, abuf, &rdna->ra_dns) != 1) { syslog(LOG_ERR, "<%s> inet_pton failed for %s", __func__, abuf); free(rdna); - return (-1); + goto getconfig_free_rdn; } TAILQ_INSERT_TAIL(&rdn->rd_list, rdna, ra_next); } @@ -707,12 +745,19 @@ getconfig(int idx) "(must be between %d and %d)", entbuf, val, intface, rai->rai_maxinterval, rai->rai_maxinterval * 2); - return (-1); + goto getconfig_free_rdn; } rdn->rd_ltime = val; /* link into chain */ TAILQ_INSERT_TAIL(&rai->rai_rdnss, rdn, rd_next); + continue; +getconfig_free_rdn: + while ((rdna = TAILQ_FIRST(&rdn->rd_list)) != NULL) { + TAILQ_REMOVE(&rdn->rd_list, rdna, ra_next); + free(rdna); + } + free(rdn); } for (i = -1; i < MAXDNSSLENT ; i++) { @@ -734,7 +779,7 @@ getconfig(int idx) c = strcspn(ap, ","); strncpy(abuf, ap, c); abuf[c] = '\0'; - ELM_MALLOC(dnsa, exit(1)); + ELM_MALLOC(dnsa, goto getconfig_free_dns); dnsa->da_len = dname_labelenc(dnsa->da_dom, abuf); syslog(LOG_DEBUG, "<%s>: dnsa->da_len = %d", __func__, dnsa->da_len); @@ -749,15 +794,46 @@ getconfig(int idx) "(must be between %d and %d)", entbuf, val, intface, rai->rai_maxinterval, rai->rai_maxinterval * 2); - return (-1); + goto getconfig_free_dns; } dns->dn_ltime = val; /* link into chain */ TAILQ_INSERT_TAIL(&rai->rai_dnssl, dns, dn_next); + continue; +getconfig_free_dns: + while ((dnsa = TAILQ_FIRST(&dns->dn_list)) != NULL) { + TAILQ_REMOVE(&dns->dn_list, dnsa, da_next); + free(dnsa); + } + free(dns); } /* construct the sending packet */ make_packet(rai); + + /* + * If an entry with the same ifindex exists, remove it first. + * Before the removal, RDNSS and DNSSL options with + * zero-lifetime will be sent. + */ + if (rai_old != NULL) { + const int retrans = MAX_FINAL_RTR_ADVERTISEMENTS; + struct rdnss *rdn; + struct dnssl *dns; + + rai_old->rai_lifetime = 0; + TAILQ_FOREACH(rdn, &rai_old->rai_rdnss, rd_next) + rdn->rd_ltime = 0; + TAILQ_FOREACH(dns, &rai_old->rai_dnssl, dn_next) + dns->dn_ltime = 0; + + make_packet(rai_old); + for (i = 0; i < retrans; i++) { + ra_output(rai_old); + sleep(MIN_DELAY_BETWEEN_RAS); + } + rmconfig(idx); + } TAILQ_INSERT_TAIL(&railist, rai, rai_next); /* set timer */ @@ -767,6 +843,9 @@ getconfig(int idx) rtadvd_set_timer(&rai->rai_timer->rat_tm, rai->rai_timer); return (0); +getconfig_free_rai: + free(rai); + return (-1); } void diff --git a/usr.sbin/rtadvd/config.h b/usr.sbin/rtadvd/config.h index 38c19b8..01886a6 100644 --- a/usr.sbin/rtadvd/config.h +++ b/usr.sbin/rtadvd/config.h @@ -32,6 +32,7 @@ extern int getconfig(int); extern int rmconfig(int); +extern int loadconfig(char *[], const int); extern void delete_prefix(struct prefix *); extern void invalidate_prefix(struct prefix *); extern void update_prefix(struct prefix *); diff --git a/usr.sbin/rtadvd/rtadvd.8 b/usr.sbin/rtadvd/rtadvd.8 index 5159624..b41f7c06 100644 --- a/usr.sbin/rtadvd/rtadvd.8 +++ b/usr.sbin/rtadvd/rtadvd.8 @@ -169,6 +169,18 @@ or the file specified with option .Fl F . .Pp Use +.Dv SIGHUP +to reload the configuration file +.Pa /etc/rtadvd.conf . +If an invalid parameter is found in the configuration file upon the reload, +the entry will be ignored and the old configuration will be used. +When parameters in an existing entry are updated, +.Nm +will send Router Advertisement messages with the old configuration but +zero router lifetime to the interface first, and then start to send a new +message. +.Pp +Use .Dv SIGTERM to kill .Nm diff --git a/usr.sbin/rtadvd/rtadvd.c b/usr.sbin/rtadvd/rtadvd.c index 6423e7b..e9b212c 100644 --- a/usr.sbin/rtadvd/rtadvd.c +++ b/usr.sbin/rtadvd/rtadvd.c @@ -83,6 +83,7 @@ static u_char *sndcmsgbuf = NULL; static size_t sndcmsgbuflen; volatile sig_atomic_t do_dump; volatile sig_atomic_t do_die; +volatile sig_atomic_t do_reload; struct msghdr sndmhdr; struct iovec rcviov[2]; struct iovec sndiov[2]; @@ -161,6 +162,7 @@ struct sockaddr_in6 sin6_sitelocal_allrouters = { .sin6_addr = IN6ADDR_SITELOCAL_ALLROUTERS_INIT, }; +static void set_reload(int); static void set_die(int); static void die(void); static void sock_open(void); @@ -175,7 +177,6 @@ static int prefix_check(struct nd_opt_prefix_info *, struct rainfo *, static int nd6_options(struct nd_opt_hdr *, int, union nd_opt *, u_int32_t); static void free_ndopts(union nd_opt *); -static void ra_output(struct rainfo *); static void rtmsg_input(void); static void rtadvd_set_dump_file(int); static void set_short_delay(struct rainfo *); @@ -197,7 +198,6 @@ main(int argc, char *argv[]) int i, ch; int fflag = 0, logopt; pid_t pid, otherpid; - int error; /* get command line options and arguments */ while ((ch = getopt(argc, argv, "c:dDfF:M:p:Rs")) != -1) { @@ -273,22 +273,7 @@ main(int argc, char *argv[]) ifl_names = argv; ifl_len = argc; - for (i = 0; i < ifl_len; i++) { - int idx; - - idx = if_nametoindex(ifl_names[i]); - if (idx == 0) { - syslog(LOG_INFO, - "<%s> interface %s not found." - "Ignored at this moment.", __func__, ifl_names[i]); - continue; - } - error = getconfig(idx); - if (error) - syslog(LOG_INFO, - "<%s> invalid configuration for %s." - "Ignored at this moment.", __func__, ifl_names[i]); - } + loadconfig(argv, argc); pfh = pidfile_open(pidfilename, 0600, &otherpid); if (pfh == NULL) { @@ -343,6 +328,7 @@ main(int argc, char *argv[]) #endif signal(SIGTERM, set_die); signal(SIGUSR1, rtadvd_set_dump_file); + signal(SIGHUP, set_reload); while (1) { #ifndef HAVE_POLL_H @@ -358,6 +344,11 @@ main(int argc, char *argv[]) /*NOTREACHED*/ } + if (do_reload) { + loadconfig(argv, argc); + do_reload = 0; + } + /* timer expiration check and reset the timer */ timeout = rtadvd_check_timer(); @@ -421,6 +412,13 @@ rtadvd_set_dump_file(int sig __unused) } static void +set_reload(int sig __unused) +{ + + do_reload = 1; +} + +static void set_die(int sig __unused) { @@ -1698,7 +1696,7 @@ if_indextorainfo(int idx) return (NULL); /* search failed */ } -static void +void ra_output(struct rainfo *rai) { int i; diff --git a/usr.sbin/rtadvd/rtadvd.h b/usr.sbin/rtadvd/rtadvd.h index f65a837..190bb0d 100644 --- a/usr.sbin/rtadvd/rtadvd.h +++ b/usr.sbin/rtadvd/rtadvd.h @@ -233,6 +233,7 @@ extern TAILQ_HEAD(railist_head_t, rainfo) railist; struct rtadvd_timer *ra_timeout(void *); void ra_timer_update(void *, struct timeval *); +void ra_output(struct rainfo *); int prefix_match(struct in6_addr *, int, struct in6_addr *, int); |
