MFC

56 files changed, 600 insertions, 269 deletions

diff --git a/bin/ps/ps.1 b/bin/ps/ps.1
index a66ed5d..2f1be64 100644
--- a/bin/ps/ps.1
+++ b/bin/ps/ps.1
@@ -29,7 +29,7 @@
 .\"     @(#)ps.1	8.3 (Berkeley) 4/18/94
 .\" $FreeBSD$
 .\"
-.Dd July 1, 2011
+.Dd October 1, 2011
 .Dt PS 1
 .Os
 .Sh NAME
@@ -54,6 +54,11 @@ utility
 displays a header line, followed by lines containing information about
 all of your
 processes that have controlling terminals.
+If the
+.Fl x
+options is specified,
+.Nm
+will also display processes that do not have controlling terminals.
 .Pp
 A different set of processes can be selected for display by using any
 combination of the
@@ -90,8 +95,8 @@ and
 .Fl o
 options).
 The default output format includes, for each process, the process' ID,
-controlling terminal, CPU time (including both user and system time),
-state, and associated command.
+controlling terminal, state, CPU time (including both user and system time)
+and associated command.
 .Pp
 The process file system (see
 .Xr procfs 5 )
@@ -103,13 +108,9 @@ The options are as follows:
 .Bl -tag -width indent
 .It Fl a
 Display information about other users' processes as well as your own.
-This will skip any processes which do not have a controlling terminal,
-unless the
-.Fl x
-option is also specified.
-This can be disabled by setting the
+If the
 .Va security.bsd.see_other_uids
-sysctl to zero.
+sysctl is set to zero, this option is honored only if the UID of the user is 0.
 .It Fl c
 Change the
 .Dq command
@@ -216,6 +217,9 @@ with the standard input.
 .It Fl t
 Display information about processes attached to the specified terminal
 devices.
+Full pathnames, as well as abbreviations (see explanation of the
+.Cm tt
+keyword) can be specified.
 .It Fl U
 Display the processes belonging to the specified usernames.
 .It Fl u
@@ -427,12 +431,15 @@ The process is being traced or debugged.
 An abbreviation for the pathname of the controlling terminal, if any.
 The abbreviation consists of the three letters following
 .Pa /dev/tty ,
-or, for the console,
-.Dq Li con .
+or, for psuedo-terminals, the corresponding entry in
+.Pa /dev/pts .
 This is followed by a
 .Ql -
 if the process can no longer reach that
 controlling terminal (i.e., it has been revoked).
+The full pathname of the controlling terminal is available via the
+.Cm tty
+keyword.
 .It Cm wchan
 The event (an address in the system) on which a process waits.
 When printed numerically, the initial part of the address is
diff --git a/contrib/llvm/LICENSE.TXT b/contrib/llvm/LICENSE.TXT
new file mode 100644
index 0000000..1b1047c
--- /dev/null
+++ b/contrib/llvm/LICENSE.TXT
@@ -0,0 +1,69 @@
+==============================================================================
+LLVM Release License
+==============================================================================
+University of Illinois/NCSA
+Open Source License
+
+Copyright (c) 2003-2011 University of Illinois at Urbana-Champaign.
+All rights reserved.
+
+Developed by:
+
+    LLVM Team
+
+    University of Illinois at Urbana-Champaign
+
+    http://llvm.org
+
+Permission is hereby granted, free of charge, to any person obtaining a copy of
+this software and associated documentation files (the "Software"), to deal with
+the Software without restriction, including without limitation the rights to
+use, copy, modify, merge, publish, distribute, sublicense, and/or sell copies
+of the Software, and to permit persons to whom the Software is furnished to do
+so, subject to the following conditions:
+
+    * Redistributions of source code must retain the above copyright notice,
+      this list of conditions and the following disclaimers.
+
+    * Redistributions in binary form must reproduce the above copyright notice,
+      this list of conditions and the following disclaimers in the
+      documentation and/or other materials provided with the distribution.
+
+    * Neither the names of the LLVM Team, University of Illinois at
+      Urbana-Champaign, nor the names of its contributors may be used to
+      endorse or promote products derived from this Software without specific
+      prior written permission.
+
+THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, FITNESS
+FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL THE
+CONTRIBUTORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
+LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
+OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS WITH THE
+SOFTWARE.
+
+==============================================================================
+Copyrights and Licenses for Third Party Software Distributed with LLVM:
+==============================================================================
+The LLVM software contains code written by third parties.  Such software will
+have its own individual LICENSE.TXT file in the directory in which it appears.
+This file will describe the copyrights, license, and restrictions which apply
+to that code.
+
+The disclaimer of warranty in the University of Illinois Open Source License
+applies to all code in the LLVM Distribution, and nothing in any of the
+other licenses gives permission to use the names of the LLVM Team or the
+University of Illinois to endorse or promote products derived from this
+Software.
+
+The following pieces of software have additional or alternate copyrights,
+licenses, and/or restrictions:
+
+Program             Directory
+-------             ---------
+Autoconf            llvm/autoconf
+                    llvm/projects/ModuleMaker/autoconf
+                    llvm/projects/sample/autoconf
+CellSPU backend     llvm/lib/Target/CellSPU/README.txt
+Google Test         llvm/utils/unittest/googletest
+OpenBSD regex       llvm/lib/Support/{reg*, COPYRIGHT.regex}
diff --git a/contrib/llvm/lib/Support/COPYRIGHT.regex b/contrib/llvm/lib/Support/COPYRIGHT.regex
new file mode 100644
index 0000000..a6392fd
--- /dev/null
+++ b/contrib/llvm/lib/Support/COPYRIGHT.regex
@@ -0,0 +1,54 @@
+$OpenBSD: COPYRIGHT,v 1.3 2003/06/02 20:18:36 millert Exp $
+
+Copyright 1992, 1993, 1994 Henry Spencer.  All rights reserved.
+This software is not subject to any license of the American Telephone
+and Telegraph Company or of the Regents of the University of California.
+
+Permission is granted to anyone to use this software for any purpose on
+any computer system, and to alter it and redistribute it, subject
+to the following restrictions:
+
+1. The author is not responsible for the consequences of use of this
+   software, no matter how awful, even if they arise from flaws in it.
+
+2. The origin of this software must not be misrepresented, either by
+   explicit claim or by omission.  Since few users ever read sources,
+   credits must appear in the documentation.
+
+3. Altered versions must be plainly marked as such, and must not be
+   misrepresented as being the original software.  Since few users
+   ever read sources, credits must appear in the documentation.
+
+4. This notice may not be removed or altered.
+
+=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=
+/*-
+ * Copyright (c) 1994
+ *	The Regents of the University of California.  All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * 1. Redistributions of source code must retain the above copyright
+ *    notice, this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright
+ *    notice, this list of conditions and the following disclaimer in the
+ *    documentation and/or other materials provided with the distribution.
+ * 3. Neither the name of the University nor the names of its contributors
+ *    may be used to endorse or promote products derived from this software
+ *    without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS ``AS IS'' AND
+ * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
+ * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
+ * ARE DISCLAIMED.  IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE
+ * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
+ * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
+ * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+ * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
+ * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
+ * SUCH DAMAGE.
+ *
+ *	@(#)COPYRIGHT	8.1 (Berkeley) 3/16/94
+ */
diff --git a/contrib/llvm/tools/clang/LICENSE.TXT b/contrib/llvm/tools/clang/LICENSE.TXT
new file mode 100644
index 0000000..91895eb
--- /dev/null
+++ b/contrib/llvm/tools/clang/LICENSE.TXT
@@ -0,0 +1,63 @@
+==============================================================================
+LLVM Release License
+==============================================================================
+University of Illinois/NCSA
+Open Source License
+
+Copyright (c) 2007-2011 University of Illinois at Urbana-Champaign.
+All rights reserved.
+
+Developed by:
+
+    LLVM Team
+
+    University of Illinois at Urbana-Champaign
+
+    http://llvm.org
+
+Permission is hereby granted, free of charge, to any person obtaining a copy of
+this software and associated documentation files (the "Software"), to deal with
+the Software without restriction, including without limitation the rights to
+use, copy, modify, merge, publish, distribute, sublicense, and/or sell copies
+of the Software, and to permit persons to whom the Software is furnished to do
+so, subject to the following conditions:
+
+    * Redistributions of source code must retain the above copyright notice,
+      this list of conditions and the following disclaimers.
+
+    * Redistributions in binary form must reproduce the above copyright notice,
+      this list of conditions and the following disclaimers in the
+      documentation and/or other materials provided with the distribution.
+
+    * Neither the names of the LLVM Team, University of Illinois at
+      Urbana-Champaign, nor the names of its contributors may be used to
+      endorse or promote products derived from this Software without specific
+      prior written permission.
+
+THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, FITNESS
+FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL THE
+CONTRIBUTORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
+LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
+OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS WITH THE
+SOFTWARE.
+
+==============================================================================
+The LLVM software contains code written by third parties.  Such software will
+have its own individual LICENSE.TXT file in the directory in which it appears.
+This file will describe the copyrights, license, and restrictions which apply
+to that code.
+
+The disclaimer of warranty in the University of Illinois Open Source License
+applies to all code in the LLVM Distribution, and nothing in any of the
+other licenses gives permission to use the names of the LLVM Team or the
+University of Illinois to endorse or promote products derived from this
+Software.
+
+The following pieces of software have additional or alternate copyrights,
+licenses, and/or restrictions:
+
+Program             Directory
+-------             ---------
+<none yet>
+
diff --git a/contrib/sendmail/src/main.c b/contrib/sendmail/src/main.c
index 4d2318f..e14ffa0 100644
--- a/contrib/sendmail/src/main.c
+++ b/contrib/sendmail/src/main.c
@@ -109,8 +109,8 @@ GIDSET_T	InitialGidSet[NGROUPS_MAX];
 #if SASL
 static sasl_callback_t srvcallbacks[] =
 {
-	{	SASL_CB_VERIFYFILE,	&safesaslfile,	NULL	},
-	{	SASL_CB_PROXY_POLICY,	&proxy_policy,	NULL	},
+	{	SASL_CB_VERIFYFILE,	(sasl_callback_ft)&safesaslfile,	NULL	},
+	{	SASL_CB_PROXY_POLICY,	(sasl_callback_ft)&proxy_policy,	NULL	},
 	{	SASL_CB_LIST_END,	NULL,		NULL	}
 };
 #endif /* SASL */
diff --git a/contrib/sendmail/src/sendmail.h b/contrib/sendmail/src/sendmail.h
index 39ba16c..ecb3fa3 100644
--- a/contrib/sendmail/src/sendmail.h
+++ b/contrib/sendmail/src/sendmail.h
@@ -133,10 +133,15 @@ SM_UNUSED(static char SmailId[]) = "@(#)$Id: sendmail.h,v 8.1089 2011/03/15 23:1
 
 # if SASL == 2 || SASL >= 20000
 #  include <sasl/sasl.h>
+#  include <sasl/saslplug.h>
 #  include <sasl/saslutil.h>
+#  if SASL_VERSION_FULL < 0x020119
+typedef int (*sasl_callback_ft)(void);
+#  endif
 # else /* SASL == 2 || SASL >= 20000 */
 #  include <sasl.h>
 #  include <saslutil.h>
+typedef int (*sasl_callback_ft)(void);
 # endif /* SASL == 2 || SASL >= 20000 */
 # if defined(SASL_VERSION_MAJOR) && defined(SASL_VERSION_MINOR) && defined(SASL_VERSION_STEP)
 #  define SASL_VERSION (SASL_VERSION_MAJOR * 10000)  + (SASL_VERSION_MINOR * 100) + SASL_VERSION_STEP
diff --git a/contrib/sendmail/src/usersmtp.c b/contrib/sendmail/src/usersmtp.c
index 0de839e..c5da512 100644
--- a/contrib/sendmail/src/usersmtp.c
+++ b/contrib/sendmail/src/usersmtp.c
@@ -524,15 +524,15 @@ static int attemptauth	__P((MAILER *, MCI *, ENVELOPE *, SASL_AI_T *));
 
 static sasl_callback_t callbacks[] =
 {
-	{	SASL_CB_GETREALM,	&saslgetrealm,	NULL	},
+	{	SASL_CB_GETREALM,	(sasl_callback_ft)&saslgetrealm,	NULL	},
 #define CB_GETREALM_IDX	0
-	{	SASL_CB_PASS,		&getsecret,	NULL	},
+	{	SASL_CB_PASS,		(sasl_callback_ft)&getsecret,	NULL	},
 #define CB_PASS_IDX	1
-	{	SASL_CB_USER,		&getsimple,	NULL	},
+	{	SASL_CB_USER,		(sasl_callback_ft)&getsimple,	NULL	},
 #define CB_USER_IDX	2
-	{	SASL_CB_AUTHNAME,	&getsimple,	NULL	},
+	{	SASL_CB_AUTHNAME,	(sasl_callback_ft)&getsimple,	NULL	},
 #define CB_AUTHNAME_IDX	3
-	{	SASL_CB_VERIFYFILE,	&safesaslfile,	NULL	},
+	{	SASL_CB_VERIFYFILE,	(sasl_callback_ft)&safesaslfile,	NULL	},
 #define CB_SAFESASL_IDX	4
 	{	SASL_CB_LIST_END,	NULL,		NULL	}
 };
diff --git a/etc/mtree/BSD.usr.dist b/etc/mtree/BSD.usr.dist
index 9ddf4cf..87497b1 100644
--- a/etc/mtree/BSD.usr.dist
+++ b/etc/mtree/BSD.usr.dist
@@ -93,6 +93,10 @@
                 intel_wpi
                 ..
             ..
+            llvm
+                clang
+                ..
+            ..
             ncurses
             ..
             ntp
diff --git a/lib/libc/gen/ctermid.3 b/lib/libc/gen/ctermid.3
index 3402d1d..d737e5e 100644
--- a/lib/libc/gen/ctermid.3
+++ b/lib/libc/gen/ctermid.3
@@ -28,7 +28,7 @@
 .\"     @(#)ctermid.3	8.1 (Berkeley) 6/4/93
 .\" $FreeBSD$
 .\"
-.Dd June 4, 1993
+.Dd October 1, 2011
 .Dt CTERMID 3
 .Os
 .Sh NAME
@@ -77,7 +77,8 @@ pointer,
 .Dv NULL
 is returned.
 .Pp
-The current implementation simply returns
+If no suitable lookup of the controlling terminal name can be performed,
+this implementation returns
 .Ql /dev/tty .
 .Sh RETURN VALUES
 Upon successful completion, a
diff --git a/lib/libc/gen/ctermid.c b/lib/libc/gen/ctermid.c
index f88b1f5..8af1cb2 100644
--- a/lib/libc/gen/ctermid.c
+++ b/lib/libc/gen/ctermid.c
@@ -1,6 +1,6 @@
 /*-
- * Copyright (c) 1990, 1993
- *	The Regents of the University of California.  All rights reserved.
+ * Copyright (c) 2011 Ed Schouten <ed@FreeBSD.org>
+ * All rights reserved.
  *
  * Redistribution and use in source and binary forms, with or without
  * modification, are permitted provided that the following conditions
@@ -10,14 +10,11 @@
  * 2. Redistributions in binary form must reproduce the above copyright
  *    notice, this list of conditions and the following disclaimer in the
  *    documentation and/or other materials provided with the distribution.
- * 4. Neither the name of the University nor the names of its contributors
- *    may be used to endorse or promote products derived from this software
- *    without specific prior written permission.
  *
- * THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS ``AS IS'' AND
+ * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
  * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
  * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
- * ARE DISCLAIMED.  IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE
+ * ARE DISCLAIMED.  IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
  * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
  * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
  * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
@@ -27,31 +24,47 @@
  * SUCH DAMAGE.
  */
 
-#if defined(LIBC_SCCS) && !defined(lint)
-static char sccsid[] = "@(#)ctermid.c	8.1 (Berkeley) 6/4/93";
-#endif /* LIBC_SCCS and not lint */
 #include <sys/cdefs.h>
 __FBSDID("$FreeBSD$");
 
-#include <stdio.h>
+#include <sys/param.h>
+#include <sys/stat.h>
+#include <sys/sysctl.h>
+
+#include <errno.h>
 #include <paths.h>
+#include <stdio.h>
 #include <string.h>
 
+#define	LEN_PATH_DEV	(sizeof(_PATH_DEV) - 1)
+
 char *
 ctermid(char *s)
 {
-	static char def[] = _PATH_TTY;
+	static char def[sizeof(_PATH_DEV) + SPECNAMELEN];
+	struct stat sb;
+	size_t dlen;
+	int sverrno;
 
-	if (s) {
-		bcopy(def, s, sizeof(_PATH_TTY));
-		return(s);
-	}
-	return(def);
-}
+	if (s == NULL) {
+		s = def;
+		dlen = sizeof(def) - LEN_PATH_DEV;
+	} else
+		dlen = L_ctermid - LEN_PATH_DEV;
+	strcpy(s, _PATH_TTY);
 
+	/* Attempt to perform a lookup of the actual TTY pathname. */
+	sverrno = errno;
+	if (stat(_PATH_TTY, &sb) == 0 && S_ISCHR(sb.st_mode))
+		(void)sysctlbyname("kern.devname", s + LEN_PATH_DEV,
+		    &dlen, &sb.st_rdev, sizeof(sb.st_rdev));
+	errno = sverrno;
+	return (s);
+}
 
 char *
 ctermid_r(char *s)
 {
-	return (s) ? ctermid(s) : NULL;
+
+	return (s != NULL ? ctermid(s) : NULL);
 }
diff --git a/share/doc/Makefile b/share/doc/Makefile
index b901b93..7eabbd9 100644
--- a/share/doc/Makefile
+++ b/share/doc/Makefile
@@ -3,12 +3,16 @@
 
 .include <bsd.own.mk>
 
-SUBDIR=	${_bind9} IPv6 legal ${_roffdocs}
+SUBDIR=	${_bind9} IPv6 legal ${_llvm} ${_roffdocs}
 
 .if ${MK_BIND} != "no"
 _bind9=	bind9
 .endif
 
+.if ${MK_CLANG} != "no"
+_llvm=	llvm
+.endif
+
 # FIXME this is not a real solution ...
 .if ${MK_GROFF} != "no"
 _roffdocs=	papers psd smm usd
diff --git a/share/doc/llvm/Makefile b/share/doc/llvm/Makefile
new file mode 100644
index 0000000..37493bb
--- /dev/null
+++ b/share/doc/llvm/Makefile
@@ -0,0 +1,15 @@
+# $FreeBSD$
+
+SUBDIR=		clang
+
+SRCDIR=		${.CURDIR}/../../../contrib/llvm
+
+.PATH: ${SRCDIR} ${SRCDIR}/lib/Support
+
+NO_OBJ=
+
+FILESGROUPS=	TOP
+TOP=		LICENSE.TXT COPYRIGHT.regex
+TOPDIR=		${DOCDIR}/llvm
+
+.include <bsd.prog.mk>
diff --git a/share/doc/llvm/clang/Makefile b/share/doc/llvm/clang/Makefile
new file mode 100644
index 0000000..1b26d6a
--- /dev/null
+++ b/share/doc/llvm/clang/Makefile
@@ -0,0 +1,13 @@
+# $FreeBSD$
+
+SRCDIR=		${.CURDIR}/../../../../contrib/llvm/tools/clang
+
+.PATH: ${SRCDIR}
+
+NO_OBJ=
+
+FILESGROUPS=	TOP
+TOP=		LICENSE.TXT
+TOPDIR=		${DOCDIR}/llvm/clang
+
+.include <bsd.prog.mk>
diff --git a/sys/arm/at91/at91_mci.c b/sys/arm/at91/at91_mci.c
index 17cf9c2..4f88d7e 100644
--- a/sys/arm/at91/at91_mci.c
+++ b/sys/arm/at91/at91_mci.c
@@ -243,7 +243,7 @@ at91_mci_attach(device_t dev)
 	child = device_add_child(dev, "mmc", 0);
 	device_set_ivars(dev, &sc->host);
 	err = bus_generic_attach(dev);
-out:;
+out:
 	if (err)
 		at91_mci_deactivate(dev);
 	return (err);
diff --git a/sys/arm/at91/at91_pio.c b/sys/arm/at91/at91_pio.c
index 853e588..53dfddb 100644
--- a/sys/arm/at91/at91_pio.c
+++ b/sys/arm/at91/at91_pio.c
@@ -162,7 +162,7 @@ at91_pio_attach(device_t dev)
 		goto out;
 	}
 	sc->cdev->si_drv1 = sc;
-out:;
+out:
 	if (err)
 		at91_pio_deactivate(dev);
 	return (err);
diff --git a/sys/arm/at91/at91_rtc.c b/sys/arm/at91/at91_rtc.c
index e1a8f25..934fd22 100644
--- a/sys/arm/at91/at91_rtc.c
+++ b/sys/arm/at91/at91_rtc.c
@@ -118,7 +118,7 @@ at91_rtc_attach(device_t dev)
 		goto out;
 	}
 	clock_register(dev, 1000000);
-out:;
+out:
 	if (err)
 		at91_rtc_deactivate(dev);
 	return (err);
diff --git a/sys/arm/at91/at91_spi.c b/sys/arm/at91/at91_spi.c
index 2252f00..e5bf52f 100644
--- a/sys/arm/at91/at91_spi.c
+++ b/sys/arm/at91/at91_spi.c
@@ -134,7 +134,7 @@ at91_spi_attach(device_t dev)
 
 	device_add_child(dev, "spibus", -1);
 	bus_generic_attach(dev);
-out:;
+out:
 	if (err)
 		at91_spi_deactivate(dev);
 	return (err);
@@ -259,7 +259,7 @@ at91_spi_transfer(device_t dev, device_t child, struct spi_command *cmd)
 	for (j = 0; j < i; j++)
 		bus_dmamap_unload(sc->dmatag, sc->map[j]);
 	return (err);
-out:;
+out:
 	for (j = 0; j < i; j++)
 		bus_dmamap_unload(sc->dmatag, sc->map[j]);
 	return (EIO);
diff --git a/sys/arm/at91/at91_ssc.c b/sys/arm/at91/at91_ssc.c
index e6b1c7f..12ae90a 100644
--- a/sys/arm/at91/at91_ssc.c
+++ b/sys/arm/at91/at91_ssc.c
@@ -150,7 +150,7 @@ at91_ssc_attach(device_t dev)
 	WR4(sc, SSC_TFMR,
 	    0x1f | SSC_TFMR_DATDEF | SSC_TFMR_MSFBF | SSC_TFMR_FSOS_NEG_PULSE);
 
-out:;
+out:
 	if (err)
 		at91_ssc_deactivate(dev);
 	return (err);
diff --git a/sys/arm/at91/at91_twi.c b/sys/arm/at91/at91_twi.c
index fdd377a..a70fed0 100644
--- a/sys/arm/at91/at91_twi.c
+++ b/sys/arm/at91/at91_twi.c
@@ -139,7 +139,7 @@ at91_twi_attach(device_t dev)
 		device_printf(dev, "could not allocate iicbus instance\n");
 	/* probe and attach the iicbus */
 	bus_generic_attach(dev);
-out:;
+out:
 	if (err)
 		at91_twi_deactivate(dev);
 	return (err);
@@ -365,7 +365,7 @@ at91_twi_transfer(device_t dev, struct iic_msg *msgs, uint32_t nmsgs)
 		if ((err = at91_twi_wait(sc, TWI_SR_TXCOMP)))
 			break;
 	}
-out:;
+out:
 	if (err) {
 		WR4(sc, TWI_CR, TWI_CR_SWRST);
 		WR4(sc, TWI_CR, TWI_CR_MSEN | TWI_CR_SVDIS);
diff --git a/sys/arm/at91/uart_dev_at91usart.c b/sys/arm/at91/uart_dev_at91usart.c
index f3d21aa..d1a52ba 100644
--- a/sys/arm/at91/uart_dev_at91usart.c
+++ b/sys/arm/at91/uart_dev_at91usart.c
@@ -406,7 +406,7 @@ at91_usart_bus_attach(struct uart_softc *sc)
 		WR4(&sc->sc_bas, USART_IER, USART_CSR_RXRDY);
 	}
 	WR4(&sc->sc_bas, USART_IER, USART_CSR_RXBRK);
-errout:;
+errout:
 	// XXX bad
 	return (err);
 }
diff --git a/sys/arm/econa/if_ece.c b/sys/arm/econa/if_ece.c
index a7433f2..5169101 100644
--- a/sys/arm/econa/if_ece.c
+++ b/sys/arm/econa/if_ece.c
@@ -441,7 +441,7 @@ ece_attach(device_t dev)
 	taskqueue_start_threads(&sc->sc_tq, 1, PI_NET, "%s taskq",
 	    device_get_nameunit(sc->dev));
 
-out:;
+out:
 	if (err)
 		ece_deactivate(dev);
 	if (err && ifp)
diff --git a/sys/dev/ath/ah_osdep.c b/sys/dev/ath/ah_osdep.c
index cceb9a4..54dfb73 100644
--- a/sys/dev/ath/ah_osdep.c
+++ b/sys/dev/ath/ah_osdep.c
@@ -128,7 +128,7 @@ void
 DO_HALDEBUG(struct ath_hal *ah, u_int mask, const char* fmt, ...)
 {
 	if ((mask == HAL_DEBUG_UNMASKABLE) ||
-	    (ah->ah_config.ah_debug & mask) ||
+	    (ah != NULL && ah->ah_config.ah_debug & mask) ||
 	    (ath_hal_debug & mask)) {
 		__va_list ap;
 		va_start(ap, fmt);
diff --git a/sys/dev/ath/ath_hal/ah_internal.h b/sys/dev/ath/ath_hal/ah_internal.h
index 79184bd..657618d 100644
--- a/sys/dev/ath/ath_hal/ah_internal.h
+++ b/sys/dev/ath/ath_hal/ah_internal.h
@@ -503,26 +503,15 @@ extern	void ath_hal_free(void *);
 extern	int ath_hal_debug;	/* Global debug flags */
 
 /*
- * This is used for global debugging, when ahp doesn't yet have the
- * related debugging state. For example, during probe/attach.
- */
-#define	HALDEBUG_G(_ah, __m, ...) \
-	do {							\
-		if ((__m) == HAL_DEBUG_UNMASKABLE ||		\
-		    ath_hal_debug & (__m)) {			\
-			DO_HALDEBUG((_ah), (__m), __VA_ARGS__);	\
-		}						\
-	} while (0);
-
-/*
- * This is used for local debugging, when ahp isn't NULL and
- * thus may have debug flags set.
+ * The typecast is purely because some callers will pass in
+ * AH_NULL directly rather than using a NULL ath_hal pointer.
  */
 #define	HALDEBUG(_ah, __m, ...) \
 	do {							\
 		if ((__m) == HAL_DEBUG_UNMASKABLE ||		\
 		    ath_hal_debug & (__m) ||			\
-		    (_ah)->ah_config.ah_debug & (__m)) {	\
+		    ((_ah) != NULL &&				\
+		      ((struct ath_hal *) (_ah))->ah_config.ah_debug & (__m))) {	\
 			DO_HALDEBUG((_ah), (__m), __VA_ARGS__);	\
 		}						\
 	} while(0);
@@ -531,7 +520,6 @@ extern	void DO_HALDEBUG(struct ath_hal *ah, u_int mask, const char* fmt, ...)
 	__printflike(3,4);
 #else
 #define HALDEBUG(_ah, __m, ...)
-#define HALDEBUG_G(_ah, __m, ...)
 #endif /* AH_DEBUG */
 
 /*
diff --git a/sys/dev/ath/ath_hal/ah_regdomain.c b/sys/dev/ath/ath_hal/ah_regdomain.c
index 7298c6b..13f3e42 100644
--- a/sys/dev/ath/ath_hal/ah_regdomain.c
+++ b/sys/dev/ath/ath_hal/ah_regdomain.c
@@ -169,7 +169,7 @@ isEepromValid(struct ath_hal *ah)
 			if (regDomainPairs[i].regDmnEnum == rd)
 				return AH_TRUE;
 	}
-	HALDEBUG_G(ah, HAL_DEBUG_REGDOMAIN,
+	HALDEBUG(ah, HAL_DEBUG_REGDOMAIN,
 	    "%s: invalid regulatory domain/country code 0x%x\n", __func__, rd);
 	return AH_FALSE;
 }
@@ -613,7 +613,7 @@ ath_hal_mapgsm(int sku, int freq)
 		return 1544 + freq;
 	if (sku == SKU_SR9)
 		return 3344 - freq;
-	HALDEBUG_G(AH_NULL, HAL_DEBUG_ANY,
+	HALDEBUG(AH_NULL, HAL_DEBUG_ANY,
 	    "%s: cannot map freq %u unknown gsm sku %u\n",
 	    __func__, freq, sku);
 	return freq;
diff --git a/sys/dev/ath/ath_hal/ar5210/ar5210_attach.c b/sys/dev/ath/ath_hal/ar5210/ar5210_attach.c
index 79c3055..c624e7a 100644
--- a/sys/dev/ath/ath_hal/ar5210/ar5210_attach.c
+++ b/sys/dev/ath/ath_hal/ar5210/ar5210_attach.c
@@ -182,14 +182,14 @@ ar5210Attach(uint16_t devid, HAL_SOFTC sc, HAL_BUS_TAG st, HAL_BUS_HANDLE sh,
 	HAL_STATUS ecode;
 	int i;
 
-	HALDEBUG_G(AH_NULL, HAL_DEBUG_ATTACH,
+	HALDEBUG(AH_NULL, HAL_DEBUG_ATTACH,
 	    "%s: devid 0x%x sc %p st %p sh %p\n", __func__, devid,
 	    sc, (void*) st, (void*) sh);
 
 	/* NB: memory is returned zero'd */
 	ahp = ath_hal_malloc(sizeof (struct ath_hal_5210));
 	if (ahp == AH_NULL) {
-		HALDEBUG_G(AH_NULL, HAL_DEBUG_ANY,
+		HALDEBUG(AH_NULL, HAL_DEBUG_ANY,
 		    "%s: no memory for state block\n", __func__);
 		ecode = HAL_ENOMEM;
 		goto bad;
diff --git a/sys/dev/ath/ath_hal/ar5211/ar5211_attach.c b/sys/dev/ath/ath_hal/ar5211/ar5211_attach.c
index a0c42b2..e9def44 100644
--- a/sys/dev/ath/ath_hal/ar5211/ar5211_attach.c
+++ b/sys/dev/ath/ath_hal/ar5211/ar5211_attach.c
@@ -201,13 +201,13 @@ ar5211Attach(uint16_t devid, HAL_SOFTC sc,
 	uint16_t eeval;
 	HAL_STATUS ecode;
 
-	HALDEBUG_G(AH_NULL, HAL_DEBUG_ATTACH, "%s: sc %p st %p sh %p\n",
+	HALDEBUG(AH_NULL, HAL_DEBUG_ATTACH, "%s: sc %p st %p sh %p\n",
 	    __func__, sc, (void*) st, (void*) sh);
 
 	/* NB: memory is returned zero'd */
 	ahp = ath_hal_malloc(sizeof (struct ath_hal_5211));
 	if (ahp == AH_NULL) {
-		HALDEBUG_G(AH_NULL, HAL_DEBUG_ANY,
+		HALDEBUG(AH_NULL, HAL_DEBUG_ANY,
 		    "%s: cannot allocate memory for state block\n", __func__);
 		ecode = HAL_ENOMEM;
 		goto bad;
diff --git a/sys/dev/ath/ath_hal/ar5212/ar5112.c b/sys/dev/ath/ath_hal/ar5212/ar5112.c
index 1003068..c1920b9 100644
--- a/sys/dev/ath/ath_hal/ar5212/ar5112.c
+++ b/sys/dev/ath/ath_hal/ar5212/ar5112.c
@@ -611,7 +611,7 @@ getFullPwrTable(uint16_t numPcdacs, uint16_t *pcdacs, int16_t *power, int16_t ma
 	uint16_t    idxR = 1;
 
 	if (numPcdacs < 2) {
-		HALDEBUG_G(AH_NULL, HAL_DEBUG_ANY,
+		HALDEBUG(AH_NULL, HAL_DEBUG_ANY,
 		     "%s: at least 2 pcdac values needed [%d]\n",
 		     __func__, numPcdacs);
 		return AH_FALSE;
diff --git a/sys/dev/ath/ath_hal/ar5212/ar5212_attach.c b/sys/dev/ath/ath_hal/ar5212/ar5212_attach.c
index eaceaba..b2a630c 100644
--- a/sys/dev/ath/ath_hal/ar5212/ar5212_attach.c
+++ b/sys/dev/ath/ath_hal/ar5212/ar5212_attach.c
@@ -319,13 +319,13 @@ ar5212Attach(uint16_t devid, HAL_SOFTC sc,
 	uint16_t eeval;
 	HAL_STATUS ecode;
 
-	HALDEBUG_G(AH_NULL, HAL_DEBUG_ATTACH, "%s: sc %p st %p sh %p\n",
+	HALDEBUG(AH_NULL, HAL_DEBUG_ATTACH, "%s: sc %p st %p sh %p\n",
 	    __func__, sc, (void*) st, (void*) sh);
 
 	/* NB: memory is returned zero'd */
 	ahp = ath_hal_malloc(sizeof (struct ath_hal_5212));
 	if (ahp == AH_NULL) {
-		HALDEBUG_G(AH_NULL, HAL_DEBUG_ANY,
+		HALDEBUG(AH_NULL, HAL_DEBUG_ANY,
 		    "%s: cannot allocate memory for state block\n", __func__);
 		*status = HAL_ENOMEM;
 		return AH_NULL;
diff --git a/sys/dev/ath/ath_hal/ar5312/ar5312_attach.c b/sys/dev/ath/ath_hal/ar5312/ar5312_attach.c
index d1689d5..4ca1a4d 100644
--- a/sys/dev/ath/ath_hal/ar5312/ar5312_attach.c
+++ b/sys/dev/ath/ath_hal/ar5312/ar5312_attach.c
@@ -71,13 +71,13 @@ ar5312Attach(uint16_t devid, HAL_SOFTC sc,
 	uint16_t eeval;
 	HAL_STATUS ecode;
 
-	HALDEBUG_G(AH_NULL, HAL_DEBUG_ATTACH, "%s: sc %p st %p sh %p\n",
+	HALDEBUG(AH_NULL, HAL_DEBUG_ATTACH, "%s: sc %p st %p sh %p\n",
 		 __func__, sc, st, (void*) sh);
 
 	/* NB: memory is returned zero'd */
 	ahp = ath_hal_malloc(sizeof (struct ath_hal_5212));
 	if (ahp == AH_NULL) {
-		HALDEBUG_G(AH_NULL, HAL_DEBUG_ANY,
+		HALDEBUG(AH_NULL, HAL_DEBUG_ANY,
 		    "%s: cannot allocate memory for state block\n", __func__);
 		*status = HAL_ENOMEM;
 		return AH_NULL;
diff --git a/sys/dev/ath/ath_hal/ar5416/ar5416_attach.c b/sys/dev/ath/ath_hal/ar5416/ar5416_attach.c
index 12589f2..9a33f7c 100644
--- a/sys/dev/ath/ath_hal/ar5416/ar5416_attach.c
+++ b/sys/dev/ath/ath_hal/ar5416/ar5416_attach.c
@@ -246,7 +246,7 @@ ar5416Attach(uint16_t devid, HAL_SOFTC sc,
 	HAL_STATUS ecode;
 	HAL_BOOL rfStatus;
 
-	HALDEBUG_G(AH_NULL, HAL_DEBUG_ATTACH, "%s: sc %p st %p sh %p\n",
+	HALDEBUG(AH_NULL, HAL_DEBUG_ATTACH, "%s: sc %p st %p sh %p\n",
 	    __func__, sc, (void*) st, (void*) sh);
 
 	/* NB: memory is returned zero'd */
@@ -255,7 +255,7 @@ ar5416Attach(uint16_t devid, HAL_SOFTC sc,
 		sizeof(ar5416Addac)
 	);
 	if (ahp5416 == AH_NULL) {
-		HALDEBUG_G(AH_NULL, HAL_DEBUG_ANY,
+		HALDEBUG(AH_NULL, HAL_DEBUG_ANY,
 		    "%s: cannot allocate memory for state block\n", __func__);
 		*status = HAL_ENOMEM;
 		return AH_NULL;
diff --git a/sys/dev/ath/ath_hal/ar5416/ar5416_interrupts.c b/sys/dev/ath/ath_hal/ar5416/ar5416_interrupts.c
index 03d3544..3bc2cc5 100644
--- a/sys/dev/ath/ath_hal/ar5416/ar5416_interrupts.c
+++ b/sys/dev/ath/ath_hal/ar5416/ar5416_interrupts.c
@@ -68,6 +68,7 @@ HAL_BOOL
 ar5416GetPendingInterrupts(struct ath_hal *ah, HAL_INT *masked)
 {
 	uint32_t isr, isr0, isr1, sync_cause = 0;
+	HAL_CAPABILITIES *pCap = &AH_PRIVATE(ah)->ah_caps;
 
 	/*
 	 * Verify there's a mac interrupt and the RTC is on.
@@ -110,44 +111,95 @@ ar5416GetPendingInterrupts(struct ath_hal *ah, HAL_INT *masked)
 				mask2 |= HAL_INT_CST;	
 			if (isr2 & AR_ISR_S2_TSFOOR)
 				mask2 |= HAL_INT_TSFOOR;
+
+			/*
+			 * Don't mask out AR_BCNMISC; instead mask
+			 * out what causes it.
+			 */
+			OS_REG_WRITE(ah, AR_ISR_S2, isr2);
+			isr &= ~AR_ISR_BCNMISC;
 		}
 
-		isr = OS_REG_READ(ah, AR_ISR_RAC);
 		if (isr == 0xffffffff) {
 			*masked = 0;
 			return AH_FALSE;
 		}
 
 		*masked = isr & HAL_INT_COMMON;
+
+		if (isr & (AR_ISR_RXMINTR | AR_ISR_RXINTM))
+			*masked |= HAL_INT_RX;
+		if (isr & (AR_ISR_TXMINTR | AR_ISR_TXINTM))
+			*masked |= HAL_INT_TX;
+
+		/*
+		 * When doing RX interrupt mitigation, the RXOK bit is set
+		 * in AR_ISR even if the relevant bit in AR_IMR is clear.
+		 * Since this interrupt may be due to another source, don't
+		 * just automatically set HAL_INT_RX if it's set, otherwise
+		 * we could prematurely service the RX queue.
+		 *
+		 * In some cases, the driver can even handle all the RX
+		 * frames just before the mitigation interrupt fires.
+		 * The subsequent RX processing trip will then end up
+		 * processing 0 frames.
+		 */
+#ifdef	AH_AR5416_INTERRUPT_MITIGATION
+		if (isr & AR_ISR_RXERR)
+			*masked |= HAL_INT_RX;
+#else
 		if (isr & (AR_ISR_RXOK | AR_ISR_RXERR))
 			*masked |= HAL_INT_RX;
-		if (isr & (AR_ISR_TXOK | AR_ISR_TXDESC | AR_ISR_TXERR | AR_ISR_TXEOL)) {
+#endif
+
+		if (isr & (AR_ISR_TXOK | AR_ISR_TXDESC | AR_ISR_TXERR |
+		    AR_ISR_TXEOL)) {
 			*masked |= HAL_INT_TX;
-			isr0 = OS_REG_READ(ah, AR_ISR_S0_S);
+
+			isr0 = OS_REG_READ(ah, AR_ISR_S0);
+			OS_REG_WRITE(ah, AR_ISR_S0, isr0);
+			isr1 = OS_REG_READ(ah, AR_ISR_S1);
+			OS_REG_WRITE(ah, AR_ISR_S1, isr1);
+
+			/*
+			 * Don't clear the primary ISR TX bits, clear
+			 * what causes them (S0/S1.)
+			 */
+			isr &= ~(AR_ISR_TXOK | AR_ISR_TXDESC |
+			    AR_ISR_TXERR | AR_ISR_TXEOL);
+
 			ahp->ah_intrTxqs |= MS(isr0, AR_ISR_S0_QCU_TXOK);
 			ahp->ah_intrTxqs |= MS(isr0, AR_ISR_S0_QCU_TXDESC);
-			isr1 = OS_REG_READ(ah, AR_ISR_S1_S);
 			ahp->ah_intrTxqs |= MS(isr1, AR_ISR_S1_QCU_TXERR);
 			ahp->ah_intrTxqs |= MS(isr1, AR_ISR_S1_QCU_TXEOL);
 		}
 
-		if (AR_SREV_MERLIN(ah) || AR_SREV_KITE(ah)) {
+		if ((isr & AR_ISR_GENTMR) || (! pCap->halAutoSleepSupport)) {
 			uint32_t isr5;
-			isr5 = OS_REG_READ(ah, AR_ISR_S5_S);
-			if (isr5 & AR_ISR_S5_TIM_TIMER)
-				*masked |= HAL_INT_TIM_TIMER;
-		}
+			isr5 = OS_REG_READ(ah, AR_ISR_S5);
+			OS_REG_WRITE(ah, AR_ISR_S5, isr5);
+			isr &= ~AR_ISR_GENTMR;
 
-		/* Interrupt Mitigation on AR5416 */
-#ifdef	AH_AR5416_INTERRUPT_MITIGATION
-		if (isr & (AR_ISR_RXMINTR | AR_ISR_RXINTM))
-			*masked |= HAL_INT_RX;
-		if (isr & (AR_ISR_TXMINTR | AR_ISR_TXINTM))
-			*masked |= HAL_INT_TX;
-#endif
+			if (! pCap->halAutoSleepSupport)
+				if (isr5 & AR_ISR_S5_TIM_TIMER)
+					*masked |= HAL_INT_TIM_TIMER;
+		}
 		*masked |= mask2;
 	}
 
+	/*
+	 * Since we're not using AR_ISR_RAC, clear the status bits
+	 * for handled interrupts here. For bits whose interrupt
+	 * source is a secondary register, those bits should've been
+	 * masked out - instead of those bits being written back,
+	 * their source (ie, the secondary status registers) should
+	 * be cleared. That way there are no race conditions with
+	 * new triggers coming in whilst they've been read/cleared.
+	 */
+	OS_REG_WRITE(ah, AR_ISR, isr);
+	/* Flush previous write */
+	OS_REG_READ(ah, AR_ISR);
+
 	if (AR_SREV_HOWL(ah))
 		return AH_TRUE;
 
@@ -216,18 +268,12 @@ ar5416SetInterrupts(struct ath_hal *ah, HAL_INT ints)
 	 * Overwrite default mask if Interrupt mitigation
 	 * is specified for AR5416
 	 */
-	mask = ints & HAL_INT_COMMON;
-	if (ints & HAL_INT_TX)
-		mask |= AR_IMR_TXMINTR | AR_IMR_TXINTM;
 	if (ints & HAL_INT_RX)
 		mask |= AR_IMR_RXERR | AR_IMR_RXMINTR | AR_IMR_RXINTM;
-	if (ints & HAL_INT_TX) {
-		if (ahp->ah_txErrInterruptMask)
-			mask |= AR_IMR_TXERR;
-		if (ahp->ah_txEolInterruptMask)
-			mask |= AR_IMR_TXEOL;
-	}
 #else
+	if (ints & HAL_INT_RX)
+		mask |= AR_IMR_RXOK | AR_IMR_RXERR | AR_IMR_RXDESC;
+#endif
 	if (ints & HAL_INT_TX) {
 		if (ahp->ah_txOkInterruptMask)
 			mask |= AR_IMR_TXOK;
@@ -238,9 +284,6 @@ ar5416SetInterrupts(struct ath_hal *ah, HAL_INT ints)
 		if (ahp->ah_txEolInterruptMask)
 			mask |= AR_IMR_TXEOL;
 	}
-	if (ints & HAL_INT_RX)
-		mask |= AR_IMR_RXOK | AR_IMR_RXERR | AR_IMR_RXDESC;
-#endif
 	if (ints & (HAL_INT_BMISC)) {
 		mask |= AR_IMR_BCNMISC;
 		if (ints & HAL_INT_TIM)
diff --git a/sys/dev/ath/ath_hal/ar5416/ar5416_recv.c b/sys/dev/ath/ath_hal/ar5416/ar5416_recv.c
index 289da42..de4343e 100644
--- a/sys/dev/ath/ath_hal/ar5416/ar5416_recv.c
+++ b/sys/dev/ath/ath_hal/ar5416/ar5416_recv.c
@@ -107,7 +107,6 @@ ar5416SetupRxDesc(struct ath_hal *ah, struct ath_desc *ds,
     uint32_t size, u_int flags)
 {
 	struct ar5416_desc *ads = AR5416DESC(ds);
-	HAL_CAPABILITIES *pCap = &AH_PRIVATE(ah)->ah_caps;
 
 	HALASSERT((size &~ AR_BufLen) == 0);
 
@@ -119,8 +118,7 @@ ar5416SetupRxDesc(struct ath_hal *ah, struct ath_desc *ds,
 	ads->ds_rxstatus8 &= ~AR_RxDone;
 
 	/* clear the rest of the status fields */
-	if (! pCap->halAutoSleepSupport)
-        	OS_MEMZERO(&(ads->u), sizeof(ads->u));
+	OS_MEMZERO(&(ads->u), sizeof(ads->u));
 
 	return AH_TRUE;
 }
diff --git a/sys/dev/ath/ath_hal/ar5416/ar5416_reset.c b/sys/dev/ath/ath_hal/ar5416/ar5416_reset.c
index 112d966..2ffc676 100644
--- a/sys/dev/ath/ath_hal/ar5416/ar5416_reset.c
+++ b/sys/dev/ath/ath_hal/ar5416/ar5416_reset.c
@@ -358,12 +358,32 @@ ar5416Reset(struct ath_hal *ah, HAL_OPMODE opmode,
 	OS_REG_WRITE(ah, AR_OBS, 8);
 
 #ifdef	AH_AR5416_INTERRUPT_MITIGATION
+	/*
+	 * Disable the "general" TX/RX mitigation timers.
+	 */
 	OS_REG_WRITE(ah, AR_MIRT, 0);
 
-	OS_REG_RMW_FIELD(ah, AR_RIMT, AR_RIMT_LAST, 500);
-	OS_REG_RMW_FIELD(ah, AR_RIMT, AR_RIMT_FIRST, 2000);
-	OS_REG_RMW_FIELD(ah, AR_TIMT, AR_TIMT_LAST, 300);
-	OS_REG_RMW_FIELD(ah, AR_TIMT, AR_TIMT_FIRST, 750);
+	/*
+	 * This initialises the RX interrupt mitigation timers.
+	 *
+	 * The mitigation timers begin at idle and are triggered
+	 * upon the RXOK of a single frame (or sub-frame, for A-MPDU.)
+	 * Then, the RX mitigation interrupt will fire:
+	 *
+	 * + 250uS after the last RX'ed frame, or
+	 * + 700uS after the first RX'ed frame
+	 *
+	 * Thus, the LAST field dictates the extra latency
+	 * induced by the RX mitigation method and the FIRST
+	 * field dictates how long to delay before firing an
+	 * RX mitigation interrupt.
+	 *
+	 * Please note this only seems to be for RXOK frames;
+	 * not CRC or PHY error frames.
+	 *
+	 */
+	OS_REG_RMW_FIELD(ah, AR_RIMT, AR_RIMT_LAST, 250);
+	OS_REG_RMW_FIELD(ah, AR_RIMT, AR_RIMT_FIRST, 700);
 #endif
 	ar5416InitBB(ah, chan);
 
diff --git a/sys/dev/ath/ath_hal/ar5416/ar5416reg.h b/sys/dev/ath/ath_hal/ar5416/ar5416reg.h
index c18c26f..bfd6107 100644
--- a/sys/dev/ath/ath_hal/ar5416/ar5416reg.h
+++ b/sys/dev/ath/ath_hal/ar5416/ar5416reg.h
@@ -250,6 +250,7 @@
 /* Interrupts */
 #define	AR_ISR_TXMINTR		0x00080000	/* Maximum interrupt tx rate */
 #define	AR_ISR_RXMINTR		0x01000000	/* Maximum interrupt rx rate */
+#define	AR_ISR_GENTMR		0x10000000	/* OR of generic timer bits in S5 */
 #define	AR_ISR_TXINTM		0x40000000	/* Tx int after mitigation */
 #define	AR_ISR_RXINTM		0x80000000	/* Rx int after mitigation */
 
diff --git a/sys/dev/ath/ath_hal/ar9001/ar9130_attach.c b/sys/dev/ath/ath_hal/ar9001/ar9130_attach.c
index 518ed85..2a3f3f0 100644
--- a/sys/dev/ath/ath_hal/ar9001/ar9130_attach.c
+++ b/sys/dev/ath/ath_hal/ar9001/ar9130_attach.c
@@ -78,13 +78,13 @@ ar9130Attach(uint16_t devid, HAL_SOFTC sc,
 	HAL_STATUS ecode;
 	HAL_BOOL rfStatus;
 
-	HALDEBUG_G(AH_NULL, HAL_DEBUG_ATTACH, "%s: sc %p st %p sh %p\n",
+	HALDEBUG(AH_NULL, HAL_DEBUG_ATTACH, "%s: sc %p st %p sh %p\n",
 	    __func__, sc, (void*) st, (void*) sh);
 
 	/* NB: memory is returned zero'd */
 	ahp5416 = ath_hal_malloc(sizeof (struct ath_hal_5416));
 	if (ahp5416 == AH_NULL) {
-		HALDEBUG_G(AH_NULL, HAL_DEBUG_ANY,
+		HALDEBUG(AH_NULL, HAL_DEBUG_ANY,
 		    "%s: cannot allocate memory for state block\n", __func__);
 		*status = HAL_ENOMEM;
 		return AH_NULL;
diff --git a/sys/dev/ath/ath_hal/ar9001/ar9160_attach.c b/sys/dev/ath/ath_hal/ar9001/ar9160_attach.c
index 2234eb3..f7ac7c4 100644
--- a/sys/dev/ath/ath_hal/ar9001/ar9160_attach.c
+++ b/sys/dev/ath/ath_hal/ar9001/ar9160_attach.c
@@ -123,13 +123,13 @@ ar9160Attach(uint16_t devid, HAL_SOFTC sc,
 	HAL_STATUS ecode;
 	HAL_BOOL rfStatus;
 
-	HALDEBUG_G(AH_NULL, HAL_DEBUG_ATTACH, "%s: sc %p st %p sh %p\n",
+	HALDEBUG(AH_NULL, HAL_DEBUG_ATTACH, "%s: sc %p st %p sh %p\n",
 	    __func__, sc, (void*) st, (void*) sh);
 
 	/* NB: memory is returned zero'd */
 	ahp5416 = ath_hal_malloc(sizeof (struct ath_hal_5416));
 	if (ahp5416 == AH_NULL) {
-		HALDEBUG_G(AH_NULL, HAL_DEBUG_ANY,
+		HALDEBUG(AH_NULL, HAL_DEBUG_ANY,
 		    "%s: cannot allocate memory for state block\n", __func__);
 		*status = HAL_ENOMEM;
 		return AH_NULL;
diff --git a/sys/dev/ath/ath_hal/ar9002/ar9280_attach.c b/sys/dev/ath/ath_hal/ar9002/ar9280_attach.c
index 4f4b8ba..62864b5 100644
--- a/sys/dev/ath/ath_hal/ar9002/ar9280_attach.c
+++ b/sys/dev/ath/ath_hal/ar9002/ar9280_attach.c
@@ -153,13 +153,13 @@ ar9280Attach(uint16_t devid, HAL_SOFTC sc,
 	int8_t pwr_table_offset;
 	uint8_t pwr;
 
-	HALDEBUG_G(AH_NULL, HAL_DEBUG_ATTACH, "%s: sc %p st %p sh %p\n",
+	HALDEBUG(AH_NULL, HAL_DEBUG_ATTACH, "%s: sc %p st %p sh %p\n",
 	    __func__, sc, (void*) st, (void*) sh);
 
 	/* NB: memory is returned zero'd */
 	ahp9280 = ath_hal_malloc(sizeof (struct ath_hal_9280));
 	if (ahp9280 == AH_NULL) {
-		HALDEBUG_G(AH_NULL, HAL_DEBUG_ANY,
+		HALDEBUG(AH_NULL, HAL_DEBUG_ANY,
 		    "%s: cannot allocate memory for state block\n", __func__);
 		*status = HAL_ENOMEM;
 		return AH_NULL;
diff --git a/sys/dev/ath/ath_hal/ar9002/ar9285_attach.c b/sys/dev/ath/ath_hal/ar9002/ar9285_attach.c
index 02c7b98..0fbe414 100644
--- a/sys/dev/ath/ath_hal/ar9002/ar9285_attach.c
+++ b/sys/dev/ath/ath_hal/ar9002/ar9285_attach.c
@@ -118,13 +118,13 @@ ar9285Attach(uint16_t devid, HAL_SOFTC sc,
 	HAL_STATUS ecode;
 	HAL_BOOL rfStatus;
 
-	HALDEBUG_G(AH_NULL, HAL_DEBUG_ATTACH, "%s: sc %p st %p sh %p\n",
+	HALDEBUG(AH_NULL, HAL_DEBUG_ATTACH, "%s: sc %p st %p sh %p\n",
 	    __func__, sc, (void*) st, (void*) sh);
 
 	/* NB: memory is returned zero'd */
 	ahp9285 = ath_hal_malloc(sizeof (struct ath_hal_9285));
 	if (ahp9285 == AH_NULL) {
-		HALDEBUG_G(AH_NULL, HAL_DEBUG_ANY,
+		HALDEBUG(AH_NULL, HAL_DEBUG_ANY,
 		    "%s: cannot allocate memory for state block\n", __func__);
 		*status = HAL_ENOMEM;
 		return AH_NULL;
diff --git a/sys/dev/ath/ath_hal/ar9002/ar9287_attach.c b/sys/dev/ath/ath_hal/ar9002/ar9287_attach.c
index 78400f5..5c0de21 100644
--- a/sys/dev/ath/ath_hal/ar9002/ar9287_attach.c
+++ b/sys/dev/ath/ath_hal/ar9002/ar9287_attach.c
@@ -119,13 +119,13 @@ ar9287Attach(uint16_t devid, HAL_SOFTC sc,
 	HAL_BOOL rfStatus;
 	int8_t pwr_table_offset;
 
-	HALDEBUG_G(AH_NULL, HAL_DEBUG_ATTACH, "%s: sc %p st %p sh %p\n",
+	HALDEBUG(AH_NULL, HAL_DEBUG_ATTACH, "%s: sc %p st %p sh %p\n",
 	    __func__, sc, (void*) st, (void*) sh);
 
 	/* NB: memory is returned zero'd */
 	ahp9287 = ath_hal_malloc(sizeof (struct ath_hal_9287));
 	if (ahp9287 == AH_NULL) {
-		HALDEBUG_G(AH_NULL, HAL_DEBUG_ANY,
+		HALDEBUG(AH_NULL, HAL_DEBUG_ANY,
 		    "%s: cannot allocate memory for state block\n", __func__);
 		*status = HAL_ENOMEM;
 		return AH_NULL;
diff --git a/sys/dev/puc/pucdata.c b/sys/dev/puc/pucdata.c
index f675b69..5c7f5ed 100644
--- a/sys/dev/puc/pucdata.c
+++ b/sys/dev/puc/pucdata.c
@@ -733,6 +733,13 @@ const struct puc_cfg puc_pci_devices[] = {
 	 * <URL:http://www.startech.com>
 	 */
 
+	{   0x1415, 0xc138, 0xffff, 0,
+	    "Oxford Semiconductor OXPCIe952 UARTs",
+	    DEFAULT_RCLK * 0x22,
+	    PUC_PORT_NONSTANDARD, 0x10, 0, -1,
+	    .config_function = puc_config_oxford_pcie
+	},
+
 	{   0x1415, 0xc158, 0xffff, 0,
 	    "Oxford Semiconductor OXPCIe952 UARTs",
 	    DEFAULT_RCLK * 0x22,
diff --git a/sys/kern/kern_sig.c b/sys/kern/kern_sig.c
index 8622b41..188bf83 100644
--- a/sys/kern/kern_sig.c
+++ b/sys/kern/kern_sig.c
@@ -1094,6 +1094,8 @@ sys_sigwait(struct thread *td, struct sigwait_args *uap)
 
 	error = kern_sigtimedwait(td, set, &ksi, NULL);
 	if (error) {
+		if (error == EINTR && td->td_proc->p_osrel < P_OSREL_SIGWAIT)
+			error = ERESTART;
 		if (error == ERESTART)
 			return (error);
 		td->td_retval[0] = error;
diff --git a/sys/mips/mips/machdep.c b/sys/mips/mips/machdep.c
index f7e5248..e348e41 100644
--- a/sys/mips/mips/machdep.c
+++ b/sys/mips/mips/machdep.c
@@ -485,9 +485,24 @@ spinlock_exit(void)
 /*
  * call platform specific code to halt (until next interrupt) for the idle loop
  */
+/*
+ * This is disabled because of three issues:
+ *
+ * + By calling critical_enter(), any interrupt which occurs after that but
+ *   before the wait instruction will be handled but not serviced (in the case
+ *   of a netisr) because preemption is not allowed at this point;
+ * + Any fast interrupt handler which schedules an immediate or fast callout
+ *   will not occur until the wait instruction is interrupted, as the clock
+ *   has already been set by cpu_idleclock();
+ * + There is currently no known way to atomically enable interrupts and call
+ *   wait, which is how the i386/amd64 code gets around (1). Thus even if
+ *   interrupts were disabled and reenabled just before the wait call, any
+ *   interrupt that did occur may not interrupt wait.
+ */
 void
 cpu_idle(int busy)
 {
+#if 0
 	KASSERT((mips_rd_status() & MIPS_SR_INT_IE) != 0,
 		("interrupts disabled in idle process."));
 	KASSERT((mips_rd_status() & MIPS_INT_MASK) != 0,
@@ -502,6 +517,7 @@ cpu_idle(int busy)
 		cpu_activeclock();
 		critical_exit();
 	}
+#endif	
 }
 
 int
diff --git a/sys/net80211/ieee80211_proto.c b/sys/net80211/ieee80211_proto.c
index 8dee3f7..b4288b7 100644
--- a/sys/net80211/ieee80211_proto.c
+++ b/sys/net80211/ieee80211_proto.c
@@ -193,7 +193,7 @@ ieee80211_proto_vattach(struct ieee80211vap *vap)
 	vap->iv_rtsthreshold = IEEE80211_RTS_DEFAULT;
 	vap->iv_fragthreshold = IEEE80211_FRAG_DEFAULT;
 	vap->iv_bmiss_max = IEEE80211_BMISS_MAX;
-	callout_init(&vap->iv_swbmiss, CALLOUT_MPSAFE);
+	callout_init_mtx(&vap->iv_swbmiss, IEEE80211_LOCK_OBJ(ic), 0);
 	callout_init(&vap->iv_mgtsend, CALLOUT_MPSAFE);
 	TASK_INIT(&vap->iv_nstate_task, 0, ieee80211_newstate_cb, vap);
 	TASK_INIT(&vap->iv_swbmiss_task, 0, beacon_swmiss, vap);
@@ -1403,7 +1403,7 @@ beacon_miss(void *arg, int npending)
 	struct ieee80211com *ic = arg;
 	struct ieee80211vap *vap;
 
-	/* XXX locking */
+	IEEE80211_LOCK(ic);
 	TAILQ_FOREACH(vap, &ic->ic_vaps, iv_next) {
 		/*
 		 * We only pass events through for sta vap's in RUN state;
@@ -1415,18 +1415,21 @@ beacon_miss(void *arg, int npending)
 		    vap->iv_bmiss != NULL)
 			vap->iv_bmiss(vap);
 	}
+	IEEE80211_UNLOCK(ic);
 }
 
 static void
 beacon_swmiss(void *arg, int npending)
 {
 	struct ieee80211vap *vap = arg;
+	struct ieee80211com *ic = vap->iv_ic;
 
-	if (vap->iv_state != IEEE80211_S_RUN)
-		return;
-
-	/* XXX Call multiple times if npending > zero? */
-	vap->iv_bmiss(vap);
+	IEEE80211_LOCK(ic);
+	if (vap->iv_state == IEEE80211_S_RUN) {
+		/* XXX Call multiple times if npending > zero? */
+		vap->iv_bmiss(vap);
+	}
+	IEEE80211_UNLOCK(ic);
 }
 
 /*
@@ -1440,6 +1443,8 @@ ieee80211_swbmiss(void *arg)
 	struct ieee80211vap *vap = arg;
 	struct ieee80211com *ic = vap->iv_ic;
 
+	IEEE80211_LOCK_ASSERT(ic);
+
 	/* XXX sleep state? */
 	KASSERT(vap->iv_state == IEEE80211_S_RUN,
 	    ("wrong state %d", vap->iv_state));
diff --git a/sys/net80211/ieee80211_sta.c b/sys/net80211/ieee80211_sta.c
index 5444459..97a9dbc 100644
--- a/sys/net80211/ieee80211_sta.c
+++ b/sys/net80211/ieee80211_sta.c
@@ -109,6 +109,8 @@ sta_beacon_miss(struct ieee80211vap *vap)
 {
 	struct ieee80211com *ic = vap->iv_ic;
 
+	IEEE80211_LOCK_ASSERT(ic);
+
 	KASSERT((ic->ic_flags & IEEE80211_F_SCAN) == 0, ("scanning"));
 	KASSERT(vap->iv_state >= IEEE80211_S_RUN,
 	    ("wrong state %s", ieee80211_state_name[vap->iv_state]));
diff --git a/sys/net80211/ieee80211_tdma.c b/sys/net80211/ieee80211_tdma.c
index 8c191ab..ed46c92 100644
--- a/sys/net80211/ieee80211_tdma.c
+++ b/sys/net80211/ieee80211_tdma.c
@@ -285,6 +285,9 @@ static void
 tdma_beacon_miss(struct ieee80211vap *vap)
 {
 	struct ieee80211_tdma_state *ts = vap->iv_tdma;
+	struct ieee80211com *ic = vap->iv_ic;
+
+	IEEE80211_LOCK_ASSERT(ic);
 
 	KASSERT((vap->iv_ic->ic_flags & IEEE80211_F_SCAN) == 0, ("scanning"));
 	KASSERT(vap->iv_state == IEEE80211_S_RUN,
diff --git a/sys/netinet6/nd6.c b/sys/netinet6/nd6.c
index 2b51e43..da06563 100644
--- a/sys/netinet6/nd6.c
+++ b/sys/netinet6/nd6.c
@@ -2042,14 +2042,15 @@ nd6_output_lle(struct ifnet *ifp, struct ifnet *origifp, struct mbuf *m0,
 		if (*chain == NULL)
 			*chain = m;
 		else {
-			struct mbuf *m = *chain;
+			struct mbuf *mb;
 
 			/*
 			 * append mbuf to end of deferred chain
 			 */
-			while (m->m_nextpkt != NULL)
-				m = m->m_nextpkt;
-			m->m_nextpkt = m;
+			mb = *chain;
+			while (mb->m_nextpkt != NULL)
+				mb = mb->m_nextpkt;
+			mb->m_nextpkt = m;
 		}
 		return (error);
 	}
diff --git a/sys/powerpc/powerpc/cpu.c b/sys/powerpc/powerpc/cpu.c
index 9701156..b9625e1 100644
--- a/sys/powerpc/powerpc/cpu.c
+++ b/sys/powerpc/powerpc/cpu.c
@@ -65,6 +65,7 @@
 #include <sys/cpu.h>
 #include <sys/kernel.h>
 #include <sys/proc.h>
+#include <sys/sched.h>
 #include <sys/sysctl.h>
 
 #include <machine/bus.h>
@@ -553,6 +554,11 @@ cpu_idle_60x(void)
 	vers = mfpvr() >> 16;
 
 #ifdef AIM
+	mtmsr(msr & ~PSL_EE);
+	if (sched_runnable()) {
+		mtmsr(msr);
+		return;
+	}
 	switch (vers) {
 	case IBM970:
 	case IBM970FX:
@@ -583,6 +589,11 @@ cpu_idle_e500(void)
 	msr = mfmsr();
 
 #ifdef E500
+	mtmsr(msr & ~PSL_EE);
+	if (sched_runnable()) {
+		mtmsr(msr);
+		return;
+	}
 	/* Freescale E500 core RM section 6.4.1. */
 	__asm __volatile("msync; mtmsr %0; isync" ::
 	    "r" (msr | PSL_WE));
diff --git a/sys/sparc64/include/asmacros.h b/sys/sparc64/include/asmacros.h
index 777b35a..05be6ad 100644
--- a/sys/sparc64/include/asmacros.h
+++ b/sys/sparc64/include/asmacros.h
@@ -49,98 +49,98 @@
 /*
  * Atomically decrement an integer in memory.
  */
-#define	ATOMIC_DEC_INT(r1, r2, r3) \
-	lduw	[r1], r2 ; \
-9:	sub	r2, 1, r3 ; \
-	casa	[r1] ASI_N, r2, r3 ; \
-	cmp	r2, r3 ; \
-	bne,pn	%icc, 9b ; \
+#define	ATOMIC_DEC_INT(r1, r2, r3)					\
+	lduw	[r1], r2 ;						\
+9:	sub	r2, 1, r3 ;						\
+	casa	[r1] ASI_N, r2, r3 ;					\
+	cmp	r2, r3 ;						\
+	bne,pn	%icc, 9b ;						\
 	 mov	r3, r2
 
 /*
  * Atomically increment an integer in memory.
  */
-#define	ATOMIC_INC_INT(r1, r2, r3) \
-	lduw	[r1], r2 ; \
-9:	add	r2, 1, r3 ; \
-	casa	[r1] ASI_N, r2, r3 ; \
-	cmp	r2, r3 ; \
-	bne,pn	%icc, 9b ; \
+#define	ATOMIC_INC_INT(r1, r2, r3)					\
+	lduw	[r1], r2 ;						\
+9:	add	r2, 1, r3 ;						\
+	casa	[r1] ASI_N, r2, r3 ;					\
+	cmp	r2, r3 ;						\
+	bne,pn	%icc, 9b ;						\
 	 mov	r3, r2
 
 /*
- * Atomically increment an u_long in memory.
+ * Atomically increment a long in memory.
  */
-#define	ATOMIC_INC_ULONG(r1, r2, r3) \
-	ldx	[r1], r2 ; \
-9:	add	r2, 1, r3 ; \
-	casxa	[r1] ASI_N, r2, r3 ; \
-	cmp	r2, r3 ; \
-	bne,pn	%icc, 9b ; \
+#define	ATOMIC_INC_LONG(r1, r2, r3)					\
+	ldx	[r1], r2 ;						\
+9:	add	r2, 1, r3 ;						\
+	casxa	[r1] ASI_N, r2, r3 ;					\
+	cmp	r2, r3 ;						\
+	bne,pn	%xcc, 9b ;						\
 	 mov	r3, r2
 
 /*
  * Atomically clear a number of bits of an integer in memory.
  */
-#define	ATOMIC_CLEAR_INT(r1, r2, r3, bits) \
-	lduw	[r1], r2 ; \
-9:	andn	r2, bits, r3 ; \
-	casa	[r1] ASI_N, r2, r3 ; \
-	cmp	r2, r3 ; \
-	bne,pn	%icc, 9b ; \
+#define	ATOMIC_CLEAR_INT(r1, r2, r3, bits)				\
+	lduw	[r1], r2 ;						\
+9:	andn	r2, bits, r3 ;						\
+	casa	[r1] ASI_N, r2, r3 ;					\
+	cmp	r2, r3 ;						\
+	bne,pn	%icc, 9b ;						\
 	 mov	r3, r2
 
 /*
- * Atomically clear a number of bits of an u_long in memory.
+ * Atomically clear a number of bits of a long in memory.
  */
-#define	ATOMIC_CLEAR_LONG(r1, r2, r3, bits) \
-	ldx	[r1], r2 ; \
-9:	andn	r2, bits, r3 ; \
-	casxa	[r1] ASI_N, r2, r3 ; \
-	cmp	r2, r3 ; \
-	bne,pn	%icc, 9b ; \
+#define	ATOMIC_CLEAR_LONG(r1, r2, r3, bits)				\
+	ldx	[r1], r2 ;						\
+9:	andn	r2, bits, r3 ;						\
+	casxa	[r1] ASI_N, r2, r3 ;					\
+	cmp	r2, r3 ;						\
+	bne,pn	%icc, 9b ;						\
 	 mov	r3, r2
 
 #define	PCPU(member)	PCPU_REG + PC_ ## member
-#define	PCPU_ADDR(member, reg) \
+#define	PCPU_ADDR(member, reg)						\
 	add	PCPU_REG, PC_ ## member, reg
 
-#define	DEBUGGER() \
+#define	DEBUGGER()							\
 	ta	%xcc, 1
 
-#define	PANIC(msg, r1) \
-	.sect	.rodata ; \
-9:	.asciz	msg ; \
-	.previous ; \
-	SET(9b, r1, %o0) ; \
-	call	panic ; \
+#define	PANIC(msg, r1)							\
+	.sect	.rodata ;						\
+9:	.asciz	msg ;							\
+	.previous ;							\
+	SET(9b, r1, %o0) ;						\
+	call	panic ;							\
 	 nop
 
 #ifdef INVARIANTS
-#define	KASSERT(r1, msg) \
-	brnz,pt	r1, 8f ; \
-	 nop ; \
-	PANIC(msg, r1) ; \
+#define	KASSERT(r1, msg)						\
+	brnz,pt	r1, 8f ;						\
+	 nop ;								\
+	PANIC(msg, r1) ;						\
 8:
 #else
 #define	KASSERT(r1, msg)
 #endif
 
-#define	PUTS(msg, r1) \
-	.sect	.rodata ; \
-9:	.asciz	msg ; \
-	.previous ; \
-	SET(9b, r1, %o0) ; \
-	call	printf ; \
+#define	PUTS(msg, r1)							\
+	.sect	.rodata ;						\
+9:	.asciz	msg ;							\
+	.previous ;							\
+	SET(9b, r1, %o0) ;						\
+	call	printf ;						\
 	 nop
 
 #define	_ALIGN_DATA	.align 8
 
-#define	DATA(name) \
-	.data ; \
-	_ALIGN_DATA ; \
-	.globl	name ; \
-	.type	name, @object ; \
+#define	DATA(name)							\
+	.data ;								\
+	_ALIGN_DATA ;							\
+	.globl	name ;							\
+	.type	name, @object ;						\
 name:
 
 #define	EMPTY
diff --git a/sys/sparc64/include/atomic.h b/sys/sparc64/include/atomic.h
index d663fbc..a47ce32 100644
--- a/sys/sparc64/include/atomic.h
+++ b/sys/sparc64/include/atomic.h
@@ -33,6 +33,10 @@
 
 #include <machine/cpufunc.h>
 
+#define	mb()	__asm__ __volatile__ ("membar #MemIssue": : :"memory")
+#define	wmb()	mb()
+#define	rmb()	mb()
+
 /* Userland needs different ASI's. */
 #ifdef _KERNEL
 #define	__ASI_ATOMIC	ASI_N
@@ -40,10 +44,6 @@
 #define	__ASI_ATOMIC	ASI_P
 #endif
 
-#define mb()	__asm__ __volatile__ ("membar #MemIssue": : :"memory")
-#define wmb()	mb()
-#define rmb()	mb()
-
 /*
  * Various simple arithmetic on memory which is atomic in the presence
  * of interrupts and multiple processors.  See atomic(9) for details.
@@ -74,41 +74,44 @@
  *
  * the return value of cas is used to avoid the extra reload.
  *
- * The memory barriers provided by the acq and rel variants are intended
- * to be sufficient for use of relaxed memory ordering.  Due to the
- * suggested assembly syntax of the membar operands containing a #
- * character, they cannot be used in macros.  The cmask and mmask bits
+ * We only include a memory barrier in the rel variants as in total store
+ * order which we use for running the kernel and all of the userland atomic
+ * loads and stores behave as if the were followed by a membar with a mask
+ * of #LoadLoad | #LoadStore | #StoreStore.  In order to be also sufficient
+ * for use of relaxed memory ordering, the atomic_cas() in the acq variants 
+ * additionally would have to be followed by a membar #LoadLoad | #LoadStore.
+ * Due to the suggested assembly syntax of the membar operands containing a
+ * # character, they cannot be used in macros.  The cmask and mmask bits thus
  * are hard coded in machine/cpufunc.h and used here through macros.
- * Hopefully sun will choose not to change the bit numbers.
+ * Hopefully the bit numbers won't change in the future.
  */
 
 #define	itype(sz)	uint ## sz ## _t
 
-#define	atomic_cas_32(p, e, s)	casa(p, e, s, __ASI_ATOMIC)
-#define	atomic_cas_64(p, e, s)	casxa(p, e, s, __ASI_ATOMIC)
+#define	atomic_cas_32(p, e, s)	casa((p), (e), (s), __ASI_ATOMIC)
+#define	atomic_cas_64(p, e, s)	casxa((p), (e), (s), __ASI_ATOMIC)
 
 #define	atomic_cas(p, e, s, sz)						\
-	atomic_cas_ ## sz(p, e, s)
+	atomic_cas_ ## sz((p), (e), (s))
 
 #define	atomic_cas_acq(p, e, s, sz) ({					\
 	itype(sz) v;							\
-	v = atomic_cas(p, e, s, sz);					\
-	membar(LoadLoad | LoadStore);					\
+	v = atomic_cas((p), (e), (s), sz);				\
 	v;								\
 })
 
 #define	atomic_cas_rel(p, e, s, sz) ({					\
 	itype(sz) v;							\
 	membar(LoadStore | StoreStore);					\
-	v = atomic_cas(p, e, s, sz);					\
+	v = atomic_cas((p), (e), (s), sz);				\
 	v;								\
 })
 
 #define	atomic_op(p, op, v, sz) ({					\
 	itype(sz) e, r, s;						\
-	for (e = *(volatile itype(sz) *)p;; e = r) {			\
-		s = e op v;						\
-		r = atomic_cas_ ## sz(p, e, s);				\
+	for (e = *(volatile itype(sz) *)(p);; e = r) {			\
+		s = e op (v);						\
+		r = atomic_cas_ ## sz((p), e, s);			\
 		if (r == e)						\
 			break;						\
 	}								\
@@ -117,32 +120,30 @@
 
 #define	atomic_op_acq(p, op, v, sz) ({					\
 	itype(sz) t;							\
-	t = atomic_op(p, op, v, sz);					\
-	membar(LoadLoad | LoadStore);					\
+	t = atomic_op((p), op, (v), sz);				\
 	t;								\
 })
 
 #define	atomic_op_rel(p, op, v, sz) ({					\
 	itype(sz) t;							\
 	membar(LoadStore | StoreStore);					\
-	t = atomic_op(p, op, v, sz);					\
+	t = atomic_op((p), op, (v), sz);				\
 	t;								\
 })
 
 #define	atomic_load(p, sz)						\
-	atomic_cas(p, 0, 0, sz)
+	atomic_cas((p), 0, 0, sz)
 
 #define	atomic_load_acq(p, sz) ({					\
 	itype(sz) v;							\
-	v = atomic_load(p, sz);						\
-	membar(LoadLoad | LoadStore);					\
+	v = atomic_load((p), sz);					\
 	v;								\
 })
 
 #define	atomic_load_clear(p, sz) ({					\
 	itype(sz) e, r;							\
-	for (e = *(volatile itype(sz) *)p;; e = r) {			\
-		r = atomic_cas(p, e, 0, sz);				\
+	for (e = *(volatile itype(sz) *)(p);; e = r) {			\
+		r = atomic_cas((p), e, 0, sz);				\
 		if (r == e)						\
 			break;						\
 	}								\
@@ -151,8 +152,8 @@
 
 #define	atomic_store(p, v, sz) do {					\
 	itype(sz) e, r;							\
-	for (e = *(volatile itype(sz) *)p;; e = r) {			\
-		r = atomic_cas(p, e, v, sz);				\
+	for (e = *(volatile itype(sz) *)(p);; e = r) {			\
+		r = atomic_cas((p), e, (v), sz);			\
 		if (r == e)						\
 			break;						\
 	}								\
@@ -160,7 +161,7 @@
 
 #define	atomic_store_rel(p, v, sz) do {					\
 	membar(LoadStore | StoreStore);					\
-	atomic_store(p, v, sz);						\
+	atomic_store((p), (v), sz);					\
 } while (0)
 
 #define	ATOMIC_GEN(name, ptype, vtype, atype, sz)			\
@@ -168,109 +169,109 @@
 static __inline vtype							\
 atomic_add_ ## name(volatile ptype p, atype v)				\
 {									\
-	return ((vtype)atomic_op(p, +, v, sz));				\
+	return ((vtype)atomic_op((p), +, (v), sz));			\
 }									\
 static __inline vtype							\
 atomic_add_acq_ ## name(volatile ptype p, atype v)			\
 {									\
-	return ((vtype)atomic_op_acq(p, +, v, sz));			\
+	return ((vtype)atomic_op_acq((p), +, (v), sz));			\
 }									\
 static __inline vtype							\
 atomic_add_rel_ ## name(volatile ptype p, atype v)			\
 {									\
-	return ((vtype)atomic_op_rel(p, +, v, sz));			\
+	return ((vtype)atomic_op_rel((p), +, (v), sz));			\
 }									\
 									\
 static __inline vtype							\
 atomic_clear_ ## name(volatile ptype p, atype v)			\
 {									\
-	return ((vtype)atomic_op(p, &, ~v, sz));			\
+	return ((vtype)atomic_op((p), &, ~(v), sz));			\
 }									\
 static __inline vtype							\
 atomic_clear_acq_ ## name(volatile ptype p, atype v)			\
 {									\
-	return ((vtype)atomic_op_acq(p, &, ~v, sz));			\
+	return ((vtype)atomic_op_acq((p), &, ~(v), sz));		\
 }									\
 static __inline vtype							\
 atomic_clear_rel_ ## name(volatile ptype p, atype v)			\
 {									\
-	return ((vtype)atomic_op_rel(p, &, ~v, sz));			\
+	return ((vtype)atomic_op_rel((p), &, ~(v), sz));		\
 }									\
 									\
 static __inline int							\
 atomic_cmpset_ ## name(volatile ptype p, vtype e, vtype s)		\
 {									\
-	return (((vtype)atomic_cas(p, e, s, sz)) == e);			\
+	return (((vtype)atomic_cas((p), (e), (s), sz)) == (e));		\
 }									\
 static __inline int							\
 atomic_cmpset_acq_ ## name(volatile ptype p, vtype e, vtype s)		\
 {									\
-	return (((vtype)atomic_cas_acq(p, e, s, sz)) == e);		\
+	return (((vtype)atomic_cas_acq((p), (e), (s), sz)) == (e));	\
 }									\
 static __inline int							\
 atomic_cmpset_rel_ ## name(volatile ptype p, vtype e, vtype s)		\
 {									\
-	return (((vtype)atomic_cas_rel(p, e, s, sz)) == e);		\
+	return (((vtype)atomic_cas_rel((p), (e), (s), sz)) == (e));	\
 }									\
 									\
 static __inline vtype							\
 atomic_load_ ## name(volatile ptype p)					\
 {									\
-	return ((vtype)atomic_cas(p, 0, 0, sz));			\
+	return ((vtype)atomic_cas((p), 0, 0, sz));			\
 }									\
 static __inline vtype							\
 atomic_load_acq_ ## name(volatile ptype p)				\
 {									\
-	return ((vtype)atomic_cas_acq(p, 0, 0, sz));			\
+	return ((vtype)atomic_cas_acq((p), 0, 0, sz));			\
 }									\
 									\
 static __inline vtype							\
 atomic_readandclear_ ## name(volatile ptype p)				\
 {									\
-	return ((vtype)atomic_load_clear(p, sz));			\
+	return ((vtype)atomic_load_clear((p), sz));			\
 }									\
 									\
 static __inline vtype							\
 atomic_set_ ## name(volatile ptype p, atype v)				\
 {									\
-	return ((vtype)atomic_op(p, |, v, sz));				\
+	return ((vtype)atomic_op((p), |, (v), sz));			\
 }									\
 static __inline vtype							\
 atomic_set_acq_ ## name(volatile ptype p, atype v)			\
 {									\
-	return ((vtype)atomic_op_acq(p, |, v, sz));			\
+	return ((vtype)atomic_op_acq((p), |, (v), sz));			\
 }									\
 static __inline vtype							\
 atomic_set_rel_ ## name(volatile ptype p, atype v)			\
 {									\
-	return ((vtype)atomic_op_rel(p, |, v, sz));			\
+	return ((vtype)atomic_op_rel((p), |, (v), sz));			\
 }									\
 									\
 static __inline vtype							\
 atomic_subtract_ ## name(volatile ptype p, atype v)			\
 {									\
-	return ((vtype)atomic_op(p, -, v, sz));				\
+	return ((vtype)atomic_op((p), -, (v), sz));			\
 }									\
 static __inline vtype							\
 atomic_subtract_acq_ ## name(volatile ptype p, atype v)			\
 {									\
-	return ((vtype)atomic_op_acq(p, -, v, sz));			\
+	return ((vtype)atomic_op_acq((p), -, (v), sz));			\
 }									\
 static __inline vtype							\
 atomic_subtract_rel_ ## name(volatile ptype p, atype v)			\
 {									\
-	return ((vtype)atomic_op_rel(p, -, v, sz));			\
+	return ((vtype)atomic_op_rel((p), -, (v), sz));			\
 }									\
 									\
 static __inline void							\
 atomic_store_ ## name(volatile ptype p, vtype v)			\
 {									\
-	atomic_store(p, v, sz);						\
+	atomic_store((p), (v), sz);					\
 }									\
 static __inline void							\
 atomic_store_rel_ ## name(volatile ptype p, vtype v)			\
 {									\
-	atomic_store_rel(p, v, sz);					\
+	atomic_store_rel((p), (v), sz);					\
 }
 
 ATOMIC_GEN(int, u_int *, u_int, u_int, 32);
diff --git a/sys/sparc64/pci/schizo.c b/sys/sparc64/pci/schizo.c
index 4d1a5a7..3d147c8 100644
--- a/sys/sparc64/pci/schizo.c
+++ b/sys/sparc64/pci/schizo.c
@@ -501,7 +501,8 @@ schizo_attach(device_t dev)
 	 * Set up the IOMMU.  Schizo, Tomatillo and XMITS all have
 	 * one per PBM.  Schizo and XMITS additionally have a streaming
 	 * buffer, in Schizo version < 5 (i.e. revision < 2.3) it's
-	 * affected by several errata and basically unusable though.
+	 * affected by several errata though.  However, except for context
+	 * flushes, taking advantage of it should be okay even with those.
 	 */
 	memcpy(&sc->sc_dma_methods, &iommu_dma_methods,
 	    sizeof(sc->sc_dma_methods));
@@ -509,8 +510,7 @@ schizo_attach(device_t dev)
 	sc->sc_is.sis_is.is_flags = IOMMU_PRESERVE_PROM;
 	sc->sc_is.sis_is.is_pmaxaddr = IOMMU_MAXADDR(STX_IOMMU_BITS);
 	sc->sc_is.sis_is.is_sb[0] = sc->sc_is.sis_is.is_sb[1] = 0;
-	if (OF_getproplen(node, "no-streaming-cache") < 0 &&
-	    !(sc->sc_mode == SCHIZO_MODE_SCZ && sc->sc_ver < 5))
+	if (OF_getproplen(node, "no-streaming-cache") < 0)
 		sc->sc_is.sis_is.is_sb[0] = STX_PCI_STRBUF;
 
 #define	TSBCASE(x)							\
diff --git a/sys/sparc64/sparc64/exception.S b/sys/sparc64/sparc64/exception.S
index 222ddea..09db4e0 100644
--- a/sys/sparc64/sparc64/exception.S
+++ b/sys/sparc64/sparc64/exception.S
@@ -373,15 +373,15 @@ END(rsf_fatal)
 	_ALIGN_DATA
 	.globl	intrnames, sintrnames
 intrnames:
-	.space	IV_MAX * (MAXCOMLEN + 1)
+	.space	(IV_MAX + PIL_MAX) * (MAXCOMLEN + 1)
 sintrnames:
-	.quad	IV_MAX * (MAXCOMLEN + 1)
+	.quad	(IV_MAX + PIL_MAX) * (MAXCOMLEN + 1)
 
 	.globl	intrcnt, sintrcnt
 intrcnt:
-	.space	IV_MAX * 8
+	.space	(IV_MAX + PIL_MAX) * 8
 sintrcnt:
-	.quad	IV_MAX * 8
+	.quad	(IV_MAX + PIL_MAX) * 8
 
 	.text
 
diff --git a/sys/sparc64/sparc64/genassym.c b/sys/sparc64/sparc64/genassym.c
index 89ec718..df31805 100644
--- a/sys/sparc64/sparc64/genassym.c
+++ b/sys/sparc64/sparc64/genassym.c
@@ -43,9 +43,7 @@ __FBSDID("$FreeBSD$");
 #include <vm/vm_page.h>
 #include <vm/vm_map.h>
 
-#ifdef SUN4U
 #include <machine/cache.h>
-#endif
 #include <machine/pcb.h>
 #include <machine/setjmp.h>
 #include <machine/smp.h>
@@ -62,9 +60,7 @@ ASSYM(TAR_VPN_SHIFT, TAR_VPN_SHIFT);
 
 ASSYM(_NCPUBITS, _NCPUBITS);
 
-#ifdef SUN4U
 ASSYM(TLB_DEMAP_ALL, TLB_DEMAP_ALL);
-#endif
 ASSYM(TLB_DEMAP_CONTEXT, TLB_DEMAP_CONTEXT);
 ASSYM(TLB_DEMAP_NUCLEUS, TLB_DEMAP_NUCLEUS);
 ASSYM(TLB_DEMAP_PAGE, TLB_DEMAP_PAGE);
@@ -82,21 +78,17 @@ ASSYM(PAGE_SIZE_4M, PAGE_SIZE_4M);
 #ifdef SMP
 ASSYM(CSA_PCPU, offsetof(struct cpu_start_args, csa_pcpu));
 ASSYM(CSA_STATE, offsetof(struct cpu_start_args, csa_state));
-#ifdef SUN4U
 ASSYM(CSA_MID, offsetof(struct cpu_start_args, csa_mid));
 ASSYM(CSA_STICK, offsetof(struct cpu_start_args, csa_stick));
 ASSYM(CSA_TICK, offsetof(struct cpu_start_args, csa_tick));
 ASSYM(CSA_TTES, offsetof(struct cpu_start_args, csa_ttes));
 ASSYM(CSA_VER, offsetof(struct cpu_start_args, csa_ver));
 #endif
-#endif
 
-#ifdef SUN4U
 ASSYM(DC_SIZE, offsetof(struct cacheinfo, dc_size));
 ASSYM(DC_LINESIZE, offsetof(struct cacheinfo, dc_linesize));
 ASSYM(IC_SIZE, offsetof(struct cacheinfo, ic_size));
 ASSYM(IC_LINESIZE, offsetof(struct cacheinfo, ic_linesize));
-#endif
 
 ASSYM(KTR_SIZEOF, sizeof(struct ktr_entry));
 ASSYM(KTR_LINE, offsetof(struct ktr_entry, ktr_line));
@@ -112,7 +104,6 @@ ASSYM(KTR_PARM5, offsetof(struct ktr_entry, ktr_parms[4]));
 ASSYM(KTR_PARM6, offsetof(struct ktr_entry, ktr_parms[5]));
 
 ASSYM(TTE_SHIFT, TTE_SHIFT);
-#ifdef SUN4U
 ASSYM(TTE_VPN, offsetof(struct tte, tte_vpn));
 ASSYM(TTE_DATA, offsetof(struct tte, tte_data));
 
@@ -132,7 +123,6 @@ ASSYM(TLB_CXR_PGSZ_MASK, TLB_CXR_PGSZ_MASK);
 ASSYM(TLB_DIRECT_ADDRESS_MASK, TLB_DIRECT_ADDRESS_MASK);
 ASSYM(TLB_DIRECT_TO_TTE_MASK, TLB_DIRECT_TO_TTE_MASK);
 ASSYM(TV_SIZE_BITS, TV_SIZE_BITS);
-#endif
 
 ASSYM(V_INTR, offsetof(struct vmmeter, v_intr));
 
@@ -146,14 +136,12 @@ ASSYM(PC_IRFREE, offsetof(struct pcpu, pc_irfree));
 ASSYM(PC_CNT, offsetof(struct pcpu, pc_cnt));
 ASSYM(PC_SIZEOF, sizeof(struct pcpu));
 
-#ifdef SUN4U
 ASSYM(PC_CACHE, offsetof(struct pcpu, pc_cache));
 ASSYM(PC_MID, offsetof(struct pcpu, pc_mid));
 ASSYM(PC_PMAP, offsetof(struct pcpu, pc_pmap));
 ASSYM(PC_TLB_CTX, offsetof(struct pcpu, pc_tlb_ctx));
 ASSYM(PC_TLB_CTX_MAX, offsetof(struct pcpu, pc_tlb_ctx_max));
 ASSYM(PC_TLB_CTX_MIN, offsetof(struct pcpu, pc_tlb_ctx_min));
-#endif
 
 ASSYM(IR_NEXT, offsetof(struct intr_request, ir_next));
 ASSYM(IR_FUNC, offsetof(struct intr_request, ir_func));
@@ -161,7 +149,7 @@ ASSYM(IR_ARG, offsetof(struct intr_request, ir_arg));
 ASSYM(IR_PRI, offsetof(struct intr_request, ir_pri));
 ASSYM(IR_VEC, offsetof(struct intr_request, ir_vec));
 
-#if defined(SUN4U) && defined(SMP)
+#ifdef SMP
 ASSYM(ICA_PA, offsetof(struct ipi_cache_args, ica_pa));
 
 ASSYM(IRA_MASK, offsetof(struct ipi_rd_args, ira_mask));
@@ -239,14 +227,12 @@ ASSYM(TF_FPRS, offsetof(struct trapframe, tf_fprs));
 ASSYM(TF_FSR, offsetof(struct trapframe, tf_fsr));
 ASSYM(TF_GSR, offsetof(struct trapframe, tf_gsr));
 ASSYM(TF_PIL, offsetof(struct trapframe, tf_pil));
-#ifdef SUN4U
 ASSYM(TF_LEVEL, offsetof(struct trapframe, tf_level));
 ASSYM(TF_SFAR, offsetof(struct trapframe, tf_sfar));
 ASSYM(TF_SFSR, offsetof(struct trapframe, tf_sfsr));
 ASSYM(TF_TAR, offsetof(struct trapframe, tf_tar));
 ASSYM(TF_TYPE, offsetof(struct trapframe, tf_type));
 ASSYM(TF_Y, offsetof(struct trapframe, tf_y));
-#endif
 ASSYM(TF_TNPC, offsetof(struct trapframe, tf_tnpc));
 ASSYM(TF_TPC, offsetof(struct trapframe, tf_tpc));
 ASSYM(TF_TSTATE, offsetof(struct trapframe, tf_tstate));
diff --git a/sys/sparc64/sparc64/machdep.c b/sys/sparc64/sparc64/machdep.c
index c6252cd..2720448 100644
--- a/sys/sparc64/sparc64/machdep.c
+++ b/sys/sparc64/sparc64/machdep.c
@@ -1015,6 +1015,10 @@ exec_setregs(struct thread *td, struct image_params *imgp, u_long stack)
 	tf->tf_out[6] = sp - SPOFF - sizeof(struct frame);
 	tf->tf_tnpc = imgp->entry_addr + 4;
 	tf->tf_tpc = imgp->entry_addr;
+	/*
+	 * While we could adhere to the memory model indicated in the ELF
+	 * header, it turns out that just always using TSO performs best.
+	 */
 	tf->tf_tstate = TSTATE_IE | TSTATE_PEF | TSTATE_MM_TSO;
 
 	td->td_retval[0] = tf->tf_out[0];
diff --git a/sys/sparc64/sparc64/pmap.c b/sys/sparc64/sparc64/pmap.c
index 2bb3450..65da898 100644
--- a/sys/sparc64/sparc64/pmap.c
+++ b/sys/sparc64/sparc64/pmap.c
@@ -101,12 +101,6 @@ __FBSDID("$FreeBSD$");
 #include <machine/tsb.h>
 #include <machine/ver.h>
 
-#define	PMAP_DEBUG
-
-#ifndef	PMAP_SHPGPERPROC
-#define	PMAP_SHPGPERPROC	200
-#endif
-
 /* XXX */
 #include "opt_sched.h"
 #ifndef SCHED_4BSD
diff --git a/sys/sys/param.h b/sys/sys/param.h
index c10b433..57ff3a3 100644
--- a/sys/sys/param.h
+++ b/sys/sys/param.h
@@ -61,6 +61,7 @@
 #define __FreeBSD_version 1000000	/* Master, propagated to newvers */
 
 #ifdef _KERNEL
+#define	P_OSREL_SIGWAIT		700000
 #define	P_OSREL_SIGSEGV		700004
 #define	P_OSREL_MAP_ANON	800104
 #endif
diff --git a/usr.bin/fstat/fstat.c b/usr.bin/fstat/fstat.c
index c513a46..ed85351 100644
--- a/usr.bin/fstat/fstat.c
+++ b/usr.bin/fstat/fstat.c
@@ -441,7 +441,7 @@ print_vnode_info(struct procstat *procstat, struct filestat *fst)
 	}
 
 	if (nflg)
-		printf(" %#8jx", (uintmax_t)vn.vn_fsid);
+		printf(" %#5jx", (uintmax_t)vn.vn_fsid);
 	else if (vn.vn_mntdir != NULL)
 		(void)printf(" %-8s", vn.vn_mntdir);