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authorjhb <jhb@FreeBSD.org>2015-11-05 21:33:15 +0000
committerjhb <jhb@FreeBSD.org>2015-11-05 21:33:15 +0000
commitcc4b042480ba323909ca3f549093b4623a143d03 (patch)
treeea70bbaac979a674312f1bad89208db5ddebe5b9
parentfa7f239637c899b490a1463c23b0516030c79bc4 (diff)
downloadFreeBSD-src-cc4b042480ba323909ca3f549093b4623a143d03.zip
FreeBSD-src-cc4b042480ba323909ca3f549093b4623a143d03.tar.gz
Chelsio T5 chips do not properly echo the No Snoop and Relaxed Ordering
attributes when replying to a TLP from a Root Port. As a workaround, disable No Snoop and Relaxed Ordering in the Root Port of each T5 adapter during attach so that CPU-initiated requests do not contain these flags. Note that this affects CPU-initiated requests to all devices under this root port. Reviewed by: np MFC after: 1 week Sponsored by: Chelsio
-rw-r--r--sys/dev/cxgbe/t4_main.c29
1 files changed, 29 insertions, 0 deletions
diff --git a/sys/dev/cxgbe/t4_main.c b/sys/dev/cxgbe/t4_main.c
index a5c7608..473d5eb 100644
--- a/sys/dev/cxgbe/t4_main.c
+++ b/sys/dev/cxgbe/t4_main.c
@@ -573,6 +573,33 @@ t5_probe(device_t dev)
return (ENXIO);
}
+static void
+t5_attribute_workaround(device_t dev)
+{
+ device_t root_port;
+ uint32_t v;
+
+ /*
+ * The T5 chips do not properly echo the No Snoop and Relaxed
+ * Ordering attributes when replying to a TLP from a Root
+ * Port. As a workaround, find the parent Root Port and
+ * disable No Snoop and Relaxed Ordering. Note that this
+ * affects all devices under this root port.
+ */
+ root_port = pci_find_pcie_root_port(dev);
+ if (root_port == NULL) {
+ device_printf(dev, "Unable to find parent root port\n");
+ return;
+ }
+
+ v = pcie_adjust_config(root_port, PCIER_DEVICE_CTL,
+ PCIEM_CTL_RELAXED_ORD_ENABLE | PCIEM_CTL_NOSNOOP_ENABLE, 0, 2);
+ if ((v & (PCIEM_CTL_RELAXED_ORD_ENABLE | PCIEM_CTL_NOSNOOP_ENABLE)) !=
+ 0)
+ device_printf(dev, "Disabled No Snoop/Relaxed Ordering on %s\n",
+ device_get_nameunit(root_port));
+}
+
static int
t4_attach(device_t dev)
{
@@ -591,6 +618,8 @@ t4_attach(device_t dev)
sc->dev = dev;
TUNABLE_INT_FETCH("hw.cxgbe.debug_flags", &sc->debug_flags);
+ if ((pci_get_device(dev) & 0xff00) == 0x5400)
+ t5_attribute_workaround(dev);
pci_enable_busmaster(dev);
if (pci_find_cap(dev, PCIY_EXPRESS, &i) == 0) {
uint32_t v;
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