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| author | mmel <mmel@FreeBSD.org> | 2016-10-15 07:38:27 +0000 |
|---|---|---|
| committer | Luiz Souza <luiz@netgate.com> | 2017-05-08 15:23:47 -0500 |
| commit | 6fa98510f4041f945c16a2b2a6a8fd876ff57c2b (patch) | |
| tree | 1a1e5415fc9f6abe33a0b3758ce48beb986c4d5f | |
| parent | 84ce69d559e0499470728b9d488d7aee00cadafd (diff) | |
| download | FreeBSD-src-6fa98510f4041f945c16a2b2a6a8fd876ff57c2b.zip FreeBSD-src-6fa98510f4041f945c16a2b2a6a8fd876ff57c2b.tar.gz | |
MFC r306755:
ARM: Add identifiers for ARM Cortex v8 and Marvell Sheeva v7 cores. Not a
functional change.
(cherry picked from commit b394a692e6ffca789b201f12d358cef6d02080a3)
| -rw-r--r-- | sys/arm/arm/cpuinfo.c | 6 | ||||
| -rw-r--r-- | sys/arm/include/cpuinfo.h | 8 |
2 files changed, 13 insertions, 1 deletions
diff --git a/sys/arm/arm/cpuinfo.c b/sys/arm/arm/cpuinfo.c index b2d96a7..2b734f4 100644 --- a/sys/arm/arm/cpuinfo.c +++ b/sys/arm/arm/cpuinfo.c @@ -163,7 +163,11 @@ cpuinfo_get_actlr_modifier(uint32_t *actlr_mask, uint32_t *actlr_set) if (cpuinfo.implementer == CPU_IMPLEMENTER_ARM) { switch (cpuinfo.part_number) { - + case CPU_ARCH_CORTEX_A72: + case CPU_ARCH_CORTEX_A57: + case CPU_ARCH_CORTEX_A53: + /* Nothing to do for AArch32 */ + break; case CPU_ARCH_CORTEX_A17: case CPU_ARCH_CORTEX_A12: /* A12 is merged to A17 */ /* diff --git a/sys/arm/include/cpuinfo.h b/sys/arm/include/cpuinfo.h index 210e432..f4db021 100644 --- a/sys/arm/include/cpuinfo.h +++ b/sys/arm/include/cpuinfo.h @@ -45,10 +45,18 @@ #define CPU_ARCH_CORTEX_A12 0xC0D #define CPU_ARCH_CORTEX_A15 0xC0F #define CPU_ARCH_CORTEX_A17 0xC11 +#define CPU_ARCH_CORTEX_A53 0xD03 +#define CPU_ARCH_CORTEX_A57 0xD07 +#define CPU_ARCH_CORTEX_A72 0xD08 + /* QCOM */ #define CPU_ARCH_KRAIT_300 0x06F +/* MRVL */ +#define CPU_ARCH_SHEEVA_851 0x581 /* PJ4/PJ4B */ +#define CPU_ARCH_SHEEVA_584 0x584 /* PJ4B-MP/PJ4C */ + struct cpuinfo { /* raw id registers */ uint32_t midr; |
