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| author | zbb <zbb@FreeBSD.org> | 2015-02-24 12:31:08 +0000 |
|---|---|---|
| committer | zbb <zbb@FreeBSD.org> | 2015-02-24 12:31:08 +0000 |
| commit | 952715891bd9fb9d9a730ae9c0cc0a7b4618dfb0 (patch) | |
| tree | 606be1cdc1ffdc8f8c85e654aa397ef86477c879 | |
| parent | 217cb9ff265db473319230edb49f91a57d80923e (diff) | |
| download | FreeBSD-src-952715891bd9fb9d9a730ae9c0cc0a7b4618dfb0.zip FreeBSD-src-952715891bd9fb9d9a730ae9c0cc0a7b4618dfb0.tar.gz | |
Fix endianness on FDT read in ARM GIC
Submitted by: Jakub Palider <jpa@semihalf.com>
Reviewed by: ian, nwhitehorn
Obtained from: Semihalf
| -rw-r--r-- | sys/arm/arm/gic.c | 8 |
1 files changed, 4 insertions, 4 deletions
diff --git a/sys/arm/arm/gic.c b/sys/arm/arm/gic.c index 333fac9..f5a08c0 100644 --- a/sys/arm/arm/gic.c +++ b/sys/arm/arm/gic.c @@ -205,7 +205,7 @@ gic_decode_fdt(uint32_t iparent, uint32_t *intr, int *interrupt, *trig = INTR_TRIGGER_CONFORM; *pol = INTR_POLARITY_CONFORM; } else { - if (intr[0] == 0) + if (fdt32_to_cpu(intr[0]) == 0) *interrupt = fdt32_to_cpu(intr[1]) + GIC_FIRST_SPI; else *interrupt = fdt32_to_cpu(intr[1]) + GIC_FIRST_PPI; @@ -217,13 +217,13 @@ gic_decode_fdt(uint32_t iparent, uint32_t *intr, int *interrupt, * 8 = active low level-sensitive * The hardware only supports active-high-level or rising-edge. */ - if (intr[2] & 0x0a) { + if (fdt32_to_cpu(intr[2]) & 0x0a) { printf("unsupported trigger/polarity configuration " - "0x%2x\n", intr[2] & 0x0f); + "0x%2x\n", fdt32_to_cpu(intr[2]) & 0x0f); return (ENOTSUP); } *pol = INTR_POLARITY_CONFORM; - if (intr[2] & 0x01) + if (fdt32_to_cpu(intr[2]) & 0x01) *trig = INTR_TRIGGER_EDGE; else *trig = INTR_TRIGGER_LEVEL; |
