Disable 32-bit PIO for 6Gbit/s Intel SATA controllers.

For some reason 32-bit PIO writes are not working on 6Gbit/s Intel SATA
ports, while 16/32-bit PIO reads and 16-bit PIO writes are working fine.
3Gbit/s ports on the same controllers have no this problem.

Workaround this by disabling 32-bit PIO for all Intel controllers that may
have 6Gbit/s ports.  It halves PIO performance from 6MB/s to 3MB/s, but
who bother about speed of such rare and slow mode, which is also highly
discouraged by SATA specifications?

MFC after:	2 weeks

3 files changed, 25 insertions, 21 deletions

diff --git a/sys/dev/ata/ata-all.c b/sys/dev/ata/ata-all.c
index 6e3f5fe..52db44d 100644
--- a/sys/dev/ata/ata-all.c
+++ b/sys/dev/ata/ata-all.c
@@ -572,6 +572,7 @@ ata_mode2str(int mode)
     case ATA_UDMA6: return "UDMA133";
     case ATA_SA150: return "SATA150";
     case ATA_SA300: return "SATA300";
+    case ATA_SA600: return "SATA600";
     default:
 	if (mode & ATA_DMA_MASK)
 	    return "BIOSDMA";
diff --git a/sys/dev/ata/chipsets/ata-intel.c b/sys/dev/ata/chipsets/ata-intel.c
index 9acc6f1..cdccdfb 100644
--- a/sys/dev/ata/chipsets/ata-intel.c
+++ b/sys/dev/ata/chipsets/ata-intel.c
@@ -155,34 +155,34 @@ ata_intel_probe(device_t dev)
      { ATA_5Series_S4,   0, INTEL_6CH,  0, ATA_SA300, "5 Series/3400 Series PCH" },
      { ATA_5Series_S5,   0, INTEL_6CH2, 0, ATA_SA300, "5 Series/3400 Series PCH" },
      { ATA_5Series_S6,   0, INTEL_6CH,  0, ATA_SA300, "5 Series/3400 Series PCH" },
-     { ATA_CPT_S1,       0, INTEL_6CH,  0, ATA_SA300, "Cougar Point" },
-     { ATA_CPT_S2,       0, INTEL_6CH,  0, ATA_SA300, "Cougar Point" },
+     { ATA_CPT_S1,       0, INTEL_6CH,  0, ATA_SA600, "Cougar Point" },
+     { ATA_CPT_S2,       0, INTEL_6CH,  0, ATA_SA600, "Cougar Point" },
      { ATA_CPT_S3,       0, INTEL_6CH2, 0, ATA_SA300, "Cougar Point" },
      { ATA_CPT_S4,       0, INTEL_6CH2, 0, ATA_SA300, "Cougar Point" },
-     { ATA_PBG_S1,       0, INTEL_6CH,  0, ATA_SA300, "Patsburg" },
+     { ATA_PBG_S1,       0, INTEL_6CH,  0, ATA_SA600, "Patsburg" },
      { ATA_PBG_S2,       0, INTEL_6CH2, 0, ATA_SA300, "Patsburg" },
-     { ATA_PPT_S1,       0, INTEL_6CH,  0, ATA_SA300, "Panther Point" },
-     { ATA_PPT_S2,       0, INTEL_6CH,  0, ATA_SA300, "Panther Point" },
+     { ATA_PPT_S1,       0, INTEL_6CH,  0, ATA_SA600, "Panther Point" },
+     { ATA_PPT_S2,       0, INTEL_6CH,  0, ATA_SA600, "Panther Point" },
      { ATA_PPT_S3,       0, INTEL_6CH2, 0, ATA_SA300, "Panther Point" },
      { ATA_PPT_S4,       0, INTEL_6CH2, 0, ATA_SA300, "Panther Point" },
-     { ATA_AVOTON_S1,    0, INTEL_6CH,  0, ATA_SA300, "Avoton" },
-     { ATA_AVOTON_S2,    0, INTEL_6CH,  0, ATA_SA300, "Avoton" },
+     { ATA_AVOTON_S1,    0, INTEL_6CH,  0, ATA_SA600, "Avoton" },
+     { ATA_AVOTON_S2,    0, INTEL_6CH,  0, ATA_SA600, "Avoton" },
      { ATA_AVOTON_S3,    0, INTEL_6CH2, 0, ATA_SA300, "Avoton" },
      { ATA_AVOTON_S4,    0, INTEL_6CH2, 0, ATA_SA300, "Avoton" },
-     { ATA_LPT_S1,       0, INTEL_6CH,  0, ATA_SA300, "Lynx Point" },
-     { ATA_LPT_S2,       0, INTEL_6CH,  0, ATA_SA300, "Lynx Point" },
-     { ATA_LPT_S3,       0, INTEL_6CH2, 0, ATA_SA300, "Lynx Point" },
-     { ATA_LPT_S4,       0, INTEL_6CH2, 0, ATA_SA300, "Lynx Point" },
-     { ATA_WCPT_S1,      0, INTEL_6CH,  0, ATA_SA300, "Wildcat Point" },
-     { ATA_WCPT_S2,      0, INTEL_6CH,  0, ATA_SA300, "Wildcat Point" },
-     { ATA_WCPT_S3,      0, INTEL_6CH2, 0, ATA_SA300, "Wildcat Point" },
-     { ATA_WCPT_S4,      0, INTEL_6CH2, 0, ATA_SA300, "Wildcat Point" },
-     { ATA_WELLS_S1,     0, INTEL_6CH,  0, ATA_SA300, "Wellsburg" },
-     { ATA_WELLS_S2,     0, INTEL_6CH2, 0, ATA_SA300, "Wellsburg" },
-     { ATA_WELLS_S3,     0, INTEL_6CH,  0, ATA_SA300, "Wellsburg" },
-     { ATA_WELLS_S4,     0, INTEL_6CH2, 0, ATA_SA300, "Wellsburg" },
-     { ATA_LPTLP_S1,     0, INTEL_6CH,  0, ATA_SA300, "Lynx Point-LP" },
-     { ATA_LPTLP_S2,     0, INTEL_6CH,  0, ATA_SA300, "Lynx Point-LP" },
+     { ATA_LPT_S1,       0, INTEL_6CH,  0, ATA_SA600, "Lynx Point" },
+     { ATA_LPT_S2,       0, INTEL_6CH,  0, ATA_SA600, "Lynx Point" },
+     { ATA_LPT_S3,       0, INTEL_6CH2, 0, ATA_SA600, "Lynx Point" },
+     { ATA_LPT_S4,       0, INTEL_6CH2, 0, ATA_SA600, "Lynx Point" },
+     { ATA_WCPT_S1,      0, INTEL_6CH,  0, ATA_SA600, "Wildcat Point" },
+     { ATA_WCPT_S2,      0, INTEL_6CH,  0, ATA_SA600, "Wildcat Point" },
+     { ATA_WCPT_S3,      0, INTEL_6CH2, 0, ATA_SA600, "Wildcat Point" },
+     { ATA_WCPT_S4,      0, INTEL_6CH2, 0, ATA_SA600, "Wildcat Point" },
+     { ATA_WELLS_S1,     0, INTEL_6CH,  0, ATA_SA600, "Wellsburg" },
+     { ATA_WELLS_S2,     0, INTEL_6CH2, 0, ATA_SA600, "Wellsburg" },
+     { ATA_WELLS_S3,     0, INTEL_6CH,  0, ATA_SA600, "Wellsburg" },
+     { ATA_WELLS_S4,     0, INTEL_6CH2, 0, ATA_SA600, "Wellsburg" },
+     { ATA_LPTLP_S1,     0, INTEL_6CH,  0, ATA_SA600, "Lynx Point-LP" },
+     { ATA_LPTLP_S2,     0, INTEL_6CH,  0, ATA_SA600, "Lynx Point-LP" },
      { ATA_LPTLP_S3,     0, INTEL_6CH2, 0, ATA_SA300, "Lynx Point-LP" },
      { ATA_LPTLP_S4,     0, INTEL_6CH2, 0, ATA_SA300, "Lynx Point-LP" },
      { ATA_I31244,       0,          0, 2, ATA_SA150, "31244" },
@@ -394,6 +394,8 @@ ata_intel_ch_attach(device_t dev)
 			}
 		} else
 			ctlr->setmode = ata_intel_new_setmode;
+		if (ctlr->chip->max_dma >= ATA_SA600)
+			ch->flags |= ATA_USE_16BIT;
 	} else if (ctlr->chip->chipid != ATA_ISCH)
 		ch->flags |= ATA_CHECKS_CABLE;
 	return (0);
diff --git a/sys/sys/ata.h b/sys/sys/ata.h
index 2fa7e16..863f0e8 100644
--- a/sys/sys/ata.h
+++ b/sys/sys/ata.h
@@ -335,6 +335,7 @@ struct ata_params {
 #define ATA_UDMA6               0x46
 #define ATA_SA150               0x47
 #define ATA_SA300               0x48
+#define ATA_SA600               0x49
 #define ATA_DMA_MAX             0x4f