Rename TARGET_XLR_XLS to CPU_RMI to match other CPU_xxx definitions.

use CPU_RMI all XLR configurations. Update ident string for N32 and
N64 kernels.

10 files changed, 13 insertions, 16 deletions

diff --git a/sys/conf/options.mips b/sys/conf/options.mips
index 95504dc..36cfc7a 100644
--- a/sys/conf/options.mips
+++ b/sys/conf/options.mips
@@ -35,6 +35,7 @@ CPU_SENTRY5	opt_global.h
 CPU_HAVEFPU	opt_global.h
 CPU_SB1 	opt_global.h
 CPU_CNMIPS	opt_global.h
+CPU_RMI		opt_global.h
 
 ISA_MIPS1	opt_cputype.h
 ISA_MIPS3	opt_cputype.h
@@ -51,7 +52,6 @@ CFE_ENV_SIZE	opt_global.h
 
 NOFPU		opt_global.h
 TARGET_EMULATOR	opt_ddb.h
-TARGET_XLR_XLS  opt_global.h
 
 TICK_USE_YAMON_FREQ	opt_global.h
 TICK_USE_MALTA_RTC	opt_global.h
diff --git a/sys/mips/conf/XLR b/sys/mips/conf/XLR
index 9daa356..9d640d2 100644
--- a/sys/mips/conf/XLR
+++ b/sys/mips/conf/XLR
@@ -46,7 +46,7 @@
 # $FreeBSD$
 
 machine 	mips
-cpu 		CPU_MIPS4KC
+cpu 		CPU_RMI
 ident 		XLR
 
 makeoptions	MODULES_OVERRIDE=""
diff --git a/sys/mips/conf/XLR64 b/sys/mips/conf/XLR64
index 4c0da1d..949f9bd 100644
--- a/sys/mips/conf/XLR64
+++ b/sys/mips/conf/XLR64
@@ -18,8 +18,8 @@
 # $FreeBSD$
 
 machine 	mips
-cpu 		CPU_MIPS4KC
-ident 		XLR
+cpu 		CPU_RMI
+ident 		XLR64
 
 makeoptions	MODULES_OVERRIDE=""
 makeoptions     TARGET_BIG_ENDIAN
diff --git a/sys/mips/conf/XLRN32 b/sys/mips/conf/XLRN32
index da7d2b0..1e0c8f3 100644
--- a/sys/mips/conf/XLRN32
+++ b/sys/mips/conf/XLRN32
@@ -18,8 +18,8 @@
 # $FreeBSD$
 
 machine 	mips
-cpu 		CPU_MIPS4KC
-ident 		XLR
+cpu 		CPU_RMI
+ident 		XLRN32
 
 makeoptions	MODULES_OVERRIDE=""
 makeoptions     TARGET_BIG_ENDIAN
diff --git a/sys/mips/include/bus.h b/sys/mips/include/bus.h
index 2ab347b..af83d36 100644
--- a/sys/mips/include/bus.h
+++ b/sys/mips/include/bus.h
@@ -721,7 +721,7 @@ void	__bs_c(f,_bs_c_8) (void *t, bus_space_handle_t bsh1,	\
 DECLARE_BUS_SPACE_PROTOTYPES(generic);
 extern bus_space_tag_t mips_bus_space_generic;
 /* Special bus space for RMI processors */
-#ifdef TARGET_XLR_XLS
+#ifdef CPU_RMI
 extern bus_space_tag_t rmi_bus_space;
 extern bus_space_tag_t rmi_pci_bus_space;
 #endif
diff --git a/sys/mips/include/intr_machdep.h b/sys/mips/include/intr_machdep.h
index 575bba4..3d66e63 100644
--- a/sys/mips/include/intr_machdep.h
+++ b/sys/mips/include/intr_machdep.h
@@ -29,7 +29,7 @@
 #ifndef	_MACHINE_INTR_MACHDEP_H_
 #define	_MACHINE_INTR_MACHDEP_H_
 
-#ifdef TARGET_XLR_XLS
+#ifdef CPU_RMI
 #define XLR_MAX_INTR 64 
 #else
 #define NHARD_IRQS	6
diff --git a/sys/mips/mips/exception.S b/sys/mips/mips/exception.S
index f56d609..1baf2b2 100644
--- a/sys/mips/mips/exception.S
+++ b/sys/mips/mips/exception.S
@@ -243,7 +243,7 @@ SlowFault:
 	and     a0, a0, a2              ; \
         mtc0    a0, MIPS_COP_0_STATUS   ; \
 	ITLBNOPFIX
-#elif defined(TARGET_XLR_XLS)
+#elif defined(CPU_RMI)
 #define CLEAR_STATUS \
 	mfc0    a0, MIPS_COP_0_STATUS   ;\
 	li      a2, (MIPS_SR_KX | MIPS_SR_UX | MIPS_SR_COP_2_BIT) ; \
@@ -485,7 +485,7 @@ NNON_LEAF(MipsUserGenException, CALLFRAME_SIZ, ra)
 	and	t0, a0, ~(MIPS_SR_COP_1_BIT | MIPS_SR_EXL | MIPS3_SR_KSU_MASK | MIPS_SR_INT_IE)
 #if defined(CPU_CNMIPS)
 	or      t0, t0, (MIPS_SR_KX | MIPS_SR_SX | MIPS_SR_UX | MIPS_SR_PX)
-#elif defined(TARGET_XLR_XLS)	
+#elif defined(CPU_RMI)	
 	or      t0, t0, (MIPS_SR_KX | MIPS_SR_UX | MIPS_SR_COP_2_BIT)
 #endif	
 	mtc0	t0, MIPS_COP_0_STATUS
@@ -703,7 +703,7 @@ NNON_LEAF(MipsUserIntr, CALLFRAME_SIZ, ra)
 	and	t0, a0, ~(MIPS_SR_COP_1_BIT | MIPS_SR_EXL | MIPS_SR_INT_IE | MIPS3_SR_KSU_MASK)
 #ifdef CPU_CNMIPS
 	or      t0, t0, (MIPS_SR_KX | MIPS_SR_SX | MIPS_SR_UX | MIPS_SR_PX)
-#elif defined(TARGET_XLR_XLS)	
+#elif defined(CPU_RMI)	
 	or      t0, t0, (MIPS_SR_KX | MIPS_SR_UX | MIPS_SR_COP_2_BIT)
 #endif	
 	mtc0	t0, MIPS_COP_0_STATUS
diff --git a/sys/mips/mips/locore.S b/sys/mips/mips/locore.S
index bd39578..e45e239 100644
--- a/sys/mips/mips/locore.S
+++ b/sys/mips/mips/locore.S
@@ -99,7 +99,7 @@ VECTOR(_locore, unknown)
 
 	/* Reset these bits */
         li	t0, ~(MIPS_SR_DE | MIPS_SR_SOFT_RESET | MIPS_SR_ERL | MIPS_SR_EXL | MIPS_SR_INT_IE)
-#elif defined (TARGET_XLR_XLS)
+#elif defined (CPU_RMI)
 	/* Set these bits */
         li	t1, (MIPS_SR_COP_2_BIT | MIPS_SR_COP_0_BIT | MIPS_SR_KX | MIPS_SR_UX)
 
diff --git a/sys/mips/mips/machdep.c b/sys/mips/mips/machdep.c
index 060e101..8c16051 100644
--- a/sys/mips/mips/machdep.c
+++ b/sys/mips/mips/machdep.c
@@ -334,7 +334,7 @@ mips_vector_init(void)
 	bcopy(MipsTLBMiss, (void *)MIPS_UTLB_MISS_EXC_VEC,
 	      MipsTLBMissEnd - MipsTLBMiss);
 
-#if defined(CPU_CNMIPS) || defined(TARGET_XLR_XLS)
+#if defined(CPU_CNMIPS) || defined(CPU_RMI)
 /* Fake, but sufficient, for the 32-bit with 64-bit hardware addresses  */
 	bcopy(MipsTLBMiss, (void *)MIPS3_XTLB_MISS_EXC_VEC,
 	      MipsTLBMissEnd - MipsTLBMiss);
diff --git a/sys/mips/rmi/std.xlr b/sys/mips/rmi/std.xlr
index c6221b9..0252b95 100644
--- a/sys/mips/rmi/std.xlr
+++ b/sys/mips/rmi/std.xlr
@@ -4,7 +4,4 @@ files	"../rmi/files.xlr"
 #
 # XXXMIPS: It's a stub, isn't it?
 #
-cpu     CPU_MIPS4KC
 option	NOFPU
-# Kludge for now
-options TARGET_XLR_XLS