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| author | adrian <adrian@FreeBSD.org> | 2011-11-12 16:47:23 +0000 |
|---|---|---|
| committer | adrian <adrian@FreeBSD.org> | 2011-11-12 16:47:23 +0000 |
| commit | 9317b122766124f01cf13a5a45e21e4f95f60cfc (patch) | |
| tree | 9ee766022255eb6fb3142ac93e9bfb8c09a345f7 | |
| parent | c5ef7a7205e8fee2beee0429109b8098997122af (diff) | |
| download | FreeBSD-src-9317b122766124f01cf13a5a45e21e4f95f60cfc.zip FreeBSD-src-9317b122766124f01cf13a5a45e21e4f95f60cfc.tar.gz | |
Disable writing to the extension CYCPWR1 register.
This seems to make ANI behave better on the AR5416/AR5418.
Sponsored by: Hobnob, Inc.
| -rw-r--r-- | sys/dev/ath/ath_hal/ar5416/ar5416_ani.c | 5 | ||||
| -rw-r--r-- | sys/dev/ath/ath_hal/ar5416/ar5416phy.h | 6 |
2 files changed, 0 insertions, 11 deletions
diff --git a/sys/dev/ath/ath_hal/ar5416/ar5416_ani.c b/sys/dev/ath/ath_hal/ar5416/ar5416_ani.c index a521d5a..deaacd7 100644 --- a/sys/dev/ath/ath_hal/ar5416/ar5416_ani.c +++ b/sys/dev/ath/ath_hal/ar5416/ar5416_ani.c @@ -342,11 +342,6 @@ ar5416AniControl(struct ath_hal *ah, HAL_ANI_CMD cmd, int param) OS_REG_RMW_FIELD(ah, AR_PHY_TIMING5, AR_PHY_TIMING5_CYCPWR_THR1, params->cycPwrThr1[level]); - /* Only set the ext channel cycpwr_thr1 field for ht/40 */ - if (IEEE80211_IS_CHAN_HT40(AH_PRIVATE(ah)->ah_curchan)) - OS_REG_RMW_FIELD(ah, AR_PHY_EXT_CCA, - AR_PHY_EXT_TIMING5_CYCPWR_THR1, params->cycPwrThr1[level]); - if (level > aniState->spurImmunityLevel) ahp->ah_stats.ast_ani_spurup++; else if (level < aniState->spurImmunityLevel) diff --git a/sys/dev/ath/ath_hal/ar5416/ar5416phy.h b/sys/dev/ath/ath_hal/ar5416/ar5416phy.h index 82e3801..a983277 100644 --- a/sys/dev/ath/ath_hal/ar5416/ar5416phy.h +++ b/sys/dev/ath/ath_hal/ar5416/ar5416phy.h @@ -121,12 +121,6 @@ #define AR_PHY_EXT_MINCCA_PWR_S 23 #define AR_PHY_EXT_CCA_THRESH62 0x007F0000 #define AR_PHY_EXT_CCA_THRESH62_S 16 -/* - * This duplicates AR_PHY_EXT_CCA_CYCPWR_THR1; it reads more like - * an ANI register this way. - */ -#define AR_PHY_EXT_TIMING5_CYCPWR_THR1 0x0000FE00 -#define AR_PHY_EXT_TIMING5_CYCPWR_THR1_S 9 #define AR9280_PHY_EXT_MINCCA_PWR 0x01FF0000 #define AR9280_PHY_EXT_MINCCA_PWR_S 16 |
