diff options
author | jhb <jhb@FreeBSD.org> | 2006-06-03 20:41:55 +0000 |
---|---|---|
committer | jhb <jhb@FreeBSD.org> | 2006-06-03 20:41:55 +0000 |
commit | 23299c192f41ea470b6da567c41e4e737d51a6fb (patch) | |
tree | 911b58605b31a26cdabd10e7926a2b426074cf72 | |
parent | fae2502406efe812bb5df287bc6e34c5a4ea1146 (diff) | |
download | FreeBSD-src-23299c192f41ea470b6da567c41e4e737d51a6fb.zip FreeBSD-src-23299c192f41ea470b6da567c41e4e737d51a6fb.tar.gz |
- Switch on the full 32-bit device ID to avoid collisions between the
vendor-specific device ids across vendors.
- Include the revision in the dc_devs[] array instead of special casing
the revid handling in dc_devtype().
- Use PCI bus accessors to read registers instead of pci_read_config()
where possible.
- Use an 8-bit write to update the latency timer.
- Use PCIR_xxx constants and remove unused DC_xxx related to standard
PCI config registers.
MFC after: 1 week
-rw-r--r-- | sys/dev/dc/if_dc.c | 209 | ||||
-rw-r--r-- | sys/dev/dc/if_dcreg.h | 90 |
2 files changed, 94 insertions, 205 deletions
diff --git a/sys/dev/dc/if_dc.c b/sys/dev/dc/if_dc.c index fb141ea..5ea8009 100644 --- a/sys/dev/dc/if_dc.c +++ b/sys/dev/dc/if_dc.c @@ -150,77 +150,75 @@ MODULE_DEPEND(dc, miibus, 1, 1, 1); * Various supported device vendors/types and their names. */ static struct dc_type dc_devs[] = { - { DC_VENDORID_DEC, DC_DEVICEID_21143, + { DC_DEVID(DC_VENDORID_DEC, DC_DEVICEID_21143), 0, "Intel 21143 10/100BaseTX" }, - { DC_VENDORID_DAVICOM, DC_DEVICEID_DM9009, + { DC_DEVID(DC_VENDORID_DAVICOM, DC_DEVICEID_DM9009), 0, "Davicom DM9009 10/100BaseTX" }, - { DC_VENDORID_DAVICOM, DC_DEVICEID_DM9100, + { DC_DEVID(DC_VENDORID_DAVICOM, DC_DEVICEID_DM9100), 0, "Davicom DM9100 10/100BaseTX" }, - { DC_VENDORID_DAVICOM, DC_DEVICEID_DM9102, - "Davicom DM9102 10/100BaseTX" }, - { DC_VENDORID_DAVICOM, DC_DEVICEID_DM9102, + { DC_DEVID(DC_VENDORID_DAVICOM, DC_DEVICEID_DM9102), DC_REVISION_DM9102A, "Davicom DM9102A 10/100BaseTX" }, - { DC_VENDORID_ADMTEK, DC_DEVICEID_AL981, + { DC_DEVID(DC_VENDORID_DAVICOM, DC_DEVICEID_DM9102), 0, + "Davicom DM9102 10/100BaseTX" }, + { DC_DEVID(DC_VENDORID_ADMTEK, DC_DEVICEID_AL981), 0, "ADMtek AL981 10/100BaseTX" }, - { DC_VENDORID_ADMTEK, DC_DEVICEID_AN985, + { DC_DEVID(DC_VENDORID_ADMTEK, DC_DEVICEID_AN985), 0, "ADMtek AN985 10/100BaseTX" }, - { DC_VENDORID_ADMTEK, DC_DEVICEID_ADM9511, + { DC_DEVID(DC_VENDORID_ADMTEK, DC_DEVICEID_ADM9511), 0, "ADMtek ADM9511 10/100BaseTX" }, - { DC_VENDORID_ADMTEK, DC_DEVICEID_ADM9513, + { DC_DEVID(DC_VENDORID_ADMTEK, DC_DEVICEID_ADM9513), 0, "ADMtek ADM9513 10/100BaseTX" }, - { DC_VENDORID_ADMTEK, DC_DEVICEID_FA511, + { DC_DEVID(DC_VENDORID_ADMTEK, DC_DEVICEID_FA511), 0, "Netgear FA511 10/100BaseTX" }, - { DC_VENDORID_ASIX, DC_DEVICEID_AX88140A, - "ASIX AX88140A 10/100BaseTX" }, - { DC_VENDORID_ASIX, DC_DEVICEID_AX88140A, + { DC_DEVID(DC_VENDORID_ASIX, DC_DEVICEID_AX88140A), DC_REVISION_88141, "ASIX AX88141 10/100BaseTX" }, - { DC_VENDORID_MX, DC_DEVICEID_98713, - "Macronix 98713 10/100BaseTX" }, - { DC_VENDORID_MX, DC_DEVICEID_98713, + { DC_DEVID(DC_VENDORID_ASIX, DC_DEVICEID_AX88140A), 0, + "ASIX AX88140A 10/100BaseTX" }, + { DC_DEVID(DC_VENDORID_MX, DC_DEVICEID_98713), DC_REVISION_98713A, "Macronix 98713A 10/100BaseTX" }, - { DC_VENDORID_CP, DC_DEVICEID_98713_CP, + { DC_DEVID(DC_VENDORID_MX, DC_DEVICEID_98713), 0, + "Macronix 98713 10/100BaseTX" }, + { DC_DEVID(DC_VENDORID_CP, DC_DEVICEID_98713_CP), DC_REVISION_98713A, "Compex RL100-TX 10/100BaseTX" }, - { DC_VENDORID_CP, DC_DEVICEID_98713_CP, + { DC_DEVID(DC_VENDORID_CP, DC_DEVICEID_98713_CP), 0, "Compex RL100-TX 10/100BaseTX" }, - { DC_VENDORID_MX, DC_DEVICEID_987x5, - "Macronix 98715/98715A 10/100BaseTX" }, - { DC_VENDORID_MX, DC_DEVICEID_987x5, - "Macronix 98715AEC-C 10/100BaseTX" }, - { DC_VENDORID_MX, DC_DEVICEID_987x5, + { DC_DEVID(DC_VENDORID_MX, DC_DEVICEID_987x5), DC_REVISION_98725, "Macronix 98725 10/100BaseTX" }, - { DC_VENDORID_MX, DC_DEVICEID_98727, + { DC_DEVID(DC_VENDORID_MX, DC_DEVICEID_987x5), DC_REVISION_98715AEC_C, + "Macronix 98715AEC-C 10/100BaseTX" }, + { DC_DEVID(DC_VENDORID_MX, DC_DEVICEID_987x5), 0, + "Macronix 98715/98715A 10/100BaseTX" }, + { DC_DEVID(DC_VENDORID_MX, DC_DEVICEID_98727), 0, "Macronix 98727/98732 10/100BaseTX" }, - { DC_VENDORID_LO, DC_DEVICEID_82C115, + { DC_DEVID(DC_VENDORID_LO, DC_DEVICEID_82C115), 0, "LC82C115 PNIC II 10/100BaseTX" }, - { DC_VENDORID_LO, DC_DEVICEID_82C168, - "82c168 PNIC 10/100BaseTX" }, - { DC_VENDORID_LO, DC_DEVICEID_82C168, + { DC_DEVID(DC_VENDORID_LO, DC_DEVICEID_82C168), DC_REVISION_82C169, "82c169 PNIC 10/100BaseTX" }, - { DC_VENDORID_ACCTON, DC_DEVICEID_EN1217, + { DC_DEVID(DC_VENDORID_LO, DC_DEVICEID_82C168), 0, + "82c168 PNIC 10/100BaseTX" }, + { DC_DEVID(DC_VENDORID_ACCTON, DC_DEVICEID_EN1217), 0, "Accton EN1217 10/100BaseTX" }, - { DC_VENDORID_ACCTON, DC_DEVICEID_EN2242, + { DC_DEVID(DC_VENDORID_ACCTON, DC_DEVICEID_EN2242), 0, "Accton EN2242 MiniPCI 10/100BaseTX" }, - { DC_VENDORID_XIRCOM, DC_DEVICEID_X3201, + { DC_DEVID(DC_VENDORID_XIRCOM, DC_DEVICEID_X3201), 0, "Xircom X3201 10/100BaseTX" }, - { DC_VENDORID_DLINK, DC_DEVICEID_DRP32TXD, + { DC_DEVID(DC_VENDORID_DLINK, DC_DEVICEID_DRP32TXD), 0, "Neteasy DRP-32TXD Cardbus 10/100" }, - { DC_VENDORID_ABOCOM, DC_DEVICEID_FE2500, + { DC_DEVID(DC_VENDORID_ABOCOM, DC_DEVICEID_FE2500), 0, "Abocom FE2500 10/100BaseTX" }, - { DC_VENDORID_ABOCOM, DC_DEVICEID_FE2500MX, + { DC_DEVID(DC_VENDORID_ABOCOM, DC_DEVICEID_FE2500MX), 0, "Abocom FE2500MX 10/100BaseTX" }, - { DC_VENDORID_CONEXANT, DC_DEVICEID_RS7112, + { DC_DEVID(DC_VENDORID_CONEXANT, DC_DEVICEID_RS7112), 0, "Conexant LANfinity MiniPCI 10/100BaseTX" }, - { DC_VENDORID_HAWKING, DC_DEVICEID_HAWKING_PN672TX, + { DC_DEVID(DC_VENDORID_HAWKING, DC_DEVICEID_HAWKING_PN672TX), 0, "Hawking CB102 CardBus 10/100" }, - { DC_VENDORID_PLANEX, DC_DEVICEID_FNW3602T, + { DC_DEVID(DC_VENDORID_PLANEX, DC_DEVICEID_FNW3602T), 0, "PlaneX FNW-3602-T CardBus 10/100" }, - { DC_VENDORID_3COM, DC_DEVICEID_3CSOHOB, + { DC_DEVID(DC_VENDORID_3COM, DC_DEVICEID_3CSOHOB), 0, "3Com OfficeConnect 10/100B" }, - { DC_VENDORID_MICROSOFT, DC_DEVICEID_MSMN120, + { DC_DEVID(DC_VENDORID_MICROSOFT, DC_DEVICEID_MSMN120), 0, "Microsoft MN-120 CardBus 10/100" }, - { DC_VENDORID_MICROSOFT, DC_DEVICEID_MSMN130, - "Microsoft MN-130 10/100" }, - { DC_VENDORID_MICROSOFT, DC_DEVICEID_MSMN130_FAKE, + { DC_DEVID(DC_VENDORID_MICROSOFT, DC_DEVICEID_MSMN130), 0, "Microsoft MN-130 10/100" }, { 0, 0, NULL } }; @@ -1003,7 +1001,7 @@ dc_miibus_mediainit(device_t dev) struct ifmedia *ifm; int rev; - rev = pci_read_config(dev, DC_PCI_CFRV, 4) & 0xFF; + rev = pci_get_revid(dev); sc = device_get_softc(dev); mii = device_get_softc(sc->dc_miibus); @@ -1560,50 +1558,16 @@ static struct dc_type * dc_devtype(device_t dev) { struct dc_type *t; - u_int32_t rev; + u_int32_t devid; + u_int8_t rev; t = dc_devs; + devid = pci_get_devid(dev); + rev = pci_get_revid(dev); while (t->dc_name != NULL) { - if ((pci_get_vendor(dev) == t->dc_vid) && - (pci_get_device(dev) == t->dc_did)) { - /* Check the PCI revision */ - rev = pci_read_config(dev, DC_PCI_CFRV, 4) & 0xFF; - if (t->dc_did == DC_DEVICEID_98713 && - rev >= DC_REVISION_98713A) - t++; - if (t->dc_did == DC_DEVICEID_98713_CP && - rev >= DC_REVISION_98713A) - t++; - if (t->dc_did == DC_DEVICEID_987x5 && - rev >= DC_REVISION_98715AEC_C) - t++; - if (t->dc_did == DC_DEVICEID_987x5 && - rev >= DC_REVISION_98725) - t++; - if (t->dc_did == DC_DEVICEID_AX88140A && - rev >= DC_REVISION_88141) - t++; - if (t->dc_did == DC_DEVICEID_82C168 && - rev >= DC_REVISION_82C169) - t++; - if (t->dc_did == DC_DEVICEID_DM9102 && - rev >= DC_REVISION_DM9102A) - t++; - /* - * The Microsoft MN-130 has a device ID of 0x0002, - * which happens to be the same as the PNIC 82c168. - * To keep dc_attach() from getting confused, we - * pretend its ID is something different. - * XXX: ideally, dc_attach() should be checking - * vendorid+deviceid together to avoid such - * collisions. - */ - if (t->dc_vid == DC_VENDORID_MICROSOFT && - t->dc_did == DC_DEVICEID_MSMN130) - t++; + if (devid == t->dc_devid && rev >= t->dc_minrev) return (t); - } t++; } @@ -1881,53 +1845,55 @@ dc_attach(device_t dev) /* Need this info to decide on a chip type. */ sc->dc_info = dc_devtype(dev); - revision = pci_read_config(dev, DC_PCI_CFRV, 4) & 0x000000FF; + revision = pci_get_revid(dev); /* Get the eeprom width, but PNIC and XIRCOM have diff eeprom */ - if (sc->dc_info->dc_did != DC_DEVICEID_82C168 && - sc->dc_info->dc_did != DC_DEVICEID_X3201) + if (sc->dc_info->dc_devid != + DC_DEVID(DC_VENDORID_LO, DC_DEVICEID_82C168) && + sc->dc_info->dc_devid != + DC_DEVID(DC_VENDORID_XIRCOM, DC_DEVICEID_X3201)) dc_eeprom_width(sc); - switch (sc->dc_info->dc_did) { - case DC_DEVICEID_21143: + switch (sc->dc_info->dc_devid) { + case DC_DEVID(DC_VENDORID_DEC, DC_DEVICEID_21143): sc->dc_type = DC_TYPE_21143; sc->dc_flags |= DC_TX_POLL | DC_TX_USE_TX_INTR; sc->dc_flags |= DC_REDUCED_MII_POLL; /* Save EEPROM contents so we can parse them later. */ dc_read_srom(sc, sc->dc_romwidth); break; - case DC_DEVICEID_DM9009: - case DC_DEVICEID_DM9100: - case DC_DEVICEID_DM9102: + case DC_DEVID(DC_VENDORID_DAVICOM, DC_DEVICEID_DM9009): + case DC_DEVID(DC_VENDORID_DAVICOM, DC_DEVICEID_DM9100): + case DC_DEVID(DC_VENDORID_DAVICOM, DC_DEVICEID_DM9102): sc->dc_type = DC_TYPE_DM9102; sc->dc_flags |= DC_TX_COALESCE | DC_TX_INTR_ALWAYS; sc->dc_flags |= DC_REDUCED_MII_POLL | DC_TX_STORENFWD; sc->dc_flags |= DC_TX_ALIGN; sc->dc_pmode = DC_PMODE_MII; + /* Increase the latency timer value. */ - command = pci_read_config(dev, DC_PCI_CFLT, 4); - command &= 0xFFFF00FF; - command |= 0x00008000; - pci_write_config(dev, DC_PCI_CFLT, command, 4); + pci_write_config(dev, PCIR_LATTIMER, 0x80, 1); break; - case DC_DEVICEID_AL981: + case DC_DEVID(DC_VENDORID_ADMTEK, DC_DEVICEID_AL981): sc->dc_type = DC_TYPE_AL981; sc->dc_flags |= DC_TX_USE_TX_INTR; sc->dc_flags |= DC_TX_ADMTEK_WAR; sc->dc_pmode = DC_PMODE_MII; dc_read_srom(sc, sc->dc_romwidth); break; - case DC_DEVICEID_AN985: - case DC_DEVICEID_ADM9511: - case DC_DEVICEID_ADM9513: - case DC_DEVICEID_DRP32TXD: - case DC_DEVICEID_FA511: - case DC_DEVICEID_FE2500: - case DC_DEVICEID_EN2242: - case DC_DEVICEID_HAWKING_PN672TX: - case DC_DEVICEID_3CSOHOB: - case DC_DEVICEID_MSMN120: - case DC_DEVICEID_MSMN130_FAKE: /* XXX avoid collision with PNIC*/ + case DC_DEVID(DC_VENDORID_ADMTEK, DC_DEVICEID_AN985): + case DC_DEVID(DC_VENDORID_ADMTEK, DC_DEVICEID_ADM9511): + case DC_DEVID(DC_VENDORID_ADMTEK, DC_DEVICEID_ADM9513): + case DC_DEVID(DC_VENDORID_DLINK, DC_DEVICEID_DRP32TXD): + case DC_DEVID(DC_VENDORID_ADMTEK, DC_DEVICEID_FA511): + case DC_DEVID(DC_VENDORID_ABOCOM, DC_DEVICEID_FE2500): + case DC_DEVID(DC_VENDORID_ABOCOM, DC_DEVICEID_FE2500MX): + case DC_DEVID(DC_VENDORID_ACCTON, DC_DEVICEID_EN2242): + case DC_DEVID(DC_VENDORID_HAWKING, DC_DEVICEID_HAWKING_PN672TX): + case DC_DEVID(DC_VENDORID_PLANEX, DC_DEVICEID_FNW3602T): + case DC_DEVID(DC_VENDORID_3COM, DC_DEVICEID_3CSOHOB): + case DC_DEVID(DC_VENDORID_MICROSOFT, DC_DEVICEID_MSMN120): + case DC_DEVID(DC_VENDORID_MICROSOFT, DC_DEVICEID_MSMN130): sc->dc_type = DC_TYPE_AN985; sc->dc_flags |= DC_64BIT_HASH; sc->dc_flags |= DC_TX_USE_TX_INTR; @@ -1935,8 +1901,8 @@ dc_attach(device_t dev) sc->dc_pmode = DC_PMODE_MII; /* Don't read SROM for - auto-loaded on reset */ break; - case DC_DEVICEID_98713: - case DC_DEVICEID_98713_CP: + case DC_DEVID(DC_VENDORID_MX, DC_DEVICEID_98713): + case DC_DEVID(DC_VENDORID_CP, DC_DEVICEID_98713_CP): if (revision < DC_REVISION_98713A) { sc->dc_type = DC_TYPE_98713; } @@ -1947,8 +1913,8 @@ dc_attach(device_t dev) sc->dc_flags |= DC_REDUCED_MII_POLL; sc->dc_flags |= DC_TX_POLL | DC_TX_USE_TX_INTR; break; - case DC_DEVICEID_987x5: - case DC_DEVICEID_EN1217: + case DC_DEVID(DC_VENDORID_MX, DC_DEVICEID_987x5): + case DC_DEVID(DC_VENDORID_ACCTON, DC_DEVICEID_EN1217): /* * Macronix MX98715AEC-C/D/E parts have only a * 128-bit hash table. We need to deal with these @@ -1963,17 +1929,17 @@ dc_attach(device_t dev) sc->dc_flags |= DC_TX_POLL | DC_TX_USE_TX_INTR; sc->dc_flags |= DC_REDUCED_MII_POLL | DC_21143_NWAY; break; - case DC_DEVICEID_98727: + case DC_DEVID(DC_VENDORID_MX, DC_DEVICEID_98727): sc->dc_type = DC_TYPE_987x5; sc->dc_flags |= DC_TX_POLL | DC_TX_USE_TX_INTR; sc->dc_flags |= DC_REDUCED_MII_POLL | DC_21143_NWAY; break; - case DC_DEVICEID_82C115: + case DC_DEVID(DC_VENDORID_LO, DC_DEVICEID_82C115): sc->dc_type = DC_TYPE_PNICII; sc->dc_flags |= DC_TX_POLL | DC_TX_USE_TX_INTR | DC_128BIT_HASH; sc->dc_flags |= DC_REDUCED_MII_POLL | DC_21143_NWAY; break; - case DC_DEVICEID_82C168: + case DC_DEVID(DC_VENDORID_LO, DC_DEVICEID_82C168): sc->dc_type = DC_TYPE_PNIC; sc->dc_flags |= DC_TX_STORENFWD | DC_TX_INTR_ALWAYS; sc->dc_flags |= DC_PNIC_RX_BUG_WAR; @@ -1981,13 +1947,13 @@ dc_attach(device_t dev) if (revision < DC_REVISION_82C169) sc->dc_pmode = DC_PMODE_SYM; break; - case DC_DEVICEID_AX88140A: + case DC_DEVID(DC_VENDORID_ASIX, DC_DEVICEID_AX88140A): sc->dc_type = DC_TYPE_ASIX; sc->dc_flags |= DC_TX_USE_TX_INTR | DC_TX_INTR_FIRSTFRAG; sc->dc_flags |= DC_REDUCED_MII_POLL; sc->dc_pmode = DC_PMODE_MII; break; - case DC_DEVICEID_X3201: + case DC_DEVID(DC_VENDORID_XIRCOM, DC_DEVICEID_X3201): sc->dc_type = DC_TYPE_XIRCOM; sc->dc_flags |= DC_TX_INTR_ALWAYS | DC_TX_COALESCE | DC_TX_ALIGN; @@ -1998,7 +1964,7 @@ dc_attach(device_t dev) */ sc->dc_pmode = DC_PMODE_MII; break; - case DC_DEVICEID_RS7112: + case DC_DEVID(DC_VENDORID_CONEXANT, DC_DEVICEID_RS7112): sc->dc_type = DC_TYPE_CONEXANT; sc->dc_flags |= DC_TX_INTR_ALWAYS; sc->dc_flags |= DC_REDUCED_MII_POLL; @@ -2006,7 +1972,8 @@ dc_attach(device_t dev) dc_read_srom(sc, sc->dc_romwidth); break; default: - device_printf(dev, "unknown device: %x\n", sc->dc_info->dc_did); + device_printf(dev, "unknown device: %x\n", + sc->dc_info->dc_devid); break; } @@ -2014,8 +1981,7 @@ dc_attach(device_t dev) if (DC_IS_DAVICOM(sc)) sc->dc_cachesize = 0; else - sc->dc_cachesize = pci_read_config(dev, - DC_PCI_CFLT, 4) & 0xFF; + sc->dc_cachesize = pci_get_cachelnsz(dev); /* Reset the adapter. */ dc_reset(sc); @@ -2249,7 +2215,8 @@ dc_attach(device_t dev) * LEDs, and twiddling these bits has adverse effects * on them. (I.e. you suddenly can't get a link.) */ - if (pci_read_config(dev, DC_PCI_CSID, 4) != 0x80281033) + if (!(pci_get_subvendor(dev) == 0x1033 && + pci_get_subdevice(dev) == 0x8028)) sc->dc_flags |= DC_TULIP_LEDS; error = 0; } diff --git a/sys/dev/dc/if_dcreg.h b/sys/dev/dc/if_dcreg.h index 9fd1e4f..e842ff9 100644 --- a/sys/dev/dc/if_dcreg.h +++ b/sys/dev/dc/if_dcreg.h @@ -512,8 +512,8 @@ struct dc_mediainfo { struct dc_type { - u_int16_t dc_vid; - u_int16_t dc_did; + u_int32_t dc_devid; + u_int8_t dc_minrev; char *dc_name; }; @@ -1004,58 +1004,22 @@ struct dc_softc { #define DC_DEVICEID_MSMN120 0x0001 #define DC_DEVICEID_MSMN130 0x0002 -#define DC_DEVICEID_MSMN130_FAKE 0xFFF2 + +#define DC_DEVID(vendor, device) ((device) << 16 | (vendor)) /* * PCI low memory base and low I/O base register, and * other PCI registers. */ -#define DC_PCI_CFID 0x00 /* Id */ -#define DC_PCI_CFCS 0x04 /* Command and status */ -#define DC_PCI_CFRV 0x08 /* Revision */ -#define DC_PCI_CFLT 0x0C /* Latency timer */ -#define DC_PCI_CFBIO 0x10 /* Base I/O address */ -#define DC_PCI_CFBMA 0x14 /* Base memory address */ -#define DC_PCI_CCIS 0x28 /* Card info struct */ -#define DC_PCI_CSID 0x2C /* Subsystem ID */ -#define DC_PCI_CBER 0x30 /* Expansion ROM base address */ -#define DC_PCI_CCAP 0x34 /* Caps pointer - PD/TD chip only */ -#define DC_PCI_CFIT 0x3C /* Interrupt */ +#define DC_PCI_CFBIO PCIR_BAR(0) /* Base I/O address */ +#define DC_PCI_CFBMA PCIR_BAR(1) /* Base memory address */ #define DC_PCI_CFDD 0x40 /* Device and driver area */ #define DC_PCI_CWUA0 0x44 /* Wake-Up LAN addr 0 */ #define DC_PCI_CWUA1 0x48 /* Wake-Up LAN addr 1 */ #define DC_PCI_SOP0 0x4C /* SecureON passwd 0 */ #define DC_PCI_SOP1 0x50 /* SecureON passwd 1 */ #define DC_PCI_CWUC 0x54 /* Configuration Wake-Up cmd */ -#define DC_PCI_CCID 0xDC /* Capability ID - PD/TD only */ -#define DC_PCI_CPMC 0xE0 /* Pwrmgmt ctl & sts - PD/TD only */ - -/* PCI ID register */ -#define DC_CFID_VENDOR 0x0000FFFF -#define DC_CFID_DEVICE 0xFFFF0000 - -/* PCI command/status register */ -#define DC_CFCS_IOSPACE 0x00000001 /* I/O space enable */ -#define DC_CFCS_MEMSPACE 0x00000002 /* memory space enable */ -#define DC_CFCS_BUSMASTER 0x00000004 /* bus master enable */ -#define DC_CFCS_MWI_ENB 0x00000010 /* mem write and inval enable */ -#define DC_CFCS_PARITYERR_ENB 0x00000040 /* parity error enable */ -#define DC_CFCS_SYSERR_ENB 0x00000100 /* system error enable */ -#define DC_CFCS_NEWCAPS 0x00100000 /* new capabilities */ -#define DC_CFCS_FAST_B2B 0x00800000 /* fast back-to-back capable */ -#define DC_CFCS_DATAPARITY 0x01000000 /* Parity error report */ -#define DC_CFCS_DEVSELTIM 0x06000000 /* devsel timing */ -#define DC_CFCS_TGTABRT 0x10000000 /* received target abort */ -#define DC_CFCS_MASTERABRT 0x20000000 /* received master abort */ -#define DC_CFCS_SYSERR 0x40000000 /* asserted system error */ -#define DC_CFCS_PARITYERR 0x80000000 /* asserted parity error */ - -/* PCI revision register */ -#define DC_CFRV_STEPPING 0x0000000F -#define DC_CFRV_REVISION 0x000000F0 -#define DC_CFRV_SUBCLASS 0x00FF0000 -#define DC_CFRV_BASECLASS 0xFF000000 #define DC_21143_PB_REV 0x00000030 #define DC_21143_TB_REV 0x00000030 @@ -1064,48 +1028,6 @@ struct dc_softc { #define DC_21143_PD_REV 0x00000041 #define DC_21143_TD_REV 0x00000041 -/* PCI latency timer register */ -#define DC_CFLT_CACHELINESIZE 0x000000FF -#define DC_CFLT_LATENCYTIMER 0x0000FF00 - -/* PCI subsystem ID register */ -#define DC_CSID_VENDOR 0x0000FFFF -#define DC_CSID_DEVICE 0xFFFF0000 - -/* PCI cababilities pointer */ -#define DC_CCAP_OFFSET 0x000000FF - -/* PCI interrupt config register */ -#define DC_CFIT_INTLINE 0x000000FF -#define DC_CFIT_INTPIN 0x0000FF00 -#define DC_CFIT_MIN_GNT 0x00FF0000 -#define DC_CFIT_MAX_LAT 0xFF000000 - -/* PCI capability register */ -#define DC_CCID_CAPID 0x000000FF -#define DC_CCID_NEXTPTR 0x0000FF00 -#define DC_CCID_PM_VERS 0x00070000 -#define DC_CCID_PME_CLK 0x00080000 -#define DC_CCID_DVSPEC_INT 0x00200000 -#define DC_CCID_STATE_D1 0x02000000 -#define DC_CCID_STATE_D2 0x04000000 -#define DC_CCID_PME_D0 0x08000000 -#define DC_CCID_PME_D1 0x10000000 -#define DC_CCID_PME_D2 0x20000000 -#define DC_CCID_PME_D3HOT 0x40000000 -#define DC_CCID_PME_D3COLD 0x80000000 - -/* PCI power management control/status register */ -#define DC_CPMC_STATE 0x00000003 -#define DC_CPMC_PME_ENB 0x00000100 -#define DC_CPMC_PME_STS 0x00008000 - -#define DC_PSTATE_D0 0x0 -#define DC_PSTATE_D1 0x1 -#define DC_PSTATE_D2 0x2 -#define DC_PSTATE_D3 0x3 - -/* Device specific region */ /* Configuration and driver area */ #define DC_CFDD_DRVUSE 0x0000FFFF #define DC_CFDD_SNOOZE_MODE 0x40000000 |