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authoradrian <adrian@FreeBSD.org>2011-03-13 08:36:57 +0000
committeradrian <adrian@FreeBSD.org>2011-03-13 08:36:57 +0000
commit7dbf8b7720f480f9a1f68e87c647184cd1a9897d (patch)
treec87e3556cd15fee2056f9f2a91536de96cd99f1b
parent05ce2019e47029c91ea838914f8f15499fad64d2 (diff)
downloadFreeBSD-src-7dbf8b7720f480f9a1f68e87c647184cd1a9897d.zip
FreeBSD-src-7dbf8b7720f480f9a1f68e87c647184cd1a9897d.tar.gz
Add the missing AR724x DDR flush routines for if_arge0.
Submitted by: Luiz Otavio O Souza
-rw-r--r--sys/mips/atheros/ar724x_chip.c2
-rw-r--r--sys/mips/atheros/ar724xreg.h3
2 files changed, 5 insertions, 0 deletions
diff --git a/sys/mips/atheros/ar724x_chip.c b/sys/mips/atheros/ar724x_chip.c
index 450dd19..63a8ffb 100644
--- a/sys/mips/atheros/ar724x_chip.c
+++ b/sys/mips/atheros/ar724x_chip.c
@@ -136,11 +136,13 @@ ar724x_chip_set_pll_ge1(int speed)
static void
ar724x_chip_ddr_flush_ge0(void)
{
+ ar71xx_ddr_flush(AR724X_DDR_REG_FLUSH_GE0);
}
static void
ar724x_chip_ddr_flush_ge1(void)
{
+ ar71xx_ddr_flush(AR724X_DDR_REG_FLUSH_GE1);
}
static uint32_t
diff --git a/sys/mips/atheros/ar724xreg.h b/sys/mips/atheros/ar724xreg.h
index ec7ef15..ad3fa78 100644
--- a/sys/mips/atheros/ar724xreg.h
+++ b/sys/mips/atheros/ar724xreg.h
@@ -47,6 +47,9 @@
#define AR724X_BASE_FREQ 5000000
+#define AR724X_DDR_REG_FLUSH_GE0 (AR71XX_DDR_CONFIG + 0x7c)
+#define AR724X_DDR_REG_FLUSH_GE1 (AR71XX_DDR_CONFIG + 0x80)
+
#define AR724X_RESET_REG_RESET_MODULE AR71XX_RST_BLOCK_BASE + 0x1c
#define AR724X_RESET_MODULE_USB_OHCI_DLL (1 << 3)
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