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| author | rpaulo <rpaulo@FreeBSD.org> | 2013-04-17 06:51:17 +0000 |
|---|---|---|
| committer | rpaulo <rpaulo@FreeBSD.org> | 2013-04-17 06:51:17 +0000 |
| commit | 1f4363857d0d52f96ae96f2b7d62b529a5442146 (patch) | |
| tree | 909950935c0d84907e602212d22cce7a606efaee | |
| parent | d3334c59c742f5f6363fb946914d10743438284a (diff) | |
| download | FreeBSD-src-1f4363857d0d52f96ae96f2b7d62b529a5442146.zip FreeBSD-src-1f4363857d0d52f96ae96f2b7d62b529a5442146.tar.gz | |
Print more bits from the standard extended features CPUID which will be
available in the Haswell architecture (c.f. Intel Document #319433-012A).
| -rw-r--r-- | sys/amd64/amd64/identcpu.c | 13 |
1 files changed, 13 insertions, 0 deletions
diff --git a/sys/amd64/amd64/identcpu.c b/sys/amd64/amd64/identcpu.c index 2517498..30a99a5 100644 --- a/sys/amd64/amd64/identcpu.c +++ b/sys/amd64/amd64/identcpu.c @@ -388,11 +388,24 @@ printcpuinfo(void) printf("\n Standard Extended Features=0x%b", cpu_stdext_feature, "\020" + /* RDFSBASE/RDGSBASE/WRFSBASE/WRGSBASE */ "\001GSFSBASE" "\002TSCADJ" + /* Bit Manipulation Instructions */ + "\004BMI1" + /* Hardware Lock Elision */ + "\005HLE" + /* Advanced Vector Instructions 2 */ + "\006AVX2" + /* Supervisor Mode Execution Prot. */ "\010SMEP" + /* Bit Manipulation Instructions */ + "\011BMI2" "\012ENHMOVSB" + /* Invalidate Processor Context ID */ "\013INVPCID" + /* Restricted Transactional Memory */ + "\014RTM" ); } |
