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author | adrian <adrian@FreeBSD.org> | 2011-03-20 08:47:59 +0000 |
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committer | adrian <adrian@FreeBSD.org> | 2011-03-20 08:47:59 +0000 |
commit | 64679243da35a1bfdf51dce952e786fc569d370d (patch) | |
tree | e88a5b55ba5ed4f5a9baaf4813e7baa44706222d | |
parent | 3923f7a93d657daafff44dd9dc142330f0098a08 (diff) | |
download | FreeBSD-src-64679243da35a1bfdf51dce952e786fc569d370d.zip FreeBSD-src-64679243da35a1bfdf51dce952e786fc569d370d.tar.gz |
* Remove a not-needed check in the AR5416+ case
* Restore the chip default of the DCU backoff threshold to 0x2,
mirroring what ath9k does.
-rw-r--r-- | sys/dev/ath/ath_hal/ar5416/ar5416_xmit.c | 12 |
1 files changed, 6 insertions, 6 deletions
diff --git a/sys/dev/ath/ath_hal/ar5416/ar5416_xmit.c b/sys/dev/ath/ath_hal/ar5416/ar5416_xmit.c index 97f3174..55c7391 100644 --- a/sys/dev/ath/ath_hal/ar5416/ar5416_xmit.c +++ b/sys/dev/ath/ath_hal/ar5416/ar5416_xmit.c @@ -919,12 +919,12 @@ ar5416ResetTxQueue(struct ath_hal *ah, u_int q) /* NB: always enable DCU to wait for next fragment from QCU */ dmisc = AR_D_MISC_FRAG_WAIT_EN; -#ifdef AH_SUPPORT_5311 - if (AH_PRIVATE(ah)->ah_macVersion < AR_SREV_VERSION_OAHU) { - /* Configure DCU to use the global sequence count */ - dmisc |= AR5311_D_MISC_SEQ_NUM_CONTROL; - } -#endif + /* + * The chip reset default is to use a DCU backoff threshold of 0x2. + * Restore this when programming the DCU MISC register. + */ + dmisc |= 0x2; + /* multiqueue support */ if (qi->tqi_cbrPeriod) { OS_REG_WRITE(ah, AR_QCBRCFG(q), |