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| author | jfv <jfv@FreeBSD.org> | 2013-08-05 16:16:50 +0000 |
|---|---|---|
| committer | jfv <jfv@FreeBSD.org> | 2013-08-05 16:16:50 +0000 |
| commit | fcc01a7fa0405e9a2a84a9c83efd8184ec7ea386 (patch) | |
| tree | ad3b2d48e44110b4391840bf3dd425848f18685d | |
| parent | bbcaa9e294d54acd3e83c0eed17b7617ce3ee64c (diff) | |
| download | FreeBSD-src-fcc01a7fa0405e9a2a84a9c83efd8184ec7ea386.zip FreeBSD-src-fcc01a7fa0405e9a2a84a9c83efd8184ec7ea386.tar.gz | |
Correct a fat-finger in the last delta.
MFC after: ASAP
| -rw-r--r-- | sys/dev/ixgbe/ixgbe.c | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/sys/dev/ixgbe/ixgbe.c b/sys/dev/ixgbe/ixgbe.c index 42fadd4..9ac585a 100644 --- a/sys/dev/ixgbe/ixgbe.c +++ b/sys/dev/ixgbe/ixgbe.c @@ -1581,7 +1581,7 @@ ixgbe_msix_link(void *arg) /* First get the cause */ reg_eicr = IXGBE_READ_REG(hw, IXGBE_EICS); /* Be sure the queue bits are not cleared */ - reg_eicr = ~IXGBE_EICR_RTX_QUEUE; + reg_eicr &= ~IXGBE_EICR_RTX_QUEUE; /* Clear interrupt with write */ IXGBE_WRITE_REG(hw, IXGBE_EICR, reg_eicr); |
