Remove EOL whitespace.

2 files changed, 156 insertions, 156 deletions

diff --git a/lib/libpmc/pmc.haswell.3 b/lib/libpmc/pmc.haswell.3
index f73f549..dd0cbb8 100644
--- a/lib/libpmc/pmc.haswell.3
+++ b/lib/libpmc/pmc.haswell.3
@@ -201,60 +201,60 @@ Haswell programmable PMCs support the following events:
 .Bl -tag -width indent
 .It Li LD_BLOCKS.STORE_FORWARD
 .Pq Event 03H , Umask 02H
-Loads blocked by overlapping with store buffer that 
-cannot be forwarded. 
+Loads blocked by overlapping with store buffer that
+cannot be forwarded.
 .It Li MISALIGN_MEM_REF.LOADS
 .Pq Event 05H , Umask 01H
-Speculative cache-line split load uops dispatched to 
-L1D. 
+Speculative cache-line split load uops dispatched to
+L1D.
 .It Li MISALIGN_MEM_REF.STORES
 .Pq Event 05H , Umask 02H
-Speculative cache-line split Store-address uops 
-dispatched to L1D. 
+Speculative cache-line split Store-address uops
+dispatched to L1D.
 .It Li LD_BLOCKS_PARTIAL.ADDRESS_ALIAS
 .Pq Event 07H , Umask 01H
-False dependencies in MOB due to partial compare 
-on address. 
+False dependencies in MOB due to partial compare
+on address.
 .It Li DTLB_LOAD_MISSES.MISS_CAUSES_A_WALK
 .Pq Event 08H , Umask 01H
-Misses in all TLB levels that cause a page walk of any 
-page size. 
+Misses in all TLB levels that cause a page walk of any
+page size.
 .It Li DTLB_LOAD_MISSES.WALK_COMPLETED_4K
 .Pq Event 08H , Umask 02H
-Completed page walks due to demand load misses 
-that caused 4K page walks in any TLB levels. 
+Completed page walks due to demand load misses
+that caused 4K page walks in any TLB levels.
 .It Li DTLB_LOAD_MISSES.WALK_COMPLETED_2M_4K
 .Pq Event 08H , Umask 02H
-Completed page walks due to demand load misses 
-that caused 2M/4M page walks in any TLB levels. 
+Completed page walks due to demand load misses
+that caused 2M/4M page walks in any TLB levels.
 .It Li DTLB_LOAD_MISSES.WALK_COMPLETED
 .Pq Event 08H , Umask 0EH
-Completed page walks in any TLB of any page size 
-due to demand load misses 
+Completed page walks in any TLB of any page size
+due to demand load misses
 .It Li DTLB_LOAD_MISSES.WALK_DURATION
 .Pq Event 08H , Umask 10H
-Cycle PMH is busy with a walk. 
+Cycle PMH is busy with a walk.
 .It Li DTLB_LOAD_MISSES.STLB_HIT_4K
 .Pq Event 08H , Umask 20H
-Load misses that missed DTLB but hit STLB (4K). 
+Load misses that missed DTLB but hit STLB (4K).
 .It Li DTLB_LOAD_MISSES.STLB_HIT_2M
 .Pq Event 08H , Umask 40H
-Load misses that missed DTLB but hit STLB (2M). 
+Load misses that missed DTLB but hit STLB (2M).
 .It Li DTLB_LOAD_MISSES.STLB_HIT
 .Pq Event 08H , Umask 60H
 Number of cache load STLB hits. No page walk.
 .It Li DTLB_LOAD_MISSES.PDE_CACHE_MISS
 .Pq Event 08H , Umask 80H
-DTLB demand load misses with low part of linear-to- 
-physical address translation missed 
+DTLB demand load misses with low part of linear-to-
+physical address translation missed
 .It Li INT_MISC.RECOVERY_CYCLES
 .Pq Event 0DH , Umask 03H
-Cycles waiting to recover after Machine Clears 
-except JEClear. Set Cmask= 1. 
+Cycles waiting to recover after Machine Clears
+except JEClear. Set Cmask= 1.
 .It Li UOPS_ISSUED.ANY
 .Pq Event 0EH , Umask 01H
-ncrements each cycle the # of Uops issued by the 
-RAT to RS. 
+ncrements each cycle the # of Uops issued by the
+RAT to RS.
 Set Cmask = 1, Inv = 1, Any= 1to count stalled cycles
 of this core.
 .It Li UOPS_ISSUED.FLAGS_MERGE
@@ -278,7 +278,7 @@ rejects.
 .Pq Event 24H , Umask 41H
 Demand Data Read requests that hit L2 cache.
 .It Li L2_RQSTS.ALL_DEMAND_DATA_RD
-.Pq Event 24H , Umask E1H	
+.Pq Event 24H , Umask E1H
 Counts any demand and L1 HW prefetch data load
 requests to L2.
 .It Li L2_RQSTS.RFO_HIT
@@ -348,9 +348,9 @@ Increments at the frequency of XCLK (100 MHz)
 when not halted.
 .It Li L1D_PEND_MISS.PENDING
 .Pq Event 48H , Umask 01H
-Increments the number of outstanding L1D misses 
-every cycle. Set Cmaks = 1 and Edge =1 to count 
-occurrences. 
+Increments the number of outstanding L1D misses
+every cycle. Set Cmaks = 1 and Edge =1 to count
+occurrences.
 .It Li DTLB_STORE_MISSES.MISS_CAUSES_A_WALK
 .Pq Event 49H , Umask 01H
 Miss in all TLB levels causes an page walk of any
@@ -422,15 +422,15 @@ Unhalted core cycles when the thread is not in ring 0.
 Cycles the RS is empty for the thread.
 .It Li OFFCORE_REQUESTS_OUTSTANDING.DEMAND_DATA_RD
 .Pq Event 60H , Umask 01H
-Offcore outstanding Demand Data Read transactions 
+Offcore outstanding Demand Data Read transactions
 in SQ to uncore. Set Cmask=1 to count cycles.
 .It Li OFFCORE_REQUESTS_OUTSTANDING.DEMAND_CORE_RD
 .Pq Event 60H , Umask 02H
-Offcore outstanding Demand code Read transactions 
+Offcore outstanding Demand code Read transactions
 in SQ to uncore. Set Cmask=1 to count cycles.
 .It Li OFFCORE_REQUESTS_OUTSTANDING.DEMAND_RFO
 .Pq Event 60H , Umask 04H
-Offcore outstanding RFO store transactions in SQ to 
+Offcore outstanding RFO store transactions in SQ to
 uncore. Set Cmask=1 to count cycles.
 .It Li OFFCORE_REQUESTS_OUTSTANDING.ALL_DATA_RD
 .Pq Event 60H , Umask 08H
@@ -449,7 +449,7 @@ Cycles in which the L1D is locked.
 Counts cycles the IDQ is empty.
 .It Li IDQ.MITE_UOPS
 .Pq Event 79H , Umask 04H
-Increment each cycle # of uops delivered to IDQ from 
+Increment each cycle # of uops delivered to IDQ from
 MITE path.
 Set Cmask = 1 to count cycles.
 .It Li IDQ.DSB_UOPS
@@ -459,14 +459,14 @@ from DSB path.
 Set Cmask = 1 to count cycles.
 .It Li IDQ.MS_DSB_UOPS
 .Pq Event 79H , Umask 10H
-Increment each cycle # of uops delivered to IDQ 
-when MS_busy by DSB. Set Cmask = 1 to count 
-cycles. Add Edge=1 to count # of delivery. 
+Increment each cycle # of uops delivered to IDQ
+when MS_busy by DSB. Set Cmask = 1 to count
+cycles. Add Edge=1 to count # of delivery.
 .It Li IDQ.MS_MITE_UOPS
 .Pq Event 79H , Umask 20H
-ncrement each cycle # of uops delivered to IDQ 
-when MS_busy by MITE. Set Cmask = 1 to count 
-cycles. 
+ncrement each cycle # of uops delivered to IDQ
+when MS_busy by MITE. Set Cmask = 1 to count
+cycles.
 .It Li IDQ.MS_UOPS
 .Pq Event 79H , Umask 30H
 Increment each cycle # of uops delivered to IDQ from
@@ -474,163 +474,163 @@ MS by either DSB or MITE. Set Cmask = 1 to count
 cycles.
 .It Li IDQ.ALL_DSB_CYCLES_ANY_UOPS
 .Pq Event 79H , Umask 18H
-Counts cycles DSB is delivered at least one uops. Set 
-Cmask = 1. 
+Counts cycles DSB is delivered at least one uops. Set
+Cmask = 1.
 .It Li IDQ.ALL_DSB_CYCLES_4_UOPS
 .Pq Event 79H , Umask 18H
-Counts cycles DSB is delivered four uops. Set Cmask 
+Counts cycles DSB is delivered four uops. Set Cmask
 =4.
 .It Li IDQ.ALL_MITE_CYCLES_ANY_UOPS
 .Pq Event 79H , Umask 24H
-Counts cycles MITE is delivered at least one uops. Set 
-Cmask = 1. 
+Counts cycles MITE is delivered at least one uops. Set
+Cmask = 1.
 .It Li IDQ.ALL_MITE_CYCLES_4_UOPS
 .Pq Event 79H , Umask 24H
-Counts cycles MITE is delivered four uops. Set Cmask 
+Counts cycles MITE is delivered four uops. Set Cmask
 =4.
 .It Li IDQ.MITE_ALL_UOPS
 .Pq Event 79H , Umask 3CH
-# of uops delivered to IDQ from any path. 
+# of uops delivered to IDQ from any path.
 .It Li ICACHE.MISSES
 .Pq Event 80H , Umask 02H
-Number of Instruction Cache, Streaming Buffer and 
-Victim Cache Misses. Includes UC accesses. 
+Number of Instruction Cache, Streaming Buffer and
+Victim Cache Misses. Includes UC accesses.
 .It Li ITLB_MISSES.MISS_CAUSES_A_WALK
 .Pq Event 85H , Umask 01H
-Misses in ITLB that causes a page walk of any page 
-size. 
+Misses in ITLB that causes a page walk of any page
+size.
 .It Li ITLB_MISSES.WALK_COMPLETED_4K
 .Pq Event 85H , Umask 02H
-Completed page walks due to misses in ITLB 4K page 
-entries. 
+Completed page walks due to misses in ITLB 4K page
+entries.
 .It Li TLB_MISSES.WALK_COMPLETED_2M_4M
 .Pq Event 85H , Umask 04H
-Completed page walks due to misses in ITLB 2M/4M 
+Completed page walks due to misses in ITLB 2M/4M
 page entries.
 .It Li ITLB_MISSES.WALK_COMPLETED
 .Pq Event 85H , Umask 0EH
-Completed page walks in ITLB of any page size. 
+Completed page walks in ITLB of any page size.
 .It Li ITLB_MISSES.WALK_DURATION
 .Pq Event 85H , Umask 10H
-Cycle PMH is busy with a walk. 
+Cycle PMH is busy with a walk.
 .It Li ITLB_MISSES.STLB_HIT_4K
 .Pq Event 85H , Umask 20H
-ITLB misses that hit STLB (4K). 
+ITLB misses that hit STLB (4K).
 .It Li ITLB_MISSES.STLB_HIT_2M
 .Pq Event 85H , Umask 40H
-ITLB misses that hit STLB (2K). 
+ITLB misses that hit STLB (2K).
 .It Li ITLB_MISSES.STLB_HIT
 .Pq Event 85H , Umask 60H
-TLB misses that hit STLB. No page walk. 
+TLB misses that hit STLB. No page walk.
 .It Li ILD_STALL.LCP
 .Pq Event 87H , Umask 01H
-Stalls caused by changing prefix length of the 
+Stalls caused by changing prefix length of the
 instruction.
 .It Li ILD_STALL.IQ_FULL
 .Pq Event 87H , Umask 04H
-Stall cycles due to IQ is full. 
+Stall cycles due to IQ is full.
 .It Li BR_INST_EXEC.COND
 .Pq Event 88H , Umask 01H
-Qualify conditional near branch instructions 
-executed, but not necessarily retired. 
+Qualify conditional near branch instructions
+executed, but not necessarily retired.
 .It Li BR_INST_EXEC.DIRECT_JMP
 .Pq Event 88H , Umask 02H
-Qualify all unconditional near branch instructions 
-excluding calls and indirect branches. 
+Qualify all unconditional near branch instructions
+excluding calls and indirect branches.
 .It Li BR_INST_EXEC.INDIRECT_JMP_NON_CALL_RET
 .Pq Event 88H , Umask 04H
-Qualify executed indirect near branch instructions 
-that are not calls nor returns. 
+Qualify executed indirect near branch instructions
+that are not calls nor returns.
 .It Li BR_INST_EXEC.RETURN_NEAR
 .Pq Event 88H , Umask 08H
-Qualify indirect near branches that have a return 
-mnemonic. 
+Qualify indirect near branches that have a return
+mnemonic.
 .It Li BR_INST_EXEC.DIRECT_NEAR_CALL
 .Pq Event 88H , Umask 10H
-Qualify unconditional near call branch instructions, 
-excluding non call branch, executed. 
+Qualify unconditional near call branch instructions,
+excluding non call branch, executed.
 .It Li BR_INST_EXEC.INDIRECT_NEAR_CALL
 .Pq Event 88H , Umask 20H
 Qualify indirect near calls, including both register and
 memory indirect, executed.
 .It Li BR_INST_EXEC.NONTAKEN
 .Pq Event 88H , Umask 40H
-Qualify non-taken near branches executed. 
+Qualify non-taken near branches executed.
 .It Li BR_INST_EXEC.TAKEN
 .Pq Event 88H , Umask 80H
-Qualify taken near branches executed. Must combine 
-with 01H,02H, 04H, 08H, 10H, 20H. 
+Qualify taken near branches executed. Must combine
+with 01H,02H, 04H, 08H, 10H, 20H.
 .It Li BR_INST_EXEC.ALL_BRANCHES
 .Pq Event 88H , Umask FFH
-Counts all near executed branches (not necessarily 
-retired). 
+Counts all near executed branches (not necessarily
+retired).
 .It Li BR_MISP_EXEC.COND
 .Pq Event 89H , Umask 01H
-Qualify conditional near branch instructions 
-mispredicted. 
+Qualify conditional near branch instructions
+mispredicted.
 .It Li BR_MISP_EXEC.INDIRECT_JMP_NON_CALL_RET
 .Pq Event 89H , Umask 04H
-Qualify mispredicted indirect near branch 
-instructions that are not calls nor returns. 
+Qualify mispredicted indirect near branch
+instructions that are not calls nor returns.
 .It Li BR_MISP_EXEC.RETURN_NEAR
 .Pq Event 89H , Umask 08H
-Qualify mispredicted indirect near branches that 
-have a return mnemonic. 
+Qualify mispredicted indirect near branches that
+have a return mnemonic.
 .It Li BR_MISP_EXEC.DIRECT_NEAR_CALL
 .Pq Event 89H , Umask 10H
-Qualify mispredicted unconditional near call branch 
-instructions, excluding non call branch, executed. 
+Qualify mispredicted unconditional near call branch
+instructions, excluding non call branch, executed.
 .It Li BR_MISP_EXEC.INDIRECT_NEAR_CALL
 .Pq Event 89H , Umask 20H
-Qualify mispredicted indirect near calls, including 
-both register and memory indirect, executed. 
+Qualify mispredicted indirect near calls, including
+both register and memory indirect, executed.
 .It Li BR_MISP_EXEC.NONTAKEN
 .Pq Event 89H , Umask 40H
-Qualify mispredicted non-taken near branches 
+Qualify mispredicted non-taken near branches
 executed.
 .It Li BR_MISP_EXEC.TAKEN
 .Pq Event 89H , Umask 80H
-Qualify mispredicted taken near branches executed. 
-Must combine with 01H,02H, 04H, 08H, 10H, 20H. 
+Qualify mispredicted taken near branches executed.
+Must combine with 01H,02H, 04H, 08H, 10H, 20H.
 .It Li BR_MISP_EXEC.ALL_BRANCHES
 .Pq Event 89H , Umask FFH
-Counts all near executed branches (not necessarily 
-retired). 
+Counts all near executed branches (not necessarily
+retired).
 .It Li IDQ_UOPS_NOT_DELIVERED.CORE
 .Pq Event 9CH , Umask 01H
-Count number of non-delivered uops to RAT per 
-thread. 
+Count number of non-delivered uops to RAT per
+thread.
 .It Li UOPS_EXECUTED_PORT.PORT_0
 .Pq Event A1H , Umask 01H
-Cycles which a Uop is dispatched on port 0 in this 
-thread. 
+Cycles which a Uop is dispatched on port 0 in this
+thread.
 .It Li UOPS_EXECUTED_PORT.PORT_1
 .Pq Event A1H , Umask 02H
-Cycles which a Uop is dispatched on port 1 in this 
+Cycles which a Uop is dispatched on port 1 in this
 thread.
 .It Li UOPS_EXECUTED_PORT.PORT_2
 .Pq Event A1H , Umask 04H
-Cycles which a Uop is dispatched on port 2 in this 
+Cycles which a Uop is dispatched on port 2 in this
 thread.
 .It Li UOPS_EXECUTED_PORT.PORT_3
 .Pq Event A1H , Umask 08H
-Cycles which a Uop is dispatched on port 3 in this 
+Cycles which a Uop is dispatched on port 3 in this
 thread.
 .It Li UOPS_EXECUTED_PORT.PORT_4
 .Pq Event A1H , Umask 10H
-Cycles which a Uop is dispatched on port 4 in this 
+Cycles which a Uop is dispatched on port 4 in this
 thread.
 .It Li UOPS_EXECUTED_PORT.PORT_5
 .Pq Event A1H , Umask 20H
-Cycles which a Uop is dispatched on port 5 in this 
+Cycles which a Uop is dispatched on port 5 in this
 thread.
 .It Li UOPS_EXECUTED_PORT.PORT_6
 .Pq Event A1H , Umask 40H
-Cycles which a Uop is dispatched on port 6 in this 
+Cycles which a Uop is dispatched on port 6 in this
 thread.
 .It Li UOPS_EXECUTED_PORT.PORT_7
 .Pq Event A1H , Umask 80H
-Cycles which a Uop is dispatched on port 7 in this 
+Cycles which a Uop is dispatched on port 7 in this
 thread.
 .It Li RESOURCE_STALLS.ANY
 .Pq Event A2H , Umask 01H
@@ -673,7 +673,7 @@ Demand data read requests sent to uncore.
 Demand code read requests sent to uncore.
 .It Li OFFCORE_REQUESTS.DEMAND_RFO
 .Pq Event B0H , Umask 04H
-Demand RFO read requests sent to uncore, including 
+Demand RFO read requests sent to uncore, including
 regular RFOs, locks, ItoM.
 .It Li OFFCORE_REQUESTS.ALL_DATA_RD
 .Pq Event B0H , Umask 08H
@@ -723,66 +723,66 @@ DTLB flush attempts of the thread-specific entries.
 Count number of STLB flush attempts.
 .It Li INST_RETIRED.ANY_P
 .Pq Event C0H , Umask 00H
-Number of instructions at retirement. 
+Number of instructions at retirement.
 .It Li INST_RETIRED.ALL
 .Pq Event C0H , Umask 01H
-Precise instruction retired event with HW to reduce 
-effect of PEBS shadow in IP distribution. 
+Precise instruction retired event with HW to reduce
+effect of PEBS shadow in IP distribution.
 .It Li OTHER_ASSISTS.AVX_TO_SSE
 .Pq Event C1H , Umask 08H
-Number of transitions from AVX-256 to legacy SSE 
-when penalty applicable. 
+Number of transitions from AVX-256 to legacy SSE
+when penalty applicable.
 .It Li OTHER_ASSISTS.SSE_TO_AVX
 .Pq Event C1H , Umask 10H
-Number of transitions from SSE to AVX-256 when 
-penalty applicable. 
+Number of transitions from SSE to AVX-256 when
+penalty applicable.
 .It Li OTHER_ASSISTS.ANY_WB_ASSIST
 .Pq Event C1H , Umask 40H
-Number of microcode assists invoked by HW upon 
-uop writeback. 
+Number of microcode assists invoked by HW upon
+uop writeback.
 .It Li UOPS_RETIRED.ALL
 .Pq Event C2H , Umask 01H
-Counts the number of micro-ops retired, Use 
-cmask=1 and invert to count active cycles or stalled 
-cycles. 
+Counts the number of micro-ops retired, Use
+cmask=1 and invert to count active cycles or stalled
+cycles.
 .It Li UOPS_RETIRED.RETIRE_SLOTS
 .Pq Event C2H , Umask 02H
-Counts the number of retirement slots used each 
+Counts the number of retirement slots used each
 cycle.
 .It Li MACHINE_CLEARS.MEMORY_ORDERING
 .Pq Event C3H , Umask 02H
-Counts the number of machine clears due to memory 
-order conflicts. 
+Counts the number of machine clears due to memory
+order conflicts.
 .It Li MACHINE_CLEARS.SMC
 .Pq Event C3H , Umask 04H
-Number of self-modifying-code machine clears 
+Number of self-modifying-code machine clears
 detected.
 .It Li MACHINE_CLEARS.MASKMOV
 .Pq Event C3H , Umask 20H
-Counts the number of executed AVX masked load 
-operations that refer to an illegal address range with 
-the mask bits set to 0. 
+Counts the number of executed AVX masked load
+operations that refer to an illegal address range with
+the mask bits set to 0.
 .It Li BR_INST_RETIRED.ALL_BRANCHES
 .Pq Event C4H , Umask 00H
-Branch instructions at retirement. 
+Branch instructions at retirement.
 .It Li BR_INST_RETIRED.CONDITIONAL
 .Pq Event C4H , Umask 01H
 Counts the number of conditional branch instructions Supports PEBS
 retired.
 .It Li BR_INST_RETIRED.NEAR_CALL
 .Pq Event C4H , Umask 02H
-Direct and indirect near call instructions retired. 
+Direct and indirect near call instructions retired.
 .It Li BR_INST_RETIRED.ALL_BRANCHES
 .Pq Event C4H , Umask 04H
-Counts the number of branch instructions retired. 
+Counts the number of branch instructions retired.
 .It Li BR_INST_RETIRED.NEAR_RETURN
 .Pq Event C4H , Umask 08H
-Counts the number of near return instructions 
-retired. 
+Counts the number of near return instructions
+retired.
 .It Li BR_INST_RETIRED.NOT_TAKEN
 .Pq Event C4H , Umask 10H
-Counts the number of not taken branch instructions 
-retired. 
+Counts the number of not taken branch instructions
+retired.
  It Li BR_INST_RETIRED.NEAR_TAKEN
 .Pq Event C4H , Umask 20H
 Number of near taken branches retired.
@@ -847,10 +847,10 @@ Qualify any retired memory uops. Must combine with Supports PEBS and
 umask 01H, 02H, to produce counts.
 .It Li MEM_LOAD_UOPS_RETIRED.L1_HIT
 .Pq Event D1H , Umask 01H
-Retired load uops with L1 cache hits as data sources. 
+Retired load uops with L1 cache hits as data sources.
 .It Li MEM_LOAD_UOPS_RETIRED.L2_HIT
 .Pq Event D1H , Umask 02H
-Retired load uops with L2 cache hits as data sources. 
+Retired load uops with L2 cache hits as data sources.
 .It Li MEM_LOAD_UOPS_RETIRED.LLC_HIT
 .Pq Event D1H , Umask 04H
 Retired load uops with LLC cache hits as data
@@ -870,64 +870,64 @@ Retired load uops which data sources were LLC hit
 and cross-core snoop missed in on-pkg core cache.
 .It Li MEM_LOAD_UOPS_LLC_HIT_RETIRED.XSNP_HIT
 .Pq Event D2H , Umask 02H
-Retired load uops which data sources were LLC and 
-cross-core snoop hits in on-pkg core cache. 
+Retired load uops which data sources were LLC and
+cross-core snoop hits in on-pkg core cache.
 .It Li MEM_LOAD_UOPS_LLC_HIT_RETIRED.XSNP_HITM
 .Pq Event D2H , Umask 04H
-Retired load uops which data sources were HitM 
-responses from shared LLC. 
+Retired load uops which data sources were HitM
+responses from shared LLC.
 .It Li MEM_LOAD_UOPS_LLC_HIT_RETIRED.XSNP_NONE
 .Pq Event D2H , Umask 08H
-Retired load uops which data sources were hits in 
-LLC without snoops required. 
+Retired load uops which data sources were hits in
+LLC without snoops required.
 .It Li MEM_LOAD_UOPS_LLC_MISS_RETIRED.LOCAL_DRAM
 .Pq Event D3H , Umask 01H
-Retired load uops which data sources missed LLC but 
+Retired load uops which data sources missed LLC but
 serviced from local dram.
 .It Li BACLEARS.ANY
 .Pq Event E6H , Umask 1FH
-Number of front end re-steers due to BPU 
-misprediction. 
+Number of front end re-steers due to BPU
+misprediction.
 .It Li L2_TRANS.DEMAND_DATA_RD
 .Pq Event F0H , Umask 01H
-Demand Data Read requests that access L2 cache. 
+Demand Data Read requests that access L2 cache.
 .It Li L2_TRANS.RFO
 .Pq Event F0H , Umask 02H
-RFO requests that access L2 cache. 
+RFO requests that access L2 cache.
 .It Li L2_TRANS.CODE_RD
 .Pq Event F0H , Umask 04H
-L2 cache accesses when fetching instructions. 
+L2 cache accesses when fetching instructions.
 .It Li L2_TRANS.ALL_PF
 .Pq Event F0H , Umask 08H
-Any MLC or LLC HW prefetch accessing L2, including 
-rejects. 
+Any MLC or LLC HW prefetch accessing L2, including
+rejects.
 .It Li L2_TRANS.L1D_WB
 .Pq Event F0H , Umask 10H
-L1D writebacks that access L2 cache. 
+L1D writebacks that access L2 cache.
 .It Li L2_TRANS.L2_FILL
 .Pq Event F0H , Umask 20H
-L2 fill requests that access L2 cache. 
+L2 fill requests that access L2 cache.
 .It Li L2_TRANS.L2_WB
 .Pq Event F0H , Umask 40H
-L2 writebacks that access L2 cache. 
+L2 writebacks that access L2 cache.
 .It Li L2_TRANS.ALL_REQUESTS
 .Pq Event F0H , Umask 80H
-Transactions accessing L2 pipe. 
+Transactions accessing L2 pipe.
 .It Li L2_LINES_IN.I
 .Pq Event F1H , Umask 01H
-L2 cache lines in I state filling L2. 
+L2 cache lines in I state filling L2.
 .It Li L2_LINES_IN.S
 .Pq Event F1H , Umask 02H
-L2 cache lines in S state filling L2. 
+L2 cache lines in S state filling L2.
 .It Li L2_LINES_IN.E
 .Pq Event F1H , Umask 04H
-L2 cache lines in E state filling L2. 
+L2 cache lines in E state filling L2.
 .It Li L2_LINES_IN.ALL
 .Pq Event F1H , Umask 07H
-L2 cache lines filling L2. 
+L2 cache lines filling L2.
 .It Li L2_LINES_OUT.DEMAND_CLEAN
 .Pq Event F2H , Umask 05H
-Clean L2 cache lines evicted by demand. 
+Clean L2 cache lines evicted by demand.
 .It Li L2_LINES_OUT.DEMAND_DIRTY
 .Pq Event F2H , Umask 06H
 Dirty L2 cache lines evicted by demand.
diff --git a/lib/libpmc/pmc.haswelluc.3 b/lib/libpmc/pmc.haswelluc.3
index 5adef59..dba9d47 100644
--- a/lib/libpmc/pmc.haswelluc.3
+++ b/lib/libpmc/pmc.haswelluc.3
@@ -1,4 +1,4 @@
-.\" Copyright (c) 2013 Hiren Panchasara <hiren.panchasara@gmail.com> 
+.\" Copyright (c) 2013 Hiren Panchasara <hiren.panchasara@gmail.com>
 .\" All rights reserved.
 .\"
 .\" Redistribution and use in source and binary forms, with or without
@@ -141,7 +141,7 @@ Filter on cross-core snoops initiated by this Cbox due
 to LLC eviction.
 .It Li UNC_CBO_CACHE_LOOKUP.M
 .Pq Event 34H , Umask 01H
-LLC lookup request that access cache and found line in 
+LLC lookup request that access cache and found line in
 M-state.
 .It Li UNC_CBO_CACHE_LOOKUP.ES
 .Pq Event 34H , Umask 06H
@@ -231,7 +231,7 @@ The
 library was written by
 .An "Joseph Koshy"
 .Aq jkoshy@FreeBSD.org .
-The support for the Haswell 
+The support for the Haswell
 microarchitecture was added by
 .An "Hiren Panchasara"
 .Aq hiren.panchasara@gmail.com .