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| author | imp <imp@FreeBSD.org> | 2013-04-26 05:42:35 +0000 |
|---|---|---|
| committer | imp <imp@FreeBSD.org> | 2013-04-26 05:42:35 +0000 |
| commit | d75579076edb2de14a29403af6030bf1c06dde35 (patch) | |
| tree | 349bbcf967bce1fbe593858bacab3bc719aa1366 | |
| parent | 94794a690428e2b7d66be2252dbfdddd519941b5 (diff) | |
| download | FreeBSD-src-d75579076edb2de14a29403af6030bf1c06dde35.zip FreeBSD-src-d75579076edb2de14a29403af6030bf1c06dde35.tar.gz | |
Octeon 2 (6xxx) and newer CPUs don't use the clock CPU speed for its
I/O clock. Thankfully, the simple executive provies a way to querry
the proper clock that works on all models. Move to asking for the SCLK
via this interface.
This gets the serial console working after we start init and open the
console and set the divisor (which turned the output from good to
bad). I can login on the console now.
| -rw-r--r-- | sys/mips/cavium/uart_dev_oct16550.c | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/sys/mips/cavium/uart_dev_oct16550.c b/sys/mips/cavium/uart_dev_oct16550.c index 06d0001..753559f 100644 --- a/sys/mips/cavium/uart_dev_oct16550.c +++ b/sys/mips/cavium/uart_dev_oct16550.c @@ -656,7 +656,7 @@ oct16550_bus_probe (struct uart_softc *sc) int error; bas = &sc->sc_bas; - bas->rclk = uart_oct16550_class.uc_rclk = cvmx_sysinfo_get()->cpu_clock_hz; + bas->rclk = uart_oct16550_class.uc_rclk = cvmx_clock_get_rate(CVMX_CLOCK_SCLK); error = oct16550_probe(bas); if (error) { |
