MFC r271055, r271084, r271094:

  Add a function to get the frequency of the AHB bus.  Another stopgap
  function until we have full clock support for imx6.

  The imx5x and imx6 chips have an onboard IOMUX device which also contains a
  few "general purpose registers" whose values control chip behavior in ways
  that have nothing to do with IO pin mux control.  Define a simple API that
  other soc-specific code can use to read and write the registers, and provide
  the imx51 implementation of them.

  Fix a typo.

5 files changed, 92 insertions, 0 deletions

diff --git a/sys/arm/freescale/imx/imx51_ccm.c b/sys/arm/freescale/imx/imx51_ccm.c
index e004364..8e099ce5 100644
--- a/sys/arm/freescale/imx/imx51_ccm.c
+++ b/sys/arm/freescale/imx/imx51_ccm.c
@@ -580,3 +580,10 @@ imx_ccm_uart_hz(void)
 
 	return (imx51_get_clock(IMX51CLK_UART_CLK_ROOT));
 }
+
+uint32_t
+imx_ccm_ahb_hz(void)
+{
+
+	return (imx51_get_clock(IMX51CLK_AHB_CLK_ROOT));
+}
diff --git a/sys/arm/freescale/imx/imx51_iomux.c b/sys/arm/freescale/imx/imx51_iomux.c
index 18738a1..0dc0648 100644
--- a/sys/arm/freescale/imx/imx51_iomux.c
+++ b/sys/arm/freescale/imx/imx51_iomux.c
@@ -74,6 +74,7 @@ __FBSDID("$FreeBSD$");
 #include <dev/ofw/ofw_bus.h>
 #include <dev/ofw/ofw_bus_subr.h>
 
+#include <arm/freescale/imx/imx_iomuxvar.h>
 #include <arm/freescale/imx/imx51_iomuxvar.h>
 #include <arm/freescale/imx/imx51_iomuxreg.h>
 
@@ -216,6 +217,41 @@ iomux_input_config(const struct iomux_input_conf *conflist)
 }
 #endif
 
+uint32_t
+imx_iomux_gpr_get(u_int regnum)
+{
+
+	KASSERT(iomuxsc != NULL, ("imx_iomux_gpr_get() called before attach"));
+	KASSERT(regnum >= 0 && regnum <= 1, 
+	    ("imx_iomux_gpr_get bad regnum %u", regnum));
+	return (IOMUX_READ(iomuxsc, IOMUXC_GPR0 + regnum));
+}
+
+void
+imx_iomux_gpr_set(u_int regnum, uint32_t val)
+{
+
+	KASSERT(iomuxsc != NULL, ("imx_iomux_gpr_set() called before attach"));
+	KASSERT(regnum >= 0 && regnum <= 1, 
+	    ("imx_iomux_gpr_set bad regnum %u", regnum));
+	IOMUX_WRITE(iomuxsc, IOMUXC_GPR0 + regnum, val);
+}
+
+void
+imx_iomux_gpr_set_masked(u_int regnum, uint32_t clrbits, uint32_t setbits)
+{
+	uint32_t val;
+
+	KASSERT(iomuxsc != NULL, 
+	    ("imx_iomux_gpr_set_masked called before attach"));
+	KASSERT(regnum >= 0 && regnum <= 1, 
+	    ("imx_iomux_gpr_set_masked bad regnum %u", regnum));
+
+	val = IOMUX_READ(iomuxsc, IOMUXC_GPR0 + regnum);
+	val = (val & ~clrbits) | setbits;
+	IOMUX_WRITE(iomuxsc, IOMUXC_GPR0 + regnum, val);
+}
+
 static device_method_t imx_iomux_methods[] = {
 	DEVMETHOD(device_probe,		iomux_probe),
 	DEVMETHOD(device_attach,	iomux_attach),
diff --git a/sys/arm/freescale/imx/imx6_ccm.c b/sys/arm/freescale/imx/imx6_ccm.c
index 132c31c..d722291 100644
--- a/sys/arm/freescale/imx/imx6_ccm.c
+++ b/sys/arm/freescale/imx/imx6_ccm.c
@@ -238,6 +238,12 @@ imx_ccm_uart_hz(void)
 	return (80000000);
 }
 
+uint32_t
+imx_ccm_ahb_hz(void)
+{
+	return (132000000);
+}
+
 static device_method_t ccm_methods[] = {
 	/* Device interface */
 	DEVMETHOD(device_probe,  ccm_probe),
diff --git a/sys/arm/freescale/imx/imx_ccmvar.h b/sys/arm/freescale/imx/imx_ccmvar.h
index bb41a02..354e616 100644
--- a/sys/arm/freescale/imx/imx_ccmvar.h
+++ b/sys/arm/freescale/imx/imx_ccmvar.h
@@ -47,6 +47,7 @@ uint32_t imx_ccm_ipg_hz(void);
 uint32_t imx_ccm_perclk_hz(void);
 uint32_t imx_ccm_sdhci_hz(void);
 uint32_t imx_ccm_uart_hz(void);
+uint32_t imx_ccm_ahb_hz(void);
 
 void imx_ccm_usb_enable(device_t _usbdev);
 void imx_ccm_usbphy_enable(device_t _phydev);
diff --git a/sys/arm/freescale/imx/imx_iomuxvar.h b/sys/arm/freescale/imx/imx_iomuxvar.h
new file mode 100644
index 0000000..726328d
--- /dev/null
+++ b/sys/arm/freescale/imx/imx_iomuxvar.h
@@ -0,0 +1,42 @@
+/*-
+ * Copyright (c) 2014 Ian Lepore <ian@freebsd.org>
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * 1. Redistributions of source code must retain the above copyright
+ *    notice, this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright
+ *    notice, this list of conditions and the following disclaimer in the
+ *    documentation and/or other materials provided with the distribution.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
+ * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
+ * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
+ * ARE DISCLAIMED.  IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
+ * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
+ * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
+ * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+ * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
+ * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
+ * SUCH DAMAGE.
+ *
+ * $FreeBSD$
+ */
+
+#ifndef	IMX_IOMUXVAR_H
+#define	IMX_IOMUXVAR_H
+
+/*
+ * The IOMUX Controller device has a small set of "general purpose registers" 
+ * which control various aspects of SoC operation that really have nothing to do
+ * with IO pin assignments or pad control.  These functions let other soc level
+ * code manipulate these values.
+ */
+uint32_t imx_iomux_gpr_get(u_int regnum);
+void     imx_iomux_gpr_set(u_int regnum, uint32_t val);
+void     imx_iomux_gpr_set_masked(u_int regnum, uint32_t clrbits, uint32_t setbits);
+
+#endif