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author | scottl <scottl@FreeBSD.org> | 2004-12-10 15:44:12 +0000 |
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committer | scottl <scottl@FreeBSD.org> | 2004-12-10 15:44:12 +0000 |
commit | a014627e190b493ccb18ca8a869a947599b4ffe3 (patch) | |
tree | 5274a043344acce6a54e383e0d8c5c4c5ae56d19 | |
parent | e10b3efba51c1b899614c309b0a46b71c2197531 (diff) | |
download | FreeBSD-src-a014627e190b493ccb18ca8a869a947599b4ffe3.zip FreeBSD-src-a014627e190b493ccb18ca8a869a947599b4ffe3.tar.gz |
Expand the scope of the critical section in the PCIe read and write methods
on the advice of Alan Cox.
-rw-r--r-- | sys/i386/pci/pci_cfgreg.c | 18 |
1 files changed, 14 insertions, 4 deletions
diff --git a/sys/i386/pci/pci_cfgreg.c b/sys/i386/pci/pci_cfgreg.c index 4b766d1..803e6d6 100644 --- a/sys/i386/pci/pci_cfgreg.c +++ b/sys/i386/pci/pci_cfgreg.c @@ -503,7 +503,6 @@ pciereg_findelem(vm_paddr_t papage) struct pcie_cfg_list *pcielist; struct pcie_cfg_elem *elem; - critical_enter(); pcielist = &pcie_list[PCPU_GET(cpuid)]; TAILQ_FOREACH(elem, pcielist, elem) { if (elem->papage == papage) @@ -534,7 +533,9 @@ pciereg_cfgread(int bus, int slot, int func, int reg, int bytes) struct pcie_cfg_elem *elem; volatile vm_offset_t va; vm_paddr_t pa, papage; + int data; + critical_enter(); pa = PCIE_PADDR(pciebar, reg, bus, slot, func); papage = pa & ~PAGE_MASK; elem = pciereg_findelem(papage); @@ -542,14 +543,20 @@ pciereg_cfgread(int bus, int slot, int func, int reg, int bytes) switch (bytes) { case 4: - return (*(volatile uint32_t *)(va)); + data = *(volatile uint32_t *)(va); + break; case 2: - return (*(volatile uint16_t *)(va)); + data = *(volatile uint16_t *)(va); + break; case 1: - return (*(volatile uint8_t *)(va)); + data = *(volatile uint8_t *)(va); + break; default: panic("pciereg_cfgread: invalid width"); } + + critical_exit(); + return (data); } static void @@ -559,6 +566,7 @@ pciereg_cfgwrite(int bus, int slot, int func, int reg, int data, int bytes) volatile vm_offset_t va; vm_paddr_t pa, papage; + critical_enter(); pa = PCIE_PADDR(pciebar, reg, bus, slot, func); papage = pa & ~PAGE_MASK; elem = pciereg_findelem(papage); @@ -577,4 +585,6 @@ pciereg_cfgwrite(int bus, int slot, int func, int reg, int data, int bytes) default: panic("pciereg_cfgwrite: invalid width"); } + + critical_exit(); } |