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| author | marius <marius@FreeBSD.org> | 2009-04-14 19:02:34 +0000 |
|---|---|---|
| committer | marius <marius@FreeBSD.org> | 2009-04-14 19:02:34 +0000 |
| commit | 93da89bedb752c34d5e810df3c6aa25dfa2dc40a (patch) | |
| tree | b2753d597ed9b9a8e2517e1f3da7898e43cb8d65 | |
| parent | e76ae1ccf32df1f82d31d752b4351d8e1558fc8c (diff) | |
| download | FreeBSD-src-93da89bedb752c34d5e810df3c6aa25dfa2dc40a.zip FreeBSD-src-93da89bedb752c34d5e810df3c6aa25dfa2dc40a.tar.gz | |
Fix masking of TTE bits; the TD_*_MASK macros need shifting via the
corresponding TD_*_SHIFT.
MFC after: 3 days
| -rw-r--r-- | sys/boot/sparc64/loader/main.c | 12 |
1 files changed, 7 insertions, 5 deletions
diff --git a/sys/boot/sparc64/loader/main.c b/sys/boot/sparc64/loader/main.c index 0f628f2..3a899a8 100644 --- a/sys/boot/sparc64/loader/main.c +++ b/sys/boot/sparc64/loader/main.c @@ -434,9 +434,10 @@ dtlb_va_to_pa_sun4u(vm_offset_t va) continue; reg = dtlb_get_data_sun4u(i); wrpr(pstate, pstate, 0); + reg >>= TD_PA_SHIFT; if (cpu_impl >= CPU_IMPL_ULTRASPARCIII) - return ((reg & TD_PA_CH_MASK) >> TD_PA_SHIFT); - return ((reg & TD_PA_SF_MASK) >> TD_PA_SHIFT); + return (reg & TD_PA_CH_MASK); + return (reg & TD_PA_SF_MASK); } wrpr(pstate, pstate, 0); return (-1); @@ -456,9 +457,10 @@ itlb_va_to_pa_sun4u(vm_offset_t va) continue; reg = itlb_get_data_sun4u(i); wrpr(pstate, pstate, 0); + reg >>= TD_PA_SHIFT; if (cpu_impl >= CPU_IMPL_ULTRASPARCIII) - return ((reg & TD_PA_CH_MASK) >> TD_PA_SHIFT); - return ((reg & TD_PA_SF_MASK) >> TD_PA_SHIFT); + return (reg & TD_PA_CH_MASK); + return (reg & TD_PA_SF_MASK); } wrpr(pstate, pstate, 0); return (-1); @@ -846,7 +848,7 @@ pmap_print_tte_sun4u(tte_t tag, tte_t tte) { printf("%s %s ", - page_sizes[(tte & TD_SIZE_MASK) >> TD_SIZE_SHIFT], + page_sizes[(tte >> TD_SIZE_SHIFT) & TD_SIZE_MASK], tag & TD_G ? "G" : " "); printf(tte & TD_W ? "W " : " "); printf(tte & TD_P ? "\e[33mP\e[0m " : " "); |
