Cleanup some leftover lint from the old interrupt system.

Also, while here, run up to 32 interrupt sources on APIC systems.
Normalize INTREN/INTRDIS so they are the same on both UP and SMP systems
rather than sometimes a macro, and sometimes a function.

Reviewed by:  jhb, jakeb

30 files changed, 176 insertions, 728 deletions

diff --git a/sys/amd64/amd64/apic_vector.S b/sys/amd64/amd64/apic_vector.S
index adf4c36..995cf21 100644
--- a/sys/amd64/amd64/apic_vector.S
+++ b/sys/amd64/amd64/apic_vector.S
@@ -117,13 +117,13 @@ IDTVEC(vec_name) ;							\
 	testl	$IRQ_BIT(irq_num), _apic_imen ;				\
 	je	7f ;			/* bit clear, not masked */	\
 	andl	$~IRQ_BIT(irq_num), _apic_imen ;/* clear mask bit */	\
-	movl	IOAPICADDR(irq_num),%ecx ;	/* ioapic addr */	\
+	movl	IOAPICADDR(irq_num), %ecx ;	/* ioapic addr */	\
 	movl	REDIRIDX(irq_num), %eax ;	/* get the index */	\
-	movl	%eax,(%ecx) ;			/* write the index */	\
-	movl	IOAPIC_WINDOW(%ecx),%eax ;	/* current value */	\
-	andl	$~IOART_INTMASK,%eax ;		/* clear the mask */	\
-	movl	%eax,IOAPIC_WINDOW(%ecx) ;	/* new value */		\
-7: ;									\
+	movl	%eax, (%ecx) ;			/* write the index */	\
+	movl	IOAPIC_WINDOW(%ecx), %eax ;	/* current value */	\
+	andl	$~IOART_INTMASK, %eax ;		/* clear the mask */	\
+	movl	%eax, IOAPIC_WINDOW(%ecx) ;	/* new value */		\
+7: ;						/* already unmasked */	\
 	IMASK_UNLOCK
 
 #ifdef APIC_INTR_DIAGNOSTIC
@@ -379,7 +379,7 @@ _Xcpuast:
 	lock	
 	btrl	%eax, CNAME(resched_cpus)
 	jnc	2f
-	orl	$AST_PENDING+AST_RESCHED,_astpending
+	orl	$AST_PENDING+AST_RESCHED, _astpending
 	lock
 	incl	CNAME(want_resched_cnt)
 2:		
@@ -565,6 +565,14 @@ MCOUNT_LABEL(bintr)
 	FAST_INTR(21,fastintr21)
 	FAST_INTR(22,fastintr22)
 	FAST_INTR(23,fastintr23)
+	FAST_INTR(24,fastintr24)
+	FAST_INTR(25,fastintr25)
+	FAST_INTR(26,fastintr26)
+	FAST_INTR(27,fastintr27)
+	FAST_INTR(28,fastintr28)
+	FAST_INTR(29,fastintr29)
+	FAST_INTR(30,fastintr30)
+	FAST_INTR(31,fastintr31)
 #define	CLKINTR_PENDING	movl $1,CNAME(clkintr_pending)
 /* Threaded interrupts */
 	INTR(0,intr0, CLKINTR_PENDING)
@@ -591,6 +599,14 @@ MCOUNT_LABEL(bintr)
 	INTR(21,intr21,)
 	INTR(22,intr22,)
 	INTR(23,intr23,)
+	INTR(24,intr24,)
+	INTR(25,intr25,)
+	INTR(26,intr26,)
+	INTR(27,intr27,)
+	INTR(28,intr28,)
+	INTR(29,intr29,)
+	INTR(30,intr30,)
+	INTR(31,intr31,)
 MCOUNT_LABEL(eintr)
 
 /*
@@ -667,8 +683,6 @@ CNAME(cpuast_cnt):
 	.long 0
 CNAME(cpustop_restartfunc):
 	.long 0
-		
-
 
 	.globl	_apic_pin_trigger
 _apic_pin_trigger:
diff --git a/sys/amd64/amd64/mp_machdep.c b/sys/amd64/amd64/mp_machdep.c
index 0c1fc03..d37b6d6 100644
--- a/sys/amd64/amd64/mp_machdep.c
+++ b/sys/amd64/amd64/mp_machdep.c
@@ -1262,7 +1262,7 @@ setup_apic_irq_mapping(void)
 		}
 	}
 
-	/* Assign interrupts on first 24 intpins on IOAPIC #0 */
+	/* Assign first set of interrupts to intpins on IOAPIC #0 */
 	for (x = 0; x < nintrs; x++) {
 		int_vector = io_apic_ints[x].dst_apic_int;
 		if (int_vector < APIC_INTMAPSIZE &&
diff --git a/sys/amd64/amd64/mptable.c b/sys/amd64/amd64/mptable.c
index 0c1fc03..d37b6d6 100644
--- a/sys/amd64/amd64/mptable.c
+++ b/sys/amd64/amd64/mptable.c
@@ -1262,7 +1262,7 @@ setup_apic_irq_mapping(void)
 		}
 	}
 
-	/* Assign interrupts on first 24 intpins on IOAPIC #0 */
+	/* Assign first set of interrupts to intpins on IOAPIC #0 */
 	for (x = 0; x < nintrs; x++) {
 		int_vector = io_apic_ints[x].dst_apic_int;
 		if (int_vector < APIC_INTMAPSIZE &&
diff --git a/sys/amd64/include/mptable.h b/sys/amd64/include/mptable.h
index 0c1fc03..d37b6d6 100644
--- a/sys/amd64/include/mptable.h
+++ b/sys/amd64/include/mptable.h
@@ -1262,7 +1262,7 @@ setup_apic_irq_mapping(void)
 		}
 	}
 
-	/* Assign interrupts on first 24 intpins on IOAPIC #0 */
+	/* Assign first set of interrupts to intpins on IOAPIC #0 */
 	for (x = 0; x < nintrs; x++) {
 		int_vector = io_apic_ints[x].dst_apic_int;
 		if (int_vector < APIC_INTMAPSIZE &&
diff --git a/sys/amd64/include/smp.h b/sys/amd64/include/smp.h
index 1680518..673a368 100644
--- a/sys/amd64/include/smp.h
+++ b/sys/amd64/include/smp.h
@@ -78,7 +78,7 @@ extern u_int32_t		*io_apic_versions;
 extern int			cpu_num_to_apic_id[];
 extern int			io_num_to_apic_id[];
 extern int			apic_id_to_logical[];
-#define APIC_INTMAPSIZE 24
+#define APIC_INTMAPSIZE 32
 struct apic_intmapinfo {
   	int ioapic;
 	int int_pin;
@@ -144,11 +144,6 @@ void	io_apic_set_id		__P((int, int));
 int	io_apic_get_id		__P((int));
 int	ext_int_setup		__P((int, int));
 
-#if defined(READY)
-void	clr_io_apic_mask24	__P((int, u_int32_t));
-void	set_io_apic_mask24	__P((int, u_int32_t));
-#endif /* READY */
-
 void	set_apic_timer		__P((int));
 int	read_apic_timer		__P((void));
 void	u_sleep			__P((int));
diff --git a/sys/amd64/isa/atpic_vector.S b/sys/amd64/isa/atpic_vector.S
index 51b9493..f810401 100644
--- a/sys/amd64/isa/atpic_vector.S
+++ b/sys/amd64/isa/atpic_vector.S
@@ -71,37 +71,6 @@ IDTVEC(vec_name) ; \
 	MEXITCOUNT ; \
 	jmp	_doreti
 
-#if 0
-; \
-	ALIGN_TEXT ; \
-2: ; \
-	cmpb	$3,_intr_nesting_level ;	/* is there enough stack? */ \
-	jae	1b ;		/* no, return */ \
-	movl	_cpl,%eax ; \
-	/* XXX next line is probably unnecessary now. */ \
-	movl	$HWI_MASK|SWI_MASK,_cpl ;	/* limit nesting ... */ \
-	incb	_intr_nesting_level ;	/* ... really limit it ... */ \
-	sti ;			/* ... to do this as early as possible */ \
-	MAYBE_POPL_ES ;		/* discard most of thin frame ... */ \
-	popl	%fs ; \
-	popl	%ecx ;		/* ... original %ds ... */ \
-	popl	%edx ; \
-	xchgl	%eax,4(%esp) ;	/* orig %eax; save cpl */ \
-	pushal ;		/* build fat frame (grrr) ... */ \
-	pushl	%ecx ;		/* ... actually %ds ... */ \
-	pushl	%es ; \
-	pushl	%fs ; \
-	mov	$KDSEL,%ax ; \
-	mov	%ax,%es ; \
-	mov	%ax,%fs ; \
-	movl	(3+8+0)*4(%esp),%ecx ;	/* ... %ecx from thin frame ... */ \
-	movl	%ecx,(3+6)*4(%esp) ;	/* ... to fat frame ... */ \
-	movl	(3+8+1)*4(%esp),%eax ;	/* ... cpl from thin frame */ \
-	subl	$4,%esp ;	/* junk for unit number */ \
-	MEXITCOUNT ; \
-	jmp	_doreti
-#endif
-
 /* 
  * Slow, threaded interrupts.
  *
diff --git a/sys/amd64/isa/icu.h b/sys/amd64/isa/icu.h
index ed3a879..b5f2de4 100644
--- a/sys/amd64/isa/icu.h
+++ b/sys/amd64/isa/icu.h
@@ -47,8 +47,6 @@
 
 #ifndef	LOCORE
 
-#ifdef APIC_IO
-
 /*
 #define MP_SAFE
  * Note:
@@ -61,41 +59,14 @@
 void	INTREN			__P((u_int));
 void	INTRDIS			__P((u_int));
 
-#else /* APIC_IO */
-
-/*
- * Interrupt "level" mechanism variables, masks, and macros
- */
-extern	unsigned imen;		/* interrupt mask enable */
-
-#define	INTREN(s)		(imen &= ~(s), SET_ICUS())
-#define	INTRDIS(s)		(imen |= (s), SET_ICUS())
-
-#if 0
-#ifdef PC98
-#define	SET_ICUS()	(outb(IO_ICU1 + 2, imen), outb(IU_ICU2 + 2, imen >> 8))
-#define INTRGET()	((inb(IO_ICU2) << 8 | inb(IO_ICU1)) & 0xffff)
-#else	/* IBM-PC */
-#define	SET_ICUS()	(outb(IO_ICU1 + 1, imen), outb(IU_ICU2 + 1, imen >> 8))
-#define INTRGET()	((inb(IO_ICU2) << 8 | inb(IO_ICU1)) & 0xffff)
-#endif	/* PC98 */
-#else
-/*
- * XXX - IO_ICU* are defined in isa.h, not icu.h, and nothing much bothers to
- * include isa.h, while too many things include icu.h.
- */
-#ifdef PC98
-#define	SET_ICUS()	(outb(0x02, imen), outb(0x0a, imen >> 8))
-/* XXX is this correct? */
-#define INTRGET()	((inb(0x0a) << 8 | inb(0x02)) & 0xffff)
+#ifdef APIC_IO
+extern	unsigned apic_imen;	/* APIC interrupt mask enable */
+#define APIC_IMEN_BITS	32	/* number of bits in apic_imen */
 #else
-#define	SET_ICUS()	(outb(0x21, imen), outb(0xa1, imen >> 8))
-#define INTRGET()	((inb(0xa1) << 8 | inb(0x21)) & 0xffff)
-#endif
+extern	unsigned imen;		/* interrupt mask enable */
+#define IMEN_BITS	16	/* number of bits in imen */
 #endif
 
-#endif /* APIC_IO */
-
 #endif /* LOCORE */
 
 
diff --git a/sys/amd64/isa/icu_ipl.S b/sys/amd64/isa/icu_ipl.S
index d178d5c..3af9f66 100644
--- a/sys/amd64/isa/icu_ipl.S
+++ b/sys/amd64/isa/icu_ipl.S
@@ -39,73 +39,35 @@
 
 	.data
 	ALIGN_DATA
-vec:
-	.long	 vec0,  vec1,  vec2,  vec3,  vec4,  vec5,  vec6,  vec7
-	.long	 vec8,  vec9, vec10, vec11, vec12, vec13, vec14, vec15
 
 /* interrupt mask enable (all h/w off) */
 	.globl	_imen
 _imen:	.long	HWI_MASK
 
-
-/*
- * 
- */
 	.text
 	SUPERALIGN_TEXT
 
-/*
- * Fake clock interrupt(s) so that they appear to come from our caller instead
- * of from here, so that system profiling works.
- * XXX do this more generally (for all vectors; look up the C entry point).
- * XXX frame bogusness stops us from just jumping to the C entry point.
- */
-	ALIGN_TEXT
-vec0:
-	popl	%eax			/* return address */
-	pushfl
-	pushl	$KCSEL
-	pushl	%eax
-	cli
-	MEXITCOUNT
-	jmp	_Xintr0			/* XXX might need _Xfastintr0 */
-
-#ifndef PC98
-	ALIGN_TEXT
-vec8:
-	popl	%eax	
-	pushfl
-	pushl	$KCSEL
-	pushl	%eax
-	cli
-	MEXITCOUNT
-	jmp	_Xintr8			/* XXX might need _Xfastintr8 */
-#endif /* PC98 */
-
-/*
- * The 'generic' vector stubs.
- */
+#ifdef PC98
+#define MASK_OFFSET 2
+#else
+#define MASK_OFFSET 1
+#endif
 
-#define BUILD_VEC(irq_num)			\
-	ALIGN_TEXT ;				\
-__CONCAT(vec,irq_num): ;			\
-	int	$ICU_OFFSET + (irq_num) ;	\
+ENTRY(INTREN)
+	movl	4(%esp), %eax
+	notl	%eax
+	andl	%eax, imen
+	movl	imen, %eax
+	outb	%al, $(IO_ICU1 + MASK_OFFSET)
+	shrl	$8, %eax
+	outb	%al, $(IO_ICU2 + MASK_OFFSET)
 	ret
 
-	BUILD_VEC(1)
-	BUILD_VEC(2)
-	BUILD_VEC(3)
-	BUILD_VEC(4)
-	BUILD_VEC(5)
-	BUILD_VEC(6)
-	BUILD_VEC(7)
-#ifdef PC98
-	BUILD_VEC(8)
-#endif
-	BUILD_VEC(9)
-	BUILD_VEC(10)
-	BUILD_VEC(11)
-	BUILD_VEC(12)
-	BUILD_VEC(13)
-	BUILD_VEC(14)
-	BUILD_VEC(15)
+ENTRY(INTRDIS)
+	movl	4(%esp), %eax
+	orl	%eax, imen
+	movl	imen, %eax
+	outb	%al, $(IO_ICU1 + MASK_OFFSET)
+	shrl	$8, %eax
+	outb	%al, $(IO_ICU2 + MASK_OFFSET)
+	ret
diff --git a/sys/amd64/isa/icu_ipl.s b/sys/amd64/isa/icu_ipl.s
index d178d5c..3af9f66 100644
--- a/sys/amd64/isa/icu_ipl.s
+++ b/sys/amd64/isa/icu_ipl.s
@@ -39,73 +39,35 @@
 
 	.data
 	ALIGN_DATA
-vec:
-	.long	 vec0,  vec1,  vec2,  vec3,  vec4,  vec5,  vec6,  vec7
-	.long	 vec8,  vec9, vec10, vec11, vec12, vec13, vec14, vec15
 
 /* interrupt mask enable (all h/w off) */
 	.globl	_imen
 _imen:	.long	HWI_MASK
 
-
-/*
- * 
- */
 	.text
 	SUPERALIGN_TEXT
 
-/*
- * Fake clock interrupt(s) so that they appear to come from our caller instead
- * of from here, so that system profiling works.
- * XXX do this more generally (for all vectors; look up the C entry point).
- * XXX frame bogusness stops us from just jumping to the C entry point.
- */
-	ALIGN_TEXT
-vec0:
-	popl	%eax			/* return address */
-	pushfl
-	pushl	$KCSEL
-	pushl	%eax
-	cli
-	MEXITCOUNT
-	jmp	_Xintr0			/* XXX might need _Xfastintr0 */
-
-#ifndef PC98
-	ALIGN_TEXT
-vec8:
-	popl	%eax	
-	pushfl
-	pushl	$KCSEL
-	pushl	%eax
-	cli
-	MEXITCOUNT
-	jmp	_Xintr8			/* XXX might need _Xfastintr8 */
-#endif /* PC98 */
-
-/*
- * The 'generic' vector stubs.
- */
+#ifdef PC98
+#define MASK_OFFSET 2
+#else
+#define MASK_OFFSET 1
+#endif
 
-#define BUILD_VEC(irq_num)			\
-	ALIGN_TEXT ;				\
-__CONCAT(vec,irq_num): ;			\
-	int	$ICU_OFFSET + (irq_num) ;	\
+ENTRY(INTREN)
+	movl	4(%esp), %eax
+	notl	%eax
+	andl	%eax, imen
+	movl	imen, %eax
+	outb	%al, $(IO_ICU1 + MASK_OFFSET)
+	shrl	$8, %eax
+	outb	%al, $(IO_ICU2 + MASK_OFFSET)
 	ret
 
-	BUILD_VEC(1)
-	BUILD_VEC(2)
-	BUILD_VEC(3)
-	BUILD_VEC(4)
-	BUILD_VEC(5)
-	BUILD_VEC(6)
-	BUILD_VEC(7)
-#ifdef PC98
-	BUILD_VEC(8)
-#endif
-	BUILD_VEC(9)
-	BUILD_VEC(10)
-	BUILD_VEC(11)
-	BUILD_VEC(12)
-	BUILD_VEC(13)
-	BUILD_VEC(14)
-	BUILD_VEC(15)
+ENTRY(INTRDIS)
+	movl	4(%esp), %eax
+	orl	%eax, imen
+	movl	imen, %eax
+	outb	%al, $(IO_ICU1 + MASK_OFFSET)
+	shrl	$8, %eax
+	outb	%al, $(IO_ICU2 + MASK_OFFSET)
+	ret
diff --git a/sys/amd64/isa/icu_vector.S b/sys/amd64/isa/icu_vector.S
index 51b9493..f810401 100644
--- a/sys/amd64/isa/icu_vector.S
+++ b/sys/amd64/isa/icu_vector.S
@@ -71,37 +71,6 @@ IDTVEC(vec_name) ; \
 	MEXITCOUNT ; \
 	jmp	_doreti
 
-#if 0
-; \
-	ALIGN_TEXT ; \
-2: ; \
-	cmpb	$3,_intr_nesting_level ;	/* is there enough stack? */ \
-	jae	1b ;		/* no, return */ \
-	movl	_cpl,%eax ; \
-	/* XXX next line is probably unnecessary now. */ \
-	movl	$HWI_MASK|SWI_MASK,_cpl ;	/* limit nesting ... */ \
-	incb	_intr_nesting_level ;	/* ... really limit it ... */ \
-	sti ;			/* ... to do this as early as possible */ \
-	MAYBE_POPL_ES ;		/* discard most of thin frame ... */ \
-	popl	%fs ; \
-	popl	%ecx ;		/* ... original %ds ... */ \
-	popl	%edx ; \
-	xchgl	%eax,4(%esp) ;	/* orig %eax; save cpl */ \
-	pushal ;		/* build fat frame (grrr) ... */ \
-	pushl	%ecx ;		/* ... actually %ds ... */ \
-	pushl	%es ; \
-	pushl	%fs ; \
-	mov	$KDSEL,%ax ; \
-	mov	%ax,%es ; \
-	mov	%ax,%fs ; \
-	movl	(3+8+0)*4(%esp),%ecx ;	/* ... %ecx from thin frame ... */ \
-	movl	%ecx,(3+6)*4(%esp) ;	/* ... to fat frame ... */ \
-	movl	(3+8+1)*4(%esp),%eax ;	/* ... cpl from thin frame */ \
-	subl	$4,%esp ;	/* junk for unit number */ \
-	MEXITCOUNT ; \
-	jmp	_doreti
-#endif
-
 /* 
  * Slow, threaded interrupts.
  *
diff --git a/sys/amd64/isa/icu_vector.s b/sys/amd64/isa/icu_vector.s
index 51b9493..f810401 100644
--- a/sys/amd64/isa/icu_vector.s
+++ b/sys/amd64/isa/icu_vector.s
@@ -71,37 +71,6 @@ IDTVEC(vec_name) ; \
 	MEXITCOUNT ; \
 	jmp	_doreti
 
-#if 0
-; \
-	ALIGN_TEXT ; \
-2: ; \
-	cmpb	$3,_intr_nesting_level ;	/* is there enough stack? */ \
-	jae	1b ;		/* no, return */ \
-	movl	_cpl,%eax ; \
-	/* XXX next line is probably unnecessary now. */ \
-	movl	$HWI_MASK|SWI_MASK,_cpl ;	/* limit nesting ... */ \
-	incb	_intr_nesting_level ;	/* ... really limit it ... */ \
-	sti ;			/* ... to do this as early as possible */ \
-	MAYBE_POPL_ES ;		/* discard most of thin frame ... */ \
-	popl	%fs ; \
-	popl	%ecx ;		/* ... original %ds ... */ \
-	popl	%edx ; \
-	xchgl	%eax,4(%esp) ;	/* orig %eax; save cpl */ \
-	pushal ;		/* build fat frame (grrr) ... */ \
-	pushl	%ecx ;		/* ... actually %ds ... */ \
-	pushl	%es ; \
-	pushl	%fs ; \
-	mov	$KDSEL,%ax ; \
-	mov	%ax,%es ; \
-	mov	%ax,%fs ; \
-	movl	(3+8+0)*4(%esp),%ecx ;	/* ... %ecx from thin frame ... */ \
-	movl	%ecx,(3+6)*4(%esp) ;	/* ... to fat frame ... */ \
-	movl	(3+8+1)*4(%esp),%eax ;	/* ... cpl from thin frame */ \
-	subl	$4,%esp ;	/* junk for unit number */ \
-	MEXITCOUNT ; \
-	jmp	_doreti
-#endif
-
 /* 
  * Slow, threaded interrupts.
  *
diff --git a/sys/amd64/isa/intr_machdep.h b/sys/amd64/isa/intr_machdep.h
index 011836d..feb686c 100644
--- a/sys/amd64/isa/intr_machdep.h
+++ b/sys/amd64/isa/intr_machdep.h
@@ -168,10 +168,16 @@ inthand_t
 	IDTVEC(fastintr16), IDTVEC(fastintr17),
 	IDTVEC(fastintr18), IDTVEC(fastintr19),
 	IDTVEC(fastintr20), IDTVEC(fastintr21),
-	IDTVEC(fastintr22), IDTVEC(fastintr23);
+	IDTVEC(fastintr22), IDTVEC(fastintr23),
+	IDTVEC(fastintr24), IDTVEC(fastintr25),
+	IDTVEC(fastintr26), IDTVEC(fastintr27),
+	IDTVEC(fastintr28), IDTVEC(fastintr29),
+	IDTVEC(fastintr30), IDTVEC(fastintr31);
 inthand_t
 	IDTVEC(intr16), IDTVEC(intr17), IDTVEC(intr18), IDTVEC(intr19),
-	IDTVEC(intr20), IDTVEC(intr21), IDTVEC(intr22), IDTVEC(intr23);
+	IDTVEC(intr20), IDTVEC(intr21), IDTVEC(intr22), IDTVEC(intr23),
+	IDTVEC(intr24), IDTVEC(intr25), IDTVEC(intr26), IDTVEC(intr27),
+	IDTVEC(intr28), IDTVEC(intr29), IDTVEC(intr30), IDTVEC(intr31);
 
 inthand_t
 	Xinvltlb,	/* TLB shootdowns */
diff --git a/sys/amd64/isa/ithread.c b/sys/amd64/isa/ithread.c
index 986e41d..6a59db1 100644
--- a/sys/amd64/isa/ithread.c
+++ b/sys/amd64/isa/ithread.c
@@ -33,8 +33,6 @@
 
 #include "opt_auto_eoi.h"
 
-#include "isa.h"
-
 #include <sys/param.h>
 #include <sys/bus.h>
 #include <sys/rtprio.h>			/* change this name XXX */
@@ -56,33 +54,11 @@
 #include <machine/md_var.h>
 #include <machine/segments.h>
 
-#if defined(APIC_IO)
-#include <machine/smp.h>
-#include <machine/smptests.h>			/** FAST_HI */
-#include <machine/resource.h>
-#endif /* APIC_IO */
-#ifdef PC98
-#include <pc98/pc98/pc98.h>
-#include <pc98/pc98/pc98_machdep.h>
-#include <pc98/pc98/epsonio.h>
-#else
-#include <i386/isa/isa.h>
-#endif
 #include <i386/isa/icu.h>
 
-#if NISA > 0
 #include <isa/isavar.h>
-#endif
 #include <i386/isa/intr_machdep.h>
 #include <sys/interrupt.h>
-#ifdef APIC_IO
-#include <machine/clock.h>
-#endif
-
-#include "mca.h"
-#if NMCA > 0
-#include <i386/isa/mca_machdep.h>
-#endif
 
 #include <sys/vmmeter.h>
 #include <sys/ktr.h>
@@ -227,8 +203,8 @@ ithd_loop(void *dummy)
 			INTREN (1 << me->irq); /* reset the mask bit */
 			me->it_proc->p_stat = SWAIT; /* we're idle */
 #ifdef APIC_IO
-			CTR1(KTR_INTR, "ithd_loop pid %d: done",
-				me->it_proc->p_pid);
+			CTR2(KTR_INTR, "ithd_loop pid %d: done, apic_imen=%x",
+				me->it_proc->p_pid, apic_imen);
 #else
 			CTR2(KTR_INTR, "ithd_loop pid %d: done, imen=%x",
 				me->it_proc->p_pid, imen);
diff --git a/sys/i386/i386/apic_vector.s b/sys/i386/i386/apic_vector.s
index adf4c36..995cf21 100644
--- a/sys/i386/i386/apic_vector.s
+++ b/sys/i386/i386/apic_vector.s
@@ -117,13 +117,13 @@ IDTVEC(vec_name) ;							\
 	testl	$IRQ_BIT(irq_num), _apic_imen ;				\
 	je	7f ;			/* bit clear, not masked */	\
 	andl	$~IRQ_BIT(irq_num), _apic_imen ;/* clear mask bit */	\
-	movl	IOAPICADDR(irq_num),%ecx ;	/* ioapic addr */	\
+	movl	IOAPICADDR(irq_num), %ecx ;	/* ioapic addr */	\
 	movl	REDIRIDX(irq_num), %eax ;	/* get the index */	\
-	movl	%eax,(%ecx) ;			/* write the index */	\
-	movl	IOAPIC_WINDOW(%ecx),%eax ;	/* current value */	\
-	andl	$~IOART_INTMASK,%eax ;		/* clear the mask */	\
-	movl	%eax,IOAPIC_WINDOW(%ecx) ;	/* new value */		\
-7: ;									\
+	movl	%eax, (%ecx) ;			/* write the index */	\
+	movl	IOAPIC_WINDOW(%ecx), %eax ;	/* current value */	\
+	andl	$~IOART_INTMASK, %eax ;		/* clear the mask */	\
+	movl	%eax, IOAPIC_WINDOW(%ecx) ;	/* new value */		\
+7: ;						/* already unmasked */	\
 	IMASK_UNLOCK
 
 #ifdef APIC_INTR_DIAGNOSTIC
@@ -379,7 +379,7 @@ _Xcpuast:
 	lock	
 	btrl	%eax, CNAME(resched_cpus)
 	jnc	2f
-	orl	$AST_PENDING+AST_RESCHED,_astpending
+	orl	$AST_PENDING+AST_RESCHED, _astpending
 	lock
 	incl	CNAME(want_resched_cnt)
 2:		
@@ -565,6 +565,14 @@ MCOUNT_LABEL(bintr)
 	FAST_INTR(21,fastintr21)
 	FAST_INTR(22,fastintr22)
 	FAST_INTR(23,fastintr23)
+	FAST_INTR(24,fastintr24)
+	FAST_INTR(25,fastintr25)
+	FAST_INTR(26,fastintr26)
+	FAST_INTR(27,fastintr27)
+	FAST_INTR(28,fastintr28)
+	FAST_INTR(29,fastintr29)
+	FAST_INTR(30,fastintr30)
+	FAST_INTR(31,fastintr31)
 #define	CLKINTR_PENDING	movl $1,CNAME(clkintr_pending)
 /* Threaded interrupts */
 	INTR(0,intr0, CLKINTR_PENDING)
@@ -591,6 +599,14 @@ MCOUNT_LABEL(bintr)
 	INTR(21,intr21,)
 	INTR(22,intr22,)
 	INTR(23,intr23,)
+	INTR(24,intr24,)
+	INTR(25,intr25,)
+	INTR(26,intr26,)
+	INTR(27,intr27,)
+	INTR(28,intr28,)
+	INTR(29,intr29,)
+	INTR(30,intr30,)
+	INTR(31,intr31,)
 MCOUNT_LABEL(eintr)
 
 /*
@@ -667,8 +683,6 @@ CNAME(cpuast_cnt):
 	.long 0
 CNAME(cpustop_restartfunc):
 	.long 0
-		
-
 
 	.globl	_apic_pin_trigger
 _apic_pin_trigger:
diff --git a/sys/i386/i386/mp_machdep.c b/sys/i386/i386/mp_machdep.c
index 0c1fc03..d37b6d6 100644
--- a/sys/i386/i386/mp_machdep.c
+++ b/sys/i386/i386/mp_machdep.c
@@ -1262,7 +1262,7 @@ setup_apic_irq_mapping(void)
 		}
 	}
 
-	/* Assign interrupts on first 24 intpins on IOAPIC #0 */
+	/* Assign first set of interrupts to intpins on IOAPIC #0 */
 	for (x = 0; x < nintrs; x++) {
 		int_vector = io_apic_ints[x].dst_apic_int;
 		if (int_vector < APIC_INTMAPSIZE &&
diff --git a/sys/i386/i386/mpapic.c b/sys/i386/i386/mpapic.c
index f476e01..67297ba 100644
--- a/sys/i386/i386/mpapic.c
+++ b/sys/i386/i386/mpapic.c
@@ -37,6 +37,7 @@
 #include <machine/segments.h>
 
 #include <i386/isa/intr_machdep.h>	/* Xspuriousint() */
+#include <i386/isa/icu.h>		/* apic_imen */
 
 /* EISA Edge/Level trigger control registers */
 #define ELCR0	0x4d0			/* eisa irq 0-7 */
@@ -444,14 +445,13 @@ bad:
 /*
  * Print contents of apic_imen.
  */
-extern	u_int apic_imen;		/* keep apic_imen 'opaque' */
 void
 imen_dump(void)
 {
 	int x;
 
 	printf("SMP: enabled INTs: ");
-	for (x = 0; x < 24; ++x)
+	for (x = 0; x < APIC_IMEN_BITS; ++x)
 		if ((apic_imen & (1 << x)) == 0)
         		printf("%d, ", x);
 	printf("apic_imen: 0x%08x\n", apic_imen);
diff --git a/sys/i386/i386/mptable.c b/sys/i386/i386/mptable.c
index 0c1fc03..d37b6d6 100644
--- a/sys/i386/i386/mptable.c
+++ b/sys/i386/i386/mptable.c
@@ -1262,7 +1262,7 @@ setup_apic_irq_mapping(void)
 		}
 	}
 
-	/* Assign interrupts on first 24 intpins on IOAPIC #0 */
+	/* Assign first set of interrupts to intpins on IOAPIC #0 */
 	for (x = 0; x < nintrs; x++) {
 		int_vector = io_apic_ints[x].dst_apic_int;
 		if (int_vector < APIC_INTMAPSIZE &&
diff --git a/sys/i386/include/mptable.h b/sys/i386/include/mptable.h
index 0c1fc03..d37b6d6 100644
--- a/sys/i386/include/mptable.h
+++ b/sys/i386/include/mptable.h
@@ -1262,7 +1262,7 @@ setup_apic_irq_mapping(void)
 		}
 	}
 
-	/* Assign interrupts on first 24 intpins on IOAPIC #0 */
+	/* Assign first set of interrupts to intpins on IOAPIC #0 */
 	for (x = 0; x < nintrs; x++) {
 		int_vector = io_apic_ints[x].dst_apic_int;
 		if (int_vector < APIC_INTMAPSIZE &&
diff --git a/sys/i386/include/smp.h b/sys/i386/include/smp.h
index 1680518..673a368 100644
--- a/sys/i386/include/smp.h
+++ b/sys/i386/include/smp.h
@@ -78,7 +78,7 @@ extern u_int32_t		*io_apic_versions;
 extern int			cpu_num_to_apic_id[];
 extern int			io_num_to_apic_id[];
 extern int			apic_id_to_logical[];
-#define APIC_INTMAPSIZE 24
+#define APIC_INTMAPSIZE 32
 struct apic_intmapinfo {
   	int ioapic;
 	int int_pin;
@@ -144,11 +144,6 @@ void	io_apic_set_id		__P((int, int));
 int	io_apic_get_id		__P((int));
 int	ext_int_setup		__P((int, int));
 
-#if defined(READY)
-void	clr_io_apic_mask24	__P((int, u_int32_t));
-void	set_io_apic_mask24	__P((int, u_int32_t));
-#endif /* READY */
-
 void	set_apic_timer		__P((int));
 int	read_apic_timer		__P((void));
 void	u_sleep			__P((int));
diff --git a/sys/i386/isa/apic_ipl.h b/sys/i386/isa/apic_ipl.h
index 921802e..b9da141 100644
--- a/sys/i386/isa/apic_ipl.h
+++ b/sys/i386/isa/apic_ipl.h
@@ -28,7 +28,7 @@
 #ifndef _I386_ISA_APIC_IPL_H_
 #define	_I386_ISA_APIC_IPL_H_
 
-#define	NHWI		24		/* number of h/w interrupts */
-#define	HWI_MASK	0x00ffffff	/* bits for h/w interrupts */
+#define	NHWI		32		/* number of h/w interrupts */
+#define	HWI_MASK	0xffffffff	/* bits for h/w interrupts */
 
 #endif /* !_I386_ISA_APIC_IPL_H_ */
diff --git a/sys/i386/isa/apic_ipl.s b/sys/i386/isa/apic_ipl.s
index 596adf6..82b1487 100644
--- a/sys/i386/isa/apic_ipl.s
+++ b/sys/i386/isa/apic_ipl.s
@@ -25,26 +25,10 @@
  * $FreeBSD$
  */
 
-
 	.data
 	ALIGN_DATA
 
 /*
- * Routines used by splz_unpend to build an interrupt frame from a
- * trap frame.  The _vec[] routines build the proper frame on the stack,
- * then call one of _Xintr0 thru _XintrNN.
- *
- * used by:
- *   i386/isa/apic_ipl.s (this file):	splz_unpend JUMPs to HWIs.
- *   i386/isa/clock.c:			setup _vec[clock] to point at _vec8254.
- */
-	.globl _vec
-_vec:
-	.long	 vec0,  vec1,  vec2,  vec3,  vec4,  vec5,  vec6,  vec7
-	.long	 vec8,  vec9, vec10, vec11, vec12, vec13, vec14, vec15
-	.long	vec16, vec17, vec18, vec19, vec20, vec21, vec22, vec23
-
-/*
  * Note:
  *	This is the UP equivilant of _imen.
  *	It is OPAQUE, and must NOT be accessed directly.
@@ -52,8 +36,6 @@ _vec:
  *	Accessed by:
  *		INTREN()
  *		INTRDIS()
- *		MAYBE_MASK_IRQ
- *		MAYBE_UNMASK_IRQ
  *		imen_dump()
  */
 	.p2align 2				/* MUST be 32bit aligned */
@@ -61,65 +43,9 @@ _vec:
 _apic_imen:
 	.long	HWI_MASK
 
-
-/*
- * 
- */
 	.text
 	SUPERALIGN_TEXT
 
-/*
- * Fake clock interrupt(s) so that they appear to come from our caller instead
- * of from here, so that system profiling works.
- * XXX do this more generally (for all vectors; look up the C entry point).
- * XXX frame bogusness stops us from just jumping to the C entry point.
- * We have to clear iactive since this is an unpend call, and it will be
- * set from the time of the original INT.
- */
-
-/*
- * The 'generic' vector stubs.
- */
-
-#define BUILD_VEC(irq_num)						\
-	ALIGN_TEXT ;							\
-__CONCAT(vec,irq_num): ;						\
-	popl	%eax ;							\
-	pushfl ;							\
-	pushl	$KCSEL ;						\
-	pushl	%eax ;							\
-	cli ;								\
-	MEXITCOUNT ;							\
-	APIC_ITRACE(apic_itrace_splz, irq_num, APIC_ITRACE_SPLZ) ;	\
-	jmp	__CONCAT(_Xintr,irq_num)
-
-
-	BUILD_VEC(0)
-	BUILD_VEC(1)
-	BUILD_VEC(2)
-	BUILD_VEC(3)
-	BUILD_VEC(4)
-	BUILD_VEC(5)
-	BUILD_VEC(6)
-	BUILD_VEC(7)
-	BUILD_VEC(8)
-	BUILD_VEC(9)
-	BUILD_VEC(10)
-	BUILD_VEC(11)
-	BUILD_VEC(12)
-	BUILD_VEC(13)
-	BUILD_VEC(14)
-	BUILD_VEC(15)
-	BUILD_VEC(16)			/* 8 additional INTs in IO APIC */
-	BUILD_VEC(17)
-	BUILD_VEC(18)
-	BUILD_VEC(19)
-	BUILD_VEC(20)
-	BUILD_VEC(21)
-	BUILD_VEC(22)
-	BUILD_VEC(23)
-
-
 /******************************************************************************
  * XXX FIXME: figure out where these belong.
  */
@@ -205,148 +131,6 @@ ENTRY(INTRDIS)
 	popfl				/* restore old state of EI flag */
 	ret
 
-
-/******************************************************************************
- *
- */
-
-
-/*
- * void write_ioapic_mask(int apic, u_int mask); 
- */
-
-#define _INT_MASK	0x00010000
-#define _PIN_MASK	0x00ffffff
-
-#define _OLD_ESI	  0(%esp)
-#define _OLD_EBX	  4(%esp)
-#define _RETADDR	  8(%esp)
-#define _APIC		 12(%esp)
-#define _MASK		 16(%esp)
-
-	ALIGN_TEXT
-write_ioapic_mask:
-	pushl %ebx			/* scratch */
-	pushl %esi			/* scratch */
-
-	movl	_apic_imen, %ebx
-	xorl	_MASK, %ebx		/* %ebx = _apic_imen ^ mask */
-	andl	$_PIN_MASK, %ebx	/* %ebx = _apic_imen & 0x00ffffff */
-	jz	all_done		/* no change, return */
-
-	movl	_APIC, %esi		/* APIC # */
-	movl	_ioapic, %ecx
-	movl	(%ecx,%esi,4), %esi	/* %esi holds APIC base address */
-
-next_loop:				/* %ebx = diffs, %esi = APIC base */
-	bsfl	%ebx, %ecx		/* %ecx = index if 1st/next set bit */
-	jz	all_done
-
-	btrl	%ecx, %ebx		/* clear this bit in diffs */
-	leal	16(,%ecx,2), %edx	/* calculate register index */
-
-	movl	%edx, (%esi)		/* write the target register index */
-	movl	16(%esi), %eax		/* read the target register data */
-
-	btl	%ecx, _MASK		/* test for mask or unmask */
-	jnc	clear			/* bit is clear */
-	orl	$_INT_MASK, %eax	/* set mask bit */
-	jmp	write
-clear:	andl	$~_INT_MASK, %eax	/* clear mask bit */
-
-write:	movl	%eax, 16(%esi)		/* write the APIC register data */
-
-	jmp	next_loop		/* try another pass */
-
-all_done:
-	popl	%esi
-	popl	%ebx
-	ret
-
-#undef _OLD_ESI
-#undef _OLD_EBX
-#undef _RETADDR
-#undef _APIC
-#undef _MASK
-
-#undef _PIN_MASK
-#undef _INT_MASK
-
-#ifdef oldcode
-
-_INTREN:
-	movl _apic_imen, %eax
-	notl %eax			/* mask = ~mask */
-	andl _apic_imen, %eax		/* %eax = _apic_imen & ~mask */
-
-	pushl %eax			/* new (future) _apic_imen value */
-	pushl $0			/* APIC# arg */
-	call write_ioapic_mask		/* modify the APIC registers */
-
-	addl $4, %esp			/* remove APIC# arg from stack */
-	popl _apic_imen			/* _apic_imen |= mask */
-	ret
-
-_INTRDIS:
-	movl _apic_imen, %eax
-	orl 4(%esp), %eax		/* %eax = _apic_imen | mask */
-
-	pushl %eax			/* new (future) _apic_imen value */
-	pushl $0			/* APIC# arg */
-	call write_ioapic_mask		/* modify the APIC registers */
-
-	addl $4, %esp			/* remove APIC# arg from stack */
-	popl _apic_imen			/* _apic_imen |= mask */
-	ret
-
-#endif /* oldcode */
-
-
-#ifdef ready
-
-/*
- * u_int read_io_apic_mask(int apic); 
- */
-	ALIGN_TEXT
-read_io_apic_mask:
-	ret
-
-/*
- * Set INT mask bit for each bit set in 'mask'.
- * Ignore INT mask bit for all others.
- *
- * void set_io_apic_mask(apic, u_int32_t bits); 
- */
-	ALIGN_TEXT
-set_io_apic_mask:
-	ret
-
-/*
- * void set_ioapic_maskbit(int apic, int bit); 
- */
-	ALIGN_TEXT
-set_ioapic_maskbit:
-	ret
-
-/*
- * Clear INT mask bit for each bit set in 'mask'.
- * Ignore INT mask bit for all others.
- *
- * void clr_io_apic_mask(int apic, u_int32_t bits); 
- */
-	ALIGN_TEXT
-clr_io_apic_mask:
-	ret
-
-/*
- * void clr_ioapic_maskbit(int apic, int bit); 
- */
-	ALIGN_TEXT
-clr_ioapic_maskbit:
-	ret
-
-#endif /** ready */
-
 /******************************************************************************
  * 
  */
diff --git a/sys/i386/isa/apic_vector.s b/sys/i386/isa/apic_vector.s
index adf4c36..995cf21 100644
--- a/sys/i386/isa/apic_vector.s
+++ b/sys/i386/isa/apic_vector.s
@@ -117,13 +117,13 @@ IDTVEC(vec_name) ;							\
 	testl	$IRQ_BIT(irq_num), _apic_imen ;				\
 	je	7f ;			/* bit clear, not masked */	\
 	andl	$~IRQ_BIT(irq_num), _apic_imen ;/* clear mask bit */	\
-	movl	IOAPICADDR(irq_num),%ecx ;	/* ioapic addr */	\
+	movl	IOAPICADDR(irq_num), %ecx ;	/* ioapic addr */	\
 	movl	REDIRIDX(irq_num), %eax ;	/* get the index */	\
-	movl	%eax,(%ecx) ;			/* write the index */	\
-	movl	IOAPIC_WINDOW(%ecx),%eax ;	/* current value */	\
-	andl	$~IOART_INTMASK,%eax ;		/* clear the mask */	\
-	movl	%eax,IOAPIC_WINDOW(%ecx) ;	/* new value */		\
-7: ;									\
+	movl	%eax, (%ecx) ;			/* write the index */	\
+	movl	IOAPIC_WINDOW(%ecx), %eax ;	/* current value */	\
+	andl	$~IOART_INTMASK, %eax ;		/* clear the mask */	\
+	movl	%eax, IOAPIC_WINDOW(%ecx) ;	/* new value */		\
+7: ;						/* already unmasked */	\
 	IMASK_UNLOCK
 
 #ifdef APIC_INTR_DIAGNOSTIC
@@ -379,7 +379,7 @@ _Xcpuast:
 	lock	
 	btrl	%eax, CNAME(resched_cpus)
 	jnc	2f
-	orl	$AST_PENDING+AST_RESCHED,_astpending
+	orl	$AST_PENDING+AST_RESCHED, _astpending
 	lock
 	incl	CNAME(want_resched_cnt)
 2:		
@@ -565,6 +565,14 @@ MCOUNT_LABEL(bintr)
 	FAST_INTR(21,fastintr21)
 	FAST_INTR(22,fastintr22)
 	FAST_INTR(23,fastintr23)
+	FAST_INTR(24,fastintr24)
+	FAST_INTR(25,fastintr25)
+	FAST_INTR(26,fastintr26)
+	FAST_INTR(27,fastintr27)
+	FAST_INTR(28,fastintr28)
+	FAST_INTR(29,fastintr29)
+	FAST_INTR(30,fastintr30)
+	FAST_INTR(31,fastintr31)
 #define	CLKINTR_PENDING	movl $1,CNAME(clkintr_pending)
 /* Threaded interrupts */
 	INTR(0,intr0, CLKINTR_PENDING)
@@ -591,6 +599,14 @@ MCOUNT_LABEL(bintr)
 	INTR(21,intr21,)
 	INTR(22,intr22,)
 	INTR(23,intr23,)
+	INTR(24,intr24,)
+	INTR(25,intr25,)
+	INTR(26,intr26,)
+	INTR(27,intr27,)
+	INTR(28,intr28,)
+	INTR(29,intr29,)
+	INTR(30,intr30,)
+	INTR(31,intr31,)
 MCOUNT_LABEL(eintr)
 
 /*
@@ -667,8 +683,6 @@ CNAME(cpuast_cnt):
 	.long 0
 CNAME(cpustop_restartfunc):
 	.long 0
-		
-
 
 	.globl	_apic_pin_trigger
 _apic_pin_trigger:
diff --git a/sys/i386/isa/atpic_vector.s b/sys/i386/isa/atpic_vector.s
index 51b9493..f810401 100644
--- a/sys/i386/isa/atpic_vector.s
+++ b/sys/i386/isa/atpic_vector.s
@@ -71,37 +71,6 @@ IDTVEC(vec_name) ; \
 	MEXITCOUNT ; \
 	jmp	_doreti
 
-#if 0
-; \
-	ALIGN_TEXT ; \
-2: ; \
-	cmpb	$3,_intr_nesting_level ;	/* is there enough stack? */ \
-	jae	1b ;		/* no, return */ \
-	movl	_cpl,%eax ; \
-	/* XXX next line is probably unnecessary now. */ \
-	movl	$HWI_MASK|SWI_MASK,_cpl ;	/* limit nesting ... */ \
-	incb	_intr_nesting_level ;	/* ... really limit it ... */ \
-	sti ;			/* ... to do this as early as possible */ \
-	MAYBE_POPL_ES ;		/* discard most of thin frame ... */ \
-	popl	%fs ; \
-	popl	%ecx ;		/* ... original %ds ... */ \
-	popl	%edx ; \
-	xchgl	%eax,4(%esp) ;	/* orig %eax; save cpl */ \
-	pushal ;		/* build fat frame (grrr) ... */ \
-	pushl	%ecx ;		/* ... actually %ds ... */ \
-	pushl	%es ; \
-	pushl	%fs ; \
-	mov	$KDSEL,%ax ; \
-	mov	%ax,%es ; \
-	mov	%ax,%fs ; \
-	movl	(3+8+0)*4(%esp),%ecx ;	/* ... %ecx from thin frame ... */ \
-	movl	%ecx,(3+6)*4(%esp) ;	/* ... to fat frame ... */ \
-	movl	(3+8+1)*4(%esp),%eax ;	/* ... cpl from thin frame */ \
-	subl	$4,%esp ;	/* junk for unit number */ \
-	MEXITCOUNT ; \
-	jmp	_doreti
-#endif
-
 /* 
  * Slow, threaded interrupts.
  *
diff --git a/sys/i386/isa/icu.h b/sys/i386/isa/icu.h
index ed3a879..b5f2de4 100644
--- a/sys/i386/isa/icu.h
+++ b/sys/i386/isa/icu.h
@@ -47,8 +47,6 @@
 
 #ifndef	LOCORE
 
-#ifdef APIC_IO
-
 /*
 #define MP_SAFE
  * Note:
@@ -61,41 +59,14 @@
 void	INTREN			__P((u_int));
 void	INTRDIS			__P((u_int));
 
-#else /* APIC_IO */
-
-/*
- * Interrupt "level" mechanism variables, masks, and macros
- */
-extern	unsigned imen;		/* interrupt mask enable */
-
-#define	INTREN(s)		(imen &= ~(s), SET_ICUS())
-#define	INTRDIS(s)		(imen |= (s), SET_ICUS())
-
-#if 0
-#ifdef PC98
-#define	SET_ICUS()	(outb(IO_ICU1 + 2, imen), outb(IU_ICU2 + 2, imen >> 8))
-#define INTRGET()	((inb(IO_ICU2) << 8 | inb(IO_ICU1)) & 0xffff)
-#else	/* IBM-PC */
-#define	SET_ICUS()	(outb(IO_ICU1 + 1, imen), outb(IU_ICU2 + 1, imen >> 8))
-#define INTRGET()	((inb(IO_ICU2) << 8 | inb(IO_ICU1)) & 0xffff)
-#endif	/* PC98 */
-#else
-/*
- * XXX - IO_ICU* are defined in isa.h, not icu.h, and nothing much bothers to
- * include isa.h, while too many things include icu.h.
- */
-#ifdef PC98
-#define	SET_ICUS()	(outb(0x02, imen), outb(0x0a, imen >> 8))
-/* XXX is this correct? */
-#define INTRGET()	((inb(0x0a) << 8 | inb(0x02)) & 0xffff)
+#ifdef APIC_IO
+extern	unsigned apic_imen;	/* APIC interrupt mask enable */
+#define APIC_IMEN_BITS	32	/* number of bits in apic_imen */
 #else
-#define	SET_ICUS()	(outb(0x21, imen), outb(0xa1, imen >> 8))
-#define INTRGET()	((inb(0xa1) << 8 | inb(0x21)) & 0xffff)
-#endif
+extern	unsigned imen;		/* interrupt mask enable */
+#define IMEN_BITS	16	/* number of bits in imen */
 #endif
 
-#endif /* APIC_IO */
-
 #endif /* LOCORE */
 
 
diff --git a/sys/i386/isa/icu_ipl.s b/sys/i386/isa/icu_ipl.s
index d178d5c..3af9f66 100644
--- a/sys/i386/isa/icu_ipl.s
+++ b/sys/i386/isa/icu_ipl.s
@@ -39,73 +39,35 @@
 
 	.data
 	ALIGN_DATA
-vec:
-	.long	 vec0,  vec1,  vec2,  vec3,  vec4,  vec5,  vec6,  vec7
-	.long	 vec8,  vec9, vec10, vec11, vec12, vec13, vec14, vec15
 
 /* interrupt mask enable (all h/w off) */
 	.globl	_imen
 _imen:	.long	HWI_MASK
 
-
-/*
- * 
- */
 	.text
 	SUPERALIGN_TEXT
 
-/*
- * Fake clock interrupt(s) so that they appear to come from our caller instead
- * of from here, so that system profiling works.
- * XXX do this more generally (for all vectors; look up the C entry point).
- * XXX frame bogusness stops us from just jumping to the C entry point.
- */
-	ALIGN_TEXT
-vec0:
-	popl	%eax			/* return address */
-	pushfl
-	pushl	$KCSEL
-	pushl	%eax
-	cli
-	MEXITCOUNT
-	jmp	_Xintr0			/* XXX might need _Xfastintr0 */
-
-#ifndef PC98
-	ALIGN_TEXT
-vec8:
-	popl	%eax	
-	pushfl
-	pushl	$KCSEL
-	pushl	%eax
-	cli
-	MEXITCOUNT
-	jmp	_Xintr8			/* XXX might need _Xfastintr8 */
-#endif /* PC98 */
-
-/*
- * The 'generic' vector stubs.
- */
+#ifdef PC98
+#define MASK_OFFSET 2
+#else
+#define MASK_OFFSET 1
+#endif
 
-#define BUILD_VEC(irq_num)			\
-	ALIGN_TEXT ;				\
-__CONCAT(vec,irq_num): ;			\
-	int	$ICU_OFFSET + (irq_num) ;	\
+ENTRY(INTREN)
+	movl	4(%esp), %eax
+	notl	%eax
+	andl	%eax, imen
+	movl	imen, %eax
+	outb	%al, $(IO_ICU1 + MASK_OFFSET)
+	shrl	$8, %eax
+	outb	%al, $(IO_ICU2 + MASK_OFFSET)
 	ret
 
-	BUILD_VEC(1)
-	BUILD_VEC(2)
-	BUILD_VEC(3)
-	BUILD_VEC(4)
-	BUILD_VEC(5)
-	BUILD_VEC(6)
-	BUILD_VEC(7)
-#ifdef PC98
-	BUILD_VEC(8)
-#endif
-	BUILD_VEC(9)
-	BUILD_VEC(10)
-	BUILD_VEC(11)
-	BUILD_VEC(12)
-	BUILD_VEC(13)
-	BUILD_VEC(14)
-	BUILD_VEC(15)
+ENTRY(INTRDIS)
+	movl	4(%esp), %eax
+	orl	%eax, imen
+	movl	imen, %eax
+	outb	%al, $(IO_ICU1 + MASK_OFFSET)
+	shrl	$8, %eax
+	outb	%al, $(IO_ICU2 + MASK_OFFSET)
+	ret
diff --git a/sys/i386/isa/icu_vector.s b/sys/i386/isa/icu_vector.s
index 51b9493..f810401 100644
--- a/sys/i386/isa/icu_vector.s
+++ b/sys/i386/isa/icu_vector.s
@@ -71,37 +71,6 @@ IDTVEC(vec_name) ; \
 	MEXITCOUNT ; \
 	jmp	_doreti
 
-#if 0
-; \
-	ALIGN_TEXT ; \
-2: ; \
-	cmpb	$3,_intr_nesting_level ;	/* is there enough stack? */ \
-	jae	1b ;		/* no, return */ \
-	movl	_cpl,%eax ; \
-	/* XXX next line is probably unnecessary now. */ \
-	movl	$HWI_MASK|SWI_MASK,_cpl ;	/* limit nesting ... */ \
-	incb	_intr_nesting_level ;	/* ... really limit it ... */ \
-	sti ;			/* ... to do this as early as possible */ \
-	MAYBE_POPL_ES ;		/* discard most of thin frame ... */ \
-	popl	%fs ; \
-	popl	%ecx ;		/* ... original %ds ... */ \
-	popl	%edx ; \
-	xchgl	%eax,4(%esp) ;	/* orig %eax; save cpl */ \
-	pushal ;		/* build fat frame (grrr) ... */ \
-	pushl	%ecx ;		/* ... actually %ds ... */ \
-	pushl	%es ; \
-	pushl	%fs ; \
-	mov	$KDSEL,%ax ; \
-	mov	%ax,%es ; \
-	mov	%ax,%fs ; \
-	movl	(3+8+0)*4(%esp),%ecx ;	/* ... %ecx from thin frame ... */ \
-	movl	%ecx,(3+6)*4(%esp) ;	/* ... to fat frame ... */ \
-	movl	(3+8+1)*4(%esp),%eax ;	/* ... cpl from thin frame */ \
-	subl	$4,%esp ;	/* junk for unit number */ \
-	MEXITCOUNT ; \
-	jmp	_doreti
-#endif
-
 /* 
  * Slow, threaded interrupts.
  *
diff --git a/sys/i386/isa/intr_machdep.h b/sys/i386/isa/intr_machdep.h
index 011836d..feb686c 100644
--- a/sys/i386/isa/intr_machdep.h
+++ b/sys/i386/isa/intr_machdep.h
@@ -168,10 +168,16 @@ inthand_t
 	IDTVEC(fastintr16), IDTVEC(fastintr17),
 	IDTVEC(fastintr18), IDTVEC(fastintr19),
 	IDTVEC(fastintr20), IDTVEC(fastintr21),
-	IDTVEC(fastintr22), IDTVEC(fastintr23);
+	IDTVEC(fastintr22), IDTVEC(fastintr23),
+	IDTVEC(fastintr24), IDTVEC(fastintr25),
+	IDTVEC(fastintr26), IDTVEC(fastintr27),
+	IDTVEC(fastintr28), IDTVEC(fastintr29),
+	IDTVEC(fastintr30), IDTVEC(fastintr31);
 inthand_t
 	IDTVEC(intr16), IDTVEC(intr17), IDTVEC(intr18), IDTVEC(intr19),
-	IDTVEC(intr20), IDTVEC(intr21), IDTVEC(intr22), IDTVEC(intr23);
+	IDTVEC(intr20), IDTVEC(intr21), IDTVEC(intr22), IDTVEC(intr23),
+	IDTVEC(intr24), IDTVEC(intr25), IDTVEC(intr26), IDTVEC(intr27),
+	IDTVEC(intr28), IDTVEC(intr29), IDTVEC(intr30), IDTVEC(intr31);
 
 inthand_t
 	Xinvltlb,	/* TLB shootdowns */
diff --git a/sys/i386/isa/ithread.c b/sys/i386/isa/ithread.c
index 986e41d..6a59db1 100644
--- a/sys/i386/isa/ithread.c
+++ b/sys/i386/isa/ithread.c
@@ -33,8 +33,6 @@
 
 #include "opt_auto_eoi.h"
 
-#include "isa.h"
-
 #include <sys/param.h>
 #include <sys/bus.h>
 #include <sys/rtprio.h>			/* change this name XXX */
@@ -56,33 +54,11 @@
 #include <machine/md_var.h>
 #include <machine/segments.h>
 
-#if defined(APIC_IO)
-#include <machine/smp.h>
-#include <machine/smptests.h>			/** FAST_HI */
-#include <machine/resource.h>
-#endif /* APIC_IO */
-#ifdef PC98
-#include <pc98/pc98/pc98.h>
-#include <pc98/pc98/pc98_machdep.h>
-#include <pc98/pc98/epsonio.h>
-#else
-#include <i386/isa/isa.h>
-#endif
 #include <i386/isa/icu.h>
 
-#if NISA > 0
 #include <isa/isavar.h>
-#endif
 #include <i386/isa/intr_machdep.h>
 #include <sys/interrupt.h>
-#ifdef APIC_IO
-#include <machine/clock.h>
-#endif
-
-#include "mca.h"
-#if NMCA > 0
-#include <i386/isa/mca_machdep.h>
-#endif
 
 #include <sys/vmmeter.h>
 #include <sys/ktr.h>
@@ -227,8 +203,8 @@ ithd_loop(void *dummy)
 			INTREN (1 << me->irq); /* reset the mask bit */
 			me->it_proc->p_stat = SWAIT; /* we're idle */
 #ifdef APIC_IO
-			CTR1(KTR_INTR, "ithd_loop pid %d: done",
-				me->it_proc->p_pid);
+			CTR2(KTR_INTR, "ithd_loop pid %d: done, apic_imen=%x",
+				me->it_proc->p_pid, apic_imen);
 #else
 			CTR2(KTR_INTR, "ithd_loop pid %d: done, imen=%x",
 				me->it_proc->p_pid, imen);
diff --git a/sys/kern/subr_smp.c b/sys/kern/subr_smp.c
index 0c1fc03..d37b6d6 100644
--- a/sys/kern/subr_smp.c
+++ b/sys/kern/subr_smp.c
@@ -1262,7 +1262,7 @@ setup_apic_irq_mapping(void)
 		}
 	}
 
-	/* Assign interrupts on first 24 intpins on IOAPIC #0 */
+	/* Assign first set of interrupts to intpins on IOAPIC #0 */
 	for (x = 0; x < nintrs; x++) {
 		int_vector = io_apic_ints[x].dst_apic_int;
 		if (int_vector < APIC_INTMAPSIZE &&
diff --git a/sys/sys/smp.h b/sys/sys/smp.h
index 1680518..673a368 100644
--- a/sys/sys/smp.h
+++ b/sys/sys/smp.h
@@ -78,7 +78,7 @@ extern u_int32_t		*io_apic_versions;
 extern int			cpu_num_to_apic_id[];
 extern int			io_num_to_apic_id[];
 extern int			apic_id_to_logical[];
-#define APIC_INTMAPSIZE 24
+#define APIC_INTMAPSIZE 32
 struct apic_intmapinfo {
   	int ioapic;
 	int int_pin;
@@ -144,11 +144,6 @@ void	io_apic_set_id		__P((int, int));
 int	io_apic_get_id		__P((int));
 int	ext_int_setup		__P((int, int));
 
-#if defined(READY)
-void	clr_io_apic_mask24	__P((int, u_int32_t));
-void	set_io_apic_mask24	__P((int, u_int32_t));
-#endif /* READY */
-
 void	set_apic_timer		__P((int));
 int	read_apic_timer		__P((void));
 void	u_sleep			__P((int));