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| author | rwatson <rwatson@FreeBSD.org> | 2012-02-14 20:34:25 +0000 |
|---|---|---|
| committer | rwatson <rwatson@FreeBSD.org> | 2012-02-14 20:34:25 +0000 |
| commit | 7ccc122ac3b8a4fd3a3b0254e34e52c126867987 (patch) | |
| tree | f34ed4b6e65f26fd720fc68ab41cc9fd8643fa6c | |
| parent | 19d9144e508b6cc55d90c2ee432448ca99b2aad7 (diff) | |
| download | FreeBSD-src-7ccc122ac3b8a4fd3a3b0254e34e52c126867987.zip FreeBSD-src-7ccc122ac3b8a4fd3a3b0254e34e52c126867987.tar.gz | |
When initialising the CP0 status register during boot on 64-bit MIPS,
set all three of the kernel, supervisor, and user-mode 64-bit mode
flags. While FreeBSD does not currently use the supervisor ring (and
hence this is effectively a NOP on most systems), doing this avoids
triggering an exception on 64-bit MIPS CPUs that don't support 32-bit
compatibility mode, and therefore don't allow clearing the SX bit.
Reviewed by: gonzo
MFC after: 3 days
Sponsored by: DARPA, SRI International
| -rw-r--r-- | sys/mips/mips/locore.S | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/sys/mips/mips/locore.S b/sys/mips/mips/locore.S index c6e78a2..3b967a2 100644 --- a/sys/mips/mips/locore.S +++ b/sys/mips/mips/locore.S @@ -118,7 +118,7 @@ VECTOR(_locore, unknown) */ li t1, MIPS_SR_COP_1_BIT #ifdef __mips_n64 - or t1, MIPS_SR_KX | MIPS_SR_UX + or t1, MIPS_SR_KX | MIPS_SR_SX | MIPS_SR_UX #endif #endif /* |
