diff options
author | kato <kato@FreeBSD.org> | 1998-01-31 11:32:39 +0000 |
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committer | kato <kato@FreeBSD.org> | 1998-01-31 11:32:39 +0000 |
commit | 757f579d3be4836a7e01cff37d611310fc4141a3 (patch) | |
tree | 9bf90d6e04691bbfef1d3debdd1ebe086308358d | |
parent | 712a1e61e7cb02d6cd0937cf3297e643a9a9631e (diff) | |
download | FreeBSD-src-757f579d3be4836a7e01cff37d611310fc4141a3.zip FreeBSD-src-757f579d3be4836a7e01cff37d611310fc4141a3.tar.gz |
Delte unused files.
Submitted by: NOKUBI Hirotaka <hnokubi@yyy.or.jp>
-rw-r--r-- | sys/pc98/boot/netboot/ether.c | 572 | ||||
-rw-r--r-- | sys/pc98/boot/netboot/ether.h | 267 |
2 files changed, 0 insertions, 839 deletions
diff --git a/sys/pc98/boot/netboot/ether.c b/sys/pc98/boot/netboot/ether.c deleted file mode 100644 index 8a2ee0e..0000000 --- a/sys/pc98/boot/netboot/ether.c +++ /dev/null @@ -1,572 +0,0 @@ - -/************************************************************************** -NETBOOT - BOOTP/TFTP Bootstrap Program - -Author: Martin Renters. - Date: Mar 22 1995 - - This code is based heavily on David Greenman's if_ed.c driver and - Andres Vega Garcia's if_ep.c driver. - - Copyright (C) 1993-1994, David Greenman, Martin Renters. - Copyright (C) 1993-1995, Andres Vega Garcia. - Copyright (C) 1995, Serge Babkin. - This software may be used, modified, copied, distributed, and sold, in - both source and binary form provided that the above copyright and these - terms are retained. Under no circumstances are the authors responsible for - the proper functioning of this software, nor do the authors assume any - responsibility for damages incurred with its use. - -3c503 support added by Bill Paul (wpaul@ctr.columbia.edu) on 11/15/94 -SMC8416 support added by Bill Paul (wpaul@ctr.columbia.edu) on 12/25/94 -3c509 support added by Serge Babkin (babkin@hq.icb.chel.su) on 03/22/95 - -***************************************************************************/ - -/* #define EDEBUG */ - -#include "netboot.h" -#include "ether.h" - -extern short aui; -char bnc=0, utp=0; /* for 3C509 */ -unsigned short eth_nic_base; -unsigned short eth_asic_base; -unsigned short eth_base; -unsigned char eth_tx_start; -unsigned char eth_laar; -unsigned char eth_flags; -unsigned char eth_vendor; -unsigned char eth_memsize; -unsigned char *eth_bmem; -unsigned char *eth_rmem; -unsigned char *eth_node_addr; - -/************************************************************************** -The following two variables are used externally -***************************************************************************/ -char packet[ETH_MAX_PACKET]; -int packetlen; - -/************************************************************************* -ETH_FILLNAME - Fill name of adapter in NFS structure -**************************************************************************/ - -eth_fillname(where) -char *where; -{ - switch(eth_vendor) { - case VENDOR_3C509: - where[0]='e'; where[1]='p'; where[2]='0'; where[3]=0; - break; - case VENDOR_WD: - case VENDOR_NOVELL: - case VENDOR_3COM: - where[0]='e'; where[1]='d'; where[2]='0'; where[3]=0; - break; - default: - where[0]='?'; where[1]='?'; where[2]='?'; where[3]=0; - break; - } -} - -/************************************************************************** -ETH_PROBE - Look for an adapter -***************************************************************************/ -eth_probe() -{ - /* common variables */ - int i; -#if defined(INCLUDE_EGY) || defined(INCLUDE_LGY) || defined(INCLUDE_ICM) || defined(INCLUDE_SIC) - /* varaibles for 8390 */ - struct wd_board *brd; - char *name; - unsigned short chksum; - unsigned char c; -#endif - - eth_vendor = VENDOR_NONE; - -#if defined(INCLUDE_EGY) || defined(INCLUDE_LGY) || defined(INCLUDE_ICM) || defined(INCLUDE_SIC) -#ifdef INCLUDE_SIC - /****************************************************************** - Search for WD/SMC cards - *******************************************************************/ - for (eth_asic_base = WD_LOW_BASE; eth_asic_base <= WD_HIGH_BASE; - eth_asic_base += 0x20) { - chksum = 0; - for (i=8; i<16; i++) - chksum += inb(i+eth_asic_base); - if ((chksum & 0x00FF) == 0x00FF) - break; - } - if (eth_asic_base <= WD_HIGH_BASE) { /* We've found a board */ - eth_vendor = VENDOR_WD; - eth_nic_base = eth_asic_base + WD_NIC_ADDR; - c = inb(eth_asic_base+WD_BID); /* Get board id */ - for (brd = wd_boards; brd->name; brd++) - if (brd->id == c) break; - if (!brd->name) { - printf("\r\nUnknown Ethernet type %x\r\n", c); - return(0); /* Unknown type */ - } - eth_flags = brd->flags; - eth_memsize = brd->memsize; - eth_tx_start = 0; - if ((c == TYPE_WD8013EP) && - (inb(eth_asic_base + WD_ICR) & WD_ICR_16BIT)) { - eth_flags = FLAG_16BIT; - eth_memsize = MEM_16384; - } - if ((c & WD_SOFTCONFIG) && (!(eth_flags & FLAG_790))) { - eth_bmem = (char *)(0x80000 | - ((inb(eth_asic_base + WD_MSR) & 0x3F) << 13)); - } else - eth_bmem = (char *)WD_DEFAULT_MEM; - if (brd->id == TYPE_SMC8216T || brd->id == TYPE_SMC8216C) { - (unsigned int) *(eth_bmem + 8192) = (unsigned int)0; - if ((unsigned int) *(eth_bmem + 8192)) { - brd += 2; - eth_memsize = brd->memsize; - } - } - outb(eth_asic_base + WD_MSR, 0x80); /* Reset */ - printf("\r\n%s base 0x%x, memory 0x%X, addr ", - brd->name, eth_asic_base, eth_bmem); - for (i=0; i<6; i++) { - printf("%b",(int)(arptable[ARP_CLIENT].node[i] = - inb(i+eth_asic_base+WD_LAR))); - if (i < 5) printf (":"); - } - if (eth_flags & FLAG_790) { - outb(eth_asic_base+WD_MSR, WD_MSR_MENB); - outb(eth_asic_base+0x04, (inb(eth_asic_base+0x04) | - 0x80)); - outb(eth_asic_base+0x0B, - (((unsigned)eth_bmem >> 13) & 0x0F) | - (((unsigned)eth_bmem >> 11) & 0x40) | - (inb(eth_asic_base+0x0B) & 0xB0)); - outb(eth_asic_base+0x04, (inb(eth_asic_base+0x04) & - ~0x80)); - } else { - outb(eth_asic_base+WD_MSR, - (((unsigned)eth_bmem >> 13) & 0x3F) | 0x40); - } - if (eth_flags & FLAG_16BIT) { - if (eth_flags & FLAG_790) { - eth_laar = inb(eth_asic_base + WD_LAAR); - outb(eth_asic_base + WD_LAAR, WD_LAAR_M16EN); - inb(0x84); - } else { - outb(eth_asic_base + WD_LAAR, (eth_laar = - WD_LAAR_M16EN | WD_LAAR_L16EN | 1)); - } - } - printf("\r\n"); - - } -#endif -#ifdef defined(INCLUDE_EGY) || defined(INCLUDE_LGY) || defined(INCLUDE_ICM) - /****************************************************************** - Search for EGY/LGY/IF-2766 if no SIC cards - *******************************************************************/ - if (eth_vendor == VENDOR_NONE) { - char romdata[16], testbuf[32]; - char test[] = "NE1000/2000 memory"; - eth_bmem = (char *)0; /* No shared memory */ - eth_asic_base = ED_BASE + ED_ASIC_OFFSET; - eth_nic_base = ED_BASE; - eth_vendor = VENDOR_NOVELL; - eth_flags = FLAG_PIO; - eth_memsize = MEM_16384; - eth_tx_start = 32; - c = inb(eth_asic_base + ED_RESET); - outb(eth_asic_base + ED_RESET, c); - inb(0x84); - outb(eth_nic_base + D8390_P0_COMMAND, D8390_COMMAND_STP | - D8390_COMMAND_RD2); - outb(eth_nic_base + D8390_P0_RCR, D8390_RCR_MON); - outb(eth_nic_base + D8390_P0_DCR, D8390_DCR_FT1 | D8390_DCR_LS); - outb(eth_nic_base + D8390_P0_PSTART, MEM_8192); - outb(eth_nic_base + D8390_P0_PSTOP, MEM_16384); - eth_pio_write(test, 8192, sizeof(test)); - eth_pio_read(8192, testbuf, sizeof(test)); - if (!bcompare(test, testbuf, sizeof(test))) { - eth_flags |= FLAG_16BIT; - eth_memsize = MEM_32768; - eth_tx_start = 64; - outb(eth_nic_base + D8390_P0_DCR, D8390_DCR_WTS | - D8390_DCR_FT1 | D8390_DCR_LS); - outb(eth_nic_base + D8390_P0_PSTART, MEM_16384); - outb(eth_nic_base + D8390_P0_PSTOP, MEM_32768); - eth_pio_write(test, 16384, sizeof(test)); - eth_pio_read(16384, testbuf, sizeof(test)); - if (!bcompare(testbuf, test, sizeof(test))) return (0); - } - eth_pio_read(0, romdata, 16); - printf("\r\nNE1000/NE2000 base 0x%x, addr ", eth_nic_base); - for (i=0; i<6; i++) { - printf("%b",(int)(arptable[ARP_CLIENT].node[i] = romdata[i - + ((eth_flags & FLAG_16BIT) ? i : 0)])); - if (i < 5) printf (":"); - } - printf("\r\n"); - } - if (eth_vendor == VENDOR_NONE) - goto no8390; - - if (eth_vendor != VENDOR_3COM) eth_rmem = eth_bmem; - eth_node_addr = arptable[ARP_CLIENT].node; - eth_reset(); - return(eth_vendor); -#endif /* NE */ -no8390: -#endif /*8390 */ - - return VENDOR_NONE; -} - -/************************************************************************** -ETH_RESET - Reset adapter -***************************************************************************/ -eth_reset() -{ - int s, i; - -#if defined(INCLUDE_EGY) || defined(INCLUDE_LGY) || defined(INCLUDE_ICM) || defined(INCLUDE_SIC) - - /************************************************************** - Reset cards based on 8390 chip - ****************************************************************/ - - if(eth_vendor!=VENDOR_WD && eth_vendor!=VENDOR_NOVELL - && eth_vendor!=VENDOR_3COM) - goto no8390; - - if (eth_flags & FLAG_790) - outb(eth_nic_base+D8390_P0_COMMAND, - D8390_COMMAND_PS0 | D8390_COMMAND_STP); - else - outb(eth_nic_base+D8390_P0_COMMAND, - D8390_COMMAND_PS0 | D8390_COMMAND_RD2 | - D8390_COMMAND_STP); - if (eth_flags & FLAG_16BIT) - outb(eth_nic_base+D8390_P0_DCR, 0x49); - else - outb(eth_nic_base+D8390_P0_DCR, 0x48); - outb(eth_nic_base+D8390_P0_RBCR0, 0); - outb(eth_nic_base+D8390_P0_RBCR1, 0); - outb(eth_nic_base+D8390_P0_RCR, 4); /* allow broadcast frames */ - outb(eth_nic_base+D8390_P0_TCR, 2); - outb(eth_nic_base+D8390_P0_TPSR, eth_tx_start); - outb(eth_nic_base+D8390_P0_PSTART, eth_tx_start + D8390_TXBUF_SIZE); - if (eth_flags & FLAG_790) outb(eth_nic_base + 0x09, 0); - outb(eth_nic_base+D8390_P0_PSTOP, eth_memsize); - outb(eth_nic_base+D8390_P0_BOUND, eth_tx_start + D8390_TXBUF_SIZE); - outb(eth_nic_base+D8390_P0_ISR, 0xFF); - outb(eth_nic_base+D8390_P0_IMR, 0); - if (eth_flags & FLAG_790) - outb(eth_nic_base+D8390_P0_COMMAND, D8390_COMMAND_PS1 | - D8390_COMMAND_STP); - else - outb(eth_nic_base+D8390_P0_COMMAND, D8390_COMMAND_PS1 | - D8390_COMMAND_RD2 | D8390_COMMAND_STP); - for (i=0; i<6; i++) - outb(eth_nic_base+D8390_P1_PAR0+i, eth_node_addr[i]); - for (i=0; i<6; i++) - outb(eth_nic_base+D8390_P1_MAR0+i, 0xFF); - outb(eth_nic_base+D8390_P1_CURR, eth_tx_start + D8390_TXBUF_SIZE+1); - if (eth_flags & FLAG_790) - outb(eth_nic_base+D8390_P0_COMMAND, D8390_COMMAND_PS0 | - D8390_COMMAND_STA); - else - outb(eth_nic_base+D8390_P0_COMMAND, D8390_COMMAND_PS0 | - D8390_COMMAND_RD2 | D8390_COMMAND_STA); - outb(eth_nic_base+D8390_P0_ISR, 0xFF); - outb(eth_nic_base+D8390_P0_TCR, 0); - return(1); -no8390: -#endif /* 8390 */ -} - -/************************************************************************** -ETH_TRANSMIT - Transmit a frame -***************************************************************************/ -static const char padmap[] = { - 0, 3, 2, 1}; - -eth_transmit(d,t,s,p) -char *d; /* Destination */ -unsigned short t; /* Type */ -unsigned short s; /* size */ -char *p; /* Packet */ -{ - register u_int len; - int pad; - int status; - unsigned char c; - -#if defined(INCLUDE_EGY) || defined(INCLUDE_LGY) || defined(INCLUDE_ICM) || defined(INCLUDE_SIC) - - - if(eth_vendor!=VENDOR_WD && eth_vendor!=VENDOR_NOVELL - && eth_vendor!=VENDOR_3COM) - goto no8390; - -#ifdef INCLUDE_WD - if (eth_vendor == VENDOR_WD) { /* Memory interface */ - if (eth_flags & FLAG_16BIT) { - outb(eth_asic_base + WD_LAAR, eth_laar | WD_LAAR_M16EN); - inb(0x84); - } - if (eth_flags & FLAG_790) { - outb(eth_asic_base + WD_MSR, WD_MSR_MENB); - inb(0x84); - } - inb(0x84); - bcopy(d, eth_bmem, 6); /* dst */ - bcopy(eth_node_addr, eth_bmem+6, ETHER_ADDR_SIZE); /* src */ - *(eth_bmem+12) = t>>8; /* type */ - *(eth_bmem+13) = t; - bcopy(p, eth_bmem+14, s); - s += 14; - while (s < ETH_MIN_PACKET) *(eth_bmem+(s++)) = 0; - if (eth_flags & FLAG_790) { - outb(eth_asic_base + WD_MSR, 0); - inb(0x84); - } - if (eth_flags & FLAG_16BIT) { - outb(eth_asic_base + WD_LAAR, eth_laar & ~WD_LAAR_M16EN); - inb(0x84); - } - } -#endif -#if defined(INCLUDE_EGY) || defined(INCLUDE_LGY) || defined(INCLUDE_ICM) - if (eth_vendor == VENDOR_NOVELL) { /* Programmed I/O */ - unsigned short type; - type = (t >> 8) | (t << 8); - eth_pio_write(d, eth_tx_start<<8, 6); - eth_pio_write(eth_node_addr, (eth_tx_start<<8)+6, 6); - eth_pio_write(&type, (eth_tx_start<<8)+12, 2); - eth_pio_write(p, (eth_tx_start<<8)+14, s); - s += 14; - if (s < ETH_MIN_PACKET) s = ETH_MIN_PACKET; - } -#endif - twiddle(); - if (eth_flags & FLAG_790) - outb(eth_nic_base+D8390_P0_COMMAND, D8390_COMMAND_PS0 | - D8390_COMMAND_STA); - else - outb(eth_nic_base+D8390_P0_COMMAND, D8390_COMMAND_PS0 | - D8390_COMMAND_RD2 | D8390_COMMAND_STA); - outb(eth_nic_base+D8390_P0_TPSR, eth_tx_start); - outb(eth_nic_base+D8390_P0_TBCR0, s); - outb(eth_nic_base+D8390_P0_TBCR1, s>>8); - if (eth_flags & FLAG_790) - outb(eth_nic_base+D8390_P0_COMMAND, D8390_COMMAND_PS0 | - D8390_COMMAND_TXP | D8390_COMMAND_STA); - else - outb(eth_nic_base+D8390_P0_COMMAND, D8390_COMMAND_PS0 | - D8390_COMMAND_TXP | D8390_COMMAND_RD2 | - D8390_COMMAND_STA); - return(0); - -no8390: -#endif /* 8390 */ -} - -/************************************************************************** -ETH_POLL - Wait for a frame -***************************************************************************/ -eth_poll() -{ - /* common variables */ - unsigned short type = 0; - unsigned short len; - /* variables for 3C509 */ - /* variables for 8390 */ - -#if defined(INCLUDE_EGY) || defined(INCLUDE_LGY) || defined(INCLUDE_ICM) || defined(INCLUDE_SIC) - int ret = 0; - unsigned char bound,curr,rstat; - unsigned short pktoff; - unsigned char *p; - struct ringbuffer pkthdr; -#endif -#if defined(INCLUDE_EGY) || defined(INCLUDE_LGY) || defined(INCLUDE_ICM) || defined(INCLUDE_SIC) - - if(eth_vendor!=VENDOR_WD && eth_vendor!=VENDOR_NOVELL - && eth_vendor!=VENDOR_3COM) - goto no8390; - - rstat = inb(eth_nic_base+D8390_P0_RSR); - if (rstat & D8390_RSTAT_OVER) { - eth_reset(); - return(0); - } - if (!(rstat & D8390_RSTAT_PRX)) return(0); - bound = inb(eth_nic_base+D8390_P0_BOUND)+1; - if (bound == eth_memsize) bound = eth_tx_start + D8390_TXBUF_SIZE; - outb(eth_nic_base+D8390_P0_COMMAND, D8390_COMMAND_PS1); - curr = inb(eth_nic_base+D8390_P1_CURR); - outb(eth_nic_base+D8390_P0_COMMAND, D8390_COMMAND_PS0); - if (curr == eth_memsize) curr=eth_tx_start + D8390_TXBUF_SIZE; - if (curr == bound) return(0); - if (eth_vendor == VENDOR_WD) { - if (eth_flags & FLAG_16BIT) { - outb(eth_asic_base + WD_LAAR, eth_laar | WD_LAAR_M16EN); - inb(0x84); - } - if (eth_flags & FLAG_790) { - outb(eth_asic_base + WD_MSR, WD_MSR_MENB); - inb(0x84); - } - inb(0x84); - } - pktoff = (bound << 8); - if (eth_flags & FLAG_PIO) - eth_pio_read(pktoff, &pkthdr, 4); - else - bcopy(eth_rmem + pktoff, &pkthdr, 4); - len = pkthdr.len - 4; /* sub CRC */ - pktoff += 4; - if (len > 1514) len = 1514; - bound = pkthdr.bound; /* New bound ptr */ - if ( (pkthdr.status & D8390_RSTAT_PRX) && (len > 14) && (len < 1518)) { - p = packet; - packetlen = len; - len = (eth_memsize << 8) - pktoff; - if (packetlen > len) { /* We have a wrap-around */ - if (eth_flags & FLAG_PIO) - eth_pio_read(pktoff, p, len); - else - bcopy(eth_rmem + pktoff, p, len); - pktoff = (eth_tx_start + D8390_TXBUF_SIZE) << 8; - p += len; - packetlen -= len; - } - if (eth_flags & FLAG_PIO) - eth_pio_read(pktoff, p, packetlen); - else - bcopy(eth_rmem + pktoff, p, packetlen); - - type = (packet[12]<<8) | packet[13]; - ret = 1; - } - if (eth_vendor == VENDOR_WD) { - if (eth_flags & FLAG_790) { - outb(eth_asic_base + WD_MSR, 0); - inb(0x84); - } - if (eth_flags & FLAG_16BIT) { - outb(eth_asic_base + WD_LAAR, eth_laar & - ~WD_LAAR_M16EN); - inb(0x84); - } - inb(0x84); - } - if (bound == (eth_tx_start + D8390_TXBUF_SIZE)) - bound = eth_memsize; - outb(eth_nic_base+D8390_P0_BOUND, bound-1); - if (ret && (type == ARP)) { - struct arprequest *arpreq; - unsigned long reqip; - arpreq = (struct arprequest *)&packet[ETHER_HDR_SIZE]; - convert_ipaddr(&reqip, arpreq->tipaddr); - if ((ntohs(arpreq->opcode) == ARP_REQUEST) && - (reqip == arptable[ARP_CLIENT].ipaddr)) { - arpreq->opcode = htons(ARP_REPLY); - bcopy(arpreq->sipaddr, arpreq->tipaddr, 4); - bcopy(arpreq->shwaddr, arpreq->thwaddr, 6); - bcopy(arptable[ARP_CLIENT].node, arpreq->shwaddr, 6); - convert_ipaddr(arpreq->sipaddr, &reqip); - eth_transmit(arpreq->thwaddr, ARP, sizeof(struct arprequest), - arpreq); - return(0); - } - } - return(ret); -no8390: -#endif /* 8390 */ -} - -#ifdef INCLUDE_NE -/************************************************************************** -NE1000/NE2000 Support Routines -***************************************************************************/ - -/* inw and outw are not needed more - standard version of them is used */ - -/************************************************************************** -ETH_PIO_READ - Read a frame via Programmed I/O -***************************************************************************/ -eth_pio_read(src, dst, cnt, init) -unsigned short src; -unsigned char *dst; -unsigned short cnt; -int init; -{ - if (cnt & 1) cnt++; - outb(eth_nic_base + D8390_P0_COMMAND, D8390_COMMAND_RD2 | - D8390_COMMAND_STA); - outb(eth_nic_base + D8390_P0_RBCR0, cnt); - outb(eth_nic_base + D8390_P0_RBCR1, cnt>>8); - outb(eth_nic_base + D8390_P0_RSAR0, src); - outb(eth_nic_base + D8390_P0_RSAR1, src>>8); - outb(eth_nic_base + D8390_P0_COMMAND, D8390_COMMAND_RD0 | - D8390_COMMAND_STA); - if (eth_flags & FLAG_16BIT) { - while (cnt) { - *((unsigned short *)dst) = inw(eth_asic_base + NE_DATA); - dst += 2; - cnt -= 2; - } - } - else { - while (cnt--) - *(dst++) = inb(eth_asic_base + NE_DATA); - } -} - -/************************************************************************** -ETH_PIO_WRITE - Write a frame via Programmed I/O -***************************************************************************/ -eth_pio_write(src, dst, cnt, init) -unsigned char *src; -unsigned short dst; -unsigned short cnt; -int init; -{ - outb(eth_nic_base + D8390_P0_COMMAND, D8390_COMMAND_RD2 | - D8390_COMMAND_STA); - outb(eth_nic_base + D8390_P0_ISR, D8390_ISR_RDC); - outb(eth_nic_base + D8390_P0_RBCR0, cnt); - outb(eth_nic_base + D8390_P0_RBCR1, cnt>>8); - outb(eth_nic_base + D8390_P0_RSAR0, dst); - outb(eth_nic_base + D8390_P0_RSAR1, dst>>8); - outb(eth_nic_base + D8390_P0_COMMAND, D8390_COMMAND_RD1 | - D8390_COMMAND_STA); - if (eth_flags & FLAG_16BIT) { - if (cnt & 1) cnt++; /* Round up */ - while (cnt) { - outw(eth_asic_base + NE_DATA, *((unsigned short *)src)); - src += 2; - cnt -= 2; - } - } - else { - while (cnt--) - outb(eth_asic_base + NE_DATA, *(src++)); - } - while((inb(eth_nic_base + D8390_P0_ISR) & D8390_ISR_RDC) - != D8390_ISR_RDC); -} -#else -/************************************************************************** -ETH_PIO_READ - Dummy routine when NE2000 not compiled in -***************************************************************************/ -eth_pio_read() { -} -#endif - diff --git a/sys/pc98/boot/netboot/ether.h b/sys/pc98/boot/netboot/ether.h deleted file mode 100644 index ae4d693..0000000 --- a/sys/pc98/boot/netboot/ether.h +++ /dev/null @@ -1,267 +0,0 @@ -/************************************************************************** -NETBOOT - BOOTP/TFTP Bootstrap Program - -Author: Martin Renters - Date: Jun/94 - -**************************************************************************/ - -#define TRUE 1 -#define FALSE 0 - -#define ETH_MIN_PACKET 64 -#define ETH_MAX_PACKET 1518 - -#define VENDOR_NONE 0 -#define VENDOR_WD 1 -#define VENDOR_NOVELL 2 -#define VENDOR_3COM 3 -#define VENDOR_3C509 4 - -#define FLAG_PIO 0x01 -#define FLAG_16BIT 0x02 -#define FLAG_790 0x04 - -#define MEM_8192 32 -#define MEM_16384 64 -#define MEM_32768 128 - -/************************************************************************** -Western Digital/SMC Board Definitions -**************************************************************************/ -#define WD_LOW_BASE 0x200 -#define WD_HIGH_BASE 0x3e0 -#ifndef WD_DEFAULT_MEM -#define WD_DEFAULT_MEM 0xD0000 -#endif -#define WD_NIC_ADDR 0x10 - -/************************************************************************** -Western Digital/SMC ASIC Addresses -**************************************************************************/ -#define WD_MSR 0x00 -#define WD_ICR 0x01 -#define WD_IAR 0x02 -#define WD_BIO 0x03 -#define WD_IRR 0x04 -#define WD_LAAR 0x05 -#define WD_IJR 0x06 -#define WD_GP2 0x07 -#define WD_LAR 0x08 -#define WD_BID 0x0E - -#define WD_ICR_16BIT 0x01 - -#define WD_MSR_MENB 0x40 - -#define WD_LAAR_L16EN 0x40 -#define WD_LAAR_M16EN 0x80 - -#define WD_SOFTCONFIG 0x20 - -/************************************************************************** -Western Digital/SMC Board Types -**************************************************************************/ -#define TYPE_WD8003S 0x02 -#define TYPE_WD8003E 0x03 -#define TYPE_WD8013EBT 0x05 -#define TYPE_WD8003W 0x24 -#define TYPE_WD8003EB 0x25 -#define TYPE_WD8013W 0x26 -#define TYPE_WD8013EP 0x27 -#define TYPE_WD8013WC 0x28 -#define TYPE_WD8013EPC 0x29 -#define TYPE_SMC8216T 0x2a -#define TYPE_SMC8216C 0x2b -#define TYPE_SMC8416T 0x00 /* Bogus entries: the 8416 generates the */ -#define TYPE_SMC8416C 0x00 /* the same codes as the 8216. */ -#define TYPE_SMC8013EBP 0x2c - -#ifdef INCLUDE_WD -struct wd_board { - char *name; - char id; - char flags; - char memsize; -} wd_boards[] = { - {"WD8003S", TYPE_WD8003S, 0, MEM_8192}, - {"WD8003E", TYPE_WD8003E, 0, MEM_8192}, - {"WD8013EBT", TYPE_WD8013EBT, FLAG_16BIT, MEM_16384}, - {"WD8003W", TYPE_WD8003W, 0, MEM_8192}, - {"WD8003EB", TYPE_WD8003EB, 0, MEM_8192}, - {"WD8013W", TYPE_WD8013W, FLAG_16BIT, MEM_16384}, - {"WD8003EP/WD8013EP", - TYPE_WD8013EP, 0, MEM_8192}, - {"WD8013WC", TYPE_WD8013WC, FLAG_16BIT, MEM_16384}, - {"WD8013EPC", TYPE_WD8013EPC, FLAG_16BIT, MEM_16384}, - {"SMC8216T", TYPE_SMC8216T, FLAG_16BIT | FLAG_790, MEM_16384}, - {"SMC8216C", TYPE_SMC8216C, FLAG_16BIT | FLAG_790, MEM_16384}, - {"SMC8416T", TYPE_SMC8416T, FLAG_16BIT | FLAG_790, MEM_8192}, - {"SMC8416C/BT", TYPE_SMC8416C, FLAG_16BIT | FLAG_790, MEM_8192}, - {"SMC8013EBP", TYPE_SMC8013EBP,FLAG_16BIT, MEM_16384}, - {NULL, 0, 0} -}; -#endif -/************************************************************************** -3com 3c503 definitions -**************************************************************************/ - -#ifndef _3COM_BASE -#define _3COM_BASE 0x300 -#endif - -#define _3COM_TX_PAGE_OFFSET_8BIT 0x20 -#define _3COM_TX_PAGE_OFFSET_16BIT 0x0 -#define _3COM_RX_PAGE_OFFSET_16BIT 0x20 - -#define _3COM_ASIC_OFFSET 0x400 -#define _3COM_NIC_OFFSET 0x0 - -#define _3COM_PSTR 0 -#define _3COM_PSPR 1 - -#define _3COM_BCFR 3 -#define _3COM_BCFR_2E0 0x01 -#define _3COM_BCFR_2A0 0x02 -#define _3COM_BCFR_280 0x04 -#define _3COM_BCFR_250 0x08 -#define _3COM_BCFR_350 0x10 -#define _3COM_BCFR_330 0x20 -#define _3COM_BCFR_310 0x40 -#define _3COM_BCFR_300 0x80 -#define _3COM_PCFR 4 -#define _3COM_PCFR_C8000 0x10 -#define _3COM_PCFR_CC000 0x20 -#define _3COM_PCFR_D8000 0x40 -#define _3COM_PCFR_DC000 0x80 -#define _3COM_CR 6 -#define _3COM_CR_RST 0x01 /* Reset GA and NIC */ -#define _3COM_CR_XSEL 0x02 /* Transceiver select. BNC=1(def) AUI=0 */ -#define _3COM_CR_EALO 0x04 /* window EA PROM 0-15 to I/O base */ -#define _3COM_CR_EAHI 0x08 /* window EA PROM 16-31 to I/O base */ -#define _3COM_CR_SHARE 0x10 /* select interrupt sharing option */ -#define _3COM_CR_DBSEL 0x20 /* Double buffer select */ -#define _3COM_CR_DDIR 0x40 /* DMA direction select */ -#define _3COM_CR_START 0x80 /* Start DMA controller */ -#define _3COM_GACFR 5 -#define _3COM_GACFR_MBS0 0x01 -#define _3COM_GACFR_MBS1 0x02 -#define _3COM_GACFR_MBS2 0x04 -#define _3COM_GACFR_RSEL 0x08 /* enable shared memory */ -#define _3COM_GACFR_TEST 0x10 /* for GA testing */ -#define _3COM_GACFR_OWS 0x20 /* select 0WS access to GA */ -#define _3COM_GACFR_TCM 0x40 /* Mask DMA interrupts */ -#define _3COM_GACFR_NIM 0x80 /* Mask NIC interrupts */ -#define _3COM_STREG 7 -#define _3COM_STREG_REV 0x07 /* GA revision */ -#define _3COM_STREG_DIP 0x08 /* DMA in progress */ -#define _3COM_STREG_DTC 0x10 /* DMA terminal count */ -#define _3COM_STREG_OFLW 0x20 /* Overflow */ -#define _3COM_STREG_UFLW 0x40 /* Underflow */ -#define _3COM_STREG_DPRDY 0x80 /* Data port ready */ -#define _3COM_IDCFR 8 -#define _3COM_IDCFR_DRQ0 0x01 /* DMA request 1 select */ -#define _3COM_IDCFR_DRQ1 0x02 /* DMA request 2 select */ -#define _3COM_IDCFR_DRQ2 0x04 /* DMA request 3 select */ -#define _3COM_IDCFR_UNUSED 0x08 /* not used */ -#define _3COM_IDCFR_IRQ2 0x10 /* Interrupt request 2 select */ -#define _3COM_IDCFR_IRQ3 0x20 /* Interrupt request 3 select */ -#define _3COM_IDCFR_IRQ4 0x40 /* Interrupt request 4 select */ -#define _3COM_IDCFR_IRQ5 0x80 /* Interrupt request 5 select */ -#define _3COM_IRQ2 2 -#define _3COM_IRQ3 3 -#define _3COM_IRQ4 4 -#define _3COM_IRQ5 5 -#define _3COM_DAMSB 9 -#define _3COM_DALSB 0x0a -#define _3COM_VPTR2 0x0b -#define _3COM_VPTR1 0x0c -#define _3COM_VPTR0 0x0d -#define _3COM_RFMSB 0x0e -#define _3COM_RFLSB 0x0f - -/************************************************************************** -NE1000/2000 definitions -**************************************************************************/ -#ifndef NE_BASE -#define NE_BASE 0x320 -#endif -#ifdef PC98 -#define NE_ASIC_OFFSET 0x00 -#define NE_RESET 0x300 /* Used to reset card */ -#define NE_DATA 0x200 /* Used to read/write NIC mem */ -#else -#define NE_ASIC_OFFSET 0x10 -#define NE_RESET 0x0F /* Used to reset card */ -#define NE_DATA 0x00 /* Used to read/write NIC mem */ -#endif -/************************************************************************** -8390 Register Definitions -**************************************************************************/ -#define D8390_P0_COMMAND 0x00 -#define D8390_P0_PSTART 0x01 -#define D8390_P0_PSTOP 0x02 -#define D8390_P0_BOUND 0x03 -#define D8390_P0_TSR 0x04 -#define D8390_P0_TPSR 0x04 -#define D8390_P0_TBCR0 0x05 -#define D8390_P0_TBCR1 0x06 -#define D8390_P0_ISR 0x07 -#define D8390_P0_RSAR0 0x08 -#define D8390_P0_RSAR1 0x09 -#define D8390_P0_RBCR0 0x0A -#define D8390_P0_RBCR1 0x0B -#define D8390_P0_RSR 0x0C -#define D8390_P0_RCR 0x0C -#define D8390_P0_TCR 0x0D -#define D8390_P0_DCR 0x0E -#define D8390_P0_IMR 0x0F -#define D8390_P1_COMMAND 0x00 -#define D8390_P1_PAR0 0x01 -#define D8390_P1_PAR1 0x02 -#define D8390_P1_PAR2 0x03 -#define D8390_P1_PAR3 0x04 -#define D8390_P1_PAR4 0x05 -#define D8390_P1_PAR5 0x06 -#define D8390_P1_CURR 0x07 -#define D8390_P1_MAR0 0x08 - -#define D8390_COMMAND_PS0 0x0 /* Page 0 select */ -#define D8390_COMMAND_PS1 0x40 /* Page 1 select */ -#define D8390_COMMAND_PS2 0x80 /* Page 2 select */ -#define D8390_COMMAND_RD2 0x20 /* Remote DMA control */ -#define D8390_COMMAND_RD1 0x10 -#define D8390_COMMAND_RD0 0x08 -#define D8390_COMMAND_TXP 0x04 /* transmit packet */ -#define D8390_COMMAND_STA 0x02 /* start */ -#define D8390_COMMAND_STP 0x01 /* stop */ - -#define D8390_RCR_MON 0x20 /* monitor mode */ - -#define D8390_DCR_FT1 0x40 -#define D8390_DCR_LS 0x08 /* Loopback select */ -#define D8390_DCR_WTS 0x01 /* Word transfer select */ - -#define D8390_ISR_PRX 0x01 /* successful recv */ -#define D8390_ISR_PTX 0x02 /* successful xmit */ -#define D8390_ISR_RXE 0x04 /* receive error */ -#define D8390_ISR_TXE 0x08 /* transmit error */ -#define D8390_ISR_OVW 0x10 /* Overflow */ -#define D8390_ISR_CNT 0x20 /* Counter overflow */ -#define D8390_ISR_RDC 0x40 /* Remote DMA complete */ -#define D8390_ISR_RST 0x80 /* reset */ - -#define D8390_RSTAT_PRX 0x01 /* successful recv */ -#define D8390_RSTAT_CRC 0x02 /* CRC error */ -#define D8390_RSTAT_FAE 0x04 /* Frame alignment error */ -#define D8390_RSTAT_OVER 0x08 /* overflow */ - -#define D8390_TXBUF_SIZE 6 -#define D8390_RXBUF_END 32 -#define D8390_PAGE_SIZE 256 - -struct ringbuffer { - unsigned char status; - unsigned char bound; - unsigned short len; -}; |