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| author | yongari <yongari@FreeBSD.org> | 2010-03-16 17:45:16 +0000 |
|---|---|---|
| committer | yongari <yongari@FreeBSD.org> | 2010-03-16 17:45:16 +0000 |
| commit | 61b55f12a23899ec936af095b7b050085cf02e8d (patch) | |
| tree | 6d3fd8d86d95de7cad97e2498054365d9b2533cf | |
| parent | 9654d2534603fd39e69cb4f621463cb0888e3bce (diff) | |
| download | FreeBSD-src-61b55f12a23899ec936af095b7b050085cf02e8d.zip FreeBSD-src-61b55f12a23899ec936af095b7b050085cf02e8d.tar.gz | |
Revert r205090.
It's hard to know when the mail box register write will get flushed to
the hardware and it may take longer.
Pointed out by: scottl
| -rw-r--r-- | sys/dev/bge/if_bge.c | 32 |
1 files changed, 16 insertions, 16 deletions
diff --git a/sys/dev/bge/if_bge.c b/sys/dev/bge/if_bge.c index 679d202..b21fd72 100644 --- a/sys/dev/bge/if_bge.c +++ b/sys/dev/bge/if_bge.c @@ -3654,22 +3654,6 @@ bge_intr(void *xsc) #endif /* - * Do the mandatory PCI flush as well as get the link status. - */ - statusword = CSR_READ_4(sc, BGE_MAC_STS) & BGE_MACSTAT_LINK_CHANGED; - - /* Make sure the descriptor ring indexes are coherent. */ - bus_dmamap_sync(sc->bge_cdata.bge_status_tag, - sc->bge_cdata.bge_status_map, - BUS_DMASYNC_POSTREAD | BUS_DMASYNC_POSTWRITE); - rx_prod = sc->bge_ldata.bge_status_block->bge_idx[0].bge_rx_prod_idx; - tx_cons = sc->bge_ldata.bge_status_block->bge_idx[0].bge_tx_cons_idx; - sc->bge_ldata.bge_status_block->bge_status = 0; - bus_dmamap_sync(sc->bge_cdata.bge_status_tag, - sc->bge_cdata.bge_status_map, - BUS_DMASYNC_PREREAD | BUS_DMASYNC_PREWRITE); - - /* * Ack the interrupt by writing something to BGE_MBX_IRQ0_LO. Don't * disable interrupts by writing nonzero like we used to, since with * our current organization this just gives complications and @@ -3691,6 +3675,22 @@ bge_intr(void *xsc) */ bge_writembx(sc, BGE_MBX_IRQ0_LO, 0); + /* + * Do the mandatory PCI flush as well as get the link status. + */ + statusword = CSR_READ_4(sc, BGE_MAC_STS) & BGE_MACSTAT_LINK_CHANGED; + + /* Make sure the descriptor ring indexes are coherent. */ + bus_dmamap_sync(sc->bge_cdata.bge_status_tag, + sc->bge_cdata.bge_status_map, + BUS_DMASYNC_POSTREAD | BUS_DMASYNC_POSTWRITE); + rx_prod = sc->bge_ldata.bge_status_block->bge_idx[0].bge_rx_prod_idx; + tx_cons = sc->bge_ldata.bge_status_block->bge_idx[0].bge_tx_cons_idx; + sc->bge_ldata.bge_status_block->bge_status = 0; + bus_dmamap_sync(sc->bge_cdata.bge_status_tag, + sc->bge_cdata.bge_status_map, + BUS_DMASYNC_PREREAD | BUS_DMASYNC_PREWRITE); + if ((sc->bge_asicrev == BGE_ASICREV_BCM5700 && sc->bge_chipid != BGE_CHIPID_BCM5700_B2) || statusword || sc->bge_link_evt) |
