diff options
| author | asmodai <asmodai@FreeBSD.org> | 2000-11-08 12:00:05 +0000 |
|---|---|---|
| committer | asmodai <asmodai@FreeBSD.org> | 2000-11-08 12:00:05 +0000 |
| commit | 4635a4076c9eaed12635a1bf8bfccf6df4fab65a (patch) | |
| tree | da57626ad0e2ff9af1e5ec2b7c0dafce6bdead74 | |
| parent | 7c7cfd2165b77dd35eaff92f5f300656501c8258 (diff) | |
| download | FreeBSD-src-4635a4076c9eaed12635a1bf8bfccf6df4fab65a.zip FreeBSD-src-4635a4076c9eaed12635a1bf8bfccf6df4fab65a.tar.gz | |
Fix some further english grammar and typo's.
| -rw-r--r-- | sys/amd64/amd64/initcpu.c | 6 | ||||
| -rw-r--r-- | sys/i386/i386/initcpu.c | 6 |
2 files changed, 6 insertions, 6 deletions
diff --git a/sys/amd64/amd64/initcpu.c b/sys/amd64/amd64/initcpu.c index dbdd3d5..b42c234 100644 --- a/sys/amd64/amd64/initcpu.c +++ b/sys/amd64/amd64/initcpu.c @@ -553,13 +553,13 @@ initializecpu(void) #if defined(PC98) && !defined(CPU_UPGRADE_HW_CACHE) /* - * OS should flush L1 cahce by itself because no PC-98 supports + * OS should flush L1 cache by itself because no PC-98 supports * non-Intel CPUs. Use wbinvd instruction before DMA transfer * when need_pre_dma_flush = 1, use invd instruction after DMA * transfer when need_post_dma_flush = 1. If your CPU upgrade - * product support hardware cache control, you can add + * product supports hardware cache control, you can add the * CPU_UPGRADE_HW_CACHE option in your kernel configuration file. - * This option elminate unneeded cache flush instruction. + * This option eliminates unneeded cache flush instruction(s). */ if (strcmp(cpu_vendor, "CyrixInstead") == 0) { switch (cpu) { diff --git a/sys/i386/i386/initcpu.c b/sys/i386/i386/initcpu.c index dbdd3d5..b42c234 100644 --- a/sys/i386/i386/initcpu.c +++ b/sys/i386/i386/initcpu.c @@ -553,13 +553,13 @@ initializecpu(void) #if defined(PC98) && !defined(CPU_UPGRADE_HW_CACHE) /* - * OS should flush L1 cahce by itself because no PC-98 supports + * OS should flush L1 cache by itself because no PC-98 supports * non-Intel CPUs. Use wbinvd instruction before DMA transfer * when need_pre_dma_flush = 1, use invd instruction after DMA * transfer when need_post_dma_flush = 1. If your CPU upgrade - * product support hardware cache control, you can add + * product supports hardware cache control, you can add the * CPU_UPGRADE_HW_CACHE option in your kernel configuration file. - * This option elminate unneeded cache flush instruction. + * This option eliminates unneeded cache flush instruction(s). */ if (strcmp(cpu_vendor, "CyrixInstead") == 0) { switch (cpu) { |
