diff options
author | ats <ats@FreeBSD.org> | 1995-01-07 17:26:35 +0000 |
---|---|---|
committer | ats <ats@FreeBSD.org> | 1995-01-07 17:26:35 +0000 |
commit | 30924ed3430549242745360a43d264e6e5b73802 (patch) | |
tree | c18150e6b6bd0f98f1ecac96a03b1844a4804a76 | |
parent | 6262d512a487c3ecf0cb976abea384dde92b5ba1 (diff) | |
download | FreeBSD-src-30924ed3430549242745360a43d264e6e5b73802.zip FreeBSD-src-30924ed3430549242745360a43d264e6e5b73802.tar.gz |
Work around a compiler bug in gcc2.6.3 in handling (long long) variables and
shifting. Also correct the original code as Garrett noticed it in mail.
Leave the mishandled code in to use it later if future versions of gcc
are correct. The code was part of the calibrate_cyclecounter routine to
get the speed of the pentium chip.
-rw-r--r-- | sys/amd64/amd64/tsc.c | 27 | ||||
-rw-r--r-- | sys/amd64/isa/clock.c | 27 | ||||
-rw-r--r-- | sys/i386/i386/tsc.c | 27 | ||||
-rw-r--r-- | sys/i386/isa/clock.c | 27 | ||||
-rw-r--r-- | sys/isa/atrtc.c | 27 |
5 files changed, 120 insertions, 15 deletions
diff --git a/sys/amd64/amd64/tsc.c b/sys/amd64/amd64/tsc.c index c865514..95bef69 100644 --- a/sys/amd64/amd64/tsc.c +++ b/sys/amd64/amd64/tsc.c @@ -34,7 +34,7 @@ * SUCH DAMAGE. * * from: @(#)clock.c 7.2 (Berkeley) 5/12/91 - * $Id: clock.c,v 1.28 1994/11/12 16:24:54 ache Exp $ + * $Id: clock.c,v 1.29 1994/12/30 12:43:34 bde Exp $ */ /* @@ -292,9 +292,30 @@ calibrate_cyclecounter(void) * This assumes that you will never have a clock rate higher * than 4GHz, probably a good assumption. */ - cycles_per_sec = (long long)edx + eax; - cycles_per_sec -= (long long)lastedx + lasteax; + /* The following C code is correct, but our current gcc 2.6.3 + * seems to produce bad assembly code for it , ATS , XXXX */ +#if 0 + cycles_per_sec = ((long long)edx << 32) + eax; + cycles_per_sec -= ((long long)lastedx << 32) + lasteax; pentium_mhz = ((long)cycles_per_sec + 500000) / 1000000; /* round up */ +#else + /* produce a workaround for the code above */ + { + union { + long long extralong; + long shorty[2]; + } tmp; + + tmp.shorty[0] = eax; + tmp.shorty[1] = edx; + cycles_per_sec = tmp.extralong; + tmp.shorty[0] = lasteax; + tmp.shorty[1] = lastedx; + cycles_per_sec -= tmp.extralong; + /* round up */ + pentium_mhz = (long) ((cycles_per_sec + 500000) / 1000000); + } +#endif } #endif diff --git a/sys/amd64/isa/clock.c b/sys/amd64/isa/clock.c index c865514..95bef69 100644 --- a/sys/amd64/isa/clock.c +++ b/sys/amd64/isa/clock.c @@ -34,7 +34,7 @@ * SUCH DAMAGE. * * from: @(#)clock.c 7.2 (Berkeley) 5/12/91 - * $Id: clock.c,v 1.28 1994/11/12 16:24:54 ache Exp $ + * $Id: clock.c,v 1.29 1994/12/30 12:43:34 bde Exp $ */ /* @@ -292,9 +292,30 @@ calibrate_cyclecounter(void) * This assumes that you will never have a clock rate higher * than 4GHz, probably a good assumption. */ - cycles_per_sec = (long long)edx + eax; - cycles_per_sec -= (long long)lastedx + lasteax; + /* The following C code is correct, but our current gcc 2.6.3 + * seems to produce bad assembly code for it , ATS , XXXX */ +#if 0 + cycles_per_sec = ((long long)edx << 32) + eax; + cycles_per_sec -= ((long long)lastedx << 32) + lasteax; pentium_mhz = ((long)cycles_per_sec + 500000) / 1000000; /* round up */ +#else + /* produce a workaround for the code above */ + { + union { + long long extralong; + long shorty[2]; + } tmp; + + tmp.shorty[0] = eax; + tmp.shorty[1] = edx; + cycles_per_sec = tmp.extralong; + tmp.shorty[0] = lasteax; + tmp.shorty[1] = lastedx; + cycles_per_sec -= tmp.extralong; + /* round up */ + pentium_mhz = (long) ((cycles_per_sec + 500000) / 1000000); + } +#endif } #endif diff --git a/sys/i386/i386/tsc.c b/sys/i386/i386/tsc.c index c865514..95bef69 100644 --- a/sys/i386/i386/tsc.c +++ b/sys/i386/i386/tsc.c @@ -34,7 +34,7 @@ * SUCH DAMAGE. * * from: @(#)clock.c 7.2 (Berkeley) 5/12/91 - * $Id: clock.c,v 1.28 1994/11/12 16:24:54 ache Exp $ + * $Id: clock.c,v 1.29 1994/12/30 12:43:34 bde Exp $ */ /* @@ -292,9 +292,30 @@ calibrate_cyclecounter(void) * This assumes that you will never have a clock rate higher * than 4GHz, probably a good assumption. */ - cycles_per_sec = (long long)edx + eax; - cycles_per_sec -= (long long)lastedx + lasteax; + /* The following C code is correct, but our current gcc 2.6.3 + * seems to produce bad assembly code for it , ATS , XXXX */ +#if 0 + cycles_per_sec = ((long long)edx << 32) + eax; + cycles_per_sec -= ((long long)lastedx << 32) + lasteax; pentium_mhz = ((long)cycles_per_sec + 500000) / 1000000; /* round up */ +#else + /* produce a workaround for the code above */ + { + union { + long long extralong; + long shorty[2]; + } tmp; + + tmp.shorty[0] = eax; + tmp.shorty[1] = edx; + cycles_per_sec = tmp.extralong; + tmp.shorty[0] = lasteax; + tmp.shorty[1] = lastedx; + cycles_per_sec -= tmp.extralong; + /* round up */ + pentium_mhz = (long) ((cycles_per_sec + 500000) / 1000000); + } +#endif } #endif diff --git a/sys/i386/isa/clock.c b/sys/i386/isa/clock.c index c865514..95bef69 100644 --- a/sys/i386/isa/clock.c +++ b/sys/i386/isa/clock.c @@ -34,7 +34,7 @@ * SUCH DAMAGE. * * from: @(#)clock.c 7.2 (Berkeley) 5/12/91 - * $Id: clock.c,v 1.28 1994/11/12 16:24:54 ache Exp $ + * $Id: clock.c,v 1.29 1994/12/30 12:43:34 bde Exp $ */ /* @@ -292,9 +292,30 @@ calibrate_cyclecounter(void) * This assumes that you will never have a clock rate higher * than 4GHz, probably a good assumption. */ - cycles_per_sec = (long long)edx + eax; - cycles_per_sec -= (long long)lastedx + lasteax; + /* The following C code is correct, but our current gcc 2.6.3 + * seems to produce bad assembly code for it , ATS , XXXX */ +#if 0 + cycles_per_sec = ((long long)edx << 32) + eax; + cycles_per_sec -= ((long long)lastedx << 32) + lasteax; pentium_mhz = ((long)cycles_per_sec + 500000) / 1000000; /* round up */ +#else + /* produce a workaround for the code above */ + { + union { + long long extralong; + long shorty[2]; + } tmp; + + tmp.shorty[0] = eax; + tmp.shorty[1] = edx; + cycles_per_sec = tmp.extralong; + tmp.shorty[0] = lasteax; + tmp.shorty[1] = lastedx; + cycles_per_sec -= tmp.extralong; + /* round up */ + pentium_mhz = (long) ((cycles_per_sec + 500000) / 1000000); + } +#endif } #endif diff --git a/sys/isa/atrtc.c b/sys/isa/atrtc.c index c865514..95bef69 100644 --- a/sys/isa/atrtc.c +++ b/sys/isa/atrtc.c @@ -34,7 +34,7 @@ * SUCH DAMAGE. * * from: @(#)clock.c 7.2 (Berkeley) 5/12/91 - * $Id: clock.c,v 1.28 1994/11/12 16:24:54 ache Exp $ + * $Id: clock.c,v 1.29 1994/12/30 12:43:34 bde Exp $ */ /* @@ -292,9 +292,30 @@ calibrate_cyclecounter(void) * This assumes that you will never have a clock rate higher * than 4GHz, probably a good assumption. */ - cycles_per_sec = (long long)edx + eax; - cycles_per_sec -= (long long)lastedx + lasteax; + /* The following C code is correct, but our current gcc 2.6.3 + * seems to produce bad assembly code for it , ATS , XXXX */ +#if 0 + cycles_per_sec = ((long long)edx << 32) + eax; + cycles_per_sec -= ((long long)lastedx << 32) + lasteax; pentium_mhz = ((long)cycles_per_sec + 500000) / 1000000; /* round up */ +#else + /* produce a workaround for the code above */ + { + union { + long long extralong; + long shorty[2]; + } tmp; + + tmp.shorty[0] = eax; + tmp.shorty[1] = edx; + cycles_per_sec = tmp.extralong; + tmp.shorty[0] = lasteax; + tmp.shorty[1] = lastedx; + cycles_per_sec -= tmp.extralong; + /* round up */ + pentium_mhz = (long) ((cycles_per_sec + 500000) / 1000000); + } +#endif } #endif |