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| author | yongari <yongari@FreeBSD.org> | 2008-12-08 02:48:41 +0000 |
|---|---|---|
| committer | yongari <yongari@FreeBSD.org> | 2008-12-08 02:48:41 +0000 |
| commit | 2734248c1de9552653b4af39fd65920d61f33784 (patch) | |
| tree | 33d97ea10b04a11c298ffef1e02ceedf83bafcd1 | |
| parent | 7a058f6255a4edc2a6de51beaf5f9c2abf10d141 (diff) | |
| download | FreeBSD-src-2734248c1de9552653b4af39fd65920d61f33784.zip FreeBSD-src-2734248c1de9552653b4af39fd65920d61f33784.tar.gz | |
Reduce spin wait time consumed in GMII register access routines.
Waiting for 1ms for each GMII register access looks overkill and it
may also decrease overall performance of driver because re(4)
invokes mii_tick for every hz.
Tested by: rpaulo
| -rw-r--r-- | sys/dev/re/if_re.c | 6 |
1 files changed, 2 insertions, 4 deletions
diff --git a/sys/dev/re/if_re.c b/sys/dev/re/if_re.c index 8b898f8..e93dff0 100644 --- a/sys/dev/re/if_re.c +++ b/sys/dev/re/if_re.c @@ -417,13 +417,12 @@ re_gmii_readreg(device_t dev, int phy, int reg) } CSR_WRITE_4(sc, RL_PHYAR, reg << 16); - DELAY(1000); for (i = 0; i < RL_TIMEOUT; i++) { + DELAY(30); rval = CSR_READ_4(sc, RL_PHYAR); if (rval & RL_PHYAR_BUSY) break; - DELAY(100); } if (i == RL_TIMEOUT) { @@ -445,13 +444,12 @@ re_gmii_writereg(device_t dev, int phy, int reg, int data) CSR_WRITE_4(sc, RL_PHYAR, (reg << 16) | (data & RL_PHYAR_PHYDATA) | RL_PHYAR_BUSY); - DELAY(1000); for (i = 0; i < RL_TIMEOUT; i++) { + DELAY(30); rval = CSR_READ_4(sc, RL_PHYAR); if (!(rval & RL_PHYAR_BUSY)) break; - DELAY(100); } if (i == RL_TIMEOUT) { |
