diff options
| author | dg <dg@FreeBSD.org> | 1994-08-04 17:42:35 +0000 |
|---|---|---|
| committer | dg <dg@FreeBSD.org> | 1994-08-04 17:42:35 +0000 |
| commit | 21785a3b44e446b73d0193ab7b93d035f6ac3cac (patch) | |
| tree | ea85b2d08510ee16dec548691266c341035b6344 | |
| parent | d746eaf05aaac7ee135b481f7f82c3d61fa4106d (diff) | |
| download | FreeBSD-src-21785a3b44e446b73d0193ab7b93d035f6ac3cac.zip FreeBSD-src-21785a3b44e446b73d0193ab7b93d035f6ac3cac.tar.gz | |
Updated to include improvements from FreeBSD 1.1.5. Fixed brokeness
with multicast support and BPF.
| -rw-r--r-- | sys/dev/ed/if_ed.c | 1530 | ||||
| -rw-r--r-- | sys/dev/ed/if_edreg.h | 16 | ||||
| -rw-r--r-- | sys/i386/isa/if_ed.c | 1530 | ||||
| -rw-r--r-- | sys/i386/isa/if_edreg.h | 16 |
4 files changed, 1806 insertions, 1286 deletions
diff --git a/sys/dev/ed/if_ed.c b/sys/dev/ed/if_ed.c index 572cc1f..77352a5 100644 --- a/sys/dev/ed/if_ed.c +++ b/sys/dev/ed/if_ed.c @@ -13,7 +13,7 @@ * the SMC Elite Ultra (8216), the 3Com 3c503, the NE1000 and NE2000, * and a variety of similar clones. * - * $Id: if_ed.c,v 1.38 1994/05/25 08:59:02 rgrimes Exp $ + * $Id: if_ed.c,v 1.39 1994/08/02 07:39:28 davidg Exp $ */ #include "ed.h" @@ -62,67 +62,75 @@ #ifndef IFF_ALTPHYS #define IFF_ALTPHYS IFF_LINK0 #endif - + /* * ed_softc: per line info and status */ -struct ed_softc { - struct arpcom arpcom; /* ethernet common */ +struct ed_softc { + struct arpcom arpcom; /* ethernet common */ - char *type_str; /* pointer to type string */ - u_char vendor; /* interface vendor */ - u_char type; /* interface type code */ + char *type_str; /* pointer to type string */ + u_char vendor; /* interface vendor */ + u_char type; /* interface type code */ - u_short asic_addr; /* ASIC I/O bus address */ - u_short nic_addr; /* NIC (DS8390) I/O bus address */ + u_short asic_addr; /* ASIC I/O bus address */ + u_short nic_addr; /* NIC (DS8390) I/O bus address */ /* * The following 'proto' variable is part of a work-around for 8013EBT asics * being write-only. It's sort of a prototype/shadow of the real thing. */ - u_char wd_laar_proto; - u_char isa16bit; /* width of access to card 0=8 or 1=16 */ - int is790; /* set by the probe code if the card is 790 based */ - - caddr_t bpf; /* BPF "magic cookie" */ - caddr_t mem_start; /* NIC memory start address */ - caddr_t mem_end; /* NIC memory end address */ - u_long mem_size; /* total NIC memory size */ - caddr_t mem_ring; /* start of RX ring-buffer (in NIC mem) */ - - u_char mem_shared; /* NIC memory is shared with host */ - u_char xmit_busy; /* transmitter is busy */ - u_char txb_cnt; /* number of transmit buffers */ - u_char txb_inuse; /* number of TX buffers currently in-use*/ - - u_char txb_new; /* pointer to where new buffer will be added */ - u_char txb_next_tx; /* pointer to next buffer ready to xmit */ - u_short txb_len[8]; /* buffered xmit buffer lengths */ - u_char tx_page_start; /* first page of TX buffer area */ - u_char rec_page_start; /* first page of RX ring-buffer */ - u_char rec_page_stop; /* last page of RX ring-buffer */ - u_char next_packet; /* pointer to next unread RX packet */ -} ed_softc[NED]; - -int ed_attach(struct isa_device *); -void ed_init(int); -void edintr(int); -int ed_ioctl(struct ifnet *, int, caddr_t); -int ed_probe(struct isa_device *); -void ed_start(struct ifnet *); -void ed_reset(int); -void ed_watchdog(int); - -static void ed_get_packet(struct ed_softc *, char *, int /*u_short*/); + u_char wd_laar_proto; + u_char isa16bit; /* width of access to card 0=8 or 1=16 */ + int is790; /* set by the probe code if the card is 790 + * based */ + + caddr_t bpf; /* BPF "magic cookie" */ + caddr_t mem_start; /* NIC memory start address */ + caddr_t mem_end; /* NIC memory end address */ + u_long mem_size; /* total NIC memory size */ + caddr_t mem_ring; /* start of RX ring-buffer (in NIC mem) */ + + u_char mem_shared; /* NIC memory is shared with host */ + u_char xmit_busy; /* transmitter is busy */ + u_char txb_cnt; /* number of transmit buffers */ + u_char txb_inuse; /* number of TX buffers currently in-use */ + + u_char txb_new; /* pointer to where new buffer will be added */ + u_char txb_next_tx; /* pointer to next buffer ready to xmit */ + u_short txb_len[8]; /* buffered xmit buffer lengths */ + u_char tx_page_start; /* first page of TX buffer area */ + u_char rec_page_start; /* first page of RX ring-buffer */ + u_char rec_page_stop; /* last page of RX ring-buffer */ + u_char next_packet; /* pointer to next unread RX packet */ +} ed_softc[NED]; + +int ed_attach(struct isa_device *); +void ed_init(int); +void edintr(int); +int ed_ioctl(struct ifnet *, int, caddr_t); +int ed_probe(struct isa_device *); +void ed_start(struct ifnet *); +void ed_reset(int); +void ed_watchdog(int); + +#ifdef MULTICAST +void ds_getmcaf(); + +#endif + +static void ed_get_packet(struct ed_softc *, char *, int /* u_short */ , int); static void ed_stop(int); static inline void ed_rint(); static inline void ed_xmit(); static inline char *ed_ring_copy(); -void ed_pio_readmem(), ed_pio_writemem(); +void ed_pio_readmem(), ed_pio_writemem(); u_short ed_pio_write_mbufs(); +void ed_setrcr(struct ifnet *, struct ed_softc *); + extern int ether_output(); struct trailer_header { @@ -135,7 +143,8 @@ struct isa_driver eddriver = { ed_attach, "ed" }; -/* + +/* * Interrupt conversion table for WD/SMC ASIC * (IRQ* are defined in icu.h) */ @@ -149,7 +158,7 @@ static unsigned short ed_intr_mask[] = { IRQ15, IRQ4 }; - + /* * Interrupt conversion table for 585/790 Combo */ @@ -163,6 +172,7 @@ static unsigned short ed_790_intr_mask[] = { IRQ11, IRQ15 }; + #define ETHER_MIN_LEN 64 #define ETHER_MAX_LEN 1518 #define ETHER_ADDR_LEN 6 @@ -182,7 +192,7 @@ ed_probe(isa_dev) struct isa_device *isa_dev; { struct ed_softc *sc = &ed_softc[isa_dev->id_unit]; - int nports; + int nports; if (nports = ed_probe_WD80x3(isa_dev)) return (nports); @@ -193,7 +203,7 @@ ed_probe(isa_dev) if (nports = ed_probe_Novell(isa_dev)) return (nports); - return(0); + return (0); } /* @@ -216,7 +226,7 @@ ed_probe(isa_dev) * the others would require changing register pages (which would be * intrusive if this isn't an 8390). * - * Return 1 if 8390 was found, 0 if not. + * Return 1 if 8390 was found, 0 if not. */ int @@ -224,15 +234,15 @@ ed_probe_generic8390(sc) struct ed_softc *sc; { if ((inb(sc->nic_addr + ED_P0_CR) & - (ED_CR_RD2|ED_CR_TXP|ED_CR_STA|ED_CR_STP)) != - (ED_CR_RD2|ED_CR_STP)) + (ED_CR_RD2 | ED_CR_TXP | ED_CR_STA | ED_CR_STP)) != + (ED_CR_RD2 | ED_CR_STP)) return (0); if ((inb(sc->nic_addr + ED_P0_ISR) & ED_ISR_RST) != ED_ISR_RST) return (0); - return(1); + return (1); } - + /* * Probe and vendor-specific initialization routine for SMC/WD80x3 boards */ @@ -241,9 +251,9 @@ ed_probe_WD80x3(isa_dev) struct isa_device *isa_dev; { struct ed_softc *sc = &ed_softc[isa_dev->id_unit]; - int i; - u_int memsize; - u_char iptr, isa16bit, sum; + int i; + u_int memsize; + u_char iptr, isa16bit, sum; sc->asic_addr = isa_dev->id_iobase; sc->nic_addr = sc->asic_addr + ED_WD_NIC_OFFSET; @@ -253,26 +263,27 @@ ed_probe_WD80x3(isa_dev) outb(sc->asic_addr + ED_WD_MSR, ED_WD_MSR_POW); DELAY(10000); #endif + /* - * Attempt to do a checksum over the station address PROM. - * If it fails, it's probably not a SMC/WD board. There - * is a problem with this, though: some clone WD boards - * don't pass the checksum test. Danpex boards for one. + * Attempt to do a checksum over the station address PROM. If it + * fails, it's probably not a SMC/WD board. There is a problem with + * this, though: some clone WD boards don't pass the checksum test. + * Danpex boards for one. */ for (sum = 0, i = 0; i < 8; ++i) sum += inb(sc->asic_addr + ED_WD_PROM + i); if (sum != ED_WD_ROM_CHECKSUM_TOTAL) { + /* - * Checksum is invalid. This often happens with cheap - * WD8003E clones. In this case, the checksum byte - * (the eighth byte) seems to always be zero. + * Checksum is invalid. This often happens with cheap WD8003E + * clones. In this case, the checksum byte (the eighth byte) + * seems to always be zero. */ if (inb(sc->asic_addr + ED_WD_CARD_ID) != ED_TYPE_WD8003E || inb(sc->asic_addr + ED_WD_PROM + 7) != 0) - return(0); + return (0); } - /* reset card to force it into a known state. */ #ifdef TOSH_ETHER outb(sc->asic_addr + ED_WD_MSR, ED_WD_MSR_RST | ED_WD_MSR_POW); @@ -315,7 +326,7 @@ ed_probe_WD80x3(isa_dev) memsize = 16384; isa16bit = 1; break; - case ED_TYPE_WD8013EP: /* also WD8003EP */ + case ED_TYPE_WD8013EP: /* also WD8003EP */ if (inb(sc->asic_addr + ED_WD_ICR) & ED_WD_ICR_16BIT) { isa16bit = 1; @@ -368,33 +379,35 @@ ed_probe_WD80x3(isa_dev) sc->type_str = ""; break; } + /* - * Make some adjustments to initial values depending on what is - * found in the ICR. + * Make some adjustments to initial values depending on what is found + * in the ICR. */ if (isa16bit && (sc->type != ED_TYPE_WD8013EBT) #ifdef TOSH_ETHER - && (sc->type != ED_TYPE_TOSHIBA1) && (sc->type != ED_TYPE_TOSHIBA4) + && (sc->type != ED_TYPE_TOSHIBA1) && (sc->type != ED_TYPE_TOSHIBA4) #endif && ((inb(sc->asic_addr + ED_WD_ICR) & ED_WD_ICR_16BIT) == 0)) { isa16bit = 0; memsize = 8192; } - #if ED_DEBUG printf("type = %x type_str=%s isa16bit=%d memsize=%d id_msize=%d\n", - sc->type,sc->type_str,isa16bit,memsize,isa_dev->id_msize); - for (i=0; i<8; i++) + sc->type, sc->type_str, isa16bit, memsize, isa_dev->id_msize); + for (i = 0; i < 8; i++) printf("%x -> %x\n", i, inb(sc->asic_addr + i)); #endif + /* * Allow the user to override the autoconfiguration */ if (isa_dev->id_msize) memsize = isa_dev->id_msize; + /* - * (note that if the user specifies both of the following flags - * that '8bit' mode intentionally has precedence) + * (note that if the user specifies both of the following flags that + * '8bit' mode intentionally has precedence) */ if (isa_dev->id_flags & ED_FLAGS_FORCE_16BIT_MODE) isa16bit = 1; @@ -403,60 +416,66 @@ ed_probe_WD80x3(isa_dev) /* * Check 83C584 interrupt configuration register if this board has one - * XXX - we could also check the IO address register. But why - * bother...if we get past this, it *has* to be correct. + * XXX - we could also check the IO address register. But why + * bother...if we get past this, it *has* to be correct. */ if ((sc->type & ED_WD_SOFTCONFIG) && (!sc->is790)) { + /* * Assemble together the encoded interrupt number. */ iptr = (inb(isa_dev->id_iobase + ED_WD_ICR) & ED_WD_ICR_IR2) | - ((inb(isa_dev->id_iobase + ED_WD_IRR) & - (ED_WD_IRR_IR0 | ED_WD_IRR_IR1)) >> 5); + ((inb(isa_dev->id_iobase + ED_WD_IRR) & + (ED_WD_IRR_IR0 | ED_WD_IRR_IR1)) >> 5); + /* - * Translate it using translation table, and check for correctness. + * Translate it using translation table, and check for + * correctness. */ if (ed_intr_mask[iptr] != isa_dev->id_irq) { printf("ed%d: kernel configured irq %d doesn't match board configured irq %d\n", - isa_dev->id_unit, ffs(isa_dev->id_irq) - 1, - ffs(ed_intr_mask[iptr]) - 1); - return(0); + isa_dev->id_unit, ffs(isa_dev->id_irq) - 1, + ffs(ed_intr_mask[iptr]) - 1); + return (0); } + /* * Enable the interrupt. */ outb(isa_dev->id_iobase + ED_WD_IRR, - inb(isa_dev->id_iobase + ED_WD_IRR) | ED_WD_IRR_IEN); + inb(isa_dev->id_iobase + ED_WD_IRR) | ED_WD_IRR_IEN); } if (sc->is790) { outb(isa_dev->id_iobase + ED_WD790_HWR, - inb(isa_dev->id_iobase + ED_WD790_HWR) | ED_WD790_HWR_SWH); + inb(isa_dev->id_iobase + ED_WD790_HWR) | ED_WD790_HWR_SWH); iptr = (((inb(isa_dev->id_iobase + ED_WD790_GCR) & ED_WD790_GCR_IR2) >> 4) | - (inb(isa_dev->id_iobase + ED_WD790_GCR) & - (ED_WD790_GCR_IR1|ED_WD790_GCR_IR0)) >> 2); + (inb(isa_dev->id_iobase + ED_WD790_GCR) & + (ED_WD790_GCR_IR1 | ED_WD790_GCR_IR0)) >> 2); outb(isa_dev->id_iobase + ED_WD790_HWR, - inb(isa_dev->id_iobase + ED_WD790_HWR) & ~ED_WD790_HWR_SWH); + inb(isa_dev->id_iobase + ED_WD790_HWR) & ~ED_WD790_HWR_SWH); if (ed_790_intr_mask[iptr] != isa_dev->id_irq) { printf("ed%d: kernel configured irq %d doesn't match board configured irq %d %d\n", - isa_dev->id_unit, ffs(isa_dev->id_irq) - 1, - ffs(ed_790_intr_mask[iptr]) - 1, iptr); + isa_dev->id_unit, ffs(isa_dev->id_irq) - 1, + ffs(ed_790_intr_mask[iptr]) - 1, iptr); return 0; } + /* * Enable interrupts. */ outb(isa_dev->id_iobase + ED_WD790_ICR, - inb(isa_dev->id_iobase + ED_WD790_ICR) | ED_WD790_ICR_EIL); + inb(isa_dev->id_iobase + ED_WD790_ICR) | ED_WD790_ICR_EIL); } - sc->isa16bit = isa16bit; -#ifdef notyet /* XXX - I'm not sure if PIO mode is even possible on WD/SMC boards */ +/* XXX - I'm not sure if PIO mode is even possible on WD/SMC boards */ +#ifdef notyet + /* * The following allows the WD/SMC boards to be used in Programmed I/O - * mode - without mapping the NIC memory shared. ...Not the prefered - * way, but it might be the only way. + * mode - without mapping the NIC memory shared. ...Not the prefered + * way, but it might be the only way. */ if (isa_dev->id_flags & ED_FLAGS_FORCE_PIO) { sc->mem_shared = 0; @@ -469,7 +488,7 @@ ed_probe_WD80x3(isa_dev) #endif isa_dev->id_msize = memsize; - sc->mem_start = (caddr_t)isa_dev->id_maddr; + sc->mem_start = (caddr_t) isa_dev->id_maddr; /* * allocate one xmit buffer if < 16k, two buffers otherwise @@ -495,27 +514,6 @@ ed_probe_WD80x3(isa_dev) sc->arpcom.ac_enaddr[i] = inb(sc->asic_addr + ED_WD_PROM + i); if (sc->mem_shared) { - /* - * Set address and enable interface shared memory. - */ - if(!sc->is790) { -#ifdef TOSH_ETHER - outb(sc->asic_addr + ED_WD_MSR + 1, ((kvtop(sc->mem_start) >> 8) & 0xe0) | 4); - outb(sc->asic_addr + ED_WD_MSR + 2, ((kvtop(sc->mem_start) >> 16) & 0x0f)); - outb(sc->asic_addr + ED_WD_MSR, ED_WD_MSR_MENB | ED_WD_MSR_POW); - -#else - outb(sc->asic_addr + ED_WD_MSR, ((kvtop(sc->mem_start) >> 13) & - ED_WD_MSR_ADDR) | ED_WD_MSR_MENB); -#endif - } else { - outb(sc->asic_addr + ED_WD_MSR, ED_WD_MSR_MENB); - outb(sc->asic_addr + 0x04, (inb(sc->asic_addr + 0x04) | 0x80)); - outb(sc->asic_addr + 0x0b, ((kvtop(sc->mem_start) >> 13) & 0x0f) | - ((kvtop(sc->mem_start) >> 11) & 0x40) | - (inb(sc->asic_addr + 0x0b) & 0xb0)); - outb(sc->asic_addr + 0x04, (inb(sc->asic_addr + 0x04) & ~0x80)); - } /* * Set upper address bits and 8/16 bit access to shared memory @@ -524,60 +522,83 @@ ed_probe_WD80x3(isa_dev) if (sc->is790) { sc->wd_laar_proto = inb(sc->asic_addr + ED_WD_LAAR); outb(sc->asic_addr + ED_WD_LAAR, ED_WD_LAAR_M16EN); - (void) inb(0x84); } else { outb(sc->asic_addr + ED_WD_LAAR, (sc->wd_laar_proto = - ED_WD_LAAR_L16EN | ED_WD_LAAR_M16EN | - ((kvtop(sc->mem_start) >> 19) & ED_WD_LAAR_ADDRHI))); + ED_WD_LAAR_L16EN | ED_WD_LAAR_M16EN | + ((kvtop(sc->mem_start) >> 19) & ED_WD_LAAR_ADDRHI))); } - } else { + } else { if ((sc->type & ED_WD_SOFTCONFIG) || #ifdef TOSH_ETHER (sc->type == ED_TYPE_TOSHIBA1) || (sc->type == ED_TYPE_TOSHIBA4) || #endif (sc->type == ED_TYPE_WD8013EBT) && (!sc->is790)) { outb(sc->asic_addr + ED_WD_LAAR, (sc->wd_laar_proto = - ((kvtop(sc->mem_start) >> 19) & ED_WD_LAAR_ADDRHI))); + ((kvtop(sc->mem_start) >> 19) & ED_WD_LAAR_ADDRHI))); } } /* + * Set address and enable interface shared memory. + */ + if (!sc->is790) { +#ifdef TOSH_ETHER + outb(sc->asic_addr + ED_WD_MSR + 1, ((kvtop(sc->mem_start) >> 8) & 0xe0) | 4); + outb(sc->asic_addr + ED_WD_MSR + 2, ((kvtop(sc->mem_start) >> 16) & 0x0f)); + outb(sc->asic_addr + ED_WD_MSR, ED_WD_MSR_MENB | ED_WD_MSR_POW); + +#else + outb(sc->asic_addr + ED_WD_MSR, ((kvtop(sc->mem_start) >> 13) & + ED_WD_MSR_ADDR) | ED_WD_MSR_MENB); +#endif + } else { + outb(sc->asic_addr + ED_WD_MSR, ED_WD_MSR_MENB); + outb(sc->asic_addr + 0x04, (inb(sc->asic_addr + 0x04) | 0x80)); + outb(sc->asic_addr + 0x0b, ((kvtop(sc->mem_start) >> 13) & 0x0f) | + ((kvtop(sc->mem_start) >> 11) & 0x40) | + (inb(sc->asic_addr + 0x0b) & 0xb0)); + outb(sc->asic_addr + 0x04, (inb(sc->asic_addr + 0x04) & ~0x80)); + } + + /* * Now zero memory and verify that it is clear */ bzero(sc->mem_start, memsize); for (i = 0; i < memsize; ++i) if (sc->mem_start[i]) { - printf("ed%d: failed to clear shared memory at %x - check configuration\n", - isa_dev->id_unit, kvtop(sc->mem_start + i)); + printf("ed%d: failed to clear shared memory at %x - check configuration\n", + isa_dev->id_unit, kvtop(sc->mem_start + i)); /* * Disable 16 bit access to shared memory */ if (isa16bit) { + if (sc->is790) { + outb(sc->asic_addr + ED_WD_MSR, 0x00); + } outb(sc->asic_addr + ED_WD_LAAR, (sc->wd_laar_proto &= - ~ED_WD_LAAR_M16EN)); - (void) inb(0x84); + ~ED_WD_LAAR_M16EN)); } - - return(0); + return (0); } - + /* - * Disable 16bit access to shared memory - we leave it disabled so - * that 1) machines reboot properly when the board is set - * 16 bit mode and there are conflicting 8bit devices/ROMS - * in the same 128k address space as this boards shared - * memory. and 2) so that other 8 bit devices with shared - * memory can be used in this 128k region, too. + * Disable 16bit access to shared memory - we leave it + * disabled so that 1) machines reboot properly when the board + * is set 16 bit mode and there are conflicting 8bit + * devices/ROMS in the same 128k address space as this boards + * shared memory. and 2) so that other 8 bit devices with + * shared memory can be used in this 128k region, too. */ if (isa16bit) { + if (sc->is790) { + outb(sc->asic_addr + ED_WD_MSR, 0x00); + } outb(sc->asic_addr + ED_WD_LAAR, (sc->wd_laar_proto &= - ~ED_WD_LAAR_M16EN)); - (void) inb(0x84); + ~ED_WD_LAAR_M16EN)); } } - return (ED_WD_IO_PORTS); } @@ -589,84 +610,84 @@ ed_probe_3Com(isa_dev) struct isa_device *isa_dev; { struct ed_softc *sc = &ed_softc[isa_dev->id_unit]; - int i; - u_int memsize; - u_char isa16bit, sum; + int i; + u_int memsize; + u_char isa16bit, sum; sc->asic_addr = isa_dev->id_iobase + ED_3COM_ASIC_OFFSET; sc->nic_addr = isa_dev->id_iobase + ED_3COM_NIC_OFFSET; /* * Verify that the kernel configured I/O address matches the board - * configured address + * configured address */ switch (inb(sc->asic_addr + ED_3COM_BCFR)) { case ED_3COM_BCFR_300: if (isa_dev->id_iobase != 0x300) - return(0); + return (0); break; case ED_3COM_BCFR_310: if (isa_dev->id_iobase != 0x310) - return(0); + return (0); break; case ED_3COM_BCFR_330: if (isa_dev->id_iobase != 0x330) - return(0); + return (0); break; case ED_3COM_BCFR_350: if (isa_dev->id_iobase != 0x350) - return(0); + return (0); break; case ED_3COM_BCFR_250: if (isa_dev->id_iobase != 0x250) - return(0); + return (0); break; case ED_3COM_BCFR_280: if (isa_dev->id_iobase != 0x280) - return(0); + return (0); break; case ED_3COM_BCFR_2A0: if (isa_dev->id_iobase != 0x2a0) - return(0); + return (0); break; case ED_3COM_BCFR_2E0: if (isa_dev->id_iobase != 0x2e0) - return(0); + return (0); break; default: - return(0); + return (0); } /* - * Verify that the kernel shared memory address matches the - * board configured address. + * Verify that the kernel shared memory address matches the board + * configured address. */ switch (inb(sc->asic_addr + ED_3COM_PCFR)) { case ED_3COM_PCFR_DC000: if (kvtop(isa_dev->id_maddr) != 0xdc000) - return(0); + return (0); break; case ED_3COM_PCFR_D8000: if (kvtop(isa_dev->id_maddr) != 0xd8000) - return(0); + return (0); break; case ED_3COM_PCFR_CC000: if (kvtop(isa_dev->id_maddr) != 0xcc000) - return(0); + return (0); break; case ED_3COM_PCFR_C8000: if (kvtop(isa_dev->id_maddr) != 0xc8000) - return(0); + return (0); break; default: - return(0); + return (0); } /* * Reset NIC and ASIC. Enable on-board transceiver throughout reset - * sequence because it'll lock up if the cable isn't connected - * if we don't. + * sequence because it'll lock up if the cable isn't connected if we + * don't. */ outb(sc->asic_addr + ED_3COM_CR, ED_3COM_CR_RST | ED_3COM_CR_XSEL); @@ -674,10 +695,11 @@ ed_probe_3Com(isa_dev) * Wait for a while, then un-reset it */ DELAY(50); + /* * The 3Com ASIC defaults to rather strange settings for the CR after - * a reset - it's important to set it again after the following - * outb (this is done when we map the PROM below). + * a reset - it's important to set it again after the following outb + * (this is done when we map the PROM below). */ outb(sc->asic_addr + ED_3COM_CR, ED_3COM_CR_XSEL); @@ -692,17 +714,18 @@ ed_probe_3Com(isa_dev) sc->mem_shared = 1; /* - * Hmmm...a 16bit 3Com board has 16k of memory, but only an 8k - * window to it. + * Hmmm...a 16bit 3Com board has 16k of memory, but only an 8k window + * to it. */ memsize = 8192; /* * Get station address from on-board ROM */ + /* * First, map ethernet address PROM over the top of where the NIC - * registers normally appear. + * registers normally appear. */ outb(sc->asic_addr + ED_3COM_CR, ED_3COM_CR_EALO | ED_3COM_CR_XSEL); @@ -711,9 +734,8 @@ ed_probe_3Com(isa_dev) /* * Unmap PROM - select NIC registers. The proper setting of the - * tranceiver is set in ed_init so that the attach code - * is given a chance to set the default based on a compile-time - * config option + * tranceiver is set in ed_init so that the attach code is given a + * chance to set the default based on a compile-time config option */ outb(sc->asic_addr + ED_3COM_CR, ED_3COM_CR_XSEL); @@ -724,18 +746,18 @@ ed_probe_3Com(isa_dev) /* * select page 0 registers */ - outb(sc->nic_addr + ED_P0_CR, ED_CR_RD2|ED_CR_STP); + outb(sc->nic_addr + ED_P0_CR, ED_CR_RD2 | ED_CR_STP); /* - * Attempt to clear WTS bit. If it doesn't clear, then this is a - * 16bit board. + * Attempt to clear WTS bit. If it doesn't clear, then this is a 16bit + * board. */ outb(sc->nic_addr + ED_P0_DCR, 0); /* * select page 2 registers */ - outb(sc->nic_addr + ED_P0_CR, ED_CR_PAGE_2|ED_CR_RD2|ED_CR_STP); + outb(sc->nic_addr + ED_P0_CR, ED_CR_PAGE_2 | ED_CR_RD2 | ED_CR_STP); /* * The 3c503 forces the WTS bit to a one if this is a 16bit board @@ -748,24 +770,23 @@ ed_probe_3Com(isa_dev) /* * select page 0 registers */ - outb(sc->nic_addr + ED_P2_CR, ED_CR_RD2|ED_CR_STP); + outb(sc->nic_addr + ED_P2_CR, ED_CR_RD2 | ED_CR_STP); - sc->mem_start = (caddr_t)isa_dev->id_maddr; + sc->mem_start = (caddr_t) isa_dev->id_maddr; sc->mem_size = memsize; sc->mem_end = sc->mem_start + memsize; /* * We have an entire 8k window to put the transmit buffers on the - * 16bit boards. But since the 16bit 3c503's shared memory - * is only fast enough to overlap the loading of one full-size - * packet, trying to load more than 2 buffers can actually - * leave the transmitter idle during the load. So 2 seems - * the best value. (Although a mix of variable-sized packets - * might change this assumption. Nonetheless, we optimize for - * linear transfers of same-size packets.) + * 16bit boards. But since the 16bit 3c503's shared memory is only + * fast enough to overlap the loading of one full-size packet, trying + * to load more than 2 buffers can actually leave the transmitter idle + * during the load. So 2 seems the best value. (Although a mix of + * variable-sized packets might change this assumption. Nonetheless, + * we optimize for linear transfers of same-size packets.) */ if (isa16bit) { - if (isa_dev->id_flags & ED_FLAGS_NO_MULTI_BUFFERING) + if (isa_dev->id_flags & ED_FLAGS_NO_MULTI_BUFFERING) sc->txb_cnt = 1; else sc->txb_cnt = 2; @@ -773,22 +794,22 @@ ed_probe_3Com(isa_dev) sc->tx_page_start = ED_3COM_TX_PAGE_OFFSET_16BIT; sc->rec_page_start = ED_3COM_RX_PAGE_OFFSET_16BIT; sc->rec_page_stop = memsize / ED_PAGE_SIZE + - ED_3COM_RX_PAGE_OFFSET_16BIT; + ED_3COM_RX_PAGE_OFFSET_16BIT; sc->mem_ring = sc->mem_start; } else { sc->txb_cnt = 1; sc->tx_page_start = ED_3COM_TX_PAGE_OFFSET_8BIT; sc->rec_page_start = ED_TXBUF_SIZE + ED_3COM_TX_PAGE_OFFSET_8BIT; sc->rec_page_stop = memsize / ED_PAGE_SIZE + - ED_3COM_TX_PAGE_OFFSET_8BIT; + ED_3COM_TX_PAGE_OFFSET_8BIT; sc->mem_ring = sc->mem_start + (ED_PAGE_SIZE * ED_TXBUF_SIZE); } sc->isa16bit = isa16bit; /* - * Initialize GA page start/stop registers. Probably only needed - * if doing DMA, but what the hell. + * Initialize GA page start/stop registers. Probably only needed if + * doing DMA, but what the hell. */ outb(sc->asic_addr + ED_3COM_PSTR, sc->rec_page_start); outb(sc->asic_addr + ED_3COM_PSPR, sc->rec_page_stop); @@ -811,21 +832,22 @@ ed_probe_3Com(isa_dev) break; default: printf("ed%d: Invalid irq configuration (%d) must be 2-5 for 3c503\n", - isa_dev->id_unit, ffs(isa_dev->id_irq) - 1); - return(0); + isa_dev->id_unit, ffs(isa_dev->id_irq) - 1); + return (0); } /* - * Initialize GA configuration register. Set bank and enable shared mem. + * Initialize GA configuration register. Set bank and enable shared + * mem. */ outb(sc->asic_addr + ED_3COM_GACFR, ED_3COM_GACFR_RSEL | - ED_3COM_GACFR_MBS0); + ED_3COM_GACFR_MBS0); /* - * Initialize "Vector Pointer" registers. These gawd-awful things - * are compared to 20 bits of the address on ISA, and if they - * match, the shared memory is disabled. We set them to - * 0xffff0...allegedly the reset vector. + * Initialize "Vector Pointer" registers. These gawd-awful things are + * compared to 20 bits of the address on ISA, and if they match, the + * shared memory is disabled. We set them to 0xffff0...allegedly the + * reset vector. */ outb(sc->asic_addr + ED_3COM_VPTR2, 0xff); outb(sc->asic_addr + ED_3COM_VPTR1, 0xff); @@ -838,13 +860,12 @@ ed_probe_3Com(isa_dev) for (i = 0; i < memsize; ++i) if (sc->mem_start[i]) { - printf("ed%d: failed to clear shared memory at %x - check configuration\n", - isa_dev->id_unit, kvtop(sc->mem_start + i)); - return(0); + printf("ed%d: failed to clear shared memory at %x - check configuration\n", + isa_dev->id_unit, kvtop(sc->mem_start + i)); + return (0); } - isa_dev->id_msize = memsize; - return(ED_3COM_IO_PORTS); + return (ED_3COM_IO_PORTS); } /* @@ -855,10 +876,10 @@ ed_probe_Novell(isa_dev) struct isa_device *isa_dev; { struct ed_softc *sc = &ed_softc[isa_dev->id_unit]; - u_int memsize, n; - u_char romdata[16], isa16bit = 0, tmp; + u_int memsize, n; + u_char romdata[16], isa16bit = 0, tmp; static char test_pattern[32] = "THIS is A memory TEST pattern"; - char test_buffer[32]; + char test_buffer[32]; sc->asic_addr = isa_dev->id_iobase + ED_NOVELL_ASIC_OFFSET; sc->nic_addr = isa_dev->id_iobase + ED_NOVELL_NIC_OFFSET; @@ -866,50 +887,54 @@ ed_probe_Novell(isa_dev) /* XXX - do Novell-specific probe here */ /* Reset the board */ +#ifdef GWETHER + outb(sc->asic_addr + ED_NOVELL_RESET, 0); + DELAY(200); +#endif /* GWETHER */ tmp = inb(sc->asic_addr + ED_NOVELL_RESET); /* * I don't know if this is necessary; probably cruft leftover from - * Clarkson packet driver code. Doesn't do a thing on the boards - * I've tested. -DG [note that a outb(0x84, 0) seems to work - * here, and is non-invasive...but some boards don't seem to reset - * and I don't have complete documentation on what the 'right' - * thing to do is...so we do the invasive thing for now. Yuck.] + * Clarkson packet driver code. Doesn't do a thing on the boards I've + * tested. -DG [note that a outb(0x84, 0) seems to work here, and is + * non-invasive...but some boards don't seem to reset and I don't have + * complete documentation on what the 'right' thing to do is...so we + * do the invasive thing for now. Yuck.] */ outb(sc->asic_addr + ED_NOVELL_RESET, tmp); DELAY(5000); /* * This is needed because some NE clones apparently don't reset the - * NIC properly (or the NIC chip doesn't reset fully on power-up) - * XXX - this makes the probe invasive! ...Done against my better - * judgement. -DLG + * NIC properly (or the NIC chip doesn't reset fully on power-up) XXX + * - this makes the probe invasive! ...Done against my better + * judgement. -DLG */ - outb(sc->nic_addr + ED_P0_CR, ED_CR_RD2|ED_CR_STP); + outb(sc->nic_addr + ED_P0_CR, ED_CR_RD2 | ED_CR_STP); DELAY(5000); /* Make sure that we really have an 8390 based board */ if (!ed_probe_generic8390(sc)) - return(0); + return (0); sc->vendor = ED_VENDOR_NOVELL; sc->mem_shared = 0; isa_dev->id_maddr = 0; /* - * Test the ability to read and write to the NIC memory. This has - * the side affect of determining if this is an NE1000 or an NE2000. + * Test the ability to read and write to the NIC memory. This has the + * side affect of determining if this is an NE1000 or an NE2000. */ /* - * This prevents packets from being stored in the NIC memory when - * the readmem routine turns on the start bit in the CR. + * This prevents packets from being stored in the NIC memory when the + * readmem routine turns on the start bit in the CR. */ outb(sc->nic_addr + ED_P0_RCR, ED_RCR_MON); /* Temporarily initialize DCR for byte operations */ - outb(sc->nic_addr + ED_P0_DCR, ED_DCR_FT1|ED_DCR_LS); + outb(sc->nic_addr + ED_P0_DCR, ED_DCR_FT1 | ED_DCR_LS); outb(sc->nic_addr + ED_P0_PSTART, 8192 / ED_PAGE_SIZE); outb(sc->nic_addr + ED_P0_PSTOP, 16384 / ED_PAGE_SIZE); @@ -918,8 +943,8 @@ ed_probe_Novell(isa_dev) /* * Write a test pattern in byte mode. If this fails, then there - * probably isn't any memory at 8k - which likely means - * that the board is an NE2000. + * probably isn't any memory at 8k - which likely means that the board + * is an NE2000. */ ed_pio_writemem(sc, test_pattern, 8192, sizeof(test_pattern)); ed_pio_readmem(sc, 8192, test_buffer, sizeof(test_pattern)); @@ -927,20 +952,21 @@ ed_probe_Novell(isa_dev) if (bcmp(test_pattern, test_buffer, sizeof(test_pattern))) { /* not an NE1000 - try NE2000 */ - outb(sc->nic_addr + ED_P0_DCR, ED_DCR_WTS|ED_DCR_FT1|ED_DCR_LS); + outb(sc->nic_addr + ED_P0_DCR, ED_DCR_WTS | ED_DCR_FT1 | ED_DCR_LS); outb(sc->nic_addr + ED_P0_PSTART, 16384 / ED_PAGE_SIZE); outb(sc->nic_addr + ED_P0_PSTOP, 32768 / ED_PAGE_SIZE); sc->isa16bit = 1; + /* * Write a test pattern in word mode. If this also fails, then - * we don't know what this board is. + * we don't know what this board is. */ ed_pio_writemem(sc, test_pattern, 16384, sizeof(test_pattern)); ed_pio_readmem(sc, 16384, test_buffer, sizeof(test_pattern)); if (bcmp(test_pattern, test_buffer, sizeof(test_pattern))) - return(0); /* not an NE2000 either */ + return (0); /* not an NE2000 either */ sc->type = ED_TYPE_NE2000; sc->type_str = "NE2000"; @@ -948,11 +974,11 @@ ed_probe_Novell(isa_dev) sc->type = ED_TYPE_NE1000; sc->type_str = "NE1000"; } - + /* 8k of memory plus an additional 8k if 16bit */ memsize = 8192 + sc->isa16bit * 8192; -#if 0 /* probably not useful - NE boards only come two ways */ +#if 0 /* probably not useful - NE boards only come two ways */ /* allow kernel config file overrides */ if (isa_dev->id_msize) memsize = isa_dev->id_msize; @@ -966,9 +992,72 @@ ed_probe_Novell(isa_dev) sc->mem_end = sc->mem_start + memsize; sc->tx_page_start = memsize / ED_PAGE_SIZE; +#ifdef GWETHER + { + int x, i, mstart = 0, msize = 0; + char pbuf0[ED_PAGE_SIZE], pbuf[ED_PAGE_SIZE], tbuf[ED_PAGE_SIZE]; + + for (i = 0; i < ED_PAGE_SIZE; i++) + pbuf0[i] = 0; + + /* Clear all the memory. */ + for (x = 1; x < 256; x++) + ed_pio_writemem(sc, pbuf0, x * 256, ED_PAGE_SIZE); + + /* Search for the start of RAM. */ + for (x = 1; x < 256; x++) { + ed_pio_readmem(sc, x * 256, tbuf, ED_PAGE_SIZE); + if (memcmp(pbuf0, tbuf, ED_PAGE_SIZE) == 0) { + for (i = 0; i < ED_PAGE_SIZE; i++) + pbuf[i] = 255 - x; + ed_pio_writemem(sc, pbuf, x * 256, ED_PAGE_SIZE); + ed_pio_readmem(sc, x * 256, tbuf, ED_PAGE_SIZE); + if (memcmp(pbuf, tbuf, ED_PAGE_SIZE) == 0) { + mstart = x * ED_PAGE_SIZE; + msize = ED_PAGE_SIZE; + break; + } + } + } + + if (mstart == 0) { + printf("ed%d: Cannot find start of RAM.\n", isa_dev->id_unit); + return 0; + } + /* Search for the start of RAM. */ + for (x = (mstart / ED_PAGE_SIZE) + 1; x < 256; x++) { + ed_pio_readmem(sc, x * 256, tbuf, ED_PAGE_SIZE); + if (memcmp(pbuf0, tbuf, ED_PAGE_SIZE) == 0) { + for (i = 0; i < ED_PAGE_SIZE; i++) + pbuf[i] = 255 - x; + ed_pio_writemem(sc, pbuf, x * 256, ED_PAGE_SIZE); + ed_pio_readmem(sc, x * 256, tbuf, ED_PAGE_SIZE); + if (memcmp(pbuf, tbuf, ED_PAGE_SIZE) == 0) + msize += ED_PAGE_SIZE; + else { + break; + } + } else { + break; + } + } + + if (msize == 0) { + printf("ed%d: Cannot find any RAM, start : %d, x = %d.\n", isa_dev->id_unit, mstart, x); + return 0; + } + printf("ed%d: RAM start at %d, size : %d.\n", isa_dev->id_unit, mstart, msize); + + sc->mem_size = msize; + sc->mem_start = (char *) mstart; + sc->mem_end = (char *) (msize + mstart); + sc->tx_page_start = mstart / ED_PAGE_SIZE; + } +#endif /* GWETHER */ + /* * Use one xmit buffer if < 16k, two buffers otherwise (if not told - * otherwise). + * otherwise). */ if ((memsize < 16384) || (isa_dev->id_flags & ED_FLAGS_NO_MULTI_BUFFERING)) sc->txb_cnt = 1; @@ -982,14 +1071,19 @@ ed_probe_Novell(isa_dev) ed_pio_readmem(sc, 0, romdata, 16); for (n = 0; n < ETHER_ADDR_LEN; n++) - sc->arpcom.ac_enaddr[n] = romdata[n*(sc->isa16bit+1)]; + sc->arpcom.ac_enaddr[n] = romdata[n * (sc->isa16bit + 1)]; + +#ifdef GWETHER + if (sc->arpcom.ac_enaddr[2] == 0x86) + sc->type_str = "Gateway AT"; +#endif /* GWETHER */ /* clear any pending interrupts that might have occurred above */ outb(sc->nic_addr + ED_P0_ISR, 0xff); - return(ED_NOVELL_IO_PORTS); + return (ED_NOVELL_IO_PORTS); } - + /* * Install interface into kernel networking data structures */ @@ -1001,7 +1095,7 @@ ed_attach(isa_dev) struct ifnet *ifp = &sc->arpcom.ac_if; struct ifaddr *ifa; struct sockaddr_dl *sdl; - + /* * Set interface to stopped condition (reset) */ @@ -1011,7 +1105,7 @@ ed_attach(isa_dev) * Initialize ifnet structure */ ifp->if_unit = isa_dev->id_unit; - ifp->if_name = "ed" ; + ifp->if_name = "ed"; ifp->if_mtu = ETHERMTU; ifp->if_init = ed_init; ifp->if_output = ether_output; @@ -1022,13 +1116,16 @@ ed_attach(isa_dev) /* * Set default state for ALTPHYS flag (used to disable the tranceiver - * for AUI operation), based on compile-time config option. + * for AUI operation), based on compile-time config option. */ if (isa_dev->id_flags & ED_FLAGS_DISABLE_TRANCEIVER) ifp->if_flags = (IFF_BROADCAST | IFF_SIMPLEX | IFF_NOTRAILERS | IFF_ALTPHYS); else ifp->if_flags = (IFF_BROADCAST | IFF_SIMPLEX | IFF_NOTRAILERS); +#ifdef MULTICAST + ifp->if_flags |= IFF_MULTICAST; +#endif /* * Attach the interface @@ -1038,20 +1135,22 @@ ed_attach(isa_dev) /* * Search down the ifa address list looking for the AF_LINK type entry */ - ifa = ifp->if_addrlist; + ifa = ifp->if_addrlist; while ((ifa != 0) && (ifa->ifa_addr != 0) && - (ifa->ifa_addr->sa_family != AF_LINK)) + (ifa->ifa_addr->sa_family != AF_LINK)) ifa = ifa->ifa_next; + /* * If we find an AF_LINK type entry we fill in the hardware address. - * This is useful for netstat(1) to keep track of which interface - * is which. + * This is useful for netstat(1) to keep track of which interface is + * which. */ if ((ifa != 0) && (ifa->ifa_addr != 0)) { + /* * Fill in the link-level address for this interface */ - sdl = (struct sockaddr_dl *)ifa->ifa_addr; + sdl = (struct sockaddr_dl *) ifa->ifa_addr; sdl->sdl_type = IFT_ETHER; sdl->sdl_alen = ETHER_ADDR_LEN; sdl->sdl_slen = 0; @@ -1062,17 +1161,17 @@ ed_attach(isa_dev) * Print additional info when attached */ printf("ed%d: address %s, ", isa_dev->id_unit, - ether_sprintf(sc->arpcom.ac_enaddr)); + ether_sprintf(sc->arpcom.ac_enaddr)); if (sc->type_str && (*sc->type_str != 0)) printf("type %s ", sc->type_str); else printf("type unknown (0x%x) ", sc->type); - printf("%s ",sc->isa16bit ? "(16 bit)" : "(8 bit)"); + printf("%s ", sc->isa16bit ? "(16 bit)" : "(8 bit)"); printf("%s\n", ((sc->vendor == ED_VENDOR_3COM) && - (ifp->if_flags & IFF_ALTPHYS)) ? " tranceiver disabled" : ""); + (ifp->if_flags & IFF_ALTPHYS)) ? " tranceiver disabled" : ""); /* * If BPF is in the kernel, call the attach for it @@ -1082,15 +1181,15 @@ ed_attach(isa_dev) #endif return 1; } - + /* * Reset interface. */ void ed_reset(unit) - int unit; + int unit; { - int s; + int s; s = splimp(); @@ -1102,29 +1201,30 @@ ed_reset(unit) (void) splx(s); } - + /* * Take interface offline. */ void ed_stop(unit) - int unit; + int unit; { struct ed_softc *sc = &ed_softc[unit]; - int n = 5000; - + int n = 5000; + /* * Stop everything on the interface, and select page 0 registers. */ if (sc->is790) { outb(sc->nic_addr + ED_P0_CR, ED_CR_STP); } else { - outb(sc->nic_addr + ED_P0_CR, ED_CR_RD2|ED_CR_STP); + outb(sc->nic_addr + ED_P0_CR, ED_CR_RD2 | ED_CR_STP); } + /* - * Wait for interface to enter stopped state, but limit # of checks - * to 'n' (about 5ms). It shouldn't even take 5us on modern - * DS8390's, but just in case it's an old one. + * Wait for interface to enter stopped state, but limit # of checks to + * 'n' (about 5ms). It shouldn't even take 5us on modern DS8390's, but + * just in case it's an old one. */ while (((inb(sc->nic_addr + ED_P0_ISR) & ED_ISR_RST) == 0) && --n); @@ -1136,7 +1236,7 @@ ed_stop(unit) */ void ed_watchdog(unit) - int unit; + int unit; { struct ed_softc *sc = &ed_softc[unit]; @@ -1147,25 +1247,26 @@ ed_watchdog(unit) } /* - * Initialize device. + * Initialize device. */ void ed_init(unit) - int unit; + int unit; { struct ed_softc *sc = &ed_softc[unit]; struct ifnet *ifp = &sc->arpcom.ac_if; - int i, s; - u_char command; + int i, s; + u_char command; /* address not known */ - if (ifp->if_addrlist == (struct ifaddr *)0) return; + if (ifp->if_addrlist == (struct ifaddr *) 0) + return; /* * Initialize the NIC in the exact order outlined in the NS manual. - * This init procedure is "mandatory"...don't change what or when - * things happen. + * This init procedure is "mandatory"...don't change what or when + * things happen. */ s = splimp(); @@ -1186,19 +1287,21 @@ ed_init(unit) if (sc->is790) { outb(sc->nic_addr + ED_P0_CR, ED_CR_STP); } else { - outb(sc->nic_addr + ED_P0_CR, ED_CR_RD2|ED_CR_STP); + outb(sc->nic_addr + ED_P0_CR, ED_CR_RD2 | ED_CR_STP); } if (sc->isa16bit) { + /* - * Set FIFO threshold to 8, No auto-init Remote DMA, - * byte order=80x86, word-wide DMA xfers, + * Set FIFO threshold to 8, No auto-init Remote DMA, byte + * order=80x86, word-wide DMA xfers, */ - outb(sc->nic_addr + ED_P0_DCR, ED_DCR_FT1|ED_DCR_WTS|ED_DCR_LS); + outb(sc->nic_addr + ED_P0_DCR, ED_DCR_FT1 | ED_DCR_WTS | ED_DCR_LS); } else { + /* * Same as above, but byte-wide DMA xfers */ - outb(sc->nic_addr + ED_P0_DCR, ED_DCR_FT1|ED_DCR_LS); + outb(sc->nic_addr + ED_P0_DCR, ED_DCR_FT1 | ED_DCR_LS); } /* @@ -1208,9 +1311,9 @@ ed_init(unit) outb(sc->nic_addr + ED_P0_RBCR1, 0); /* - * Enable reception of broadcast packets + * For the moment, don't store incoming packets in memory. */ - outb(sc->nic_addr + ED_P0_RCR, ED_RCR_AB); + outb(sc->nic_addr + ED_P0_RCR, ED_RCR_MON); /* * Place NIC in internal loopback mode @@ -1234,56 +1337,45 @@ ed_init(unit) /* * Clear all interrupts. A '1' in each bit position clears the - * corresponding flag. + * corresponding flag. */ outb(sc->nic_addr + ED_P0_ISR, 0xff); /* * Enable the following interrupts: receive/transmit complete, - * receive/transmit error, and Receiver OverWrite. - * + * receive/transmit error, and Receiver OverWrite. + * * Counter overflow and Remote DMA complete are *not* enabled. */ outb(sc->nic_addr + ED_P0_IMR, - ED_IMR_PRXE|ED_IMR_PTXE|ED_IMR_RXEE|ED_IMR_TXEE|ED_IMR_OVWE); + ED_IMR_PRXE | ED_IMR_PTXE | ED_IMR_RXEE | ED_IMR_TXEE | ED_IMR_OVWE); /* * Program Command Register for page 1 */ if (sc->is790) { - outb(sc->nic_addr + ED_P0_CR, ED_CR_PAGE_1|ED_CR_STP); + outb(sc->nic_addr + ED_P0_CR, ED_CR_PAGE_1 | ED_CR_STP); } else { - outb(sc->nic_addr + ED_P0_CR, ED_CR_PAGE_1|ED_CR_RD2|ED_CR_STP); + outb(sc->nic_addr + ED_P0_CR, ED_CR_PAGE_1 | ED_CR_RD2 | ED_CR_STP); } + /* * Copy out our station address */ for (i = 0; i < ETHER_ADDR_LEN; ++i) outb(sc->nic_addr + ED_P1_PAR0 + i, sc->arpcom.ac_enaddr[i]); -#if NBPFILTER > 0 - /* - * Initialize multicast address hashing registers to accept - * all multicasts (only used when in promiscuous mode) - */ - for (i = 0; i < 8; ++i) - outb(sc->nic_addr + ED_P1_MAR0 + i, 0xff); -#endif - /* * Set Current Page pointer to next_packet (initialized above) */ outb(sc->nic_addr + ED_P1_CURR, sc->next_packet); /* - * Set Command Register for page 0, Remote DMA complete, - * and interface Start. + * Program Receiver Configuration Register and multicast filter. CR is + * set to page 0 on return. */ - if (sc->is790) { - outb(sc->nic_addr + ED_P1_CR, ED_CR_STA); - } else { - outb(sc->nic_addr + ED_P1_CR, ED_CR_RD2|ED_CR_STA); - } + ed_setrcr(ifp, sc); + /* * Take interface out of loopback */ @@ -1291,7 +1383,7 @@ ed_init(unit) /* * If this is a 3Com board, the tranceiver must be software enabled - * (there is no settable hardware default). + * (there is no settable hardware default). */ if (sc->vendor == ED_VENDOR_3COM) { if (ifp->if_flags & IFF_ALTPHYS) { @@ -1314,11 +1406,12 @@ ed_init(unit) (void) splx(s); } - + /* * This routine actually starts the transmission on the interface */ -static inline void ed_xmit(ifp) +static inline void +ed_xmit(ifp) struct ifnet *ifp; { struct ed_softc *sc = &ed_softc[ifp->if_unit]; @@ -1332,13 +1425,14 @@ static inline void ed_xmit(ifp) if (sc->is790) { outb(sc->nic_addr + ED_P0_CR, ED_CR_STA); } else { - outb(sc->nic_addr + ED_P0_CR, ED_CR_RD2|ED_CR_STA); + outb(sc->nic_addr + ED_P0_CR, ED_CR_RD2 | ED_CR_STA); } + /* * Set TX buffer start page */ outb(sc->nic_addr + ED_P0_TPSR, sc->tx_page_start + - sc->txb_next_tx * ED_TXBUF_SIZE); + sc->txb_next_tx * ED_TXBUF_SIZE); /* * Set TX length @@ -1352,10 +1446,10 @@ static inline void ed_xmit(ifp) if (sc->is790) { outb(sc->nic_addr + ED_P0_CR, ED_CR_TXP | ED_CR_STA); } else { - outb(sc->nic_addr + ED_P0_CR, ED_CR_RD2|ED_CR_TXP|ED_CR_STA); + outb(sc->nic_addr + ED_P0_CR, ED_CR_RD2 | ED_CR_TXP | ED_CR_STA); } sc->xmit_busy = 1; - + /* * Point to next transmit buffer slot and wrap if necessary. */ @@ -1385,12 +1479,13 @@ ed_start(ifp) struct ed_softc *sc = &ed_softc[ifp->if_unit]; struct mbuf *m0, *m; caddr_t buffer; - int len; + int len; outloop: + /* - * First, see if there are buffered packets and an idle - * transmitter - should never happen at this point. + * First, see if there are buffered packets and an idle transmitter - + * should never happen at this point. */ if (sc->txb_inuse && (sc->xmit_busy == 0)) { printf("ed: packets buffers, but transmitter idle\n"); @@ -1401,23 +1496,23 @@ outloop: * See if there is room to put another packet in the buffer. */ if (sc->txb_inuse == sc->txb_cnt) { + /* - * No room. Indicate this to the outside world - * and exit. + * No room. Indicate this to the outside world and exit. */ ifp->if_flags |= IFF_OACTIVE; return; } - IF_DEQUEUE(&sc->arpcom.ac_if.if_snd, m); if (m == 0) { - /* - * We are using the !OACTIVE flag to indicate to the outside - * world that we can accept an additional packet rather than - * that the transmitter is _actually_ active. Indeed, the - * transmitter may be active, but if we haven't filled all - * the buffers with data then we still want to accept more. - */ + + /* + * We are using the !OACTIVE flag to indicate to the outside + * world that we can accept an additional packet rather than + * that the transmitter is _actually_ active. Indeed, the + * transmitter may be active, but if we haven't filled all the + * buffers with data then we still want to accept more. + */ ifp->if_flags &= ~IFF_OACTIVE; return; } @@ -1432,45 +1527,46 @@ outloop: buffer = sc->mem_start + (sc->txb_new * ED_TXBUF_SIZE * ED_PAGE_SIZE); if (sc->mem_shared) { + /* * Special case setup for 16 bit boards... */ if (sc->isa16bit) { switch (sc->vendor) { - /* - * For 16bit 3Com boards (which have 16k of memory), - * we have the xmit buffers in a different page - * of memory ('page 0') - so change pages. - */ + + /* + * For 16bit 3Com boards (which have 16k of + * memory), we have the xmit buffers in a + * different page of memory ('page 0') - so + * change pages. + */ case ED_VENDOR_3COM: outb(sc->asic_addr + ED_3COM_GACFR, - ED_3COM_GACFR_RSEL); + ED_3COM_GACFR_RSEL); break; - /* - * Enable 16bit access to shared memory on WD/SMC boards - * Don't update wd_laar_proto because we want to restore the - * previous state (because an arp reply in the input code - * may cause a call-back to ed_start) - * XXX - the call-back to 'start' is a bug, IMHO. - */ - case ED_VENDOR_WD_SMC: { - outb(sc->asic_addr + ED_WD_LAAR, - (sc->wd_laar_proto | ED_WD_LAAR_M16EN)); - (void) inb(0x84); - if (sc->is790) { - outb(sc->asic_addr + ED_WD_MSR, ED_WD_MSR_MENB); - (void) inb(0x84); + + /* + * Enable 16bit access to shared memory on + * WD/SMC boards Don't update wd_laar_proto + * because we want to restore the previous + * state (because an arp reply in the input + * code may cause a call-back to ed_start) XXX + * - the call-back to 'start' is a bug, IMHO. + */ + case ED_VENDOR_WD_SMC:{ + outb(sc->asic_addr + ED_WD_LAAR, + (sc->wd_laar_proto | ED_WD_LAAR_M16EN)); + if (sc->is790) { + outb(sc->asic_addr + ED_WD_MSR, ED_WD_MSR_MENB); + } + break; } - (void) inb(0x84); - break; - } } } - for (len = 0; m != 0; m = m->m_next) { bcopy(mtod(m, caddr_t), buffer, m->m_len); buffer += m->m_len; - len += m->m_len; + len += m->m_len; } /* @@ -1480,23 +1576,21 @@ outloop: switch (sc->vendor) { case ED_VENDOR_3COM: outb(sc->asic_addr + ED_3COM_GACFR, - ED_3COM_GACFR_RSEL | ED_3COM_GACFR_MBS0); + ED_3COM_GACFR_RSEL | ED_3COM_GACFR_MBS0); break; - case ED_VENDOR_WD_SMC: { - outb(sc->asic_addr + ED_WD_LAAR, sc->wd_laar_proto); - (void) inb(0x84); - if (sc->is790) { - outb(sc->asic_addr + ED_WD_MSR, 0x00); - (void) inb(0x84); + case ED_VENDOR_WD_SMC:{ + if (sc->is790) { + outb(sc->asic_addr + ED_WD_MSR, 0x00); + } + outb(sc->asic_addr + ED_WD_LAAR, sc->wd_laar_proto); + break; } - break; - } } } } else { len = ed_pio_write_mbufs(sc, m, buffer); } - + sc->txb_len[sc->txb_new] = max(len, ETHER_MIN_LEN); sc->txb_inuse++; @@ -1510,40 +1604,37 @@ outloop: if (sc->xmit_busy == 0) ed_xmit(ifp); + /* - * If there is BPF support in the configuration, tap off here. - * The following has support for converting trailer packets - * back to normal. - * XXX - support for trailer packets in BPF should be moved into - * the bpf code proper to avoid code duplication in all of - * the drivers. + * If there is BPF support in the configuration, tap off here. The + * following has support for converting trailer packets back to + * normal. XXX - support for trailer packets in BPF should be moved + * into the bpf code proper to avoid code duplication in all of the + * drivers. */ #if NBPFILTER > 0 if (sc->bpf) { u_short etype; - int off, datasize, resid; + int off, datasize, resid; struct ether_header *eh; struct trailer_header trailer_header; - char ether_packet[ETHER_MAX_LEN]; - char *ep; + char ether_packet[ETHER_MAX_LEN]; + char *ep; ep = ether_packet; /* - * We handle trailers below: - * Copy ether header first, then residual data, - * then data. Put all this in a temporary buffer - * 'ether_packet' and send off to bpf. Since the - * system has generated this packet, we assume - * that all of the offsets in the packet are - * correct; if they're not, the system will almost - * certainly crash in m_copydata. - * We make no assumptions about how the data is - * arranged in the mbuf chain (i.e. how much - * data is in each mbuf, if mbuf clusters are - * used, etc.), which is why we use m_copydata - * to get the ether header rather than assume - * that this is located in the first mbuf. + * We handle trailers below: Copy ether header first, then + * residual data, then data. Put all this in a temporary + * buffer 'ether_packet' and send off to bpf. Since the system + * has generated this packet, we assume that all of the + * offsets in the packet are correct; if they're not, the + * system will almost certainly crash in m_copydata. We make + * no assumptions about how the data is arranged in the mbuf + * chain (i.e. how much data is in each mbuf, if mbuf clusters + * are used, etc.), which is why we use m_copydata to get the + * ether header rather than assume that this is located in the + * first mbuf. */ /* copy ether header */ m_copydata(m0, 0, sizeof(struct ether_header), ep); @@ -1551,17 +1642,17 @@ outloop: ep += sizeof(struct ether_header); etype = ntohs(eh->ether_type); if (etype >= ETHERTYPE_TRAIL && - etype < ETHERTYPE_TRAIL+ETHERTYPE_NTRAILER) { + etype < ETHERTYPE_TRAIL + ETHERTYPE_NTRAILER) { datasize = ((etype - ETHERTYPE_TRAIL) << 9); off = datasize + sizeof(struct ether_header); /* copy trailer_header into a data structure */ m_copydata(m0, off, sizeof(struct trailer_header), - (caddr_t)&trailer_header.ether_type); + (caddr_t) & trailer_header.ether_type); /* copy residual data */ - m_copydata(m0, off+sizeof(struct trailer_header), - resid = ntohs(trailer_header.ether_residual) - + m_copydata(m0, off + sizeof(struct trailer_header), + resid = ntohs(trailer_header.ether_residual) - sizeof(struct trailer_header), ep); ep += resid; @@ -1586,35 +1677,36 @@ outloop: */ goto outloop; } - + /* * Ethernet interface receiver interrupt. */ static inline void ed_rint(unit) - int unit; + int unit; { register struct ed_softc *sc = &ed_softc[unit]; - u_char boundry, current; + u_char boundry, current; u_short len; struct ed_ring packet_hdr; - char *packet_ptr; + char *packet_ptr; /* * Set NIC to page 1 registers to get 'current' pointer */ if (sc->is790) { - outb(sc->nic_addr + ED_P0_CR, ED_CR_PAGE_1|ED_CR_STA); + outb(sc->nic_addr + ED_P0_CR, ED_CR_PAGE_1 | ED_CR_STA); } else { - outb(sc->nic_addr + ED_P0_CR, ED_CR_PAGE_1|ED_CR_RD2|ED_CR_STA); + outb(sc->nic_addr + ED_P0_CR, ED_CR_PAGE_1 | ED_CR_RD2 | ED_CR_STA); } + /* - * 'sc->next_packet' is the logical beginning of the ring-buffer - i.e. - * it points to where new data has been buffered. The 'CURR' - * (current) register points to the logical end of the ring-buffer - * - i.e. it points to where additional new data will be added. - * We loop here until the logical beginning equals the logical - * end (or in other words, until the ring-buffer is empty). + * 'sc->next_packet' is the logical beginning of the ring-buffer - + * i.e. it points to where new data has been buffered. The 'CURR' + * (current) register points to the logical end of the ring-buffer - + * i.e. it points to where additional new data will be added. We loop + * here until the logical beginning equals the logical end (or in + * other words, until the ring-buffer is empty). */ while (sc->next_packet != inb(sc->nic_addr + ED_P1_CURR)) { @@ -1623,26 +1715,30 @@ ed_rint(unit) (sc->next_packet - sc->rec_page_start) * ED_PAGE_SIZE; /* - * The byte count includes the FCS - Frame Check Sequence (a - * 32 bit CRC). + * The byte count includes a 4 byte header that was added by + * the NIC. */ if (sc->mem_shared) - packet_hdr = *(struct ed_ring *)packet_ptr; + packet_hdr = *(struct ed_ring *) packet_ptr; else ed_pio_readmem(sc, packet_ptr, (char *) &packet_hdr, - sizeof(packet_hdr)); + sizeof(packet_hdr)); len = packet_hdr.count; if ((len >= ETHER_MIN_LEN) && (len <= ETHER_MAX_LEN)) { + /* - * Go get packet. len - 4 removes CRC from length. + * Go get packet. */ - ed_get_packet(sc, packet_ptr + 4, len - 4); + ed_get_packet(sc, packet_ptr + sizeof(struct ed_ring), + len - sizeof(struct ed_ring), packet_hdr.rsr & ED_RSR_PHY); ++sc->arpcom.ac_if.if_ipackets; } else { + /* - * Really BAD...probably indicates that the ring pointers - * are corrupted. Also seen on early rev chips under - * high load - the byte order of the length gets switched. + * Really BAD...probably indicates that the ring + * pointers are corrupted. Also seen on early rev + * chips under high load - the byte order of the + * length gets switched. */ log(LOG_ERR, "ed%d: NIC memory corrupt - invalid packet length %d\n", @@ -1658,8 +1754,8 @@ ed_rint(unit) sc->next_packet = packet_hdr.next_packet; /* - * Update NIC boundry pointer - being careful to keep it - * one buffer behind. (as recommended by NS databook) + * Update NIC boundry pointer - being careful to keep it one + * buffer behind. (as recommended by NS databook) */ boundry = sc->next_packet - 1; if (boundry < sc->rec_page_start) @@ -1671,18 +1767,18 @@ ed_rint(unit) if (sc->is790) { outb(sc->nic_addr + ED_P0_CR, ED_CR_STA); } else { - outb(sc->nic_addr + ED_P0_CR, ED_CR_RD2|ED_CR_STA); + outb(sc->nic_addr + ED_P0_CR, ED_CR_RD2 | ED_CR_STA); } outb(sc->nic_addr + ED_P0_BNRY, boundry); /* - * Set NIC to page 1 registers before looping to top (prepare to - * get 'CURR' current pointer) + * Set NIC to page 1 registers before looping to top (prepare + * to get 'CURR' current pointer) */ if (sc->is790) { - outb(sc->nic_addr + ED_P0_CR, ED_CR_PAGE_1|ED_CR_STA); + outb(sc->nic_addr + ED_P0_CR, ED_CR_PAGE_1 | ED_CR_STA); } else { - outb(sc->nic_addr + ED_P0_CR, ED_CR_PAGE_1|ED_CR_RD2|ED_CR_STA); + outb(sc->nic_addr + ED_P0_CR, ED_CR_PAGE_1 | ED_CR_RD2 | ED_CR_STA); } } } @@ -1692,10 +1788,10 @@ ed_rint(unit) */ void edintr(unit) - int unit; + int unit; { struct ed_softc *sc = &ed_softc[unit]; - u_char isr; + u_char isr; /* * Set NIC to page 0 registers @@ -1703,36 +1799,36 @@ edintr(unit) if (sc->is790) { outb(sc->nic_addr + ED_P0_CR, ED_CR_STA); } else { - outb(sc->nic_addr + ED_P0_CR, ED_CR_RD2|ED_CR_STA); + outb(sc->nic_addr + ED_P0_CR, ED_CR_RD2 | ED_CR_STA); } + /* * loop until there are no more new interrupts */ while (isr = inb(sc->nic_addr + ED_P0_ISR)) { /* - * reset all the bits that we are 'acknowledging' - * by writing a '1' to each bit position that was set - * (writing a '1' *clears* the bit) + * reset all the bits that we are 'acknowledging' by writing a + * '1' to each bit position that was set (writing a '1' + * *clears* the bit) */ outb(sc->nic_addr + ED_P0_ISR, isr); /* - * Handle transmitter interrupts. Handle these first - * because the receiver will reset the board under - * some conditions. + * Handle transmitter interrupts. Handle these first because + * the receiver will reset the board under some conditions. */ - if (isr & (ED_ISR_PTX|ED_ISR_TXE)) { - u_char collisions = inb(sc->nic_addr + ED_P0_NCR) & 0x0f; + if (isr & (ED_ISR_PTX | ED_ISR_TXE)) { + u_char collisions = inb(sc->nic_addr + ED_P0_NCR) & 0x0f; /* * Check for transmit error. If a TX completed with an * error, we end up throwing the packet away. Really * the only error that is possible is excessive - * collisions, and in this case it is best to allow the - * automatic mechanisms of TCP to backoff the flow. Of - * course, with UDP we're screwed, but this is expected - * when a network is heavily loaded. + * collisions, and in this case it is best to allow + * the automatic mechanisms of TCP to backoff the + * flow. Of course, with UDP we're screwed, but this + * is expected when a network is heavily loaded. */ (void) inb(sc->nic_addr + ED_P0_TSR); if (isr & ED_ISR_TXE) { @@ -1742,8 +1838,9 @@ edintr(unit) */ if ((inb(sc->nic_addr + ED_P0_TSR) & ED_TSR_ABT) && (collisions == 0)) { + /* - * When collisions total 16, the + * When collisions total 16, the * P0_NCR will indicate 0, and the * TSR_ABT is set. */ @@ -1755,9 +1852,10 @@ edintr(unit) */ ++sc->arpcom.ac_if.if_oerrors; } else { + /* * Update total number of successfully - * transmitted packets. + * transmitted packets. */ ++sc->arpcom.ac_if.if_opackets; } @@ -1775,16 +1873,16 @@ edintr(unit) /* * Add in total number of collisions on last - * transmission. + * transmission. */ sc->arpcom.ac_if.if_collisions += collisions; /* * Decrement buffer in-use count if not zero (can only - * be zero if a transmitter interrupt occured while - * not actually transmitting). - * If data is ready to transmit, start it transmitting, - * otherwise defer until after handling receiver + * be zero if a transmitter interrupt occured while + * not actually transmitting). If data is ready to + * transmit, start it transmitting, otherwise defer + * until after handling receiver */ if (sc->txb_inuse && --sc->txb_inuse) ed_xmit(&sc->arpcom.ac_if); @@ -1793,110 +1891,107 @@ edintr(unit) /* * Handle receiver interrupts */ - if (isr & (ED_ISR_PRX|ED_ISR_RXE|ED_ISR_OVW)) { - /* - * Overwrite warning. In order to make sure that a lockup - * of the local DMA hasn't occurred, we reset and - * re-init the NIC. The NSC manual suggests only a - * partial reset/re-init is necessary - but some - * chips seem to want more. The DMA lockup has been - * seen only with early rev chips - Methinks this - * bug was fixed in later revs. -DG - */ + if (isr & (ED_ISR_PRX | ED_ISR_RXE | ED_ISR_OVW)) { + + /* + * Overwrite warning. In order to make sure that a + * lockup of the local DMA hasn't occurred, we reset + * and re-init the NIC. The NSC manual suggests only a + * partial reset/re-init is necessary - but some chips + * seem to want more. The DMA lockup has been seen + * only with early rev chips - Methinks this bug was + * fixed in later revs. -DG + */ if (isr & ED_ISR_OVW) { ++sc->arpcom.ac_if.if_ierrors; #ifdef DIAGNOSTIC log(LOG_WARNING, - "ed%d: warning - receiver ring buffer overrun\n", - unit); + "ed%d: warning - receiver ring buffer overrun\n", + unit); #endif + /* * Stop/reset/re-init NIC */ ed_reset(unit); } else { - /* - * Receiver Error. One or more of: CRC error, frame - * alignment error FIFO overrun, or missed packet. - */ + /* + * Receiver Error. One or more of: CRC error, + * frame alignment error FIFO overrun, or + * missed packet. + */ if (isr & ED_ISR_RXE) { ++sc->arpcom.ac_if.if_ierrors; #ifdef ED_DEBUG printf("ed%d: receive error %x\n", unit, - inb(sc->nic_addr + ED_P0_RSR)); + inb(sc->nic_addr + ED_P0_RSR)); #endif } /* - * Go get the packet(s) - * XXX - Doing this on an error is dubious - * because there shouldn't be any data to - * get (we've configured the interface to - * not accept packets with errors). + * Go get the packet(s) XXX - Doing this on an + * error is dubious because there shouldn't be + * any data to get (we've configured the + * interface to not accept packets with + * errors). */ /* * Enable 16bit access to shared memory first - * on WD/SMC boards. + * on WD/SMC boards. */ if (sc->isa16bit && (sc->vendor == ED_VENDOR_WD_SMC)) { outb(sc->asic_addr + ED_WD_LAAR, (sc->wd_laar_proto |= - ED_WD_LAAR_M16EN)); - (void) inb(0x84); + ED_WD_LAAR_M16EN)); if (sc->is790) { outb(sc->asic_addr + ED_WD_MSR, - ED_WD_MSR_MENB); - (void) inb(0x84); + ED_WD_MSR_MENB); } } - - ed_rint (unit); + ed_rint(unit); /* disable 16bit access */ if (sc->isa16bit && - (sc->vendor == ED_VENDOR_WD_SMC)) { + (sc->vendor == ED_VENDOR_WD_SMC)) { - outb(sc->asic_addr + ED_WD_LAAR, - (sc->wd_laar_proto &= - ~ED_WD_LAAR_M16EN)); - (void) inb(0x84); if (sc->is790) { outb(sc->asic_addr + ED_WD_MSR, 0x00); - (void) inb(0x84); } + outb(sc->asic_addr + ED_WD_LAAR, + (sc->wd_laar_proto &= + ~ED_WD_LAAR_M16EN)); } } } /* * If it looks like the transmitter can take more data, - * attempt to start output on the interface. - * This is done after handling the receiver to - * give the receiver priority. + * attempt to start output on the interface. This is done + * after handling the receiver to give the receiver priority. */ if ((sc->arpcom.ac_if.if_flags & IFF_OACTIVE) == 0) ed_start(&sc->arpcom.ac_if); /* - * return NIC CR to standard state: page 0, remote DMA complete, - * start (toggling the TXP bit off, even if was just set - * in the transmit routine, is *okay* - it is 'edge' - * triggered from low to high) + * return NIC CR to standard state: page 0, remote DMA + * complete, start (toggling the TXP bit off, even if was just + * set in the transmit routine, is *okay* - it is 'edge' + * triggered from low to high) */ if (sc->is790) { outb(sc->nic_addr + ED_P0_CR, ED_CR_STA); } else { - outb(sc->nic_addr + ED_P0_CR, ED_CR_RD2|ED_CR_STA); + outb(sc->nic_addr + ED_P0_CR, ED_CR_RD2 | ED_CR_STA); } + /* - * If the Network Talley Counters overflow, read them to - * reset them. It appears that old 8390's won't - * clear the ISR flag otherwise - resulting in an - * infinite loop. + * If the Network Talley Counters overflow, read them to reset + * them. It appears that old 8390's won't clear the ISR flag + * otherwise - resulting in an infinite loop. */ if (isr & ED_ISR_CNT) { (void) inb(sc->nic_addr + ED_P0_CNTR0); @@ -1905,7 +2000,7 @@ edintr(unit) } } } - + /* * Process an ioctl request. This code needs some work - it looks * pretty ugly. @@ -1913,13 +2008,13 @@ edintr(unit) int ed_ioctl(ifp, command, data) register struct ifnet *ifp; - int command; + int command; caddr_t data; { - register struct ifaddr *ifa = (struct ifaddr *)data; + register struct ifaddr *ifa = (struct ifaddr *) data; struct ed_softc *sc = &ed_softc[ifp->if_unit]; - struct ifreq *ifr = (struct ifreq *)data; - int s, error = 0; + struct ifreq *ifr = (struct ifreq *) data; + int s, error = 0; s = splimp(); @@ -1932,41 +2027,40 @@ ed_ioctl(ifp, command, data) #ifdef INET case AF_INET: ed_init(ifp->if_unit); /* before arpwhohas */ + /* - * See if another station has *our* IP address. - * i.e.: There is an address conflict! If a - * conflict exists, a message is sent to the - * console. + * See if another station has *our* IP address. i.e.: + * There is an address conflict! If a conflict exists, + * a message is sent to the console. */ - ((struct arpcom *)ifp)->ac_ipaddr = IA_SIN(ifa)->sin_addr; - arpwhohas((struct arpcom *)ifp, &IA_SIN(ifa)->sin_addr); + ((struct arpcom *) ifp)->ac_ipaddr = IA_SIN(ifa)->sin_addr; + arpwhohas((struct arpcom *) ifp, &IA_SIN(ifa)->sin_addr); break; #endif #ifdef NS - /* - * XXX - This code is probably wrong - */ + + /* + * XXX - This code is probably wrong + */ case AF_NS: - { - register struct ns_addr *ina = &(IA_SNS(ifa)->sns_addr); - - if (ns_nullhost(*ina)) - ina->x_host = - *(union ns_host *)(sc->arpcom.ac_enaddr); - else { - /* - * + { + register struct ns_addr *ina = &(IA_SNS(ifa)->sns_addr); + + if (ns_nullhost(*ina)) + ina->x_host = + *(union ns_host *) (sc->arpcom.ac_enaddr); + else { + bcopy((caddr_t) ina->x_host.c_host, + (caddr_t) sc->arpcom.ac_enaddr, + sizeof(sc->arpcom.ac_enaddr)); + } + + /* + * Set new address */ - bcopy((caddr_t)ina->x_host.c_host, - (caddr_t)sc->arpcom.ac_enaddr, - sizeof(sc->arpcom.ac_enaddr)); + ed_init(ifp->if_unit); + break; } - /* - * Set new address - */ - ed_init(ifp->if_unit); - break; - } #endif default: ed_init(ifp->if_unit); @@ -1977,13 +2071,15 @@ ed_ioctl(ifp, command, data) case SIOCGIFADDR: { struct sockaddr *sa; - sa = (struct sockaddr *)&ifr->ifr_data; - bcopy((caddr_t)sc->arpcom.ac_enaddr, - (caddr_t) sa->sa_data, ETHER_ADDR_LEN); + + sa = (struct sockaddr *) & ifr->ifr_data; + bcopy((caddr_t) sc->arpcom.ac_enaddr, + (caddr_t) sa->sa_data, ETHER_ADDR_LEN); } break; case SIOCSIFFLAGS: + /* * If interface is marked down and it is running, then stop it */ @@ -1992,37 +2088,28 @@ ed_ioctl(ifp, command, data) ed_stop(ifp->if_unit); ifp->if_flags &= ~IFF_RUNNING; } else { - /* - * If interface is marked up and it is stopped, then start it - */ + + /* + * If interface is marked up and it is stopped, then + * start it + */ if ((ifp->if_flags & IFF_UP) && - ((ifp->if_flags & IFF_RUNNING) == 0)) + ((ifp->if_flags & IFF_RUNNING) == 0)) ed_init(ifp->if_unit); } + #if NBPFILTER > 0 - if (ifp->if_flags & IFF_PROMISC) { - /* - * Set promiscuous mode on interface. - * XXX - for multicasts to work, we would need to - * write 1's in all bits of multicast - * hashing array. For now we assume that - * this was done in ed_init(). - */ - outb(sc->nic_addr + ED_P0_RCR, - ED_RCR_PRO|ED_RCR_AM|ED_RCR_AB); - } else { - /* - * XXX - for multicasts to work, we would need to - * rewrite the multicast hashing array with the - * proper hash (would have been destroyed above). - */ - outb(sc->nic_addr + ED_P0_RCR, ED_RCR_AB); - } + + /* + * Promiscuous flag may have changed, so reprogram the RCR. + */ + ed_setrcr(ifp, sc); #endif + /* - * An unfortunate hack to provide the (required) software control - * of the tranceiver for 3Com boards. The ALTPHYS flag disables - * the tranceiver if set. + * An unfortunate hack to provide the (required) software + * control of the tranceiver for 3Com boards. The ALTPHYS flag + * disables the tranceiver if set. */ if (sc->vendor == ED_VENDOR_3COM) { if (ifp->if_flags & IFF_ALTPHYS) { @@ -2031,16 +2118,36 @@ ed_ioctl(ifp, command, data) outb(sc->asic_addr + ED_3COM_CR, ED_3COM_CR_XSEL); } } - break; +#ifdef MULTICAST + case SIOCADDMULTI: + case SIOCDELMULTI: + /* + * Update out multicast list. + */ + error = (command == SIOCADDMULTI) ? + ether_addmulti((struct ifreq *) data, &sc->arpcom) : + ether_delmulti((struct ifreq *) data, &sc->arpcom); + + if (error == ENETRESET) { + + /* + * Multicast list has changed; set the hardware filter + * accordingly. + */ + ed_setrcr(ifp, sc); + error = 0; + } + break; +#endif default: error = EINVAL; } (void) splx(s); return (error); } - + /* * Macro to calculate a new address within shared memory when given an offset * from an address, taking into account ring-wrap. @@ -2056,15 +2163,16 @@ ed_ioctl(ifp, command, data) * ether_input(). If there is a BPF listener, give a copy to BPF, too. */ static void -ed_get_packet(sc, buf, len) +ed_get_packet(sc, buf, len, multicast) struct ed_softc *sc; - char *buf; + char *buf; u_short len; + int multicast; { struct ether_header *eh; - struct mbuf *m, *head = 0, *ed_ring_to_mbuf(); + struct mbuf *m, *head = 0, *ed_ring_to_mbuf(); u_short off; - int resid; + int resid; u_short etype; struct trailer_header trailer_header; @@ -2082,8 +2190,8 @@ ed_get_packet(sc, buf, len) #define EOFF (EROUND - sizeof(struct ether_header)) /* - * The following assumes there is room for - * the ether header in the header mbuf + * The following assumes there is room for the ether header in the + * header mbuf */ head->m_data += EOFF; eh = mtod(head, struct ether_header *); @@ -2097,18 +2205,16 @@ ed_get_packet(sc, buf, len) head->m_len += sizeof(struct ether_header); len -= sizeof(struct ether_header); - etype = ntohs((u_short)eh->ether_type); + etype = ntohs((u_short) eh->ether_type); /* - * Deal with trailer protocol: - * If trailer protocol, calculate the datasize as 'off', - * which is also the offset to the trailer header. - * Set resid to the amount of packet data following the - * trailer header. - * Finally, copy residual data into mbuf chain. + * Deal with trailer protocol: If trailer protocol, calculate the + * datasize as 'off', which is also the offset to the trailer header. + * Set resid to the amount of packet data following the trailer + * header. Finally, copy residual data into mbuf chain. */ if (etype >= ETHERTYPE_TRAIL && - etype < ETHERTYPE_TRAIL+ETHERTYPE_NTRAILER) { + etype < ETHERTYPE_TRAIL + ETHERTYPE_NTRAILER) { off = (etype - ETHERTYPE_TRAIL) << 9; if ((off + sizeof(struct trailer_header)) > len) @@ -2116,14 +2222,15 @@ ed_get_packet(sc, buf, len) /* * If we have shared memory, we can get info directly from the - * stored packet, otherwise we must get a local copy - * of the trailer header using PIO. + * stored packet, otherwise we must get a local copy of the + * trailer header using PIO. */ if (sc->mem_shared) { eh->ether_type = *ringoffset(sc, buf, off, u_short *); - resid = ntohs(*ringoffset(sc, buf, off+2, u_short *)); + resid = ntohs(*ringoffset(sc, buf, off + 2, u_short *)); } else { struct trailer_header trailer_header; + ed_pio_readmem(sc, ringoffset(sc, buf, off, caddr_t), (char *) &trailer_header, @@ -2132,30 +2239,35 @@ ed_get_packet(sc, buf, len) resid = trailer_header.ether_residual; } - if ((off + resid) > len) goto bad; /* insanity */ + if ((off + resid) > len) + goto bad; /* insanity */ resid -= sizeof(struct trailer_header); - if (resid < 0) goto bad; /* insanity */ + if (resid < 0) + goto bad; /* insanity */ - m = ed_ring_to_mbuf(sc, ringoffset(sc, buf, off+4, char *), + m = ed_ring_to_mbuf(sc, ringoffset(sc, buf, off + 4, char *), head, resid); - if (m == 0) goto bad; + if (m == 0) + goto bad; len = off; - head->m_pkthdr.len -= 4; /* subtract trailer header */ + head->m_pkthdr.len -= 4; /* subtract trailer header */ } /* - * Pull packet off interface. Or if this was a trailer packet, - * the data portion is appended. + * Pull packet off interface. Or if this was a trailer packet, the + * data portion is appended. */ m = ed_ring_to_mbuf(sc, buf, m, len); - if (m == 0) goto bad; + if (m == 0) + goto bad; #if NBPFILTER > 0 + /* - * Check if there's a BPF listener on this interface. - * If so, hand off the raw packet to bpf. + * Check if there's a BPF listener on this interface. If so, hand off + * the raw packet to bpf. */ if (sc->bpf) { bpf_mtap(sc->bpf, head); @@ -2164,17 +2276,12 @@ ed_get_packet(sc, buf, len) * Note that the interface cannot be in promiscuous mode if * there are no BPF listeners. And if we are in promiscuous * mode, we have to check if this packet is really ours. - * - * XXX This test does not support multicasts. */ if ((sc->arpcom.ac_if.if_flags & IFF_PROMISC) && bcmp(eh->ether_dhost, sc->arpcom.ac_enaddr, - sizeof(eh->ether_dhost)) != 0 && - bcmp(eh->ether_dhost, etherbroadcastaddr, - sizeof(eh->ether_dhost)) != 0) { - - m_freem(head); - return; + sizeof(eh->ether_dhost)) != 0 && multicast == 0) { + m_freem(head); + return; } } #endif @@ -2209,8 +2316,8 @@ bad: if (head) * This routine is currently Novell-specific. */ void -ed_pio_readmem(sc,src,dst,amount) - struct ed_softc *sc; +ed_pio_readmem(sc, src, dst, amount) + struct ed_softc *sc; unsigned short src; unsigned char *dst; unsigned short amount; @@ -2218,24 +2325,25 @@ ed_pio_readmem(sc,src,dst,amount) unsigned short tmp_amount; /* select page 0 registers */ - outb(sc->nic_addr + ED_P0_CR, ED_CR_RD2|ED_CR_STA); + outb(sc->nic_addr + ED_P0_CR, ED_CR_RD2 | ED_CR_STA); /* round up to a word */ tmp_amount = amount; - if (amount & 1) ++amount; + if (amount & 1) + ++amount; /* set up DMA byte count */ outb(sc->nic_addr + ED_P0_RBCR0, amount); - outb(sc->nic_addr + ED_P0_RBCR1, amount>>8); + outb(sc->nic_addr + ED_P0_RBCR1, amount >> 8); /* set up source address in NIC mem */ outb(sc->nic_addr + ED_P0_RSAR0, src); - outb(sc->nic_addr + ED_P0_RSAR1, src>>8); + outb(sc->nic_addr + ED_P0_RSAR1, src >> 8); outb(sc->nic_addr + ED_P0_CR, ED_CR_RD0 | ED_CR_STA); if (sc->isa16bit) { - insw(sc->asic_addr + ED_NOVELL_DATA, dst, amount/2); + insw(sc->asic_addr + ED_NOVELL_DATA, dst, amount / 2); } else insb(sc->asic_addr + ED_NOVELL_DATA, dst, amount); @@ -2247,41 +2355,42 @@ ed_pio_readmem(sc,src,dst,amount) * be even. */ void -ed_pio_writemem(sc,src,dst,len) +ed_pio_writemem(sc, src, dst, len) struct ed_softc *sc; - char *src; + char *src; unsigned short dst; unsigned short len; { - int maxwait=100; /* about 120us */ + int maxwait = 100; /* about 120us */ /* select page 0 registers */ - outb(sc->nic_addr + ED_P0_CR, ED_CR_RD2|ED_CR_STA); + outb(sc->nic_addr + ED_P0_CR, ED_CR_RD2 | ED_CR_STA); /* reset remote DMA complete flag */ outb(sc->nic_addr + ED_P0_ISR, ED_ISR_RDC); /* set up DMA byte count */ outb(sc->nic_addr + ED_P0_RBCR0, len); - outb(sc->nic_addr + ED_P0_RBCR1, len>>8); + outb(sc->nic_addr + ED_P0_RBCR1, len >> 8); /* set up destination address in NIC mem */ outb(sc->nic_addr + ED_P0_RSAR0, dst); - outb(sc->nic_addr + ED_P0_RSAR1, dst>>8); + outb(sc->nic_addr + ED_P0_RSAR1, dst >> 8); /* set remote DMA write */ outb(sc->nic_addr + ED_P0_CR, ED_CR_RD1 | ED_CR_STA); if (sc->isa16bit) - outsw(sc->asic_addr + ED_NOVELL_DATA, src, len/2); + outsw(sc->asic_addr + ED_NOVELL_DATA, src, len / 2); else outsb(sc->asic_addr + ED_NOVELL_DATA, src, len); + /* * Wait for remote DMA complete. This is necessary because on the - * transmit side, data is handled internally by the NIC in bursts - * and we can't start another remote DMA until this one completes. - * Not waiting causes really bad things to happen - like the NIC - * irrecoverably jamming the ISA bus. + * transmit side, data is handled internally by the NIC in bursts and + * we can't start another remote DMA until this one completes. Not + * waiting causes really bad things to happen - like the NIC + * irrecoverably jamming the ISA bus. */ while (((inb(sc->nic_addr + ED_P0_ISR) & ED_ISR_RDC) != ED_ISR_RDC) && --maxwait); } @@ -2291,7 +2400,7 @@ ed_pio_writemem(sc,src,dst,len) * programmed I/O. */ u_short -ed_pio_write_mbufs(sc,m,dst) +ed_pio_write_mbufs(sc, m, dst) struct ed_softc *sc; struct mbuf *m; unsigned short dst; @@ -2299,40 +2408,40 @@ ed_pio_write_mbufs(sc,m,dst) unsigned short len, mb_offset; struct mbuf *mp; unsigned char residual[2]; - int maxwait=100; /* about 120us */ + int maxwait = 100; /* about 120us */ /* First, count up the total number of bytes to copy */ for (len = 0, mp = m; mp; mp = mp->m_next) len += mp->m_len; - + /* select page 0 registers */ - outb(sc->nic_addr + ED_P0_CR, ED_CR_RD2|ED_CR_STA); + outb(sc->nic_addr + ED_P0_CR, ED_CR_RD2 | ED_CR_STA); /* reset remote DMA complete flag */ outb(sc->nic_addr + ED_P0_ISR, ED_ISR_RDC); /* set up DMA byte count */ outb(sc->nic_addr + ED_P0_RBCR0, len); - outb(sc->nic_addr + ED_P0_RBCR1, len>>8); + outb(sc->nic_addr + ED_P0_RBCR1, len >> 8); /* set up destination address in NIC mem */ outb(sc->nic_addr + ED_P0_RSAR0, dst); - outb(sc->nic_addr + ED_P0_RSAR1, dst>>8); + outb(sc->nic_addr + ED_P0_RSAR1, dst >> 8); /* set remote DMA write */ outb(sc->nic_addr + ED_P0_CR, ED_CR_RD1 | ED_CR_STA); mb_offset = 0; + /* - * Transfer the mbuf chain to the NIC memory. - * The following code isn't too pretty. The problem is that we can only - * transfer words to the board, and if an mbuf has an odd number - * of bytes in it, this is a problem. It's not a simple matter of - * just removing a byte from the next mbuf (adjusting data++ and - * len--) because this will hose-over the mbuf chain which might - * be needed later for BPF. Instead, we maintain an offset - * (mb_offset) which let's us skip over the first byte in the - * following mbuf. + * Transfer the mbuf chain to the NIC memory. The following code isn't + * too pretty. The problem is that we can only transfer words to the + * board, and if an mbuf has an odd number of bytes in it, this is a + * problem. It's not a simple matter of just removing a byte from the + * next mbuf (adjusting data++ and len--) because this will hose-over + * the mbuf chain which might be needed later for BPF. Instead, we + * maintain an offset (mb_offset) which let's us skip over the first + * byte in the following mbuf. */ while (m) { if (m->m_len - mb_offset) { @@ -2343,24 +2452,27 @@ ed_pio_write_mbufs(sc,m,dst) (m->m_len - mb_offset) / 2); /* - * if odd number of bytes, get the odd byte from - * the next mbuf with data + * if odd number of bytes, get the odd byte + * from the next mbuf with data */ if ((m->m_len - mb_offset) & 1) { /* first the last byte in current mbuf */ residual[0] = *(mtod(m, caddr_t) + - m->m_len - 1); - + m->m_len - 1); + /* advance past any empty mbufs */ while (m->m_next && (m->m_next->m_len == 0)) m = m->m_next; if (m->m_next) { - /* remove first byte in next mbuf */ + + /* + * remove first byte in next + * mbuf + */ residual[1] = *(mtod(m->m_next, caddr_t)); mb_offset = 1; } - outw(sc->asic_addr + ED_NOVELL_DATA, *((unsigned short *) residual)); } else @@ -2374,10 +2486,10 @@ ed_pio_write_mbufs(sc,m,dst) /* * Wait for remote DMA complete. This is necessary because on the - * transmit side, data is handled internally by the NIC in bursts - * and we can't start another remote DMA until this one completes. - * Not waiting causes really bad things to happen - like the NIC - * irrecoverably jamming the ISA bus. + * transmit side, data is handled internally by the NIC in bursts and + * we can't start another remote DMA until this one completes. Not + * waiting causes really bad things to happen - like the NIC + * irrecoverably jamming the ISA bus. */ while (((inb(sc->nic_addr + ED_P0_ISR) & ED_ISR_RDC) != ED_ISR_RDC) && --maxwait); @@ -2386,23 +2498,22 @@ ed_pio_write_mbufs(sc,m,dst) sc->arpcom.ac_if.if_unit); ed_reset(sc->arpcom.ac_if.if_unit); } - - return(len); + return (len); } - + /* * Given a source and destination address, copy 'amount' of a packet from * the ring buffer into a linear destination buffer. Takes into account * ring-wrap. */ static inline char * -ed_ring_copy(sc,src,dst,amount) +ed_ring_copy(sc, src, dst, amount) struct ed_softc *sc; - char *src; - char *dst; - u_short amount; + char *src; + char *dst; + u_short amount; { - u_short tmp_amount; + u_short tmp_amount; /* does copy wrap to lower addr in ring buffer? */ if (src + amount > sc->mem_end) { @@ -2410,21 +2521,20 @@ ed_ring_copy(sc,src,dst,amount) /* copy amount up to end of NIC memory */ if (sc->mem_shared) - bcopy(src,dst,tmp_amount); + bcopy(src, dst, tmp_amount); else - ed_pio_readmem(sc,src,dst,tmp_amount); + ed_pio_readmem(sc, src, dst, tmp_amount); amount -= tmp_amount; src = sc->mem_ring; dst += tmp_amount; } - if (sc->mem_shared) bcopy(src, dst, amount); else ed_pio_readmem(sc, src, dst, amount); - return(src + amount); + return (src + amount); } /* @@ -2437,9 +2547,9 @@ ed_ring_copy(sc,src,dst,amount) * amount = amount of data to copy */ struct mbuf * -ed_ring_to_mbuf(sc,src,dst,total_len) +ed_ring_to_mbuf(sc, src, dst, total_len) struct ed_softc *sc; - char *src; + char *src; struct mbuf *dst; u_short total_len; { @@ -2448,18 +2558,19 @@ ed_ring_to_mbuf(sc,src,dst,total_len) while (total_len) { register u_short amount = min(total_len, M_TRAILINGSPACE(m)); - if (amount == 0) { /* no more data in this mbuf, alloc another */ + if (amount == 0) { /* no more data in this mbuf, alloc + * another */ + /* - * If there is enough data for an mbuf cluster, attempt - * to allocate one of those, otherwise, a regular - * mbuf will do. - * Note that a regular mbuf is always required, even if - * we get a cluster - getting a cluster does not - * allocate any mbufs, and one is needed to assign - * the cluster to. The mbuf that has a cluster - * extension can not be used to contain data - only - * the cluster can contain data. - */ + * If there is enough data for an mbuf cluster, + * attempt to allocate one of those, otherwise, a + * regular mbuf will do. Note that a regular mbuf is + * always required, even if we get a cluster - getting + * a cluster does not allocate any mbufs, and one is + * needed to assign the cluster to. The mbuf that has + * a cluster extension can not be used to contain data + * - only the cluster can contain data. + */ dst = m; MGET(m, M_DONTWAIT, MT_DATA); if (m == 0) @@ -2472,7 +2583,6 @@ ed_ring_to_mbuf(sc,src,dst,total_len) dst->m_next = m; amount = min(total_len, M_TRAILINGSPACE(m)); } - src = ed_ring_copy(sc, src, mtod(m, caddr_t) + m->m_len, amount); m->m_len += amount; @@ -2481,4 +2591,162 @@ ed_ring_to_mbuf(sc,src,dst,total_len) } return (m); } + +void +ed_setrcr(ifp, sc) + struct ifnet *ifp; + struct ed_softc *sc; +{ + int i; + + /* set page 1 registers */ + if (sc->is790) { + outb(sc->nic_addr + ED_P0_CR, ED_CR_PAGE_1 | ED_CR_STP); + } else { + outb(sc->nic_addr + ED_P0_CR, ED_CR_PAGE_1 | ED_CR_RD2 | ED_CR_STP); + } + + if (ifp->if_flags & IFF_PROMISC) { + + /* + * Reconfigure the multicast filter. + */ + for (i = 0; i < 8; i++) + outb(sc->nic_addr + ED_P1_MAR0 + i, 0xff); + + /* + * And turn on promiscuous mode. Also enable reception of + * runts and packets with CRC & alignment errors. + */ + /* Set page 0 registers */ + if (sc->is790) { + outb(sc->nic_addr + ED_P0_CR, ED_CR_STP); + } else { + outb(sc->nic_addr + ED_P0_CR, ED_CR_RD2 | ED_CR_STP); + } + outb(sc->nic_addr + ED_P0_RCR, ED_RCR_PRO | ED_RCR_AM | + ED_RCR_AB | ED_RCR_AR | ED_RCR_SEP); + } else { +#ifndef MULTICAST + + /* + * Initialize multicast address hashing registers to not + * accept multicasts. + */ + for (i = 0; i < 8; ++i) + outb(sc->nic_addr + ED_P1_MAR0 + i, 0x00); + + /* Set page 0 registers */ + if (sc->is790) { + outb(sc->nic_addr + ED_P0_CR, ED_CR_STP); + } else { + outb(sc->nic_addr + ED_P0_CR, ED_CR_RD2 | ED_CR_STP); + } + + outb(sc->nic_addr + ED_P0_RCR, ED_RCR_AB); +#else + /* set up multicast addresses and filter modes */ + if (ifp->if_flags & IFF_MULTICAST) { + u_long mcaf[2]; + + if (ifp->if_flags & IFF_ALLMULTI) { + mcaf[0] = 0xffffffff; + mcaf[1] = 0xffffffff; + } else + ds_getmcaf(sc, mcaf); + + /* + * Set multicast filter on chip. + */ + for (i = 0; i < 8; i++) + outb(sc->nic_addr + ED_P1_MAR0 + i, ((u_char *) mcaf)[i]); + + /* Set page 0 registers */ + if (sc->is790) { + outb(sc->nic_addr + ED_P0_CR, ED_CR_STP); + } else { + outb(sc->nic_addr + ED_P0_CR, ED_CR_RD2 | ED_CR_STP); + } + + outb(sc->nic_addr + ED_P0_RCR, ED_RCR_AM | ED_RCR_AB); + } else { + + /* + * Initialize multicast address hashing registers to + * not accept multicasts. + */ + for (i = 0; i < 8; ++i) + outb(sc->nic_addr + ED_P1_MAR0 + i, 0x00); + + /* Set page 0 registers */ + if (sc->is790) { + outb(sc->nic_addr + ED_P0_CR, ED_CR_STP); + } else { + outb(sc->nic_addr + ED_P0_CR, ED_CR_RD2 | ED_CR_STP); + } + + outb(sc->nic_addr + ED_P0_RCR, ED_RCR_AB); + } +#endif /* MULTICAST */ + } +} + +#ifdef MULTICAST +/* + * Compute crc for ethernet address + */ +u_long +ds_crc(ep) + u_char *ep; +{ +#define POLYNOMIAL 0x04c11db6 + register u_long crc = 0xffffffffL; + register int carry, i, j; + register u_char b; + + for (i = 6; --i >= 0;) { + b = *ep++; + for (j = 8; --j >= 0;) { + carry = ((crc & 0x80000000L) ? 1 : 0) ^ (b & 0x01); + crc <<= 1; + b >>= 1; + if (carry) + crc = ((crc ^ POLYNOMIAL) | carry); + } + } + return crc; +#undef POLYNOMIAL +} + +/* + * Compute the multicast address filter from the + * list of multicast addresses we need to listen to. + */ +void +ds_getmcaf(sc, mcaf) + struct ed_softc *sc; + u_long *mcaf; +{ + register u_int index; + register u_char *af = (u_char *) mcaf; + register struct ether_multi *enm; + register struct ether_multistep step; + + mcaf[0] = 0; + mcaf[1] = 0; + + ETHER_FIRST_MULTI(step, &sc->arpcom, enm); + while (enm != NULL) { + if (bcmp(enm->enm_addrlo, enm->enm_addrhi, 6) != 0) { + mcaf[0] = 0xffffffff; + mcaf[1] = 0xffffffff; + return; + } + index = ds_crc(enm->enm_addrlo, 6) >> 26; + af[index >> 3] |= 1 << (index & 7); + + ETHER_NEXT_MULTI(step, enm); + } +} +#endif #endif diff --git a/sys/dev/ed/if_edreg.h b/sys/dev/ed/if_edreg.h index f691a6e..1d56fdc 100644 --- a/sys/dev/ed/if_edreg.h +++ b/sys/dev/ed/if_edreg.h @@ -6,7 +6,7 @@ * of this software, nor does the author assume any responsibility * for damages incurred with its use. * - * $Id: if_edreg.h,v 1.14 1994/04/10 20:06:28 davidg Exp $ + * $Id: if_edreg.h,v 1.15 1994/08/02 07:39:30 davidg Exp $ */ /* * National Semiconductor DS8390 NIC register definitions @@ -547,19 +547,11 @@ * A contiguous portion of those blocks are marked for receive packets * by setting start and end block #'s in the NIC. For each packet that * is put into the receive ring, one of these headers (4 bytes each) is - * tacked onto the front. + * tacked onto the front. The first byte is a copy of the receiver status + * register at the time the packet was received. */ struct ed_ring { - struct edr_status { /* received packet status */ - u_char rs_prx:1, /* packet received intack */ - rs_crc:1, /* crc error */ - rs_fae:1, /* frame alignment error */ - rs_fo:1, /* fifo overrun */ - rs_mpa:1, /* packet received intack */ - rs_phy:1, /* packet received intack */ - rs_dis:1, /* packet received intack */ - rs_dfr:1; /* packet received intack */ - } ed_rcv_status; /* received packet status */ + u_char rsr; /* receiver status */ u_char next_packet; /* pointer to next packet */ u_short count; /* bytes in packet (length + 4) */ }; diff --git a/sys/i386/isa/if_ed.c b/sys/i386/isa/if_ed.c index 572cc1f..77352a5 100644 --- a/sys/i386/isa/if_ed.c +++ b/sys/i386/isa/if_ed.c @@ -13,7 +13,7 @@ * the SMC Elite Ultra (8216), the 3Com 3c503, the NE1000 and NE2000, * and a variety of similar clones. * - * $Id: if_ed.c,v 1.38 1994/05/25 08:59:02 rgrimes Exp $ + * $Id: if_ed.c,v 1.39 1994/08/02 07:39:28 davidg Exp $ */ #include "ed.h" @@ -62,67 +62,75 @@ #ifndef IFF_ALTPHYS #define IFF_ALTPHYS IFF_LINK0 #endif - + /* * ed_softc: per line info and status */ -struct ed_softc { - struct arpcom arpcom; /* ethernet common */ +struct ed_softc { + struct arpcom arpcom; /* ethernet common */ - char *type_str; /* pointer to type string */ - u_char vendor; /* interface vendor */ - u_char type; /* interface type code */ + char *type_str; /* pointer to type string */ + u_char vendor; /* interface vendor */ + u_char type; /* interface type code */ - u_short asic_addr; /* ASIC I/O bus address */ - u_short nic_addr; /* NIC (DS8390) I/O bus address */ + u_short asic_addr; /* ASIC I/O bus address */ + u_short nic_addr; /* NIC (DS8390) I/O bus address */ /* * The following 'proto' variable is part of a work-around for 8013EBT asics * being write-only. It's sort of a prototype/shadow of the real thing. */ - u_char wd_laar_proto; - u_char isa16bit; /* width of access to card 0=8 or 1=16 */ - int is790; /* set by the probe code if the card is 790 based */ - - caddr_t bpf; /* BPF "magic cookie" */ - caddr_t mem_start; /* NIC memory start address */ - caddr_t mem_end; /* NIC memory end address */ - u_long mem_size; /* total NIC memory size */ - caddr_t mem_ring; /* start of RX ring-buffer (in NIC mem) */ - - u_char mem_shared; /* NIC memory is shared with host */ - u_char xmit_busy; /* transmitter is busy */ - u_char txb_cnt; /* number of transmit buffers */ - u_char txb_inuse; /* number of TX buffers currently in-use*/ - - u_char txb_new; /* pointer to where new buffer will be added */ - u_char txb_next_tx; /* pointer to next buffer ready to xmit */ - u_short txb_len[8]; /* buffered xmit buffer lengths */ - u_char tx_page_start; /* first page of TX buffer area */ - u_char rec_page_start; /* first page of RX ring-buffer */ - u_char rec_page_stop; /* last page of RX ring-buffer */ - u_char next_packet; /* pointer to next unread RX packet */ -} ed_softc[NED]; - -int ed_attach(struct isa_device *); -void ed_init(int); -void edintr(int); -int ed_ioctl(struct ifnet *, int, caddr_t); -int ed_probe(struct isa_device *); -void ed_start(struct ifnet *); -void ed_reset(int); -void ed_watchdog(int); - -static void ed_get_packet(struct ed_softc *, char *, int /*u_short*/); + u_char wd_laar_proto; + u_char isa16bit; /* width of access to card 0=8 or 1=16 */ + int is790; /* set by the probe code if the card is 790 + * based */ + + caddr_t bpf; /* BPF "magic cookie" */ + caddr_t mem_start; /* NIC memory start address */ + caddr_t mem_end; /* NIC memory end address */ + u_long mem_size; /* total NIC memory size */ + caddr_t mem_ring; /* start of RX ring-buffer (in NIC mem) */ + + u_char mem_shared; /* NIC memory is shared with host */ + u_char xmit_busy; /* transmitter is busy */ + u_char txb_cnt; /* number of transmit buffers */ + u_char txb_inuse; /* number of TX buffers currently in-use */ + + u_char txb_new; /* pointer to where new buffer will be added */ + u_char txb_next_tx; /* pointer to next buffer ready to xmit */ + u_short txb_len[8]; /* buffered xmit buffer lengths */ + u_char tx_page_start; /* first page of TX buffer area */ + u_char rec_page_start; /* first page of RX ring-buffer */ + u_char rec_page_stop; /* last page of RX ring-buffer */ + u_char next_packet; /* pointer to next unread RX packet */ +} ed_softc[NED]; + +int ed_attach(struct isa_device *); +void ed_init(int); +void edintr(int); +int ed_ioctl(struct ifnet *, int, caddr_t); +int ed_probe(struct isa_device *); +void ed_start(struct ifnet *); +void ed_reset(int); +void ed_watchdog(int); + +#ifdef MULTICAST +void ds_getmcaf(); + +#endif + +static void ed_get_packet(struct ed_softc *, char *, int /* u_short */ , int); static void ed_stop(int); static inline void ed_rint(); static inline void ed_xmit(); static inline char *ed_ring_copy(); -void ed_pio_readmem(), ed_pio_writemem(); +void ed_pio_readmem(), ed_pio_writemem(); u_short ed_pio_write_mbufs(); +void ed_setrcr(struct ifnet *, struct ed_softc *); + extern int ether_output(); struct trailer_header { @@ -135,7 +143,8 @@ struct isa_driver eddriver = { ed_attach, "ed" }; -/* + +/* * Interrupt conversion table for WD/SMC ASIC * (IRQ* are defined in icu.h) */ @@ -149,7 +158,7 @@ static unsigned short ed_intr_mask[] = { IRQ15, IRQ4 }; - + /* * Interrupt conversion table for 585/790 Combo */ @@ -163,6 +172,7 @@ static unsigned short ed_790_intr_mask[] = { IRQ11, IRQ15 }; + #define ETHER_MIN_LEN 64 #define ETHER_MAX_LEN 1518 #define ETHER_ADDR_LEN 6 @@ -182,7 +192,7 @@ ed_probe(isa_dev) struct isa_device *isa_dev; { struct ed_softc *sc = &ed_softc[isa_dev->id_unit]; - int nports; + int nports; if (nports = ed_probe_WD80x3(isa_dev)) return (nports); @@ -193,7 +203,7 @@ ed_probe(isa_dev) if (nports = ed_probe_Novell(isa_dev)) return (nports); - return(0); + return (0); } /* @@ -216,7 +226,7 @@ ed_probe(isa_dev) * the others would require changing register pages (which would be * intrusive if this isn't an 8390). * - * Return 1 if 8390 was found, 0 if not. + * Return 1 if 8390 was found, 0 if not. */ int @@ -224,15 +234,15 @@ ed_probe_generic8390(sc) struct ed_softc *sc; { if ((inb(sc->nic_addr + ED_P0_CR) & - (ED_CR_RD2|ED_CR_TXP|ED_CR_STA|ED_CR_STP)) != - (ED_CR_RD2|ED_CR_STP)) + (ED_CR_RD2 | ED_CR_TXP | ED_CR_STA | ED_CR_STP)) != + (ED_CR_RD2 | ED_CR_STP)) return (0); if ((inb(sc->nic_addr + ED_P0_ISR) & ED_ISR_RST) != ED_ISR_RST) return (0); - return(1); + return (1); } - + /* * Probe and vendor-specific initialization routine for SMC/WD80x3 boards */ @@ -241,9 +251,9 @@ ed_probe_WD80x3(isa_dev) struct isa_device *isa_dev; { struct ed_softc *sc = &ed_softc[isa_dev->id_unit]; - int i; - u_int memsize; - u_char iptr, isa16bit, sum; + int i; + u_int memsize; + u_char iptr, isa16bit, sum; sc->asic_addr = isa_dev->id_iobase; sc->nic_addr = sc->asic_addr + ED_WD_NIC_OFFSET; @@ -253,26 +263,27 @@ ed_probe_WD80x3(isa_dev) outb(sc->asic_addr + ED_WD_MSR, ED_WD_MSR_POW); DELAY(10000); #endif + /* - * Attempt to do a checksum over the station address PROM. - * If it fails, it's probably not a SMC/WD board. There - * is a problem with this, though: some clone WD boards - * don't pass the checksum test. Danpex boards for one. + * Attempt to do a checksum over the station address PROM. If it + * fails, it's probably not a SMC/WD board. There is a problem with + * this, though: some clone WD boards don't pass the checksum test. + * Danpex boards for one. */ for (sum = 0, i = 0; i < 8; ++i) sum += inb(sc->asic_addr + ED_WD_PROM + i); if (sum != ED_WD_ROM_CHECKSUM_TOTAL) { + /* - * Checksum is invalid. This often happens with cheap - * WD8003E clones. In this case, the checksum byte - * (the eighth byte) seems to always be zero. + * Checksum is invalid. This often happens with cheap WD8003E + * clones. In this case, the checksum byte (the eighth byte) + * seems to always be zero. */ if (inb(sc->asic_addr + ED_WD_CARD_ID) != ED_TYPE_WD8003E || inb(sc->asic_addr + ED_WD_PROM + 7) != 0) - return(0); + return (0); } - /* reset card to force it into a known state. */ #ifdef TOSH_ETHER outb(sc->asic_addr + ED_WD_MSR, ED_WD_MSR_RST | ED_WD_MSR_POW); @@ -315,7 +326,7 @@ ed_probe_WD80x3(isa_dev) memsize = 16384; isa16bit = 1; break; - case ED_TYPE_WD8013EP: /* also WD8003EP */ + case ED_TYPE_WD8013EP: /* also WD8003EP */ if (inb(sc->asic_addr + ED_WD_ICR) & ED_WD_ICR_16BIT) { isa16bit = 1; @@ -368,33 +379,35 @@ ed_probe_WD80x3(isa_dev) sc->type_str = ""; break; } + /* - * Make some adjustments to initial values depending on what is - * found in the ICR. + * Make some adjustments to initial values depending on what is found + * in the ICR. */ if (isa16bit && (sc->type != ED_TYPE_WD8013EBT) #ifdef TOSH_ETHER - && (sc->type != ED_TYPE_TOSHIBA1) && (sc->type != ED_TYPE_TOSHIBA4) + && (sc->type != ED_TYPE_TOSHIBA1) && (sc->type != ED_TYPE_TOSHIBA4) #endif && ((inb(sc->asic_addr + ED_WD_ICR) & ED_WD_ICR_16BIT) == 0)) { isa16bit = 0; memsize = 8192; } - #if ED_DEBUG printf("type = %x type_str=%s isa16bit=%d memsize=%d id_msize=%d\n", - sc->type,sc->type_str,isa16bit,memsize,isa_dev->id_msize); - for (i=0; i<8; i++) + sc->type, sc->type_str, isa16bit, memsize, isa_dev->id_msize); + for (i = 0; i < 8; i++) printf("%x -> %x\n", i, inb(sc->asic_addr + i)); #endif + /* * Allow the user to override the autoconfiguration */ if (isa_dev->id_msize) memsize = isa_dev->id_msize; + /* - * (note that if the user specifies both of the following flags - * that '8bit' mode intentionally has precedence) + * (note that if the user specifies both of the following flags that + * '8bit' mode intentionally has precedence) */ if (isa_dev->id_flags & ED_FLAGS_FORCE_16BIT_MODE) isa16bit = 1; @@ -403,60 +416,66 @@ ed_probe_WD80x3(isa_dev) /* * Check 83C584 interrupt configuration register if this board has one - * XXX - we could also check the IO address register. But why - * bother...if we get past this, it *has* to be correct. + * XXX - we could also check the IO address register. But why + * bother...if we get past this, it *has* to be correct. */ if ((sc->type & ED_WD_SOFTCONFIG) && (!sc->is790)) { + /* * Assemble together the encoded interrupt number. */ iptr = (inb(isa_dev->id_iobase + ED_WD_ICR) & ED_WD_ICR_IR2) | - ((inb(isa_dev->id_iobase + ED_WD_IRR) & - (ED_WD_IRR_IR0 | ED_WD_IRR_IR1)) >> 5); + ((inb(isa_dev->id_iobase + ED_WD_IRR) & + (ED_WD_IRR_IR0 | ED_WD_IRR_IR1)) >> 5); + /* - * Translate it using translation table, and check for correctness. + * Translate it using translation table, and check for + * correctness. */ if (ed_intr_mask[iptr] != isa_dev->id_irq) { printf("ed%d: kernel configured irq %d doesn't match board configured irq %d\n", - isa_dev->id_unit, ffs(isa_dev->id_irq) - 1, - ffs(ed_intr_mask[iptr]) - 1); - return(0); + isa_dev->id_unit, ffs(isa_dev->id_irq) - 1, + ffs(ed_intr_mask[iptr]) - 1); + return (0); } + /* * Enable the interrupt. */ outb(isa_dev->id_iobase + ED_WD_IRR, - inb(isa_dev->id_iobase + ED_WD_IRR) | ED_WD_IRR_IEN); + inb(isa_dev->id_iobase + ED_WD_IRR) | ED_WD_IRR_IEN); } if (sc->is790) { outb(isa_dev->id_iobase + ED_WD790_HWR, - inb(isa_dev->id_iobase + ED_WD790_HWR) | ED_WD790_HWR_SWH); + inb(isa_dev->id_iobase + ED_WD790_HWR) | ED_WD790_HWR_SWH); iptr = (((inb(isa_dev->id_iobase + ED_WD790_GCR) & ED_WD790_GCR_IR2) >> 4) | - (inb(isa_dev->id_iobase + ED_WD790_GCR) & - (ED_WD790_GCR_IR1|ED_WD790_GCR_IR0)) >> 2); + (inb(isa_dev->id_iobase + ED_WD790_GCR) & + (ED_WD790_GCR_IR1 | ED_WD790_GCR_IR0)) >> 2); outb(isa_dev->id_iobase + ED_WD790_HWR, - inb(isa_dev->id_iobase + ED_WD790_HWR) & ~ED_WD790_HWR_SWH); + inb(isa_dev->id_iobase + ED_WD790_HWR) & ~ED_WD790_HWR_SWH); if (ed_790_intr_mask[iptr] != isa_dev->id_irq) { printf("ed%d: kernel configured irq %d doesn't match board configured irq %d %d\n", - isa_dev->id_unit, ffs(isa_dev->id_irq) - 1, - ffs(ed_790_intr_mask[iptr]) - 1, iptr); + isa_dev->id_unit, ffs(isa_dev->id_irq) - 1, + ffs(ed_790_intr_mask[iptr]) - 1, iptr); return 0; } + /* * Enable interrupts. */ outb(isa_dev->id_iobase + ED_WD790_ICR, - inb(isa_dev->id_iobase + ED_WD790_ICR) | ED_WD790_ICR_EIL); + inb(isa_dev->id_iobase + ED_WD790_ICR) | ED_WD790_ICR_EIL); } - sc->isa16bit = isa16bit; -#ifdef notyet /* XXX - I'm not sure if PIO mode is even possible on WD/SMC boards */ +/* XXX - I'm not sure if PIO mode is even possible on WD/SMC boards */ +#ifdef notyet + /* * The following allows the WD/SMC boards to be used in Programmed I/O - * mode - without mapping the NIC memory shared. ...Not the prefered - * way, but it might be the only way. + * mode - without mapping the NIC memory shared. ...Not the prefered + * way, but it might be the only way. */ if (isa_dev->id_flags & ED_FLAGS_FORCE_PIO) { sc->mem_shared = 0; @@ -469,7 +488,7 @@ ed_probe_WD80x3(isa_dev) #endif isa_dev->id_msize = memsize; - sc->mem_start = (caddr_t)isa_dev->id_maddr; + sc->mem_start = (caddr_t) isa_dev->id_maddr; /* * allocate one xmit buffer if < 16k, two buffers otherwise @@ -495,27 +514,6 @@ ed_probe_WD80x3(isa_dev) sc->arpcom.ac_enaddr[i] = inb(sc->asic_addr + ED_WD_PROM + i); if (sc->mem_shared) { - /* - * Set address and enable interface shared memory. - */ - if(!sc->is790) { -#ifdef TOSH_ETHER - outb(sc->asic_addr + ED_WD_MSR + 1, ((kvtop(sc->mem_start) >> 8) & 0xe0) | 4); - outb(sc->asic_addr + ED_WD_MSR + 2, ((kvtop(sc->mem_start) >> 16) & 0x0f)); - outb(sc->asic_addr + ED_WD_MSR, ED_WD_MSR_MENB | ED_WD_MSR_POW); - -#else - outb(sc->asic_addr + ED_WD_MSR, ((kvtop(sc->mem_start) >> 13) & - ED_WD_MSR_ADDR) | ED_WD_MSR_MENB); -#endif - } else { - outb(sc->asic_addr + ED_WD_MSR, ED_WD_MSR_MENB); - outb(sc->asic_addr + 0x04, (inb(sc->asic_addr + 0x04) | 0x80)); - outb(sc->asic_addr + 0x0b, ((kvtop(sc->mem_start) >> 13) & 0x0f) | - ((kvtop(sc->mem_start) >> 11) & 0x40) | - (inb(sc->asic_addr + 0x0b) & 0xb0)); - outb(sc->asic_addr + 0x04, (inb(sc->asic_addr + 0x04) & ~0x80)); - } /* * Set upper address bits and 8/16 bit access to shared memory @@ -524,60 +522,83 @@ ed_probe_WD80x3(isa_dev) if (sc->is790) { sc->wd_laar_proto = inb(sc->asic_addr + ED_WD_LAAR); outb(sc->asic_addr + ED_WD_LAAR, ED_WD_LAAR_M16EN); - (void) inb(0x84); } else { outb(sc->asic_addr + ED_WD_LAAR, (sc->wd_laar_proto = - ED_WD_LAAR_L16EN | ED_WD_LAAR_M16EN | - ((kvtop(sc->mem_start) >> 19) & ED_WD_LAAR_ADDRHI))); + ED_WD_LAAR_L16EN | ED_WD_LAAR_M16EN | + ((kvtop(sc->mem_start) >> 19) & ED_WD_LAAR_ADDRHI))); } - } else { + } else { if ((sc->type & ED_WD_SOFTCONFIG) || #ifdef TOSH_ETHER (sc->type == ED_TYPE_TOSHIBA1) || (sc->type == ED_TYPE_TOSHIBA4) || #endif (sc->type == ED_TYPE_WD8013EBT) && (!sc->is790)) { outb(sc->asic_addr + ED_WD_LAAR, (sc->wd_laar_proto = - ((kvtop(sc->mem_start) >> 19) & ED_WD_LAAR_ADDRHI))); + ((kvtop(sc->mem_start) >> 19) & ED_WD_LAAR_ADDRHI))); } } /* + * Set address and enable interface shared memory. + */ + if (!sc->is790) { +#ifdef TOSH_ETHER + outb(sc->asic_addr + ED_WD_MSR + 1, ((kvtop(sc->mem_start) >> 8) & 0xe0) | 4); + outb(sc->asic_addr + ED_WD_MSR + 2, ((kvtop(sc->mem_start) >> 16) & 0x0f)); + outb(sc->asic_addr + ED_WD_MSR, ED_WD_MSR_MENB | ED_WD_MSR_POW); + +#else + outb(sc->asic_addr + ED_WD_MSR, ((kvtop(sc->mem_start) >> 13) & + ED_WD_MSR_ADDR) | ED_WD_MSR_MENB); +#endif + } else { + outb(sc->asic_addr + ED_WD_MSR, ED_WD_MSR_MENB); + outb(sc->asic_addr + 0x04, (inb(sc->asic_addr + 0x04) | 0x80)); + outb(sc->asic_addr + 0x0b, ((kvtop(sc->mem_start) >> 13) & 0x0f) | + ((kvtop(sc->mem_start) >> 11) & 0x40) | + (inb(sc->asic_addr + 0x0b) & 0xb0)); + outb(sc->asic_addr + 0x04, (inb(sc->asic_addr + 0x04) & ~0x80)); + } + + /* * Now zero memory and verify that it is clear */ bzero(sc->mem_start, memsize); for (i = 0; i < memsize; ++i) if (sc->mem_start[i]) { - printf("ed%d: failed to clear shared memory at %x - check configuration\n", - isa_dev->id_unit, kvtop(sc->mem_start + i)); + printf("ed%d: failed to clear shared memory at %x - check configuration\n", + isa_dev->id_unit, kvtop(sc->mem_start + i)); /* * Disable 16 bit access to shared memory */ if (isa16bit) { + if (sc->is790) { + outb(sc->asic_addr + ED_WD_MSR, 0x00); + } outb(sc->asic_addr + ED_WD_LAAR, (sc->wd_laar_proto &= - ~ED_WD_LAAR_M16EN)); - (void) inb(0x84); + ~ED_WD_LAAR_M16EN)); } - - return(0); + return (0); } - + /* - * Disable 16bit access to shared memory - we leave it disabled so - * that 1) machines reboot properly when the board is set - * 16 bit mode and there are conflicting 8bit devices/ROMS - * in the same 128k address space as this boards shared - * memory. and 2) so that other 8 bit devices with shared - * memory can be used in this 128k region, too. + * Disable 16bit access to shared memory - we leave it + * disabled so that 1) machines reboot properly when the board + * is set 16 bit mode and there are conflicting 8bit + * devices/ROMS in the same 128k address space as this boards + * shared memory. and 2) so that other 8 bit devices with + * shared memory can be used in this 128k region, too. */ if (isa16bit) { + if (sc->is790) { + outb(sc->asic_addr + ED_WD_MSR, 0x00); + } outb(sc->asic_addr + ED_WD_LAAR, (sc->wd_laar_proto &= - ~ED_WD_LAAR_M16EN)); - (void) inb(0x84); + ~ED_WD_LAAR_M16EN)); } } - return (ED_WD_IO_PORTS); } @@ -589,84 +610,84 @@ ed_probe_3Com(isa_dev) struct isa_device *isa_dev; { struct ed_softc *sc = &ed_softc[isa_dev->id_unit]; - int i; - u_int memsize; - u_char isa16bit, sum; + int i; + u_int memsize; + u_char isa16bit, sum; sc->asic_addr = isa_dev->id_iobase + ED_3COM_ASIC_OFFSET; sc->nic_addr = isa_dev->id_iobase + ED_3COM_NIC_OFFSET; /* * Verify that the kernel configured I/O address matches the board - * configured address + * configured address */ switch (inb(sc->asic_addr + ED_3COM_BCFR)) { case ED_3COM_BCFR_300: if (isa_dev->id_iobase != 0x300) - return(0); + return (0); break; case ED_3COM_BCFR_310: if (isa_dev->id_iobase != 0x310) - return(0); + return (0); break; case ED_3COM_BCFR_330: if (isa_dev->id_iobase != 0x330) - return(0); + return (0); break; case ED_3COM_BCFR_350: if (isa_dev->id_iobase != 0x350) - return(0); + return (0); break; case ED_3COM_BCFR_250: if (isa_dev->id_iobase != 0x250) - return(0); + return (0); break; case ED_3COM_BCFR_280: if (isa_dev->id_iobase != 0x280) - return(0); + return (0); break; case ED_3COM_BCFR_2A0: if (isa_dev->id_iobase != 0x2a0) - return(0); + return (0); break; case ED_3COM_BCFR_2E0: if (isa_dev->id_iobase != 0x2e0) - return(0); + return (0); break; default: - return(0); + return (0); } /* - * Verify that the kernel shared memory address matches the - * board configured address. + * Verify that the kernel shared memory address matches the board + * configured address. */ switch (inb(sc->asic_addr + ED_3COM_PCFR)) { case ED_3COM_PCFR_DC000: if (kvtop(isa_dev->id_maddr) != 0xdc000) - return(0); + return (0); break; case ED_3COM_PCFR_D8000: if (kvtop(isa_dev->id_maddr) != 0xd8000) - return(0); + return (0); break; case ED_3COM_PCFR_CC000: if (kvtop(isa_dev->id_maddr) != 0xcc000) - return(0); + return (0); break; case ED_3COM_PCFR_C8000: if (kvtop(isa_dev->id_maddr) != 0xc8000) - return(0); + return (0); break; default: - return(0); + return (0); } /* * Reset NIC and ASIC. Enable on-board transceiver throughout reset - * sequence because it'll lock up if the cable isn't connected - * if we don't. + * sequence because it'll lock up if the cable isn't connected if we + * don't. */ outb(sc->asic_addr + ED_3COM_CR, ED_3COM_CR_RST | ED_3COM_CR_XSEL); @@ -674,10 +695,11 @@ ed_probe_3Com(isa_dev) * Wait for a while, then un-reset it */ DELAY(50); + /* * The 3Com ASIC defaults to rather strange settings for the CR after - * a reset - it's important to set it again after the following - * outb (this is done when we map the PROM below). + * a reset - it's important to set it again after the following outb + * (this is done when we map the PROM below). */ outb(sc->asic_addr + ED_3COM_CR, ED_3COM_CR_XSEL); @@ -692,17 +714,18 @@ ed_probe_3Com(isa_dev) sc->mem_shared = 1; /* - * Hmmm...a 16bit 3Com board has 16k of memory, but only an 8k - * window to it. + * Hmmm...a 16bit 3Com board has 16k of memory, but only an 8k window + * to it. */ memsize = 8192; /* * Get station address from on-board ROM */ + /* * First, map ethernet address PROM over the top of where the NIC - * registers normally appear. + * registers normally appear. */ outb(sc->asic_addr + ED_3COM_CR, ED_3COM_CR_EALO | ED_3COM_CR_XSEL); @@ -711,9 +734,8 @@ ed_probe_3Com(isa_dev) /* * Unmap PROM - select NIC registers. The proper setting of the - * tranceiver is set in ed_init so that the attach code - * is given a chance to set the default based on a compile-time - * config option + * tranceiver is set in ed_init so that the attach code is given a + * chance to set the default based on a compile-time config option */ outb(sc->asic_addr + ED_3COM_CR, ED_3COM_CR_XSEL); @@ -724,18 +746,18 @@ ed_probe_3Com(isa_dev) /* * select page 0 registers */ - outb(sc->nic_addr + ED_P0_CR, ED_CR_RD2|ED_CR_STP); + outb(sc->nic_addr + ED_P0_CR, ED_CR_RD2 | ED_CR_STP); /* - * Attempt to clear WTS bit. If it doesn't clear, then this is a - * 16bit board. + * Attempt to clear WTS bit. If it doesn't clear, then this is a 16bit + * board. */ outb(sc->nic_addr + ED_P0_DCR, 0); /* * select page 2 registers */ - outb(sc->nic_addr + ED_P0_CR, ED_CR_PAGE_2|ED_CR_RD2|ED_CR_STP); + outb(sc->nic_addr + ED_P0_CR, ED_CR_PAGE_2 | ED_CR_RD2 | ED_CR_STP); /* * The 3c503 forces the WTS bit to a one if this is a 16bit board @@ -748,24 +770,23 @@ ed_probe_3Com(isa_dev) /* * select page 0 registers */ - outb(sc->nic_addr + ED_P2_CR, ED_CR_RD2|ED_CR_STP); + outb(sc->nic_addr + ED_P2_CR, ED_CR_RD2 | ED_CR_STP); - sc->mem_start = (caddr_t)isa_dev->id_maddr; + sc->mem_start = (caddr_t) isa_dev->id_maddr; sc->mem_size = memsize; sc->mem_end = sc->mem_start + memsize; /* * We have an entire 8k window to put the transmit buffers on the - * 16bit boards. But since the 16bit 3c503's shared memory - * is only fast enough to overlap the loading of one full-size - * packet, trying to load more than 2 buffers can actually - * leave the transmitter idle during the load. So 2 seems - * the best value. (Although a mix of variable-sized packets - * might change this assumption. Nonetheless, we optimize for - * linear transfers of same-size packets.) + * 16bit boards. But since the 16bit 3c503's shared memory is only + * fast enough to overlap the loading of one full-size packet, trying + * to load more than 2 buffers can actually leave the transmitter idle + * during the load. So 2 seems the best value. (Although a mix of + * variable-sized packets might change this assumption. Nonetheless, + * we optimize for linear transfers of same-size packets.) */ if (isa16bit) { - if (isa_dev->id_flags & ED_FLAGS_NO_MULTI_BUFFERING) + if (isa_dev->id_flags & ED_FLAGS_NO_MULTI_BUFFERING) sc->txb_cnt = 1; else sc->txb_cnt = 2; @@ -773,22 +794,22 @@ ed_probe_3Com(isa_dev) sc->tx_page_start = ED_3COM_TX_PAGE_OFFSET_16BIT; sc->rec_page_start = ED_3COM_RX_PAGE_OFFSET_16BIT; sc->rec_page_stop = memsize / ED_PAGE_SIZE + - ED_3COM_RX_PAGE_OFFSET_16BIT; + ED_3COM_RX_PAGE_OFFSET_16BIT; sc->mem_ring = sc->mem_start; } else { sc->txb_cnt = 1; sc->tx_page_start = ED_3COM_TX_PAGE_OFFSET_8BIT; sc->rec_page_start = ED_TXBUF_SIZE + ED_3COM_TX_PAGE_OFFSET_8BIT; sc->rec_page_stop = memsize / ED_PAGE_SIZE + - ED_3COM_TX_PAGE_OFFSET_8BIT; + ED_3COM_TX_PAGE_OFFSET_8BIT; sc->mem_ring = sc->mem_start + (ED_PAGE_SIZE * ED_TXBUF_SIZE); } sc->isa16bit = isa16bit; /* - * Initialize GA page start/stop registers. Probably only needed - * if doing DMA, but what the hell. + * Initialize GA page start/stop registers. Probably only needed if + * doing DMA, but what the hell. */ outb(sc->asic_addr + ED_3COM_PSTR, sc->rec_page_start); outb(sc->asic_addr + ED_3COM_PSPR, sc->rec_page_stop); @@ -811,21 +832,22 @@ ed_probe_3Com(isa_dev) break; default: printf("ed%d: Invalid irq configuration (%d) must be 2-5 for 3c503\n", - isa_dev->id_unit, ffs(isa_dev->id_irq) - 1); - return(0); + isa_dev->id_unit, ffs(isa_dev->id_irq) - 1); + return (0); } /* - * Initialize GA configuration register. Set bank and enable shared mem. + * Initialize GA configuration register. Set bank and enable shared + * mem. */ outb(sc->asic_addr + ED_3COM_GACFR, ED_3COM_GACFR_RSEL | - ED_3COM_GACFR_MBS0); + ED_3COM_GACFR_MBS0); /* - * Initialize "Vector Pointer" registers. These gawd-awful things - * are compared to 20 bits of the address on ISA, and if they - * match, the shared memory is disabled. We set them to - * 0xffff0...allegedly the reset vector. + * Initialize "Vector Pointer" registers. These gawd-awful things are + * compared to 20 bits of the address on ISA, and if they match, the + * shared memory is disabled. We set them to 0xffff0...allegedly the + * reset vector. */ outb(sc->asic_addr + ED_3COM_VPTR2, 0xff); outb(sc->asic_addr + ED_3COM_VPTR1, 0xff); @@ -838,13 +860,12 @@ ed_probe_3Com(isa_dev) for (i = 0; i < memsize; ++i) if (sc->mem_start[i]) { - printf("ed%d: failed to clear shared memory at %x - check configuration\n", - isa_dev->id_unit, kvtop(sc->mem_start + i)); - return(0); + printf("ed%d: failed to clear shared memory at %x - check configuration\n", + isa_dev->id_unit, kvtop(sc->mem_start + i)); + return (0); } - isa_dev->id_msize = memsize; - return(ED_3COM_IO_PORTS); + return (ED_3COM_IO_PORTS); } /* @@ -855,10 +876,10 @@ ed_probe_Novell(isa_dev) struct isa_device *isa_dev; { struct ed_softc *sc = &ed_softc[isa_dev->id_unit]; - u_int memsize, n; - u_char romdata[16], isa16bit = 0, tmp; + u_int memsize, n; + u_char romdata[16], isa16bit = 0, tmp; static char test_pattern[32] = "THIS is A memory TEST pattern"; - char test_buffer[32]; + char test_buffer[32]; sc->asic_addr = isa_dev->id_iobase + ED_NOVELL_ASIC_OFFSET; sc->nic_addr = isa_dev->id_iobase + ED_NOVELL_NIC_OFFSET; @@ -866,50 +887,54 @@ ed_probe_Novell(isa_dev) /* XXX - do Novell-specific probe here */ /* Reset the board */ +#ifdef GWETHER + outb(sc->asic_addr + ED_NOVELL_RESET, 0); + DELAY(200); +#endif /* GWETHER */ tmp = inb(sc->asic_addr + ED_NOVELL_RESET); /* * I don't know if this is necessary; probably cruft leftover from - * Clarkson packet driver code. Doesn't do a thing on the boards - * I've tested. -DG [note that a outb(0x84, 0) seems to work - * here, and is non-invasive...but some boards don't seem to reset - * and I don't have complete documentation on what the 'right' - * thing to do is...so we do the invasive thing for now. Yuck.] + * Clarkson packet driver code. Doesn't do a thing on the boards I've + * tested. -DG [note that a outb(0x84, 0) seems to work here, and is + * non-invasive...but some boards don't seem to reset and I don't have + * complete documentation on what the 'right' thing to do is...so we + * do the invasive thing for now. Yuck.] */ outb(sc->asic_addr + ED_NOVELL_RESET, tmp); DELAY(5000); /* * This is needed because some NE clones apparently don't reset the - * NIC properly (or the NIC chip doesn't reset fully on power-up) - * XXX - this makes the probe invasive! ...Done against my better - * judgement. -DLG + * NIC properly (or the NIC chip doesn't reset fully on power-up) XXX + * - this makes the probe invasive! ...Done against my better + * judgement. -DLG */ - outb(sc->nic_addr + ED_P0_CR, ED_CR_RD2|ED_CR_STP); + outb(sc->nic_addr + ED_P0_CR, ED_CR_RD2 | ED_CR_STP); DELAY(5000); /* Make sure that we really have an 8390 based board */ if (!ed_probe_generic8390(sc)) - return(0); + return (0); sc->vendor = ED_VENDOR_NOVELL; sc->mem_shared = 0; isa_dev->id_maddr = 0; /* - * Test the ability to read and write to the NIC memory. This has - * the side affect of determining if this is an NE1000 or an NE2000. + * Test the ability to read and write to the NIC memory. This has the + * side affect of determining if this is an NE1000 or an NE2000. */ /* - * This prevents packets from being stored in the NIC memory when - * the readmem routine turns on the start bit in the CR. + * This prevents packets from being stored in the NIC memory when the + * readmem routine turns on the start bit in the CR. */ outb(sc->nic_addr + ED_P0_RCR, ED_RCR_MON); /* Temporarily initialize DCR for byte operations */ - outb(sc->nic_addr + ED_P0_DCR, ED_DCR_FT1|ED_DCR_LS); + outb(sc->nic_addr + ED_P0_DCR, ED_DCR_FT1 | ED_DCR_LS); outb(sc->nic_addr + ED_P0_PSTART, 8192 / ED_PAGE_SIZE); outb(sc->nic_addr + ED_P0_PSTOP, 16384 / ED_PAGE_SIZE); @@ -918,8 +943,8 @@ ed_probe_Novell(isa_dev) /* * Write a test pattern in byte mode. If this fails, then there - * probably isn't any memory at 8k - which likely means - * that the board is an NE2000. + * probably isn't any memory at 8k - which likely means that the board + * is an NE2000. */ ed_pio_writemem(sc, test_pattern, 8192, sizeof(test_pattern)); ed_pio_readmem(sc, 8192, test_buffer, sizeof(test_pattern)); @@ -927,20 +952,21 @@ ed_probe_Novell(isa_dev) if (bcmp(test_pattern, test_buffer, sizeof(test_pattern))) { /* not an NE1000 - try NE2000 */ - outb(sc->nic_addr + ED_P0_DCR, ED_DCR_WTS|ED_DCR_FT1|ED_DCR_LS); + outb(sc->nic_addr + ED_P0_DCR, ED_DCR_WTS | ED_DCR_FT1 | ED_DCR_LS); outb(sc->nic_addr + ED_P0_PSTART, 16384 / ED_PAGE_SIZE); outb(sc->nic_addr + ED_P0_PSTOP, 32768 / ED_PAGE_SIZE); sc->isa16bit = 1; + /* * Write a test pattern in word mode. If this also fails, then - * we don't know what this board is. + * we don't know what this board is. */ ed_pio_writemem(sc, test_pattern, 16384, sizeof(test_pattern)); ed_pio_readmem(sc, 16384, test_buffer, sizeof(test_pattern)); if (bcmp(test_pattern, test_buffer, sizeof(test_pattern))) - return(0); /* not an NE2000 either */ + return (0); /* not an NE2000 either */ sc->type = ED_TYPE_NE2000; sc->type_str = "NE2000"; @@ -948,11 +974,11 @@ ed_probe_Novell(isa_dev) sc->type = ED_TYPE_NE1000; sc->type_str = "NE1000"; } - + /* 8k of memory plus an additional 8k if 16bit */ memsize = 8192 + sc->isa16bit * 8192; -#if 0 /* probably not useful - NE boards only come two ways */ +#if 0 /* probably not useful - NE boards only come two ways */ /* allow kernel config file overrides */ if (isa_dev->id_msize) memsize = isa_dev->id_msize; @@ -966,9 +992,72 @@ ed_probe_Novell(isa_dev) sc->mem_end = sc->mem_start + memsize; sc->tx_page_start = memsize / ED_PAGE_SIZE; +#ifdef GWETHER + { + int x, i, mstart = 0, msize = 0; + char pbuf0[ED_PAGE_SIZE], pbuf[ED_PAGE_SIZE], tbuf[ED_PAGE_SIZE]; + + for (i = 0; i < ED_PAGE_SIZE; i++) + pbuf0[i] = 0; + + /* Clear all the memory. */ + for (x = 1; x < 256; x++) + ed_pio_writemem(sc, pbuf0, x * 256, ED_PAGE_SIZE); + + /* Search for the start of RAM. */ + for (x = 1; x < 256; x++) { + ed_pio_readmem(sc, x * 256, tbuf, ED_PAGE_SIZE); + if (memcmp(pbuf0, tbuf, ED_PAGE_SIZE) == 0) { + for (i = 0; i < ED_PAGE_SIZE; i++) + pbuf[i] = 255 - x; + ed_pio_writemem(sc, pbuf, x * 256, ED_PAGE_SIZE); + ed_pio_readmem(sc, x * 256, tbuf, ED_PAGE_SIZE); + if (memcmp(pbuf, tbuf, ED_PAGE_SIZE) == 0) { + mstart = x * ED_PAGE_SIZE; + msize = ED_PAGE_SIZE; + break; + } + } + } + + if (mstart == 0) { + printf("ed%d: Cannot find start of RAM.\n", isa_dev->id_unit); + return 0; + } + /* Search for the start of RAM. */ + for (x = (mstart / ED_PAGE_SIZE) + 1; x < 256; x++) { + ed_pio_readmem(sc, x * 256, tbuf, ED_PAGE_SIZE); + if (memcmp(pbuf0, tbuf, ED_PAGE_SIZE) == 0) { + for (i = 0; i < ED_PAGE_SIZE; i++) + pbuf[i] = 255 - x; + ed_pio_writemem(sc, pbuf, x * 256, ED_PAGE_SIZE); + ed_pio_readmem(sc, x * 256, tbuf, ED_PAGE_SIZE); + if (memcmp(pbuf, tbuf, ED_PAGE_SIZE) == 0) + msize += ED_PAGE_SIZE; + else { + break; + } + } else { + break; + } + } + + if (msize == 0) { + printf("ed%d: Cannot find any RAM, start : %d, x = %d.\n", isa_dev->id_unit, mstart, x); + return 0; + } + printf("ed%d: RAM start at %d, size : %d.\n", isa_dev->id_unit, mstart, msize); + + sc->mem_size = msize; + sc->mem_start = (char *) mstart; + sc->mem_end = (char *) (msize + mstart); + sc->tx_page_start = mstart / ED_PAGE_SIZE; + } +#endif /* GWETHER */ + /* * Use one xmit buffer if < 16k, two buffers otherwise (if not told - * otherwise). + * otherwise). */ if ((memsize < 16384) || (isa_dev->id_flags & ED_FLAGS_NO_MULTI_BUFFERING)) sc->txb_cnt = 1; @@ -982,14 +1071,19 @@ ed_probe_Novell(isa_dev) ed_pio_readmem(sc, 0, romdata, 16); for (n = 0; n < ETHER_ADDR_LEN; n++) - sc->arpcom.ac_enaddr[n] = romdata[n*(sc->isa16bit+1)]; + sc->arpcom.ac_enaddr[n] = romdata[n * (sc->isa16bit + 1)]; + +#ifdef GWETHER + if (sc->arpcom.ac_enaddr[2] == 0x86) + sc->type_str = "Gateway AT"; +#endif /* GWETHER */ /* clear any pending interrupts that might have occurred above */ outb(sc->nic_addr + ED_P0_ISR, 0xff); - return(ED_NOVELL_IO_PORTS); + return (ED_NOVELL_IO_PORTS); } - + /* * Install interface into kernel networking data structures */ @@ -1001,7 +1095,7 @@ ed_attach(isa_dev) struct ifnet *ifp = &sc->arpcom.ac_if; struct ifaddr *ifa; struct sockaddr_dl *sdl; - + /* * Set interface to stopped condition (reset) */ @@ -1011,7 +1105,7 @@ ed_attach(isa_dev) * Initialize ifnet structure */ ifp->if_unit = isa_dev->id_unit; - ifp->if_name = "ed" ; + ifp->if_name = "ed"; ifp->if_mtu = ETHERMTU; ifp->if_init = ed_init; ifp->if_output = ether_output; @@ -1022,13 +1116,16 @@ ed_attach(isa_dev) /* * Set default state for ALTPHYS flag (used to disable the tranceiver - * for AUI operation), based on compile-time config option. + * for AUI operation), based on compile-time config option. */ if (isa_dev->id_flags & ED_FLAGS_DISABLE_TRANCEIVER) ifp->if_flags = (IFF_BROADCAST | IFF_SIMPLEX | IFF_NOTRAILERS | IFF_ALTPHYS); else ifp->if_flags = (IFF_BROADCAST | IFF_SIMPLEX | IFF_NOTRAILERS); +#ifdef MULTICAST + ifp->if_flags |= IFF_MULTICAST; +#endif /* * Attach the interface @@ -1038,20 +1135,22 @@ ed_attach(isa_dev) /* * Search down the ifa address list looking for the AF_LINK type entry */ - ifa = ifp->if_addrlist; + ifa = ifp->if_addrlist; while ((ifa != 0) && (ifa->ifa_addr != 0) && - (ifa->ifa_addr->sa_family != AF_LINK)) + (ifa->ifa_addr->sa_family != AF_LINK)) ifa = ifa->ifa_next; + /* * If we find an AF_LINK type entry we fill in the hardware address. - * This is useful for netstat(1) to keep track of which interface - * is which. + * This is useful for netstat(1) to keep track of which interface is + * which. */ if ((ifa != 0) && (ifa->ifa_addr != 0)) { + /* * Fill in the link-level address for this interface */ - sdl = (struct sockaddr_dl *)ifa->ifa_addr; + sdl = (struct sockaddr_dl *) ifa->ifa_addr; sdl->sdl_type = IFT_ETHER; sdl->sdl_alen = ETHER_ADDR_LEN; sdl->sdl_slen = 0; @@ -1062,17 +1161,17 @@ ed_attach(isa_dev) * Print additional info when attached */ printf("ed%d: address %s, ", isa_dev->id_unit, - ether_sprintf(sc->arpcom.ac_enaddr)); + ether_sprintf(sc->arpcom.ac_enaddr)); if (sc->type_str && (*sc->type_str != 0)) printf("type %s ", sc->type_str); else printf("type unknown (0x%x) ", sc->type); - printf("%s ",sc->isa16bit ? "(16 bit)" : "(8 bit)"); + printf("%s ", sc->isa16bit ? "(16 bit)" : "(8 bit)"); printf("%s\n", ((sc->vendor == ED_VENDOR_3COM) && - (ifp->if_flags & IFF_ALTPHYS)) ? " tranceiver disabled" : ""); + (ifp->if_flags & IFF_ALTPHYS)) ? " tranceiver disabled" : ""); /* * If BPF is in the kernel, call the attach for it @@ -1082,15 +1181,15 @@ ed_attach(isa_dev) #endif return 1; } - + /* * Reset interface. */ void ed_reset(unit) - int unit; + int unit; { - int s; + int s; s = splimp(); @@ -1102,29 +1201,30 @@ ed_reset(unit) (void) splx(s); } - + /* * Take interface offline. */ void ed_stop(unit) - int unit; + int unit; { struct ed_softc *sc = &ed_softc[unit]; - int n = 5000; - + int n = 5000; + /* * Stop everything on the interface, and select page 0 registers. */ if (sc->is790) { outb(sc->nic_addr + ED_P0_CR, ED_CR_STP); } else { - outb(sc->nic_addr + ED_P0_CR, ED_CR_RD2|ED_CR_STP); + outb(sc->nic_addr + ED_P0_CR, ED_CR_RD2 | ED_CR_STP); } + /* - * Wait for interface to enter stopped state, but limit # of checks - * to 'n' (about 5ms). It shouldn't even take 5us on modern - * DS8390's, but just in case it's an old one. + * Wait for interface to enter stopped state, but limit # of checks to + * 'n' (about 5ms). It shouldn't even take 5us on modern DS8390's, but + * just in case it's an old one. */ while (((inb(sc->nic_addr + ED_P0_ISR) & ED_ISR_RST) == 0) && --n); @@ -1136,7 +1236,7 @@ ed_stop(unit) */ void ed_watchdog(unit) - int unit; + int unit; { struct ed_softc *sc = &ed_softc[unit]; @@ -1147,25 +1247,26 @@ ed_watchdog(unit) } /* - * Initialize device. + * Initialize device. */ void ed_init(unit) - int unit; + int unit; { struct ed_softc *sc = &ed_softc[unit]; struct ifnet *ifp = &sc->arpcom.ac_if; - int i, s; - u_char command; + int i, s; + u_char command; /* address not known */ - if (ifp->if_addrlist == (struct ifaddr *)0) return; + if (ifp->if_addrlist == (struct ifaddr *) 0) + return; /* * Initialize the NIC in the exact order outlined in the NS manual. - * This init procedure is "mandatory"...don't change what or when - * things happen. + * This init procedure is "mandatory"...don't change what or when + * things happen. */ s = splimp(); @@ -1186,19 +1287,21 @@ ed_init(unit) if (sc->is790) { outb(sc->nic_addr + ED_P0_CR, ED_CR_STP); } else { - outb(sc->nic_addr + ED_P0_CR, ED_CR_RD2|ED_CR_STP); + outb(sc->nic_addr + ED_P0_CR, ED_CR_RD2 | ED_CR_STP); } if (sc->isa16bit) { + /* - * Set FIFO threshold to 8, No auto-init Remote DMA, - * byte order=80x86, word-wide DMA xfers, + * Set FIFO threshold to 8, No auto-init Remote DMA, byte + * order=80x86, word-wide DMA xfers, */ - outb(sc->nic_addr + ED_P0_DCR, ED_DCR_FT1|ED_DCR_WTS|ED_DCR_LS); + outb(sc->nic_addr + ED_P0_DCR, ED_DCR_FT1 | ED_DCR_WTS | ED_DCR_LS); } else { + /* * Same as above, but byte-wide DMA xfers */ - outb(sc->nic_addr + ED_P0_DCR, ED_DCR_FT1|ED_DCR_LS); + outb(sc->nic_addr + ED_P0_DCR, ED_DCR_FT1 | ED_DCR_LS); } /* @@ -1208,9 +1311,9 @@ ed_init(unit) outb(sc->nic_addr + ED_P0_RBCR1, 0); /* - * Enable reception of broadcast packets + * For the moment, don't store incoming packets in memory. */ - outb(sc->nic_addr + ED_P0_RCR, ED_RCR_AB); + outb(sc->nic_addr + ED_P0_RCR, ED_RCR_MON); /* * Place NIC in internal loopback mode @@ -1234,56 +1337,45 @@ ed_init(unit) /* * Clear all interrupts. A '1' in each bit position clears the - * corresponding flag. + * corresponding flag. */ outb(sc->nic_addr + ED_P0_ISR, 0xff); /* * Enable the following interrupts: receive/transmit complete, - * receive/transmit error, and Receiver OverWrite. - * + * receive/transmit error, and Receiver OverWrite. + * * Counter overflow and Remote DMA complete are *not* enabled. */ outb(sc->nic_addr + ED_P0_IMR, - ED_IMR_PRXE|ED_IMR_PTXE|ED_IMR_RXEE|ED_IMR_TXEE|ED_IMR_OVWE); + ED_IMR_PRXE | ED_IMR_PTXE | ED_IMR_RXEE | ED_IMR_TXEE | ED_IMR_OVWE); /* * Program Command Register for page 1 */ if (sc->is790) { - outb(sc->nic_addr + ED_P0_CR, ED_CR_PAGE_1|ED_CR_STP); + outb(sc->nic_addr + ED_P0_CR, ED_CR_PAGE_1 | ED_CR_STP); } else { - outb(sc->nic_addr + ED_P0_CR, ED_CR_PAGE_1|ED_CR_RD2|ED_CR_STP); + outb(sc->nic_addr + ED_P0_CR, ED_CR_PAGE_1 | ED_CR_RD2 | ED_CR_STP); } + /* * Copy out our station address */ for (i = 0; i < ETHER_ADDR_LEN; ++i) outb(sc->nic_addr + ED_P1_PAR0 + i, sc->arpcom.ac_enaddr[i]); -#if NBPFILTER > 0 - /* - * Initialize multicast address hashing registers to accept - * all multicasts (only used when in promiscuous mode) - */ - for (i = 0; i < 8; ++i) - outb(sc->nic_addr + ED_P1_MAR0 + i, 0xff); -#endif - /* * Set Current Page pointer to next_packet (initialized above) */ outb(sc->nic_addr + ED_P1_CURR, sc->next_packet); /* - * Set Command Register for page 0, Remote DMA complete, - * and interface Start. + * Program Receiver Configuration Register and multicast filter. CR is + * set to page 0 on return. */ - if (sc->is790) { - outb(sc->nic_addr + ED_P1_CR, ED_CR_STA); - } else { - outb(sc->nic_addr + ED_P1_CR, ED_CR_RD2|ED_CR_STA); - } + ed_setrcr(ifp, sc); + /* * Take interface out of loopback */ @@ -1291,7 +1383,7 @@ ed_init(unit) /* * If this is a 3Com board, the tranceiver must be software enabled - * (there is no settable hardware default). + * (there is no settable hardware default). */ if (sc->vendor == ED_VENDOR_3COM) { if (ifp->if_flags & IFF_ALTPHYS) { @@ -1314,11 +1406,12 @@ ed_init(unit) (void) splx(s); } - + /* * This routine actually starts the transmission on the interface */ -static inline void ed_xmit(ifp) +static inline void +ed_xmit(ifp) struct ifnet *ifp; { struct ed_softc *sc = &ed_softc[ifp->if_unit]; @@ -1332,13 +1425,14 @@ static inline void ed_xmit(ifp) if (sc->is790) { outb(sc->nic_addr + ED_P0_CR, ED_CR_STA); } else { - outb(sc->nic_addr + ED_P0_CR, ED_CR_RD2|ED_CR_STA); + outb(sc->nic_addr + ED_P0_CR, ED_CR_RD2 | ED_CR_STA); } + /* * Set TX buffer start page */ outb(sc->nic_addr + ED_P0_TPSR, sc->tx_page_start + - sc->txb_next_tx * ED_TXBUF_SIZE); + sc->txb_next_tx * ED_TXBUF_SIZE); /* * Set TX length @@ -1352,10 +1446,10 @@ static inline void ed_xmit(ifp) if (sc->is790) { outb(sc->nic_addr + ED_P0_CR, ED_CR_TXP | ED_CR_STA); } else { - outb(sc->nic_addr + ED_P0_CR, ED_CR_RD2|ED_CR_TXP|ED_CR_STA); + outb(sc->nic_addr + ED_P0_CR, ED_CR_RD2 | ED_CR_TXP | ED_CR_STA); } sc->xmit_busy = 1; - + /* * Point to next transmit buffer slot and wrap if necessary. */ @@ -1385,12 +1479,13 @@ ed_start(ifp) struct ed_softc *sc = &ed_softc[ifp->if_unit]; struct mbuf *m0, *m; caddr_t buffer; - int len; + int len; outloop: + /* - * First, see if there are buffered packets and an idle - * transmitter - should never happen at this point. + * First, see if there are buffered packets and an idle transmitter - + * should never happen at this point. */ if (sc->txb_inuse && (sc->xmit_busy == 0)) { printf("ed: packets buffers, but transmitter idle\n"); @@ -1401,23 +1496,23 @@ outloop: * See if there is room to put another packet in the buffer. */ if (sc->txb_inuse == sc->txb_cnt) { + /* - * No room. Indicate this to the outside world - * and exit. + * No room. Indicate this to the outside world and exit. */ ifp->if_flags |= IFF_OACTIVE; return; } - IF_DEQUEUE(&sc->arpcom.ac_if.if_snd, m); if (m == 0) { - /* - * We are using the !OACTIVE flag to indicate to the outside - * world that we can accept an additional packet rather than - * that the transmitter is _actually_ active. Indeed, the - * transmitter may be active, but if we haven't filled all - * the buffers with data then we still want to accept more. - */ + + /* + * We are using the !OACTIVE flag to indicate to the outside + * world that we can accept an additional packet rather than + * that the transmitter is _actually_ active. Indeed, the + * transmitter may be active, but if we haven't filled all the + * buffers with data then we still want to accept more. + */ ifp->if_flags &= ~IFF_OACTIVE; return; } @@ -1432,45 +1527,46 @@ outloop: buffer = sc->mem_start + (sc->txb_new * ED_TXBUF_SIZE * ED_PAGE_SIZE); if (sc->mem_shared) { + /* * Special case setup for 16 bit boards... */ if (sc->isa16bit) { switch (sc->vendor) { - /* - * For 16bit 3Com boards (which have 16k of memory), - * we have the xmit buffers in a different page - * of memory ('page 0') - so change pages. - */ + + /* + * For 16bit 3Com boards (which have 16k of + * memory), we have the xmit buffers in a + * different page of memory ('page 0') - so + * change pages. + */ case ED_VENDOR_3COM: outb(sc->asic_addr + ED_3COM_GACFR, - ED_3COM_GACFR_RSEL); + ED_3COM_GACFR_RSEL); break; - /* - * Enable 16bit access to shared memory on WD/SMC boards - * Don't update wd_laar_proto because we want to restore the - * previous state (because an arp reply in the input code - * may cause a call-back to ed_start) - * XXX - the call-back to 'start' is a bug, IMHO. - */ - case ED_VENDOR_WD_SMC: { - outb(sc->asic_addr + ED_WD_LAAR, - (sc->wd_laar_proto | ED_WD_LAAR_M16EN)); - (void) inb(0x84); - if (sc->is790) { - outb(sc->asic_addr + ED_WD_MSR, ED_WD_MSR_MENB); - (void) inb(0x84); + + /* + * Enable 16bit access to shared memory on + * WD/SMC boards Don't update wd_laar_proto + * because we want to restore the previous + * state (because an arp reply in the input + * code may cause a call-back to ed_start) XXX + * - the call-back to 'start' is a bug, IMHO. + */ + case ED_VENDOR_WD_SMC:{ + outb(sc->asic_addr + ED_WD_LAAR, + (sc->wd_laar_proto | ED_WD_LAAR_M16EN)); + if (sc->is790) { + outb(sc->asic_addr + ED_WD_MSR, ED_WD_MSR_MENB); + } + break; } - (void) inb(0x84); - break; - } } } - for (len = 0; m != 0; m = m->m_next) { bcopy(mtod(m, caddr_t), buffer, m->m_len); buffer += m->m_len; - len += m->m_len; + len += m->m_len; } /* @@ -1480,23 +1576,21 @@ outloop: switch (sc->vendor) { case ED_VENDOR_3COM: outb(sc->asic_addr + ED_3COM_GACFR, - ED_3COM_GACFR_RSEL | ED_3COM_GACFR_MBS0); + ED_3COM_GACFR_RSEL | ED_3COM_GACFR_MBS0); break; - case ED_VENDOR_WD_SMC: { - outb(sc->asic_addr + ED_WD_LAAR, sc->wd_laar_proto); - (void) inb(0x84); - if (sc->is790) { - outb(sc->asic_addr + ED_WD_MSR, 0x00); - (void) inb(0x84); + case ED_VENDOR_WD_SMC:{ + if (sc->is790) { + outb(sc->asic_addr + ED_WD_MSR, 0x00); + } + outb(sc->asic_addr + ED_WD_LAAR, sc->wd_laar_proto); + break; } - break; - } } } } else { len = ed_pio_write_mbufs(sc, m, buffer); } - + sc->txb_len[sc->txb_new] = max(len, ETHER_MIN_LEN); sc->txb_inuse++; @@ -1510,40 +1604,37 @@ outloop: if (sc->xmit_busy == 0) ed_xmit(ifp); + /* - * If there is BPF support in the configuration, tap off here. - * The following has support for converting trailer packets - * back to normal. - * XXX - support for trailer packets in BPF should be moved into - * the bpf code proper to avoid code duplication in all of - * the drivers. + * If there is BPF support in the configuration, tap off here. The + * following has support for converting trailer packets back to + * normal. XXX - support for trailer packets in BPF should be moved + * into the bpf code proper to avoid code duplication in all of the + * drivers. */ #if NBPFILTER > 0 if (sc->bpf) { u_short etype; - int off, datasize, resid; + int off, datasize, resid; struct ether_header *eh; struct trailer_header trailer_header; - char ether_packet[ETHER_MAX_LEN]; - char *ep; + char ether_packet[ETHER_MAX_LEN]; + char *ep; ep = ether_packet; /* - * We handle trailers below: - * Copy ether header first, then residual data, - * then data. Put all this in a temporary buffer - * 'ether_packet' and send off to bpf. Since the - * system has generated this packet, we assume - * that all of the offsets in the packet are - * correct; if they're not, the system will almost - * certainly crash in m_copydata. - * We make no assumptions about how the data is - * arranged in the mbuf chain (i.e. how much - * data is in each mbuf, if mbuf clusters are - * used, etc.), which is why we use m_copydata - * to get the ether header rather than assume - * that this is located in the first mbuf. + * We handle trailers below: Copy ether header first, then + * residual data, then data. Put all this in a temporary + * buffer 'ether_packet' and send off to bpf. Since the system + * has generated this packet, we assume that all of the + * offsets in the packet are correct; if they're not, the + * system will almost certainly crash in m_copydata. We make + * no assumptions about how the data is arranged in the mbuf + * chain (i.e. how much data is in each mbuf, if mbuf clusters + * are used, etc.), which is why we use m_copydata to get the + * ether header rather than assume that this is located in the + * first mbuf. */ /* copy ether header */ m_copydata(m0, 0, sizeof(struct ether_header), ep); @@ -1551,17 +1642,17 @@ outloop: ep += sizeof(struct ether_header); etype = ntohs(eh->ether_type); if (etype >= ETHERTYPE_TRAIL && - etype < ETHERTYPE_TRAIL+ETHERTYPE_NTRAILER) { + etype < ETHERTYPE_TRAIL + ETHERTYPE_NTRAILER) { datasize = ((etype - ETHERTYPE_TRAIL) << 9); off = datasize + sizeof(struct ether_header); /* copy trailer_header into a data structure */ m_copydata(m0, off, sizeof(struct trailer_header), - (caddr_t)&trailer_header.ether_type); + (caddr_t) & trailer_header.ether_type); /* copy residual data */ - m_copydata(m0, off+sizeof(struct trailer_header), - resid = ntohs(trailer_header.ether_residual) - + m_copydata(m0, off + sizeof(struct trailer_header), + resid = ntohs(trailer_header.ether_residual) - sizeof(struct trailer_header), ep); ep += resid; @@ -1586,35 +1677,36 @@ outloop: */ goto outloop; } - + /* * Ethernet interface receiver interrupt. */ static inline void ed_rint(unit) - int unit; + int unit; { register struct ed_softc *sc = &ed_softc[unit]; - u_char boundry, current; + u_char boundry, current; u_short len; struct ed_ring packet_hdr; - char *packet_ptr; + char *packet_ptr; /* * Set NIC to page 1 registers to get 'current' pointer */ if (sc->is790) { - outb(sc->nic_addr + ED_P0_CR, ED_CR_PAGE_1|ED_CR_STA); + outb(sc->nic_addr + ED_P0_CR, ED_CR_PAGE_1 | ED_CR_STA); } else { - outb(sc->nic_addr + ED_P0_CR, ED_CR_PAGE_1|ED_CR_RD2|ED_CR_STA); + outb(sc->nic_addr + ED_P0_CR, ED_CR_PAGE_1 | ED_CR_RD2 | ED_CR_STA); } + /* - * 'sc->next_packet' is the logical beginning of the ring-buffer - i.e. - * it points to where new data has been buffered. The 'CURR' - * (current) register points to the logical end of the ring-buffer - * - i.e. it points to where additional new data will be added. - * We loop here until the logical beginning equals the logical - * end (or in other words, until the ring-buffer is empty). + * 'sc->next_packet' is the logical beginning of the ring-buffer - + * i.e. it points to where new data has been buffered. The 'CURR' + * (current) register points to the logical end of the ring-buffer - + * i.e. it points to where additional new data will be added. We loop + * here until the logical beginning equals the logical end (or in + * other words, until the ring-buffer is empty). */ while (sc->next_packet != inb(sc->nic_addr + ED_P1_CURR)) { @@ -1623,26 +1715,30 @@ ed_rint(unit) (sc->next_packet - sc->rec_page_start) * ED_PAGE_SIZE; /* - * The byte count includes the FCS - Frame Check Sequence (a - * 32 bit CRC). + * The byte count includes a 4 byte header that was added by + * the NIC. */ if (sc->mem_shared) - packet_hdr = *(struct ed_ring *)packet_ptr; + packet_hdr = *(struct ed_ring *) packet_ptr; else ed_pio_readmem(sc, packet_ptr, (char *) &packet_hdr, - sizeof(packet_hdr)); + sizeof(packet_hdr)); len = packet_hdr.count; if ((len >= ETHER_MIN_LEN) && (len <= ETHER_MAX_LEN)) { + /* - * Go get packet. len - 4 removes CRC from length. + * Go get packet. */ - ed_get_packet(sc, packet_ptr + 4, len - 4); + ed_get_packet(sc, packet_ptr + sizeof(struct ed_ring), + len - sizeof(struct ed_ring), packet_hdr.rsr & ED_RSR_PHY); ++sc->arpcom.ac_if.if_ipackets; } else { + /* - * Really BAD...probably indicates that the ring pointers - * are corrupted. Also seen on early rev chips under - * high load - the byte order of the length gets switched. + * Really BAD...probably indicates that the ring + * pointers are corrupted. Also seen on early rev + * chips under high load - the byte order of the + * length gets switched. */ log(LOG_ERR, "ed%d: NIC memory corrupt - invalid packet length %d\n", @@ -1658,8 +1754,8 @@ ed_rint(unit) sc->next_packet = packet_hdr.next_packet; /* - * Update NIC boundry pointer - being careful to keep it - * one buffer behind. (as recommended by NS databook) + * Update NIC boundry pointer - being careful to keep it one + * buffer behind. (as recommended by NS databook) */ boundry = sc->next_packet - 1; if (boundry < sc->rec_page_start) @@ -1671,18 +1767,18 @@ ed_rint(unit) if (sc->is790) { outb(sc->nic_addr + ED_P0_CR, ED_CR_STA); } else { - outb(sc->nic_addr + ED_P0_CR, ED_CR_RD2|ED_CR_STA); + outb(sc->nic_addr + ED_P0_CR, ED_CR_RD2 | ED_CR_STA); } outb(sc->nic_addr + ED_P0_BNRY, boundry); /* - * Set NIC to page 1 registers before looping to top (prepare to - * get 'CURR' current pointer) + * Set NIC to page 1 registers before looping to top (prepare + * to get 'CURR' current pointer) */ if (sc->is790) { - outb(sc->nic_addr + ED_P0_CR, ED_CR_PAGE_1|ED_CR_STA); + outb(sc->nic_addr + ED_P0_CR, ED_CR_PAGE_1 | ED_CR_STA); } else { - outb(sc->nic_addr + ED_P0_CR, ED_CR_PAGE_1|ED_CR_RD2|ED_CR_STA); + outb(sc->nic_addr + ED_P0_CR, ED_CR_PAGE_1 | ED_CR_RD2 | ED_CR_STA); } } } @@ -1692,10 +1788,10 @@ ed_rint(unit) */ void edintr(unit) - int unit; + int unit; { struct ed_softc *sc = &ed_softc[unit]; - u_char isr; + u_char isr; /* * Set NIC to page 0 registers @@ -1703,36 +1799,36 @@ edintr(unit) if (sc->is790) { outb(sc->nic_addr + ED_P0_CR, ED_CR_STA); } else { - outb(sc->nic_addr + ED_P0_CR, ED_CR_RD2|ED_CR_STA); + outb(sc->nic_addr + ED_P0_CR, ED_CR_RD2 | ED_CR_STA); } + /* * loop until there are no more new interrupts */ while (isr = inb(sc->nic_addr + ED_P0_ISR)) { /* - * reset all the bits that we are 'acknowledging' - * by writing a '1' to each bit position that was set - * (writing a '1' *clears* the bit) + * reset all the bits that we are 'acknowledging' by writing a + * '1' to each bit position that was set (writing a '1' + * *clears* the bit) */ outb(sc->nic_addr + ED_P0_ISR, isr); /* - * Handle transmitter interrupts. Handle these first - * because the receiver will reset the board under - * some conditions. + * Handle transmitter interrupts. Handle these first because + * the receiver will reset the board under some conditions. */ - if (isr & (ED_ISR_PTX|ED_ISR_TXE)) { - u_char collisions = inb(sc->nic_addr + ED_P0_NCR) & 0x0f; + if (isr & (ED_ISR_PTX | ED_ISR_TXE)) { + u_char collisions = inb(sc->nic_addr + ED_P0_NCR) & 0x0f; /* * Check for transmit error. If a TX completed with an * error, we end up throwing the packet away. Really * the only error that is possible is excessive - * collisions, and in this case it is best to allow the - * automatic mechanisms of TCP to backoff the flow. Of - * course, with UDP we're screwed, but this is expected - * when a network is heavily loaded. + * collisions, and in this case it is best to allow + * the automatic mechanisms of TCP to backoff the + * flow. Of course, with UDP we're screwed, but this + * is expected when a network is heavily loaded. */ (void) inb(sc->nic_addr + ED_P0_TSR); if (isr & ED_ISR_TXE) { @@ -1742,8 +1838,9 @@ edintr(unit) */ if ((inb(sc->nic_addr + ED_P0_TSR) & ED_TSR_ABT) && (collisions == 0)) { + /* - * When collisions total 16, the + * When collisions total 16, the * P0_NCR will indicate 0, and the * TSR_ABT is set. */ @@ -1755,9 +1852,10 @@ edintr(unit) */ ++sc->arpcom.ac_if.if_oerrors; } else { + /* * Update total number of successfully - * transmitted packets. + * transmitted packets. */ ++sc->arpcom.ac_if.if_opackets; } @@ -1775,16 +1873,16 @@ edintr(unit) /* * Add in total number of collisions on last - * transmission. + * transmission. */ sc->arpcom.ac_if.if_collisions += collisions; /* * Decrement buffer in-use count if not zero (can only - * be zero if a transmitter interrupt occured while - * not actually transmitting). - * If data is ready to transmit, start it transmitting, - * otherwise defer until after handling receiver + * be zero if a transmitter interrupt occured while + * not actually transmitting). If data is ready to + * transmit, start it transmitting, otherwise defer + * until after handling receiver */ if (sc->txb_inuse && --sc->txb_inuse) ed_xmit(&sc->arpcom.ac_if); @@ -1793,110 +1891,107 @@ edintr(unit) /* * Handle receiver interrupts */ - if (isr & (ED_ISR_PRX|ED_ISR_RXE|ED_ISR_OVW)) { - /* - * Overwrite warning. In order to make sure that a lockup - * of the local DMA hasn't occurred, we reset and - * re-init the NIC. The NSC manual suggests only a - * partial reset/re-init is necessary - but some - * chips seem to want more. The DMA lockup has been - * seen only with early rev chips - Methinks this - * bug was fixed in later revs. -DG - */ + if (isr & (ED_ISR_PRX | ED_ISR_RXE | ED_ISR_OVW)) { + + /* + * Overwrite warning. In order to make sure that a + * lockup of the local DMA hasn't occurred, we reset + * and re-init the NIC. The NSC manual suggests only a + * partial reset/re-init is necessary - but some chips + * seem to want more. The DMA lockup has been seen + * only with early rev chips - Methinks this bug was + * fixed in later revs. -DG + */ if (isr & ED_ISR_OVW) { ++sc->arpcom.ac_if.if_ierrors; #ifdef DIAGNOSTIC log(LOG_WARNING, - "ed%d: warning - receiver ring buffer overrun\n", - unit); + "ed%d: warning - receiver ring buffer overrun\n", + unit); #endif + /* * Stop/reset/re-init NIC */ ed_reset(unit); } else { - /* - * Receiver Error. One or more of: CRC error, frame - * alignment error FIFO overrun, or missed packet. - */ + /* + * Receiver Error. One or more of: CRC error, + * frame alignment error FIFO overrun, or + * missed packet. + */ if (isr & ED_ISR_RXE) { ++sc->arpcom.ac_if.if_ierrors; #ifdef ED_DEBUG printf("ed%d: receive error %x\n", unit, - inb(sc->nic_addr + ED_P0_RSR)); + inb(sc->nic_addr + ED_P0_RSR)); #endif } /* - * Go get the packet(s) - * XXX - Doing this on an error is dubious - * because there shouldn't be any data to - * get (we've configured the interface to - * not accept packets with errors). + * Go get the packet(s) XXX - Doing this on an + * error is dubious because there shouldn't be + * any data to get (we've configured the + * interface to not accept packets with + * errors). */ /* * Enable 16bit access to shared memory first - * on WD/SMC boards. + * on WD/SMC boards. */ if (sc->isa16bit && (sc->vendor == ED_VENDOR_WD_SMC)) { outb(sc->asic_addr + ED_WD_LAAR, (sc->wd_laar_proto |= - ED_WD_LAAR_M16EN)); - (void) inb(0x84); + ED_WD_LAAR_M16EN)); if (sc->is790) { outb(sc->asic_addr + ED_WD_MSR, - ED_WD_MSR_MENB); - (void) inb(0x84); + ED_WD_MSR_MENB); } } - - ed_rint (unit); + ed_rint(unit); /* disable 16bit access */ if (sc->isa16bit && - (sc->vendor == ED_VENDOR_WD_SMC)) { + (sc->vendor == ED_VENDOR_WD_SMC)) { - outb(sc->asic_addr + ED_WD_LAAR, - (sc->wd_laar_proto &= - ~ED_WD_LAAR_M16EN)); - (void) inb(0x84); if (sc->is790) { outb(sc->asic_addr + ED_WD_MSR, 0x00); - (void) inb(0x84); } + outb(sc->asic_addr + ED_WD_LAAR, + (sc->wd_laar_proto &= + ~ED_WD_LAAR_M16EN)); } } } /* * If it looks like the transmitter can take more data, - * attempt to start output on the interface. - * This is done after handling the receiver to - * give the receiver priority. + * attempt to start output on the interface. This is done + * after handling the receiver to give the receiver priority. */ if ((sc->arpcom.ac_if.if_flags & IFF_OACTIVE) == 0) ed_start(&sc->arpcom.ac_if); /* - * return NIC CR to standard state: page 0, remote DMA complete, - * start (toggling the TXP bit off, even if was just set - * in the transmit routine, is *okay* - it is 'edge' - * triggered from low to high) + * return NIC CR to standard state: page 0, remote DMA + * complete, start (toggling the TXP bit off, even if was just + * set in the transmit routine, is *okay* - it is 'edge' + * triggered from low to high) */ if (sc->is790) { outb(sc->nic_addr + ED_P0_CR, ED_CR_STA); } else { - outb(sc->nic_addr + ED_P0_CR, ED_CR_RD2|ED_CR_STA); + outb(sc->nic_addr + ED_P0_CR, ED_CR_RD2 | ED_CR_STA); } + /* - * If the Network Talley Counters overflow, read them to - * reset them. It appears that old 8390's won't - * clear the ISR flag otherwise - resulting in an - * infinite loop. + * If the Network Talley Counters overflow, read them to reset + * them. It appears that old 8390's won't clear the ISR flag + * otherwise - resulting in an infinite loop. */ if (isr & ED_ISR_CNT) { (void) inb(sc->nic_addr + ED_P0_CNTR0); @@ -1905,7 +2000,7 @@ edintr(unit) } } } - + /* * Process an ioctl request. This code needs some work - it looks * pretty ugly. @@ -1913,13 +2008,13 @@ edintr(unit) int ed_ioctl(ifp, command, data) register struct ifnet *ifp; - int command; + int command; caddr_t data; { - register struct ifaddr *ifa = (struct ifaddr *)data; + register struct ifaddr *ifa = (struct ifaddr *) data; struct ed_softc *sc = &ed_softc[ifp->if_unit]; - struct ifreq *ifr = (struct ifreq *)data; - int s, error = 0; + struct ifreq *ifr = (struct ifreq *) data; + int s, error = 0; s = splimp(); @@ -1932,41 +2027,40 @@ ed_ioctl(ifp, command, data) #ifdef INET case AF_INET: ed_init(ifp->if_unit); /* before arpwhohas */ + /* - * See if another station has *our* IP address. - * i.e.: There is an address conflict! If a - * conflict exists, a message is sent to the - * console. + * See if another station has *our* IP address. i.e.: + * There is an address conflict! If a conflict exists, + * a message is sent to the console. */ - ((struct arpcom *)ifp)->ac_ipaddr = IA_SIN(ifa)->sin_addr; - arpwhohas((struct arpcom *)ifp, &IA_SIN(ifa)->sin_addr); + ((struct arpcom *) ifp)->ac_ipaddr = IA_SIN(ifa)->sin_addr; + arpwhohas((struct arpcom *) ifp, &IA_SIN(ifa)->sin_addr); break; #endif #ifdef NS - /* - * XXX - This code is probably wrong - */ + + /* + * XXX - This code is probably wrong + */ case AF_NS: - { - register struct ns_addr *ina = &(IA_SNS(ifa)->sns_addr); - - if (ns_nullhost(*ina)) - ina->x_host = - *(union ns_host *)(sc->arpcom.ac_enaddr); - else { - /* - * + { + register struct ns_addr *ina = &(IA_SNS(ifa)->sns_addr); + + if (ns_nullhost(*ina)) + ina->x_host = + *(union ns_host *) (sc->arpcom.ac_enaddr); + else { + bcopy((caddr_t) ina->x_host.c_host, + (caddr_t) sc->arpcom.ac_enaddr, + sizeof(sc->arpcom.ac_enaddr)); + } + + /* + * Set new address */ - bcopy((caddr_t)ina->x_host.c_host, - (caddr_t)sc->arpcom.ac_enaddr, - sizeof(sc->arpcom.ac_enaddr)); + ed_init(ifp->if_unit); + break; } - /* - * Set new address - */ - ed_init(ifp->if_unit); - break; - } #endif default: ed_init(ifp->if_unit); @@ -1977,13 +2071,15 @@ ed_ioctl(ifp, command, data) case SIOCGIFADDR: { struct sockaddr *sa; - sa = (struct sockaddr *)&ifr->ifr_data; - bcopy((caddr_t)sc->arpcom.ac_enaddr, - (caddr_t) sa->sa_data, ETHER_ADDR_LEN); + + sa = (struct sockaddr *) & ifr->ifr_data; + bcopy((caddr_t) sc->arpcom.ac_enaddr, + (caddr_t) sa->sa_data, ETHER_ADDR_LEN); } break; case SIOCSIFFLAGS: + /* * If interface is marked down and it is running, then stop it */ @@ -1992,37 +2088,28 @@ ed_ioctl(ifp, command, data) ed_stop(ifp->if_unit); ifp->if_flags &= ~IFF_RUNNING; } else { - /* - * If interface is marked up and it is stopped, then start it - */ + + /* + * If interface is marked up and it is stopped, then + * start it + */ if ((ifp->if_flags & IFF_UP) && - ((ifp->if_flags & IFF_RUNNING) == 0)) + ((ifp->if_flags & IFF_RUNNING) == 0)) ed_init(ifp->if_unit); } + #if NBPFILTER > 0 - if (ifp->if_flags & IFF_PROMISC) { - /* - * Set promiscuous mode on interface. - * XXX - for multicasts to work, we would need to - * write 1's in all bits of multicast - * hashing array. For now we assume that - * this was done in ed_init(). - */ - outb(sc->nic_addr + ED_P0_RCR, - ED_RCR_PRO|ED_RCR_AM|ED_RCR_AB); - } else { - /* - * XXX - for multicasts to work, we would need to - * rewrite the multicast hashing array with the - * proper hash (would have been destroyed above). - */ - outb(sc->nic_addr + ED_P0_RCR, ED_RCR_AB); - } + + /* + * Promiscuous flag may have changed, so reprogram the RCR. + */ + ed_setrcr(ifp, sc); #endif + /* - * An unfortunate hack to provide the (required) software control - * of the tranceiver for 3Com boards. The ALTPHYS flag disables - * the tranceiver if set. + * An unfortunate hack to provide the (required) software + * control of the tranceiver for 3Com boards. The ALTPHYS flag + * disables the tranceiver if set. */ if (sc->vendor == ED_VENDOR_3COM) { if (ifp->if_flags & IFF_ALTPHYS) { @@ -2031,16 +2118,36 @@ ed_ioctl(ifp, command, data) outb(sc->asic_addr + ED_3COM_CR, ED_3COM_CR_XSEL); } } - break; +#ifdef MULTICAST + case SIOCADDMULTI: + case SIOCDELMULTI: + /* + * Update out multicast list. + */ + error = (command == SIOCADDMULTI) ? + ether_addmulti((struct ifreq *) data, &sc->arpcom) : + ether_delmulti((struct ifreq *) data, &sc->arpcom); + + if (error == ENETRESET) { + + /* + * Multicast list has changed; set the hardware filter + * accordingly. + */ + ed_setrcr(ifp, sc); + error = 0; + } + break; +#endif default: error = EINVAL; } (void) splx(s); return (error); } - + /* * Macro to calculate a new address within shared memory when given an offset * from an address, taking into account ring-wrap. @@ -2056,15 +2163,16 @@ ed_ioctl(ifp, command, data) * ether_input(). If there is a BPF listener, give a copy to BPF, too. */ static void -ed_get_packet(sc, buf, len) +ed_get_packet(sc, buf, len, multicast) struct ed_softc *sc; - char *buf; + char *buf; u_short len; + int multicast; { struct ether_header *eh; - struct mbuf *m, *head = 0, *ed_ring_to_mbuf(); + struct mbuf *m, *head = 0, *ed_ring_to_mbuf(); u_short off; - int resid; + int resid; u_short etype; struct trailer_header trailer_header; @@ -2082,8 +2190,8 @@ ed_get_packet(sc, buf, len) #define EOFF (EROUND - sizeof(struct ether_header)) /* - * The following assumes there is room for - * the ether header in the header mbuf + * The following assumes there is room for the ether header in the + * header mbuf */ head->m_data += EOFF; eh = mtod(head, struct ether_header *); @@ -2097,18 +2205,16 @@ ed_get_packet(sc, buf, len) head->m_len += sizeof(struct ether_header); len -= sizeof(struct ether_header); - etype = ntohs((u_short)eh->ether_type); + etype = ntohs((u_short) eh->ether_type); /* - * Deal with trailer protocol: - * If trailer protocol, calculate the datasize as 'off', - * which is also the offset to the trailer header. - * Set resid to the amount of packet data following the - * trailer header. - * Finally, copy residual data into mbuf chain. + * Deal with trailer protocol: If trailer protocol, calculate the + * datasize as 'off', which is also the offset to the trailer header. + * Set resid to the amount of packet data following the trailer + * header. Finally, copy residual data into mbuf chain. */ if (etype >= ETHERTYPE_TRAIL && - etype < ETHERTYPE_TRAIL+ETHERTYPE_NTRAILER) { + etype < ETHERTYPE_TRAIL + ETHERTYPE_NTRAILER) { off = (etype - ETHERTYPE_TRAIL) << 9; if ((off + sizeof(struct trailer_header)) > len) @@ -2116,14 +2222,15 @@ ed_get_packet(sc, buf, len) /* * If we have shared memory, we can get info directly from the - * stored packet, otherwise we must get a local copy - * of the trailer header using PIO. + * stored packet, otherwise we must get a local copy of the + * trailer header using PIO. */ if (sc->mem_shared) { eh->ether_type = *ringoffset(sc, buf, off, u_short *); - resid = ntohs(*ringoffset(sc, buf, off+2, u_short *)); + resid = ntohs(*ringoffset(sc, buf, off + 2, u_short *)); } else { struct trailer_header trailer_header; + ed_pio_readmem(sc, ringoffset(sc, buf, off, caddr_t), (char *) &trailer_header, @@ -2132,30 +2239,35 @@ ed_get_packet(sc, buf, len) resid = trailer_header.ether_residual; } - if ((off + resid) > len) goto bad; /* insanity */ + if ((off + resid) > len) + goto bad; /* insanity */ resid -= sizeof(struct trailer_header); - if (resid < 0) goto bad; /* insanity */ + if (resid < 0) + goto bad; /* insanity */ - m = ed_ring_to_mbuf(sc, ringoffset(sc, buf, off+4, char *), + m = ed_ring_to_mbuf(sc, ringoffset(sc, buf, off + 4, char *), head, resid); - if (m == 0) goto bad; + if (m == 0) + goto bad; len = off; - head->m_pkthdr.len -= 4; /* subtract trailer header */ + head->m_pkthdr.len -= 4; /* subtract trailer header */ } /* - * Pull packet off interface. Or if this was a trailer packet, - * the data portion is appended. + * Pull packet off interface. Or if this was a trailer packet, the + * data portion is appended. */ m = ed_ring_to_mbuf(sc, buf, m, len); - if (m == 0) goto bad; + if (m == 0) + goto bad; #if NBPFILTER > 0 + /* - * Check if there's a BPF listener on this interface. - * If so, hand off the raw packet to bpf. + * Check if there's a BPF listener on this interface. If so, hand off + * the raw packet to bpf. */ if (sc->bpf) { bpf_mtap(sc->bpf, head); @@ -2164,17 +2276,12 @@ ed_get_packet(sc, buf, len) * Note that the interface cannot be in promiscuous mode if * there are no BPF listeners. And if we are in promiscuous * mode, we have to check if this packet is really ours. - * - * XXX This test does not support multicasts. */ if ((sc->arpcom.ac_if.if_flags & IFF_PROMISC) && bcmp(eh->ether_dhost, sc->arpcom.ac_enaddr, - sizeof(eh->ether_dhost)) != 0 && - bcmp(eh->ether_dhost, etherbroadcastaddr, - sizeof(eh->ether_dhost)) != 0) { - - m_freem(head); - return; + sizeof(eh->ether_dhost)) != 0 && multicast == 0) { + m_freem(head); + return; } } #endif @@ -2209,8 +2316,8 @@ bad: if (head) * This routine is currently Novell-specific. */ void -ed_pio_readmem(sc,src,dst,amount) - struct ed_softc *sc; +ed_pio_readmem(sc, src, dst, amount) + struct ed_softc *sc; unsigned short src; unsigned char *dst; unsigned short amount; @@ -2218,24 +2325,25 @@ ed_pio_readmem(sc,src,dst,amount) unsigned short tmp_amount; /* select page 0 registers */ - outb(sc->nic_addr + ED_P0_CR, ED_CR_RD2|ED_CR_STA); + outb(sc->nic_addr + ED_P0_CR, ED_CR_RD2 | ED_CR_STA); /* round up to a word */ tmp_amount = amount; - if (amount & 1) ++amount; + if (amount & 1) + ++amount; /* set up DMA byte count */ outb(sc->nic_addr + ED_P0_RBCR0, amount); - outb(sc->nic_addr + ED_P0_RBCR1, amount>>8); + outb(sc->nic_addr + ED_P0_RBCR1, amount >> 8); /* set up source address in NIC mem */ outb(sc->nic_addr + ED_P0_RSAR0, src); - outb(sc->nic_addr + ED_P0_RSAR1, src>>8); + outb(sc->nic_addr + ED_P0_RSAR1, src >> 8); outb(sc->nic_addr + ED_P0_CR, ED_CR_RD0 | ED_CR_STA); if (sc->isa16bit) { - insw(sc->asic_addr + ED_NOVELL_DATA, dst, amount/2); + insw(sc->asic_addr + ED_NOVELL_DATA, dst, amount / 2); } else insb(sc->asic_addr + ED_NOVELL_DATA, dst, amount); @@ -2247,41 +2355,42 @@ ed_pio_readmem(sc,src,dst,amount) * be even. */ void -ed_pio_writemem(sc,src,dst,len) +ed_pio_writemem(sc, src, dst, len) struct ed_softc *sc; - char *src; + char *src; unsigned short dst; unsigned short len; { - int maxwait=100; /* about 120us */ + int maxwait = 100; /* about 120us */ /* select page 0 registers */ - outb(sc->nic_addr + ED_P0_CR, ED_CR_RD2|ED_CR_STA); + outb(sc->nic_addr + ED_P0_CR, ED_CR_RD2 | ED_CR_STA); /* reset remote DMA complete flag */ outb(sc->nic_addr + ED_P0_ISR, ED_ISR_RDC); /* set up DMA byte count */ outb(sc->nic_addr + ED_P0_RBCR0, len); - outb(sc->nic_addr + ED_P0_RBCR1, len>>8); + outb(sc->nic_addr + ED_P0_RBCR1, len >> 8); /* set up destination address in NIC mem */ outb(sc->nic_addr + ED_P0_RSAR0, dst); - outb(sc->nic_addr + ED_P0_RSAR1, dst>>8); + outb(sc->nic_addr + ED_P0_RSAR1, dst >> 8); /* set remote DMA write */ outb(sc->nic_addr + ED_P0_CR, ED_CR_RD1 | ED_CR_STA); if (sc->isa16bit) - outsw(sc->asic_addr + ED_NOVELL_DATA, src, len/2); + outsw(sc->asic_addr + ED_NOVELL_DATA, src, len / 2); else outsb(sc->asic_addr + ED_NOVELL_DATA, src, len); + /* * Wait for remote DMA complete. This is necessary because on the - * transmit side, data is handled internally by the NIC in bursts - * and we can't start another remote DMA until this one completes. - * Not waiting causes really bad things to happen - like the NIC - * irrecoverably jamming the ISA bus. + * transmit side, data is handled internally by the NIC in bursts and + * we can't start another remote DMA until this one completes. Not + * waiting causes really bad things to happen - like the NIC + * irrecoverably jamming the ISA bus. */ while (((inb(sc->nic_addr + ED_P0_ISR) & ED_ISR_RDC) != ED_ISR_RDC) && --maxwait); } @@ -2291,7 +2400,7 @@ ed_pio_writemem(sc,src,dst,len) * programmed I/O. */ u_short -ed_pio_write_mbufs(sc,m,dst) +ed_pio_write_mbufs(sc, m, dst) struct ed_softc *sc; struct mbuf *m; unsigned short dst; @@ -2299,40 +2408,40 @@ ed_pio_write_mbufs(sc,m,dst) unsigned short len, mb_offset; struct mbuf *mp; unsigned char residual[2]; - int maxwait=100; /* about 120us */ + int maxwait = 100; /* about 120us */ /* First, count up the total number of bytes to copy */ for (len = 0, mp = m; mp; mp = mp->m_next) len += mp->m_len; - + /* select page 0 registers */ - outb(sc->nic_addr + ED_P0_CR, ED_CR_RD2|ED_CR_STA); + outb(sc->nic_addr + ED_P0_CR, ED_CR_RD2 | ED_CR_STA); /* reset remote DMA complete flag */ outb(sc->nic_addr + ED_P0_ISR, ED_ISR_RDC); /* set up DMA byte count */ outb(sc->nic_addr + ED_P0_RBCR0, len); - outb(sc->nic_addr + ED_P0_RBCR1, len>>8); + outb(sc->nic_addr + ED_P0_RBCR1, len >> 8); /* set up destination address in NIC mem */ outb(sc->nic_addr + ED_P0_RSAR0, dst); - outb(sc->nic_addr + ED_P0_RSAR1, dst>>8); + outb(sc->nic_addr + ED_P0_RSAR1, dst >> 8); /* set remote DMA write */ outb(sc->nic_addr + ED_P0_CR, ED_CR_RD1 | ED_CR_STA); mb_offset = 0; + /* - * Transfer the mbuf chain to the NIC memory. - * The following code isn't too pretty. The problem is that we can only - * transfer words to the board, and if an mbuf has an odd number - * of bytes in it, this is a problem. It's not a simple matter of - * just removing a byte from the next mbuf (adjusting data++ and - * len--) because this will hose-over the mbuf chain which might - * be needed later for BPF. Instead, we maintain an offset - * (mb_offset) which let's us skip over the first byte in the - * following mbuf. + * Transfer the mbuf chain to the NIC memory. The following code isn't + * too pretty. The problem is that we can only transfer words to the + * board, and if an mbuf has an odd number of bytes in it, this is a + * problem. It's not a simple matter of just removing a byte from the + * next mbuf (adjusting data++ and len--) because this will hose-over + * the mbuf chain which might be needed later for BPF. Instead, we + * maintain an offset (mb_offset) which let's us skip over the first + * byte in the following mbuf. */ while (m) { if (m->m_len - mb_offset) { @@ -2343,24 +2452,27 @@ ed_pio_write_mbufs(sc,m,dst) (m->m_len - mb_offset) / 2); /* - * if odd number of bytes, get the odd byte from - * the next mbuf with data + * if odd number of bytes, get the odd byte + * from the next mbuf with data */ if ((m->m_len - mb_offset) & 1) { /* first the last byte in current mbuf */ residual[0] = *(mtod(m, caddr_t) + - m->m_len - 1); - + m->m_len - 1); + /* advance past any empty mbufs */ while (m->m_next && (m->m_next->m_len == 0)) m = m->m_next; if (m->m_next) { - /* remove first byte in next mbuf */ + + /* + * remove first byte in next + * mbuf + */ residual[1] = *(mtod(m->m_next, caddr_t)); mb_offset = 1; } - outw(sc->asic_addr + ED_NOVELL_DATA, *((unsigned short *) residual)); } else @@ -2374,10 +2486,10 @@ ed_pio_write_mbufs(sc,m,dst) /* * Wait for remote DMA complete. This is necessary because on the - * transmit side, data is handled internally by the NIC in bursts - * and we can't start another remote DMA until this one completes. - * Not waiting causes really bad things to happen - like the NIC - * irrecoverably jamming the ISA bus. + * transmit side, data is handled internally by the NIC in bursts and + * we can't start another remote DMA until this one completes. Not + * waiting causes really bad things to happen - like the NIC + * irrecoverably jamming the ISA bus. */ while (((inb(sc->nic_addr + ED_P0_ISR) & ED_ISR_RDC) != ED_ISR_RDC) && --maxwait); @@ -2386,23 +2498,22 @@ ed_pio_write_mbufs(sc,m,dst) sc->arpcom.ac_if.if_unit); ed_reset(sc->arpcom.ac_if.if_unit); } - - return(len); + return (len); } - + /* * Given a source and destination address, copy 'amount' of a packet from * the ring buffer into a linear destination buffer. Takes into account * ring-wrap. */ static inline char * -ed_ring_copy(sc,src,dst,amount) +ed_ring_copy(sc, src, dst, amount) struct ed_softc *sc; - char *src; - char *dst; - u_short amount; + char *src; + char *dst; + u_short amount; { - u_short tmp_amount; + u_short tmp_amount; /* does copy wrap to lower addr in ring buffer? */ if (src + amount > sc->mem_end) { @@ -2410,21 +2521,20 @@ ed_ring_copy(sc,src,dst,amount) /* copy amount up to end of NIC memory */ if (sc->mem_shared) - bcopy(src,dst,tmp_amount); + bcopy(src, dst, tmp_amount); else - ed_pio_readmem(sc,src,dst,tmp_amount); + ed_pio_readmem(sc, src, dst, tmp_amount); amount -= tmp_amount; src = sc->mem_ring; dst += tmp_amount; } - if (sc->mem_shared) bcopy(src, dst, amount); else ed_pio_readmem(sc, src, dst, amount); - return(src + amount); + return (src + amount); } /* @@ -2437,9 +2547,9 @@ ed_ring_copy(sc,src,dst,amount) * amount = amount of data to copy */ struct mbuf * -ed_ring_to_mbuf(sc,src,dst,total_len) +ed_ring_to_mbuf(sc, src, dst, total_len) struct ed_softc *sc; - char *src; + char *src; struct mbuf *dst; u_short total_len; { @@ -2448,18 +2558,19 @@ ed_ring_to_mbuf(sc,src,dst,total_len) while (total_len) { register u_short amount = min(total_len, M_TRAILINGSPACE(m)); - if (amount == 0) { /* no more data in this mbuf, alloc another */ + if (amount == 0) { /* no more data in this mbuf, alloc + * another */ + /* - * If there is enough data for an mbuf cluster, attempt - * to allocate one of those, otherwise, a regular - * mbuf will do. - * Note that a regular mbuf is always required, even if - * we get a cluster - getting a cluster does not - * allocate any mbufs, and one is needed to assign - * the cluster to. The mbuf that has a cluster - * extension can not be used to contain data - only - * the cluster can contain data. - */ + * If there is enough data for an mbuf cluster, + * attempt to allocate one of those, otherwise, a + * regular mbuf will do. Note that a regular mbuf is + * always required, even if we get a cluster - getting + * a cluster does not allocate any mbufs, and one is + * needed to assign the cluster to. The mbuf that has + * a cluster extension can not be used to contain data + * - only the cluster can contain data. + */ dst = m; MGET(m, M_DONTWAIT, MT_DATA); if (m == 0) @@ -2472,7 +2583,6 @@ ed_ring_to_mbuf(sc,src,dst,total_len) dst->m_next = m; amount = min(total_len, M_TRAILINGSPACE(m)); } - src = ed_ring_copy(sc, src, mtod(m, caddr_t) + m->m_len, amount); m->m_len += amount; @@ -2481,4 +2591,162 @@ ed_ring_to_mbuf(sc,src,dst,total_len) } return (m); } + +void +ed_setrcr(ifp, sc) + struct ifnet *ifp; + struct ed_softc *sc; +{ + int i; + + /* set page 1 registers */ + if (sc->is790) { + outb(sc->nic_addr + ED_P0_CR, ED_CR_PAGE_1 | ED_CR_STP); + } else { + outb(sc->nic_addr + ED_P0_CR, ED_CR_PAGE_1 | ED_CR_RD2 | ED_CR_STP); + } + + if (ifp->if_flags & IFF_PROMISC) { + + /* + * Reconfigure the multicast filter. + */ + for (i = 0; i < 8; i++) + outb(sc->nic_addr + ED_P1_MAR0 + i, 0xff); + + /* + * And turn on promiscuous mode. Also enable reception of + * runts and packets with CRC & alignment errors. + */ + /* Set page 0 registers */ + if (sc->is790) { + outb(sc->nic_addr + ED_P0_CR, ED_CR_STP); + } else { + outb(sc->nic_addr + ED_P0_CR, ED_CR_RD2 | ED_CR_STP); + } + outb(sc->nic_addr + ED_P0_RCR, ED_RCR_PRO | ED_RCR_AM | + ED_RCR_AB | ED_RCR_AR | ED_RCR_SEP); + } else { +#ifndef MULTICAST + + /* + * Initialize multicast address hashing registers to not + * accept multicasts. + */ + for (i = 0; i < 8; ++i) + outb(sc->nic_addr + ED_P1_MAR0 + i, 0x00); + + /* Set page 0 registers */ + if (sc->is790) { + outb(sc->nic_addr + ED_P0_CR, ED_CR_STP); + } else { + outb(sc->nic_addr + ED_P0_CR, ED_CR_RD2 | ED_CR_STP); + } + + outb(sc->nic_addr + ED_P0_RCR, ED_RCR_AB); +#else + /* set up multicast addresses and filter modes */ + if (ifp->if_flags & IFF_MULTICAST) { + u_long mcaf[2]; + + if (ifp->if_flags & IFF_ALLMULTI) { + mcaf[0] = 0xffffffff; + mcaf[1] = 0xffffffff; + } else + ds_getmcaf(sc, mcaf); + + /* + * Set multicast filter on chip. + */ + for (i = 0; i < 8; i++) + outb(sc->nic_addr + ED_P1_MAR0 + i, ((u_char *) mcaf)[i]); + + /* Set page 0 registers */ + if (sc->is790) { + outb(sc->nic_addr + ED_P0_CR, ED_CR_STP); + } else { + outb(sc->nic_addr + ED_P0_CR, ED_CR_RD2 | ED_CR_STP); + } + + outb(sc->nic_addr + ED_P0_RCR, ED_RCR_AM | ED_RCR_AB); + } else { + + /* + * Initialize multicast address hashing registers to + * not accept multicasts. + */ + for (i = 0; i < 8; ++i) + outb(sc->nic_addr + ED_P1_MAR0 + i, 0x00); + + /* Set page 0 registers */ + if (sc->is790) { + outb(sc->nic_addr + ED_P0_CR, ED_CR_STP); + } else { + outb(sc->nic_addr + ED_P0_CR, ED_CR_RD2 | ED_CR_STP); + } + + outb(sc->nic_addr + ED_P0_RCR, ED_RCR_AB); + } +#endif /* MULTICAST */ + } +} + +#ifdef MULTICAST +/* + * Compute crc for ethernet address + */ +u_long +ds_crc(ep) + u_char *ep; +{ +#define POLYNOMIAL 0x04c11db6 + register u_long crc = 0xffffffffL; + register int carry, i, j; + register u_char b; + + for (i = 6; --i >= 0;) { + b = *ep++; + for (j = 8; --j >= 0;) { + carry = ((crc & 0x80000000L) ? 1 : 0) ^ (b & 0x01); + crc <<= 1; + b >>= 1; + if (carry) + crc = ((crc ^ POLYNOMIAL) | carry); + } + } + return crc; +#undef POLYNOMIAL +} + +/* + * Compute the multicast address filter from the + * list of multicast addresses we need to listen to. + */ +void +ds_getmcaf(sc, mcaf) + struct ed_softc *sc; + u_long *mcaf; +{ + register u_int index; + register u_char *af = (u_char *) mcaf; + register struct ether_multi *enm; + register struct ether_multistep step; + + mcaf[0] = 0; + mcaf[1] = 0; + + ETHER_FIRST_MULTI(step, &sc->arpcom, enm); + while (enm != NULL) { + if (bcmp(enm->enm_addrlo, enm->enm_addrhi, 6) != 0) { + mcaf[0] = 0xffffffff; + mcaf[1] = 0xffffffff; + return; + } + index = ds_crc(enm->enm_addrlo, 6) >> 26; + af[index >> 3] |= 1 << (index & 7); + + ETHER_NEXT_MULTI(step, enm); + } +} +#endif #endif diff --git a/sys/i386/isa/if_edreg.h b/sys/i386/isa/if_edreg.h index f691a6e..1d56fdc 100644 --- a/sys/i386/isa/if_edreg.h +++ b/sys/i386/isa/if_edreg.h @@ -6,7 +6,7 @@ * of this software, nor does the author assume any responsibility * for damages incurred with its use. * - * $Id: if_edreg.h,v 1.14 1994/04/10 20:06:28 davidg Exp $ + * $Id: if_edreg.h,v 1.15 1994/08/02 07:39:30 davidg Exp $ */ /* * National Semiconductor DS8390 NIC register definitions @@ -547,19 +547,11 @@ * A contiguous portion of those blocks are marked for receive packets * by setting start and end block #'s in the NIC. For each packet that * is put into the receive ring, one of these headers (4 bytes each) is - * tacked onto the front. + * tacked onto the front. The first byte is a copy of the receiver status + * register at the time the packet was received. */ struct ed_ring { - struct edr_status { /* received packet status */ - u_char rs_prx:1, /* packet received intack */ - rs_crc:1, /* crc error */ - rs_fae:1, /* frame alignment error */ - rs_fo:1, /* fifo overrun */ - rs_mpa:1, /* packet received intack */ - rs_phy:1, /* packet received intack */ - rs_dis:1, /* packet received intack */ - rs_dfr:1; /* packet received intack */ - } ed_rcv_status; /* received packet status */ + u_char rsr; /* receiver status */ u_char next_packet; /* pointer to next packet */ u_short count; /* bytes in packet (length + 4) */ }; |
