diff options
| author | mav <mav@FreeBSD.org> | 2009-11-22 11:17:31 +0000 |
|---|---|---|
| committer | mav <mav@FreeBSD.org> | 2009-11-22 11:17:31 +0000 |
| commit | 16bf67aee8fdce7e4cae1a00472b883686b10819 (patch) | |
| tree | 1adf4691a00772fc8d3d36e022bc7a922ab4df80 | |
| parent | edbe40d2bfc6d2812b2b47ab9cbc9d13e0a8708f (diff) | |
| download | FreeBSD-src-16bf67aee8fdce7e4cae1a00472b883686b10819.zip FreeBSD-src-16bf67aee8fdce7e4cae1a00472b883686b10819.tar.gz | |
Fix Intel PATA UDMA timings setting, affecting write performance.
Binary divider value 10 specified in datasheet is not a hex 0x10.
UDMA2 should be 33/2 instead of 66/4, which is documented as reverved,
UDMA4 should be 66/2 instead of 66/4, which is definitely wrong.
| -rw-r--r-- | sys/dev/ata/chipsets/ata-intel.c | 4 |
1 files changed, 2 insertions, 2 deletions
diff --git a/sys/dev/ata/chipsets/ata-intel.c b/sys/dev/ata/chipsets/ata-intel.c index a19de8b..bd414d3 100644 --- a/sys/dev/ata/chipsets/ata-intel.c +++ b/sys/dev/ata/chipsets/ata-intel.c @@ -319,7 +319,7 @@ ata_intel_new_setmode(device_t dev, int mode) ata_mode2str(mode), ctlr->chip->text); if (!error) { if (mode >= ATA_UDMA0) { - u_int8_t utimings[] = { 0x00, 0x01, 0x10, 0x01, 0x10, 0x01, 0x10 }; + u_int8_t utimings[] = { 0x00, 0x01, 0x02, 0x01, 0x02, 0x01, 0x02 }; pci_write_config(gparent, 0x48, reg48 | (0x0001 << devno), 2); pci_write_config(gparent, 0x4a, @@ -331,7 +331,7 @@ ata_intel_new_setmode(device_t dev, int mode) pci_write_config(gparent, 0x4a, (reg4a & ~(0x3 << (devno << 2))),2); } reg54 |= 0x0400; - if (mode >= ATA_UDMA2) + if (mode >= ATA_UDMA3) reg54 |= (0x1 << devno); else reg54 &= ~(0x1 << devno); |
