diff options
author | simokawa <simokawa@FreeBSD.org> | 2003-01-05 06:21:30 +0000 |
---|---|---|
committer | simokawa <simokawa@FreeBSD.org> | 2003-01-05 06:21:30 +0000 |
commit | 0e542465928d3dd785b1dbf5db44c750200fb99f (patch) | |
tree | 8b825745ffcc1c4755ea281b7fde1bd8f6f30865 | |
parent | 07e8d84aeafc4c536fc3617199cb67ff304769d0 (diff) | |
download | FreeBSD-src-0e542465928d3dd785b1dbf5db44c750200fb99f.zip FreeBSD-src-0e542465928d3dd785b1dbf5db44c750200fb99f.tar.gz |
- Change definition of fc->maxrec same as fwdev->maxrec.
- 'spec' and 'ver' are attributes of a unit rather than a node.
- Report Phy and Link info separatelly.
- Reorder intialization step in fwohci_reset().
-rw-r--r-- | sys/dev/firewire/firewire.c | 18 | ||||
-rw-r--r-- | sys/dev/firewire/firewire.h | 1 | ||||
-rw-r--r-- | sys/dev/firewire/firewirereg.h | 2 | ||||
-rw-r--r-- | sys/dev/firewire/fwohci.c | 62 |
4 files changed, 49 insertions, 34 deletions
diff --git a/sys/dev/firewire/firewire.c b/sys/dev/firewire/firewire.c index 1e2797f..fb6af57 100644 --- a/sys/dev/firewire/firewire.c +++ b/sys/dev/firewire/firewire.c @@ -106,7 +106,6 @@ static device_method_t firewire_methods[] = { { 0, 0 } }; char linkspeed[7][0x10]={"S100","S200","S400","S800","S1600","S3200","Unknown"}; -u_int maxrec[6]={512,1024,2048,4096,8192,0}; #define MAX_GAPHOP 16 u_int gap_cnt[] = {1, 1, 4, 6, 9, 12, 14, 17, @@ -332,7 +331,7 @@ fw_asyreq(struct firewire_comm *fc, int sub, struct fw_xfer *xfer) struct tcode_info *info; if(xfer == NULL) return EINVAL; - if(xfer->send.len > fc->maxrec){ + if(xfer->send.len > MAXREC(fc->maxrec)){ printf("send.len > maxrec\n"); return EINVAL; } @@ -1631,22 +1630,23 @@ fw_attach_dev(struct firewire_comm *fc) device_t *devlistp; int devcnt; struct firewire_dev_comm *fdc; + u_int32_t spec, ver; for(fwdev = TAILQ_FIRST(&fc->devices); fwdev != NULL; fwdev = TAILQ_NEXT(fwdev, link)){ if(fwdev->status == FWDEVINIT){ - fwdev->spec = getcsrdata(fwdev, CSRKEY_SPEC); - if(fwdev->spec == 0) + spec = getcsrdata(fwdev, CSRKEY_SPEC); + if(spec == 0) continue; - fwdev->ver = getcsrdata(fwdev, CSRKEY_VER); - if(fwdev->ver == 0) + ver = getcsrdata(fwdev, CSRKEY_VER); + if(ver == 0) continue; fwdev->maxrec = (fwdev->csrrom[2] >> 12) & 0xf; device_printf(fc->bdev, "Device "); - switch(fwdev->spec){ + switch(spec){ case CSRVAL_ANSIT10: - switch(fwdev->ver){ + switch(ver){ case CSRVAL_T10SBP2: printf("SBP-II"); break; @@ -1655,7 +1655,7 @@ fw_attach_dev(struct firewire_comm *fc) } break; case CSRVAL_1394TA: - switch(fwdev->ver){ + switch(ver){ case CSR_PROTAVC: printf("AV/C"); break; diff --git a/sys/dev/firewire/firewire.h b/sys/dev/firewire/firewire.h index 656c5f4..a30ce8a 100644 --- a/sys/dev/firewire/firewire.h +++ b/sys/dev/firewire/firewire.h @@ -89,6 +89,7 @@ struct fw_reg_req_t{ unsigned long data; }; +#define MAXREC(x) (2 << (x)) #define FWPMAX_S400 (2048 + 20) /* MAXREC plus space for control data */ #define FWMAXQUEUE 128 diff --git a/sys/dev/firewire/firewirereg.h b/sys/dev/firewire/firewirereg.h index 86bd43b..9549a29 100644 --- a/sys/dev/firewire/firewirereg.h +++ b/sys/dev/firewire/firewirereg.h @@ -47,8 +47,10 @@ typedef struct proc fw_proc; struct fw_device{ u_int16_t dst; struct fw_eui64 eui; +#if 0 u_int32_t spec; u_int32_t ver; +#endif u_int8_t speed; u_int8_t maxrec; u_int8_t nport; diff --git a/sys/dev/firewire/fwohci.c b/sys/dev/firewire/fwohci.c index f995793..6287606 100644 --- a/sys/dev/firewire/fwohci.c +++ b/sys/dev/firewire/fwohci.c @@ -91,7 +91,6 @@ char fwohcicode[32][0x20]={ "Undef","ack data_err","ack type_err",""}; #define MAX_SPEED 2 extern char linkspeed[MAX_SPEED+1][0x10]; -extern int maxrec[MAX_SPEED+1]; static char dbcond[4][0x10]={"NEV","C=1", "C=0", "ALL"}; u_int32_t tagbit[4] = { 1 << 28, 1 << 29, 1 << 30, 1 << 31}; @@ -424,10 +423,9 @@ fwohci_probe_phy(struct fwohci_softc *sc, device_t dev) sc->fc.speed, MAX_SPEED); sc->fc.speed = MAX_SPEED; } - sc->fc.maxrec = maxrec[sc->fc.speed]; device_printf(dev, - "Link 1394 only %s, %d ports, maxrec %d bytes.\n", - linkspeed[sc->fc.speed], sc->fc.nport, sc->fc.maxrec); + "Phy 1394 only %s, %d ports.\n", + linkspeed[sc->fc.speed], sc->fc.nport); }else{ reg2 = fwphy_rddata(sc, FW_PHY_ESPD_REG); sc->fc.mode |= FWPHYASYST; @@ -438,10 +436,9 @@ fwohci_probe_phy(struct fwohci_softc *sc, device_t dev) sc->fc.speed, MAX_SPEED); sc->fc.speed = MAX_SPEED; } - sc->fc.maxrec = maxrec[sc->fc.speed]; device_printf(dev, - "Link 1394a available %s, %d ports, maxrec %d bytes.\n", - linkspeed[sc->fc.speed], sc->fc.nport, sc->fc.maxrec); + "Phy 1394a available %s, %d ports.\n", + linkspeed[sc->fc.speed], sc->fc.nport); /* check programPhyEnable */ reg2 = fwphy_rddata(sc, 5); @@ -479,14 +476,14 @@ fwohci_probe_phy(struct fwohci_softc *sc, device_t dev) void fwohci_reset(struct fwohci_softc *sc, device_t dev) { - int i; + int i, max_rec, speed; u_int32_t reg, reg2; struct fwohcidb_tr *db_tr; -/* Disable interrupt */ + /* Disable interrupt */ OWRITE(sc, FWOHCI_INTMASKCLR, ~0); -/* Now stopping all DMA channel */ + /* Now stopping all DMA channel */ OWRITE(sc, OHCI_ARQCTLCLR, OHCI_CNTL_DMA_RUN); OWRITE(sc, OHCI_ARSCTLCLR, OHCI_CNTL_DMA_RUN); OWRITE(sc, OHCI_ATQCTLCLR, OHCI_CNTL_DMA_RUN); @@ -498,7 +495,7 @@ fwohci_reset(struct fwohci_softc *sc, device_t dev) OWRITE(sc, OHCI_ITCTLCLR(i), OHCI_CNTL_DMA_RUN); } -/* FLUSH FIFO and reset Transmitter/Reciever */ + /* FLUSH FIFO and reset Transmitter/Reciever */ OWRITE(sc, OHCI_HCCCTL, OHCI_HCC_RESET); if (bootverbose) device_printf(dev, "resetting OHCI..."); @@ -510,35 +507,52 @@ fwohci_reset(struct fwohci_softc *sc, device_t dev) if (bootverbose) printf("done (loop=%d)\n", i); + /* Probe phy */ + fwohci_probe_phy(sc, dev); + + /* Probe link */ reg = OREAD(sc, OHCI_BUS_OPT); reg2 = reg | OHCI_BUSFNC; - /* XXX */ - if (((reg & 0x0000f000) >> 12) < 10) - reg2 = (reg2 & 0xffff0fff) | (10 << 12); + max_rec = (reg & 0x0000f000) >> 12; + speed = (reg & 0x00000007); + device_printf(dev, "Link %s, max_rec %d bytes.\n", + linkspeed[speed], MAXREC(max_rec)); + /* XXX fix max_rec */ + sc->fc.maxrec = sc->fc.speed + 8; + if (max_rec != sc->fc.maxrec) { + reg2 = (reg2 & 0xffff0fff) | (sc->fc.maxrec << 12); + device_printf(dev, "max_rec %d -> %d\n", + MAXREC(max_rec), MAXREC(sc->fc.maxrec)); + } if (bootverbose) device_printf(dev, "BUS_OPT 0x%x -> 0x%x\n", reg, reg2); OWRITE(sc, OHCI_BUS_OPT, reg2); + /* Initialize registers */ OWRITE(sc, OHCI_CROMHDR, sc->fc.config_rom[0]); OWRITE(sc, OHCI_CROMPTR, vtophys(&sc->fc.config_rom[0])); OWRITE(sc, OHCI_HCCCTLCLR, OHCI_HCC_BIGEND); OWRITE(sc, OHCI_HCCCTL, OHCI_HCC_POSTWR); - - fwohci_probe_phy(sc, dev); - OWRITE(sc, OHCI_SID_BUF, vtophys(sc->fc.sid_buf)); OWRITE(sc, OHCI_LNKCTL, OHCI_CNTL_SID); + fw_busreset(&sc->fc); - /* enable link */ + /* Enable link */ OWRITE(sc, OHCI_HCCCTL, OHCI_HCC_LINKEN); - fw_busreset(&sc->fc); - /* force to start rx dma */ + /* Force to start async RX DMA */ sc->arrq.xferq.flag &= ~FWXFERQ_RUNNING; sc->arrs.xferq.flag &= ~FWXFERQ_RUNNING; fwohci_rx_enable(sc, &sc->arrq); fwohci_rx_enable(sc, &sc->arrs); + /* Initialize async TX */ + OWRITE(sc, OHCI_ATQCTLCLR, OHCI_CNTL_DMA_RUN | OHCI_CNTL_DMA_DEAD); + OWRITE(sc, OHCI_ATSCTLCLR, OHCI_CNTL_DMA_RUN | OHCI_CNTL_DMA_DEAD); + /* AT Retries */ + OWRITE(sc, FWOHCI_RETRY, + /* CycleLimit PhyRespRetries ATRespRetries ATReqRetries */ + (0xffff << 16 ) | (0x0f << 8) | (0x0f << 4) | 0x0f) ; for( i = 0, db_tr = sc->atrq.top; i < sc->atrq.ndb ; i ++, db_tr = STAILQ_NEXT(db_tr, link)){ db_tr->xfer = NULL; @@ -548,8 +562,8 @@ fwohci_reset(struct fwohci_softc *sc, device_t dev) db_tr->xfer = NULL; } - OWRITE(sc, FWOHCI_RETRY, - (0xffff << 16 )| (0x0f << 8) | (0x0f << 4) | 0x0f) ; + + /* Enable interrupt */ OWRITE(sc, FWOHCI_INTMASK, OHCI_INT_ERR | OHCI_INT_PHY_SID | OHCI_INT_DMA_ATRQ | OHCI_INT_DMA_ATRS @@ -557,8 +571,6 @@ fwohci_reset(struct fwohci_softc *sc, device_t dev) | OHCI_INT_PHY_BUS_R | OHCI_INT_PW_ERR); fwohci_set_intr(&sc->fc, 1); - OWRITE(sc, OHCI_ATQCTLCLR, OHCI_CNTL_DMA_RUN | OHCI_CNTL_DMA_DEAD); - OWRITE(sc, OHCI_ATSCTLCLR, OHCI_CNTL_DMA_RUN | OHCI_CNTL_DMA_DEAD); } int @@ -1153,7 +1165,7 @@ fwohci_db_init(struct fwohci_dbch *dbch) STAILQ_INSERT_TAIL(&dbch->db_trq, db_tr, link); if (!(dbch->xferq.flag & FWXFERQ_PACKET) && dbch->xferq.bnpacket != 0) { - /* XXX what thoes for? */ + /* XXX what those for? */ if (idb % dbch->xferq.bnpacket == 0) dbch->xferq.bulkxfer[idb / dbch->xferq.bnpacket ].start = (caddr_t)db_tr; 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