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authorrstone <rstone@FreeBSD.org>2010-05-01 21:59:06 +0000
committerrstone <rstone@FreeBSD.org>2010-05-01 21:59:06 +0000
commit01a827bd910a0e0a956fa132ab9ab657527ec788 (patch)
tree48543a01283239dc55fb068d4dcb5ece1f3c3109
parent65cf7aac0b30cb9fd2148329b46e43e6f9c6f382 (diff)
downloadFreeBSD-src-01a827bd910a0e0a956fa132ab9ab657527ec788.zip
FreeBSD-src-01a827bd910a0e0a956fa132ab9ab657527ec788.tar.gz
When configuring hwpmc to use the EXT_SNOOP event, only send a default cachestate qualifier on the Atom processor. Other Intel processors do not accept a cachestate qualifier and currently hwpmc will return EINVAL if you try to use the EXT_SNOOP event on those processors
Approved by: jkoshy (mentor) MFC after: 2 weeks
-rw-r--r--lib/libpmc/libpmc.c9
1 files changed, 8 insertions, 1 deletions
diff --git a/lib/libpmc/libpmc.c b/lib/libpmc/libpmc.c
index c440aa8..8922dd8 100644
--- a/lib/libpmc/libpmc.c
+++ b/lib/libpmc/libpmc.c
@@ -737,9 +737,16 @@ iap_allocate_pmc(enum pmc_event pe, char *ctrspec,
case PMC_EV_IAP_EVENT_40H: /* Core */
case PMC_EV_IAP_EVENT_41H: /* Core */
case PMC_EV_IAP_EVENT_42H: /* Core, Core2, Atom */
- case PMC_EV_IAP_EVENT_77H: /* Core */
if (cachestate == 0)
cachestate = (0xF << 8);
+ break;
+ case PMC_EV_IAP_EVENT_77H: /* Atom */
+ /* IAP_EVENT_77H only accepts a cachestate qualifier on the
+ * Atom processor
+ */
+ if(cpu_info.pm_cputype == PMC_CPU_INTEL_ATOM && cachestate == 0)
+ cachestate = (0xF << 8);
+ break;
default:
break;
}
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