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* add ziarc 20020729ijliao2003-02-091-0/+1
| | | | ZiaRC is a Resistor Calculator
* add chipvault 200211ijliao2003-01-291-0/+1
| | | | A project organizer for VHDL and Verilog RTL hardware designs
* new port: cad/gwaveedwin2003-01-191-0/+1
| | | | | | | | Gwave is a waveform viewer. Its purpose is for viewing analog data, such as the output from Spice-like simulations. PR: ports/39364 Submitted by: Duncan Barclay <dmlb@dmlb.org>
* New port atlc version 4.0.1: A tool to calculate the impedance oflioux2002-11-131-0/+1
| | | | | | transmission lines Submitted by: blackend
* New port cascade version 1.4: A simple tool to analyze noise andlioux2002-11-131-0/+1
| | | | | | distortion of a RF system Submitted by: blackend
* add geda-utilsijliao2002-10-101-0/+1
| | | | | | | gEDA utilities PR: 43563 Submitted by: bruno <bruno@mail.tinkerbox.org>
* add geda-symcheckijliao2002-10-101-0/+1
| | | | | | | gEDA symbol checking utility PR: 43563 Submitted by: bruno <bruno@mail.tinkerbox.org>
* add transcalc 0.13ijliao2002-09-061-0/+1
| | | | A analysis and synthesis tool for RF and microwave transmission lines
* add gerbv 0.0.9ijliao2002-07-151-0/+1
| | | | A Free Gerber Viewer
* Remove acs. Its successor, gnucap, is already in the tree.tg2002-06-271-1/+0
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* add gtkwave 2.0.0p1ijliao2002-05-121-0/+1
| | | | Electronic Waveform Viewer
* add qfsm 0.30ijliao2002-04-111-0/+1
| | | | A graphical tool for designing finite state machines
* Add leocad 0.73, a CAD program that uses bricks similar to thosepetef2002-03-031-0/+1
| | | | | | | found in many toys. PR: 35231 Submitted by: David Yeske <dyeske@yahoo.com>
* Initial import of ngspice_reworkkevlo2002-02-091-0/+1
| | | | | | | Ngspice_rework is a circuit simulator derived from spice3f5. PR: 34589 Submitted by: AMAKAWA Shuhei <amakawa@jp.FreeBSD.org>
* add slffea 1.25ijliao2002-02-091-0/+1
| | | | San Le's Free Finite Element Analysis
* add gnucap 0.30ijliao2002-02-071-0/+1
| | | | The Gnu Circuit Analysis Package
* Add linux-eagle , an easy to use, yet powerful tool for designingsobomax2001-12-261-0/+1
| | | | printed circuit boards.
* add qmlsijliao2001-12-101-0/+1
| | | | Quine-McCluskey Logic Simplifier
* add pdnmeshijliao2001-10-141-0/+1
| | | | | | | A finite element program PR: 30115 Submitted by: Sarod Yatawatta <sarod@cs.pdn.ac.lk>
* gEDA electronic schematic capture toolsvanilla2001-04-071-0/+1
| | | | Submitted by: bruno.schwander@technologist.com
* gEDA electronic schematic capture toolsvanilla2001-04-071-0/+1
| | | | Submitted by: bruno.schwander@technologist.com
* geda-symbols is the basic component of geda package.vanilla2001-04-071-0/+1
| | | | Submitted byu.schwander@technologist.com
* libgeda is a a base library common to all the gEDA toolsvanilla2001-04-071-0/+1
| | | | Submitted by: bruno.schwander@technologist.com
* add vipecijliao2001-04-031-0/+1
| | | | ViPEC is a powerful tool for the analysis of high frequency, linear electrical networks
* Add oregano, schematic capture and simulation of electrical circuits.knu2001-03-071-0/+1
| | | | | PR: ports/25202 Submitted by: Anders Andersson <anders@codefactory.se>
* add iverilog, a Verilog simulation and synthesis toolijliao2001-02-131-0/+1
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* SCEPTRE (System for Circuit Evaluation and Prediction of Transientgrog2001-02-111-0/+1
| | | | | | | | | | Radiation Effects) is a general purpose circuit analysis program which provides all three major analyses, AC, DC, and transient analysis, on either linear or nonlinear networks. It employs a free-form input language and state variable methods to simulate problems of interest to electrical engineers. Requested-by: "Pedro F. Giffuni" <pfg1+@pitt.edu>
* Activate Electric.sada2000-07-301-0/+1
| | | | | PR: ports/18380 Submitted by: Mario Sergio Fujikawa Ferreira <lioux@linf.unb.br>
* Add PISCES, a two-dimensional device simulator which includesade2000-05-031-0/+1
| | | | | | | | | models for surface mobility, impact ionization and photo-generation. Quasi-three-dimensional simulation of cylindrically-symmetric devices is also supported. PR: 14686 Submitted by: Gianlorenzo Masini <masini@uniroma3.it>
* cider version 1b1steve1999-12-251-0/+1
| | | | | | | A mixed-level circuit and device simulator (includes SPICE3). PR: 15462 Submitted by: AMAKAWA Shuhei <amakawa@jp.FreeBSD.org>
* New port QCad, a 2D-CAD program. Uses Qt-2.tg1999-12-221-0/+1
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* Change Id->FreeBSD.obrien1999-08-251-1/+1
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* Activate the tkgate port.steve1999-06-061-1/+2
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* Sort entries. In particular, "large", "medium", "small" sort in this order,asami1998-12-071-2/+2
| | | | | | | | | | dispite their meanings. (Sometimes we're too smart for computers. :) Found by: sorting ports/INDEX by "sort -t '|' +1 -2" (Note: the whole "x11" category appears at the end with the above sort command, but I'll leave that the way it is for now -- "ls" shows it before other x11-* entries.)
* Activate geda.vanilla1998-12-061-1/+2
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* Enable sis, a new circuit emulator port.ghelmer1998-07-011-1/+2
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* Activate xcircuit.mph1998-05-181-1/+2
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* Activate kaskade.tg1997-11-171-1/+2
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* Add felt.asami1997-01-151-1/+2
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* Turn on mars and lprpsobrien1996-11-251-1/+2
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* Add spice.tg1996-05-231-1/+2
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* Add chipmunk, convert to new format along the way.asami1995-08-251-2/+6
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* Clean up subdir Makefiles. They now all look like this:asami1995-05-141-1/+2
| | | | | | | | | | | | | | | | | | | ===== # Id line # # RESTRICTED: restricted_port_1 (comment1) # RESTRICTED: restricted_port_2 (comment2) # # BROKEN: broken_port_3 (comment3) # BROKEN: broken_port_4 (comment4) # BROKEN: broken_port_5 (comment5) # SUBDIR= good_port_1 good_port_2 ... ===== Basically, the idea is to make it easy to find restricted or broken ports by doing a "grep".
* Alphabetize.jkh1995-01-131-2/+2
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* New cad groupjkh1995-01-131-0/+5
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